core: ffa: add thread_spmc_register_secondary_ep()

Adds thread_spmc_register_secondary_ep() which replaces the previous
platforms specific functions ffa_secondary_cpu_ep_register() in
plat-vexpress

core: ffa: add thread_spmc_register_secondary_ep()

Adds thread_spmc_register_secondary_ep() which replaces the previous
platforms specific functions ffa_secondary_cpu_ep_register() in
plat-vexpress and plat-totalcompute.

Reviewed-by: Jerome Forissier <jerome@forissier.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: enable FF-A with SPM Core at S-EL1

Adds support for using FF-A as transport instead of using the
proprietary SMCs defined in optee_smc.h.

The configuration support the case where SPM Core is

core: enable FF-A with SPM Core at S-EL1

Adds support for using FF-A as transport instead of using the
proprietary SMCs defined in optee_smc.h.

The configuration support the case where SPM Core is implementation at
S-EL1, that is, inside OP-TEE. This configuration is also know as "S-EL1
SPMC" in the FF-A 1.0 specification [1].

Compile with CFG_CORE_SEL1_SPMC=y

Note that this is an experimental feature, ABIs etc may have
incompatible changes

Link: [1] https://static.docs.arm.com/den0077/a/DEN0077A_PSA_Firmware_Framework_Arm_v8-A_1.0_EAC.pdf

Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: avoid incremental linking with -gc

The AArch64 linkers seems to have occasional problems with incremental
linking (-i) in combination with garbage collect of sections (-gc). The
way we're orga

core: avoid incremental linking with -gc

The AArch64 linkers seems to have occasional problems with incremental
linking (-i) in combination with garbage collect of sections (-gc). The
way we're organizing the layout of the binary used for paging depends on
-gc to build the different dependency trees for unpaged and
initialization code.

The problem in the linker is tracked in
https://bugs.linaro.org/show_bug.cgi?id=3006 and
https://sourceware.org/bugzilla/show_bug.cgi?id=21524

The problem typically manifests itself by:
aarch64-toolchain/gcc-linaro-6.3.1-2017.02-x86_64_aarch64-linux-gnu/bin/aarch64-linux-gnu-ld: BFD (Linaro_Binutils-2017.02) 2.27.0.20161019 assertion fail /home/tcwg-buildslave/workspace/tcwg-make-release/label/docker-trusty-amd64-tcwg-build/target/aarch64-linux-gnu/snapshots/binutils-gdb.git~linaro_binutils-2_27-branch/bfd/elflink.c:8380
core/arch/arm/kernel/link.mk:90: recipe for target 'out/arm-plat-vexpress/core/init.o' failed
make: *** [out/arm-plat-vexpress/core/init.o] Error 1

With this patch we replace the incremental linking with a full link
using a special link script. With a full link we can't have undefined
symbols so some dummy symbols are provided by the link script when some
object files are skipped when reducing the dependency tree. To
completely get rid of those dummy symbols the script that gathers the
sections is replaced by a python script that skips listed sections (if
provided).

In terms of features in the resulting binary, nothing is changed in this
commit.

Reviewed-by: Volodymyr Babchuk <vlad.babchuk@gmail.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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Properties: Adding Microsoft specific property

As an example on how to add vendor specific properties,
the microsoft specific property is added.

Original pull-request is
https://github.com/OP-T

Properties: Adding Microsoft specific property

As an example on how to add vendor specific properties,
the microsoft specific property is added.

Original pull-request is
https://github.com/OP-TEE/optee_os/pull/460

Suggested-by: Paul Swan <paswan@microsoft.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Tested-by: Pascal Brand <pascal.brand@linaro.org> (QEMU)
Signed-off-by: Pascal Brand <pascal.brand@st.com>

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Remove unused function tee_get_cutid()

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Pascal Brand <pascal.brand@s

Remove unused function tee_get_cutid()

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Pascal Brand <pascal.brand@st.com>

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vexpress: move some code to core/arch/arm/kernel

Some code that was previously in plat-vexpress is moved to the kernel
directory and enabled by CFG_GENERIC_BOOT=y so that it may be used by
other pla

vexpress: move some code to core/arch/arm/kernel

Some code that was previously in plat-vexpress is moved to the kernel
directory and enabled by CFG_GENERIC_BOOT=y so that it may be used by
other platforms.
Tested on QEMU and FVP, with and without pager.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (QEMU, FVP)
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>

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Move common TEE entry code into core/arch/arm/tee/entry.c

- OP-TEE SMC functions TEESMC32_OPTEE_FASTCALL_GET_SHM_CONFIG
and TEESMC32_OPTEE_FASTCALL_L2CC_MUTEX are handled in tee_entry()
- L2CC mutex

Move common TEE entry code into core/arch/arm/tee/entry.c

- OP-TEE SMC functions TEESMC32_OPTEE_FASTCALL_GET_SHM_CONFIG
and TEESMC32_OPTEE_FASTCALL_L2CC_MUTEX are handled in tee_entry()
- L2CC mutex code is enabled only when CFG_PL310 is set
- Duplicate code is removed

Tested on PLATFORM=vexpress-qemu_virt and PLATFORM=vexpress-fvp
with and without CFG_WITH_PAGER=y.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>

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Delete tee_common_otp.c

Move dummy implementations of tee_otp_get_hw_unique_key() and
tee_otp_get_die_id() to core/include/kernel/tee_common_otp.h as inline
functions.

Signed-off-by: Jerome Forissi

Delete tee_common_otp.c

Move dummy implementations of tee_otp_get_hw_unique_key() and
tee_otp_get_die_id() to core/include/kernel/tee_common_otp.h as inline
functions.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>

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arm: add Aarch64 (aka ARM64) support

* Adds support for ARM64 in plat-vexpress
* The name of the ARM64 instruction set is, hence _a64.S suffix to ARM64
assembly files to keep them apart from the A

arm: add Aarch64 (aka ARM64) support

* Adds support for ARM64 in plat-vexpress
* The name of the ARM64 instruction set is, hence _a64.S suffix to ARM64
assembly files to keep them apart from the A32 assembly files.
* ARM64 specific C code is inside #ifdef ARM64

The ARM64 port has all features of the ARM32 port with the exception of:
* Paging not supported
* No crypto ARMv8 crypto extensions implemented

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU, FVP, Juno)
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>

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Rename arm32 architecture to arm

Renames arm32 directories to arm.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU)
Reviewed-by

Rename arm32 architecture to arm

Renames arm32 directories to arm.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (QEMU)
Reviewed-by: Pascal Brand <pascal.brand@linaro.org>
Tested-by: Pascal Brand <pascal.brand@linaro.org> (QEMU platform)

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