History log of /optee_os/core/arch/arm/plat-aspeed/sub.mk (Results 1 – 2 of 2)
Revision Date Author Comments
# ba69abea 16-Feb-2023 Chia-Wei Wang <chiawei_wang@aspeedtech.com>

arm: Add Aspeed AST2700 platform support

Aspeed AST2700 is a quad-core SoC with ARM Cortex-A35 CPU.
This patch adds the platform support for AST2700 to execute
64-bits OP-TEE on top of ARMv8 TrustZo

arm: Add Aspeed AST2700 platform support

Aspeed AST2700 is a quad-core SoC with ARM Cortex-A35 CPU.
This patch adds the platform support for AST2700 to execute
64-bits OP-TEE on top of ARMv8 TrustZone features.

Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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# 63bd5b26 20-Jan-2022 Chia-Wei Wang <chiawei_wang@aspeedtech.com>

arm: Add Aspeed AST2600 platform support

Aspeed AST2600 is a dual-core SoC with ARM Cortex-A7 CPU.
This patch adds the platform support for AST2600 to execute
32-bits OP-TEE on top of TrustZone feat

arm: Add Aspeed AST2600 platform support

Aspeed AST2600 is a dual-core SoC with ARM Cortex-A7 CPU.
This patch adds the platform support for AST2600 to execute
32-bits OP-TEE on top of TrustZone features.

Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Acked-by: Jerome Forissier <jerome@forissier.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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