__gmon_start__ _fini __cxa_finalize __aeabi_unwind_cpp_pr1 _Jv_RegisterClasses snprintf prctl __errno_location perror __aeabi_unwind_cpp_pr0 CHIP_EnableAllInterrupt CHIP_DisableAllInterrupt CHIP_DebugIRQ CHIP_EnableIRQ CHIP_DisableIRQ UTL_memset CHIP_AttachISR sched_get_priority_max pthread_attr_init pthread_attr_setschedpolicy pthread_attr_setscope pthread_attr_setschedparam pthread_create CHIP_DetachISR ioctl pthread_join CHIP_InISRContext CHIP_InitISR HAL_BDMA_ReadByte HAL_BDMA_Read2Byte HAL_BDMA_Read4Byte HAL_BDMA_WriteByte HAL_BDMA_Write2Byte HAL_BDMA_Write4Byte HAL_BDMA_WriteRegBit HAL_BDMA_SetSrcAddr HAL_BDMA_GetSrcAddr HAL_BDMA_SetDstAddr HAL_BDMA_GetDstAddr HAL_BDMA_GetDevDw HAL_BDMA_GetDevId HAL_BDMA_SetSrcDev HAL_BDMA_SetDstDev HAL_BDMA_SetCmd0 HAL_BDMA_GetCmd0 HAL_BDMA_SetCmd1 HAL_BDMA_GetCmd1 HAL_BDMA_SetCmd2 HAL_BDMA_GetCmd2 HAL_BDMA_GetCRC32 HAL_BDMA_GetMatched HAL_BDMA_SetLen HAL_BDMA_GetLen HAL_BDMA_Set_Addr_Dec HAL_BDMA_Set_CRC_Reflect HAL_BDMA_SetDmyWrCnt HAL_BDMA_TrigOn HAL_BDMA_Stop HAL_BDMA_Enable_INT HAL_BDMA_MOBF HAL_BDMA_Is_Queued HAL_DMA_Is_FlashReady HAL_BDMA_Is_Busy HAL_BDMA_Is_Int HAL_BDMA_Is_Found HAL_BDMA_Is_Done HAL_BDMA_Clear_Status HAL_BDMA_Dump_AllReg puts putchar HAL_BDMA_SetIOMapBase HAL_BDMA_GetIOMapBase HAL_BDMA_SetSPIOffsetForMCU eBdmaIoctlOpt eBDMAModuleVersion HAL_SEM_SetBank HAL_SEM_Get_Num HAL_SEM_Get_Resource HAL_SEM_Free_Resource HAL_SEM_Reset_Resource HAL_SEM_Get_ResourceID HAL_MMIO_GetType HAL_MMIO_GetBase HAL_MMIO_GetIPBase _u32PM_Bank_SIZE _u32NonPM_Bank_SIZE _u32NonPM_Bank HAL_MMIO_FlushMemory HAL_MMIO_ReadMemory u32_ge0_mmio_base MHAL_MBX_SetConfig MHAL_MBX_Init MHAL_MBX_SetInformation MHAL_MBX_GetInformation MHAL_MBX_Fire MHAL_MBX_GetFireStatus MHAL_MBX_Recv MHAL_MBX_RecvEnd MsOS_AttachInterrupt MsOS_EnableInterrupt MHAL_MBXINT_Init MHAL_MBXINT_DeInit MsOS_DisableInterrupt MsOS_DetachInterrupt MHAL_MBXINT_ResetHostCPU MHAL_MBXINT_Fire MHAL_MBXINT_CpuInit _uart_dev HAL_UART1_PIU_Isr HAL_UART0_PIU_Isr _HAL_REG_ReadByte _HAL_REG_WriteByte _HAL_REG_WriteByteMask _HAL_REG_PM_ReadByte _HAL_REG_PM_WriteByte _HAL_REG_PM_WriteByteMask HAL_UART_SetIOMapBase HAL_UART_GetIOMapBase HAL_UART_SetPMRxEnable HAL_UART_Get_Connection HAL_UART_Connect HAL_UART_SetPadMux HAL_UART_Invert HAL_UART_PIU_Close HAL_UART_PIU_Write HAL_UART_PIU_Read HAL_UART_PIU_Poll HAL_UART_PIU_Set_Baudrate HAL_UART_PIU_Set_Rx_Callback _HAL_UART_PIU_Isr_HalReg HAL_UART1_PIU_Isr_HalReg HAL_UART0_PIU_Isr_HalReg HAL_UART_PIU_Set_Rx_Callback_HalReg HAL_UART_PIU_Ioctl HAL_UART_PIU_Open HAL_SYS_DMD_VD_MBX_Init MDrv_MMIO_GetBASE HAL_SYS_DMD_VD_MBX_GetType HAL_SYS_DMD_VD_MBX_SetType HAL_SYS_DMD_VD_MBX_ATV_WaitReady HAL_SYS_DMD_VD_MBX_ATV_ReadByte HAL_SYS_DMD_VD_MBX_ATV_WriteByte HAL_SYS_DMD_VD_MBX_DVB_WaitReady MsOS_GetSystemTime MsOS_Timer_DiffTimeFromNow HAL_SYS_DMD_VD_MBX_DVB_WaitHandShake HAL_SYS_DMD_VD_MBX_DVB_ReadByte HAL_SYS_DMD_VD_MBX_DVB_WriteByte HAL_SYS_DMD_VD_MBX_DVB_ReadDspReg HAL_SYS_DMD_VD_MBX_DVB_WriteDspReg HAL_SYS_DMD_VD_MBX_DVB_DBG_ReadReg HAL_SYS_DMD_VD_MBX_DVB_DBG_WriteReg HAL_SYS_DMD_VD_MBX_ATSC_WriteByte MsOS_DelayTask HAL_SYS_DMD_VD_MBX_ATSC_ReadByte HAL_SYS_Read2Byte XIU_TimeOutINTHandler HAL_SYS_Write2Byte HAL_SYS_RFAGC_Tristate HAL_SYS_IFAGC_Tristate HAL_SYS_SetAGCPadMux HAL_SYS_SetPCMCardDetectMode HAL_SYS_DisableDebugPort HAL_SYS_EnableDebugPort HAL_SYS_SetPadMux HAL_SYS_SetTSOutClockPhase SYS_VIF_ReadByteByVDMbox SYS_VIF_WriteByteByVDMbox SYS_VIF_WriteByteMaskByVDMbox SYS_VIF_WriteRegBitByVDMbox SYS_VIF_Read2ByteByVDMbox HAL_SYS_SetEfuseIOMapBase HAL_SYS_EfuseRead2Byte HAL_SYS_Query HAL_MIU_SetIOMapBase HAL_MIU_SetPMIOMapBase HAL_MIU_GetClientInfo clientTbl HAL_MIU_ReadByte HAL_MIU_PM_ReadByte HAL_MIU_Read2Byte HAL_MIU_Read4Byte HAL_MIU_WriteByte HAL_MIU_Write2Byte HAL_MIU_Write4Byte HAL_MIU_WriteRegBit HAL_MIU_Write2BytesBit HAL_MIU_SetProtectID HAL_MIU_SetGroupID IDEnables IDs HAL_MIU_ResetGroupID HAL_MIU_GetDefaultClientID_KernelProtect clientId_KernelProtect HAL_MIU_ProtectAlign HAL_MIU_Dram_Size HAL_MIU_ClinetNumber HAL_MIU_Protect HAL_MIU_GetProtectInfo HAL_MIU_SetSsc HAL_MIU_MaskReq HAL_MIU_UnMaskReq HAL_MIU_SelMIU HAL_MIU_Mask_Req_OPM_R HAL_MIU_Mask_Req_DNRB_R HAL_MIU_Mask_Req_DNRB_W HAL_MIU_Mask_Req_DNRB_RW HAL_MIU_Mask_Req_SC_RW HAL_MIU_Mask_Req_MVOP_R HAL_MIU_Mask_Req_MVD_R HAL_MIU_Mask_Req_MVD_W HAL_MIU_Mask_Req_MVD_RW HAL_MIU_Mask_Req_AUDIO_RW HAL_MIU_GET_MUX HAL_MIU_VOP_SwitchMIU HAL_MIU_IsI64Mode HAL_MIU_IsInitMiu1 HAL_MIU_SetGroupPriority HAL_MIU_SetHPriorityMask HAL_MIU_GetAutoPhaseResult HAL_MIU_EnableScramble HAL_MIU_IsScrambleEnabled HAL_MIU_SetLoadingRequest HAL_MIU_GetLoadingRequest HAL_MIU_ParseOccupiedResource MAsm_CPU_Sync MAsm_CPU_Nop MAsm_CPU_SwDbgBp MAsm_CPU_PowerDown MAsm_CPU_StatusBEV MAsm_CPU_Jump MAsm_CPU_GetTrailOne MAsm_CPU_EnableTimerInterrupt MAsm_CPU_DelayMs MAsm_CPU_DelayUs MAsm_CPU_SetEBASE MAsm_GetSystemTime gsystem_time_ms MAsm_CPU_TimerInit MAsm_CPU_TimerStart MAsm_CPU_TimerClean pthread_mutex_lock sysconf pthread_mutex_unlock abort dlmalloc_usable_size mstar_create_mspace mstar_create_mspace_with_base pthread_mutexattr_init pthread_mutexattr_setkind_np pthread_mutex_init pthread_mutexattr_destroy mstar_mspace_track_large_chunks mstar_destroy_mspace mstar_mspace_malloc mstar_mspace_free mstar_mspace_calloc mstar_mspace_realloc memcpy mstar_mspace_memalign mstar_mspace_independent_calloc mstar_mspace_independent_comalloc mstar_mspace_trim mstar_mspace_malloc_stats fprintf stderr mstar_mspace_footprint mstar_mspace_max_footprint mstar_mspace_mallinfo mstar_mspace_usable_size mstar_mspace_mallopt MsOS_MPool_Close MsOS_MPool_Get HAL_MsOS_MPool_VA2PA MsOS_MPool_PA2KSEG1 HAL_MsOS_MPool_PA2VA MsOS_MPool_PA2KSEG0 HAL_MsOS_MPool_Dcache_Flush HAL_MsOS_MPool_Dcache_Flush_All MsOS_MPool_Mapping mmap MsOS_MPool_Kernel_Detect MsOS_MPool_SetDbgLevel MsOS_MPool_Init MDrv_SYS_Info Cyg_Mempool_Implementation__roundup Cyg_Mempool_Implementation__addr2memdq Cyg_Mempool_Implementation__alloc2memdq Cyg_Mempool_Implementation__memdq2alloc Cyg_Mempool_Implementation__insert_free_block Cyg_Mempool_Implementation__get_allocation_size Cyg_Mempool__try_alloc Cyg_Mempool__resize_alloc Cyg_Mempool__free Cyg_Mempool__get_allocation_size Cyg_Mempool__get_status Cyg_Mempool_Implementation__get_status Cyg_Mempool_Implementation__free Cyg_Mempool_Implementation__resize_alloc Cyg_Mempool_Implementation__try_alloc Cyg_Mempool_Status_init Cyg_Mempool_Status__Cyg_Mempool_Status Cyg_Mempool_Implementation__Create Cyg_Mempool_Implementation__Delete cyg_mempool_var_try_alloc cyg_mempool_var_free cyg_mempool_var_waiting cyg_mempool_var_get_info Cyg_Mempool__Create cyg_mempool_var_create Cyg_Mempool__Delete cyg_mempool_var_delete _MsOS_LinuxTaskWrapper strlen clock_gettime pthread_mutex_timedlock pthread_mutex_trylock MDrv_MSOS_GetLibVer MsOS_CreateMemoryPool MsOS_DeleteMemoryPool MsOS_InfoMemoryPool MsOS_FreeMemory MsOS_ReallocateMemory MsOS_CreateTask pthread_attr_setdetachstate pthread_attr_setinheritsched pthread_attr_getschedparam sched_get_priority_min posix_memalign MsOS_DeleteTask pthread_cancel MsOS_YieldTask sched_yield nanosleep MsOS_DelayTaskUs MsOS_ResumeTask MsOS_SuspendTask MsOS_InfoTask MsOS_InfoTaskID pthread_self MsOS_GetOSThreadID MsOS_CreateMutex strncpy strcmp pthread_mutexattr_setpshared MsOS_DeleteMutex pthread_mutex_destroy MsOS_ObtainMutex MsOS_ReleaseMutex MsOS_InfoMutex MsOS_CreateSemaphore sem_init MsOS_DeleteSemaphore sem_destroy MsOS_ObtainSemaphore sem_timedwait sem_wait MsOS_ReleaseSemaphore sem_post MsOS_InfoSemaphore sem_getvalue MsOS_CreateEventGroup pthread_cond_init MsOS_DeleteEventGroup pthread_cond_destroy MsOS_SetEvent pthread_cond_broadcast MsOS_ClearEvent MsOS_WaitEvent pthread_cond_timedwait pthread_cond_wait MsOS_CreateTimer timer_create timer_settime MsOS_StartTimer MsOS_StopTimer MsOS_DeleteTimer timer_delete MsOS_ResetTimer MsOS_Timer_DiffTime MsOS_CreateQueue MsOS_DeleteQueue MsOS_SendToQueue pthread_cond_signal MsOS_RecvFromQueue MsOS_PeekFromQueue MsOS_DebugInterrupt MsOS_DisableAllInterrupts MsOS_RestoreAllInterrupts MsOS_EnableAllInterrupts MsOS_In_Interrupt MsOS_Dcache_Flush MsOS_Dcache_Invalidate MsOS_Dcache_Writeback MsOS_VA2PA MsOS_PA2KSEG0 MsOS_PA2KSEG1 MsOS_PA2BA MsOS_BA2PA MsOS_SHM_Init shmget shmat MsOS_Init MsOS_SHM_GetId __assert_fail MsOS_SHM_FreeId MsOS_CPU_DisableInterrupt MsOS_CPU_EnableInterrupt MsOS_CPU_RestoreInterrupt MsOS_CPU_MaskAllInterrupt MsOS_CPU_MaskInterrupt MsOS_CPU_UnMaskInterrupt MsOS_CPU_LockInterrupt MsOS_CPU_UnLockInterrupt MsOS_CPU_AttachInterrupt MsOS_CPU_DetachInterrupt MsOS_CPU_AttachException MsOS_CPU_DetachExceptiont MsOS_CPU_SetEBASE MsOS_Sync MsOS_FlushMemory MsOS_AllocateMemory MsOS_ReadMemory dlinit sbrk_top heap_end _sbrk MsOS_Dbg_ExecuteSubCB MsOS_Dbg_Regist MsOS_Dbg_ParseCmd strtok MsOS_RegMyDbg UTOPIARegisterToUtopia BDMARegisterToUtopia AESDMARegisterToUtopia DSCMBRegisterToUtopia UtopiaInitRegister psUtopiaPrivate UtopiaInit UtopiaOpen moduleNames UtopiaIoctl UtopiaClose privateNames rpoolNames ResourceNames eMsModule shmid2va_table locate_module UtopiaInstanceCreate UtopiaInstanceDelete UtopiaInstanceGetPrivate UtopiaInstanceGetModule UtopiaInstanceGetModuleID UtopiaInstanceGetModuleVersion UtopiaInstanceGetAppRequiredModuleVersion UtopiaModuleCreate UtopiaModuleGetPrivate UtopiaModuleRegister UtopiaModuleSetupFunctionPtr UtopiaModuleSetVersion UtopiaModuleGetDebugLevel UtopiaResourceCreate sprintf UtopiaResourceGetPrivate UtopiaResourceRegister UtopiaResourceObtain semop op_down UtopiaResourceRelease op_up UtopiaModuleAddResourceStart UtopiaModuleAddResourceEnd semget semctl exit utopiaShmIdIndex utopiaShmIdArray _UtopiaModule_Ioctl eUtopiaModuleIoctlOpt eUtopiaPoolID BDMAClose BDMAIoctl BDMAOpen _MDrv_BDMA_MemCopy _MDrv_BDMA_Search _MDrv_BDMA_CRC32 _MDrv_BDMA_PatternFill _MDrv_BDMA_FlashCopy2Dram _MDrv_BDMA_MOBFSearch _MDrv_BDMA_GetStatus MDrv_BDMA_GetInfo MDrv_BDMA_GetLibVer MDrv_BDMA_GetMinSize MDrv_BDMA_SetDbgLevel _MDrv_BDMA_SetSPIOffsetForMCU _MDrv_BDMA_WaitFlashDone MDrv_BDMA_Init eBdmaPoolID MDrv_BDMA_Exit pInstantBdma bU20BDMAOpened MDrv_BDMA_Stop MDrv_BDMA_Stop_All MDrv_BDMA_DumpCB _MDrv_BDMA_CheckUtopia20Open pAttributeBdma MDrv_BDMA_CopyHnd MDrv_SEM_Init MDrv_SEM_Get_Resource MDrv_SEM_Free_Resource MDrv_SEM_Reset_Resource MDrv_SEM_Get_ResourceID MDrv_SEM_Get_Num MDrv_SEM_GetLibVer MDrv_MMIO_GetLibVer MDrv_MMIO_Init _u32FRC_Bank _u32FRC_Bank_SIZE _u32OTP_Bank _u32OTP_BankSize _u32SPRAM_Bank _u32SPRAM_BankSize _u32NSK_Bank _u32NSK_BankSize _u32PM_Bank _u32Flash_Bank0 _u32Flash_Bank0_SIZE MDrv_MMIO_Close MDrv_MBX_Init MDrv_SYS_DMD_VD_MBX_Init getpid fcntl __libc_current_sigrtmin sigemptyset sigaction MDrv_MBX_DeInit MDrv_MBX_RegisterMSG MDrv_MBX_RegisterMSGWithCallBack MDrv_MBX_UnRegisterMSG MDrv_MBX_ClearMSG MDrv_MBX_SendMsg MDrv_MBX_SendMsgLoopback MDrv_MBX_GetMsgQueueStatus MDrv_MBX_RecvMsg MDrv_MBX_CheckMsg MDrv_MBX_RemoveLatestMsg MDrv_MBX_Enable MDrv_MBX_SetInformation MDrv_MBX_GetInformation MDrv_MBX_SetDbgLevel MDrv_MBX_GetLibVer MDrv_MBX_GetInfo MDrv_MBX_GetStatus MDrv_UART_SetIOMapBase MDrv_UART_GetInfo MDrv_UART_GetLibVer MDrv_UART_GetStatus MDrv_UART_SetDbgLevel MDrv_UART_SetPMRxEnable mdrv_uart_open mdrv_uart_close mdrv_uart_set_rx_callback mdrv_uart_set_rx_callback_halreg mdrv_uart_set_tx_buffer mdrv_uart_set_rx_buffer mdrv_uart_rx_enable mdrv_uart_tx_enable mdrv_uart_rx_disable MDrv_UART_SetRxMode mdrv_uart_tx_disable mdrv_uart_write MDrv_UART_PutString MDrv_UART_PutChar mdrv_uart_read getchar MDrv_UART_GetFile MDrv_UART_GetChar mdrv_uart_poll mdrv_uart_set_baudrate MDrv_UART_Init piu_uart_io mdrv_uart_get_connection mdrv_uart_connect mdrv_uart_connect_mux mdrv_uart_invert kbhit OS_UART_ISR_Enable OS_UART_ISR_Disable OS_UART_Init OS_UART_Exit MDrv_IRQ_GetLibVer MDrv_IRQ_Init MDrv_IRQ_Attach MDrv_IRQ_Detech MDrv_IRQ_Restore MDrv_IRQ_MaskAll MDrv_IRQ_Mask MDrv_IRQ_UnMaskAll MDrv_IRQ_UnMask MDrv_IRQ_NotifyCpu MDrv_IRQ_InISR MDrv_SYS_DMD_VD_MBX_SetType MDrv_SYS_DMD_VD_MBX_ReadReg MDrv_SYS_DMD_VD_MBX_ReadDSPReg MDrv_SYS_DMD_VD_MBX_DBG_ReadReg MDrv_SYS_DMD_VD_MBX_WriteReg MDrv_SYS_DMD_VD_MBX_WriteDSPReg MDrv_SYS_DMD_VD_MBX_DBG_WriteReg MDrv_SYS_Init MDrv_SYS_GetChipRev MDrv_SYS_GetChipID MDrv_SYS_GetInfo MDrv_SYS_GetLibVer MDrv_SYS_GetStatus MDrv_SYS_GetSoftwareVersion MDrv_SYS_WDTEnable MDrv_SYS_WDTClear MDrv_SYS_WDTLastStatus MDrv_SYS_WDTSetTime MDrv_SYS_ResetChip MDrv_SYS_ResetCPU TINY_SYS_Reset MDrv_SYS_SetAGCPadMux MDrv_SYS_SetPCMCardDetectMode MDrv_SYS_DisableDebugPort MDrv_SYS_EnableDebugPort MDrv_SYS_SetPadMux MDrv_SYS_SetTSOutClockPhase MDrv_SYS_SetDbgLevel MDrv_SYS_VIFWriteByteByVDMbox MDrv_SYS_VIFWriteByteMaskByVDMbox MDrv_SYS_VIFWriteRegBitByVDMbox MDrv_SYS_VIFReadByteByVDMbox MDrv_SYS_VIFRead2ByteByVDMbox MDrv_SYS_Query _Change _Revision MDrv_MIU_Init MDrv_MIU_SetIOMapBase MDrv_MIU_GetDefaultClientID_KernelProtect MDrv_MIU_ProtectAlign MDrv_MIU_Dram_Size MDrv_MIU_ClinetNumber MDrv_MIU_Protect MDrv_MIU_SetSsc MDrv_MIU_SetSscValue MDrv_MIU_MaskReq MDrv_MIU_UnMaskReq MDrv_MIU_Mask_Req_OPM_R MDrv_MIU_Mask_Req_DNRB_R MDrv_MIU_Mask_Req_DNRB_W MDrv_MIU_Mask_Req_DNRB_RW MDrv_MIU_Mask_Req_SC_RW MDrv_MIU_Mask_Req_MVOP_R MDrv_MIU_Mask_Req_MVD_R MDrv_MIU_Mask_Req_MVD_W MDrv_MIU_Mask_Req_MVD_RW MDrv_MIU_Mask_Req_AUDIO_RW MDrv_MIU_InitCounter MIU0_request_mask_count MIU1_request_mask_count MDrv_MIU_SwitchMIU MDrv_MIU_SelMIU MDrv_MIU_IsSupportMIU1 MDrv_MIU_GetBusWidth MDrv_MIU_GetClientInfo MDrv_MIU_GetProtectInfo MDrv_MIU_SetGroupPriority MDrv_MIU_SetHPriorityMask MDrv_MIU_GetLibVer MDrv_MIU_EnableScramble MDrv_MIU_IsScrambleEnabled MDrv_MIU_GetLoading raise libc.so.6 _edata __bss_start __bss_start__ __bss_end__ __end__ GLIBC_2.4
CHIP_DetachISR IRQThread_%d IRQ %d polling error!! /proc/irq/%d/irq Cannot open interrupt descriptor for irq=%d polling thread destroy failed IRQ %d polling thread destroyed %s.%d ioctl fail polling fd close failed IRQ %d polling fd closed!! @ CDEFG IJ A N PQRSTU nZ[\ _ $&*(1 `dec hg mf rs abo " 3456 tu vwxyz{ W]^ L Ki kl|}~BH Y X ! Mj !" uvwxyz +,-./0123t5678 ;<= ?` s $ % ' & ( {|}~ @]^CABJFE I _KLUV @@ @ HAL_DMA_Is_FlashReady %s not support! %lx: %4x Wait for PM51 standby........... PM51 run ok........... IOMap failure to get MAP_NONPM_BANK HAL_SYS_DMD_VD_MBX_DVB_WaitReady Timeout HAL_SYS_DMD_VD_MBX_DVB_WaitHandShake Timeout SYS_VIF_Read2ByteByVDMbox SYS_VIF_WriteRegBitByVDMbox drvSYS access RIU register error!! XIU Time Out Occurred! Address is 0x%x%x [ERROR] HAL_SYS_SetAGCPadMux: Invalid AGC Pad Selection %s(0x%08X) not support!!! %s(0x%08X, 0x%02X) not support!!! %s(0x%08X, 0x%02X, 0x%02X) not support!!! SYS_VIF_WriteByteByVDMbox SYS_VIF_WriteByteMaskByVDMbox SYS_VIF_ReadByteByVDMbox HAL_MIU_SetHPriorityMask HAL_MIU_UnMaskReq HAL_MIU_MaskReq HAL_MIU_SelMIU ^ b z 9 ' R S T / { a _ ] 1 e N M W X V U Z [ j .  # $ 2 P O + p n o | } ^ b z 9 ' R S T / { a _ ] 1 e N M W X V U Z [ j .  # $ 2 P O + p n o | } HAL_MIU_WriteByte Wrong MIU device:%u %s reg error! Err: Out of the number of protect device Err: Protected address should be aligned to 8KB Err: Start address is equal to or more than end address MIU%u Block:%u Group:%u ClientID:%u Hitted_Address:0x%lx<->0x%lx there is no MIU1 SSC u16Fmodulation Error...(20KHz - 40KHz) SSC u16FDeviation Error...(0.1%% - 2%% ==> 1 ~20) %s not support client ID:%u! Change miu%u group priority:%x MIU%d loading: %d%% HAL_MIU_Write2Byte HAL_MIU_WriteRegBit HAL_MIU_Write4Byte ACQUIRE_MALLOC_GLOBAL_LOCK fail err unlink_large_chunk %d %p bk %p fd %p prev_foot %d head %d child %p %p parent %p NOT_USE_SYSALLOC max system bytes = %10lu system bytes = %10lu in use bytes = %10lu ERROR!!! CAN'T SUCCESSFULLY CONVERT FROM VA(%lx) TO PA(%x) mpool_info[%d].pVirtStart =%lx mpool_info[%d].pVirtEnd = %lx mpool_info[%d].pPhyaddr =%lx mpool_info[%d].u32MpoolSize =%lx mpool_info[%d].s32V2Poff = %lx MsOS_MPool_PA2KSEG1 return NULL pAddrPhys =%lx MsOS_MPool_PA2KSEG0 return NULL FAIL:%d u32Offset = %lx, u32MapSize = %lx, bNonCache = %02x Not enough MPool, must increase MAX_MAPPINGSIZE!! lx_addr = %lx, lx_size = %lx lx2_addr = %lx, lx2_size = %lx /dev/malloc /dev/system %s Bad link in dq bad free block not enough space for list item alloc_ptr outside pool bad alloc_ptr block found is too small alloced outside pool returned memory not aligned allocate memory fail Bad alignment align is zero align not a power of 2 alignment not a power of 2 heap too small top too large top badly aligned bottom badly aligned Bad free MsOS_CPU_UnLockInterrupt MsOS_CPU_DetachExceptiont MsOS_CPU_AttachException MsOS_FlushMemory MsOS_CPU_SetEBASE MsOS_CPU_RestoreInterrupt MsOS_ReadMemory MsOS_CPU_MaskInterrupt MsOS_CPU_MaskAllInterrupt MsOS_SHM_GetId the length of the thread name exceeds 15, it will be truncated to 15 chars [MSOS_PRINT][%06d] Invalid memory pool ID:%ld, you must use the ID of the mpool you created [MSOS_PRINT][%06d] MEMORY POOL WITH MEMORYPOOL_ID:0x%lx NOT EXIST [MSOS_PRINT][%06d] Invalid memory pool ID:%ld, you must use the default ID: MSOS_MALLOC_ID ,or the ID of the mpool you created [MSOS_PRINT][%06d] Invalid mpool ID:%ld, you must use the default ID macro: MSOS_MALLOC_ID ,or the ID of the mpool you created [MSOS_PRINT][%06d] System will free default mpool memory here [MSOS_PRINT][%06d] System will reallocate memory from default pookl [MSOS_PRINT][%06d] thread %lx join fail [MSOS_PRINT][%06d] TASK WITH TASK_ID:0x%lx NOT EXIST [MSOS_PRINT][%06d] nanosleep is interrupted: %d [MSOS_PRINT][%06d] %s: Warning strlen(%s) is longer than MAX_MUTEX_NAME_LENGTH(%d). Oversize char will be discard. [MSOS_PRINT][%06d] MUTEX WITH MUTEX_ID:0x%lx NOT EXIST Mutex Name: %s [MSOS_PRINT][%06d] SEMAPHORE WITH SEMAPHORE_ID:0x%lx NOT EXIST [MSOS_PRINT][%06d] EVENTGROUP WITH EVENTGROUP:0x%lx NOT EXIST [MSOS_PRINT][%06d] TIMER WITH TIMER_ID:0x%lx NOT EXIST [MSOS_PRINT][%06d] E_MSG_VAR_SIZE has not been supported yet [MSOS_PRINT][%06d] QUEUE WITH QUEUEID:0x%lx NOT EXIST [MSOS_PRINT][%06d] [%s][%d] fail [MSOS_PRINT][%06d] pthread_mutex_init [MSOS_PRINT][%06d] CHIP_InitISR [MSOS_PRINT][%06d] [MDrv_SYS_Init]open device node failed! [MSOS_PRINT][%06d] [%s][%d] MsOS_SHM_Init should be invoked first [MSOS_PRINT][%06d] [%s][%d][ClientName %s] Error: inconsistent buffer size with other process [MSOS_PRINT][%06d] Assert in %s,%d /home/bob.fu/PERFORCE/THEALE/utopia_develop/UTPA-14.5.1_utopia2/build/../mxlib/msos/linux/MsOS_linux.c [MSOS_PRINT][%06d] [%s][%d] MsOS_SHM_GetId: shared memory buffer overflow [MSOS_PRINT][%06d] [%s][%d] %s is not supported [MSOS_PRINT][%06d] %s.%d ioctl fail [MSOS_PRINT][%06d] System will use default mpool to allocate memory here MsOS_CPU_DetachInterrupt MsOS_SHM_Init MsOS_CPU_DisableInterrupt MsOS_CPU_UnMaskInterrupt MsOS_CPU_EnableInterrupt MsOS_CreateMutex MsOS_SHM_GetId MsOS_CPU_AttachInterrupt MsOS_CPU_LockInterrupt MsOS_Dbg_Regist ============ %s %s :%s [%s] %s registered [%s] new entry failed Main _MsOS_Dbg_IsRegisterd [UTOPIA INIT], try to get mutex [UTOPIA INIT], mutex got! unexpected module ID in UtopiaInitRegister [UTOPIA INIT], release mutex utopia init UtopiaPrivateMutex [UTOPIA INFO] open module id: %s [UTOPIA INFO] ioctl module id: %s [UTOPIA INFO] close module id: %s next_resource %s, %d, %s, what the fuck! /home/bob.fu/PERFORCE/THEALE/utopia_develop/UTPA-14.5.1_utopia2/build/../mxlib/utopia_core/linux/utopia_dapi.c error: register duplicated shared memory ID %d shmid2va_table[%d] = %p ppInstance should not be NULL create instance at %p with private size %d bytes at %p create module@shm %s at %p create module %s at %p create private of module %s at %p module pointer can't be null register module: %s error: register duplicated module: %s setup function pointers of module %s create resource %s %s_PRI create private %s of resource %s %s_%d create resource pool %s at %p register resource into pool %s [SEMAPHORE], try to get semaphore: 0x%X [SEMAPHORE], semaphore got: 0x%X [SEMAPHORE], release semaphore: 0x%X semaphore id %d already exists Create the semaphore Couldn't create semaphore! UTOPIARegisterToUtopia MS_MODULE_UTOPIA SemStartKey %s, %d %s, %d, %p BDMAIoctl - MDrv_CMD_BDMA_MemCopy UtopiaResourceObtainToInstant fail BDMAIoctl - MDrv_CMD_BDMA_Search BDMAIoctl - MDrv_CMD_BDMA_CRC32 BDMAIoctl - MDrv_CMD_BDMA_Pattern_Fill BDMAIoctl - MDrv_CMD_BDMA_FlashCopy2Dram BDMAIoctl - MDrv_CMD_BDMA_MOBFSearch BDMAIoctl - MDrv_CMD_BDMA_GetStatus BDMAIoctl - MDrv_CMD_BDMA_GetInfo BDMAIoctl - MDrv_CMD_BDMA_GetLibVer BDMAIoctl - MDrv_CMD_BDMA_GetMinSize BDMAIoctl - MDrv_CMD_BDMA_SetDbgLevel BDMAIoctl - MDrv_CMD_BDMA_SetSPIOffsetForMCU BDMAIoctl - MDrv_CMD_BDMA_WaitFlashDone [BDMA INFO] bdma open bdma0 Mutex BDMA [%s][%d] Get register base fail MDrv_SEM_Init /dev/miomap [MailBox (Driver)][%05d] [MDrv_MBX_Init] Invalid HK CPU ID [MailBox (Driver)][%05d] [MDrv_MBX_Init] Invalid Host Role ID [MailBox (Driver)][%05d] [MDrv_MBX_Init] Invalid Timeout Value /dev/msmailbox [MailBox (Driver)][%05d] [MDrv_MBX_Init]MDRV_MBX_IOC_INIT Failed! [MailBox (Driver)][%05d] [MDrv_MBX_Init]MDrv_MBX_Init Failed! Result=%d MBX_Send_Mutex [MailBox (Driver)][%05d] !!!Acquire Send Mutex for MBX Failed! MBX_Recv_Mutex [MailBox (Driver)][%05d] !!!Acquire Recv Mutex for MBX Failed! [MailBox (Driver)][%05d] [MDrv_MBX_Init]Open Device Failed! [MailBox (Driver)][%05d] [MDrv_MBX_Init]Device Already Opened! [MailBox (Driver)][%05d] [MDrv_MBX_DeInit]MDRV_MBX_IOC_DEINIT Failed! [MailBox (Driver)][%05d] [MDrv_MBX_DeInit]DeInit Failed! Result=E_MBX_ERR_HAS_MSG_PENDING! [MailBox (Driver)][%05d] [MDrv_MBX_RegisterMSG]E_MBX_ERR_INVALID_PARAM! [MailBox (Driver)][%05d] [MDrv_MBX_RegisterMSG]MDRV_MBX_IOC_REGISTERMSG Failed! [MailBox (Driver)][%05d] [MDrv_MBX_RegisterMSG]MDrv_MBX_RegisterMSG Failed! Result=%d [MailBox (Driver)][%05d] [MDrv_MBX_UnRegisterMSG]E_MBX_ERR_INVALID_PARAM! [MailBox (Driver)][%05d] [MDrv_MBX_UnRegisterMSG]MDRV_MBX_IOC_UNREGISTERMSG Failed! [MailBox (Driver)][%05d] [MDrv_MBX_UnRegisterMSG]MDrv_MBX_UnRegisterMSG Failed! Result=%d [MailBox (Driver)][%05d] [MDrv_MBX_ClearMSG]E_MBX_ERR_INVALID_PARAM! [MailBox (Driver)][%05d] [MDrv_MBX_ClearMSG]MDRV_mBX_IOC_CLEARMSG Failed! [MailBox (Driver)][%05d] [MDrv_MBX_ClearMSG]MDrv_MBX_ClearMSG Failed! Result=%d [MailBox (Driver)][%05d] [MDrv_MBX_SendMsg]E_MBX_ERR_INVALID_PARAM! [MailBox (Driver)][%05d] [MDrv_MBX_SendMsg]MDRV_MBX_IOC_SENDMSG Failed! [MailBox (Driver)][%05d] [MDrv_MBX_SendMsg]MDrv_MBX_SendMsg Failed! Result=%d [MailBox (Driver)][%05d] [MDrv_MBX_GetMsgQueueStatus]E_MBX_ERR_INVALID_PARAM! [MailBox (Driver)][%05d] [MDrv_MBX_GetMsgQueueStatus]MDRV_MBX_IOC_GETMSGQSTATUS Failed! [MailBox (Driver)][%05d] [MDrv_MBX_RecvMsg]E_MBX_ERR_INVALID_PARAM! [MailBox (Driver)][%05d] [MDrv_MBX_RecvMsg]MDRV_MBX_IOC_RECVMSG Failed! [MailBox (Driver)][%05d] [MDrv_MBX_RecvMsg]MDrv_MBX_RecvMsg Failed! Result=%d [MailBox (Driver)][%05d] [MDrv_MBX_CheckMsg]E_MBX_ERR_INVALID_PARAM! [MailBox (Driver)][%05d] [MDrv_MBX_CheckMsg]MDRV_MBX_IOC_CHECKMSG Failed! [MailBox (Driver)][%05d] [MDrv_MBX_CheckMsg]MDrv_MBX_CheckMsg Failed! Result=%d [MailBox (Driver)][%05d] [MDrv_MBX_RemoveLatestMsg]MDrv_MBX_RemoveLatestMsg Failed! [MailBox (Driver)][%05d] [MDrv_MBX_RemoveLatestMsg]MDrv_MBX_RemoveLatestMsg Failed! Result=%d [MailBox (Driver)][%05d] [_MDrv_MBX_MsgArrived]Wrong Signal callback received! [MailBox (Driver)][%05d] R Class %d [MailBox (Driver)][%05d] [_MDrv_MBX_MsgArrived]Signal callback is NULL! [MailBox (Driver)][%05d] [_MDrv_MBX_MsgArrived]MDrv_MBX_GetMsgQueueStatus Failed! Result=%d [MailBox (Driver)][%05d] [MDrv_MBX_Enable]MDRV_MBX_IOC_MBXENABLE Failed! [MailBox (Driver)][%05d] [MDrv_MBX_Enable]MDrv_MBX_Enable Failed! Result=%d [MailBox (Driver)][%05d] [MDrv_MBX_SetInformation] Invalid Role ID [MailBox (Driver)][%05d] [MDrv_MBX_SetInformation]Invalid pU8Info! [MailBox (Driver)][%05d] [MDrv_MBX_SetInformation]Invalid Information Size! [MailBox (Driver)][%05d] [MDrv_MBX_SetInformation]MDRV_MBX_IOC_SETINFORMATION Failed! [MailBox (Driver)][%05d] [MDrv_MBX_SetInformation]Open Device Failed! [MailBox (Driver)][%05d] [MDrv_MBX_SetInformation]MDrv_MBX_SetInformation Failed! Result=%d [MailBox (Driver)][%05d] [MDrv_MBX_GetInformation]Invalid pU8Info! [MailBox (Driver)][%05d] [MDrv_MBX_GetInformation]Invalid Information Size! [MailBox (Driver)][%05d] [MDrv_MBX_GetInformation]MDRV_MBX_IOC_GETINFORMATION Failed! [MailBox (Driver)][%05d] [MDrv_MBX_GetInformation]Open Device Failed! [MailBox (Driver)][%05d] [MDrv_MBX_GetInformation]MDrv_MBX_GetInformation Failed! Result=%d [MailBox (Driver)][%05d] [MDrv_MBX_GetStatus]MDRV_MBX_IOC_MBXGETDRVSTATUS Failed! mdrv_uart_connect_mux Error: %s, uart_connect fail Error: %s, uart set port pad fail Mutex DMD_VD_MBX MDrv_SYS_DMD_VD_MBX_Init more than twice $Change$ $Revision$
+2RST MSIF00 1MSOS0101000000000 MS_PRIVATE_UTOPIA MS_PRIVATE_BDMA MS_PRIVATE_AESDMA MS_PRIVATE_DSCMB MS_MODULE_UTOPIA MS_MODULE_BDMA MS_MODULE_AESDMA MS_MODULE_DSCMB MS_RESOURCE_POOL_UTOPIA MS_RESOURCE_POOL_BDMA MS_RESOURCE_POOL_AESDMA MS_RESOURCE_POOL_DSCMB MS_RESOURCE_UTOPIA MS_RESOURCE_BDMA MS_RESOURCE_AESDMA MS_RESOURCE_DSCMB MSIF00 1BDMA0301003480330 MSIF00 1SEM_0101002648850 MSIF00 1MMIO0102004099080 MSIF00 1MBX_0204005461020 MSIF00 1UART0106003100500 MSIF00 1IRQ 0103005556790 MSIF00 1SYS_0109006306520 ` l MSIF00 1MIU_0102002648850
GCC: (Sourcery G++ Lite 2010.09-50) 4.5.1
u16irq E_FIQ_DSP2MIPS E_INT_IRQ_CA_SVP E_INT_FIQ_VP6 E_INT_IRQ_SMART E_INT_FIQ_DEC_DSP2MIPS E_IRQEXPH_BDMA0 E_IRQEXPH_BDMA1 size_t E_IRQ_DDC2BI bPending E_FIQ_SE_DSP2UP E_INT_IRQ_AU_DMA driverp revents E_FIQ_AEON_TO_BEON E_INT_FIQEXPL_HST1_TO_3 E_INT_IRQ_M4VD E_INT_IRQ_M4VE E_INT_IRQ_0x50_START E_FIQEXPL_8051_TO_SECURER2 E_INT_IRQ_AFEC E_INT_IRQ_TSP_CHECKSUM_FAIL E_INT_IRQ_PCM _IO_save_end E_INT_FIQ_MENULOAD CHIP_EnableIRQ E_IRQEXPH_GE CHIP_DetachISR E_INT_IRQ_MVD CHIP_EnableAllInterrupt CHIP_HISR_Info CHIP_AttachISR E_FIQ_USB E_INT_FIQ_R2TOMCU_INT0 E_INT_IRQ_0x10_START _IO_write_base InterruptNum E_FIQ_EMAC E_INT_IRQ_MVD2MIPS E_IRQEXPH_DCSUB E_FIQ_UHC E_INT_FIQ_PCM_DMA E_INT_IRQ_KEYPAD E_INT_FIQ_SPDIF_IN_NON_PCM E_INT_IRQ_DPTX irq_thd_name E_INT_IRQ_RASP E_INT_IRQ_FRC_INT_IRQ2HST0 E_IRQ_USB _IO_save_base IntEnum2HWIdx E_INT_FIQ_AEON_TO_MIPS_VPE0 E_INT_FIQ_AEON_TO_MIPS_VPE1 E_FIQ_SPDIF_IN_NON_PCM E_FIQ_FIELD_VE4VBI eIntNum E_IRQ_VE E_INT_IRQ_UART0 E_INT_IRQ_UART1 _chain E_INT_IRQ_FIQ_ALL E_INT_IRQ_UP_IRQ_EMM_ECM E_INT_IRQ_HDCP _cur_column E_INT_FIQ_IR_IN __sched_priority E_IRQEXPL_HVD E_INT_IRQ_CIMAX2MCU E_FIQH_START E_INT_IRQ_COMB E_FIQ_MB_AUR2TOMCU1 E_INT_FIQ_0x70_END E_FIQEXPH_GPIO3 E_FIQEXPH_GPIO4 E_FIQEXPH_GPIO5 E_FIQEXPH_GPIO6 E_FIQEXPH_GPIO7 E_INT_FIQ_DISP_TGEN2 E_IRQ_FIQ_NONE E_INT_FIQ_EXTIMER0 E_INT_FIQ_EXTIMER1 E_INT_FIQ_SATA_PHY E_FIQEXPH_PWM_FP_I E_IRQ_GOP /home/bob.fu/PERFORCE/THEALE/utopia_develop/UTPA-14.5.1_utopia2/build E_FIQEXPH_PWM_FP_R E_INT_FIQ_VDMCU2HK E_INT_FIQ_0x70_START E_INT_IRQ_MIIC_DMA_INT0 E_INT_IRQ_MIIC_DMA_INT1 E_INT_IRQ_MIIC_DMA_INT2 E_INT_IRQ_MIIC_DMA_INT3 E_INT_IRQ_CA_I3 E_FIQ_CMDQ E_INT_FIQ_GPIO0 E_INT_FIQ_GPIO1 E_INT_FIQ_GPIO2 E_INT_FIQ_GPIO3 E_INT_FIQ_GPIO4 E_INT_FIQ_GPIO5 _IO_marker E_INT_FIQ_GPIO7 E_INT_FIQ_GPIO8 E_INT_FIQ_GPIO9 E_FIQ_MB_DSP2TOMCU0 E_IRQ_SCM E_IRQEXPH_CEC E_FIQEXPH_SECURER2_TO_ARM E_IRQ_GPD E_INT_IRQEXPH_CEC1 E_INT_FIQ_PWM_RP_FP_L E_IRQEXPH_DVI_HDMI_HDCP E_IRQEXPH_URDMA2MCU E_INT_FIQ_PWM_RP_FP_R E_INT_FIQ_XIU_TIMEOUT E_IRQEXPL_MIU_SECURITY E_INT_IRQ_SVD_HVD E_INT_FIQ_VE_VSYNC_IN E_INT_FIQ_MIPS_VPE1_TO_8051 /home/bob.fu/PERFORCE/THEALE/utopia_develop/UTPA-14.5.1_utopia2/build/../mxlib/hal/edison/halCHIP.c E_IRQ_ADCDVI2RIU E_IRQEXPH_MIIC_INT1 E_IRQEXPL_UHC1 E_INT_FIQ_U3_DPHY E_INT_FIQ_IR E_INT_FIQ_PM_GPIO0 E_INT_FIQ_PM_GPIO1 E_INT_FIQ_PM_GPIO2 E_INT_FIQ_PM_GPIO3 E_INT_IRQ_PM pu32Dst E_INT_IRQ_PS E_INT_FIQ_MIPS_WDT E_FIQEXPH_PWM_RP_I E_INT_IRQ_UHC _IO_FILE E_FIQ_DMDMCU2HK E_INT_FIQEXPH_UHC30 E_FIQEXPH_PWM_RP_R E_IRQEXPH_MIIC_DMA_INT0 E_IRQEXPH_MIIC_DMA_INT1 E_IRQ_COMB E_INT_IRQ_VBI E_INT_FIQ_FIELD_VE4VBI CHIP_DebugIRQ E_IRQ_PMSLEEP E_INT_FIQ_TEMPERATURE_FLAG_RISE E_INT_FIQ_MIPS_VPE0_TO_MIPS_VPE1 unsigned char E_INT_FIQ_PWM_RP_RP_L E_INT_FIQ_AEON_TO_R2M E_INT_FIQ_PWM_RP_RP_R E_INT_FIQ_0xC0_START __FUNCTION__ E_INT_IRQ_MPIF E_IRQEXPL_END E_INT_IRQ_PWM_FP_L E_INT_FIQ_DMA_DONE E_INT_IRQ_JPD E_INT_IRQ_PWM_FP_R E_IRQEXPH_WADR_ERR E_FIQH_END bUsed E_FIQ_VIVALDI_PTS u32Val E_INT_IRQ_UART2 E_FIQEXPL_IR_IN E_INT_FIQEXPH_HDMITX_EDGE E_INT_FIQ_VE_DONE_TT _IO_lock_t E_INT_IRQ_MIIC_DMA0 E_INT_IRQ_MIIC_DMA1 E_INT_IRQ_MIIC_DMA2 E_IRQ_U3_DPHY E_INT_FIQ_MIPS_VPE0_TO_AEON eIrqDebugOpt E_IRQEXPH_MIIC_INT0 E_FIQ_BEON_TO_8051 _IO_read_ptr E_INT_FIQ_IR_INT_RC E_INT_IRQ_BDMA_CH0 E_INT_IRQ_BDMA_CH1 E_INT_IRQ_PWM_RP_R _pos stdin E_IRQL_END E_FIQEXPH_UHC1 E_FIQEXPH_UHC2 E_INT_FIQ_TEMPERATURE_FLAG_FALL E_IRQEXPL_JPD CHIP_InitISR E_FIQEXPL_GPIO0 E_FIQEXPL_GPIO1 E_FIQEXPL_GPIO2 E_INT_FIQ_INT E_INT_FIQ_8051_TO_AEON E_IRQ_AU_DMA _markers E_INT_IRQ_EMAC E_INT_IRQ_0xA0_END E_INT_FIQ_0x30_END E_INT_IRQ_SYNC_DET E_INT_FIQ_R2M_TO_8051 E_INT_FIQ_0xF0_START E_FIQ_WDT E_IRQ_DEBUG_DISABLE E_INT_IRQ_HDCP_X74 E_FIQ_VSYNC_VE4VBI E_INT_IRQ_HDMI_LEVEL E_INT_IRQ_AEON2HI E_IRQEXPL_USB1 E_IRQEXPL_USB2 E_INT_IRQ_ERROR_RESP E_IRQEXPL_UART1 E_IRQEXPL_UART2 E_INT_FIQ_UP_IRQ_EMM_ECM E_INT_IRQ_VE E_FIQEXPL_8051_TO_ARM E_INT_FIQ_TSP2AEON E_INT_IRQ_OTG E_INT_FIQ_FRC_R2_TO_MIPS interrupt_thread E_INT_INT_FIQ_0xD0_END E_INT_IRQ_0x40_END E_INT_IRQ_FRC_INT_FIQ2HST0 E_IRQ_UHC30 E_INT_FIQEXPL_HST0_TO_3 E_INT_FIQ_AU_SPDIF_TX_CS0 E_INT_FIQ_AU_SPDIF_TX_CS1 E_INT_FIQ_PVR2MI_INT0 E_INT_FIQ_PVR2MI_INT1 pthread_t E_FIQL_END _flags2 E_FIQEXPL_AU_DMA_BUF_INT E_INT_IRQ_0x00_START E_FIQEXPL_ARM_TO_8051 E_IRQ_EMAC _IO_read_base E_IRQEXPL_AEON2HI E_IRQEXPL_MIIC_INT2 E_IRQEXPL_PM_IRQ_OUT E_INT_IRQ_PMSLEEP E_INT_IRQ_EC_BRIDGE UTL_memset E_INT_FIQ_SE_DSP2UP _unused2 __quad_t E_INT_IRQ_0x90_END CHIP_InISRContext __size E_INT_IRQ_UP_IRQ_UART_CA E_INT_FIQ_VIVALDI_STR E_INT_FIQ_HDMI_NON_PCM bRet _old_offset E_INT_IRQ_UHC1 E_INT_IRQ_UHC2 E_INT_IRQ_UHC3 E_FIQ_DEC_DSP2UP E_INT_IRQ_0x90_START PollFd InterruptCb E_INT_IRQ_CEC E_FIQ_HDMI_NON_PCM E_INT_FIQ_DISP_TGEN3 E_IRQ_MIIC_DMA_INT3 bEnable long long int E_INT_IRQ_UART2MCU irq_desc E_INT_IRQ_ECC_DERR E_INT_IRQ_PWM_RP_L E_FIQEXPH_USB1 E_FIQEXPH_USB2 E_INT_FIQ_MIPS_VPE1_TO_MIPS_VPE0 E_INT_IRQ_U3_DPHY E_INT_FIQ_0x60_END E_IRQ_DC E_INT_FIQ_0x60_START _IO_write_end E_IRQEXPH_G3D2MCU E_INT_IRQ_0xB0_START MS_U8 E_INT_IRQ_MFE pThreadParam E_INT_IRQ_UHC30 E_IRQ_ACK E_INT_FIQ_DSPTOMCU_INT0 float pthread_attr_t E_INT_FIQ_UHC E_IRQ_MSPI0 E_INT_IRQ_FSP E_FIQEXPH_END _IO_buf_base E_IRQ_PCM E_INT_IRQ_USB E_IRQH_START E_INT_IRQ_MHL_CBUS_PM __pad1 __pad2 __pad3 __pad4 __pad5 E_IRQ_MVD _sbuf E_INT_IRQ_ADCDVI2RIU E_INT_FIQ_JPD E_IRQEXPL_MFE E_INT_IRQ_DEMOD E_FIQ_XIU_TIMEOUT E_INT_FIQ_BEON_TO_AEON E_INT_IRQ_TSP2HK sched_param E_INT_FIQ_0x30_START E_INT_IRQ_IIC0 E_INT_IRQ_IIC1 E_INT_IRQ_IIC2 _mode E_INT_IRQ_SBM E_IRQEXPH_START E_INT_IRQ_MIU_SECURITY E_INT_IRQ_MVD_CHECKSUM_FAIL E_INT_IRQ_SATA E_IRQEXPL_MIIC_DMA_INT2 E_IRQ_ENABLE E_INT_IRQ_GOP E_INT_IRQ_DISP E_INT_FIQ_DSP_MIU_PROT E_INT_IRQ_URDMA2MCU E_INT_IRQ_BT_DMA E_INT_FIQ_DMDMCU2HK PTHREAD_SCOPE_PROCESS E_INT_IRQ_MIU E_INT_IRQ_MIIC_INT0 E_INT_IRQ_MIIC_INT1 E_INT_IRQ_MIIC_INT2 E_INT_IRQ_MIIC_INT3 E_INT_FIQ_AU_DMA_BUF_INT E_INT_IRQ_SCM E_INT_FIQ_DVI_DET E_INT_IRQ_GPD E_IRQ_DEBUG_STATUS_FLOW E_INT_FIQ_0x20_START E_FIQ_DSP_MIU_PROT E_INT_IRQ_USB1 E_INT_IRQ_USB2 E_INT_IRQ_USB3 E_INT_IRQ_0x50_END E_FIQ_MB_AUR2TOMCU0 E_INT_FIQ_EMAC E_INT_IRQEXPL_TSO E_INT_IRQ_VP6 E_INT_IRQ_FRM_PM E_FIQ_EXTIMER0 E_FIQ_EXTIMER1 E_INT_IRQ_MSPI0 E_INT_IRQ_MSPI1 E_INT_IRQ_EXP_MLINK _bInHISR E_INT_IRQ_VIVALDI_DMA_INTR1 E_INT_IRQ_VIVALDI_DMA_INTR2 E_FIQ_VDMCU2HK GNU C 4.5.1 long long unsigned int E_INT_FIQ_FRM_PM E_IRQEXPL_UHC2 E_INT_IRQ_DDC2BI u8VectorIndex __off_t _bInLISR E_INT_IRQ_MIPS_WADR_ERR E_FIQ_MB_DSP2TOMCU1 E_IRQEXPL_MIU E_INT_IRQ_FRC_SC E_IRQ_MVD2MIPS E_INT_FIQ_0xE0_START E_IRQ_DISP E_INT_FIQ_0x20_END E_INT_FIQ_UP_IRQ_UART_CA E_IRQ_UHC MS_U16 E_INT_FIQ_DEC_DSP2UP E_INT_FIQ_LDM_DMA0 E_INT_FIQ_LDM_DMA1 E_INT_IRQ_NFIE E_IRQ_VBI E_INT_IRQ_FCIE2RIU _IO_backup_base _shortbuf E_INT_FIQEXPH_CMDQ E_INT_IRQ_TMDDRLINK E_IRQ_DISABLE E_FIQL_START __align __off64_t E_INT_IRQ_HDMITX E_IRQL_START E_INT_FIQ_VSYNC_VE4VBI E_INT_IRQ_WADR_ERR pu8Dst irqfd E_INT_FIQ_DEC_DSP2R2M E_INT_IRQ_DHC E_INT_FIQ_UHC1 E_INT_FIQ_UHC2 E_INT_IRQ_DIPW _IO_buf_end E_FIQEXPH_START E_INT_FIQ_DISP_TGEN0 E_INT_FIQ_DISP_TGEN1 MS_U32 E_INT_IRQ_DC E_INT_IRQ_DVI_HDMI_HDCP E_IRQEXPH_HDCP_IIC E_INT_FIQ_STRETCH E_IRQEXPL_START E_INT_IRQ_G3D2MCU E_INT_FIQ_0xC0_END E_INT_FIQ_0xE0_END E_INT_FIQ_R2TOMCU_INT1 CHIP_DisableIRQ short int E_INT_FIQ_8051_TO_MIPS_VPE0 E_INT_FIQ_8051_TO_MIPS_VPE1 pollfd E_INT_FIQ_WDT E_IRQ_NFIE E_INT_IRQ_0x80_END E_INT_FIQ_MIPS_VPE1_TO_AEON pIntCb E_INT_FIQ_DSPTOMCU_INT1 E_IRQEXPH_HDCP_X74 E_INT_IRQ_0x80_START _vtable_offset E_INT_FIQ_8051_TO_BEON E_INT_FIQ_AEON_TO_8051 E_INT_IRQ_EXT_GPIO0 E_INT_IRQ_EXT_GPIO1 E_INT_IRQ_EXT_GPIO2 E_INT_IRQ_EXT_GPIO3 E_INT_IRQ_EXT_GPIO4 E_INT_IRQ_EXT_GPIO5 E_INT_IRQ_EXT_GPIO6 E_INT_IRQ_EXT_GPIO7 E_INT_FIQ_VIVALDI_PTS E_INT_FIQ_PM_XIU_TIMEOUT E_INT_IRQ_ONIF E_IRQ_CIMAX2MCU E_FIQ_AFEC_VSYNC E_INT_IRQ_SDIO E_INT_IRQ_DISPI E_FIQEXPL_ARM_TO_SECURER2 E_FIQ_8051_TO_BEON E_INT_IRQ_0x10_END E_IRQEXPH_END E_IRQ_SMART u32Cnt E_FIQ_VIVALDI_STR HWIdx2IntEnum E_FIQ_VE_DONE_TT _IO_read_end E_INT_IRQ_MHL_CBUS_WAKEUP E_INT_IRQ_0xA0_START schp E_INT_IRQ_GE E_FIQEXPL_IR_INT_RC E_INT_FIQ_DMARD CHIP_DisableAllInterrupt E_INT_FIQ_USB E_INT_IRQ_MLINK _fileno MS_BOOL E_INT_FIQ_0xD0_START E_FIQ_IR E_IRQ_PS E_INT_IRQ_FIQ_NONE E_IRQ_TSP2HK E_FIQ_TSP2AEON E_INT_IRQ_GDMA short unsigned int stdout E_INT_IRQ_HDCP_IIC E_INT_IRQ_0x00_END E_FIQEXPL_END E_INT_IRQ_BDMA0 E_INT_IRQ_BDMA1 E_INT_FIQ_AFEC_VSYNC E_IRQH_END _IO_write_ptr E_INT_FIQ_INT_CCFL E_IRQ_FIQ_ALL E_INT_IRQ_BT_TAB ithr E_IRQEXPL_MSPI1 E_FIQ_BEON_TO_AEON E_INT_FIQ_BEON_TO_8051 E_INT_IRQ_0xB0_END E_INT_FIQ_MIPS_VPE0_TO_8051 E_INT_FIQ_HDMITX_IRQ_EDGE E_INT_FIQEXPL_HST2_TO_3 E_INT_IRQ_0x40_START E_INT_FIQ_USB1 E_INT_FIQ_USB2 E_IRQ_ERROR_RESP E_IRQEXPH_UART2MCU E_IRQ_UART0 E_INT_FIQ_0xF0_END E_INT_IRQ_DMA_WADR_ERR E_INT_FIQ_GPIO6 E_FIQEXPL_START E_INT_FIQ_R2M_TO_AEON IRQFIQNum E_INT_IRQ_INT E_INT_IRQ_AFEC_INT E_INT_IRQ_DCSUB E_INT_IRQ_RTC E_IRQ_MHL_CBUS_PM E_INT_FIQ_AEON_TO_BEON E_FIQ_8051_TO_AEON PTHREAD_SCOPE_SYSTEM MDrv_CMD_BDMA_GetInfo MDrv_CMD_BDMA_CRC32 HAL_BDMA_Is_Done MDrv_CMD_BDMA_MOBFSearch BDMA_MODULE_V2 HAL_BDMA_GetCmd0 HAL_BDMA_GetCmd1 HAL_BDMA_GetCmd2 E_BDMA_DEV_SEARCH E_BDMA_HALDEV_MIU0 E_BDMA_HALDEV_MIU1 HAL_BDMA_GetDevId E_BDMA_DW_2BYTE u32Base HAL_BDMA_SetLen HAL_BDMA_SetDstAddr MDrv_CMD_BDMA_WaitFlashDone E_BDMA_DW_MAX HAL_BDMA_Is_Queued eBDMAModuleVersion HAL_BDMA_SetSrcDev HAL_BDMA_GetDstAddr u32Cmd HAL_BDMA_Write2Byte E_BDMA_ACT_COPY_FLASH E_BDMA_DEV_1KSRAM_HK51 E_BDMA_DEV_DSP E_BDMA_CH0 BDMA_Act u8DevCfg E_BDMA_ACT_MEM_FILL HAL_BDMA_Read2Byte E_BDMA_CH_START E_BDMA_HALDEV_VDMCU _BDMA_Dev HAL_BDMA_Set_Addr_Dec u8Src BDMA_MODULE_V1 _HAL_BDMA_Is_Status_On MDrv_CMD_BDMA_GetStatus HAL_BDMA_ReadByte HAL_BDMA_Set_CRC_Reflect HAL_BDMA_GetIOMapBase HAL_BDMA_WriteByte E_BDMA_DEV_TSP E_BDMA_ACT_SEARCH HAL_BDMA_SetSrcAddr MDrv_CMD_BDMA_Search _Hal_BDMA_Ch HAL_BDMA_Read4Byte _HAL_BDMA_Get_RegAddr HAL_BDMA_Is_Busy E_BDMA_DW_4BYTE E_BDMA_HALDEV_NOT_SUPPORT u32Reg HAL_BDMA_SetDmyWrCnt E_BDMA_DEV_NOT_SUPPORT E_BDMA_CH_END HAL_DMA_Is_FlashReady E_BDMA_HALDEV_CRC32 E_BDMA_DEV_MEM_FILL E_BDMA_ACT_CRC32 MDrv_CMD_BDMA_FlashCopy2Dram /home/bob.fu/PERFORCE/THEALE/utopia_develop/UTPA-14.5.1_utopia2/build/../mxlib/hal/edison/bdma/halBDMA.c eBdmaIoctlOpt HAL_BDMA_Write4Byte HAL_BDMA_GetDevDw E_BDMA_DEV_DMDMCU HAL_BDMA_GetLen E_BDMA_DEV_VDMCU u8Status u16Val E_BDMA_DW_1BYTE _gMIO_MapBase E_BDMA_HALDEV_SEARCH HAL_BDMA_SetCmd0 HAL_BDMA_SetCmd1 HAL_BDMA_SetCmd2 u32Len MDrv_CMD_BDMA_MemCopy u8Val MDrv_CMD_BDMA_GetMinSize HAL_BDMA_Dump_AllReg HAL_BDMA_Stop E_BDMA_DW_16BYTE eDev MDrv_CMD_BDMA_Pattern_Fill u32SrcAddr HAL_BDMA_SetDstDev E_BDMA_HALDEV_FLASH HAL_BDMA_GetSrcAddr E_BDMA_DEV_MIU0 E_BDMA_DEV_CRC32 start_addr bReflect HAL_BDMA_Enable_INT u8Cnt HAL_BDMA_SetSPIOffsetForMCU MDrv_CMD_BDMA_GetLibVer u8Mask _Hal_BDMA_ACT end_addr HAL_BDMA_GetCRC32 u32temCnt E_BDMA_DEV_FLASH u32RegAddr E_BDMA_HALDEV_DMDMCU HAL_BDMA_SetIOMapBase _BDMA_Dw E_BDMA_ACT_COPY_MEM E_BDMA_HALDEV_DSP HAL_BDMA_Is_Found E_BDMA_DEV_MIU1 MDrv_CMD_BDMA_SetDbgLevel eAct bDec HAL_BDMA_Is_Int HAL_BDMA_TrigOn E_BDMA_HALDEV_MEM_FILL MDrv_CMD_BDMA_SetSPIOffsetForMCU E_BDMA_CH1 HAL_BDMA_MOBF E_BDMA_DW_8BYTE E_BDMA_ACT_MAX u32EndAddr E_BDMA_HALDEV_TSP HAL_BDMA_WriteRegBit _BDMA_HalDev HAL_BDMA_GetMatched HAL_BDMA_Clear_Status u8SemID pu16ResId HAL_SEM_Reset_Resource HAL_SEM_Free_Resource HAL_SEM_Get_Num /home/bob.fu/PERFORCE/THEALE/utopia_develop/UTPA-14.5.1_utopia2/build/../mxlib/hal/edison/sem/halSEM.c _u32RegBase HAL_SEM_Get_Resource HAL_SEM_Get_ResourceID HAL_SEM_SetBank HAL_MMIO_GetType _u32NonPM_Bank_SIZE u16BankType /home/bob.fu/PERFORCE/THEALE/utopia_develop/UTPA-14.5.1_utopia2/build/../mxlib/hal/edison/mmio/halMMIO.c u32_ge0_mmio_base HAL_MMIO_FlushMemory u32Module HAL_MMIO_ReadMemory HAL_MMIO_GetIPBase u32BankType _u32PM_Bank_SIZE pu32BaseSize _u32NonPM_Bank HAL_MMIO_GetBase pu32BaseAddr /home/bob.fu/PERFORCE/THEALE/utopia_develop/UTPA-14.5.1_utopia2/build/../mxlib/hal/edison/mbx/halMBX.c _u16MbxGroupIdMBXHAL pMbxMsg E_MBX_ERR_INVALID_CPU_ID E_MBX_ERR_SLOT_BUSY E_MBX_ERR_NO_MORE_MSG E_MBX_ERR_NO_MORE_MEMORY MBX_MSG_Type E_MBX_ERR_NOT_IMPLEMENTED MHAL_MBX_Recv MHAL_MBX_SetConfig E_MBX_SUCCESS E_MBX_ERR_PEER_CPU_NOTREADY E_MBX_ERR_NOT_INITIALIZED MS_S32 eRecvSatus E_MBXHAL_FIRE_DISABLED eHostRole u8Ctrl u8Index MBX_Msg MHAL_MBX_Init E_MBX_ERR_MSG_ALREADY_FETCHED E_MBXHAL_FIRE_SUCCESS _u32RIUBaseAddrMBX u8Parameters eTargetRole _MHAL_MBX_FireMsg eSrcRole u8ParameterCount E_MBX_ERR_PEER_CPU_NOT_ALIVE E_MBX_ERR_PEER_CPU_OVERFLOW eMsgType E_MBXHAL_RECV_OVERFLOW bIPState MBXHAL_Fire_Status _MHAL_MBX_RecvMsg E_MBX_ERR_PEER_CPU_BUSY eDstRole MHAL_MBX_SetInformation E_MBX_UNKNOW_ERROR u8Size pFireStatus u8MsgClass MHAL_MBX_GetFireStatus MHAL_MBX_RecvEnd E_MBX_ROLE_HK E_MBXHAL_FIRE_ONGOING E_MBX_ROLE_PM E_MBX_ERR_INVALID_PARAM E_MBX_ERR_HAS_MSG_PENDING pU8Info MHAL_MBX_Fire s32Idx MBXHAL_Recv_Status E_MBX_ROLE_MAX E_MBXHAL_FIRE_OVERFLOW u8S0 u8S1 E_MBXHAL_RECV_DISABLED MBX_ROLE_ID eRoleID E_MBXHAL_RECV_SUCCESS E_MBX_MSG_TYPE_NORMAL s32MailIdx E_MBX_MSG_TYPE_INSTANT MBX_Result E_MBX_ERR_SLOT_NOT_OPENNED E_MBX_ROLE_CP MHAL_MBX_GetInformation E_MBX_ERR_SLOT_AREADY_OPENNED E_MBX_ERR_TIME_OUT E_MBX_CPU_R2M MHAL_MBXINT_DeInit _pMBXMsgRecvCbFunc MHAL_MBXINT_ResetHostCPU ePrevCPU eHKCPU pMBXRecvMsgCBFunc MBX_MSGRECV_CB_FUNC MHAL_MBXINT_CpuInit eHostCPU _MHAL_MBXINT_SetHostCPU _u32RIUBaseAddrMBXINT E_MBX_CPU_PM MHAL_MBXINT_Fire _MHAL_MBXINT_INTHandler E_MBX_CPU_MAX dstCPUID srcCPUID eHostCPUID E_MBX_CPU_MIPS MHAL_MBXINT_Init E_MBX_CPU_AEON E_MBX_CPU_MIPS_VPE0 E_MBX_CPU_MIPS_VPE1 eConfigCpu MBX_CPU_ID /home/bob.fu/PERFORCE/THEALE/utopia_develop/UTPA-14.5.1_utopia2/build/../mxlib/hal/edison/mbx/halMBXINT.c refcnt E_UART_TSP _gUART1_Status E_UART_HK51_UART0 E_UART_HK51_UART1 E_UART_PORT3 request device_t UART_PAD_TYPE HAL_UART0_PIU_Isr_HalReg uart_dev_struct _HAL_REG_ReadByte HAL_UART_PIU_Set_Baudrate E_UART_PAD_4_0 E_UART_PAD_4_1 E_UART_PAD_4_2 E_UART_PAD_4_3 HAL_UART_SetIOMapBase HAL_UART_PIU_Close E_UART_VD51_UART0 HAL_UART_PIU_Open _HAL_REG_PM_WriteByte ioctl HAL_UART0_PIU_Isr rx_buf_len tx_flags E_UART_AEON_R2 E_UART_VDEC rx_cb E_UART_PORT_INVALID HAL_UART_Connect E_UART_PIU_UART0 E_UART_PIU_UART1 E_UART_PIU_UART2 E_UART_PORT0 E_UART_PORT1 E_UART_PORT2 E_UART_PORT4 uart_port HAL_UART_Invert tx_buf_in rx_buf_out _HAL_REG_WriteByte HAL_UART_PIU_Read HAL_UART_PIU_Ioctl _gUART0_Status HAL_UART_PIU_Set_Rx_Callback HAL_UART_SetPMRxEnable devio regbase HAL_UART1_PIU_Isr E_UART_AEON HAL_UART_PIU_Poll E_UART_DMD51_UART1 _HAL_REG_WriteByteMask u32Data E_UART_PAD_2_2 try_again UART_DEVICE_TYPE pHalReg _uart_dev _gMIO_PM_MapBase HAL_UART_Get_Connection E_UART_PAD_1_0 E_UART_PAD_1_1 E_UART_PAD_1_2 E_UART_PAD_1_3 tx_buf_len u32PMBase _HAL_UART_PIU_Isr rx_buf E_UART_OFF UART_PORT_TYPE rx_flags E_UART_VD51_UART1 ms_uart_rx_callback E_UART_INVALID /home/bob.fu/PERFORCE/THEALE/utopia_develop/UTPA-14.5.1_utopia2/build/../mxlib/hal/edison/uart/halUART.c E_UART_DMD51_UART0 tx_buf_out divisor ms_uart_rx_callback_halreg uarttype HAL_UART_PIU_Set_Rx_Callback_HalReg device _HAL_REG_PM_WriteByteMask E_UART_PAD_2_0 E_UART_PAD_2_1 E_UART_PAD_2_3 _HAL_REG_PM_ReadByte nr_xmit E_EVT_SHUTDOWN E_UART_AEON_AUDIO_R2 E_UART_PIU_FUART0 uart_pad E_UART_SECURE_R2 tx_buf HAL_UART_SetPadMux HAL_UART_GetIOMapBase HAL_UART1_PIU_Isr_HalReg ms_uart_dev_t rx_buf_in nr_recv HAL_UART_PIU_Write E_UART_PAD_3_0 E_UART_PAD_3_1 E_UART_PAD_3_2 eDEVEVT magic u8Value bInv _HAL_UART_PIU_Isr_HalReg E_EVT_SUSPEND types E_UART_PAD_3_3 u16Addr HAL_SYS_DMD_VD_MBX_ATSC_WriteByte u8CheckFlag _hal_DMD_VD_MBX HAL_SYS_DMD_VD_MBX_GetType HAL_SYS_DMD_VD_MBX_DVB_ReadDspReg HAL_SYS_DMD_VD_MBX_Init HAL_SYS_DMD_VD_MBX_ATV_WriteByte u32NonPMBank u32StartTime HAL_SYS_DMD_VD_MBX_DVB_DBG_WriteReg bBaseAddrInitialized HAL_SYS_DMD_VD_MBX_ATV_WaitReady HAL_SYS_DMD_VD_MBX_DVB_DBG_ReadReg u32DMD_VD_MBX_BaseAddr u32NonPMBankSize HAL_SYS_DMD_VD_MBX_DVB_WriteByte HAL_SYS_DMD_VD_MBX_SetType /home/bob.fu/PERFORCE/THEALE/utopia_develop/UTPA-14.5.1_utopia2/build/../mxlib/hal/edison/sys/halDMD_VD_MBX.c u8CheckCount u8DMD_VD_MBX_Type HAL_SYS_DMD_VD_MBX_DVB_WaitHandShake HAL_SYS_DMD_VD_MBX_DVB_WaitReady HAL_SYS_DMD_VD_MBX_ATSC_ReadByte HAL_SYS_DMD_VD_MBX_DVB_ReadByte u8Data HAL_SYS_DMD_VD_MBX_ATV_ReadByte HAL_SYS_DMD_VD_MBX_DVB_WriteDspReg hal_DMD_VD_MBX_t bDmdAccessPreEnabled E_PARALLEL_IN E_SYS_QUERY_TTXNICAM_SUPPORTED E_SYS_ATV_AGC_PAD_SET wReadRegisterData E_SYS_QUERY_GINGA_JAVA_SUPPORTED eAgcPadMux u32baseaddr E_SYS_QUERY_MM_SUPPORTED MIU1BusBase HAL_SYS_SetTSOutClockPhase E_SYS_QUERY sysInfo SYS_VIF_WriteByteMaskByVDMbox SYS_PAD_SEL E_PARALLEL_IN_2nd_PORT ePCMCDMode SYS_VIF_WriteRegBitByVDMbox E_TS2_PAD_SET SYS_PCM_CD_MODE SYS_VIF_Read2ByteByVDMbox SYS_VIF_ReadByteByVDMbox E_SYS_QUERY_TCON_SUPPORTED E_SYS_DTV_AGC_PAD_SET_ALL_OFF HAL_SYS_EnableDebugPort E_SYS_QUERY_DTVCC_SUPPORTED E_SYS_QUERY_H264_SUPPORTED E_SYS_QUERY_DVBC_SUPPORTED SWLib E_PCM_CD_MAX HAL_SYS_Write2Byte E_TS1_PAD_SET E_TS3_PAD_SET XIU_TimeOutINTHandler ePadMuxType E_SYS_QUERY_MHL_SUPPORTED SYS_PAD_MUX_SET E_PCM_CD_SINGLE E_SERIAL_IN DeviceId ePadSel SYS_AGC_PAD_SET HAL_SYS_EfuseRead2Byte E_SYS_QUERY_DVBT_SUPPORTED E_PAD_SET_MAX HAL_SYS_DisableDebugPort HAL_SYS_RFAGC_Tristate HAL_SYS_SetPCMCardDetectMode HAL_SYS_IFAGC_Tristate E_SYS_QUERY_GINGA_NCL_SUPPORTED /home/bob.fu/PERFORCE/THEALE/utopia_develop/UTPA-14.5.1_utopia2/build/../mxlib/hal/edison/sys/halSYS.c E_PARALLEL_OUT Date HAL_SYS_Query SYS_VIF_WriteByteByVDMbox u32hal_sys_baseaddr HAL_SYS_SetAGCPadMux E_SYS_QUERY_DTV_SUPPORTED E_TS0_PAD_SET _gMIO_efuse_MapBase HAL_SYS_SetPadMux E_PCM_CD_OR E_SYS_DTV_AGC_PAD_SET E_SYS_QUERY_ISDBT_SUPPORTED E_SYS_QUERT_HD_SUPPORTED HAL_SYS_SetEfuseIOMapBase HAL_SYS_Read2Byte E_PAD_SEL_MAX HAL_MIU_Mask_Req_DNRB_R HAL_MIU_Mask_Req_DNRB_W MIU_CLIENT_DMA2_RW u8Group MIU_CLIENT_STRLD_RW HAL_MIU_ReadByte MIU_CLIENT_USB20_RW MIU_CLIENT_MIPS_RW MIU_CLIENT_JPD720P_RW MIU_CLIENT_MFE1_R MIU_CLIENT_SATA_RW u32Loading sVal HAL_MIU_SelMIU MIU_CLIENT_PVR_W MIU_CLIENT_GOP2_R MIU_CLIENT_FDSEICH_R MIU_CLIENT_MAXID MIU_CLIENT_FRC_OD_W u8Miu MIU_PortectInfo MIU_CLIENT_TSP_ORZ_R MIU_CLIENT_DSCRMB_RW MIU_CLIENT_TSP_ORZ_W MIU_CLIENT_SC_LOCALDIMING_RW MIU_CLIENT_BT_RW HAL_MIU_Mask_Req_DNRB_RW HAL_MIU_Dram_Size MIU_CLIENT_SC_TNR_R MIU_CLIENT_SC_TNR_W MIU_CLIENT_G3D0_RW u8Temp MIU_CLIENT_VD_R2D_RW u16Fmodulation MIU_CLIENT_MHEG5_DCACHE_RW MIU_CLIENT_MIIC0_RW MIU_CLIENT_MVOP1_R /home/bob.fu/PERFORCE/THEALE/utopia_develop/UTPA-14.5.1_utopia2/build/../mxlib/hal/edison/miu/halMIU.c HAL_MIU_VOP_SwitchMIU MIU_CLIENT_BDMA_RW MIU_CLIENT_MVOP_64BIT_R MIU_CLIENT_DEMOD_ADCDMA_W MIU_CLIENT_TSP_JPD_RW u8ClientNumber miu0 miu1 DramSize HAL_MIU_WriteByte HAL_MIU_ClinetNumber E_MIU_DDR_256MB E_MIU_DDR_512MB HAL_MIU_Read2Byte HAL_MIU_SetIOMapBase MIU_CLIENT_VD_TTX_RW MIU_CLIENT_SC_IPMAIN_R u8Block MIU_CLIENT_SC_IPMAIN_W MIU_CLIENT_HVD_RW MIU_CLIENT_FDDECICH_R E_MIU_BLOCK_0 MIU_CLIENT_GOP_W pu8ProtectId MIU_ID HAL_MIU_SetPMIOMapBase u8ID eMIUClientID uDDR_MHz E_MIU_DDR_64MB MIU_CLIENT_MHEG5_ICACHE_RW MIU_CLIENT_DEMOD_R MIU_CLIENT_MIIC_DMA_RW MIU_CLIENT_DEMOD_W MIU_CLIENT_SC_OPMAIN_RW MIU_CLIENT_MHEG5_GDMA_RW HAL_MIU_SetProtectID MIU_CLIENT_SC_IPSUB2_R MIU_CLIENT_NAND_RW MIU_CLIENT_SC_2D3D_RW HAL_MIU_SetGroupID MIU_CLIENT_VIVALDI9_MAD_RW MIU_CLIENT_SECURE_R2_RW MIU_CLIENT_SC_DNR_R MIU_CLIENT_SC_DNR_W MIU_CLIENT_TSP_SEC_W bSetFlag MIU_CLIENT_GOP3_R HAL_MIU_Mask_Req_OPM_R u8isIDNoUse u32End u16Data HAL_MIU_Mask_Req_SC_RW MIU_CLIENT_T3D_RW HAL_MIU_Write4Byte u8MiuID MIU_CLIENT_MVD_BBU_RW MIU_CLIENT_PM51_RW MIU_CLIENT_MSP_ICACHE_RW HAL_MIU_SetLoadingRequest MIU_CLIENT_RVD_RW MIU_CLIENT_SC1_OP_R MIU_CLIENT_SC_IPSUB2_W uRegBase u16DDFSpan MIU_CLIENT_FRC_R2_RW u32RegAddrIDenable MS_S16 MIU_CLIENT_HVD_BBU_R MIU_CLIENT_DISP_IPATH_NR_RW MIU_CLIENT_DISP_IPATH_DI_RW MIU_CLIENT_ADCDVIPLL_W MIU_CLIENT_FCIE_RW MIU_CLIENT_VIVALDI9_DMA_RW HAL_MIU_GET_MUX u8MiuSel MIU_CLIENT_VIVALDI9_AUDMA_RW HAL_MIU_SetHPriorityMask HAL_MIU_GetAutoPhaseResult MIU_CLIENT_SC_OP_R MIU_CLIENT_SC_OP_W MIU_CLIENT_FRC_OD_R MIU_CLIENT_USB_UHC0_RW u84th uDDFSET HAL_MIU_ProtectAlign u32Address MIU_CLIENT_VE_R MIU_CLIENT_USB_UHC2_RW MIU_CLIENT_VE_W MIU_CLIENT_VD_R2I_R u32RegAddrStar MIU_CLIENT_MVOP_128BIT_R MIU_CLIENT_TSO_RW MIU_SELTYPE_MIU0 MIU_CLIENT_NJPD_RW MIU_CLIENT_MVOP_SUB_R HAL_MIU_Write2BytesBit MIU_CLIENT_VD_TTXSL_W MIU_CLIENT_DVBC_ADC_RW MIU_CLIENT_FRC_IP_R loaddr MIU_CLIENT_FRC_IP_W MIU_SELTYPE_MIU_ALL MIU_CLIENT_GOP4_R MIU_CLIENT_MIIC2_W MIU_CLIENT_VIF_ADC_W MIU_CLIENT_SC_LD_RW u8MiuDev MIU_CLIENT_DUMMY MIU_CLIENT_GPD_RW MIU_CLIENT_DISP_IPATH_MR_RW MIU_CLIENT_VIVALDI9_DECODER_R MIU_CLIENT_PVR2_W MIU_CLIENT_MAU1_RW E_MIU_DDR_128MB HAL_MIU_SetGroupPriority u16Input_DIV_Second HAL_MIU_GetDefaultClientID_KernelProtect MIU_CLIENT_TSP_R u32MiuProtectEn MIU_CLIENT_TSP_W u32index0 u32index1 MIU_CLIENT_VIVALDI9_SE_R u32RegOffset u16Data1 HAL_MIU_PM_ReadByte MIU_CLIENT_HISPEED_UART_RW MIU_CLIENT_SC_IPM2_R MIU_CLIENT_R2M_R MIU_CLIENT_R2M_W E_MIU_DDR_1024MB HAL_MIU_IsScrambleEnabled MIU_CLIENT_AESDMA_RW u8isfound0 u8isfound1 HAL_MIU_ParseOccupiedResource MIU_CLIENT_AU_R2_RW uDDFStep E_MIU_BLOCK_NUM MIU_CLIENT_DNRA_RW bHit MIU_CLIENT_SC1_IPMAIN_RW MIU_CLIENT_VIVALDI_DSC_R MIU_CLIENT_VE_2DMCDI_RW MIU_CLIENT_LDM_W eMIU_SelType HAL_MIU_Mask_Req_MVOP_R HAL_MIU_Write2Byte u16Loop_DIV_Second MIU_CLIENT_SC_IPSUB_R MIU_CLIENT_G3D1_RW MIU_CLIENT_SC_IPSUB_W HAL_MIU_GetLoadingRequest hiaddr HAL_MIU_ResetGroupID HAL_MIU_IsInitMiu1 HAL_MIU_MaskReq sPriority MIU_CLIENT_MIIC1_RW clientId_KernelProtect _gPM_MapBase u32Miu0 u32Miu1 MIU_CLIENT_XD2MIU_RW fail HAL_MIU_Mask_Req_MVD_RW MIU_CLIENT_EMAC_RW MIU_CLIENT_GOP0_R u83rd MIU_CLIENT_OD_R u16Input_DIV_First MIU_CLIENT_JPD_RW MIU_CLIENT_OD_W bMask MIU_CLIENT_GOP5_R MIU_CLIENT_TSP_ORZ_RW MIU_CLIENT_RASP0_W MIU_CLIENT_SECEMAC_RW HAL_MIU_UnMaskReq HAL_MIU_SetSsc u8Blockx HAL_MIU_GetProtectInfo MIU_CLIENT_MAU0_W MIU_CLIENT_TSP_PVR0_W u32RegAddrMSB HAL_MIU_GetClientInfo MIU_CLIENT_M4VE0_RW MIU_CLIENT_GE_RW sIDVal E_MIU_DDR_32MB HAL_MIU_IsI64Mode MIU_CLIENT_FRC_OPM_R MIU_CLIENT_M4VE2_RW MIU_CLIENT_VIVALDI9_LNKLST_R MIU_CLIENT_MAU_RW MIU_SELTYPE_MIU1 IDEnables MIU_CLIENT_GMAC_RW u81st MIU_CLIENT_FRC_SC_RW u32RegAddrID HAL_MIU_WriteRegBit eClientID HAL_MIU_Protect HAL_MIU_EnableScramble MIU_CLIENT_TSP_PVR1_W E_MIU_BLOCK_1 E_MIU_BLOCK_2 E_MIU_BLOCK_3 u82nd HAL_MIU_Mask_Req_MVD_R u16idenable HAL_MIU_Mask_Req_MVD_W u16Mask MIU_GroupPriority MIU_CLIENT_NONE MIU_CLIENT_OD_LSB_R MIU_CLIENT_OD_LSB_W u32index MIU_CLIENT_MPIF_RW E_MIU_NUM MIU_CLIENT_MFE0_W MIU_CLIENT_CMD_QUEUE_RW MIU_CLIENT_OPM_R u16FDeviation MIU_CLIENT_RVD_BBU_R MIU_CLIENT_DISP_IPATH_DI_W HAL_MIU_Read4Byte MIU_CLIENT_GOP1_R MIU_CLIENT_OPW_W MIU_CLIENT_SC_OPM_R u32Start MIU_CLIENT_RASP1_W MIU_CLIENT_SC_IPSUB_RW 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UtopiaInstanceGetModuleVersion pAvailResource u32ShmID bInitialized HOOK_MODULE_IOCTL_BY_MODULE pUtopiaModule DUMP_INSTANT_STRUCTURE UTOPIA_POOL_ID_DATA SHOW_RESOURCE_STATUS_BY_MODULE eUtopiaModuleIoctlOpt DUMP_MODULE_STRUCTURE eUtopiaPoolID DUMP2MEMORY_MODULE_STRUCTURE DUMP2MEMORY_MODULE_HW_REGISTER _UtopiaModule_Ioctl HOOK_MODULE_CMD_BY_MODULE DUMP_MODULE_HW_REGISTER /home/bob.fu/PERFORCE/THEALE/utopia_develop/UTPA-14.5.1_utopia2/build/../mxlib/utopia_core/linux/utopia_module.c pu32Args DUMP2MEMORY_INSTANT_STRUCTURE CHANGE_DEBUG_LEVEL_BY_MODULE BDMA_POOL_ID_BDMA0 u32FlashAddr IOCTL_BDMA_SETSPIOFFSETFORMCU pSearchParam u32CRC32 E_BDMA_DBGLV_NONE u32SearchAddr E_BDMA_DBGLV_INFO _BDMA_GETLIBVER_PARAM bEnMemFill E_BDMA_DSTDEV_TSP PBDMA_PATTERN_FILL_PARAM PBDMA_MOBFSEARCH_PARAM u32Poly _BDMA_GETSTATUS_PARAM E_BDMA_DBGLV_PERFORMANCE pPattFillParam u32IOMap fpBDMAMOBFSearch BDMAClose _BDMA_MOBF_PS pGetLibVerParam E_BDMA_NOT_SUPPORT fpBDMAFlashCopy2Dram PBDMA_FLASHCOPY2DRAM_PARAM bIsInt _BDMA_DbgLv bEnDmyWrCnt _BDMA_PATTERN_FILL_PARAM IOCTL_BDMA_SETDBGLEVEL pMOBFSearchParam pSetDbgLevelParam eBdmaPoolID pMobfPsCfg pGetStatusParam E_BDMA_DBGLV_REG_DUMP E_BDMA_DSTDEV_MIU1 IOCTL_BDMA_GETINFO E_BDMA_DSTDEV_DMDMCU pMemCpyParam _BDMA_Info bEnDSP IOCTL_BDMA_GETSTATUS bEnFlsCpy fpBDMACRC32 bEnDMDMCU E_BDMA_DSTDEV_CRC32 pStatus u16ChipVer s32Mutex IOCTL_BDMA_CRC32 _BDMA_SEARCH_PARAM E_BDMA_DBGLV_ERR_ONLY u32DstAddr eDbgLv E_BDMA_FAIL _BDMA_SETDBGLEVEL_PARAM E_BDMA_SRCDEV_FLASH _BDMA_FLASHCOPY2DRAM_PARAM bEnHK51_1KSRAM IOCTL_BDMA_GETLIBVER E_BDMA_SRCDEV_NOT_SUPPORT E_BDMA_DSTDEV_HK51_1KSRAM _BDMA_DstDev _BDMA_Result PBDMA_GETLIBVER_PARAM bEnMIU1 E_BDMA_SRCDEV_MIU0 E_BDMA_SRCDEV_MIU1 PBDMA_SETDBGLEVEL_PARAM pCRC32Param eLevel bEnTSP fpBDMAWaitFlashDone u32MobfKey _BDMA_CRC32_PARAM fpBDMASetSPIOffsetForMCU PBDMA_GETSTATUS_PARAM fpBDMASetDbgLevel /home/bob.fu/PERFORCE/THEALE/utopia_develop/UTPA-14.5.1_utopia2/build/../mxlib/drv/bdma/bdma.c BDMAIoctl E_BDMA_DBGLV_ALL fpBDMAMemCpy fpBDMAGetInfo fpBDMAGetStatus _BDMA_ChStatus IOCTL_BDMA_MOBFSEARCH IOCTL_BDMA_FLASHCOPY2DRAM _BDMA_INSTANT_PRIVATE bEnHost bIsFound u32DramAddr E_BDMA_QUEUE_FULL IOCTL_BDMA_SEARCH PBDMA_SEARCH_PARAM PBDMA_MEMCOPY_PARAM u32Pattern u32MIU1Base pBdmaPri pAttribute fpBDMAGetMinSize _BDMA_HwInfo E_BDMA_SRCDEV_MEM_FILL _BDMA_MEMCOPY_PARAM sHwCap E_BDMA_DSTDEV_DSP E_BDMA_DSTDEV_MIU0 E_BDMA_BUSY _BDMA_Status IOCTL_BDMA_GETMINSIZE E_BDMA_TIMEOUT sChSta E_BDMA_OK BDMAOpen E_BDMA_DSTDEV_NOT_SUPPORT IOCTL_BDMA_MEMCPY bIsBusy bEnDevDw u8ChNum E_BDMA_DSTDEV_SEARCH u32Seed psBDMAInstPri _BDMA_SrcDev E_BDMA_DSTDEV_VDMCU fpBDMASearch fpBDMAGetGetLibVer PBDMA_CRC32_PARAM IOCTL_BDMA_PATTERN_FILL IOCTL_BDMA_WAITFLASHDONE pFlash2DramParam u32ExcluBit fpBDMAPatternFill _BDMA_MOBFSEARCH_PARAM E_BDMA_FLASH2DMDMCU E_BDMA_SDRAM12DMDMCU _BDMA_GetHwInfo _MDrv_BDMA_WaitFlashDone _BDMA_CpyType _BDMA_OP_CB MDrv_BDMA_SetDbgLevel u8DstDevCfg pInstantBdma u32CRCVal _MDrv_BDMA_FlashCopy2Dram pCRCParam _MDrv_BDMA_MOBFSearch E_BDMA_SDRAM12SDRAM1 _MDrv_BDMA_CheckUtopia20Open BDMA_ISR_CBF _BDMA_Is_Done_INT _drv_bdma_version E_BDMA_SDRAM12SRAM1K_HK51 u32Delay E_BDMA_FLASH2SDRAM MDrv_BDMA_GetLibVer u8SrcDev _BDMA_Get_FreeCh _MDrv_BDMA_CRC32 pvOpCB MDrv_BDMA_Stop_All MDrv_BDMA_Stop E_BDMA_SDRAM2TSP pCbf u8OpCfg _MDrv_BDMA_GetStatus E_BDMA_SDRAM2DMDMCU MDrv_BDMA_GetInfo pAttributeBdma psHwInfo eCpyType _MDrv_BDMA_MemCopy _BDMA_Is_Init E_BDMA_SDRAM2VDMCU _MDrv_BDMA_PatternFill eSrc E_BDMA_CPYTYPE_MAX eDst u8SrcDevCfg _BDMA_WaitDone _BDMA_MemFlush u8DmyWrCnt E_BDMA_SDRAM12DSP _MDrv_BDMA_SetSPIOffsetForMCU /home/bob.fu/PERFORCE/THEALE/utopia_develop/UTPA-14.5.1_utopia2/build/../mxlib/drv/bdma/drvBDMA.c _BDMA_CmnHnd MDrv_BDMA_GetMinSize eSrcDev eDstDev E_BDMA_FLASH2DSP _MDrv_BDMA_Search E_BDMA_SDRAM12VDMCU E_BDMA_FLASH2SRAMHK51 _BDMA_Check_MIUDev sOpCB _BDMA_GetDevCfg bU20BDMAOpened u32Cmd0 u32Cmd1 u32Cmd2 _gsInfo pu8Ch MDrv_BDMA_CopyHnd E_BDMA_SDRAM12TSP _gsHwInfo E_BDMA_FLASH2VDMCU E_BDMA_SDRAM2SDRAM1 MDrv_BDMA_DumpCB E_BDMA_SDRAM2DSP u8DstDev MDrv_BDMA_Exit E_BDMA_FLASH2SDRAM1 MDrv_BDMA_Init E_BDMA_FLASH2TSP E_BDMA_SDRAM12SDRAM u32DataSize _BDMA_Start E_BDMA_SDRAM2SRAM1K_HK51 eRet u32Miu1Base E_BDMA_SDRAM2SDRAM _BDMA_Check_Device MDrv_SEM_GetLibVer /home/bob.fu/PERFORCE/THEALE/utopia_develop/UTPA-14.5.1_utopia2/build/../mxlib/drv/sem/drvSEM.c _drv_sem_version MDrv_SEM_Get_Num MDrv_SEM_Reset_Resource MDrv_SEM_Get_Resource MDrv_SEM_Free_Resource MDrv_SEM_Init MDrv_SEM_Get_ResourceID MDrv_MMIO_Close _s32MIOMapFd _u32Flash_Bank0 _u32FRC_Bank_SIZE _drv_mmio_version _u32FRC_Bank _u32NSK_Bank _u32OTP_Bank u32Basesize u32Baseaddr bank_size MIOMap_Info_t /home/bob.fu/PERFORCE/THEALE/utopia_develop/UTPA-14.5.1_utopia2/build/../mxlib/drv/mmio/drvMMIO.c stMIOMapInfo _u32NSK_BankSize _u32SPRAM_Bank _u32SPRAM_BankSize MDrv_MMIO_GetBASE u16Type MDrv_MMIO_GetLibVer _u32Flash_Bank0_SIZE _u32OTP_BankSize bank_addr _u32PM_Bank MDrv_MMIO_Init E_MBX_CLASS_MHEG5_STATE si_status sa_sigaction pMsgQueueStatus sig_info MDrv_MBX_GetMsgQueueStatus E_MBX_CLASS_MPEG2 u32InstantMsgCount stGetMsgQStatus E_MBX_CLASS_SECURE_WAIT siginfo_t MS_MBX_CLEAR_MSG E_MBX_CLASS_FRC E_MBX_CLASS_SECURE_NOWAIT s32RecvMutexMBX MDrv_MBX_RemoveLatestMsg _timer E_MBX_CLASS_PM_WAIT E_MBX_CLASS_MVF E_MBX_CLASS_RMPLAYER_FS stSendMsg E_MBX_CLASS_SAR E_MBX_CLASS_IRKEY_NOWAIT notifier E_MBX_CLASS_JPEG_ENCODER MS_MBX_SET_BINFO _drv_mbx_version E_MBX_CLASS_JPEG E_MBX_CLASS_BMP sa_mask E_MBX_CLASS_PNG __sigset_t MBX_DrvStatus E_MBX_CLASS_TSPLAYER_FS E_MBX_CLASS_GE u32NormalMsgCount _u8DbgLevel E_MBX_CLASS_MPEG2_FS MDrv_MBX_GetStatus mbxResult E_MBX_CLASS_OBAMA_CMD _mbxQStatusNotifierMBX MBX_DrvInfo si_utime E_MBX_CLASS_PRINT_MESSAGE __sigaction_handler MDrv_MBX_DeInit __sighandler_t E_MBX_CLASS_PM_NOWAIT _s32FdMBX _mgrMBX E_MBX_CLASS_PM_PWM_WAIT siginfo E_MBX_CLASS_VDPLAYER_FS stInitInfo MDrv_MBX_SendMsgLoopback MDrv_MBX_SetInformation E_MBX_CLASS_MEMORY MS_MBX_RECV_MSG E_MBX_CLASS_AUTO_TEST si_tid si_errno MDrv_MBX_RegisterMSG bInfo stSetBInfo bForceDiscardPendingMsg stUnRegisterMsg u32TimeoutMillSecs pMsg si_addr E_MBX_CLASS_STILLIMAGE_DATA_IO_FAST E_MBX_CLASS_VIDEO MDrv_MBX_SetDbgLevel si_band bEnabled _kill stRegisterMsg E_MBX_CLASS_QUERY_CLASS sa_handler MDrv_MBX_GetLibVer E_MBX_CLASS_FCNTL bAddToQueue E_MBX_CLASS_SHWFS _MDrv_MBX_MsgArrived E_MBX_CLASS_NUM E_MBX_CLASS_TSPLAYER MDrv_MBX_RecvMsg pMbxDrvStatus E_MBX_CLASS_RMPLAYER _sifields E_MBX_CLASS_TEST MS_MBX_GET_MSGQSTATUS E_MBX_CLASS_SYSTEM E_MBX_CLASS_VDPLAYER MDrv_MBX_GetInformation _sigpoll MS_MBX_SEND_MSG __clock_t E_MBX_CLASS_DYNAMIC_ID E_MBX_CLASS_CIPLUS MS_MBX_CPROSYNC_INFORMATION msgClass E_MBX_CLASS_INPUT E_MBX_CLASS_PM_PWM_NOWAIT u32IntLockerMBX E_MBX_CLASS_SAR_NOWAIT stClearMsg MS_MBX_INIT_INFO MBX_Mgr u32WaitMillSecs E_MBX_CLASS_DUMMY_LOOP E_MBX_CLASS_NET_DEBUG E_MBX_CLASS_OBAMA_APP MDrv_MBX_Init pMbxDrvInfo s32RefCnt E_MBX_CLASS_DLNA stSetInfo E_MBX_CLASS_TSP MDrv_MBX_ClearMSG E_MBX_CLASS_STILLIMAGE_CMD_IO E_MBX_CLASS_LZSS si_uid MDrv_MBX_GetInfo u16MsgQueueSize MBX_MSGQ_Status E_MBX_CLASS_MAD __uid_t si_pid eMsgClass MBX_Class E_MBX_CLASS_MAX mbxMsg E_MBX_CLASS_STILLIMAGE_DATA_IO _sigchld stRecvMsg unused E_MBX_CLASS_CHAKRA_SUBSYS si_fd eSrcRoleId MDrv_MBX_SendMsg MS_MBX_GET_DRVSTATUS E_MBX_CLASS_MJPEG bForceDiscardMsgQueue si_sigval MDrv_MBX_CheckMsg E_MBX_CLASS_BTPD stGetDrvStatus s32SendMutexMBX eTargetClass MBX_MAIL_ARRIVE_NOTIFY_FUNC si_code MDrv_MBX_RegisterMSGWithCallBack E_MBX_CLASS_AUDIO E_MBX_CLASS_IRKEY si_signo u8HWMBXGroupNum E_MBX_CLASS_MPEG E_MBX_CLASS_CAPE MS_MBX_REGISTER_MSG sa_flags __val MDrv_MBX_Enable stGetInfo E_MBX_CLASS_CHANNEL E_MBX_CLASS_CC MDrv_MBX_UnRegisterMSG MS_MBX_UNREGISTER_MSG E_MBX_CLASS_CI si_stime _sigfault bInInterruptHandler /home/bob.fu/PERFORCE/THEALE/utopia_develop/UTPA-14.5.1_utopia2/build/../mxlib/drv/mbx/linux/drvMBX.c si_overrun sa_restorer E_MBX_CLASS_KTV enUartDeviceType piu_uart_io mdrv_uart_set_tx_buffer _uartInfo MDrv_UART_SetDbgLevel MDrv_UART_PutChar MDrv_UART_SetPMRxEnable mdrv_uart_poll mdrv_uart_open hUart kbhit mdrv_uart_set_rx_callback_halreg mdrv_uart_set_baudrate pu8Str mdrv_uart_get_connection mdrv_uart_rx_enable E_UART_DBGLV_NONE mdrv_uart_read mdrv_uart_set_rx_buffer _uartVersion mdrv_uart_set_rx_callback E_UART_FAIL getchar _hDefaultUart pu8Buf level MDrv_UART_Init putchar /home/bob.fu/PERFORCE/THEALE/utopia_develop/UTPA-14.5.1_utopia2/build/../mxlib/drv/uart/drvUART.c mdrv_uart_connect MDrv_UART_PutString E_UART_DBGLV_ALL E_UART_DBGLV_ERR_ONLY u32PMBaseSize UART_Result u32PMBaseAddr MDrv_UART_SetIOMapBase Caps mdrv_uart_tx_enable HwBusy mdrv_uart_rx_disable _UART_DbgLv mdrv_uart_close u16Ret MDrv_UART_GetLibVer _UART_DrvStatus mdrv_uart_write mdrv_uart_invert _uartDbgLevel mdrv_uart_tx_disable MDrv_UART_GetInfo MDrv_UART_GetFile mdrv_uart_connect_mux MDrv_UART_GetStatus _uartStatus _UART_DrvInfo MDrv_UART_SetRxMode E_UART_OK E_UART_DBGLV_INFO MDrv_UART_GetChar pfISRProc OS_UART_ISR_Disable P_UART_ISR_Proc /home/bob.fu/PERFORCE/THEALE/utopia_develop/UTPA-14.5.1_utopia2/build/../mxlib/drv/uart/uart_msos.c _os_UART_ISR_Proc u8UARTID _OS_UART_ISR0 _OS_UART_ISR1 _OS_UART_ISR2 OS_UART_Exit OS_UART_Init OS_UART_ISR_Enable MDrv_IRQ_Restore MDrv_IRQ_UnMaskAll /home/bob.fu/PERFORCE/THEALE/utopia_develop/UTPA-14.5.1_utopia2/build/../mxlib/drv/irq/drvIRQ.c MDrv_IRQ_Init E_IRQ_CPU2_2_CPU0 MDrv_IRQ_Mask MDrv_IRQ_UnMask MDrv_IRQ_Attach E_IRQ_CPU1_2_CPU0 _drv_drvirq_version E_IRQ_CPU0_2_CPU1 E_IRQ_CPU0_2_CPU2 MDrv_IRQ_InISR E_IRQ_CPU2_2_CPU1 MDrv_IRQ_MaskAll IRQ_CPU_TYPE u32Vector MDrv_IRQ_Detech E_IRQ_CPU1_2_CPU2 MDrv_IRQ_GetLibVer MDrv_IRQ_NotifyCpu MDrv_SYS_DMD_VD_MBX_WriteReg E_DMD_VD_MBX_TYPE_ATSC E_DMD_VD_MBX_TYPE_DVBC /home/bob.fu/PERFORCE/THEALE/utopia_develop/UTPA-14.5.1_utopia2/build/../mxlib/drv/sys/drvDMD_VD_MBX.c E_DMD_VD_MBX_TYPE_DVBT MDrv_SYS_DMD_VD_MBX_WriteDSPReg E_DMD_VD_MBX_TYPE_MAX MDrv_SYS_DMD_VD_MBX_Init MDrv_SYS_DMD_VD_MBX_SetType _s32_DMD_VD_MBX_Mutex MDrv_SYS_DMD_VD_MBX_DBG_WriteReg bResult MDrv_SYS_DMD_VD_MBX_ReadDSPReg E_DMD_VD_MBX_TYPE_ATV E_DMD_VD_MBX_TYPE_ISDBT MDrv_SYS_DMD_VD_MBX_DBG_ReadReg MDrv_SYS_DMD_VD_MBX_ReadReg MDrv_SYS_VIFWriteRegBitByVDMbox E_SYS_DBGLV_INFO _Revision E_SYS_DBGLV_ERR_ONLY MDrv_SYS_ResetChip /home/bob.fu/PERFORCE/THEALE/utopia_develop/UTPA-14.5.1_utopia2/build/../mxlib/drv/sys/drvSYS.c MDrv_SYS_DisableDebugPort MDrv_SYS_WDTSetTime u32size TINY_SYS_Reset MDrv_SYS_GetLibVer MDrv_SYS_VIFReadByteByVDMbox MDrv_SYS_SetTSOutClockPhase pSoftwareVersionInfo MDrv_SYS_Init E_SYS_DBGLV_REG_DUMP WDT_Active MDrv_SYS_SetPadMux _SYS_DbgLv MajorVersion MDrv_SYS_GetSoftwareVersion MDrv_SYS_GetChipID E_SYS_DBGLV_NONE MDrv_SYS_SetPCMCardDetectMode MDrv_SYS_VIFWriteByteMaskByVDMbox _sysVersion MDrv_SYS_GetStatus MDrv_SYS_VIFWriteByteByVDMbox ChangeList_DRV MDrv_SYS_GetChipRev ChangeList_HAL MinorVersion MDrv_SYS_WDTEnable _SYS_Status _gu8DbgLevel MDrv_SYS_Query MDrv_SYS_SetDbgLevel MDrv_SYS_WDTLastStatus MDrv_SYS_VIFRead2ByteByVDMbox _sysStatus ChangeList_API UtopiaBspVersion E_SYS_DBGLV_ALL MDrv_SYS_EnableDebugPort _MS_SW_VERSION_INFO MDrv_SYS_ResetCPU _Change MDrv_SYS_GetInfo MDrv_SYS_WDTClear MDrv_SYS_SetAGCPadMux MIU0_request_mask_count MDrv_MIU_EnableScramble MDrv_MIU_Mask_Req_AUDIO_RW MDrv_MIU_Mask_Req_MVD_R MDrv_MIU_Mask_Req_MVD_W u8Gp MDrv_MIU_SelMIU _drv_miu_version MDrv_MIU_Mask_Req_DNRB_R MDrv_MIU_Mask_Req_DNRB_W MDrv_MIU_GetBusWidth MDrv_MIU_SetSscValue MDrv_MIU_MaskReq MDrv_MIU_GetLoading MDrv_MIU_GetClientInfo MIU1_request_mask_count MDrv_MIU_ClinetNumber MDrv_MIU_Mask_Req_OPM_R MDrv_MIU_Mask_Req_SC_RW MDrv_MIU_SetGroupPriority MDrv_MIU_GetDefaultClientID_KernelProtect MDrv_MIU_IsSupportMIU1 MDrv_MIU_SetIOMapBase MDrv_MIU_GetProtectInfo MDrv_MIU_Mask_Req_DNRB_RW MDrv_MIU_IsScrambleEnabled MDrv_MIU_Init /home/bob.fu/PERFORCE/THEALE/utopia_develop/UTPA-14.5.1_utopia2/build/../mxlib/drv/miu/drvMIU.c MDrv_MIU_SwitchMIU MDrv_MIU_UnMaskReq MDrv_MIU_SetSsc MDrv_MIU_Mask_Req_MVOP_R MDrv_MIU_GetLibVer MIU_ClientInfo MDrv_MIU_Mask_Req_MVD_RW MDrv_MIU_Dram_Size MDrv_MIU_ProtectAlign MDrv_MIU_InitCounter MDrv_MIU_SetHPriorityMask u8BitPos MDrv_MIU_Protect u32MMIOBaseAdr
.symtab .strtab .shstrtab .hash .dynsym .dynstr .gnu.version .gnu.version_r .rel.dyn .rel.plt .init .text .fini .rodata .ARM.extab .ARM.exidx .init_array .fini_array .jcr .dynamic .got .data .bss .ARM.attributes .mmodule_version .comment .debug_aranges .debug_pubnames .debug_info .debug_abbrev .debug_line .debug_frame .debug_str .debug_loc .debug_pubtypes .debug_ranges
$a call_gmon_start $d crtstuff.c __JCR_LIST__ __do_global_dtors_aux completed.5846 __do_global_dtors_aux_fini_array_entry frame_dummy __frame_dummy_init_array_entry halCHIP.c interrupt_thread __FUNCTION__.5126 IntEnum2HWIdx HWIdx2IntEnum _HISR_Info halBDMA.c _HAL_BDMA_Is_Status_On _gMIO_MapBase CSWTCH.8 __FUNCTION__.3710 CSWTCH.11 halSEM.c _u32RegBase halMMIO.c halMBX.c _u32RIUBaseAddrMBX _u16MbxGroupIdMBXHAL halMBXINT.c _MHAL_MBXINT_SetHostCPU _MHAL_MBXINT_INTHandler _u32RIUBaseAddrMBXINT _pMBXMsgRecvCbFunc halUART.c _HAL_UART_PIU_Isr _gUART0_Status _gUART1_Status _gMIO_PM_MapBase halIRQ.c halDMD_VD_MBX.c MBX_SetType _hal_DMD_VD_MBX halSYS.c __FUNCTION__.3411 __FUNCTION__.3407 u32hal_sys_baseaddr sysInfo __FUNCTION__.3395 _gMIO_efuse_MapBase __FUNCTION__.3401 __FUNCTION__.3390 halMIU.c __FUNCTION__.3934 __FUNCTION__.3860 _gMIU_MapBase __FUNCTION__.3853 __FUNCTION__.3869 __FUNCTION__.3662 u32Miu1.3941 __FUNCTION__.3667 u32Miu0.3940 _gPM_MapBase __FUNCTION__.3679 __FUNCTION__.3672 asmCPU.c wait dlmalloc.c init_mparams ialloc malloc_global_mutex mparams drvMPool.c _s32MPoolFd MPOOL_MAPPING mpool_info _u32MPoolDBGLevel drvSysInfo.c _s32SysFd mem_priv.c MsOS_linux.c _MsOS_QueueMutexUnlock _MsOS_TimerNotify _MsOS_QueueMutexLock __FUNCTION__.6550 __FUNCTION__.6570 _MsOS_EventGroup_Info __FUNCTION__.6566 __FUNCTION__.6581 _drv_msos_version __FUNCTION__.6574 _MsOS_MemoryPool_Info __FUNCTION__.6530 _MsOS_Mutex_Info __FUNCTION__.6585 _ISR_Mutex _shm_id _MsOS_Semaphore_Info __FUNCTION__.6538 __FUNCTION__.6534 __PRETTY_FUNCTION__.6500 _MsOS_Task_Mutex _MsOS_Queue_Info _MsOS_Timer_Info __FUNCTION__.6560 __FUNCTION__.6475 __FUNCTION__.6522 _pu8ShareMem _MsOS_Semaphore_Mutex _MsOS_MemoryPool_Mutex __FUNCTION__.6542 __FUNCTION__.6526 _MsOS_Queue_Mutex __FUNCTION__.6210 __FUNCTION__.6489 _MsOS_Mutex_Mutex _MsOS_Task_Info __FUNCTION__.6556 _MsOS_EventGroup_Mutex __FUNCTION__.6546 _s32FdSYS _ShmHdr _MsOS_Timer_Mutex sbrk.c halMPool.c debug_util.c _MsOS_Dbg_PrintMenuBanner pDbgRoot __func__.3567 __func__.3517 utopia.c utopia_dapi.c next_resource shm_malloc __FUNCTION__.3691 utopia_module.c __FUNCTION__.2770 bdma.c drvBDMA.c _BDMA_Check_Device _BDMA_GetDevCfg _BDMA_WaitDone _BDMA_MemFlush _BDMA_CmnHnd _gsInfo _gsHwInfo _drv_bdma_version drvSEM.c _drv_sem_version __FUNCTION__.3172 drvMMIO.c _drv_mmio_version _s32MIOMapFd drvMBX.c _MDrv_MBX_MsgArrived _mbxQStatusNotifierMBX _s32FdMBX _u8DbgLevel _drv_mbx_version _mgrMBX drvUART.c _uartVersion _hDefaultUart __FUNCTION__.3858 _uartDbgLevel _uartStatus _uartInfo uart_msos.c _OS_UART_ISR2 _OS_UART_ISR1 _OS_UART_ISR0 _os_UART_ISR_Proc drvIRQ.c _drv_drvirq_version drvDMD_VD_MBX.c _s32_DMD_VD_MBX_Mutex drvSYS.c _sysVersion _gu8DbgLevel _sysStatus drvMIU.c _drv_miu_version .udivsi3_skip_div0_test shift .divsi3_skip_div0_test __JCR_END__ __udivsi3 __aeabi_idiv0 _GLOBAL_OFFSET_TABLE_ __aeabi_uidiv __aeabi_uidivmod __aeabi_ldiv0 __divsi3 __dso_handle __aeabi_idivmod __aeabi_idiv _DYNAMIC MsOS_InfoMemoryPool timer_settime sem_init HAL_BDMA_Read2Byte open@@GLIBC_2.4 MDrv_BDMA_Stop_All UtopiaModuleAddResourceEnd MsOS_CreateMutex sbrk UtopiaOpen CHIP_EnableIRQ pthread_mutex_trylock cyg_mempool_var_delete __aeabi_unwind_cpp_pr0 MDrv_MBX_UnRegisterMSG MDrv_MBX_ClearMSG sigemptyset@@GLIBC_2.4 UtopiaInstanceDelete HAL_UART_SetIOMapBase MDrv_MSOS_GetLibVer MsOS_DeleteTask op_up MsOS_DeleteMutex MDrv_MMIO_GetLibVer MDrv_SEM_Get_Resource mmap@@GLIBC_2.4 HAL_SYS_DMD_VD_MBX_DVB_WriteDspReg MsOS_MPool_PA2KSEG0 MDrv_BDMA_Init MsOS_RecvFromQueue MDrv_SYS_DMD_VD_MBX_ReadReg abort@@GLIBC_2.4 Cyg_Mempool_Implementation__insert_free_block HAL_SYS_SetEfuseIOMapBase _MsOS_LinuxTaskWrapper MAsm_CPU_TimerInit HAL_UART_PIU_Write HAL_MIU_GetClientInfo HAL_MIU_WriteRegBit AESDMARegisterToUtopia pthread_attr_getschedparam@@GLIBC_2.4 MHAL_MBX_Recv MsOS_ReallocateMemory HAL_BDMA_SetIOMapBase MAsm_CPU_GetTrailOne piu_uart_io MsOS_Dcache_Flush pthread_attr_setdetachstate@@GLIBC_2.4 HAL_SYS_DMD_VD_MBX_Init MDrv_SYS_WDTEnable HAL_MIU_Mask_Req_DNRB_RW clock_gettime MDrv_SYS_Init sysconf@@GLIBC_2.4 HAL_BDMA_GetCRC32 MDrv_SEM_Init MDrv_MIU_SetIOMapBase __libc_current_sigrtmin@@GLIBC_2.4 _u32OTP_Bank _UtopiaModule_Ioctl MAsm_CPU_TimerClean HAL_BDMA_GetIOMapBase MDrv_MIU_SetHPriorityMask HAL_SYS_DMD_VD_MBX_DVB_WriteByte HAL_UART1_PIU_Isr HAL_BDMA_SetLen HAL_MIU_WriteByte mstar_create_mspace _HAL_REG_PM_WriteByteMask mstar_mspace_independent_comalloc MsOS_CPU_LockInterrupt HAL_MMIO_GetType SYS_VIF_WriteByteByVDMbox MsOS_CPU_DetachExceptiont Cyg_Mempool_Implementation__get_status MsOS_StartTimer MDrv_SYS_SetPCMCardDetectMode MDrv_SYS_SetDbgLevel MsOS_FreeMemory UtopiaModuleSetupFunctionPtr MDrv_IRQ_UnMaskAll HAL_MIU_UnMaskReq privateNames HAL_SYS_DMD_VD_MBX_SetType HAL_MIU_ResetGroupID MHAL_MBX_GetInformation MsOS_Dbg_ParseCmd MDrv_MIU_IsSupportMIU1 Cyg_Mempool_Implementation__get_allocation_size MDrv_SYS_GetStatus MDrv_UART_SetDbgLevel MsOS_CreateTimer MsOS_AllocateMemory _Revision _HAL_REG_PM_ReadByte pthread_attr_setschedpolicy@@GLIBC_2.4 __gmon_start__ _Jv_RegisterClasses MDrv_UART_SetRxMode HAL_MIU_GetLoadingRequest MsOS_ReadMemory MsOS_MPool_SetDbgLevel UtopiaInitRegister sched_yield@@GLIBC_2.4 CHIP_DisableAllInterrupt HAL_MIU_Mask_Req_MVD_R MAsm_CPU_SetEBASE MDrv_MMIO_Init _MDrv_BDMA_PatternFill eBDMAModuleVersion MsOS_SetEvent MsOS_SHM_GetId HAL_MIU_ReadByte MDrv_MBX_RegisterMSGWithCallBack MsOS_EnableInterrupt HAL_MIU_Mask_Req_AUDIO_RW MDrv_MIU_Mask_Req_SC_RW HAL_BDMA_Enable_INT mstar_mspace_memalign ResourceNames MsOS_ResetTimer UtopiaInstanceGetAppRequiredModuleVersion MDrv_IRQ_MaskAll HAL_MIU_Mask_Req_DNRB_R MAsm_CPU_EnableTimerInterrupt putchar HAL_BDMA_SetDstDev strncpy@@GLIBC_2.4 HAL_MIU_Mask_Req_MVOP_R UtopiaModuleAddResourceStart _fini HAL_SYS_SetTSOutClockPhase _MDrv_BDMA_GetStatus HAL_SYS_SetAGCPadMux mdrv_uart_set_rx_callback_halreg MHAL_MBXINT_Init MDrv_UART_GetLibVer MsOS_ResumeTask semop@@GLIBC_2.4 HAL_MIU_SetSsc MsOS_CPU_RestoreInterrupt mdrv_uart_rx_enable _HAL_REG_WriteByteMask Cyg_Mempool_Implementation__alloc2memdq MsOS_Dcache_Writeback MDrv_MIU_EnableScramble HAL_UART_PIU_Ioctl HAL_MIU_Mask_Req_SC_RW MDrv_BDMA_GetInfo OS_UART_Exit HAL_MIU_GetAutoPhaseResult MDrv_MIU_GetProtectInfo UtopiaResourceRegister MDrv_IRQ_Mask HAL_MIU_GET_MUX MIU1_request_mask_count HAL_BDMA_Read4Byte HAL_SYS_DMD_VD_MBX_DVB_DBG_ReadReg MDrv_SYS_DMD_VD_MBX_ReadDSPReg pthread_cond_wait@@GLIBC_2.4 MDrv_SYS_DMD_VD_MBX_DBG_WriteReg MDrv_SYS_WDTLastStatus MDrv_UART_SetPMRxEnable shmat@@GLIBC_2.4 _MDrv_BDMA_MOBFSearch sched_get_priority_max@@GLIBC_2.4 MDrv_SYS_VIFReadByteByVDMbox BDMAOpen memset@@GLIBC_2.4 mdrv_uart_read mstar_create_mspace_with_base MsOS_In_Interrupt _MDrv_BDMA_MemCopy MsOS_InfoMutex mdrv_uart_write HAL_BDMA_TrigOn pthread_cond_timedwait@@GLIBC_2.4 MsOS_DeleteTimer HAL_BDMA_Set_Addr_Dec HAL_SEM_Get_Num MsOS_CPU_AttachInterrupt MsOS_CreateEventGroup pthread_mutexattr_setpshared MAsm_CPU_Nop __aeabi_unwind_cpp_pr1 HAL_UART_Connect HAL_UART_PIU_Set_Rx_Callback MDrv_MIU_Mask_Req_MVD_RW MDrv_BDMA_Search MsOS_ReleaseMutex MsOS_InfoSemaphore UtopiaInstanceGetModule MDrv_MBX_GetStatus Cyg_Mempool_Status__Cyg_Mempool_Status MsOS_CPU_EnableInterrupt MDrv_MIU_Mask_Req_MVD_W eMsModule MDrv_SEM_Get_ResourceID SYS_VIF_Read2ByteByVDMbox MsOS_CPU_MaskAllInterrupt MDrv_BDMA_MemCopy pthread_attr_setschedparam@@GLIBC_2.4 MDrv_MBX_GetInformation perror@@GLIBC_2.4 Cyg_Mempool__get_allocation_size mdrv_uart_set_tx_buffer MsOS_EnableAllInterrupts _u32Flash_Bank0 timer_delete utopiaShmIdArray MDrv_SYS_Info MDrv_SYS_DMD_VD_MBX_WriteDSPReg mdrv_uart_set_rx_callback MDrv_IRQ_Init MDrv_MIU_Mask_Req_AUDIO_RW dlmalloc_usable_size CHIP_DisableIRQ HAL_UART_SetPadMux __assert_fail@@GLIBC_2.4 MDrv_MIU_SelMIU UtopiaModuleSetVersion MsOS_YieldTask HAL_MIU_SetPMIOMapBase HAL_MIU_VOP_SwitchMIU pthread_cond_broadcast@@GLIBC_2.4 HAL_BDMA_GetLen HAL_MIU_Read2Byte MDrv_IRQ_Restore MDrv_SYS_DMD_VD_MBX_SetType HAL_SYS_Read2Byte MDrv_MBX_CheckMsg MDrv_MIU_Protect MDrv_UART_PutString HAL_BDMA_GetCmd2 _HAL_UART_PIU_Isr_HalReg MDrv_UART_GetInfo HAL_UART_PIU_Close MDrv_UART_PutChar pAttributeBdma moduleNames MDrv_UART_GetChar HAL_BDMA_GetDevId HAL_BDMA_Clear_Status Cyg_Mempool__Create MsOS_MPool_PA2KSEG1 MDrv_MBX_GetLibVer HAL_BDMA_SetCmd0 HAL_MIU_SetLoadingRequest MDrv_MIU_SetSsc MDrv_SYS_GetChipRev MDrv_MIU_SetSscValue psUtopiaPrivate MDrv_MIU_Mask_Req_DNRB_RW HAL_BDMA_GetDevDw dlinit MDrv_SEM_GetLibVer MDrv_IRQ_InISR OS_UART_ISR_Enable HAL_SYS_EfuseRead2Byte HAL_UART0_PIU_Isr UtopiaInstanceGetPrivate free@@GLIBC_2.4 HAL_BDMA_Is_Done write@@GLIBC_2.4 HAL_SYS_DMD_VD_MBX_ATSC_WriteByte MDrv_SYS_VIFRead2ByteByVDMbox HAL_MIU_Mask_Req_MVD_W sem_destroy HAL_MsOS_MPool_PA2VA SYS_Init MsOS_CreateSemaphore MsOS_Timer_DiffTime MsOS_MPool_Kernel_Detect MDrv_MBX_DeInit UtopiaModuleGetPrivate MDrv_MIU_Dram_Size MDrv_SYS_GetSoftwareVersion eBdmaPoolID MDrv_MMIO_GetBASE mdrv_uart_invert IDs MDrv_SYS_GetInfo MDrv_MIU_Mask_Req_MVD_R __bss_start__ MsOS_VA2PA pthread_mutex_unlock@@GLIBC_2.4 HAL_UART_PIU_Set_Rx_Callback_HalReg mdrv_uart_connect MsOS_CPU_MaskInterrupt HAL_MIU_Mask_Req_OPM_R MDrv_BDMA_CRC32 MDrv_MMIO_Close eBdmaIoctlOpt MDrv_MBX_SendMsg MsOS_CreateTask MsOS_CPU_UnMaskInterrupt MsOS_MPool_Mapping SYS_GetInfo pthread_mutex_timedlock MsOS_GetSystemTime MsOS_InfoTask pthread_attr_setscope@@GLIBC_2.4 MDrv_SYS_SetAGCPadMux MsOS_ObtainSemaphore MDrv_MIU_Init HAL_SYS_DMD_VD_MBX_GetType MDrv_MIU_UnMaskReq MDrv_UART_GetStatus mdrv_uart_poll HAL_BDMA_SetDstAddr pthread_mutexattr_destroy ioctl@@GLIBC_2.4 mdrv_uart_set_rx_buffer _Change MDrv_IRQ_GetLibVer Cyg_Mempool_Status_init cyg_mempool_var_waiting HAL_BDMA_WriteRegBit HAL_BDMA_Dump_AllReg posix_memalign@@GLIBC_2.4 HAL_MMIO_GetBase UtopiaIoctl HAL_BDMA_Is_Queued MHAL_MBX_SetConfig MDrv_BDMA_GetLibVer Cyg_Mempool_Implementation__try_alloc sem_timedwait _MDrv_BDMA_SetSPIOffsetForMCU pthread_mutex_lock@@GLIBC_2.4 _u32SPRAM_BankSize strlen@@GLIBC_2.4 Cyg_Mempool_Implementation__memdq2alloc HAL_UART_PIU_Poll gsystem_time_ms HAL_SYS_RFAGC_Tristate MDrv_BDMA_CopyHnd MIU0_request_mask_count MsOS_Dbg_ExecuteSubCB HAL_MIU_SelMIU MDrv_BDMA_GetStatus HAL_MIU_IsScrambleEnabled mstar_mspace_usable_size MsOS_DeleteSemaphore MsOS_CPU_SetEBASE HAL_SYS_DMD_VD_MBX_DVB_WaitHandShake memcpy@@GLIBC_2.4 _u32NSK_Bank HAL_MIU_IsI64Mode MsOS_MPool_VA2PA mstar_mspace_calloc clientTbl MDrv_BDMA_SetDbgLevel HAL_UART_PIU_Set_Baudrate pthread_create pthread_cond_signal@@GLIBC_2.4 MsOS_MPool_Init MDrv_MBX_SetInformation MAsm_CPU_DelayMs MsOS_CPU_DisableInterrupt MDrv_IRQ_Detech HAL_BDMA_SetSrcDev HAL_UART_Invert Cyg_Mempool__try_alloc Cyg_Mempool__free HAL_BDMA_WriteByte MHAL_MBX_GetFireStatus MsOS_Dbg_Regist MDrv_SYS_DMD_VD_MBX_DBG_ReadReg MHAL_MBXINT_ResetHostCPU BDMAIoctl HAL_SYS_DMD_VD_MBX_DVB_DBG_WriteReg SYS_VIF_WriteRegBitByVDMbox HAL_UART_GetIOMapBase HAL_MsOS_MPool_Dcache_Flush MHAL_MBXINT_Fire MAsm_CPU_StatusBEV MsOS_Init BDMAClose HAL_SYS_SetPadMux utopiaShmIdIndex MsOS_CPU_DetachInterrupt MDrv_MIU_ProtectAlign mstar_destroy_mspace mdrv_uart_connect_mux _MDrv_BDMA_WaitFlashDone HAL_SEM_Get_Resource pthread_attr_setinheritsched@@GLIBC_2.4 BDMARegisterToUtopia HAL_SYS_DMD_VD_MBX_DVB_ReadDspReg timer_create __end__ MDrv_MIU_ClinetNumber MsOS_Timer_DiffTimeFromNow pthread_cond_destroy@@GLIBC_2.4 MDrv_SYS_SetPadMux MsOS_CPU_AttachException __bss_end__ UtopiaInit pthread_mutex_destroy@@GLIBC_2.4 HAL_MIU_Mask_Req_MVD_RW printf@@GLIBC_2.4 MDrv_SYS_ResetChip HAL_BDMA_GetCmd1 MsOS_PeekFromQueue _HAL_REG_ReadByte HAL_MIU_GetProtectInfo Cyg_Mempool_Implementation__roundup HAL_MIU_Write2Byte MHAL_MBX_Init MsOS_SuspendTask sbrk_top raise@@GLIBC_2.4 MDrv_MIU_Mask_Req_DNRB_R pthread_mutexattr_init mstar_mspace_trim MDrv_UART_GetFile HAL_BDMA_Is_Found MAsm_CPU_SwDbgBp MDrv_BDMA_GetMinSize Cyg_Mempool_Implementation__Delete UtopiaModuleRegister MHAL_MBX_Fire HAL_BDMA_GetMatched MDrv_SYS_WDTSetTime MsOS_DelayTaskUs HAL_BDMA_SetCmd1 MDrv_SYS_Query HAL_SYS_DMD_VD_MBX_DVB_WaitReady mdrv_uart_tx_enable MAsm_CPU_Jump MsOS_RestoreAllInterrupts MsOS_FlushMemory MDrv_SEM_Get_Num HAL_BDMA_Write4Byte MDrv_SYS_WDTClear _MDrv_BDMA_FlashCopy2Dram HAL_MMIO_GetIPBase pthread_mutex_init@@GLIBC_2.4 UTOPIARegisterToUtopia MDrv_MBX_SendMsgLoopback _HAL_REG_WriteByte MsOS_RegMyDbg UtopiaModuleGetDebugLevel HAL_SYS_Query mstar_mspace_footprint cyg_mempool_var_create Cyg_Mempool_Implementation__Create HAL_MIU_Write4Byte UTL_memset close@@GLIBC_2.4 mdrv_uart_tx_disable MDrv_MIU_InitCounter mstar_mspace_malloc kbhit MDrv_SYS_VIFWriteByteByVDMbox clientId_KernelProtect HAL_MIU_PM_ReadByte HAL_BDMA_Is_Busy SYS_VIF_WriteByteMaskByVDMbox HAL_MIU_IsInitMiu1 MDrv_BDMA_Exit HAL_SYS_DMD_VD_MBX_ATSC_ReadByte MsOS_AttachInterrupt IDEnables MsOS_StopTimer CHIP_EnableAllInterrupt semctl@@GLIBC_2.4 CHIP_DetachISR time@@GLIBC_2.4 MsOS_PA2KSEG1 MDrv_MIU_MaskReq HAL_UART0_PIU_Isr_HalReg HAL_MIU_Dram_Size __bss_start _uart_dev fprintf@@GLIBC_2.4 HAL_MIU_SetGroupPriority cyg_mempool_var_get_info _u32FRC_Bank MsOS_CreateMemoryPool MsOS_DelayTask _u32SPRAM_Bank MsOS_ClearEvent Cyg_Mempool__Delete malloc@@GLIBC_2.4 MDrv_MBX_RegisterMSG HAL_UART_PIU_Read MDrv_SYS_VIFWriteRegBitByVDMbox MHAL_MBXINT_DeInit MsOS_MPool_Dcache_Flush Cyg_Mempool_Implementation__resize_alloc _bss_end__ MDrv_IRQ_NotifyCpu mstar_mspace_malloc_stats SYS_ResetCPU HAL_BDMA_MOBF sched_get_priority_min@@GLIBC_2.4 DSCMBRegisterToUtopia sigaction@@GLIBC_2.4 HAL_SYS_EnableDebugPort MHAL_MBX_SetInformation MsOS_CreateQueue MDrv_SYS_DMD_VD_MBX_Init pthread_attr_init@@GLIBC_2.4 poll@@GLIBC_2.4 HAL_BDMA_GetSrcAddr MDrv_MIU_GetDefaultClientID_KernelProtect HAL_MIU_SetGroupID HAL_BDMA_Is_Int SYS_VIF_ReadByteByVDMbox mdrv_uart_get_connection HAL_SEM_Reset_Resource MsOS_GetOSThreadID MDrv_MIU_IsScrambleEnabled mstar_mspace_mallinfo heap_end HAL_MsOS_MPool_VA2PA _u32NSK_BankSize MDrv_MIU_GetLoading HAL_SYS_Write2Byte MDrv_SYS_GetLibVer strtok@@GLIBC_2.4 MDrv_MBX_RecvMsg HAL_MIU_MaskReq HAL_SYS_DMD_VD_MBX_DVB_ReadByte UtopiaResourceGetPrivate mdrv_uart_open HAL_BDMA_Write2Byte MDrv_SYS_GetChipID HAL_MIU_ProtectAlign MDrv_BDMA_FlashCopy2Dram HAL_SYS_DMD_VD_MBX_ATV_WaitReady MDrv_MIU_Mask_Req_MVOP_R XIU_TimeOutINTHandler op_down MsOS_DetachInterrupt CHIP_DebugIRQ eUtopiaModuleIoctlOpt MDrv_SYS_VIFWriteByteMaskByVDMbox MsOS_DeleteMemoryPool Cyg_Mempool__resize_alloc HAL_MsOS_MPool_Dcache_Flush_All Cyg_Mempool_Implementation__free HAL_MIU_SetIOMapBase MDrv_BDMA_MOBFSearch HAL_SYS_DMD_VD_MBX_ATV_ReadByte HAL_SEM_SetBank HAL_MIU_ParseOccupiedResource HAL_BDMA_SetDmyWrCnt MHAL_MBXINT_CpuInit pthread_cancel mstar_mspace_realloc MDrv_MBX_Init MDrv_MIU_GetBusWidth HAL_BDMA_GetDstAddr MDrv_SYS_DMD_VD_MBX_WriteReg MDrv_MIU_SwitchMIU MDrv_SYS_DisableDebugPort HAL_MIU_GetDefaultClientID_KernelProtect puts@@GLIBC_2.4 mstar_mspace_free UtopiaResourceRelease mdrv_uart_close _end MDrv_IRQ_UnMask MsOS_SHM_FreeId _u32FRC_Bank_SIZE getpid@@GLIBC_2.4 MDrv_MIU_Mask_Req_DNRB_W MsOS_CPU_UnLockInterrupt prctl@@GLIBC_2.4 _sbrk HAL_BDMA_GetCmd0 HAL_MIU_Mask_Req_DNRB_W MsOS_WaitEvent MAsm_CPU_PowerDown MsOS_DeleteQueue pthread_mutexattr_setkind_np MAsm_CPU_Sync _MDrv_BDMA_CheckUtopia20Open TINY_SYS_Reset HAL_MIU_EnableScramble fcntl@@GLIBC_2.4 OS_UART_ISR_Disable CHIP_InISRContext HAL_BDMA_SetCmd2 HAL_DMA_Is_FlashReady HAL_MMIO_ReadMemory _u32NonPM_Bank locate_module MDrv_SYS_SetTSOutClockPhase sem_post MsOS_DeleteEventGroup MDrv_BDMA_DumpCB HAL_SYS_DMD_VD_MBX_ATV_WriteByte HAL_MIU_Write2BytesBit MsOS_MPool_Close MsOS_DisableInterrupt MDrv_MIU_GetLibVer stderr@@GLIBC_2.4 HAL_SYS_SetPCMCardDetectMode Cyg_Mempool__get_status CHIP_AttachISR MAsm_CPU_TimerStart SYS_GetChipRev MDrv_MIU_SetGroupPriority MsOS_MPool_Get pInstantBdma _MDrv_BDMA_Search MDrv_MBX_RemoveLatestMsg MsOS_DisableAllInterrupts mdrv_uart_rx_disable MDrv_BDMA_SetSPIOffsetForMCU mdrv_uart_set_baudrate cyg_mempool_var_free _u32PM_Bank HAL_MMIO_FlushMemory MsOS_ObtainMutex HAL_MIU_SetHPriorityMask HAL_UART_PIU_Open MsOS_SendToQueue HAL_UART_Get_Connection rpoolNames UtopiaInstanceGetModuleID HAL_MIU_Read4Byte MAsm_GetSystemTime _MDrv_BDMA_CRC32 MsOS_PA2BA mstar_mspace_independent_calloc UtopiaClose MHAL_MBX_RecvEnd cyg_mempool_var_try_alloc HAL_BDMA_Stop mstar_mspace_max_footprint UtopiaModuleCreate MDrv_UART_SetIOMapBase SYS_GetChipID HAL_BDMA_SetSPIOffsetForMCU snprintf@@GLIBC_2.4 MsOS_Dcache_Invalidate HAL_SYS_DisableDebugPort MDrv_BDMA_Stop HAL_SEM_Get_ResourceID HAL_BDMA_Set_CRC_Reflect MDrv_SYS_EnableDebugPort MDrv_MIU_GetClientInfo HAL_MIU_SetProtectID MDrv_BDMA_PatternFill pthread_cond_init@@GLIBC_2.4 _edata MDrv_MIU_Mask_Req_OPM_R nanosleep@@GLIBC_2.4 MDrv_SEM_Free_Resource realloc@@GLIBC_2.4 MDrv_BDMA_WaitFlashDone MsOS_PA2KSEG0 MDrv_IRQ_Attach HAL_UART1_PIU_Isr_HalReg _u32Flash_Bank0_SIZE _u32NonPM_Bank_SIZE MDrv_SYS_ResetCPU HAL_MIU_Protect HAL_BDMA_ReadByte MDrv_MBX_GetMsgQueueStatus UtopiaResourceCreate mstar_mspace_mallopt UtopiaInstanceCreate MsOS_BA2PA sem_getvalue HAL_MIU_ClinetNumber HAL_SEM_Free_Resource Cyg_Mempool_Implementation__addr2memdq u32_ge0_mmio_base MsOS_InfoTaskID CHIP_InitISR MDrv_MBX_SetDbgLevel getchar MsOS_Sync OS_UART_Init strcmp@@GLIBC_2.4 bU20BDMAOpened HAL_UART_SetPMRxEnable HAL_BDMA_SetSrcAddr exit@@GLIBC_2.4 MsOS_SHM_Init mstar_mspace_track_large_chunks shmid2va_table _u32PM_Bank_SIZE MsOS_DebugInterrupt __errno_location@@GLIBC_2.4 MsOS_MPool_Dcache_Flush_All pthread_self@@GLIBC_2.4 MDrv_SEM_Reset_Resource MDrv_MBX_Enable _u32OTP_BankSize __cxa_finalize@@GLIBC_2.4 sprintf@@GLIBC_2.4 HAL_SYS_IFAGC_Tristate _init MDrv_MBX_GetInfo MAsm_CPU_DelayUs eUtopiaPoolID semget@@GLIBC_2.4 MDrv_UART_Init _HAL_REG_PM_WriteByte sem_wait UtopiaResourceObtain pthread_join MsOS_ReleaseSemaphore shmget@@GLIBC_2.4 UtopiaInstanceGetModuleVersion