1*53ee8cc1Swenshuai.xi /* 2*53ee8cc1Swenshuai.xi * pci.h 3*53ee8cc1Swenshuai.xi * 4*53ee8cc1Swenshuai.xi * PCI defines and function prototypes 5*53ee8cc1Swenshuai.xi * Copyright 1994, Drew Eckhardt 6*53ee8cc1Swenshuai.xi * Copyright 1997--1999 Martin Mares <mj@ucw.cz> 7*53ee8cc1Swenshuai.xi * 8*53ee8cc1Swenshuai.xi * For more information, please consult the following manuals (look at 9*53ee8cc1Swenshuai.xi * http://www.pcisig.com/ for how to get them): 10*53ee8cc1Swenshuai.xi * 11*53ee8cc1Swenshuai.xi * PCI BIOS Specification 12*53ee8cc1Swenshuai.xi * PCI Local Bus Specification 13*53ee8cc1Swenshuai.xi * PCI to PCI Bridge Specification 14*53ee8cc1Swenshuai.xi * PCI System Design Guide 15*53ee8cc1Swenshuai.xi */ 16*53ee8cc1Swenshuai.xi 17*53ee8cc1Swenshuai.xi #ifndef LINUX_PCI_H 18*53ee8cc1Swenshuai.xi #define LINUX_PCI_H 19*53ee8cc1Swenshuai.xi 20*53ee8cc1Swenshuai.xi /* Include the pci register defines */ 21*53ee8cc1Swenshuai.xi #include <linux/pci_regs.h> 22*53ee8cc1Swenshuai.xi 23*53ee8cc1Swenshuai.xi /* 24*53ee8cc1Swenshuai.xi * The PCI interface treats multi-function devices as independent 25*53ee8cc1Swenshuai.xi * devices. The slot/function address of each device is encoded 26*53ee8cc1Swenshuai.xi * in a single byte as follows: 27*53ee8cc1Swenshuai.xi * 28*53ee8cc1Swenshuai.xi * 7:3 = slot 29*53ee8cc1Swenshuai.xi * 2:0 = function 30*53ee8cc1Swenshuai.xi */ 31*53ee8cc1Swenshuai.xi #define PCI_DEVFN(slot, func) ((((slot) & 0x1f) << 3) | ((func) & 0x07)) 32*53ee8cc1Swenshuai.xi #define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f) 33*53ee8cc1Swenshuai.xi #define PCI_FUNC(devfn) ((devfn) & 0x07) 34*53ee8cc1Swenshuai.xi 35*53ee8cc1Swenshuai.xi /* Ioctls for /proc/bus/pci/X/Y nodes. */ 36*53ee8cc1Swenshuai.xi #define PCIIOC_BASE ('P' << 24 | 'C' << 16 | 'I' << 8) 37*53ee8cc1Swenshuai.xi #define PCIIOC_CONTROLLER (PCIIOC_BASE | 0x00) /* Get controller for PCI device. */ 38*53ee8cc1Swenshuai.xi #define PCIIOC_MMAP_IS_IO (PCIIOC_BASE | 0x01) /* Set mmap state to I/O space. */ 39*53ee8cc1Swenshuai.xi #define PCIIOC_MMAP_IS_MEM (PCIIOC_BASE | 0x02) /* Set mmap state to MEM space. */ 40*53ee8cc1Swenshuai.xi #define PCIIOC_WRITE_COMBINE (PCIIOC_BASE | 0x03) /* Enable/disable write-combining. */ 41*53ee8cc1Swenshuai.xi 42*53ee8cc1Swenshuai.xi #endif /* LINUX_PCI_H */ 43