xref: /utopia/UTPA2-700.0.x/projects/tools/lint/mips-linux-gnu_include/linux/hdlcdrv.h (revision 53ee8cc121a030b8d368113ac3e966b4705770ef)
1*53ee8cc1Swenshuai.xi /*
2*53ee8cc1Swenshuai.xi  * hdlcdrv.h  -- HDLC packet radio network driver.
3*53ee8cc1Swenshuai.xi  * The Linux soundcard driver for 1200 baud and 9600 baud packet radio
4*53ee8cc1Swenshuai.xi  * (C) 1996-1998 by Thomas Sailer, HB9JNX/AE4WA
5*53ee8cc1Swenshuai.xi  */
6*53ee8cc1Swenshuai.xi 
7*53ee8cc1Swenshuai.xi #ifndef _HDLCDRV_H
8*53ee8cc1Swenshuai.xi #define _HDLCDRV_H
9*53ee8cc1Swenshuai.xi 
10*53ee8cc1Swenshuai.xi /* -------------------------------------------------------------------- */
11*53ee8cc1Swenshuai.xi /*
12*53ee8cc1Swenshuai.xi  * structs for the IOCTL commands
13*53ee8cc1Swenshuai.xi  */
14*53ee8cc1Swenshuai.xi 
15*53ee8cc1Swenshuai.xi struct hdlcdrv_params {
16*53ee8cc1Swenshuai.xi 	int iobase;
17*53ee8cc1Swenshuai.xi 	int irq;
18*53ee8cc1Swenshuai.xi 	int dma;
19*53ee8cc1Swenshuai.xi 	int dma2;
20*53ee8cc1Swenshuai.xi 	int seriobase;
21*53ee8cc1Swenshuai.xi 	int pariobase;
22*53ee8cc1Swenshuai.xi 	int midiiobase;
23*53ee8cc1Swenshuai.xi };
24*53ee8cc1Swenshuai.xi 
25*53ee8cc1Swenshuai.xi struct hdlcdrv_channel_params {
26*53ee8cc1Swenshuai.xi 	int tx_delay;  /* the transmitter keyup delay in 10ms units */
27*53ee8cc1Swenshuai.xi 	int tx_tail;   /* the transmitter keyoff delay in 10ms units */
28*53ee8cc1Swenshuai.xi 	int slottime;  /* the slottime in 10ms; usually 10 = 100ms */
29*53ee8cc1Swenshuai.xi 	int ppersist;  /* the p-persistence 0..255 */
30*53ee8cc1Swenshuai.xi 	int fulldup;   /* some driver do not support full duplex, setting */
31*53ee8cc1Swenshuai.xi 	               /* this just makes them send even if DCD is on */
32*53ee8cc1Swenshuai.xi };
33*53ee8cc1Swenshuai.xi 
34*53ee8cc1Swenshuai.xi struct hdlcdrv_old_channel_state {
35*53ee8cc1Swenshuai.xi   	int ptt;
36*53ee8cc1Swenshuai.xi   	int dcd;
37*53ee8cc1Swenshuai.xi   	int ptt_keyed;
38*53ee8cc1Swenshuai.xi };
39*53ee8cc1Swenshuai.xi 
40*53ee8cc1Swenshuai.xi struct hdlcdrv_channel_state {
41*53ee8cc1Swenshuai.xi  	int ptt;
42*53ee8cc1Swenshuai.xi  	int dcd;
43*53ee8cc1Swenshuai.xi  	int ptt_keyed;
44*53ee8cc1Swenshuai.xi  	unsigned long tx_packets;
45*53ee8cc1Swenshuai.xi  	unsigned long tx_errors;
46*53ee8cc1Swenshuai.xi  	unsigned long rx_packets;
47*53ee8cc1Swenshuai.xi  	unsigned long rx_errors;
48*53ee8cc1Swenshuai.xi };
49*53ee8cc1Swenshuai.xi 
50*53ee8cc1Swenshuai.xi struct hdlcdrv_ioctl {
51*53ee8cc1Swenshuai.xi 	int cmd;
52*53ee8cc1Swenshuai.xi 	union {
53*53ee8cc1Swenshuai.xi 		struct hdlcdrv_params mp;
54*53ee8cc1Swenshuai.xi 		struct hdlcdrv_channel_params cp;
55*53ee8cc1Swenshuai.xi 		struct hdlcdrv_channel_state cs;
56*53ee8cc1Swenshuai.xi 		struct hdlcdrv_old_channel_state ocs;
57*53ee8cc1Swenshuai.xi 		unsigned int calibrate;
58*53ee8cc1Swenshuai.xi 		unsigned char bits;
59*53ee8cc1Swenshuai.xi 		char modename[128];
60*53ee8cc1Swenshuai.xi 		char drivername[32];
61*53ee8cc1Swenshuai.xi 	} data;
62*53ee8cc1Swenshuai.xi };
63*53ee8cc1Swenshuai.xi 
64*53ee8cc1Swenshuai.xi /* -------------------------------------------------------------------- */
65*53ee8cc1Swenshuai.xi 
66*53ee8cc1Swenshuai.xi /*
67*53ee8cc1Swenshuai.xi  * ioctl values
68*53ee8cc1Swenshuai.xi  */
69*53ee8cc1Swenshuai.xi #define HDLCDRVCTL_GETMODEMPAR       0
70*53ee8cc1Swenshuai.xi #define HDLCDRVCTL_SETMODEMPAR       1
71*53ee8cc1Swenshuai.xi #define HDLCDRVCTL_MODEMPARMASK      2  /* not handled by hdlcdrv */
72*53ee8cc1Swenshuai.xi #define HDLCDRVCTL_GETCHANNELPAR    10
73*53ee8cc1Swenshuai.xi #define HDLCDRVCTL_SETCHANNELPAR    11
74*53ee8cc1Swenshuai.xi #define HDLCDRVCTL_OLDGETSTAT       20
75*53ee8cc1Swenshuai.xi #define HDLCDRVCTL_CALIBRATE        21
76*53ee8cc1Swenshuai.xi #define HDLCDRVCTL_GETSTAT          22
77*53ee8cc1Swenshuai.xi 
78*53ee8cc1Swenshuai.xi /*
79*53ee8cc1Swenshuai.xi  * these are mainly for debugging purposes
80*53ee8cc1Swenshuai.xi  */
81*53ee8cc1Swenshuai.xi #define HDLCDRVCTL_GETSAMPLES       30
82*53ee8cc1Swenshuai.xi #define HDLCDRVCTL_GETBITS          31
83*53ee8cc1Swenshuai.xi 
84*53ee8cc1Swenshuai.xi /*
85*53ee8cc1Swenshuai.xi  * not handled by hdlcdrv, but by its depending drivers
86*53ee8cc1Swenshuai.xi  */
87*53ee8cc1Swenshuai.xi #define HDLCDRVCTL_GETMODE          40
88*53ee8cc1Swenshuai.xi #define HDLCDRVCTL_SETMODE          41
89*53ee8cc1Swenshuai.xi #define HDLCDRVCTL_MODELIST         42
90*53ee8cc1Swenshuai.xi #define HDLCDRVCTL_DRIVERNAME       43
91*53ee8cc1Swenshuai.xi 
92*53ee8cc1Swenshuai.xi /*
93*53ee8cc1Swenshuai.xi  * mask of needed modem parameters, returned by HDLCDRVCTL_MODEMPARMASK
94*53ee8cc1Swenshuai.xi  */
95*53ee8cc1Swenshuai.xi #define HDLCDRV_PARMASK_IOBASE      (1<<0)
96*53ee8cc1Swenshuai.xi #define HDLCDRV_PARMASK_IRQ         (1<<1)
97*53ee8cc1Swenshuai.xi #define HDLCDRV_PARMASK_DMA         (1<<2)
98*53ee8cc1Swenshuai.xi #define HDLCDRV_PARMASK_DMA2        (1<<3)
99*53ee8cc1Swenshuai.xi #define HDLCDRV_PARMASK_SERIOBASE   (1<<4)
100*53ee8cc1Swenshuai.xi #define HDLCDRV_PARMASK_PARIOBASE   (1<<5)
101*53ee8cc1Swenshuai.xi #define HDLCDRV_PARMASK_MIDIIOBASE  (1<<6)
102*53ee8cc1Swenshuai.xi 
103*53ee8cc1Swenshuai.xi /* -------------------------------------------------------------------- */
104*53ee8cc1Swenshuai.xi 
105*53ee8cc1Swenshuai.xi 
106*53ee8cc1Swenshuai.xi /* -------------------------------------------------------------------- */
107*53ee8cc1Swenshuai.xi 
108*53ee8cc1Swenshuai.xi #endif /* _HDLCDRV_H */
109*53ee8cc1Swenshuai.xi 
110*53ee8cc1Swenshuai.xi /* -------------------------------------------------------------------- */
111