1*53ee8cc1Swenshuai.xi /* 2*53ee8cc1Swenshuai.xi * This file is subject to the terms and conditions of the GNU General Public 3*53ee8cc1Swenshuai.xi * License. See the file "COPYING" in the main directory of this archive 4*53ee8cc1Swenshuai.xi * for more details. 5*53ee8cc1Swenshuai.xi * 6*53ee8cc1Swenshuai.xi * Copyright (C) 1994, 95, 96, 97, 98, 99, 2000 by Ralf Baechle 7*53ee8cc1Swenshuai.xi * Copyright (C) 1999, 2000 Silicon Graphics, Inc. 8*53ee8cc1Swenshuai.xi */ 9*53ee8cc1Swenshuai.xi #ifndef _ASM_PTRACE_H 10*53ee8cc1Swenshuai.xi #define _ASM_PTRACE_H 11*53ee8cc1Swenshuai.xi 12*53ee8cc1Swenshuai.xi 13*53ee8cc1Swenshuai.xi /* 0 - 31 are integer registers, 32 - 63 are fp registers. */ 14*53ee8cc1Swenshuai.xi #define FPR_BASE 32 15*53ee8cc1Swenshuai.xi #define PC 64 16*53ee8cc1Swenshuai.xi #define CAUSE 65 17*53ee8cc1Swenshuai.xi #define BADVADDR 66 18*53ee8cc1Swenshuai.xi #define MMHI 67 19*53ee8cc1Swenshuai.xi #define MMLO 68 20*53ee8cc1Swenshuai.xi #define FPC_CSR 69 21*53ee8cc1Swenshuai.xi #define FPC_EIR 70 22*53ee8cc1Swenshuai.xi #define DSP_BASE 71 /* 3 more hi / lo register pairs */ 23*53ee8cc1Swenshuai.xi #define DSP_CONTROL 77 24*53ee8cc1Swenshuai.xi #define ACX 78 25*53ee8cc1Swenshuai.xi 26*53ee8cc1Swenshuai.xi /* 27*53ee8cc1Swenshuai.xi * This struct defines the way the registers are stored on the stack during a 28*53ee8cc1Swenshuai.xi * system call/exception. As usual the registers k0/k1 aren't being saved. 29*53ee8cc1Swenshuai.xi */ 30*53ee8cc1Swenshuai.xi struct pt_regs { 31*53ee8cc1Swenshuai.xi #ifdef CONFIG_32BIT 32*53ee8cc1Swenshuai.xi /* Pad bytes for argument save space on the stack. */ 33*53ee8cc1Swenshuai.xi unsigned long pad0[6]; 34*53ee8cc1Swenshuai.xi #endif 35*53ee8cc1Swenshuai.xi 36*53ee8cc1Swenshuai.xi /* Saved main processor registers. */ 37*53ee8cc1Swenshuai.xi unsigned long regs[32]; 38*53ee8cc1Swenshuai.xi 39*53ee8cc1Swenshuai.xi /* Saved special registers. */ 40*53ee8cc1Swenshuai.xi unsigned long cp0_status; 41*53ee8cc1Swenshuai.xi unsigned long hi; 42*53ee8cc1Swenshuai.xi unsigned long lo; 43*53ee8cc1Swenshuai.xi #ifdef CONFIG_CPU_HAS_SMARTMIPS 44*53ee8cc1Swenshuai.xi unsigned long acx; 45*53ee8cc1Swenshuai.xi #endif 46*53ee8cc1Swenshuai.xi unsigned long cp0_badvaddr; 47*53ee8cc1Swenshuai.xi unsigned long cp0_cause; 48*53ee8cc1Swenshuai.xi unsigned long cp0_epc; 49*53ee8cc1Swenshuai.xi #ifdef CONFIG_MIPS_MT_SMTC 50*53ee8cc1Swenshuai.xi unsigned long cp0_tcstatus; 51*53ee8cc1Swenshuai.xi #endif /* CONFIG_MIPS_MT_SMTC */ 52*53ee8cc1Swenshuai.xi } __attribute__ ((aligned (8))); 53*53ee8cc1Swenshuai.xi 54*53ee8cc1Swenshuai.xi /* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */ 55*53ee8cc1Swenshuai.xi #define PTRACE_GETREGS 12 56*53ee8cc1Swenshuai.xi #define PTRACE_SETREGS 13 57*53ee8cc1Swenshuai.xi #define PTRACE_GETFPREGS 14 58*53ee8cc1Swenshuai.xi #define PTRACE_SETFPREGS 15 59*53ee8cc1Swenshuai.xi /* #define PTRACE_GETFPXREGS 18 */ 60*53ee8cc1Swenshuai.xi /* #define PTRACE_SETFPXREGS 19 */ 61*53ee8cc1Swenshuai.xi 62*53ee8cc1Swenshuai.xi #define PTRACE_OLDSETOPTIONS 21 63*53ee8cc1Swenshuai.xi 64*53ee8cc1Swenshuai.xi #define PTRACE_GET_THREAD_AREA 25 65*53ee8cc1Swenshuai.xi #define PTRACE_SET_THREAD_AREA 26 66*53ee8cc1Swenshuai.xi 67*53ee8cc1Swenshuai.xi /* Calls to trace a 64bit program from a 32bit program. */ 68*53ee8cc1Swenshuai.xi #define PTRACE_PEEKTEXT_3264 0xc0 69*53ee8cc1Swenshuai.xi #define PTRACE_PEEKDATA_3264 0xc1 70*53ee8cc1Swenshuai.xi #define PTRACE_POKETEXT_3264 0xc2 71*53ee8cc1Swenshuai.xi #define PTRACE_POKEDATA_3264 0xc3 72*53ee8cc1Swenshuai.xi #define PTRACE_GET_THREAD_AREA_3264 0xc4 73*53ee8cc1Swenshuai.xi 74*53ee8cc1Swenshuai.xi 75*53ee8cc1Swenshuai.xi #endif /* _ASM_PTRACE_H */ 76