1 //<MStar Software> 2 //****************************************************************************** 3 // MStar Software 4 // Copyright (c) 2010 - 2012 MStar Semiconductor, Inc. All rights reserved. 5 // All software, firmware and related documentation herein ("MStar Software") are 6 // intellectual property of MStar Semiconductor, Inc. ("MStar") and protected by 7 // law, including, but not limited to, copyright law and international treaties. 8 // Any use, modification, reproduction, retransmission, or republication of all 9 // or part of MStar Software is expressly prohibited, unless prior written 10 // permission has been granted by MStar. 11 // 12 // By accessing, browsing and/or using MStar Software, you acknowledge that you 13 // have read, understood, and agree, to be bound by below terms ("Terms") and to 14 // comply with all applicable laws and regulations: 15 // 16 // 1. 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MStar hereby reserves the 91 // rights to any and all damages, losses, costs and expenses resulting therefrom. 92 // 93 //////////////////////////////////////////////////////////////////////////////// 94 95 /////////////////////////////////////////////////////////////////////////////////////////////////// 96 /// 97 /// @file drvVIF.h 98 /// @brief MStar VIF Utopia interface 99 /// @author MStar Semiconductor Inc. 100 /// @version 1.0 101 /////////////////////////////////////////////////////////////////////////////////////////////////// 102 103 /*! \defgroup VIF VIF interface 104 \ingroup VIF 105 106 \brief 107 108 VIF, in other words, is ATV demodulator. VIF is composed of analog and digital parts. 109 Analog part includes Programmable Gain Amplifier(PGA), mixer and LPF. 110 After ADC sampling, low IF signal is digitally processed. 111 First, low IF signal is down-converted to baseband. 112 Second, baseband filter pass video content and reject audio carrier. 113 114 <b>Features</b> 115 116 - PGA provides 25~35dB gain (depending on chips), 1dB gain per step. 117 - Mixer down-converts video IF frequency (38.9MHz) to low IF frequency (9.548MHz) 118 - There are separate internal control lines to provide 10 gain steps for PGA1 and 15 gain steps for PGA2. 119 Each gain step is 1 dB increment. The minimum PGA1 gain is 6dB and the minimum PGA2 gain is 0dB. 120 - Gain adjustment 121 RF signal strong -> weak: Once tuner gain reaches maximum, PGA gain start increasing. 122 RF signal weak -> strong: Decreasing tuner gain first and then decreasing PGA gain for maintaining tuner voltage operating above GAIN_DISTRINUTION_THR. Once PGA gain is minimum, tuner gain start decreasing until minimum. 123 124 <b> VIF Block Diagram: </b> \n 125 \image html drvVIF_pic01.png 126 \image html drvVIF_pic02.png 127 \image html drvVIF_pic03.png 128 129 <b> Operation Code Flow: </b> \n 130 -# Prepare VIF setting for each operation 131 -# Set and start VIF in command handle 132 -# Get Tuner IF output signal 133 -# Set setting 134 -# Monitor VIF status (FOE, Lock status...etc) 135 -# VIF done by polling 136 137 \defgroup VIF VIF modules 138 \ingroup VIF 139 \defgroup VIF_Basic VIF Basic 140 \ingroup VIF 141 \defgroup VIF_Task VIF Task 142 \ingroup VIF 143 */ 144 145 146 #ifndef _DRVVIF_H_ 147 #define _DRVVIF_H_ 148 149 #ifdef __cplusplus 150 extern "C" 151 { 152 #endif 153 154 #include "MsCommon.h" 155 #include "MsIRQ.h" 156 #include "MsOS.h" 157 #include "MsTypes.h" 158 #if 0 // move to drvvif.c 159 //**************************************************************************** 160 // VIF lib Changelist 161 //**************************************************************************** 162 #define MSIF_VIF_LIB_CODE {'V','I','F','_'} 163 #define MSIF_VIF_LIBVER {'1','7'} 164 #define MSIF_VIF_BUILDNUM {'0','5'} 165 #define MSIF_VIF_CHANGELIST {'0','0','6','1','8','0','0','4'} 166 #define MSIF_VIF_DASH {'_'} 167 #define MSIF_VIF_DATE {'1','3','0','8','1','4'} // yymmdd 168 169 #define VIF_DRV_VERSION /* Character String for DRV/API version */ \ 170 MSIF_TAG, /* 'MSIF' */ \ 171 MSIF_CLASS, /* '00' */ \ 172 MSIF_CUS, /* 0x0000 */ \ 173 MSIF_MOD, /* 0x0000 */ \ 174 MSIF_CHIP, \ 175 MSIF_CPU, \ 176 MSIF_VIF_LIB_CODE, /* IP__ */ \ 177 MSIF_VIF_LIBVER, /* 0.0 ~ Z.Z */ \ 178 MSIF_VIF_BUILDNUM, /* 00 ~ 99 */ \ 179 MSIF_VIF_CHANGELIST, /* CL# */ \ 180 MSIF_OS 181 #endif 182 //**************************************************************************** 183 // Public attributes. 184 //**************************************************************************** 185 186 #ifdef _DRVVIF_C_ 187 #define INTERFACE 188 #else 189 #define INTERFACE extern 190 #endif 191 192 #ifndef BOOL 193 #define BOOL MS_BOOL 194 #endif 195 #ifndef BYTE 196 #define BYTE MS_U8 197 #endif 198 #ifndef WORD 199 #define WORD MS_U16 200 #endif 201 #ifndef DWORD 202 #define DWORD MS_U32 203 #endif 204 #ifndef U8 205 #define U8 MS_U8 206 #endif 207 #ifndef U16 208 #define U16 MS_U16 209 #endif 210 #ifndef U32 211 #define U32 MS_U32 212 #endif 213 #ifndef VIRT 214 #define VIRT MS_VIRT 215 #endif 216 217 typedef enum 218 { 219 afcBELOW_MINUS_187p5KHz = 0x07, 220 afcMINUS_162p5KHz = 0x06, 221 afcMINUS_137p5KHz = 0x05, 222 afcMINUS_112p5KHz = 0x04, 223 afcMINUS_87p5KHz = 0x03, 224 afcMINUS_62p5KHz = 0x02, 225 afcMINUS_37p5KHz = 0x01, 226 afcMINUS_12p5KHz = 0x00, 227 afcPLUS_12p5KHz = 0x0F, 228 afcPLUS_37p5KHz = 0x0E, 229 afcPLUS_62p5KHz = 0x0D, 230 afcPLUS_87p5KHz = 0x0C, 231 afcPLUS_112p5KHz = 0x0B, 232 afcPLUS_137p5KHz = 0x0A, 233 afcPLUS_162p5KHz = 0x09, 234 afcABOVE_PLUS_187p5KHz = 0x08 //<NHK_070630_eAFC> 235 } eAFC; 236 237 238 typedef enum 239 { 240 E_AFC_BELOW_MINUS_187p5KHz = 0x07, 241 E_AFC_MINUS_162p5KHz = 0x06, 242 E_AFC_MINUS_137p5KHz = 0x05, 243 E_AFC_MINUS_112p5KHz = 0x04, 244 E_AFC_MINUS_87p5KHz = 0x03, 245 E_AFC_MINUS_62p5KHz = 0x02, 246 E_AFC_MINUS_37p5KHz = 0x01, 247 E_AFC_MINUS_12p5KHz = 0x00, 248 E_AFC_PLUS_12p5KHz = 0x0F, 249 E_AFC_PLUS_37p5KHz = 0x0E, 250 E_AFC_PLUS_62p5KHz = 0x0D, 251 E_AFC_PLUS_87p5KHz = 0x0C, 252 E_AFC_PLUS_112p5KHz = 0x0B, 253 E_AFC_PLUS_137p5KHz = 0x0A, 254 E_AFC_PLUS_162p5KHz = 0x09, 255 E_AFC_ABOVE_PLUS_187p5KHz = 0x08, 256 E_AFC_OUT_OF_AFCWIN = 0x10, 257 } AFC; 258 259 typedef enum 260 { 261 VIF_IF_FREQ_INVALID, 262 VIF_IF_FREQ_B, // 38.90 MHz 263 VIF_IF_FREQ_G, // 38.90 MHz 264 VIF_IF_FREQ_I, // 38.90 MHz 265 VIF_IF_FREQ_DK, // 38.90 MHz 266 VIF_IF_FREQ_L, // 38.90 MHz 267 VIF_IF_FREQ_L_PRIME, // 33.90 MHz 268 VIF_IF_FREQ_MN, // 45.75 MHz 269 VIF_IF_FREQ_J, // 58.75 MHz 270 VIF_IF_FREQ_PAL_38, // 38.00 MHz 271 VIF_IF_FREQ_MAX_IF_FREQ, 272 VIF_IF_DIGITAL_MODE 273 } VIF_IF_FREQ; 274 275 typedef enum 276 { 277 VIF_SOUND_B, // B_STEREO_A2 278 VIF_SOUND_B_NICAM, // B_MONO_NICAM 279 VIF_SOUND_GH, //GH_STEREO_A2 280 VIF_SOUND_GH_NICAM, // GH_MONO_NICAM 281 VIF_SOUND_I, 282 VIF_SOUND_DK1, // DK1_STEREO_A2 283 VIF_SOUND_DK2, // DK2_STEREO_A2 284 VIF_SOUND_DK3, // DK3_STEREO_A2 285 VIF_SOUND_DK_NICAM, // DK_MONO_NICAM 286 VIF_SOUND_L, 287 VIF_SOUND_LL, 288 VIF_SOUND_MN, 289 VIF_SOUND_NUMS 290 }VIFSoundSystem; 291 292 typedef enum 293 { 294 IF_FREQ_3395, // SECAM-L' 295 IF_FREQ_3800, // PAL 296 IF_FREQ_3890, // PAL 297 IF_FREQ_3950, // only for PAL-I 298 IF_FREQ_4575, // NTSC-M/N 299 IF_FREQ_5875, // NTSC-M/N 300 IF_FREQ_NUMS 301 }IfFrequencyType; 302 303 typedef enum 304 { 305 FREQ_VHF_L, 306 FREQ_VHF_H, 307 FREQ_UHF, 308 FREQ_RANGE_NUMS 309 }FrequencyBand; 310 311 typedef struct 312 { 313 BYTE VifTop; 314 BYTE VifIfBaseFreq; 315 BYTE VifTunerStepSize; 316 BYTE VifSawArch; 317 WORD VifVgaMaximum; 318 WORD VifVgaMinimum; 319 WORD GainDistributionThr; 320 BYTE VifAgcVgaBase; 321 BYTE VifAgcVgaOffs; 322 BYTE VifAgcRefNegative; 323 BYTE VifAgcRefPositive; 324 BYTE VifDagc1Ref; 325 BYTE VifDagc2Ref; 326 WORD VifDagc1GainOv; 327 WORD VifDagc2GainOv; 328 BYTE VifCrKf1; 329 BYTE VifCrKp1; 330 BYTE VifCrKi1; 331 BYTE VifCrKp2; 332 BYTE VifCrKi2; 333 BYTE VifCrKp; 334 BYTE VifCrKi; 335 WORD VifCrLockThr; 336 WORD VifCrThr; 337 DWORD VifCrLockNum; 338 DWORD VifCrUnlockNum; 339 WORD VifCrPdErrMax; 340 BOOL VifCrLockLeakySel; 341 BOOL VifCrPdX2; 342 BOOL VifCrLpfSel; 343 BOOL VifCrPdModeSel; 344 BOOL VifCrKpKiAdjust; 345 BYTE VifCrKpKiAdjustGear; 346 BYTE VifCrKpKiAdjustThr1; 347 BYTE VifCrKpKiAdjustThr2; 348 BYTE VifCrKpKiAdjustThr3; 349 BOOL VifDynamicTopAdjust; 350 BYTE VifDynamicTopMin; 351 BOOL VifAmHumDetection; 352 BOOL VifClampgainClampSel; 353 BYTE VifClampgainSyncbottRef; 354 BYTE VifClampgainSyncheightRef; 355 BYTE VifClampgainKc; 356 BYTE VifClampgainKg; 357 BOOL VifClampgainClampOren; 358 BOOL VifClampgainGainOren; 359 WORD VifClampgainClampOvNegative; 360 WORD VifClampgainGainOvNegative; 361 WORD VifClampgainClampOvPositive; 362 WORD VifClampgainGainOvPositive; 363 BYTE VifClampgainClampMin; 364 BYTE VifClampgainClampMax; 365 BYTE VifClampgainGainMin; 366 BYTE VifClampgainGainMax; 367 WORD VifClampgainPorchCnt; 368 BYTE VifPeakingFilterB_VHF_L; 369 BYTE VifYcDelayFilterB_VHF_L; 370 BYTE VifGroupDelayFilterB_VHF_L; 371 BYTE VifPeakingFilterGH_VHF_L; 372 BYTE VifYcDelayFilterGH_VHF_L; 373 BYTE VifGroupDelayFilterGH_VHF_L; 374 BYTE VifPeakingFilterDK_VHF_L; 375 BYTE VifYcDelayFilterDK_VHF_L; 376 BYTE VifGroupDelayFilterDK_VHF_L; 377 BYTE VifPeakingFilterI_VHF_L; 378 BYTE VifYcDelayFilterI_VHF_L; 379 BYTE VifGroupDelayFilterI_VHF_L; 380 BYTE VifPeakingFilterL_VHF_L; 381 BYTE VifYcDelayFilterL_VHF_L; 382 BYTE VifGroupDelayFilterL_VHF_L; 383 BYTE VifPeakingFilterLL_VHF_L; 384 BYTE VifYcDelayFilterLL_VHF_L; 385 BYTE VifGroupDelayFilterLL_VHF_L; 386 BYTE VifPeakingFilterMN_VHF_L; 387 BYTE VifYcDelayFilterMN_VHF_L; 388 BYTE VifGroupDelayFilterMN_VHF_L; 389 BYTE VifPeakingFilterB_VHF_H; 390 BYTE VifYcDelayFilterB_VHF_H; 391 BYTE VifGroupDelayFilterB_VHF_H; 392 BYTE VifPeakingFilterGH_VHF_H; 393 BYTE VifYcDelayFilterGH_VHF_H; 394 BYTE VifGroupDelayFilterGH_VHF_H; 395 BYTE VifPeakingFilterDK_VHF_H; 396 BYTE VifYcDelayFilterDK_VHF_H; 397 BYTE VifGroupDelayFilterDK_VHF_H; 398 BYTE VifPeakingFilterI_VHF_H; 399 BYTE VifYcDelayFilterI_VHF_H; 400 BYTE VifGroupDelayFilterI_VHF_H; 401 BYTE VifPeakingFilterL_VHF_H; 402 BYTE VifYcDelayFilterL_VHF_H; 403 BYTE VifGroupDelayFilterL_VHF_H; 404 BYTE VifPeakingFilterLL_VHF_H; 405 BYTE VifYcDelayFilterLL_VHF_H; 406 BYTE VifGroupDelayFilterLL_VHF_H; 407 BYTE VifPeakingFilterMN_VHF_H; 408 BYTE VifYcDelayFilterMN_VHF_H; 409 BYTE VifGroupDelayFilterMN_VHF_H; 410 BYTE VifPeakingFilterB_UHF; 411 BYTE VifYcDelayFilterB_UHF; 412 BYTE VifGroupDelayFilterB_UHF; 413 BYTE VifPeakingFilterGH_UHF; 414 BYTE VifYcDelayFilterGH_UHF; 415 BYTE VifGroupDelayFilterGH_UHF; 416 BYTE VifPeakingFilterDK_UHF; 417 BYTE VifYcDelayFilterDK_UHF; 418 BYTE VifGroupDelayFilterDK_UHF; 419 BYTE VifPeakingFilterI_UHF; 420 BYTE VifYcDelayFilterI_UHF; 421 BYTE VifGroupDelayFilterI_UHF; 422 BYTE VifPeakingFilterL_UHF; 423 BYTE VifYcDelayFilterL_UHF; 424 BYTE VifGroupDelayFilterL_UHF; 425 BYTE VifPeakingFilterLL_UHF; 426 BYTE VifYcDelayFilterLL_UHF; 427 BYTE VifGroupDelayFilterLL_UHF; 428 BYTE VifPeakingFilterMN_UHF; 429 BYTE VifYcDelayFilterMN_UHF; 430 BYTE VifGroupDelayFilterMN_UHF; 431 BYTE ChinaDescramblerBox; 432 BYTE VifDelayReduce; 433 BOOL VifOverModulation; 434 BOOL VifOverModulationDetect; 435 BOOL VifACIDetect; 436 BOOL VifSeriousACIDetect; 437 BYTE VifACIAGCREF; 438 BYTE VifADCOverflowAGCREF; 439 BYTE VifChanelScanAGCREF; 440 BYTE VifACIDetTHR1; 441 BYTE VifACIDetTHR2; 442 BYTE VifACIDetTHR3; 443 BYTE VifACIDetTHR4; 444 BYTE VifFreqBand; 445 WORD VifSos21FilterC0; 446 WORD VifSos21FilterC1; 447 WORD VifSos21FilterC2; 448 WORD VifSos21FilterC3; 449 WORD VifSos21FilterC4; 450 WORD VifSos22FilterC0; 451 WORD VifSos22FilterC1; 452 WORD VifSos22FilterC2; 453 WORD VifSos22FilterC3; 454 WORD VifSos22FilterC4; 455 WORD VifSos31FilterC0; 456 WORD VifSos31FilterC1; 457 WORD VifSos31FilterC2; 458 WORD VifSos31FilterC3; 459 WORD VifSos31FilterC4; 460 WORD VifSos32FilterC0; 461 WORD VifSos32FilterC1; 462 WORD VifSos32FilterC2; 463 WORD VifSos32FilterC3; 464 WORD VifSos32FilterC4; 465 BYTE VifTunerType; 466 DWORD VifCrRate_B; 467 BOOL VifCrInvert_B; 468 DWORD VifCrRate_GH; 469 BOOL VifCrInvert_GH; 470 DWORD VifCrRate_DK; 471 BOOL VifCrInvert_DK; 472 DWORD VifCrRate_I; 473 BOOL VifCrInvert_I; 474 DWORD VifCrRate_L; 475 BOOL VifCrInvert_L; 476 DWORD VifCrRate_LL; 477 BOOL VifCrInvert_LL; 478 DWORD VifCrRate_MN; 479 BOOL VifCrInvert_MN; 480 BYTE VifReserve; 481 }VIFInitialIn; 482 483 typedef enum 484 { 485 VIF_PARA_USER_FILTER, // VIFUserFilter 486 VIF_PARA_TOP, // DWORD 487 VIF_PARA_LEAKY_SEL, // DWORD 488 VIF_PARA_K_SEL, // DWORD 489 VIF_PARA_GET_VERSION, // U8[30] return 490 VIF_PARA_SET_BYPASS_PEAKING_SOS21, // DWORD 491 VIF_PARA_GET_PGA2_LEVEL, // BYTE return 492 VIF_PARA_GET_IF, // WORD return 493 VIF_PARA_GET_K_SEL, // BYTE return 494 VIF_PARA_SET_HW_KPKI, // DWORD 495 VIF_PARA_SET_TAGC_ODMODE, // DWORD 496 VIF_PARA_SET_NOTCH_A1A2, // VIFNotchA1A2: please set user notch after setting sound system to overwrite default values 497 VIF_PARA_SET_SOS_1112, // VIFSOS1112: please set user SOS after setting sound system to overwrite default values 498 VIF_PARA_GET_PD_INV, // BYTE return 499 VIF_PARA_SET_PD_INV, // DWORD 500 VIF_PARA_GET_VGA, //WORD return 501 VIF_PARA_SET_CLAMPGAIN_GAIN_OV_POS, // DWORD 502 VIF_PARA_SET_CLAMPGAIN_GAIN_OV_NEG, // DWORD 503 VIF_PARA_SET_AGC_K, //DWORD; B3[0]: enable user steady agc_k, B2[2~0]: user steady agc_value, B1[0]: enable user non steady agc_k, B0[2~0]: user non steady agc_value 504 VIF_PARA_SET_AGC_REF, //DWORD 505 VIF_PARA_SET_IF_RATE_FM, //DWORD 506 VIF_PARA_SET_CR_RATE_FM, //DWORD 507 VIF_PARA_SET_DESCRAMBLERBOX_DELAY, //DWORD 508 VIF_PARA_SET_SSC_ENABLE, //DWORD 509 VIF_PARA_SET_DISABLE_ADAGC, 510 VIF_PARA_SET_ENABLE_SOS33, 511 VIF_PARA_GROUP_NUMS 512 }VIF_PARA_GROUP; 513 514 515 typedef enum 516 { 517 PK_START=1, 518 PK_B_VHF_L=PK_START, //PeakingFilterB_VHF_L, 519 PK_GH_VHF_L, //PeakingFilterGH_VHF_L, 520 PK_DK_VHF_L, //PeakingFilterDK_VHF_L, 521 PK_I_VHF_L, //PeakingFilterI_VHF_L, 522 PK_L_VHF_L, //PeakingFilterL_VHF_L, 523 PK_LL_VHF_L, //PeakingFilterLL_VHF_L, 524 PK_MN_VHF_L, //PeakingFilterMN_VHF_L, 525 PK_B_VHF_H, //PeakingFilterB_VHF_H, 526 PK_GH_VHF_H, //PeakingFilterGH_VHF_H, 527 PK_DK_VHF_H, //PeakingFilterDK_VHF_H, 528 PK_I_VHF_H, //PeakingFilterI_VHF_H, 529 PK_L_VHF_H, //PeakingFilterL_VHF_H, 530 PK_LL_VHF_H, //PeakingFilterLL_VHF_H, 531 PK_MN_VHF_H, //PeakingFilterMN_VHF_H, 532 PK_B_UHF, //PeakingFilterB_UHF, 533 PK_GH_UHF, //PeakingFilterGH_UHF, 534 PK_DK_UHF, //PeakingFilterDK_UHF, 535 PK_I_UHF, //PeakingFilterI_UHF, 536 PK_L_UHF, //PeakingFilterL_UHF, 537 PK_LL_UHF, //PeakingFilterLL_UHF, 538 PK_MN_UHF, //PeakingFilterMN_UHF, 539 PK_END=PK_MN_UHF, 540 541 YC_START, 542 YC_B_VHF_L=YC_START, //YcDelayFilterB_VHF_L, 543 YC_GH_VHF_L, //YcDelayFilterGH_VHF_L, 544 YC_DK_VHF_L, //YcDelayFilterDK_VHF_L, 545 YC_I_VHF_L, //YcDelayFilterI_VHF_L, 546 YC_L_VHF_L, //YcDelayFilterL_VHF_L, 547 YC_LL_VHF_L, //YcDelayFilterLL_VHF_L, 548 YC_MN_VHF_L, //YcDelayFilterMN_VHF_L, 549 YC_B_VHF_H, //YcDelayFilterB_VHF_H, 550 YC_GH_VHF_H, //YcDelayFilterGH_VHF_H, 551 YC_DK_VHF_H, //YcDelayFilterDK_VHF_H, 552 YC_I_VHF_H, //YcDelayFilterI_VHF_H, 553 YC_L_VHF_H, //YcDelayFilterL_VHF_H, 554 YC_LL_VHF_H, //YcDelayFilterLL_VHF_H, 555 YC_MN_VHF_H, //YcDelayFilterMN_VHF_H, 556 YC_B_UHF, //YcDelayFilterB_UHF, 557 YC_GH_UHF, //YcDelayFilterGH_UHF, 558 YC_DK_UHF, //YcDelayFilterDK_UHF, 559 YC_I_UHF, //YcDelayFilterI_UHF, 560 YC_L_UHF, //YcDelayFilterL_UHF, 561 YC_LL_UHF, //YcDelayFilterLL_UHF, 562 YC_MN_UHF, //YcDelayFilterMN_UHF, 563 YC_END=YC_MN_UHF, 564 565 GP_START, 566 GP_B_VHF_L=GP_START, //GroupDelayFilterB_VHF_L, 567 GP_GH_VHF_L, //GroupDelayFilterGH_VHF_L, 568 GP_DK_VHF_L, //GroupDelayFilterDK_VHF_L, 569 GP_I_VHF_L, //GroupDelayFilterI_VHF_L, 570 GP_L_VHF_L, //GroupDelayFilterL_VHF_L, 571 GP_LL_VHF_L, //GroupDelayFilterLL_VHF_L, 572 GP_MN_VHF_L, //GroupDelayFilterMN_VHF_L, 573 GP_B_VHF_H, //GroupDelayFilterB_VHF_H, 574 GP_GH_VHF_H, //GroupDelayFilterGH_VHF_H, 575 GP_DK_VHF_H, //GroupDelayFilterDK_VHF_H, 576 GP_I_VHF_H, //GroupDelayFilterI_VHF_H, 577 GP_L_VHF_H, //GroupDelayFilterL_VHF_H, 578 GP_LL_VHF_H, //GroupDelayFilterLL_VHF_H, 579 GP_MN_VHF_H, //GroupDelayFilterMN_VHF_H, 580 GP_B_UHF, //GroupDelayFilterB_UHF, 581 GP_GH_UHF, //GroupDelayFilterGH_UHF, 582 GP_DK_UHF, //GroupDelayFilterDK_UHF, 583 GP_I_UHF, //GroupDelayFilterI_UHF, 584 GP_L_UHF, //GroupDelayFilterL_UHF, 585 GP_LL_UHF, //GroupDelayFilterLL_UHF, 586 GP_MN_UHF, //GroupDelayFilterMN_UHF, 587 GP_END=GP_MN_UHF, 588 589 VIF_USER_FILTER_SELECT_NUMS 590 }VIF_USER_FILTER_SELECT; 591 592 typedef struct 593 { 594 WORD VifSos21FilterC0; 595 WORD VifSos21FilterC1; 596 WORD VifSos21FilterC2; 597 WORD VifSos21FilterC3; 598 WORD VifSos21FilterC4; 599 WORD VifSos22FilterC0; 600 WORD VifSos22FilterC1; 601 WORD VifSos22FilterC2; 602 WORD VifSos22FilterC3; 603 WORD VifSos22FilterC4; 604 WORD VifSos31FilterC0; 605 WORD VifSos31FilterC1; 606 WORD VifSos31FilterC2; 607 WORD VifSos31FilterC3; 608 WORD VifSos31FilterC4; 609 WORD VifSos32FilterC0; 610 WORD VifSos32FilterC1; 611 WORD VifSos32FilterC2; 612 WORD VifSos32FilterC3; 613 WORD VifSos32FilterC4; 614 //WORD VifSos33FilterC0; 615 //WORD VifSos33FilterC1; 616 //WORD VifSos33FilterC2; 617 //WORD VifSos33FilterC3; 618 //WORD VifSos33FilterC4; 619 BYTE VifUserPeakingFilterSelect; 620 BYTE VifUserYcDelayFilterSelect; 621 BYTE VifUserGroupDelayFilterSelect; 622 }VIFUserFilter; 623 624 typedef struct 625 { 626 WORD Vif_N_A1_C0; 627 WORD Vif_N_A1_C1; 628 WORD Vif_N_A1_C2; 629 WORD Vif_N_A2_C0; 630 WORD Vif_N_A2_C1; 631 WORD Vif_N_A2_C2; 632 }VIFNotchA1A2; 633 634 typedef struct 635 { 636 WORD Vif_SOS_11_C0; 637 WORD Vif_SOS_11_C1; 638 WORD Vif_SOS_11_C2; 639 WORD Vif_SOS_11_C3; 640 WORD Vif_SOS_11_C4; 641 WORD Vif_SOS_12_C0; 642 WORD Vif_SOS_12_C1; 643 WORD Vif_SOS_12_C2; 644 WORD Vif_SOS_12_C3; 645 WORD Vif_SOS_12_C4; 646 }VIFSOS1112; 647 648 typedef struct 649 { 650 WORD Vif_SOS_33_C0; 651 WORD Vif_SOS_33_C1; 652 WORD Vif_SOS_33_C2; 653 WORD Vif_SOS_33_C3; 654 WORD Vif_SOS_33_C4; 655 }VIFSOS33; 656 657 //**************************************************************************** 658 // Public functions. 659 //**************************************************************************** 660 //------------------------------------------------------------------------------------------------- 661 /// Check VIF version 662 /// @ingroup VIF_BASIC 663 /// @return TRUE : succeed 664 /// @return FALSE : fail 665 //------------------------------------------------------------------------------------------------- 666 // INTERFACE void DRV_VIF_Version(void); 667 //------------------------------------------------------------------------------------------------- 668 /// VIF Set Clock 669 /// @ingroup VIF_BASIC 670 /// @param bEnable \b IN: 0:means enable 671 /// @return TRUE : succeed 672 /// @return FALSE : fail 673 //------------------------------------------------------------------------------------------------- 674 INTERFACE void DRV_VIF_SetClock(BOOL bEnable); 675 //------------------------------------------------------------------------------------------------- 676 /// Initialize VIF setting (any register access should be after this function) 677 /// @ingroup VIF_BASIC 678 /// @param pVIF_InitData \b IN: init data 679 /// @param u32InitDataLen \b IN: init data size 680 /// @return TRUE : succeed 681 /// @return FALSE : fail 682 //------------------------------------------------------------------------------------------------- 683 INTERFACE void DRV_VIF_Init(VIFInitialIn * pVIF_InitData, DWORD u32InitDataLen); 684 //------------------------------------------------------------------------------------------------- 685 /// VIF Software Reset 686 /// @ingroup VIF_Basic 687 /// @return TRUE : succeed 688 /// @return FALSE : fail 689 //------------------------------------------------------------------------------------------------- 690 INTERFACE void DRV_VIF_Reset(void); 691 //------------------------------------------------------------------------------------------------- 692 /// VIF Software Exit 693 /// @ingroup VIF_Basic 694 /// @return TRUE : succeed 695 /// @return FALSE : fail 696 //------------------------------------------------------------------------------------------------- 697 INTERFACE void DRV_VIF_Exit(void); 698 //------------------------------------------------------------------------------------------------- 699 /// VIF Handler (monitor all VIF functions) 700 /// @ingroup VIF_Basic 701 /// @param bAutoScan \b IN: init data 702 /// @return TRUE : succeed 703 /// @return FALSE : fail 704 //------------------------------------------------------------------------------------------------- 705 INTERFACE void DRV_VIF_Handler(BOOL bAutoScan); 706 //------------------------------------------------------------------------------------------------- 707 /// VIF Set Sound System 708 /// @ingroup VIF_Basic 709 /// @param ucSoundSystem \b IN: VIFSoundSystems 710 /// @return TRUE : succeed 711 /// @return FALSE : fail 712 //------------------------------------------------------------------------------------------------- 713 INTERFACE void DRV_VIF_SetSoundSystem(VIFSoundSystem ucSoundSystem); 714 //------------------------------------------------------------------------------------------------- 715 /// VIF Set IF Frequnecy 716 /// @ingroup VIF_Basic 717 /// @param u16IfFreq \b IN: IF Frequency 718 /// @return TRUE : succeed 719 /// @return FALSE : fail 720 //------------------------------------------------------------------------------------------------- 721 INTERFACE void DRV_VIF_SetIfFreq(IfFrequencyType u16IfFreq); 722 //------------------------------------------------------------------------------------------------- 723 /// VIF Read CR FOE 724 /// @ingroup VIF_Basic 725 /// @return TRUE : CR_FOE 726 /// @return FALSE : 0, fail 727 //------------------------------------------------------------------------------------------------- 728 INTERFACE U8 DRV_VIF_Read_CR_FOE(void); 729 //------------------------------------------------------------------------------------------------- 730 /// VIF Read CR Lock Status 731 /// @ingroup VIF_Basic 732 /// @return TRUE : CR_LOCK_STATUS 733 /// @return FALSE : 0, fail 734 //------------------------------------------------------------------------------------------------- 735 INTERFACE U8 DRV_VIF_Read_CR_LOCK_STATUS(void); 736 //------------------------------------------------------------------------------------------------- 737 /// VIF Bypass DBB Audio Filter (A_DAGC_SEL) 738 /// @ingroup VIF_Task 739 /// @param bEnable \b IN: bEnable 740 /// @return TRUE : 1, input from a_lpf_up 741 /// @return FALSE : 0, input from a_sos 742 //------------------------------------------------------------------------------------------------- 743 INTERFACE void DRV_VIF_BypassDBBAudioFilter(BOOL bEnable); 744 //------------------------------------------------------------------------------------------------- 745 /// VIF Set Frquency Band 746 /// @ingroup VIF_Basic 747 /// @param u8FreqBand \b IN: frequency band 748 /// @return TRUE : VifFreqBand 749 /// @return FALSE : 0 750 //------------------------------------------------------------------------------------------------- 751 INTERFACE void DRV_VIF_SetFreqBand(FrequencyBand u8FreqBand); 752 //------------------------------------------------------------------------------------------------- 753 /// VIF Get Input Level Indicator 754 /// @ingroup VIF_Task 755 /// @return TRUE : succeed 756 /// @return FALSE : fail 757 //------------------------------------------------------------------------------------------------- 758 INTERFACE BOOL DRV_VIF_GetInputLevelIndicator(void); 759 //------------------------------------------------------------------------------------------------- 760 /// VIF Set Parameters 761 /// @ingroup VIF_Task 762 /// @param paraGroup \b IN: Parameters Group 763 /// @param pVIF_Para \b IN: Parameters 764 /// @param u32DataLen \b IN: Data Length 765 /// @return TRUE : succeed 766 /// @return FALSE : fail 767 //------------------------------------------------------------------------------------------------- 768 INTERFACE BOOL DRV_VIF_SetParameter(VIF_PARA_GROUP paraGroup, void * pVIF_Para, DWORD u32DataLen); 769 //------------------------------------------------------------------------------------------------- 770 /// VIF Set Shift Clock 771 /// @ingroup VIF_Task 772 /// @param VifShiftClk \b IN: 0 (42MHz, 140MHz), 1(44.4MHz, 148MHz), 2(43.2MHz, 142MHz) 773 /// @return TRUE : succeed 774 /// @return FALSE : fail 775 //------------------------------------------------------------------------------------------------- 776 INTERFACE void DRV_VIF_ShiftClk(BYTE VifShiftClk); 777 //------------------------------------------------------------------------------------------------- 778 /// VIF Set Power State 779 /// @ingroup VIF_Task 780 /// @param u16PowerState \b IN: Power State 781 /// @return TRUE : succeed 782 /// @return FALSE : fail 783 //------------------------------------------------------------------------------------------------- 784 INTERFACE MS_U32 MDrv_VIF_SetPowerState(EN_POWER_MODE u16PowerState); 785 //------------------------------------------------------------------------------------------------- 786 /// VIF Write Byte 787 /// @ingroup VIF_Basic 788 /// @param u32Reg \b IN: Register address 789 /// @param u8Val \b IN: Value 790 /// @return TRUE : succeed 791 /// @return FALSE : fail 792 //------------------------------------------------------------------------------------------------- 793 INTERFACE void DRV_VIF_WriteByte(U32 u32Reg, U8 u8Val ); 794 //------------------------------------------------------------------------------------------------- 795 /// VIF Read Byte 796 /// @ingroup VIF_Basic 797 /// @param u32Reg \b IN: Register address 798 /// @return TRUE : succeed 799 /// @return FALSE : fail 800 //------------------------------------------------------------------------------------------------- 801 INTERFACE U8 DRV_VIF_ReadByte(U32 u32Reg ); 802 #undef INTERFACE 803 804 #ifdef __cplusplus 805 } 806 #endif 807 808 #endif //_DRVVIF_H_ 809