1*53ee8cc1Swenshuai.xi //////////////////////////////////////////////////////////////////////////////// 2*53ee8cc1Swenshuai.xi // 3*53ee8cc1Swenshuai.xi // Copyright (c) 2008-2009 MStar Semiconductor, Inc. 4*53ee8cc1Swenshuai.xi // All rights reserved. 5*53ee8cc1Swenshuai.xi // 6*53ee8cc1Swenshuai.xi // Unless otherwise stipulated in writing, any and all information contained 7*53ee8cc1Swenshuai.xi // herein regardless in any format shall remain the sole proprietary of 8*53ee8cc1Swenshuai.xi // MStar Semiconductor Inc. and be kept in strict confidence 9*53ee8cc1Swenshuai.xi // ("MStar Confidential Information") by the recipient. 10*53ee8cc1Swenshuai.xi // Any unauthorized act including without limitation unauthorized disclosure, 11*53ee8cc1Swenshuai.xi // copying, use, reproduction, sale, distribution, modification, disassembling, 12*53ee8cc1Swenshuai.xi // reverse engineering and compiling of the contents of MStar Confidential 13*53ee8cc1Swenshuai.xi // Information is unlawful and strictly prohibited. MStar hereby reserves the 14*53ee8cc1Swenshuai.xi // rights to any and all damages, losses, costs and expenses resulting therefrom. 15*53ee8cc1Swenshuai.xi // 16*53ee8cc1Swenshuai.xi //////////////////////////////////////////////////////////////////////////////// 17*53ee8cc1Swenshuai.xi 18*53ee8cc1Swenshuai.xi /////////////////////////////////////////////////////////////////////////////////////////////////// 19*53ee8cc1Swenshuai.xi /// 20*53ee8cc1Swenshuai.xi /// @file drvMSPI.h 21*53ee8cc1Swenshuai.xi /// @brief Master SPI Driver Interface 22*53ee8cc1Swenshuai.xi /// @author MStar Semiconductor Inc. 23*53ee8cc1Swenshuai.xi /////////////////////////////////////////////////////////////////////////////////////////////////// 24*53ee8cc1Swenshuai.xi 25*53ee8cc1Swenshuai.xi /*! \defgroup G_MSPI MSPI interface 26*53ee8cc1Swenshuai.xi * \ingroup G_PERIPHERAL 27*53ee8cc1Swenshuai.xi 28*53ee8cc1Swenshuai.xi \brief 29*53ee8cc1Swenshuai.xi 30*53ee8cc1Swenshuai.xi MSPI is a synchronous serial interface and can connect to a variety of external device. 31*53ee8cc1Swenshuai.xi 32*53ee8cc1Swenshuai.xi <b>Features</b> 33*53ee8cc1Swenshuai.xi 34*53ee8cc1Swenshuai.xi - Generic SPI protocol with half duplex 35*53ee8cc1Swenshuai.xi - Supports Motorola SPI compatible timing(CPHA/CPOL) 36*53ee8cc1Swenshuai.xi - 8-Byte write buffer and 8-Byte read buffer 37*53ee8cc1Swenshuai.xi - Configurable Bit width from one bit to 8 bits in a byte transfer 38*53ee8cc1Swenshuai.xi - Supports up to 8 slave device select signals 39*53ee8cc1Swenshuai.xi - Supports 3-wire mode 40*53ee8cc1Swenshuai.xi - Supports an internal RIU (Register Interface Unit) interface. RIU is an in-house protocol of MSTAR 41*53ee8cc1Swenshuai.xi 42*53ee8cc1Swenshuai.xi <b>MSPI Block Diagram</b> \n 43*53ee8cc1Swenshuai.xi \image html drvMSPI_pic.png 44*53ee8cc1Swenshuai.xi 45*53ee8cc1Swenshuai.xi \defgroup G_MSPI_INIT Initialization Task relative 46*53ee8cc1Swenshuai.xi \ingroup G_MSPI 47*53ee8cc1Swenshuai.xi \defgroup G_MSPI_COMMON Common Task relative 48*53ee8cc1Swenshuai.xi \ingroup G_MSPI 49*53ee8cc1Swenshuai.xi *! \defgroup G_MSPI_CONTROL Control relative 50*53ee8cc1Swenshuai.xi * \ingroup G_MSPI 51*53ee8cc1Swenshuai.xi *! \defgroup G_MSPI_OTHER other relative 52*53ee8cc1Swenshuai.xi * \ingroup G_MSPI 53*53ee8cc1Swenshuai.xi \defgroup G_MSPI_ToBeModified MSPI api to be modified 54*53ee8cc1Swenshuai.xi \ingroup G_MSPI 55*53ee8cc1Swenshuai.xi \defgroup G_MSPI_ToBeRemove MSPI api to be removed 56*53ee8cc1Swenshuai.xi \ingroup G_MSPI 57*53ee8cc1Swenshuai.xi */ 58*53ee8cc1Swenshuai.xi 59*53ee8cc1Swenshuai.xi 60*53ee8cc1Swenshuai.xi 61*53ee8cc1Swenshuai.xi #ifndef _DRV_MSPI_H_ 62*53ee8cc1Swenshuai.xi #define _DRV_MSPI_H_ 63*53ee8cc1Swenshuai.xi #include "MsCommon.h" 64*53ee8cc1Swenshuai.xi 65*53ee8cc1Swenshuai.xi 66*53ee8cc1Swenshuai.xi #ifdef __cplusplus 67*53ee8cc1Swenshuai.xi extern "C" 68*53ee8cc1Swenshuai.xi { 69*53ee8cc1Swenshuai.xi #endif 70*53ee8cc1Swenshuai.xi 71*53ee8cc1Swenshuai.xi #include "MsTypes.h" 72*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 73*53ee8cc1Swenshuai.xi // Driver Capability 74*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 75*53ee8cc1Swenshuai.xi 76*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 77*53ee8cc1Swenshuai.xi // Macro and Define 78*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 79*53ee8cc1Swenshuai.xi #define MSPI_UTOPIA20 (0) 80*53ee8cc1Swenshuai.xi #define MSPI_READ_OPERATION 0 81*53ee8cc1Swenshuai.xi #define MSPI_WRITE_OPERATION 1 82*53ee8cc1Swenshuai.xi #define MSPI_CMD_TYPE 3 83*53ee8cc1Swenshuai.xi 84*53ee8cc1Swenshuai.xi // config bit map 85*53ee8cc1Swenshuai.xi #define MSPI_DC_CONFIG 1 86*53ee8cc1Swenshuai.xi #define MSPI_CLK_CONFIG 2 87*53ee8cc1Swenshuai.xi #define MSPI_FRAME_CONFIG 4 88*53ee8cc1Swenshuai.xi 89*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 90*53ee8cc1Swenshuai.xi // Type and Structure 91*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 92*53ee8cc1Swenshuai.xi typedef struct 93*53ee8cc1Swenshuai.xi { 94*53ee8cc1Swenshuai.xi MS_U8 u8TrStart; //time from trigger to first SPI clock 95*53ee8cc1Swenshuai.xi MS_U8 u8TrEnd; //time from last SPI clock to transferred done 96*53ee8cc1Swenshuai.xi MS_U8 u8TB; //time between byte to byte transfer 97*53ee8cc1Swenshuai.xi MS_U8 u8TRW; //time between last write and first read 98*53ee8cc1Swenshuai.xi } MSPI_DCConfig; 99*53ee8cc1Swenshuai.xi 100*53ee8cc1Swenshuai.xi typedef struct 101*53ee8cc1Swenshuai.xi { 102*53ee8cc1Swenshuai.xi MS_U8 u8WBitConfig[7]; //bits will be transferred in write buffer 103*53ee8cc1Swenshuai.xi MS_U8 u8RBitConfig[7]; //bits Will be transferred in read buffer 104*53ee8cc1Swenshuai.xi } MSPI_FrameConfig; 105*53ee8cc1Swenshuai.xi 106*53ee8cc1Swenshuai.xi 107*53ee8cc1Swenshuai.xi typedef struct 108*53ee8cc1Swenshuai.xi { 109*53ee8cc1Swenshuai.xi MS_U8 U8Clock; 110*53ee8cc1Swenshuai.xi MS_BOOL BClkPolarity; 111*53ee8cc1Swenshuai.xi MS_BOOL BClkPhase; 112*53ee8cc1Swenshuai.xi MS_U32 u32MAXClk; 113*53ee8cc1Swenshuai.xi } MSPI_CLKConfig; 114*53ee8cc1Swenshuai.xi 115*53ee8cc1Swenshuai.xi typedef struct 116*53ee8cc1Swenshuai.xi { 117*53ee8cc1Swenshuai.xi MSPI_DCConfig tMSPI_DCConfig[MSPI_CMD_TYPE]; 118*53ee8cc1Swenshuai.xi MSPI_FrameConfig tMSPI_FrameConfig[MSPI_CMD_TYPE]; 119*53ee8cc1Swenshuai.xi MSPI_CLKConfig tMSPI_ClockConfig[MSPI_CMD_TYPE]; 120*53ee8cc1Swenshuai.xi MS_U8 U8ChipSel; 121*53ee8cc1Swenshuai.xi MS_BOOL BLsbFirst; 122*53ee8cc1Swenshuai.xi void (*MSPIIntHandler)(void); // interrupt handler 123*53ee8cc1Swenshuai.xi MS_BOOL BIntEnable; // interrupt mode enable or polling mode 124*53ee8cc1Swenshuai.xi MS_U8 U8BitMapofConfig[MSPI_CMD_TYPE]; 125*53ee8cc1Swenshuai.xi MS_U32 u32DevId; 126*53ee8cc1Swenshuai.xi } MSPI_config; 127*53ee8cc1Swenshuai.xi 128*53ee8cc1Swenshuai.xi typedef struct 129*53ee8cc1Swenshuai.xi { 130*53ee8cc1Swenshuai.xi MS_U16 PadCs; 131*53ee8cc1Swenshuai.xi }stMSPI_csPdCfg; 132*53ee8cc1Swenshuai.xi typedef enum _MSPI_ERRORNOn 133*53ee8cc1Swenshuai.xi { 134*53ee8cc1Swenshuai.xi E_MSPI_OK = 0 135*53ee8cc1Swenshuai.xi ,E_MSPI_INIT_FLOW_ERROR =1 136*53ee8cc1Swenshuai.xi ,E_MSPI_DCCONFIG_ERROR =2 137*53ee8cc1Swenshuai.xi ,E_MSPI_CLKCONFIG_ERROR =4 138*53ee8cc1Swenshuai.xi ,E_MSPI_FRAMECONFIG_ERROR =8 139*53ee8cc1Swenshuai.xi ,E_MSPI_OPERATION_ERROR = 0x10 140*53ee8cc1Swenshuai.xi ,E_MSPI_PARAM_OVERFLOW = 0x20 141*53ee8cc1Swenshuai.xi ,E_MSPI_MMIO_ERROR = 0x40 142*53ee8cc1Swenshuai.xi ,E_MSPI_HW_NOT_SUPPORT = 0x80 143*53ee8cc1Swenshuai.xi ,E_MSPI_NULL 144*53ee8cc1Swenshuai.xi }MSPI_ErrorNo; 145*53ee8cc1Swenshuai.xi 146*53ee8cc1Swenshuai.xi typedef enum 147*53ee8cc1Swenshuai.xi { 148*53ee8cc1Swenshuai.xi E_MSPI_DBGLV_NONE, //disable all the debug message 149*53ee8cc1Swenshuai.xi E_MSPI_DBGLV_INFO, //information 150*53ee8cc1Swenshuai.xi E_MSPI_DBGLV_NOTICE, //normal but significant condition 151*53ee8cc1Swenshuai.xi E_MSPI_DBGLV_WARNING, //warning conditions 152*53ee8cc1Swenshuai.xi E_MSPI_DBGLV_ERR, //error conditions 153*53ee8cc1Swenshuai.xi E_MSPI_DBGLV_CRIT, //critical conditions 154*53ee8cc1Swenshuai.xi E_MSPI_DBGLV_ALERT, //action must be taken immediately 155*53ee8cc1Swenshuai.xi E_MSPI_DBGLV_EMERG, //system is unusable 156*53ee8cc1Swenshuai.xi E_MSPI_DBGLV_DEBUG, //debug-level messages 157*53ee8cc1Swenshuai.xi } MSPI_DbgLv; 158*53ee8cc1Swenshuai.xi 159*53ee8cc1Swenshuai.xi //////////////////////////////////////////////////////////////////////////////// 160*53ee8cc1Swenshuai.xi // include utopia v2 header files here 161*53ee8cc1Swenshuai.xi //////////////////////////////////////////////////////////////////////////////// 162*53ee8cc1Swenshuai.xi #include "drvMSPI_v2.h" 163*53ee8cc1Swenshuai.xi 164*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 165*53ee8cc1Swenshuai.xi // Function and Variable 166*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 167*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 168*53ee8cc1Swenshuai.xi /// @ingroup G_MSPI_INIT 169*53ee8cc1Swenshuai.xi /// Description : MSPI initial EXt 170*53ee8cc1Swenshuai.xi /// @return E_MSPI_OK : 171*53ee8cc1Swenshuai.xi /// @return >1 : failed to initial 172*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 173*53ee8cc1Swenshuai.xi MSPI_ErrorNo MDrv_MSPI_Init_Ext(MS_U8 u8HWNum); // ToBeRemove 174*53ee8cc1Swenshuai.xi 175*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 176*53ee8cc1Swenshuai.xi /// @ingroup G_MSPI_INIT 177*53ee8cc1Swenshuai.xi /// Description : MSPI initial 178*53ee8cc1Swenshuai.xi /// @return E_MSPI_OK : 179*53ee8cc1Swenshuai.xi /// @return >1 : failed to initial 180*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 181*53ee8cc1Swenshuai.xi // MSPI_ErrorNo MDrv_MSPI_Init(MSPI_config *tMSPIConfig, MS_U8 u8HWNum); 182*53ee8cc1Swenshuai.xi 183*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 184*53ee8cc1Swenshuai.xi /// @ingroup G_MSPI_COMMON 185*53ee8cc1Swenshuai.xi /// Description : read data from MSPI 186*53ee8cc1Swenshuai.xi /// @param pData \b IN :pointer to receive data from MSPI read buffer 187*53ee8cc1Swenshuai.xi /// @param u16Size \ b OTU : read data size 188*53ee8cc1Swenshuai.xi /// @return the errorno of operation 189*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 190*53ee8cc1Swenshuai.xi MSPI_ErrorNo MDrv_MSPI_Read(MS_U8 *pData, MS_U16 u16Size); 191*53ee8cc1Swenshuai.xi 192*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 193*53ee8cc1Swenshuai.xi /// @ingroup G_MSPI_COMMON 194*53ee8cc1Swenshuai.xi /// Description : read data from MSPI 195*53ee8cc1Swenshuai.xi /// @param pData \b OUT :pointer to write data to MSPI write buffer 196*53ee8cc1Swenshuai.xi /// @param u16Size \ b OTU : write data size 197*53ee8cc1Swenshuai.xi /// @return the errorno of operation 198*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 199*53ee8cc1Swenshuai.xi MSPI_ErrorNo MDrv_MSPI_Write(MS_U8 *pData, MS_U16 u16Size); 200*53ee8cc1Swenshuai.xi 201*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 202*53ee8cc1Swenshuai.xi /// @ingroup G_MSPI_ToBeRemove 203*53ee8cc1Swenshuai.xi /// Description : config spi transfer timing 204*53ee8cc1Swenshuai.xi /// @param ptDCConfig \b OUT struct pointer of transfer timing config 205*53ee8cc1Swenshuai.xi /// @return E_MSPI_OK : succeed 206*53ee8cc1Swenshuai.xi /// @return E_MSPI_DCCONFIG_ERROR : failed to config transfer timing 207*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 208*53ee8cc1Swenshuai.xi MSPI_ErrorNo MDrv_MSPI_DCConfig(MSPI_DCConfig *ptDCConfig); // ToBeRemove 209*53ee8cc1Swenshuai.xi 210*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 211*53ee8cc1Swenshuai.xi /// @ingroup G_MSPI_ToBeRemove 212*53ee8cc1Swenshuai.xi /// Description : config spi clock setting 213*53ee8cc1Swenshuai.xi /// @param ptCLKConfig \b OUT struct pointer of clock config 214*53ee8cc1Swenshuai.xi /// @return E_MSPI_OK : succeed 215*53ee8cc1Swenshuai.xi /// @return E_MSPI_CLKCONFIG_ERROR : failed to config spi clock 216*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 217*53ee8cc1Swenshuai.xi MSPI_ErrorNo MDrv_MSPI_CLKConfig(MSPI_CLKConfig *ptCLKConfig); // ToBeRemove 218*53ee8cc1Swenshuai.xi 219*53ee8cc1Swenshuai.xi 220*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 221*53ee8cc1Swenshuai.xi /// @ingroup G_MSPI_ToBeRemove 222*53ee8cc1Swenshuai.xi /// Description : config spi transfer timing 223*53ee8cc1Swenshuai.xi /// @param ptDCConfig \b OUT struct pointer of bits of buffer tranferred to slave config 224*53ee8cc1Swenshuai.xi /// @return E_MSPI_OK : succeed 225*53ee8cc1Swenshuai.xi /// @return E_MSPI_FRAMECONFIG_ERROR : failed to config transfered bit per buffer 226*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 227*53ee8cc1Swenshuai.xi MSPI_ErrorNo MDrv_MSPI_FRAMEConfig(MSPI_FrameConfig *ptFrameConfig); // ToBeRemove 228*53ee8cc1Swenshuai.xi 229*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 230*53ee8cc1Swenshuai.xi /// Description : Enable Slave device 231*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 232*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 233*53ee8cc1Swenshuai.xi /// @ingroup G_MSPI_COMMON 234*53ee8cc1Swenshuai.xi /// Description : read data from MSPI 235*53ee8cc1Swenshuai.xi /// @param pData \b IN :pointer to receive data from MSPI read buffer 236*53ee8cc1Swenshuai.xi /// @param u16Size \ b OTU : read data size 237*53ee8cc1Swenshuai.xi /// @return the errorno of operation 238*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 239*53ee8cc1Swenshuai.xi void MDrv_MSPI_SlaveEnable(MS_BOOL Enable); 240*53ee8cc1Swenshuai.xi 241*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 242*53ee8cc1Swenshuai.xi /// Description : 243*53ee8cc1Swenshuai.xi /// @return TRUE : chip support 244*53ee8cc1Swenshuai.xi /// @return FALSE: 245*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------ 246*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 247*53ee8cc1Swenshuai.xi /// @ingroup G_MSPI_COMMON 248*53ee8cc1Swenshuai.xi /// Description : read data from MSPI 249*53ee8cc1Swenshuai.xi /// @param pData \b IN :pointer to receive data from MSPI read buffer 250*53ee8cc1Swenshuai.xi /// @param u16Size \ b OTU : read data size 251*53ee8cc1Swenshuai.xi /// @return the errorno of operation 252*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 253*53ee8cc1Swenshuai.xi // MS_BOOL MDrv_MSPI_HW_Support(void); 254*53ee8cc1Swenshuai.xi 255*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 256*53ee8cc1Swenshuai.xi /// @ingroup G_MSPI_COMMON 257*53ee8cc1Swenshuai.xi /// Description : read data from MSPI 258*53ee8cc1Swenshuai.xi /// @param pData \b IN :pointer to receive data from MSPI read buffer 259*53ee8cc1Swenshuai.xi /// @param u16Size \ b OTU : read data size 260*53ee8cc1Swenshuai.xi /// @return the errorno of operation 261*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 262*53ee8cc1Swenshuai.xi MS_U32 MDrv_MSPI_SetPowerState(EN_POWER_MODE enPowerState); 263*53ee8cc1Swenshuai.xi 264*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 265*53ee8cc1Swenshuai.xi /// @ingroup G_MSPI_COMMON 266*53ee8cc1Swenshuai.xi /// Description : read data from MSPI 267*53ee8cc1Swenshuai.xi /// @param pData \b IN :pointer to receive data from MSPI read buffer 268*53ee8cc1Swenshuai.xi /// @param u16Size \ b OTU : read data size 269*53ee8cc1Swenshuai.xi /// @return the errorno of operation 270*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 271*53ee8cc1Swenshuai.xi MS_BOOL MDrv_MSPI_SetDbgLevel(MS_U8 u8DbgLevel); 272*53ee8cc1Swenshuai.xi 273*53ee8cc1Swenshuai.xi //================================================================== 274*53ee8cc1Swenshuai.xi // Master SPI API with slave device id to support multiple slave device 275*53ee8cc1Swenshuai.xi //================================================================== 276*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 277*53ee8cc1Swenshuai.xi /// @ingroup G_MSPI_INIT 278*53ee8cc1Swenshuai.xi /// Description : read data from MSPI 279*53ee8cc1Swenshuai.xi /// @param pData \b IN :pointer to receive data from MSPI read buffer 280*53ee8cc1Swenshuai.xi /// @param u16Size \ b OTU : read data size 281*53ee8cc1Swenshuai.xi /// @return the errorno of operation 282*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 283*53ee8cc1Swenshuai.xi // MSPI_ErrorNo MDrv_MasterSPI_Init(MSPI_config *tMSPIConfig, MS_U8 u8HWNum); 284*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 285*53ee8cc1Swenshuai.xi /// @ingroup G_MSPI_COMMON 286*53ee8cc1Swenshuai.xi /// Description : read data from MSPI 287*53ee8cc1Swenshuai.xi /// @param pData \b IN :pointer to receive data from MSPI read buffer 288*53ee8cc1Swenshuai.xi /// @param u16Size \ b OTU : read data size 289*53ee8cc1Swenshuai.xi /// @return the errorno of operation 290*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 291*53ee8cc1Swenshuai.xi // MSPI_ErrorNo MDrv_MasterSPI_Read(MS_U32 u32DevID, MS_U8 *pData, MS_U16 u16Size); 292*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 293*53ee8cc1Swenshuai.xi /// @ingroup G_MSPI_COMMON 294*53ee8cc1Swenshuai.xi /// Description : read data from MSPI 295*53ee8cc1Swenshuai.xi /// @param pData \b IN :pointer to receive data from MSPI read buffer 296*53ee8cc1Swenshuai.xi /// @param u16Size \ b OTU : read data size 297*53ee8cc1Swenshuai.xi /// @return the errorno of operation 298*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 299*53ee8cc1Swenshuai.xi // MSPI_ErrorNo MDrv_MasterSPI_Write(MS_U32 u32DevID, MS_U8 *pData, MS_U16 u16Size); 300*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 301*53ee8cc1Swenshuai.xi /// MOBF Encrypt 302*53ee8cc1Swenshuai.xi /// @ingroup G_MSPI_ToBeRemove 303*53ee8cc1Swenshuai.xi /// @param u32Key \b IN: Key 304*53ee8cc1Swenshuai.xi /// @param bEnable \b IN: TRUE/FLASE 305*53ee8cc1Swenshuai.xi /// @return DRVAESDMA_OK : Success 306*53ee8cc1Swenshuai.xi /// @return Others : Fail 307*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 308*53ee8cc1Swenshuai.xi // MSPI_ErrorNo MDrv_MasterSPI_DCConfig(MS_U32 u32DevID, MSPI_DCConfig *ptDCConfig); // ToBeRemove 309*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 310*53ee8cc1Swenshuai.xi /// MOBF Encrypt 311*53ee8cc1Swenshuai.xi /// @ingroup G_MSPI_ToBeRemove 312*53ee8cc1Swenshuai.xi /// @param u32Key \b IN: Key 313*53ee8cc1Swenshuai.xi /// @param bEnable \b IN: TRUE/FLASE 314*53ee8cc1Swenshuai.xi /// @return DRVAESDMA_OK : Success 315*53ee8cc1Swenshuai.xi /// @return Others : Fail 316*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 317*53ee8cc1Swenshuai.xi // MSPI_ErrorNo MDrv_MasterSPI_CLKConfig(MS_U32 u32DevID, MSPI_CLKConfig *ptCLKConfig); // ToBeRemove 318*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 319*53ee8cc1Swenshuai.xi /// MOBF Encrypt 320*53ee8cc1Swenshuai.xi /// @ingroup G_MSPI_ToBeRemove 321*53ee8cc1Swenshuai.xi /// @param u32Key \b IN: Key 322*53ee8cc1Swenshuai.xi /// @param bEnable \b IN: TRUE/FLASE 323*53ee8cc1Swenshuai.xi /// @return DRVAESDMA_OK : Success 324*53ee8cc1Swenshuai.xi /// @return Others : Fail 325*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 326*53ee8cc1Swenshuai.xi // MSPI_ErrorNo MDrv_MasterSPI_FRAMEConfig(MS_U32 u32DevID, MSPI_FrameConfig *ptFrameConfig); // ToBeRemove 327*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 328*53ee8cc1Swenshuai.xi /// @ingroup G_MSPI_COMMON 329*53ee8cc1Swenshuai.xi /// Description : read data from MSPI 330*53ee8cc1Swenshuai.xi /// @param pData \b IN :pointer to receive data from MSPI read buffer 331*53ee8cc1Swenshuai.xi /// @param u16Size \ b OTU : read data size 332*53ee8cc1Swenshuai.xi /// @return the errorno of operation 333*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 334*53ee8cc1Swenshuai.xi // MSPI_ErrorNo MDrv_MasterSPI_SlaveEnable(MS_U32 u32DevID, MS_BOOL Enable); 335*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 336*53ee8cc1Swenshuai.xi /// MOBF Encrypt 337*53ee8cc1Swenshuai.xi /// @ingroup G_MSPI_ToBeRemove 338*53ee8cc1Swenshuai.xi /// @param u32Key \b IN: Key 339*53ee8cc1Swenshuai.xi /// @param bEnable \b IN: TRUE/FLASE 340*53ee8cc1Swenshuai.xi /// @return DRVAESDMA_OK : Success 341*53ee8cc1Swenshuai.xi /// @return Others : Fail 342*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 343*53ee8cc1Swenshuai.xi MS_BOOL MDrv_MasterSPI_CsPadConfig(MS_U32 u32DevID, MS_U32 u32CsPad); // ToBeRemove 344*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 345*53ee8cc1Swenshuai.xi /// MOBF Encrypt 346*53ee8cc1Swenshuai.xi /// @ingroup G_MSPI_ToBeRemove 347*53ee8cc1Swenshuai.xi /// @param u32Key \b IN: Key 348*53ee8cc1Swenshuai.xi /// @param bEnable \b IN: TRUE/FLASE 349*53ee8cc1Swenshuai.xi /// @return DRVAESDMA_OK : Success 350*53ee8cc1Swenshuai.xi /// @return Others : Fail 351*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 352*53ee8cc1Swenshuai.xi MS_BOOL MDrv_MasterSPI_MaxClkConfig(MS_U32 u32DevID, MS_U32 u32MaxClk); // ToBeRemove 353*53ee8cc1Swenshuai.xi 354*53ee8cc1Swenshuai.xi #ifdef __cplusplus 355*53ee8cc1Swenshuai.xi } 356*53ee8cc1Swenshuai.xi #endif 357*53ee8cc1Swenshuai.xi 358*53ee8cc1Swenshuai.xi #endif // _DRV_MSPI_H_ 359*53ee8cc1Swenshuai.xi 360