xref: /utopia/UTPA2-700.0.x/projects/tmplib/include/drvMPIF.h (revision 53ee8cc121a030b8d368113ac3e966b4705770ef)
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94*53ee8cc1Swenshuai.xi 
95*53ee8cc1Swenshuai.xi ///
96*53ee8cc1Swenshuai.xi /// @file   drvMPIF.h
97*53ee8cc1Swenshuai.xi /// @brief  MPIF Driver Interface
98*53ee8cc1Swenshuai.xi /// @author MStar Semiconductor Inc.
99*53ee8cc1Swenshuai.xi ///////////////////////////////////////////////////////////////////////////////////////////////////
100*53ee8cc1Swenshuai.xi 
101*53ee8cc1Swenshuai.xi #ifndef _DRV_MPIF_H_
102*53ee8cc1Swenshuai.xi #define _DRV_MPIF_H_
103*53ee8cc1Swenshuai.xi 
104*53ee8cc1Swenshuai.xi #include "MsCommon.h"
105*53ee8cc1Swenshuai.xi 
106*53ee8cc1Swenshuai.xi #ifdef __cplusplus
107*53ee8cc1Swenshuai.xi extern "C"
108*53ee8cc1Swenshuai.xi {
109*53ee8cc1Swenshuai.xi #endif
110*53ee8cc1Swenshuai.xi 
111*53ee8cc1Swenshuai.xi 
112*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
113*53ee8cc1Swenshuai.xi //  Driver Capability
114*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
115*53ee8cc1Swenshuai.xi 
116*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
117*53ee8cc1Swenshuai.xi //  Macro and Define
118*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
119*53ee8cc1Swenshuai.xi #define MSIF_MPIF_TAG                          {'M','S','I','F'}    //Version ID header
120*53ee8cc1Swenshuai.xi #define MSIF_MPIF_CLASS                        {'1','0'}            //info Class code
121*53ee8cc1Swenshuai.xi #define MSIF_MPIF_CUS                          0x6666               //Customer ID
122*53ee8cc1Swenshuai.xi #define MSIF_MPIF_MOD                          0x0000               //Module ID
123*53ee8cc1Swenshuai.xi #define MSIF_MPIF_CHIP                         0x000F               //CHIP ID: T3
124*53ee8cc1Swenshuai.xi #define MSIF_MPIF_CPU                          '1'                  //CPU
125*53ee8cc1Swenshuai.xi #define MSIF_MPIF_LIB_CODE                     {'M','P','I','F'}    //Lib code
126*53ee8cc1Swenshuai.xi #define MSIF_MPIF_LIBVER                       {'0','2'}            //LIB version
127*53ee8cc1Swenshuai.xi #define MSIF_MPIF_BUILDNUM                     {'0','3'}            //Build Number
128*53ee8cc1Swenshuai.xi #define MSIF_MPIF_CHANGELIST                   {'0','0','5','6','7','4','8','0'} //P4 ChangeList Number
129*53ee8cc1Swenshuai.xi #define MSIF_MPIF_OS                           '0'                  //OS
130*53ee8cc1Swenshuai.xi 
131*53ee8cc1Swenshuai.xi #define     MPIF_DRV_VERSION                  /* Character String for DRV/API version             */  \
132*53ee8cc1Swenshuai.xi             MSIF_MPIF_TAG,                         /* 'MSIF'                                           */  \
133*53ee8cc1Swenshuai.xi             MSIF_MPIF_CLASS,                       /* '00'                                             */  \
134*53ee8cc1Swenshuai.xi             MSIF_MPIF_CUS,                         /* 0x0000                                           */  \
135*53ee8cc1Swenshuai.xi             MSIF_MPIF_MOD,                         /* 0x0000                                           */  \
136*53ee8cc1Swenshuai.xi             MSIF_MPIF_CHIP,                                                                              \
137*53ee8cc1Swenshuai.xi             MSIF_MPIF_CPU,                                                                               \
138*53ee8cc1Swenshuai.xi             MSIF_MPIF_LIB_CODE,                    /* IP__                                             */  \
139*53ee8cc1Swenshuai.xi             MSIF_MPIF_LIBVER,                      /* 0.0 ~ Z.Z                                        */  \
140*53ee8cc1Swenshuai.xi             MSIF_MPIF_BUILDNUM,                    /* 00 ~ 99                                          */  \
141*53ee8cc1Swenshuai.xi             MSIF_MPIF_CHANGELIST,                  /* CL#                                              */  \
142*53ee8cc1Swenshuai.xi             MSIF_MPIF_OS
143*53ee8cc1Swenshuai.xi 
144*53ee8cc1Swenshuai.xi #define MPIF_TR_CYCLE_0T                                0
145*53ee8cc1Swenshuai.xi #define MPIF_TR_CYCLE_1T                                1
146*53ee8cc1Swenshuai.xi #define MPIF_TR_CYCLE_2T                                2
147*53ee8cc1Swenshuai.xi #define MPIF_TR_CYCLE_3T                                3
148*53ee8cc1Swenshuai.xi #define MPIF_TR_CYCLE_4T                                4
149*53ee8cc1Swenshuai.xi #define MPIF_TR_CYCLE_5T                                5
150*53ee8cc1Swenshuai.xi #define MPIF_TR_CYCLE_6T                                6
151*53ee8cc1Swenshuai.xi #define MPIF_TR_CYCLE_7T                                7
152*53ee8cc1Swenshuai.xi #define MPIF_TR_CYCLE_1A2X_SEL                            MPIF_TR_CYCLE_1T
153*53ee8cc1Swenshuai.xi #define MPIF_TR_CYCLE_3X4A_SEL                            MPIF_TR_CYCLE_1T
154*53ee8cc1Swenshuai.xi 
155*53ee8cc1Swenshuai.xi 
156*53ee8cc1Swenshuai.xi #define MPIF_WAIT_CYCLE_0T                                0
157*53ee8cc1Swenshuai.xi #define MPIF_WAIT_CYCLE_1T                                1
158*53ee8cc1Swenshuai.xi #define MPIF_WAIT_CYCLE_2T                                2
159*53ee8cc1Swenshuai.xi #define MPIF_WAIT_CYCLE_3T                                3
160*53ee8cc1Swenshuai.xi #define MPIF_WAIT_CYCLE_SEL                                MPIF_WAIT_CYCLE_1T
161*53ee8cc1Swenshuai.xi 
162*53ee8cc1Swenshuai.xi #define MPIF_SLAVE_DATAWIDTH_1bit                        0
163*53ee8cc1Swenshuai.xi #define MPIF_SLAVE_DATAWIDTH_2bit                        1
164*53ee8cc1Swenshuai.xi #define MPIF_SLAVE_DATAWIDTH_4bit                        2
165*53ee8cc1Swenshuai.xi #define MPIF_SLAVE_DATAWIDTH_8bit                        3
166*53ee8cc1Swenshuai.xi #define MPIF_SLAVE_DATAWIDTH_SEL                        MPIF_SLAVE_DATAWIDTH_1bit
167*53ee8cc1Swenshuai.xi 
168*53ee8cc1Swenshuai.xi #define MPIF_CMD_DATAWIDTH_1bit                            0
169*53ee8cc1Swenshuai.xi #define MPIF_CMD_DATAWIDTH_2bit                            1
170*53ee8cc1Swenshuai.xi #define MPIF_CMD_DATAWIDTH_4bit                            2
171*53ee8cc1Swenshuai.xi #define MPIF_CMD_DATAWIDTH_8bit                            3
172*53ee8cc1Swenshuai.xi #define MPIF_CMD_DATAWIDTH_SEL                            MPIF_CMD_DATAWIDTH_1bit
173*53ee8cc1Swenshuai.xi 
174*53ee8cc1Swenshuai.xi #define MPIF_LC1A_INDEX_0                                0x00
175*53ee8cc1Swenshuai.xi #define MPIF_LC1A_INDEX_1                                0x01
176*53ee8cc1Swenshuai.xi #define MPIF_LC1A_INDEX_2                                0x02
177*53ee8cc1Swenshuai.xi #define MPIF_LC1A_INDEX_3                                0x03
178*53ee8cc1Swenshuai.xi #define MPIF_LC1A_INDEX_4                                0x04
179*53ee8cc1Swenshuai.xi #define MPIF_LC1A_INDEX_5                                0x05
180*53ee8cc1Swenshuai.xi #define MPIF_LC1A_INDEX_6                                0x06
181*53ee8cc1Swenshuai.xi #define MPIF_LC1A_INDEX_7                                0x07
182*53ee8cc1Swenshuai.xi 
183*53ee8cc1Swenshuai.xi #define MPIF_2X_DEST_SPIF                                0
184*53ee8cc1Swenshuai.xi #define MPIF_2X_DEST_XIU                                1
185*53ee8cc1Swenshuai.xi 
186*53ee8cc1Swenshuai.xi #define MPIF_MAX_RTX_0                                    0x00    // 0 time
187*53ee8cc1Swenshuai.xi #define MPIF_MAX_RTX_1                                    0x01    // 1 times
188*53ee8cc1Swenshuai.xi #define MPIF_MAX_RTX_2                                    0x02    // 2 times
189*53ee8cc1Swenshuai.xi #define MPIF_MAX_RTX_3                                    0x03    // 3 times
190*53ee8cc1Swenshuai.xi #define MPIF_MAX_RTX_SEL                                MPIF_MAX_RTX_0
191*53ee8cc1Swenshuai.xi 
192*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
193*53ee8cc1Swenshuai.xi //  Type and Structure
194*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
195*53ee8cc1Swenshuai.xi typedef struct _MPIF_CONFIG
196*53ee8cc1Swenshuai.xi {
197*53ee8cc1Swenshuai.xi     MS_U8 u8trc_1A2X; //MPIF read/write turn around cycle for 1A/2X channel
198*53ee8cc1Swenshuai.xi     MS_U8 u8trc_3X4A; //MPIF read/write turn around cycle for 3X/4A channel
199*53ee8cc1Swenshuai.xi     MS_U8 u8wc; //MPIF wait ACK/NAK cycle
200*53ee8cc1Swenshuai.xi     MS_U8 u8Slave0Dw; //Slave 0 Data Width
201*53ee8cc1Swenshuai.xi     MS_U8 u8Slave1Dw; //Slave 1 Data Width
202*53ee8cc1Swenshuai.xi     MS_U8 u8Slave2Dw; //Slave 2 Data Width
203*53ee8cc1Swenshuai.xi     MS_U8 u8Slave3Dw; //Slave 3 Data Width
204*53ee8cc1Swenshuai.xi     MS_U8 u8CmdDw; //commend data width
205*53ee8cc1Swenshuai.xi }MPIF_CONFIG;
206*53ee8cc1Swenshuai.xi 
207*53ee8cc1Swenshuai.xi typedef struct _MPIF_3XCTL
208*53ee8cc1Swenshuai.xi {
209*53ee8cc1Swenshuai.xi     MS_BOOL bChkSum;
210*53ee8cc1Swenshuai.xi     MS_U8 u8rtx;
211*53ee8cc1Swenshuai.xi     MS_BOOL bFastMode;
212*53ee8cc1Swenshuai.xi     MS_U8 u8wcnt;
213*53ee8cc1Swenshuai.xi }MPIF_3XCTL;
214*53ee8cc1Swenshuai.xi 
215*53ee8cc1Swenshuai.xi typedef struct _MPIF_DrvStatus
216*53ee8cc1Swenshuai.xi {
217*53ee8cc1Swenshuai.xi     MS_BOOL bIsBusy;
218*53ee8cc1Swenshuai.xi }MPIF_DrvStatus;
219*53ee8cc1Swenshuai.xi 
220*53ee8cc1Swenshuai.xi #ifdef MPIF_SPI_SUPPORT
221*53ee8cc1Swenshuai.xi 
222*53ee8cc1Swenshuai.xi typedef struct _MPIF_SPI_CONFIG
223*53ee8cc1Swenshuai.xi {
224*53ee8cc1Swenshuai.xi     MS_U8 u8SerialMode;  //[0]: CPHA, [1]:CPOL
225*53ee8cc1Swenshuai.xi     MS_U8 u8LeadingCyc;
226*53ee8cc1Swenshuai.xi     MS_U8 u8TrailingCyc;
227*53ee8cc1Swenshuai.xi     MS_U8 u8CMDLen;
228*53ee8cc1Swenshuai.xi     MS_BOOL bSrcMIU;
229*53ee8cc1Swenshuai.xi     MS_U8 u8MIUSel;
230*53ee8cc1Swenshuai.xi } MPIF_SPI_CONFIG;
231*53ee8cc1Swenshuai.xi 
232*53ee8cc1Swenshuai.xi #endif
233*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
234*53ee8cc1Swenshuai.xi //  Function and Variable
235*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
236*53ee8cc1Swenshuai.xi 
237*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------
238*53ee8cc1Swenshuai.xi /// Description: Show the MPIF driver version
239*53ee8cc1Swenshuai.xi /// @param ppVersion  \b OUT  Library version string
240*53ee8cc1Swenshuai.xi /// @return TRUE : succeed
241*53ee8cc1Swenshuai.xi /// @return FALSE : failed to set the debug level
242*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------
243*53ee8cc1Swenshuai.xi // MS_BOOL MDrv_MPIF_GetLibVer(const MSIF_Version **ppVersion);
244*53ee8cc1Swenshuai.xi 
245*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------
246*53ee8cc1Swenshuai.xi /// Description: Get MPIF driver information
247*53ee8cc1Swenshuai.xi /// @return MPIF_CONFIG: mpif driver configuration informtion.
248*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------
249*53ee8cc1Swenshuai.xi // const MPIF_CONFIG* MDrv_MPIF_GetInfo(void);
250*53ee8cc1Swenshuai.xi 
251*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------
252*53ee8cc1Swenshuai.xi /// Description: Show MPIF driver status
253*53ee8cc1Swenshuai.xi /// @param pStatus  \b OUT  pointer to store status data
254*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------
255*53ee8cc1Swenshuai.xi // void MDrv_MPIF_GetStatus(MPIF_DrvStatus *pStatus);
256*53ee8cc1Swenshuai.xi 
257*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------
258*53ee8cc1Swenshuai.xi /// Set detailed level of MPIF driver debug message
259*53ee8cc1Swenshuai.xi /// @param u8DbgLevel  \b IN  debug level for MPIF driver
260*53ee8cc1Swenshuai.xi /// @return TRUE : succeed
261*53ee8cc1Swenshuai.xi /// @return FALSE : failed to set the debug level
262*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------
263*53ee8cc1Swenshuai.xi MS_BOOL MDrv_MPIF_SetDbgLevel(MS_U8 u8DbgLevel);
264*53ee8cc1Swenshuai.xi 
265*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
266*53ee8cc1Swenshuai.xi /// MPIF logical channel 1A read/write
267*53ee8cc1Swenshuai.xi /// @param bWite        \b IN : If writing, set to TRUE; if reading, set to FALSE.
268*53ee8cc1Swenshuai.xi /// @param u8slaveid      \b IN : Slave ID
269*53ee8cc1Swenshuai.xi /// @param u8index        \b IN : index of 1A channel
270*53ee8cc1Swenshuai.xi /// @param pu8data    \b IN/OUT : pointer which stored wrriten/read data
271*53ee8cc1Swenshuai.xi /// @return TRUE if successed or return FALSE if failed.
272*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
273*53ee8cc1Swenshuai.xi // void MDrv_MPIF_Init(MPIF_CONFIG* pcfg);
274*53ee8cc1Swenshuai.xi 
275*53ee8cc1Swenshuai.xi // void MDrv_MPIF_Uninit(void);
276*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
277*53ee8cc1Swenshuai.xi /// MPIF logical channel 1A read/write
278*53ee8cc1Swenshuai.xi /// @param bWrite      \b IN : If set to true, do writing; else do reading.
279*53ee8cc1Swenshuai.xi /// @param u8slaveid      \b IN : Slave ID
280*53ee8cc1Swenshuai.xi /// @param u8index        \b IN : index of 1A channel
281*53ee8cc1Swenshuai.xi /// @param pu8data    \b OUT : pointer which stored reading data or writing data
282*53ee8cc1Swenshuai.xi /// @return TRUE if successed or return FALSE if failed.
283*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
284*53ee8cc1Swenshuai.xi // MS_BOOL MDrv_MPIF_LC1A_RW(MS_U8 bWrite, MS_U8 u8slaveid, MS_U8 u8index, MS_U8 *pu8data);
285*53ee8cc1Swenshuai.xi 
286*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
287*53ee8cc1Swenshuai.xi /// MPIF set 2X path to be SPIF or XIU
288*53ee8cc1Swenshuai.xi /// @param u8slaveid      \b IN : Slave ID
289*53ee8cc1Swenshuai.xi /// @param u8path      \b IN : 2X path data
290*53ee8cc1Swenshuai.xi /// @return TRUE if successed or return FALSE if failed.
291*53ee8cc1Swenshuai.xi /// @note   Please always call this function before calling LC2X read/write function
292*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
293*53ee8cc1Swenshuai.xi // MS_BOOL MDrv_MPIF_Set_LC2XPath(MS_U8 u8slaveid, MS_U8 u8path);
294*53ee8cc1Swenshuai.xi 
295*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
296*53ee8cc1Swenshuai.xi /// MPIF logical channel 2A read/write
297*53ee8cc1Swenshuai.xi /// @param bWrite           \b IN : If set to TRUE, do writing; else do reading.
298*53ee8cc1Swenshuai.xi /// @param u8slaveid         \b IN : Slave ID
299*53ee8cc1Swenshuai.xi /// @param bchecksum         \b IN : If set to TRUE, do checksum enabled; else do checksum disabled.
300*53ee8cc1Swenshuai.xi /// @param u8rtx              \b IN : Re-transmit/receive count limit. 0~3 times.
301*53ee8cc1Swenshuai.xi /// @param u16addr            \b IN : Reading address
302*53ee8cc1Swenshuai.xi /// @param pu16data        \b OUT : Pointer to stored reading data. It's a visual address.
303*53ee8cc1Swenshuai.xi /// @return TRUE if successed or return FALSE if failed.
304*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
305*53ee8cc1Swenshuai.xi // MS_BOOL MDrv_MPIF_LC2A_RW(MS_U8 bWrite, MS_U8 u8slaveid, MS_BOOL bchecksum, MS_U8 u8rtx, MS_U16 u16addr, MS_U16* pu16data);
306*53ee8cc1Swenshuai.xi 
307*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
308*53ee8cc1Swenshuai.xi /// MPIF logical channel 2B read/write
309*53ee8cc1Swenshuai.xi /// @param bWrite           \b IN : If set to TRUE, do writing; else do reading.
310*53ee8cc1Swenshuai.xi /// @param u8slaveid         \b IN : Slave ID
311*53ee8cc1Swenshuai.xi /// @param bchecksum         \b IN : If set to TRUE, do checksum enabled; else do checksum disabled.
312*53ee8cc1Swenshuai.xi /// @param u8rtx              \b IN : Re-transmit/receive count limit. 0~3 times.
313*53ee8cc1Swenshuai.xi /// @param u16addr            \b IN : Reading address
314*53ee8cc1Swenshuai.xi /// @param pu16data        \b OUT : Pointer to stored reading data. It's a visual address.
315*53ee8cc1Swenshuai.xi /// @return TRUE if successed or return FALSE if failed.
316*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
317*53ee8cc1Swenshuai.xi // MS_BOOL MDrv_MPIF_LC2B_RW(MS_U8 bWrite, MS_U8 u8slaveid, MS_BOOL bchecksum, MS_U8 u8rtx, MS_U16 u16addr, MS_U16* pu16data);
318*53ee8cc1Swenshuai.xi 
319*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
320*53ee8cc1Swenshuai.xi /// MPIF logical channel 3A RIU mode ead/write
321*53ee8cc1Swenshuai.xi /// @param bWrite             \b IN : If set to true, do writing; else do reading.
322*53ee8cc1Swenshuai.xi /// @param u8slaveid         \b IN : Slave ID
323*53ee8cc1Swenshuai.xi /// @param u8datalen          \b IN : Data length. Unit by 16 bytes.
324*53ee8cc1Swenshuai.xi /// @param pu8data           \b IN/OUT : pointer to store writing/reading data. It's a visual address.
325*53ee8cc1Swenshuai.xi /// @param p3xctl           \b IN/OUT : pointer to store 3X control configure data
326*53ee8cc1Swenshuai.xi /// @return TRUE if successed or return FALSE if failed.
327*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
328*53ee8cc1Swenshuai.xi // MS_BOOL MDrv_MPIF_LC3A_RIURW(MS_BOOL bWrite, MS_U8 u8slaveid, MS_U8 u8datalen, MS_U8 *pu8data, MPIF_3XCTL *p3xctl);
329*53ee8cc1Swenshuai.xi 
330*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
331*53ee8cc1Swenshuai.xi /// MPIF logical channel 3B RIU mode read/write
332*53ee8cc1Swenshuai.xi /// @param bWrite             \b IN : If set to true, do writing; else do reading.
333*53ee8cc1Swenshuai.xi /// @param u8slaveid         \b IN : Slave ID
334*53ee8cc1Swenshuai.xi /// @param u8datalen          \b IN : Data length. Unit by 16 bytes.
335*53ee8cc1Swenshuai.xi /// @param pu8data           \b IN/OUT : pointer to store writing/reading data. It's a visual address.
336*53ee8cc1Swenshuai.xi /// @param p3xctl           \b IN/OUT : pointer to store 3X control configure data
337*53ee8cc1Swenshuai.xi /// @return TRUE if successed or return FALSE if failed.
338*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
339*53ee8cc1Swenshuai.xi // MS_BOOL MDrv_MPIF_LC3B_RIURW(MS_BOOL bWrite, MS_U8 u8slaveid, MS_U8 u8datalen, MS_U8 *pu8data, MPIF_3XCTL *p3xctl);
340*53ee8cc1Swenshuai.xi 
341*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
342*53ee8cc1Swenshuai.xi /// MPIF logical channel 3A MIU mode read/write
343*53ee8cc1Swenshuai.xi /// @param bWrite             \b IN : If set to true, do writing; else do reading.
344*53ee8cc1Swenshuai.xi /// @param u8slaveid         \b IN : Slave ID
345*53ee8cc1Swenshuai.xi /// @param u32datalen         \b IN : Data length. Unit by 16 bytes.
346*53ee8cc1Swenshuai.xi /// @param u32miu_addr     \b IN : MPIF MIU Start address. Unit is byte. Must be 8bytes aligmant.
347*53ee8cc1Swenshuai.xi /// @param u32spif_mdr     \b IN : SPIF MIU Start address. Unit is byte. Must be 8bytes aligmant.
348*53ee8cc1Swenshuai.xi /// @param p3xctl           \b IN/OUT : pointer to store 3X control configure data
349*53ee8cc1Swenshuai.xi /// @return TRUE if successed or return FALSE if failed.
350*53ee8cc1Swenshuai.xi /// @note   If using cache buffer, please do buffer flush first.
351*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
352*53ee8cc1Swenshuai.xi // MS_BOOL MDrv_MPIF_LC3A_MIURW(MS_BOOL bWrite, MS_U8 u8slaveid, MS_U32 u32datalen, MS_PHYADDR u32miu_addr, MS_PHYADDR u32spif_mdr, MPIF_3XCTL *p3xcfg);
353*53ee8cc1Swenshuai.xi 
354*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
355*53ee8cc1Swenshuai.xi /// MPIF logical channel 3B MIU mode read/write
356*53ee8cc1Swenshuai.xi /// @param bWrite             \b IN : If set to true, do writing; else do reading.
357*53ee8cc1Swenshuai.xi /// @param u8slaveid         \b IN : Slave ID
358*53ee8cc1Swenshuai.xi /// @param u32datalen         \b IN : Data length. Unit by 16 bytes.
359*53ee8cc1Swenshuai.xi /// @param u32miu_addr     \b IN : MPIF MIU Start address. Unit is byte. Must be 8bytes aligmant.
360*53ee8cc1Swenshuai.xi /// @param u32spif_mdr     \b IN : SPIF MIU Start address. Unit is byte. Must be 8bytes aligmant.
361*53ee8cc1Swenshuai.xi /// @param p3xctl           \b IN/OUT : pointer to store 3X control configure data
362*53ee8cc1Swenshuai.xi /// @return TRUE if successed or return FALSE if failed.
363*53ee8cc1Swenshuai.xi /// @note   If using cache buffer, please do buffer flush first.
364*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
365*53ee8cc1Swenshuai.xi // MS_BOOL MDrv_MPIF_LC3B_MIURW(MS_BOOL bWrite, MS_U8 u8slaveid, MS_U32 u32datalen, MS_PHYADDR u32miu_addr, MS_PHYADDR u32spif_mdr, MPIF_3XCTL *p3xcfg);
366*53ee8cc1Swenshuai.xi 
367*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
368*53ee8cc1Swenshuai.xi /// MPIF logical channel 3B MIU mode read/write
369*53ee8cc1Swenshuai.xi /// @param bWrite             \b IN : If set to true, do writing; else do reading.
370*53ee8cc1Swenshuai.xi /// @param u8slaveid         \b IN : Slave ID
371*53ee8cc1Swenshuai.xi /// @param u16datalen         \b IN : Data length. Unit by 16 bytes.
372*53ee8cc1Swenshuai.xi /// @param u32miu_addr     \b IN : MPIF MIU Start address. Unit is byte. Must be 8bytes aligmant.
373*53ee8cc1Swenshuai.xi /// @param u32spif_mdr     \b IN : SPIF MIU Start address. Unit is byte. Must be 8bytes aligmant.
374*53ee8cc1Swenshuai.xi /// @return TRUE if successed or return FALSE if failed.
375*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
376*53ee8cc1Swenshuai.xi // MS_BOOL MDrv_MPIF_LC4A_MIURW(MS_BOOL bWrite, MS_U8 u8slaveid, MS_U16 u16datalen, MS_PHYADDR u32miu_addr, MS_PHYADDR u32spif_mdr);
377*53ee8cc1Swenshuai.xi 
378*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
379*53ee8cc1Swenshuai.xi /// MPIF printf SPIF's configure information
380*53ee8cc1Swenshuai.xi /// @param u8slaveid         \b IN : Slave ID
381*53ee8cc1Swenshuai.xi /// @return TRUE if successed or return FALSE if failed.
382*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
383*53ee8cc1Swenshuai.xi // MS_BOOL MDrv_MPIF_Print_SPIFCfgInfo(MS_U8 u8slaveid);
384*53ee8cc1Swenshuai.xi 
385*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
386*53ee8cc1Swenshuai.xi /// MPIF Set commend and slave data-width
387*53ee8cc1Swenshuai.xi /// @param u8slaveid         \b IN : Slave ID
388*53ee8cc1Swenshuai.xi /// @param u8cmdwidth     \b IN : Commend data width
389*53ee8cc1Swenshuai.xi /// @param u8datawidth     \b IN : Slave data width
390*53ee8cc1Swenshuai.xi /// @return TRUE if successed or return FALSE if failed.
391*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
392*53ee8cc1Swenshuai.xi // MS_BOOL MDrv_MPIF_SetCmdDataMode(MS_U8 u8slaveid, MS_U8 u8cmdwidth, MS_U8 u8datawidth);
393*53ee8cc1Swenshuai.xi 
394*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
395*53ee8cc1Swenshuai.xi /// MPIF Set Clock
396*53ee8cc1Swenshuai.xi /// @param u8slaveid                 \b IN : Slave ID
397*53ee8cc1Swenshuai.xi /// @param u8clk                          \b IN : Select MPIF clock
398*53ee8cc1Swenshuai.xi /// @param u8slaveClkInvDlyNum     \b IN : Slave Delay buffer number. (0~15)
399*53ee8cc1Swenshuai.xi /// @return TRUE if successed or return FALSE if failed.
400*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
401*53ee8cc1Swenshuai.xi // MS_BOOL MDrv_MPIF_Set_Clock(MS_U8 u8slaveid, MS_U8 u8clk, MS_U8 u8slaveClkInvDlyNum);
402*53ee8cc1Swenshuai.xi 
403*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
404*53ee8cc1Swenshuai.xi /// MPIF Clock Disable or Enable
405*53ee8cc1Swenshuai.xi /// @param bDisabled                 \b IN : If true, enable MPIF clock; if false, disable MPIF clock
406*53ee8cc1Swenshuai.xi /// @return TRUE if successed or return FALSE if failed.
407*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
408*53ee8cc1Swenshuai.xi // MS_BOOL MDrv_MPIF_Clock_Disable(MS_BOOL bDisabled);
409*53ee8cc1Swenshuai.xi 
410*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
411*53ee8cc1Swenshuai.xi /// MPIF Set Slave Clock Invers delay
412*53ee8cc1Swenshuai.xi /// @param u8slaveid         \b IN : Slave ID
413*53ee8cc1Swenshuai.xi /// @param u8DlyBufNum     \b IN : Delay buffer number. (0~15)
414*53ee8cc1Swenshuai.xi /// @return TRUE if successed or return FALSE if failed.
415*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
416*53ee8cc1Swenshuai.xi // MS_BOOL MDrv_MPIF_SetSlave_ClkInv_Delay(MS_U8 u8slaveid, MS_U8 u8DlyBufNum);
417*53ee8cc1Swenshuai.xi 
418*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
419*53ee8cc1Swenshuai.xi /// MPIF Set Slave turn around cycle and wait ack cycle
420*53ee8cc1Swenshuai.xi /// @param u8slaveid         \b IN : Slave ID
421*53ee8cc1Swenshuai.xi /// @param u8trc             \b IN : Turn around cycle. (0T~3T)
422*53ee8cc1Swenshuai.xi /// @param u8wt             \b IN : Wait ACK cycle. (0T~3T)
423*53ee8cc1Swenshuai.xi /// @return TRUE if successed or return FALSE if failed.
424*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
425*53ee8cc1Swenshuai.xi // MS_BOOL MDrv_MPIF_SetSlave_Trc_Wt(MS_U8 u8slaveid, MS_U8 u8trc, MS_U8 u8wt);
426*53ee8cc1Swenshuai.xi 
427*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
428*53ee8cc1Swenshuai.xi /// MPIF Set Slave Clock delay
429*53ee8cc1Swenshuai.xi /// @param u8slaveid         \b IN : Slave ID
430*53ee8cc1Swenshuai.xi /// @param u8DlyBufNum     \b IN : Delay buffer number. (0~15)
431*53ee8cc1Swenshuai.xi /// @return TRUE if successed or return FALSE if failed.
432*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
433*53ee8cc1Swenshuai.xi // MS_BOOL MDrv_MPIF_SetSlave_Clk_Delay(MS_U8 u8slaveid, MS_U8 u8DlyBufNum);
434*53ee8cc1Swenshuai.xi 
435*53ee8cc1Swenshuai.xi #ifdef MPIF_SPI_SUPPORT
436*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
437*53ee8cc1Swenshuai.xi /// Configure MPIF SPI mode
438*53ee8cc1Swenshuai.xi /// @param u8slaveid             \b IN : Slave ID
439*53ee8cc1Swenshuai.xi /// @param pcfg                  \b IN  pointer stored configure data
440*53ee8cc1Swenshuai.xi /// @return TRUE if successed or return FALSE if failed.
441*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
442*53ee8cc1Swenshuai.xi // struct MPIF_SPI_CONFIG must sync to HAL struct HAL_MPIF_SPI_CONFIG
443*53ee8cc1Swenshuai.xi MS_BOOL MDrv_MPIF_SPI_Configure(MS_U8 u8slaveid, MPIF_SPI_CONFIG* pcfg);
444*53ee8cc1Swenshuai.xi 
445*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
446*53ee8cc1Swenshuai.xi /// Use SPI RIU mode to read flash ID
447*53ee8cc1Swenshuai.xi /// @param bWrite                 \b IN : If TRUE, it is write data mode, otherwise is read data mode
448*53ee8cc1Swenshuai.xi /// @param pu32cmd             \b IN : pointer stored commend
449*53ee8cc1Swenshuai.xi /// @param u8cmdlen             \b IN : commend length to write
450*53ee8cc1Swenshuai.xi /// @param pudata            \b IN/OUT : pointer to store write/read data
451*53ee8cc1Swenshuai.xi /// @param u16datalen             \b IN : data length to write/read
452*53ee8cc1Swenshuai.xi /// @return TRUE if successed or return FALSE if failed.
453*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
454*53ee8cc1Swenshuai.xi MS_BOOL MDrv_MPIF_SPI_RIU_RWData(MS_BOOL bWrite, MS_U32 *pu32cmd, MS_U8 u8cmdlen, MS_U8 *pudata, MS_U16 u16datalen);
455*53ee8cc1Swenshuai.xi 
456*53ee8cc1Swenshuai.xi 
457*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
458*53ee8cc1Swenshuai.xi /// Use SPI RIU mode to read flash ID
459*53ee8cc1Swenshuai.xi /// @param bWrite                 \b IN : If TRUE, it is write data mode, otherwise is read data mode
460*53ee8cc1Swenshuai.xi /// @param pu32cmd             \b IN : pointer stored commend
461*53ee8cc1Swenshuai.xi /// @param u8cmdlen             \b IN : commend length to write
462*53ee8cc1Swenshuai.xi /// @param u32MiuAddr        \b IN : MIU write/read base address
463*53ee8cc1Swenshuai.xi /// @param u16datalen             \b IN : data length to write/read
464*53ee8cc1Swenshuai.xi /// @return TRUE if successed or return FALSE if failed.
465*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
466*53ee8cc1Swenshuai.xi MS_BOOL MDrv_MPIF_SPI_MIU_RWData(MS_BOOL bWrite, MS_U32 *pu32cmd, MS_U8 u8cmdlen, MS_PHYADDR u32MiuAddr, MS_U16 u16datalen);
467*53ee8cc1Swenshuai.xi 
468*53ee8cc1Swenshuai.xi 
469*53ee8cc1Swenshuai.xi #endif //MPIF_SPI_SUPPORT
470*53ee8cc1Swenshuai.xi 
471*53ee8cc1Swenshuai.xi #ifdef __cplusplus
472*53ee8cc1Swenshuai.xi }
473*53ee8cc1Swenshuai.xi #endif
474*53ee8cc1Swenshuai.xi 
475*53ee8cc1Swenshuai.xi #endif // _DRV_MPIF_H_
476