1*53ee8cc1Swenshuai.xi #ifndef _DRVIRTX_H_ 2*53ee8cc1Swenshuai.xi #define _DRVIRTX_H_ 3*53ee8cc1Swenshuai.xi 4*53ee8cc1Swenshuai.xi #ifdef __cplusplus 5*53ee8cc1Swenshuai.xi extern "C" 6*53ee8cc1Swenshuai.xi { 7*53ee8cc1Swenshuai.xi #endif 8*53ee8cc1Swenshuai.xi 9*53ee8cc1Swenshuai.xi #include "MsTypes.h" 10*53ee8cc1Swenshuai.xi #include "MsDevice.h" 11*53ee8cc1Swenshuai.xi 12*53ee8cc1Swenshuai.xi #define IRTX_UTOPIA20 (1) 13*53ee8cc1Swenshuai.xi 14*53ee8cc1Swenshuai.xi typedef enum _IRTX_Result 15*53ee8cc1Swenshuai.xi { 16*53ee8cc1Swenshuai.xi 17*53ee8cc1Swenshuai.xi IRTX_FAIL = 0 18*53ee8cc1Swenshuai.xi ,IRTX_OK = 1 19*53ee8cc1Swenshuai.xi ,IRTX_TIMEOUT 20*53ee8cc1Swenshuai.xi ,IRTX_QUEUE_FULL 21*53ee8cc1Swenshuai.xi ,IRTX_BUSY 22*53ee8cc1Swenshuai.xi }IRTX_Result; 23*53ee8cc1Swenshuai.xi 24*53ee8cc1Swenshuai.xi 25*53ee8cc1Swenshuai.xi //////////////////////////////////////////////////////// 26*53ee8cc1Swenshuai.xi 27*53ee8cc1Swenshuai.xi typedef struct _IRTX_TRIGGER_PARAM 28*53ee8cc1Swenshuai.xi { 29*53ee8cc1Swenshuai.xi 30*53ee8cc1Swenshuai.xi }IRTX_TRIGGER_PARAM, *PIRTX_TRIGGER_PARAM; 31*53ee8cc1Swenshuai.xi 32*53ee8cc1Swenshuai.xi typedef struct _IRTX_SETSTATUS_PARAM 33*53ee8cc1Swenshuai.xi { 34*53ee8cc1Swenshuai.xi MS_U16 Status; 35*53ee8cc1Swenshuai.xi }IRTX_SETSTATUS_PARAM, *PIRTX_SETSTATUS_PARAM; 36*53ee8cc1Swenshuai.xi 37*53ee8cc1Swenshuai.xi 38*53ee8cc1Swenshuai.xi typedef struct _IRTX_SETMEMSTATUS_PARAM 39*53ee8cc1Swenshuai.xi { 40*53ee8cc1Swenshuai.xi MS_U16 Status; 41*53ee8cc1Swenshuai.xi }IRTX_SETMEMSTATUS_PARAM, *PIRTX_SETMEMSTATUS_PARAM; 42*53ee8cc1Swenshuai.xi 43*53ee8cc1Swenshuai.xi 44*53ee8cc1Swenshuai.xi typedef struct _IRTX_SETCLKDIV_PARAM 45*53ee8cc1Swenshuai.xi { 46*53ee8cc1Swenshuai.xi MS_U8 Div; 47*53ee8cc1Swenshuai.xi }IRTX_SETCLKDIV_PARAM, *PIRTX_SETCLKDIV_PARAM; 48*53ee8cc1Swenshuai.xi 49*53ee8cc1Swenshuai.xi 50*53ee8cc1Swenshuai.xi typedef struct _IRTX_SETDELAYCLKTIME_PARAM 51*53ee8cc1Swenshuai.xi { 52*53ee8cc1Swenshuai.xi MS_U16 CycleTime_H; 53*53ee8cc1Swenshuai.xi MS_U16 CycleTime_L; 54*53ee8cc1Swenshuai.xi }IRTX_SETDELAYCLKTIME_PARAM, *PIRTX_SETDELAYCLKTIME_PARAM; 55*53ee8cc1Swenshuai.xi 56*53ee8cc1Swenshuai.xi 57*53ee8cc1Swenshuai.xi typedef struct _IRTX_SETMEMADDR_PARAM 58*53ee8cc1Swenshuai.xi { 59*53ee8cc1Swenshuai.xi MS_U16 MemAddr; 60*53ee8cc1Swenshuai.xi }IRTX_SETMEMADDR_PARAM, *PIRTX_SETMEMADDR_PARAM; 61*53ee8cc1Swenshuai.xi 62*53ee8cc1Swenshuai.xi 63*53ee8cc1Swenshuai.xi typedef struct _IRTX_SETMEMDATA_PARAM 64*53ee8cc1Swenshuai.xi { 65*53ee8cc1Swenshuai.xi MS_U16 MemData; 66*53ee8cc1Swenshuai.xi }IRTX_SETMEMDATA_PARAM, *PIRTX_SETMEMDATA_PARAM; 67*53ee8cc1Swenshuai.xi 68*53ee8cc1Swenshuai.xi 69*53ee8cc1Swenshuai.xi typedef struct _IRTX_SETUNITVALUE_PARAM 70*53ee8cc1Swenshuai.xi { 71*53ee8cc1Swenshuai.xi MS_U16 Unit_Value; 72*53ee8cc1Swenshuai.xi MS_U8 Unit_Number; 73*53ee8cc1Swenshuai.xi }IRTX_SETUNITVALUE_PARAM, *PIRTX_SETUNITVALUE_PARAM; 74*53ee8cc1Swenshuai.xi 75*53ee8cc1Swenshuai.xi 76*53ee8cc1Swenshuai.xi typedef struct _IRTX_SETSHOTCOUNT_PARAM 77*53ee8cc1Swenshuai.xi { 78*53ee8cc1Swenshuai.xi MS_U16 H_ShotCount; 79*53ee8cc1Swenshuai.xi MS_U16 L_ShotCount; 80*53ee8cc1Swenshuai.xi MS_U8 Unit_Number; 81*53ee8cc1Swenshuai.xi }IRTX_SETSHOTCOUNT_PARAM, *PIRTX_SETSHOTCOUNT_PARAM; 82*53ee8cc1Swenshuai.xi 83*53ee8cc1Swenshuai.xi 84*53ee8cc1Swenshuai.xi 85*53ee8cc1Swenshuai.xi typedef struct _IRTX_INIT_PARAM 86*53ee8cc1Swenshuai.xi { 87*53ee8cc1Swenshuai.xi 88*53ee8cc1Swenshuai.xi }IRTX_INIT_PARAM, *PIRTX_INIT_PARAM; 89*53ee8cc1Swenshuai.xi 90*53ee8cc1Swenshuai.xi 91*53ee8cc1Swenshuai.xi 92*53ee8cc1Swenshuai.xi typedef struct _IRTX_SETCARRIERCOUNT_PARAM 93*53ee8cc1Swenshuai.xi { 94*53ee8cc1Swenshuai.xi MS_U16 Count; 95*53ee8cc1Swenshuai.xi }IRTX_SETCARRIERCOUNT_PARAM, *PIRTX_SETCARRIERCOUNT_PARAM; 96*53ee8cc1Swenshuai.xi 97*53ee8cc1Swenshuai.xi 98*53ee8cc1Swenshuai.xi 99*53ee8cc1Swenshuai.xi 100*53ee8cc1Swenshuai.xi MS_BOOL MDrv_IR_TX_Trigger(void); 101*53ee8cc1Swenshuai.xi MS_BOOL MDrv_IR_TX_SetStatus(MS_U16 Status); 102*53ee8cc1Swenshuai.xi MS_BOOL MDrv_IR_TX_SetMemStatus(MS_U16 Status); 103*53ee8cc1Swenshuai.xi MS_BOOL MDrv_IR_TX_SetClkDiv(MS_U8 Div); 104*53ee8cc1Swenshuai.xi MS_BOOL MDrv_IR_TX_SetDelayCycleTime(MS_U16 CycleTime_H, MS_U16 CycleTime_L); 105*53ee8cc1Swenshuai.xi MS_BOOL MDrv_IR_TX_SetMemAddr(MS_U16 MemAddr); 106*53ee8cc1Swenshuai.xi MS_BOOL MDrv_IR_TX_SetMemData(MS_U16 MemData); 107*53ee8cc1Swenshuai.xi MS_BOOL MDrv_IR_TX_SetUnitValue(MS_U16 Unit_Value, MS_U8 Unit_Number); 108*53ee8cc1Swenshuai.xi MS_BOOL MDrv_IR_TX_SetShotCount(MS_U16 H_ShotCount, MS_U16 L_ShotCount, MS_U8 Unit_Number); 109*53ee8cc1Swenshuai.xi MS_BOOL MDrv_IR_TX_Init(void); 110*53ee8cc1Swenshuai.xi MS_BOOL MDrv_IR_TX_SetCarrierCount(MS_U16 Count); 111*53ee8cc1Swenshuai.xi 112*53ee8cc1Swenshuai.xi 113*53ee8cc1Swenshuai.xi #ifdef __cplusplus 114*53ee8cc1Swenshuai.xi } 115*53ee8cc1Swenshuai.xi #endif 116*53ee8cc1Swenshuai.xi #endif 117