xref: /utopia/UTPA2-700.0.x/mxlib/include/drvUART.h (revision 53ee8cc121a030b8d368113ac3e966b4705770ef)
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93*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
94*53ee8cc1Swenshuai.xi 
95*53ee8cc1Swenshuai.xi ///////////////////////////////////////////////////////////////////////////////////////////////////
96*53ee8cc1Swenshuai.xi ///
97*53ee8cc1Swenshuai.xi /// @file   drvUART.h
98*53ee8cc1Swenshuai.xi /// @brief  UART Driver Interface
99*53ee8cc1Swenshuai.xi /// @author MStar Semiconductor Inc.
100*53ee8cc1Swenshuai.xi ///////////////////////////////////////////////////////////////////////////////////////////////////
101*53ee8cc1Swenshuai.xi 
102*53ee8cc1Swenshuai.xi /*! \defgroup G_UART UART interface
103*53ee8cc1Swenshuai.xi     \ingroup  G_PERIPHERAL
104*53ee8cc1Swenshuai.xi 
105*53ee8cc1Swenshuai.xi     \brief
106*53ee8cc1Swenshuai.xi 
107*53ee8cc1Swenshuai.xi     UART is a piece of computer hardware that translates data between parallel and serial forms.
108*53ee8cc1Swenshuai.xi     UARTs are commonly used in conjunction with communication standards such as EIA, RS-232, RS-422 or RS-485.
109*53ee8cc1Swenshuai.xi     The universal designation indicates that the data format and transmission speeds are configurable.
110*53ee8cc1Swenshuai.xi     The electric signaling levels and methods are handled by a driver circuit external to the UART.
111*53ee8cc1Swenshuai.xi 
112*53ee8cc1Swenshuai.xi     <b>Features</b>
113*53ee8cc1Swenshuai.xi 
114*53ee8cc1Swenshuai.xi     - A clock generator, usually a multiple of the bit rate to allow sampling in the middle of a bit period.
115*53ee8cc1Swenshuai.xi     - Input and Output shift registers
116*53ee8cc1Swenshuai.xi     - Transmit/Receive control
117*53ee8cc1Swenshuai.xi     - Read/Write control logic
118*53ee8cc1Swenshuai.xi     - Transmit/Receive buffers (optional)
119*53ee8cc1Swenshuai.xi     - Parallel data bus buffer (optional)
120*53ee8cc1Swenshuai.xi     - First-in, first-out (FIFO) buffer memory (optional)
121*53ee8cc1Swenshuai.xi 
122*53ee8cc1Swenshuai.xi     <b> UART Block Diagram: </b> \n
123*53ee8cc1Swenshuai.xi     \image html drvUART_pic1.png
124*53ee8cc1Swenshuai.xi 
125*53ee8cc1Swenshuai.xi     <b> Operation Code Flow: </b> \n
126*53ee8cc1Swenshuai.xi     -# Prepare UART setting for each operation
127*53ee8cc1Swenshuai.xi     -# Set and start UART in command handle
128*53ee8cc1Swenshuai.xi     -# Trigger UART
129*53ee8cc1Swenshuai.xi 
130*53ee8cc1Swenshuai.xi      \defgroup G_UART_INIT Initialization Task relative
131*53ee8cc1Swenshuai.xi      \ingroup  G_UART
132*53ee8cc1Swenshuai.xi      \defgroup G_UART_TXRX Transmit/Receive control Task relative
133*53ee8cc1Swenshuai.xi      \ingroup  G_UART
134*53ee8cc1Swenshuai.xi      \defgroup G_UART_OTHER  other relative
135*53ee8cc1Swenshuai.xi      \ingroup  G_UART
136*53ee8cc1Swenshuai.xi */
137*53ee8cc1Swenshuai.xi 
138*53ee8cc1Swenshuai.xi #ifndef __MDRV_UART_H__
139*53ee8cc1Swenshuai.xi #define __MDRV_UART_H__
140*53ee8cc1Swenshuai.xi 
141*53ee8cc1Swenshuai.xi ///
142*53ee8cc1Swenshuai.xi /// @file drvUART.h
143*53ee8cc1Swenshuai.xi /// @brief MStar driver for UART devices
144*53ee8cc1Swenshuai.xi ///
145*53ee8cc1Swenshuai.xi /// @par Example: connect AEON uart to UART port0, output message
146*53ee8cc1Swenshuai.xi /// @code
147*53ee8cc1Swenshuai.xi /// ms_uart_dev_t uart;
148*53ee8cc1Swenshuai.xi ///
149*53ee8cc1Swenshuai.xi /// mdrv_uart_connect(E_UART_PORT0, E_UART_AEON);
150*53ee8cc1Swenshuai.xi /// uart = mdrv_uart_open(E_UART_AEON);
151*53ee8cc1Swenshuai.xi /// if (uart != UART_DEV_NULL)
152*53ee8cc1Swenshuai.xi /// {
153*53ee8cc1Swenshuai.xi ///     mdrv_uart_set_baudrate(uart, 38400);    // must do this after base clock changed
154*53ee8cc1Swenshuai.xi ///     setconsole(uart);                       // set this uart device as console
155*53ee8cc1Swenshuai.xi /// }
156*53ee8cc1Swenshuai.xi /// printf("uart test");
157*53ee8cc1Swenshuai.xi /// mdrv_uart_close(uart);
158*53ee8cc1Swenshuai.xi /// @endcode
159*53ee8cc1Swenshuai.xi ///
160*53ee8cc1Swenshuai.xi ///
161*53ee8cc1Swenshuai.xi /// @par Example: use buffered output
162*53ee8cc1Swenshuai.xi /// @code
163*53ee8cc1Swenshuai.xi /// ms_uart_dev_t uart;
164*53ee8cc1Swenshuai.xi /// char tx_buffer[1024];
165*53ee8cc1Swenshuai.xi ///
166*53ee8cc1Swenshuai.xi /// uart = mdrv_uart_open(E_UART_PIU_UART0);
167*53ee8cc1Swenshuai.xi /// if (uart != UART_DEV_NULL)
168*53ee8cc1Swenshuai.xi /// {
169*53ee8cc1Swenshuai.xi ///     mdrv_uart_set_tx_buffer(uart, tx_buffer, sizeof(tx_buffer));
170*53ee8cc1Swenshuai.xi /// }
171*53ee8cc1Swenshuai.xi /// @endcode
172*53ee8cc1Swenshuai.xi 
173*53ee8cc1Swenshuai.xi 
174*53ee8cc1Swenshuai.xi 
175*53ee8cc1Swenshuai.xi #ifdef __cplusplus
176*53ee8cc1Swenshuai.xi extern "C"
177*53ee8cc1Swenshuai.xi {
178*53ee8cc1Swenshuai.xi #endif
179*53ee8cc1Swenshuai.xi 
180*53ee8cc1Swenshuai.xi #include "MsTypes.h"
181*53ee8cc1Swenshuai.xi #include "MsDevice.h"
182*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
183*53ee8cc1Swenshuai.xi //  Driver Capability
184*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
185*53ee8cc1Swenshuai.xi #define UART_CAPS_AEON                  0x00000001
186*53ee8cc1Swenshuai.xi #define UART_CAPS_PIU                   0x00000002
187*53ee8cc1Swenshuai.xi 
188*53ee8cc1Swenshuai.xi 
189*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
190*53ee8cc1Swenshuai.xi //  Macro and Define
191*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
192*53ee8cc1Swenshuai.xi 
193*53ee8cc1Swenshuai.xi // #define UART_TYPE_DEF
194*53ee8cc1Swenshuai.xi /// Version string.
195*53ee8cc1Swenshuai.xi #define UART_DRV_VERSION                /* Character String for DRV/API version             */  \
196*53ee8cc1Swenshuai.xi     MSIF_TAG,                           /* 'MSIF'                                           */  \
197*53ee8cc1Swenshuai.xi     MSIF_CLASS,                         /* '00'                                             */  \
198*53ee8cc1Swenshuai.xi     MSIF_CUS,                           /* 0x0000                                           */  \
199*53ee8cc1Swenshuai.xi     MSIF_MOD,                           /* 0x0000                                           */  \
200*53ee8cc1Swenshuai.xi     MSIF_CHIP,                                                                                  \
201*53ee8cc1Swenshuai.xi     MSIF_CPU,                                                                                   \
202*53ee8cc1Swenshuai.xi     {'U','A','R','T'},                  /* IP__                                             */  \
203*53ee8cc1Swenshuai.xi     {'0','1'},                          /* 0.0 ~ Z.Z                                        */  \
204*53ee8cc1Swenshuai.xi     {'0','6'},                          /* 00 ~ 99                                          */  \
205*53ee8cc1Swenshuai.xi     {'0','0','3','1','0','0','5','0'},  /* CL#                                              */  \
206*53ee8cc1Swenshuai.xi     MSIF_OS
207*53ee8cc1Swenshuai.xi 
208*53ee8cc1Swenshuai.xi #define UART_TYPE_AEON      0x10
209*53ee8cc1Swenshuai.xi #define UART_TYPE_PIU       0x20
210*53ee8cc1Swenshuai.xi #define UART_TYPE_EYWA		0
211*53ee8cc1Swenshuai.xi 
212*53ee8cc1Swenshuai.xi 
213*53ee8cc1Swenshuai.xi // Baud rate
214*53ee8cc1Swenshuai.xi //#define UART_BAUD_RATE                38400 //9600 //19200 //38400 //57600 //115200 =>too frequent Rx INT
215*53ee8cc1Swenshuai.xi #define UART_BAUD_RATE              115200
216*53ee8cc1Swenshuai.xi 
217*53ee8cc1Swenshuai.xi #define UART_DEV_NULL   ((ms_uart_dev_t)0)
218*53ee8cc1Swenshuai.xi 
219*53ee8cc1Swenshuai.xi 
220*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
221*53ee8cc1Swenshuai.xi //  Type and Structure
222*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
223*53ee8cc1Swenshuai.xi 
224*53ee8cc1Swenshuai.xi typedef enum
225*53ee8cc1Swenshuai.xi {
226*53ee8cc1Swenshuai.xi     E_UART_OK,
227*53ee8cc1Swenshuai.xi     E_UART_FAIL,
228*53ee8cc1Swenshuai.xi } UART_Result;
229*53ee8cc1Swenshuai.xi 
230*53ee8cc1Swenshuai.xi typedef struct _UART_DrvInfo
231*53ee8cc1Swenshuai.xi {
232*53ee8cc1Swenshuai.xi     MS_BOOL                         Init;
233*53ee8cc1Swenshuai.xi     MS_U32                          Caps;
234*53ee8cc1Swenshuai.xi } UART_DrvInfo;
235*53ee8cc1Swenshuai.xi 
236*53ee8cc1Swenshuai.xi typedef struct _UART_DrvStatus
237*53ee8cc1Swenshuai.xi {
238*53ee8cc1Swenshuai.xi     MS_BOOL                         HwBusy;
239*53ee8cc1Swenshuai.xi } UART_DrvStatus;
240*53ee8cc1Swenshuai.xi 
241*53ee8cc1Swenshuai.xi /// UART devices, not all of them can be access directly
242*53ee8cc1Swenshuai.xi typedef enum
243*53ee8cc1Swenshuai.xi {
244*53ee8cc1Swenshuai.xi     E_UART_INVALID = -1,    ///< INVALID
245*53ee8cc1Swenshuai.xi     E_UART_AEON,            ///< AEON
246*53ee8cc1Swenshuai.xi     E_UART_VDEC,            ///< VD_MHEG5 (only used in mdrv_uart_connect())
247*53ee8cc1Swenshuai.xi     E_UART_TSP,             ///< TSP (only used in mdrv_uart_connect())
248*53ee8cc1Swenshuai.xi     E_UART_PIU_UART0,       ///< PIU0
249*53ee8cc1Swenshuai.xi     E_UART_PIU_UART1,       ///< PIU1 (only available for some chips)
250*53ee8cc1Swenshuai.xi     E_UART_PIU_UART2,       ///< PIU2 (only available for some chips)
251*53ee8cc1Swenshuai.xi     E_UART_PIU_FUART0,      ///< PIU Fast UART (only available for some chips)
252*53ee8cc1Swenshuai.xi     E_UART_HK51_UART0,      ///< HK51 UART0 (only used in mdrv_uart_connect())
253*53ee8cc1Swenshuai.xi     E_UART_HK51_UART1,      ///< HK51 UART1 (only used in mdrv_uart_connect())
254*53ee8cc1Swenshuai.xi     E_UART_VD51_UART0,      ///< VD51 UART0 (only used in mdrv_uart_connect())
255*53ee8cc1Swenshuai.xi     E_UART_VD51_UART1,      ///< VD51 UART1 (only used in mdrv_uart_connect())
256*53ee8cc1Swenshuai.xi                             ///<            (only available for some chips)
257*53ee8cc1Swenshuai.xi     E_UART_AEON_R2,         ///< AEON_R2 for HK
258*53ee8cc1Swenshuai.xi     E_UART_AEON_AUDIO_R2,   ///< AEON_R2 for Audio
259*53ee8cc1Swenshuai.xi     E_UART_DMD51_UART0,     ///< DMD51 UART0 (only used in mdrv_uart_connect())
260*53ee8cc1Swenshuai.xi     E_UART_DMD51_UART1,     ///< DMD51 UART1 (only used in mdrv_uart_connect())
261*53ee8cc1Swenshuai.xi     E_UART_SECURE_R2,       ///< SECURE_R2 (only available for some chips)
262*53ee8cc1Swenshuai.xi     E_UART_OFF,             ///< UART Disable
263*53ee8cc1Swenshuai.xi } UART_DEVICE_TYPE;
264*53ee8cc1Swenshuai.xi 
265*53ee8cc1Swenshuai.xi /// UART port
266*53ee8cc1Swenshuai.xi /// different port have different pad mux, please check package spec.
267*53ee8cc1Swenshuai.xi /// sometimes the net name will mislead the real port number
268*53ee8cc1Swenshuai.xi typedef enum
269*53ee8cc1Swenshuai.xi {
270*53ee8cc1Swenshuai.xi     E_UART_PORT_INVALID = -1,///< invalid uart port
271*53ee8cc1Swenshuai.xi     E_UART_PORT0,           ///< usually muxed with DDCA
272*53ee8cc1Swenshuai.xi     E_UART_PORT1,           ///< port 1
273*53ee8cc1Swenshuai.xi     E_UART_PORT2,           ///< port 2
274*53ee8cc1Swenshuai.xi     E_UART_PORT3,           ///< port 3
275*53ee8cc1Swenshuai.xi     E_UART_PORT4,           ///< port 4
276*53ee8cc1Swenshuai.xi } UART_PORT_TYPE;
277*53ee8cc1Swenshuai.xi 
278*53ee8cc1Swenshuai.xi /// UART Pad
279*53ee8cc1Swenshuai.xi /// different port have different pad mux
280*53ee8cc1Swenshuai.xi /// sometimes the net name will mislead the real pad number
281*53ee8cc1Swenshuai.xi typedef enum
282*53ee8cc1Swenshuai.xi {
283*53ee8cc1Swenshuai.xi 	//<< port 0 pad default with DDCA
284*53ee8cc1Swenshuai.xi 	//port1 --> second uart mode
285*53ee8cc1Swenshuai.xi     E_UART_PAD_1_0,         ///<disable port 1 pad
286*53ee8cc1Swenshuai.xi     E_UART_PAD_1_1,         ///<port1 pad 1
287*53ee8cc1Swenshuai.xi     E_UART_PAD_1_2,         ///<port1 pad 2
288*53ee8cc1Swenshuai.xi     E_UART_PAD_1_3,         ///<port1 pad 3
289*53ee8cc1Swenshuai.xi     //port2 --> third uart mode
290*53ee8cc1Swenshuai.xi     E_UART_PAD_2_0,         ///<disable port 2 pad
291*53ee8cc1Swenshuai.xi     E_UART_PAD_2_1,         ///<port2 pad 1
292*53ee8cc1Swenshuai.xi     E_UART_PAD_2_2,         ///<port2 pad 2
293*53ee8cc1Swenshuai.xi     E_UART_PAD_2_3,         ///<port2 pad 3
294*53ee8cc1Swenshuai.xi     //port3 --> fourth uart mode
295*53ee8cc1Swenshuai.xi     E_UART_PAD_3_0,         ///<disable port 3 pad
296*53ee8cc1Swenshuai.xi     E_UART_PAD_3_1,         ///<port3 pad 1
297*53ee8cc1Swenshuai.xi     E_UART_PAD_3_2,         ///<port3 pad 2
298*53ee8cc1Swenshuai.xi     E_UART_PAD_3_3,         ///<port3 pad 3
299*53ee8cc1Swenshuai.xi     //port4 --> fast uart mode
300*53ee8cc1Swenshuai.xi     E_UART_PAD_4_0,         ///<disable port 4 pad
301*53ee8cc1Swenshuai.xi     E_UART_PAD_4_1,         ///<port4 pad 1
302*53ee8cc1Swenshuai.xi     E_UART_PAD_4_2,         ///<port4 pad 2
303*53ee8cc1Swenshuai.xi     E_UART_PAD_4_3,         ///<port4 pad 3
304*53ee8cc1Swenshuai.xi }UART_PAD_TYPE;
305*53ee8cc1Swenshuai.xi 
306*53ee8cc1Swenshuai.xi typedef enum _UART_DbgLv
307*53ee8cc1Swenshuai.xi {
308*53ee8cc1Swenshuai.xi     E_UART_DBGLV_NONE           //no debug message
309*53ee8cc1Swenshuai.xi     ,E_UART_DBGLV_ERR_ONLY      //show error only
310*53ee8cc1Swenshuai.xi     ,E_UART_DBGLV_INFO          //show error & informaiton
311*53ee8cc1Swenshuai.xi     ,E_UART_DBGLV_ALL           //show error, information & funciton name
312*53ee8cc1Swenshuai.xi }UART_DbgLv;
313*53ee8cc1Swenshuai.xi 
314*53ee8cc1Swenshuai.xi 
315*53ee8cc1Swenshuai.xi /// prototypr of UART rx callback
316*53ee8cc1Swenshuai.xi typedef void (*ms_uart_rx_callback)(int c);     // TODO: add user data?
317*53ee8cc1Swenshuai.xi 
318*53ee8cc1Swenshuai.xi /// prototypr of UART rx callback
319*53ee8cc1Swenshuai.xi typedef void (*ms_uart_rx_callback_halreg)(int c, MS_U32 pHalReg);
320*53ee8cc1Swenshuai.xi 
321*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
322*53ee8cc1Swenshuai.xi //  Function and Variable
323*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
324*53ee8cc1Swenshuai.xi 
325*53ee8cc1Swenshuai.xi ///////////////////////////////////////////////////////////////////////////////
326*53ee8cc1Swenshuai.xi /// @brief open UART device, both rx/tx is enabled after this
327*53ee8cc1Swenshuai.xi /// @ingroup G_UART_INIT
328*53ee8cc1Swenshuai.xi /// @param uart_dev:    uart device instance to open (AEON / PIU_UARTx)
329*53ee8cc1Swenshuai.xi /// @return uart handle. when failed, it returns UART_DEV_NULL
330*53ee8cc1Swenshuai.xi ///////////////////////////////////////////////////////////////////////////////
331*53ee8cc1Swenshuai.xi MS_U32 mdrv_uart_open(UART_DEVICE_TYPE uart_dev);
332*53ee8cc1Swenshuai.xi 
333*53ee8cc1Swenshuai.xi // control power state for fast booting
334*53ee8cc1Swenshuai.xi MS_U32 MDrv_UART_SetPowerState(EN_POWER_MODE u16PowerState);
335*53ee8cc1Swenshuai.xi 
336*53ee8cc1Swenshuai.xi ///////////////////////////////////////////////////////////////////////////////
337*53ee8cc1Swenshuai.xi /// @brief close a UART device handle
338*53ee8cc1Swenshuai.xi /// @ingroup G_UART_INIT
339*53ee8cc1Swenshuai.xi /// @param uart \b    uart handle to close
340*53ee8cc1Swenshuai.xi /// @return 0 if sucess, -1 if failed
341*53ee8cc1Swenshuai.xi ///////////////////////////////////////////////////////////////////////////////
342*53ee8cc1Swenshuai.xi MS_U16 mdrv_uart_close(MS_VIRT uart);
343*53ee8cc1Swenshuai.xi 
344*53ee8cc1Swenshuai.xi ///////////////////////////////////////////////////////////////////////////////
345*53ee8cc1Swenshuai.xi /// Please note the connectivity should be a one-to-one mapping
346*53ee8cc1Swenshuai.xi /// @ingroup G_UART_INIT
347*53ee8cc1Swenshuai.xi /// @brief connect a UART device to a UART port
348*53ee8cc1Swenshuai.xi /// @param uart_port:   uart port
349*53ee8cc1Swenshuai.xi /// @param uart_dev:    uart device
350*53ee8cc1Swenshuai.xi /// @return 0: sucess, -1: failed
351*53ee8cc1Swenshuai.xi ///////////////////////////////////////////////////////////////////////////////
352*53ee8cc1Swenshuai.xi MS_U16 mdrv_uart_connect(UART_PORT_TYPE uart_port, UART_DEVICE_TYPE uart_dev);
353*53ee8cc1Swenshuai.xi 
354*53ee8cc1Swenshuai.xi ///////////////////////////////////////////////////////////////////////////////
355*53ee8cc1Swenshuai.xi /// @brief get the connection of UART port to UART device, (get device by port)
356*53ee8cc1Swenshuai.xi /// @ingroup G_UART_INIT
357*53ee8cc1Swenshuai.xi /// @param uart_port:   uart port
358*53ee8cc1Swenshuai.xi /// @return enum UART_DEVICE_TYPE, E_UART_INVALID if error occurs
359*53ee8cc1Swenshuai.xi ///////////////////////////////////////////////////////////////////////////////
360*53ee8cc1Swenshuai.xi UART_DEVICE_TYPE mdrv_uart_get_connection(UART_PORT_TYPE uart_port);
361*53ee8cc1Swenshuai.xi 
362*53ee8cc1Swenshuai.xi ///////////////////////////////////////////////////////////////////////////////
363*53ee8cc1Swenshuai.xi /// Please note the connectivity should be a one-to-one mapping
364*53ee8cc1Swenshuai.xi /// @brief connect a UART device to a UART port , which connect to  a UART port pad
365*53ee8cc1Swenshuai.xi /// @ingroup G_UART_INIT
366*53ee8cc1Swenshuai.xi /// @param uart_port:   uart port
367*53ee8cc1Swenshuai.xi /// @param uart_dev:    uart device
368*53ee8cc1Swenshuai.xi /// @param uart_dev:    uart device
369*53ee8cc1Swenshuai.xi /// @return 0: sucess, -1: failed
370*53ee8cc1Swenshuai.xi ///////////////////////////////////////////////////////////////////////////////
371*53ee8cc1Swenshuai.xi MS_U16 mdrv_uart_connect_mux(UART_DEVICE_TYPE uart_dev, UART_PORT_TYPE uart_port, UART_PAD_TYPE uart_pad);
372*53ee8cc1Swenshuai.xi 
373*53ee8cc1Swenshuai.xi ///////////////////////////////////////////////////////////////////////////////
374*53ee8cc1Swenshuai.xi /// @brief Invert the signal polarity of UART
375*53ee8cc1Swenshuai.xi /// @ingroup G_UART_OTHER
376*53ee8cc1Swenshuai.xi /// @param uart_port:   uart device
377*53ee8cc1Swenshuai.xi /// @param bInv:        0: not invert, 1 invert
378*53ee8cc1Swenshuai.xi /// @return 0: sucess -1: failed (uart_port out of range)
379*53ee8cc1Swenshuai.xi ///////////////////////////////////////////////////////////////////////////////
380*53ee8cc1Swenshuai.xi MS_U16 mdrv_uart_invert(UART_PORT_TYPE uart_port, MS_BOOL bInv);
381*53ee8cc1Swenshuai.xi 
382*53ee8cc1Swenshuai.xi ///////////////////////////////////////////////////////////////////////////////
383*53ee8cc1Swenshuai.xi /// Set the baudrate of the UART device, the base clock must be set before set
384*53ee8cc1Swenshuai.xi /// baudrate. If the clock is changed (like CKG_MCU change for E_UART_AEON),
385*53ee8cc1Swenshuai.xi /// this function must be called again for
386*53ee8cc1Swenshuai.xi /// @ingroup G_UART_INIT
387*53ee8cc1Swenshuai.xi /// @brief Set the baudrate of the UART device
388*53ee8cc1Swenshuai.xi /// @param uart:   uart device handle
389*53ee8cc1Swenshuai.xi /// @param baudrate: baudrate
390*53ee8cc1Swenshuai.xi /// @return 0: success, -1: failed
391*53ee8cc1Swenshuai.xi ///////////////////////////////////////////////////////////////////////////////
392*53ee8cc1Swenshuai.xi MS_U16 mdrv_uart_set_baudrate(MS_VIRT uart, MS_U32 baudrate);
393*53ee8cc1Swenshuai.xi 
394*53ee8cc1Swenshuai.xi ///////////////////////////////////////////////////////////////////////////////
395*53ee8cc1Swenshuai.xi /// The rx_cb will be called every incoming byte is received
396*53ee8cc1Swenshuai.xi /// @ingroup G_UART_INIT
397*53ee8cc1Swenshuai.xi /// @brief Set RX callback by interrupt serive routine
398*53ee8cc1Swenshuai.xi /// @param uart:    uart device handle
399*53ee8cc1Swenshuai.xi /// @param rx_cb:   rx callback, 0 to disable the rx callback
400*53ee8cc1Swenshuai.xi /// @return 0: success, -1: failed
401*53ee8cc1Swenshuai.xi ///////////////////////////////////////////////////////////////////////////////
402*53ee8cc1Swenshuai.xi MS_U16 mdrv_uart_set_rx_callback(MS_VIRT uart, ms_uart_rx_callback rx_cb);
403*53ee8cc1Swenshuai.xi 
404*53ee8cc1Swenshuai.xi ///////////////////////////////////////////////////////////////////////////////
405*53ee8cc1Swenshuai.xi /// If tx_buffer is not NULL, uart tx will use buffered mode, otherwise use polling mode
406*53ee8cc1Swenshuai.xi /// For Fast UART DMA mode, the buffer and len must aligned to MIU unit size
407*53ee8cc1Swenshuai.xi /// @ingroup G_UART_INIT
408*53ee8cc1Swenshuai.xi /// @brief set tx buffer for buffered mode
409*53ee8cc1Swenshuai.xi /// @param uart:        uart device handle
410*53ee8cc1Swenshuai.xi /// @param tx_buffer:   pointer to tx buffer
411*53ee8cc1Swenshuai.xi /// @param len:         tx buffer size
412*53ee8cc1Swenshuai.xi /// @return 0: success, -1: failed
413*53ee8cc1Swenshuai.xi ///////////////////////////////////////////////////////////////////////////////
414*53ee8cc1Swenshuai.xi MS_U16 mdrv_uart_set_tx_buffer(MS_VIRT uart, void *tx_buffer, MS_U16 len);
415*53ee8cc1Swenshuai.xi 
416*53ee8cc1Swenshuai.xi ///////////////////////////////////////////////////////////////////////////////
417*53ee8cc1Swenshuai.xi /// If tx_buffer is not NULL, uart tx will use buffered mode, otherwise use polling mode
418*53ee8cc1Swenshuai.xi /// For Fast UART DMA mode, the buffer and len must aligned to MIU unit size
419*53ee8cc1Swenshuai.xi /// @ingroup G_UART_INIT
420*53ee8cc1Swenshuai.xi /// @brief set tx buffer for buffered mode
421*53ee8cc1Swenshuai.xi /// @param uart:        uart device handle
422*53ee8cc1Swenshuai.xi /// @param rx_buffer:   pointer to tx buffer
423*53ee8cc1Swenshuai.xi /// @param len:         tx buffer size
424*53ee8cc1Swenshuai.xi /// @return 0: success, -1: failed
425*53ee8cc1Swenshuai.xi ///////////////////////////////////////////////////////////////////////////////
426*53ee8cc1Swenshuai.xi MS_U16 mdrv_uart_set_rx_buffer(MS_VIRT uart, void *rx_buffer, MS_U16 len);
427*53ee8cc1Swenshuai.xi 
428*53ee8cc1Swenshuai.xi ///////////////////////////////////////////////////////////////////////////////
429*53ee8cc1Swenshuai.xi /// @ingroup G_UART_TXRX
430*53ee8cc1Swenshuai.xi /// @brief enable uart rx
431*53ee8cc1Swenshuai.xi /// @param uart:        uart device handle
432*53ee8cc1Swenshuai.xi /// @return 0: success, -1: failed
433*53ee8cc1Swenshuai.xi ///////////////////////////////////////////////////////////////////////////////
434*53ee8cc1Swenshuai.xi MS_U16 mdrv_uart_rx_enable(MS_VIRT uart);
435*53ee8cc1Swenshuai.xi 
436*53ee8cc1Swenshuai.xi ///////////////////////////////////////////////////////////////////////////////
437*53ee8cc1Swenshuai.xi /// @ingroup G_UART_TXRX
438*53ee8cc1Swenshuai.xi /// @brief enable uart tx
439*53ee8cc1Swenshuai.xi /// @param uart:        uart device handle
440*53ee8cc1Swenshuai.xi /// @return 0: success, -1: failed
441*53ee8cc1Swenshuai.xi ///////////////////////////////////////////////////////////////////////////////
442*53ee8cc1Swenshuai.xi MS_U16 mdrv_uart_tx_enable(MS_VIRT uart);
443*53ee8cc1Swenshuai.xi 
444*53ee8cc1Swenshuai.xi ///////////////////////////////////////////////////////////////////////////////
445*53ee8cc1Swenshuai.xi /// @ingroup G_UART_TXRX
446*53ee8cc1Swenshuai.xi /// @brief disable uart rx
447*53ee8cc1Swenshuai.xi /// @param uart:        uart device handle
448*53ee8cc1Swenshuai.xi /// @return 0: success, -1: failed
449*53ee8cc1Swenshuai.xi ///////////////////////////////////////////////////////////////////////////////
450*53ee8cc1Swenshuai.xi MS_U16 mdrv_uart_rx_disable(MS_VIRT uart);
451*53ee8cc1Swenshuai.xi 
452*53ee8cc1Swenshuai.xi ///////////////////////////////////////////////////////////////////////////////
453*53ee8cc1Swenshuai.xi /// @ingroup G_UART_TXRX
454*53ee8cc1Swenshuai.xi /// @brief disable uart tx
455*53ee8cc1Swenshuai.xi /// @param uart:        uart device handle
456*53ee8cc1Swenshuai.xi /// @return 0: success, -1: failed
457*53ee8cc1Swenshuai.xi ///////////////////////////////////////////////////////////////////////////////
458*53ee8cc1Swenshuai.xi MS_U16 mdrv_uart_tx_disable(MS_VIRT uart);
459*53ee8cc1Swenshuai.xi 
460*53ee8cc1Swenshuai.xi ///////////////////////////////////////////////////////////////////////////////
461*53ee8cc1Swenshuai.xi /// @ingroup G_UART_TXRX
462*53ee8cc1Swenshuai.xi /// @brief read data from uart
463*53ee8cc1Swenshuai.xi /// @param uart:        uart device handle
464*53ee8cc1Swenshuai.xi /// @param buf:         buffer to store read data
465*53ee8cc1Swenshuai.xi /// @param len:         buffer length
466*53ee8cc1Swenshuai.xi /// @return -1: failed, others: bytes read
467*53ee8cc1Swenshuai.xi ///////////////////////////////////////////////////////////////////////////////
468*53ee8cc1Swenshuai.xi MS_U16 mdrv_uart_read(MS_VIRT uart, MS_U8 *buf, MS_U32 len);
469*53ee8cc1Swenshuai.xi 
470*53ee8cc1Swenshuai.xi ///////////////////////////////////////////////////////////////////////////////
471*53ee8cc1Swenshuai.xi /// @ingroup G_UART_TXRX
472*53ee8cc1Swenshuai.xi /// @brief write data to uart
473*53ee8cc1Swenshuai.xi /// @param uart:        uart device handle
474*53ee8cc1Swenshuai.xi /// @param buf:         buffer for write data
475*53ee8cc1Swenshuai.xi /// @param len:         data length
476*53ee8cc1Swenshuai.xi /// @return -1: failed, others: bytes written
477*53ee8cc1Swenshuai.xi ///////////////////////////////////////////////////////////////////////////////
478*53ee8cc1Swenshuai.xi MS_U16 mdrv_uart_write(MS_VIRT uart, const MS_U8 *buf, MS_U16 len);
479*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
480*53ee8cc1Swenshuai.xi /// MOBF Encrypt
481*53ee8cc1Swenshuai.xi /// @ingroup G_UART_OTHER
482*53ee8cc1Swenshuai.xi /// @param u32Key \b IN: Key
483*53ee8cc1Swenshuai.xi /// @param bEnable \b IN: TRUE/FLASE
484*53ee8cc1Swenshuai.xi /// @return DRVAESDMA_OK : Success
485*53ee8cc1Swenshuai.xi /// @return Others : Fail
486*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
487*53ee8cc1Swenshuai.xi MS_U16 mdrv_uart_poll(MS_VIRT hUart, int types);
488*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
489*53ee8cc1Swenshuai.xi /// MOBF Encrypt
490*53ee8cc1Swenshuai.xi /// @ingroup G_UART_INIT
491*53ee8cc1Swenshuai.xi /// @param u32Key \b IN: Key
492*53ee8cc1Swenshuai.xi /// @param bEnable \b IN: TRUE/FLASE
493*53ee8cc1Swenshuai.xi /// @return DRVAESDMA_OK : Success
494*53ee8cc1Swenshuai.xi /// @return Others : Fail
495*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
496*53ee8cc1Swenshuai.xi MS_U16 mdrv_uart_set_rx_callback_halreg(MS_VIRT uart, ms_uart_rx_callback_halreg rx_cb);
497*53ee8cc1Swenshuai.xi 
498*53ee8cc1Swenshuai.xi /// UART callback function used in interrupt context
499*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
500*53ee8cc1Swenshuai.xi /// MOBF Encrypt
501*53ee8cc1Swenshuai.xi /// @ingroup G_UART_INIT
502*53ee8cc1Swenshuai.xi /// @param u32Key \b IN: Key
503*53ee8cc1Swenshuai.xi /// @param bEnable \b IN: TRUE/FLASE
504*53ee8cc1Swenshuai.xi /// @return DRVAESDMA_OK : Success
505*53ee8cc1Swenshuai.xi /// @return Others : Fail
506*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
507*53ee8cc1Swenshuai.xi typedef void(*P_UART_ISR_Proc)(MS_U8 u8UARTID);
508*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
509*53ee8cc1Swenshuai.xi /// MOBF Encrypt
510*53ee8cc1Swenshuai.xi /// @ingroup G_UART_INIT
511*53ee8cc1Swenshuai.xi /// @param u32Key \b IN: Key
512*53ee8cc1Swenshuai.xi /// @param bEnable \b IN: TRUE/FLASE
513*53ee8cc1Swenshuai.xi /// @return DRVAESDMA_OK : Success
514*53ee8cc1Swenshuai.xi /// @return Others : Fail
515*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
516*53ee8cc1Swenshuai.xi UART_Result MDrv_UART_SetIOMapBase(void);
517*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
518*53ee8cc1Swenshuai.xi /// MOBF Encrypt
519*53ee8cc1Swenshuai.xi /// @ingroup G_UART_INIT
520*53ee8cc1Swenshuai.xi /// @param u32Key \b IN: Key
521*53ee8cc1Swenshuai.xi /// @param bEnable \b IN: TRUE/FLASE
522*53ee8cc1Swenshuai.xi /// @return DRVAESDMA_OK : Success
523*53ee8cc1Swenshuai.xi /// @return Others : Fail
524*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
525*53ee8cc1Swenshuai.xi void MDrv_UART_Init(UART_DEVICE_TYPE uart_dev, MS_U32 baudrate);
526*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
527*53ee8cc1Swenshuai.xi /// MOBF Encrypt
528*53ee8cc1Swenshuai.xi /// @ingroup G_UART_INIT
529*53ee8cc1Swenshuai.xi /// @param u32Key \b IN: Key
530*53ee8cc1Swenshuai.xi /// @param bEnable \b IN: TRUE/FLASE
531*53ee8cc1Swenshuai.xi /// @return DRVAESDMA_OK : Success
532*53ee8cc1Swenshuai.xi /// @return Others : Fail
533*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
534*53ee8cc1Swenshuai.xi void MDrv_UART_Standby_Init (void);
535*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
536*53ee8cc1Swenshuai.xi /// MOBF Encrypt
537*53ee8cc1Swenshuai.xi /// @ingroup G_UART_OTHER
538*53ee8cc1Swenshuai.xi /// @param u32Key \b IN: Key
539*53ee8cc1Swenshuai.xi /// @param bEnable \b IN: TRUE/FLASE
540*53ee8cc1Swenshuai.xi /// @return DRVAESDMA_OK : Success
541*53ee8cc1Swenshuai.xi /// @return Others : Fail
542*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
543*53ee8cc1Swenshuai.xi void MDrv_UART_PutChar(MS_U8 u8Ch);
544*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
545*53ee8cc1Swenshuai.xi /// MOBF Encrypt
546*53ee8cc1Swenshuai.xi /// @ingroup G_UART_OTHER
547*53ee8cc1Swenshuai.xi /// @param u32Key \b IN: Key
548*53ee8cc1Swenshuai.xi /// @param bEnable \b IN: TRUE/FLASE
549*53ee8cc1Swenshuai.xi /// @return DRVAESDMA_OK : Success
550*53ee8cc1Swenshuai.xi /// @return Others : Fail
551*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
552*53ee8cc1Swenshuai.xi void MDrv_UART_PutString(char *u8str);
553*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
554*53ee8cc1Swenshuai.xi /// MOBF Encrypt
555*53ee8cc1Swenshuai.xi /// @ingroup G_UART_OTHER
556*53ee8cc1Swenshuai.xi /// @param u32Key \b IN: Key
557*53ee8cc1Swenshuai.xi /// @param bEnable \b IN: TRUE/FLASE
558*53ee8cc1Swenshuai.xi /// @return DRVAESDMA_OK : Success
559*53ee8cc1Swenshuai.xi /// @return Others : Fail
560*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
561*53ee8cc1Swenshuai.xi MS_U8 MDrv_UART_GetChar(void);
562*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
563*53ee8cc1Swenshuai.xi /// MOBF Encrypt
564*53ee8cc1Swenshuai.xi /// @ingroup G_UART_OTHER
565*53ee8cc1Swenshuai.xi /// @param u32Key \b IN: Key
566*53ee8cc1Swenshuai.xi /// @param bEnable \b IN: TRUE/FLASE
567*53ee8cc1Swenshuai.xi /// @return DRVAESDMA_OK : Success
568*53ee8cc1Swenshuai.xi /// @return Others : Fail
569*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
570*53ee8cc1Swenshuai.xi void MDrv_UART_GetFile(MS_U8 *pu8Buf, MS_U32 u32Len);
571*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
572*53ee8cc1Swenshuai.xi /// MOBF Encrypt
573*53ee8cc1Swenshuai.xi /// @ingroup G_UART_OTHER
574*53ee8cc1Swenshuai.xi /// @param u32Key \b IN: Key
575*53ee8cc1Swenshuai.xi /// @param bEnable \b IN: TRUE/FLASE
576*53ee8cc1Swenshuai.xi /// @return DRVAESDMA_OK : Success
577*53ee8cc1Swenshuai.xi /// @return Others : Fail
578*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
579*53ee8cc1Swenshuai.xi const UART_DrvInfo* MDrv_UART_GetInfo(void);
580*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
581*53ee8cc1Swenshuai.xi /// MOBF Encrypt
582*53ee8cc1Swenshuai.xi /// @ingroup G_UART_ToBeRemove
583*53ee8cc1Swenshuai.xi /// @param u32Key \b IN: Key
584*53ee8cc1Swenshuai.xi /// @param bEnable \b IN: TRUE/FLASE
585*53ee8cc1Swenshuai.xi /// @return DRVAESDMA_OK : Success
586*53ee8cc1Swenshuai.xi /// @return Others : Fail
587*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
588*53ee8cc1Swenshuai.xi struct device* MDrv_UART_GetDev(UART_DEVICE_TYPE uart_dev);
589*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
590*53ee8cc1Swenshuai.xi /// MOBF Encrypt
591*53ee8cc1Swenshuai.xi /// @ingroup G_UART_OTHER
592*53ee8cc1Swenshuai.xi /// @param u32Key \b IN: Key
593*53ee8cc1Swenshuai.xi /// @param bEnable \b IN: TRUE/FLASE
594*53ee8cc1Swenshuai.xi /// @return DRVAESDMA_OK : Success
595*53ee8cc1Swenshuai.xi /// @return Others : Fail
596*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
597*53ee8cc1Swenshuai.xi UART_Result MDrv_UART_GetLibVer(const MSIF_Version **ppVersion);
598*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
599*53ee8cc1Swenshuai.xi /// MOBF Encrypt
600*53ee8cc1Swenshuai.xi /// @ingroup G_UART_OTHER
601*53ee8cc1Swenshuai.xi /// @param u32Key \b IN: Key
602*53ee8cc1Swenshuai.xi /// @param bEnable \b IN: TRUE/FLASE
603*53ee8cc1Swenshuai.xi /// @return DRVAESDMA_OK : Success
604*53ee8cc1Swenshuai.xi /// @return Others : Fail
605*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
606*53ee8cc1Swenshuai.xi UART_Result MDrv_UART_GetStatus(UART_DrvStatus *pStatus);
607*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
608*53ee8cc1Swenshuai.xi /// MOBF Encrypt
609*53ee8cc1Swenshuai.xi /// @ingroup G_UART_OTHER
610*53ee8cc1Swenshuai.xi /// @param u32Key \b IN: Key
611*53ee8cc1Swenshuai.xi /// @param bEnable \b IN: TRUE/FLASE
612*53ee8cc1Swenshuai.xi /// @return DRVAESDMA_OK : Success
613*53ee8cc1Swenshuai.xi /// @return Others : Fail
614*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
615*53ee8cc1Swenshuai.xi void MDrv_UART_SetDbgLevel(MS_U8 level);
616*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
617*53ee8cc1Swenshuai.xi /// MOBF Encrypt
618*53ee8cc1Swenshuai.xi /// @ingroup G_UART_OTHER
619*53ee8cc1Swenshuai.xi /// @param u32Key \b IN: Key
620*53ee8cc1Swenshuai.xi /// @param bEnable \b IN: TRUE/FLASE
621*53ee8cc1Swenshuai.xi /// @return DRVAESDMA_OK : Success
622*53ee8cc1Swenshuai.xi /// @return Others : Fail
623*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
624*53ee8cc1Swenshuai.xi UART_Result MDrv_UART_SetPMRxEnable(MS_BOOL bEnable);
625*53ee8cc1Swenshuai.xi void MDrv_UART_SetUARTSecurityBank(UART_DEVICE_TYPE uart_dev);
626*53ee8cc1Swenshuai.xi 
627*53ee8cc1Swenshuai.xi #if UART_TYPE_EYWA
628*53ee8cc1Swenshuai.xi #define EYWA_PAYLOAD_LEN 8
629*53ee8cc1Swenshuai.xi #define EYWA_DEFAULT_PARITY 0
630*53ee8cc1Swenshuai.xi 
631*53ee8cc1Swenshuai.xi typedef struct _Eywa_FastUart_struct
632*53ee8cc1Swenshuai.xi {
633*53ee8cc1Swenshuai.xi 	MS_U8 data_type;
634*53ee8cc1Swenshuai.xi 	MS_U8 data_type_inv;
635*53ee8cc1Swenshuai.xi 	MS_U16 len;
636*53ee8cc1Swenshuai.xi 	MS_U8 payload[EYWA_PAYLOAD_LEN];
637*53ee8cc1Swenshuai.xi 	MS_U8 parity;
638*53ee8cc1Swenshuai.xi } Eywa_FastUart_struct;
639*53ee8cc1Swenshuai.xi 
640*53ee8cc1Swenshuai.xi typedef enum
641*53ee8cc1Swenshuai.xi {
642*53ee8cc1Swenshuai.xi 	E_EYWA_INVALID = 0,
643*53ee8cc1Swenshuai.xi 	E_EYWA_KEYPAD,
644*53ee8cc1Swenshuai.xi 	E_EYWA_VOICE,
645*53ee8cc1Swenshuai.xi 	E_EYWA_GYROSCOPE,
646*53ee8cc1Swenshuai.xi 	E_EYWA_GSENSOR,
647*53ee8cc1Swenshuai.xi 	E_EYWA_TOUCHPAD
648*53ee8cc1Swenshuai.xi } EYWA_DATATYPE;
649*53ee8cc1Swenshuai.xi 
650*53ee8cc1Swenshuai.xi typedef enum
651*53ee8cc1Swenshuai.xi {
652*53ee8cc1Swenshuai.xi 	E_EYWA_INV_INVALID = 0xFF,
653*53ee8cc1Swenshuai.xi 	E_EYWA_INV_KEYPAD = 0xFE,
654*53ee8cc1Swenshuai.xi 	E_EYWA_INV_VOICE = 0xFD,
655*53ee8cc1Swenshuai.xi 	E_EYWA_INV_GYROSCOPE = 0xFC,
656*53ee8cc1Swenshuai.xi 	E_EYWA_INV_GSENSOR = 0xFB,
657*53ee8cc1Swenshuai.xi 	E_EYWA_INV_TOUCHPAD = 0xFA
658*53ee8cc1Swenshuai.xi } EYWA_DATATYPE_INV;
659*53ee8cc1Swenshuai.xi 
660*53ee8cc1Swenshuai.xi void Eywa_UART_RecvHandler(MS_U8);
661*53ee8cc1Swenshuai.xi MS_U8 Eywa_Cal8BitsChecksum(MS_U8 *, MS_U32);
662*53ee8cc1Swenshuai.xi void Eywa_UART_Init(void);
663*53ee8cc1Swenshuai.xi 
664*53ee8cc1Swenshuai.xi #endif
665*53ee8cc1Swenshuai.xi 
666*53ee8cc1Swenshuai.xi 
667*53ee8cc1Swenshuai.xi #ifdef __cplusplus
668*53ee8cc1Swenshuai.xi }
669*53ee8cc1Swenshuai.xi #endif
670*53ee8cc1Swenshuai.xi 
671*53ee8cc1Swenshuai.xi #endif /* __MDRV_UART_H__ */
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