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MStar hereby reserves the 91 // rights to any and all damages, losses, costs and expenses resulting therefrom. 92 // 93 //////////////////////////////////////////////////////////////////////////////// 94 95 //////////////////////////////////////////////////////////////////////////////////////////////////// 96 /// 97 /// @file drvTCF.h 98 /// @brief TCF Driver 99 /// @author MStar Semiconductor,Inc. 100 /// 101 //////////////////////////////////////////////////////////////////////////////////////////////////// 102 #ifndef __DRV_TCF_H__ 103 #define __DRV_TCF_H__ 104 105 #include "MsTypes.h" 106 #include "MsDevice.h" 107 #include "MsCommon.h" 108 109 //-------------------------------------------------------------------------------------------------- 110 // Define 111 //-------------------------------------------------------------------------------------------------- 112 #define DRV_TCF_OK 0x00000000 113 #define DRV_TCF_FAIL 0x00000001 114 #define DRV_TCF_BUSY 0x00000002 115 #define DRV_TCF_INVALID_INPUT 0x00000003 116 117 118 //-------------------------------------------------------------------------------------------------- 119 // Local enum 120 //-------------------------------------------------------------------------------------------------- 121 /// CF 122 /// 123 #define CF_NVM_RAW_WORDS (64) 124 #define CF_PERSIST_STATE_WORDS (128) 125 #define CF_REG128_WORDS (4) 126 #define CF_REG64_WORDS (2) 127 #define CF_BITMAP_WORDS (8) 128 #define CF_CMD_WORDS (21) 129 #define CF_CWC_WORDS (4) 130 #define CF_PRODUCT_OR_ENTRIES (8) 131 132 #define CF_OP_TYPE_MASK 0x0000E000 // Op[0][15:13] 133 #define CF_OP_TYPE_POS 13 134 typedef enum 135 { 136 E_CF_OP_TYPE_OP_CWC = 0x0, 137 E_CF_OP_TYPE_OP_PERSO = 0x1, 138 E_CF_OP_TYPE_OP_DIFF = 0x2, 139 E_CF_OP_TYPE_OP_FEATURE = 0x3, 140 E_CF_OP_TYPE_OP_MFR_TEST = 0x4 141 } CF_OPERATION_TYPE; 142 143 typedef enum 144 { 145 E_CF_TRANS_STATUS_BUSY_INIT = 0x0, /**< Reset from power on condition. */ 146 E_CF_TRANS_STATUS_BUSY_SETUP = 0x1, /**< Reset after a command has completed. */ 147 E_CF_TRANS_STATUS_READY = 0x2, /**< CF ready to receive a new transaction. */ 148 E_CF_TRANS_STATUS_INPUT = 0x3, /**< CF is receiving a new transaction. */ 149 E_CF_TRANS_STATUS_BUSY_OP = 0x4, /**< CF is processing transaction. */ 150 E_CF_TRANS_STATUS_DONE_OK = 0x8, /**< Transaction was completed successfully. */ 151 E_CF_TRANS_STATUS_DONE_ERROR = 0x9, /**< Transaction has completed with an error. */ 152 E_CF_TRANS_STATUS_DONE_MFR_TEST = 0xE /**< Special case of successful test unlock. */ 153 } CF_TRANS_STATUS_VALUES; 154 155 typedef enum 156 { 157 E_CF_NVM_STATUS_READY = 0x0, /**< NVM personalized and ready. */ 158 E_CF_NVM_STATUS_UNBISTED = 0x1, /**< NVM is unbisted. Currently unsupported state and should be treated as an error. */ 159 E_CF_NVM_STATUS_UNPERSO = 0x2, /**< NVM is pre-personalized. */ 160 E_CF_NVM_STATUS_ERROR = 0x3 /**< NVM personalized and ready. */ 161 } CF_NVM_STATUS_VALUES; 162 163 typedef enum 164 { 165 E_CF_DIFF_STATUS_UNDIFFERENTIATED = 0x0, /**< CF is undifferentiated. */ 166 E_CF_DIFF_STATUS_DIFFERENTIATED = 0x1 /**< CF is differentiated. */ 167 } CF_DIFF_STATUS_VALUES; 168 169 typedef enum 170 { 171 E_CF_OPERATION_TYPE_OP_CWC = 0x0, /**< Request an CWC generation operation. */ 172 E_CF_OPERATION_TYPE_OP_PERSO = 0x1, /**< Request a Personalization operation. */ 173 E_CF_OPERATION_TYPE_OP_DIFF = 0x2, /**< Request a Differentiation operation. */ 174 E_CF_OPERATION_TYPE_OP_FEATURE = 0x3, /**< Request a Feature operation. */ 175 E_CF_OPERATION_TYPE_OP_MFR_TEST = 0x4, /**< Request a Manufacturer Test operation. */ 176 E_CF_OPERATION_TYPE_OP_UNDEFINED1 = 0x5, /**< Reserved operation. */ 177 E_CF_OPERATION_TYPE_OP_UNDEFINED2 = 0x6, /**< Reserved operation. */ 178 E_CF_OPERATION_TYPE_OP_UNDEFINED3 = 0x7 /**< Reserved operation. */ 179 } CF_OPERATION_TYPE_VALUES; 180 181 typedef enum 182 { 183 E_CF_DECM_SOURCE_NONE = 0x0, /**< Invalid DECM source. Should not be used in normal operation. */ 184 E_CF_DECM_SOURCE_SW = 0x1, /**< DECM source from software. */ 185 E_CF_DECM_SOURCE_KEY = 0x2, /**< DECM source from key table. */ 186 E_CF_DECM_SOURCE_MIX = 0x3 /**< Combine DECM input from software and key table. */ 187 } CF_DECM_SOURCE_VALUES; 188 189 typedef enum 190 { 191 E_CF_OUTPUT_USAGE_SHV = 0x0, /**< Output a secure hash value. */ 192 E_CF_OUTPUT_USAGE_CWC_DIRECT = 0x1, /**< Direct transfer of CWC to key table. */ 193 E_CF_OUTPUT_USAGE_CWC_XOR = 0x2, /**< XOR of key table entry with CWC. */ 194 E_CF_OUTPUT_USAGE_CWC_AES_KEY = 0x3 /**< 128-bit AES decrypt of key table entry with CWC. */ 195 } CF_OUTPUT_USAGE_VALUES; 196 197 198 /// CFB 199 /// 200 typedef enum 201 { 202 E_CFB_USE_CASE_3_1_1 = 0x00, // 0 203 E_CFB_USE_CASE_3_1_2, // 1 204 E_CFB_USE_CASE_3_2_1, // 2 205 E_CFB_USE_CASE_3_2_2, // 3 206 E_CFB_USE_CASE_3_2_3, // 4 207 E_CFB_USE_CASE_3_3_1, 208 E_CFB_USE_CASE_3_3_2, 209 E_CFB_USE_CASE_3_3_3, 210 E_CFB_USE_CASE_3_3_4, 211 E_CFB_USE_CASE_3_4_1, 212 E_CFB_USE_CASE_3_4_2, 213 E_CFB_USE_CASE_3_5_1, 214 E_CFB_USE_CASE_3_5_2, 215 E_CFB_USE_CASE_3_5_3, 216 E_CFB_USE_CASE_3_5_4, 217 E_CFB_USE_CASE_3_6, 218 E_CFB_USE_CASE_KLGEN_CACWC, 219 } CFB_USE_CASE; 220 221 typedef enum 222 { 223 E_CFB_NO_OTP_KEY = 0x00, // 0 224 E_CFB_OTP_KEY_1, // 1 225 E_CFB_OTP_KEY_2, // 2 226 E_CFB_OTP_KEY_3, // 3 227 E_CFB_OTP_KEY_4, 228 E_CFB_OTP_KEY_5, 229 E_CFB_OTP_KEY_6, 230 E_CFB_OTP_KEY_7, 231 E_CFB_OTP_KEY_8, 232 } CFB_OTP_KEY_IDX; 233 234 /// CFKE 235 /// 236 #define CFKE_OP_CLRKE_CMD (0x00005FFF) 237 #define CFKE_STATUS_DONE (0x8) 238 #define CFKE_INPUT_WORDS (4) 239 240 typedef enum /* CFKE_STATUS [31:28] */ 241 { 242 E_CFKE_TRANS_STATUS_BUSY_INIT = 0x0, /**< Reset from power-on condition. */ 243 E_CFKE_TRANS_STATUS_READY = 0x2, /**< CFKE ready to receive a new operation request. */ 244 E_CFKE_TRANS_STATUS_BUSY_OP = 0x4, /**< CFKE is processing operation. */ 245 E_CFKE_TRANS_STATUS_DONE_OK = 0x8, /**< Operation completed successfully. CFKE is ready to receive another operation request. */ 246 E_CFKE_TRANS_STATUS_DONE_ERROR = 0x9, /**< Operation completed with an error. */ 247 E_CFKE_TRANS_STATUS_DONE_TEST = 0xE, /**< Special case of successful manufacturing test operation. */ 248 } CFKE_TRANS_STATUS_VALUES; 249 250 typedef enum /* CFKE_STATUS [19:16] */ 251 { 252 E_CFKE_ERROR_NO_ERROR = 0x0, 253 E_CFKE_ERROR_INVALID_COMMAND = 0x1, /**< Indicates a malformed command. */ 254 E_CFKE_ERROR_CF = 0x2, /**< Indicates that TCF output was requested when CWC was not available. */ 255 E_CFKE_ERROR_INVALID_TAGS = 0x4, /**< Indicates that the tags of the SRC1 and/or SRC2 were not valid for the given command. */ 256 E_CFKE_ERROR_COMMAND_FAIL = 0x8, /**< Indicates that command authorization failed, or that validator was incorrect for UNW operation, or that TEST command encountered an error. */ 257 } CFKE_ERROR_CODE; 258 259 typedef enum /* CFKE_STATUS [15:12] *//* CFKE_COMMAND [15:12] */ 260 { 261 E_CFKE_OP_DCF = 0x0, /**< Request an Direct CF operation. */ 262 E_CFKE_OP_XOR = 0x1, /**< Request a XOR operation. */ 263 E_CFKE_OP_AES = 0x2, /**< Request a AES operation. */ 264 E_CFKE_OP_UNW = 0x3, /**< Request a Unwrap operation. */ 265 E_CFKE_OP_HWDECM = 0x4, /**< Request a HWDECM operation. */ 266 E_CFKE_OP_CLRKE = 0x5, /**< Request a CFKE Clear operation. */ 267 E_CFKE_OP_TEST = 0xA, /**< Request a test operation. */ 268 E_CFKE_OP_USER_HASH = 0xF, /**< Write user hash data. */ 269 } CFKE_OPERATION_TYPE, CFKE_CMD_OP; 270 271 typedef enum /* CFKE_STATUS [3] */ 272 { 273 E_CFKE_UNW_REQUIRED_TRUE = 0x0, /**< The TCF CWC must be used for the SRC2 for CFKE_OP_UNW command. */ 274 E_CFKE_UNW_REQUIRED_FALSE = 0x1, /**< The TCF CWC may be used in any command. */ 275 } CFKE_DIFF_ALLOW_NON_UNW; 276 277 typedef enum /* CFKE_STATUS [2] */ 278 { 279 E_CFKE_CK_ALLOWED_FALSE = 0x0, /**< The TCF CWC may be only used to derive a CW. */ 280 E_CFKE_CK_ALLOWED_TRUE = 0x1, /**< The TCF CWC may be used to derive either a CW or CK. */ 281 } CFKE_DIFF_ALLOW_CK; 282 283 typedef enum /* CFKE_STATUS [1:0] */ 284 { 285 E_CFKE_CONTENT_OUTPUT_ALLOW_NONE = 0x0, 286 E_CFKE_CONTENT_OUTPUT_ALLOW_A = 0x1, 287 E_CFKE_CONTENT_OUTPUT_ALLOW_AB = 0x2, 288 E_CFKE_CONTENT_OUTPUT_ALLOW_ABC = 0x3, 289 } CFKE_DIFF_CONTENT_OUTPUT_ALLOWED; 290 291 typedef enum /* CFKE_COMMAND [11:8] */ 292 { 293 E_CFKE_DEST_CW = 0x0, /**< Output should be placed on the cfCwOut output, to be used as the control word for the transport stream descrambler. */ 294 E_CFKE_DEST_CK = 0x1, /**< Output should be placed on the cfCkOut output, to be used as the content key for the bulk descrambler. */ 295 E_CFKE_DEST_SLOTA = 0x4, /**< Output should be written back into Key Slot A. */ 296 E_CFKE_DEST_SLOTB = 0x5, /**< Output should be written back into Key Slot B. */ 297 E_CFKE_DEST_SLOTC = 0x6, /**< Output should be written back into Key Slot C. */ 298 E_CFKE_DEST_SLOTD = 0x7, /**< Output should be written back into Key Slot D. */ 299 E_CFKE_DEST_NULL = 0xF, /**< No destination for this operation. */ 300 // Values 0x2-0x3 and 0x8-0xE are undefined and will cause an INVALID_COMMAND error if encountered. 301 } CFKE_CMD_DEST; 302 303 typedef enum /* CFKE_COMMAND [7:4]: Src1 *//* CFKE_COMMAND [3:0]: Src2 */ 304 { 305 E_CFKE_SRC_NULL = 0x0, /**< No SRC is used for the operation. */ 306 E_CFKE_SRC_CF = 0x1, /**< Output of CF is used as SRC. */ 307 E_CFKE_SRC_TVEF = 0x2, /**< eFuse input is used as SRC. */ 308 E_CFKE_SRC_SLOTA = 0x4, /**< Existing value in Key Slot A is used as SRC. */ 309 E_CFKE_SRC_SLOTB = 0x5, /**< Existing value in Key Slot B is used as SRC. */ 310 E_CFKE_SRC_SLOTC = 0x6, /**< Existing value in Key Slot C is used as SRC. */ 311 E_CFKE_SRC_SLOTD = 0x7, /**< Existing value in Key Slot D is used as SRC. */ 312 E_CFKE_SRC_SLOTAL = 0x8, /**< Load a new value in Key Slot A which is used as SRC. */ 313 E_CFKE_SRC_SLOTBL = 0x9, /**< Load a new value in Key Slot B which is used as SRC. */ 314 E_CFKE_SRC_SLOTCL = 0xA, /**< Load a new value in Key Slot C which is used as SRC. */ 315 E_CFKE_SRC_SLOTDL = 0xB, /**< Load a new value in Key Slot D which is used as SRC. */ 316 } CFKE_CMD_SRC; 317 318 319 /// CRIKL 320 /// 321 #define CRIKL_KL_ENG_NPD (0x80) 322 #define CRIKL_KL_ENG_MULTI2 (0x40) 323 #define CRIKL_KL_ENG_CSAV2 (0x20) 324 #define CRIKL_KL_ENG_CSAV3 (0x10) 325 #define CRIKL_KL_ENG_ASA (0x08) 326 #define CRIKL_KL_ENG_DES (0x04) 327 #define CRIKL_KL_ENG_TDES (0x02) 328 #define CRIKL_KL_ENG_AES (0x01) 329 330 #define CRIKL_KL_DEST_AESDMA (0x04) 331 #define CRIKL_KL_DEST_PVR (0x02) 332 #define CRIKL_KL_DEST_CIPHER (0x01) 333 334 335 typedef enum 336 { 337 E_CRIKL_SCMB_CTL_NONE = 0x0, 338 E_CRIKL_SCMB_CTL_RESERVE = 0x1, 339 E_CRIKL_SCMB_CTL_EVEN_KEY = 0x2, 340 E_CRIKL_SCMB_CTL_ODD_KEY = 0x3, 341 } CRIKL_SCRAMBLE_CONTROL; 342 343 typedef enum 344 { 345 E_CRIKL_MIRROR_CF_STATUS = 0x0, 346 E_CRIKL_MIRROR_CFKE_STATUS = 0x1, 347 E_CRIKL_MIRROR_CF_PLATFORM = 0x2, 348 E_CRIKL_MIRROR_CF_FEATURE = 0x3, 349 } CRIKL_MIRROR_MEM; 350 351 typedef enum 352 { 353 E_CRIKL_KEY_SIZE_64 = 0x0, 354 E_CRIKL_KEY_SIZE_128 = 0x1, 355 E_CRIKL_KEY_SIZE_192 = 0x2, 356 E_CRIKL_KEY_SIZE_256 = 0x3, 357 } CRIKL_KEY_SZIE; 358 359 typedef enum 360 { 361 E_CRIKL_OP_DONT_CARE = 0x0, 362 E_CRIKL_OP_DECRYPT = 0x1, 363 E_CRIKL_OP_ENCRYPT = 0x2, 364 } CRIKL_OP_SEL; 365 366 typedef enum 367 { 368 E_CRIKL_KTE0 = 0x0, 369 E_CRIKL_KTE1 = 0x1, 370 E_CRIKL_KTE2 = 0x2, 371 E_CRIKL_KTE3 = 0x3, 372 } CRIKL_KTE_SEL; 373 374 375 //-------------------------------------------------------------------------------------------------- 376 // Type and Structure 377 //-------------------------------------------------------------------------------------------------- 378 /// TCF DDI return value 379 typedef MS_U32 DRV_TCF_RET; 380 381 382 /// CF 383 /// 384 typedef struct // MSTAR_CF_VERSION // 385 { 386 MS_U8 u8VersionEpoch; 387 MS_U8 u8ManufacturerId; 388 MS_U8 u8NetlistVersion; 389 MS_U8 u8VersionBuildId; 390 } DRV_CF_VERSION; 391 392 typedef struct // MSTAR_CF_FEATURE // 393 { 394 MS_U32 u32FeatureVector; 395 } DRV_CF_FEATURE_VECTOR; 396 397 typedef struct // MSTAR_CF_TRANS_STATUS // 398 { 399 MS_U8 eTransStatus; 400 MS_U8 u8UseNvmKey; 401 MS_U8 eOperationType; 402 MS_U8 eDecmSrc; 403 MS_U8 eOutputUsage; 404 MS_U8 u8ProductRange; 405 MS_U8 u8ProductOffset; 406 } DRV_CF_TRANS_STATUS; 407 408 typedef struct // MSTAR_CF_CF_STATUS // 409 { 410 MS_U8 eNvmStatus; 411 MS_U8 eDiffStatus; 412 MS_U8 u8RecentReset; 413 MS_U8 u8CfAlert; 414 MS_U8 u8DevelopmentMode; 415 MS_U8 u8FuseActivate; 416 MS_U8 u8FuseBlock; 417 } DRV_CF_CF_STATUS; 418 419 typedef struct // MSTAR_CF_DECM_STATUS // 420 { 421 MS_U8 u8HwDecmValid; 422 MS_U8 u8HwDecmError; 423 } DRV_CF_DECM_STATUS; 424 425 typedef struct // MSTAR_CF_OPERATION // 426 { 427 MS_U32 Op[CF_CMD_WORDS]; 428 } DRV_CF_OPERATION; 429 430 typedef struct // MSTAR_CF_RESULT // 431 { 432 MS_U8 eOperationType; 433 MS_U8 eTransStatus; 434 MS_U8 u8CwcValid; 435 MS_U32 Shv[4]; 436 } DRV_CF_RESULT; 437 438 439 /// CFB 440 /// 441 typedef struct 442 { 443 MS_U8 u8CwcPid; 444 MS_U8 u8CwcFld; 445 MS_U8 u8CwcFscb; 446 MS_U8 u8CwcScb; 447 MS_U8 u8CwcTsid; 448 MS_U8 u8CwcDst; 449 } DRV_CFB_CWCCFG; 450 451 typedef struct 452 { 453 MS_U8 u8UseCase; 454 MS_U8 u8OtpKeyIdx; 455 MS_U8 u8CAcwcSrc; 456 MS_U32 CACWC[4]; 457 MS_U32 EPK[4]; 458 MS_U32 EFUV[4]; 459 460 DRV_CFB_CWCCFG stCwcCfg; 461 } DRV_CFB_CFBCFG; 462 463 /// CFKE 464 /// 465 typedef struct 466 { 467 CFKE_CMD_SRC eSrcType; /**< Type of input to be written. */ 468 MS_U32 pu32KeySlotData[4]; /**< Write the 128-bit Key Slot value. */ 469 } DRV_CFKE_SOURCE; 470 471 typedef struct 472 { 473 MS_U32 u32UnwPathData; /**< Write the 32-bit Unwrap path value. */ 474 MS_U32 pu832ValidatorData[2]; /**< Write the 64 bit Validator value. */ 475 } DRV_CFKE_UNWRAP_DATA; 476 477 typedef struct 478 { 479 MS_U32 pu32UsrHashData[4]; /**< Write the 128 bit User Hash value. */ 480 } DRV_CFKE_USER_HASH_DATA; 481 482 typedef struct 483 { 484 CFKE_OPERATION_TYPE eOpType; /**< Type of operation to be issued. */ 485 DRV_CFKE_SOURCE eOpSrc1; /**< Source 1 for the operation (if needed). */ 486 DRV_CFKE_SOURCE eOpSrc2; /**< Source 2 for the operation (if needed). */ 487 CFKE_CMD_DEST eOpDest; /**< Destination for the operation (if needed). */ 488 DRV_CFKE_UNWRAP_DATA UnwData; /**< Unwrap data for the \link #CFKE_OP_UNW \endlink operation. */ 489 } DRV_CFKE_OPERATION; 490 491 492 /// CRIKL 493 /// 494 typedef struct 495 { 496 /// Key Index 497 MS_BOOL bDscmbKey; // 1: Dscmb Key, 0: AESDMA Key 498 // kt_index to KeyTable-- DSCMB 499 CRIKL_SCRAMBLE_CONTROL eScmbCtl; // for Dscmb Key 500 MS_U8 u8DscmbId; // for Dscmb Key 501 // ks_index to KeySlot-- AESDMA 502 MS_U8 u8KeySlotIdx; // for Aesdma Key 503 504 /// High HalfWord [63:48] 505 MS_U8 u8VendorNo; // [63:60] 506 MS_U16 u16VendorAtt; // [59:46] 507 508 /// 2nd HalfWord [47:32] 509 MS_U8 u8OutputAllowed; // [45:44] 510 MS_BOOL bMultiEng; // [37] 511 MS_BOOL bLsb64; // [36] 512 CRIKL_KEY_SZIE eKeySize; // [35:32] 513 514 /// 3rd HalfWord [31:16] 515 MS_U8 u8KlEng; // [31:24] 516 MS_U8 u8Drop; // [23:20] 517 MS_U8 u8Cnt; // [19:16] 518 519 /// Low HalfWord [15:0] 520 MS_U8 u8KlDest; // [12:10] 521 CRIKL_OP_SEL eOpSel; // [09:08] 522 CRIKL_KTE_SEL eKteSel; // [07:04] 523 MS_BOOL bLock; // [03] 524 MS_BOOL bParaVld; // [02] 525 MS_BOOL bKlEn; // [00] 526 } DRV_CRIKL_KEY_CONFIG; 527 528 529 //-------------------------------------------------------------------------------------------------- 530 // Function Prototype 531 //-------------------------------------------------------------------------------------------------- 532 /// CF APIs 533 /// 534 DLL_PUBLIC DRV_TCF_RET MDrv_TCF_Init(void); 535 DLL_PUBLIC DRV_TCF_RET MDrv_CF_Version_Info(DRV_CF_VERSION *pstVersion); 536 DLL_PUBLIC DRV_TCF_RET MDrv_CF_Trans_Status(DRV_CF_TRANS_STATUS *pstTransStatus); 537 DLL_PUBLIC DRV_TCF_RET MDrv_CF_Cf_Status(DRV_CF_CF_STATUS *pstCfStatus); 538 DLL_PUBLIC DRV_TCF_RET MDrv_CF_FeatureVector(DRV_CF_FEATURE_VECTOR *pstCfFeature); 539 DLL_PUBLIC DRV_TCF_RET MDrv_CF_Issue_Op(DRV_CF_OPERATION *pCfOperations); 540 DLL_PUBLIC DRV_TCF_RET MDrv_CF_IsFinished(void); 541 DLL_PUBLIC DRV_TCF_RET MDrv_CF_Read_Op_Result(DRV_CF_RESULT *pCfResult); 542 543 /// CFB APIs 544 /// 545 DLL_PUBLIC DRV_TCF_RET MDrv_CFB_Init(void); 546 DLL_PUBLIC DRV_TCF_RET MDrv_CFB_Enable(void); 547 DLL_PUBLIC DRV_TCF_RET MDrv_CFB_Reset(void); 548 DLL_PUBLIC DRV_TCF_RET MDrv_CFB_Setup(DRV_CFB_CFBCFG *pstCFBCfg); 549 DLL_PUBLIC DRV_TCF_RET MDrv_CFB_Is_Ready(void); 550 DLL_PUBLIC DRV_TCF_RET MDrv_CFB_Is_Done(void); 551 552 /// CFB DBG APIs 553 DLL_PUBLIC void MDrv_CFB_DBG_KT_Response(void); 554 DLL_PUBLIC MS_U8 MDrv_CFB_DBG_CFB_FSM(void); 555 556 /// CFKE APIs 557 /// 558 DLL_PUBLIC DRV_TCF_RET MDrv_CFKE_Cmd_Exe(DRV_CFKE_OPERATION *pCfkeOp); 559 DLL_PUBLIC DRV_TCF_RET MDrv_CFKE_IsDone(CFKE_ERROR_CODE *eCfkeErr); 560 DLL_PUBLIC DRV_TCF_RET MDrv_CFKE_IsReady(void); 561 DLL_PUBLIC DRV_TCF_RET MDrv_CFKE_UserHash_Setup(DRV_CFKE_USER_HASH_DATA *pUserHash); 562 563 /// CRIKL APIs 564 DLL_PUBLIC MS_U32 MDrv_CRIKL_Mirror(CRIKL_MIRROR_MEM eCandidate); 565 DLL_PUBLIC DRV_TCF_RET MDrv_CRIKL_Set_KeyConfig(DRV_CRIKL_KEY_CONFIG *stKeyCfg); 566 567 #endif /* __DRV_TCF_H__ */ 568