xref: /utopia/UTPA2-700.0.x/mxlib/include/drvDDC2BI.h (revision 53ee8cc121a030b8d368113ac3e966b4705770ef)
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95*53ee8cc1Swenshuai.xi ///////////////////////////////////////////////////////////////////////////////////////////////////
96*53ee8cc1Swenshuai.xi ///
97*53ee8cc1Swenshuai.xi /// @file    drvDDC2BI.h
98*53ee8cc1Swenshuai.xi /// @brief  DDC2Bi interface
99*53ee8cc1Swenshuai.xi /// @author MStar Semiconductor Inc.
100*53ee8cc1Swenshuai.xi ///////////////////////////////////////////////////////////////////////////////////////////////////
101*53ee8cc1Swenshuai.xi 
102*53ee8cc1Swenshuai.xi #ifndef _DRVDDC2BI_H_
103*53ee8cc1Swenshuai.xi #define _DRVDDC2BI_H_
104*53ee8cc1Swenshuai.xi 
105*53ee8cc1Swenshuai.xi #include "MsTypes.h"
106*53ee8cc1Swenshuai.xi 
107*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
108*53ee8cc1Swenshuai.xi //  Macro and Define
109*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
110*53ee8cc1Swenshuai.xi 
111*53ee8cc1Swenshuai.xi #define MSIF_DDC_LIB_CODE               {'D','D','C','_'}
112*53ee8cc1Swenshuai.xi #define MSIF_DDC_LIBVER                 {'0','1'}
113*53ee8cc1Swenshuai.xi #define MSIF_DDC_BUILDNUM               {'0','2'}
114*53ee8cc1Swenshuai.xi #define MSIF_DDC_CHANGELIST             {'0','0','3','1','6','8','6','6'}
115*53ee8cc1Swenshuai.xi #define DDC2BI_DRV_VERSION              /* Character String for DRV/API version             */  \
116*53ee8cc1Swenshuai.xi     MSIF_TAG,                           /* 'MSIF'                                           */  \
117*53ee8cc1Swenshuai.xi     MSIF_CLASS,                         /* '00'                                             */  \
118*53ee8cc1Swenshuai.xi     MSIF_CUS,                           /* 0x0000                                           */  \
119*53ee8cc1Swenshuai.xi     MSIF_MOD,                           /* 0x0000                                           */  \
120*53ee8cc1Swenshuai.xi     MSIF_CHIP,                                                                                  \
121*53ee8cc1Swenshuai.xi     MSIF_CPU,                                                                                   \
122*53ee8cc1Swenshuai.xi     MSIF_DDC_LIB_CODE,                  /* IP__                                             */  \
123*53ee8cc1Swenshuai.xi     MSIF_DDC_LIBVER,                    /* 0.0 ~ Z.Z                                        */  \
124*53ee8cc1Swenshuai.xi     MSIF_DDC_BUILDNUM,                  /* 00 ~ 99                                          */  \
125*53ee8cc1Swenshuai.xi     MSIF_DDC_CHANGELIST,                /* CL#                                              */  \
126*53ee8cc1Swenshuai.xi     MSIF_OS
127*53ee8cc1Swenshuai.xi 
128*53ee8cc1Swenshuai.xi //----------------------------
129*53ee8cc1Swenshuai.xi // Return value
130*53ee8cc1Swenshuai.xi //----------------------------
131*53ee8cc1Swenshuai.xi typedef enum
132*53ee8cc1Swenshuai.xi {
133*53ee8cc1Swenshuai.xi     E_DDC2BI_RET_FAIL = 0,
134*53ee8cc1Swenshuai.xi     E_DDC2BI_RET_OK,
135*53ee8cc1Swenshuai.xi } E_DDC2BI_ReturnValue;
136*53ee8cc1Swenshuai.xi 
137*53ee8cc1Swenshuai.xi 
138*53ee8cc1Swenshuai.xi // DDC2Bi receive/transmit status bytes definitions
139*53ee8cc1Swenshuai.xi #define    DDC2B_CLEAR                  0
140*53ee8cc1Swenshuai.xi #define    DDC2B_SRCADDRESS             1
141*53ee8cc1Swenshuai.xi #define    DDC2B_COMMAND                2
142*53ee8cc1Swenshuai.xi #define    DDC2B_RECBODY                3
143*53ee8cc1Swenshuai.xi #define    DDC2B_WAITFORCK              4
144*53ee8cc1Swenshuai.xi #define    DDC2B_COMPLETED              5
145*53ee8cc1Swenshuai.xi #define    DDC2B_MSGON                  6
146*53ee8cc1Swenshuai.xi #define    DDC2B_OVER                   7
147*53ee8cc1Swenshuai.xi 
148*53ee8cc1Swenshuai.xi // receive/transmit buffer syntax defines
149*53ee8cc1Swenshuai.xi #define LENGTH                          0
150*53ee8cc1Swenshuai.xi #define COMMAND                         1
151*53ee8cc1Swenshuai.xi #define DATA1                           2
152*53ee8cc1Swenshuai.xi #define DATA2                           3
153*53ee8cc1Swenshuai.xi #define CHKSUM                          4
154*53ee8cc1Swenshuai.xi 
155*53ee8cc1Swenshuai.xi // DDC2Bi standard definitions
156*53ee8cc1Swenshuai.xi #define DDC2B_DEST_ADDRESS              0x6e
157*53ee8cc1Swenshuai.xi #define DDC2B_SRC_ADDRESS               0x51
158*53ee8cc1Swenshuai.xi #define DDC2Bi_CONTROL_STATUS_FLAG      0x80
159*53ee8cc1Swenshuai.xi 
160*53ee8cc1Swenshuai.xi // checksum start values
161*53ee8cc1Swenshuai.xi #define    INITRxCK                     DDC2B_SRC_ADDRESS ^ DDC2B_DEST_ADDRESS
162*53ee8cc1Swenshuai.xi #define    INITTxCK                     0x50^DDC2B_DEST_ADDRESS
163*53ee8cc1Swenshuai.xi #define    INITNMVTxCK                  0x50^DDC2B_SRC_ADDRESS
164*53ee8cc1Swenshuai.xi 
165*53ee8cc1Swenshuai.xi //interrupt flag
166*53ee8cc1Swenshuai.xi #define TXBI                            0x10
167*53ee8cc1Swenshuai.xi #define RCBI                            0x08
168*53ee8cc1Swenshuai.xi //#define SlvBMI                        0x20
169*53ee8cc1Swenshuai.xi 
170*53ee8cc1Swenshuai.xi 
171*53ee8cc1Swenshuai.xi #define DDC2B_SRC_ADDRESS_CUSTOMER      0x50
172*53ee8cc1Swenshuai.xi #define MAX_TXWAIT_DELAY                100
173*53ee8cc1Swenshuai.xi #define MaxBufLen                       128
174*53ee8cc1Swenshuai.xi 
175*53ee8cc1Swenshuai.xi 
176*53ee8cc1Swenshuai.xi // This defination must be fine.
177*53ee8cc1Swenshuai.xi 
178*53ee8cc1Swenshuai.xi /*
179*53ee8cc1Swenshuai.xi     Please measure the execution time of a loop without any statement for DDC_WAITING_LOOPSCOUNT.
180*53ee8cc1Swenshuai.xi     ex:
181*53ee8cc1Swenshuai.xi         for ( i = 0 ; i < DDC_WAITING_LOOPSCOUNT ; i++) asm("");
182*53ee8cc1Swenshuai.xi 
183*53ee8cc1Swenshuai.xi     The asm("") is used to prevent compiler doing optimization on that loop.
184*53ee8cc1Swenshuai.xi 
185*53ee8cc1Swenshuai.xi     The total execution time of loops should be larger than 1/12M (70ns for DDC clk).
186*53ee8cc1Swenshuai.xi     (Move this part into HAL later)
187*53ee8cc1Swenshuai.xi */
188*53ee8cc1Swenshuai.xi #define DDC_WAITING_LOOPSCOUNT 3   // 46ns/loop in 172Mhz HK.
189*53ee8cc1Swenshuai.xi 
190*53ee8cc1Swenshuai.xi typedef MS_U8(*CALLBACK_AlignControl)(MS_U8 *pDDCBuffData);
191*53ee8cc1Swenshuai.xi 
192*53ee8cc1Swenshuai.xi 
193*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
194*53ee8cc1Swenshuai.xi //  Type and Structure
195*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
196*53ee8cc1Swenshuai.xi 
197*53ee8cc1Swenshuai.xi 
198*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
199*53ee8cc1Swenshuai.xi //  Function and Variable
200*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
201*53ee8cc1Swenshuai.xi /**
202*53ee8cc1Swenshuai.xi *   DDC2BI Info
203*53ee8cc1Swenshuai.xi */
204*53ee8cc1Swenshuai.xi typedef struct
205*53ee8cc1Swenshuai.xi {
206*53ee8cc1Swenshuai.xi     MS_U8 Reserved;
207*53ee8cc1Swenshuai.xi }MS_DDC2BI_INFO;
208*53ee8cc1Swenshuai.xi 
209*53ee8cc1Swenshuai.xi /**
210*53ee8cc1Swenshuai.xi *   DDC2BI Status
211*53ee8cc1Swenshuai.xi */
212*53ee8cc1Swenshuai.xi typedef struct
213*53ee8cc1Swenshuai.xi {
214*53ee8cc1Swenshuai.xi     MS_BOOL bIsInitialized;
215*53ee8cc1Swenshuai.xi     MS_BOOL bIsRunning;
216*53ee8cc1Swenshuai.xi }MS_DDC2BI_Status;
217*53ee8cc1Swenshuai.xi 
218*53ee8cc1Swenshuai.xi E_DDC2BI_ReturnValue  MDrv_DDC2BI_GetLibVer(const MSIF_Version **ppVersion);      ///< Get version (without Mutex protect)
219*53ee8cc1Swenshuai.xi E_DDC2BI_ReturnValue  MDrv_DDC2BI_GetInfo(MS_DDC2BI_INFO *pInfo);
220*53ee8cc1Swenshuai.xi E_DDC2BI_ReturnValue  MDrv_DDC2BI_GetStatus(MS_DDC2BI_Status *pStatus);
221*53ee8cc1Swenshuai.xi E_DDC2BI_ReturnValue  MDrv_DDC2BI_SetDbgLevel(MS_U16 u16DbgSwitch);
222*53ee8cc1Swenshuai.xi 
223*53ee8cc1Swenshuai.xi void MDrv_DDC2BI_Init(void);
224*53ee8cc1Swenshuai.xi MS_BOOL MDrv_DDC2BI_Exit(void);
225*53ee8cc1Swenshuai.xi void MDrv_DDC2BI_Set_StandardCallBack(CALLBACK_AlignControl align_control);      ///< DDC2BI callback function for Standard
226*53ee8cc1Swenshuai.xi void MDrv_DDC2BI_Set_CustomerCallBack(CALLBACK_AlignControl align_control);      ///< DDC2BI callback function for Customer
227*53ee8cc1Swenshuai.xi 
228*53ee8cc1Swenshuai.xi #endif  // _DRVDDC2BI_H_
229