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MStar hereby reserves the 91 // rights to any and all damages, losses, costs and expenses resulting therefrom. 92 // 93 //////////////////////////////////////////////////////////////////////////////// 94 //============================================================================== 95 // [mhal_sc.h] 96 // Date: 20081203 97 // Descriptions: Add a new layer for HW setting 98 //============================================================================== 99 #ifndef MHAL_SC_H 100 #define MHAL_SC_H 101 102 #ifdef MSOS_TYPE_LINUX_KERNEL 103 #include <asm/div64.h> 104 #else 105 #define do_div(x,y) ((x)/=(y)) 106 #endif 107 108 109 #include "hwreg_sc.h" 110 #include "hwreg_mod.h" 111 #include "mhal_xc_chip_config.h" 112 113 //============================================================================== 114 // Scaling Ratio Macro 115 #ifdef MSOS_TYPE_LINUX_KERNEL 116 #define H_PreScalingDownRatio(Input, Output) { u64_result = ((MS_U64)(Output)) * 2097152ul;do_div(u64_result,(Input)); u64_result +=1;do_div(u64_result,2);} 117 #define H_PreScalingDownRatioAdv(Input, Output) { u64_result = ((MS_U64)(Input)-1) * 2097152ul;do_div(u64_result,(Output-1)); u64_result +=1;do_div(u64_result,2);} //Advance scaling 118 #define H_PreScalingDownRatioAdv_No_Minus1(Input, Output) { u64_result = ((MS_U64)(Input)) * 2097152ul;do_div(u64_result,((Output)) *2);} //Advance scaling without minus 1 119 #define V_PreScalingDownRatio(Input, Output) { u64_result = ((MS_U64)(Output)) * 1048576ul;do_div(u64_result,(Input)); u64_result +=1;} // CB mode 120 #define V_PreScalingDownRatioBilinear(Input, Output) { u64_result = ((MS_U64)(Input)-1) * 1048576ul;do_div(u64_result,((Output) -1));} // Bilinear 121 122 #define H_PostScalingRatio(Input, Output) { u64_result = ((MS_U64)(Input)) * 2097152ul;do_div(u64_result,(Output)); u64_result +=1;do_div(u64_result,2);} 123 #define V_PostScalingRatio(Input, Output) { u64_result = ((MS_U64)(Input)-1) * 2097152ul;do_div(u64_result,(Output-1)); u64_result +=1;do_div(u64_result,2);} 124 #define V_PostScalingRatio_P2I(Input, Output) { u64_result = ((MS_U64)(Input)) * 2097152ul;do_div(u64_result,(Output*2));} 125 #else 126 // H_PreScalingDownRatio() was refined to reduce the calculation error. 127 // Use round up (x+y/2)/y might reduce the scaling ratio and induce right vertical garbage line. 128 // So use un-conditional add by 1 (x+y)/y. 129 #define H_PreScalingDownRatio(Input, Output) ((MS_U32)( (((MS_U64)(Output)) * 2097152ul)/ (Input) + 1 ) /2) 130 #define H_PreScalingDownRatioAdv(Input, Output) ((MS_U32)( (((MS_U64)(Input)-1) * 2097152ul)/ ((Output)-1) +1) /2) //Advance scaling 131 #define H_PreScalingDownRatioAdv_No_Minus1(Input, Output) ((MS_U32)( (((MS_U64)(Input)) * 2097152ul)/ ((Output)) /2 ) ) //Advance scaling without minus 1 132 #define V_PreScalingDownRatio(Input, Output) ((MS_U32)( (((MS_U64)(Output)) * 1048576ul)/ (Input) + 1 )) // CB mode 133 #define V_PreScalingDownRatioBilinear(Input, Output) ((MS_U32)( (((MS_U64)(Input)-1) * 1048576ul)/ ((Output) -1))) // Bilinear 134 135 #define H_PostScalingRatio(Input, Output) ((MS_U32)( ((MS_U64)(Input)) * 2097152ul / (Output) + 1 )/2 ) 136 //#define H_PostScalingRatioAdv(Input, Output) ( ((MS_U32)(Input)-1) * 1048576ul / ((Output)-1) + 1 ) 137 #define V_PostScalingRatio(Input, Output) ((MS_U32)( ((MS_U64)(Input)-1) * 2097152ul / ((Output)-1) + 1 ) / 2) 138 #define V_PostScalingRatio_P2I(Input, Output) ((MS_U32)( ((MS_U64)(Input)) * 2097152ul / (Output) /2) ) 139 #endif 140 // In MDrv_SC_3D_Adjust_PreHorDstSize(), 141 // do a rough check after all, for 2 frame case. 142 #define ENABLE_2_FRAME_SIZE_PROTECTION TRUE 143 144 #if IRQ_CLEAN_INKERNEL 145 #define INTERRUPT_DUMMY_REGISTER REG_SC_BK30_4C_L 146 #define INTERRUPT_DUMMY_REGISTER_H REG_SC_BK30_4D_L 147 #endif 148 149 typedef struct 150 { 151 MS_PHY u32IPMBase0; 152 MS_PHY u32IPMBase1; 153 MS_PHY u32IPMBase2; 154 MS_U16 u16IPMOffset; 155 MS_U16 u16IPMFetch; 156 MS_U16 u16VLength; 157 MS_PHY u32WriteLimitBase; 158 159 MS_BOOL bLinearAddrMode; 160 MS_BOOL bYCSeparate; 161 162 MS_BOOL bMemFormat422; 163 MS_BOOL bInterlace; 164 MS_U8 u8BitPerPixel; 165 MS_U8 u8FBNum; 166 } SC_FRAMEBUF_INFO_t; 167 168 typedef struct __attribute__((packed)) 169 { 170 MS_U16 u16MiuG0Mask; 171 MS_U16 u16MiuG1Mask; 172 MS_U16 u16MiuG2Mask; 173 MS_U16 u16MiuG3Mask; 174 MS_U16 u16MiuG4Mask; 175 MS_U16 u16MiuG5Mask; 176 MS_U16 u16MiuG6Mask; 177 } SC_MIUMASK_t; 178 179 typedef struct 180 { 181 MS_U8 u8MainFBSel; 182 MS_U8 u8SubFBSel; 183 } SC_MIUSEL_t; 184 185 typedef enum 186 { 187 E_XC_FPLL_DIR_UNKNOWN, 188 E_XC_FPLL_DIR_UP, 189 E_XC_FPLL_DIR_DOWN, 190 } MS_XC_FPLL_DIRECTION; 191 192 typedef enum 193 { 194 E_XC_FPLL_RES_WAITING, 195 E_XC_FPLL_RES_TIMEOUT, 196 E_XC_FPLL_RES_FINISHED, 197 } MS_XC_FPLL_RESULT; 198 199 typedef struct 200 { 201 MS_U8 u8Debounce; 202 MS_U16 u16PhaseDiff; 203 MS_XC_FPLL_DIRECTION eFpllDir; 204 MS_XC_FPLL_RESULT eFpllResult; 205 } MS_XC_GET_FPLL_PHASEDIFF; 206 207 typedef enum 208 { 209 E_HAL_SC_3D_LRCHGMODE_OFF = 0, 210 E_HAL_SC_3D_LRCHGMODE_FRAME = 1, 211 E_HAL_SC_3D_LRCHGMODE_BLOCK = 2, 212 E_HAL_SC_3D_LRCHGMODE_LINE = 3, 213 } HAL_SC_3D_LRCHGMODE; 214 215 typedef struct 216 { 217 void* pInstance; 218 MS_BOOL bEnable; 219 SCALER_WIN eWindow; 220 }SC_SET_FORCE_CURRENT_READ_BANK_t; 221 222 typedef enum { 223 EN_XC_PIXEL_SHIFT_INVALID = 0, 224 EN_XC_PIXEL_SHIFT_DISABLE, 225 EN_XC_PIXEL_SHIFT_ENABLE, 226 EN_XC_PIXEL_SHIFT_FORCE_UPDATE, 227 } XC_PIXEL_SHIFT_STATUS; 228 229 typedef struct { 230 //BK10 231 MS_U16 u16RegTGenDeVstart; 232 MS_U16 u16RegTGenDeVend; 233 234 // BK68 235 MS_U16 u16RegSTGenDeVstart; 236 MS_U16 u16RegSTGenDeVend; 237 } XC_VSYNC_VSTART; 238 239 typedef enum 240 { 241 E_DELAY_TIME_UNKNOWN = 0, 242 E_DELAY_TIME_FRC = 1, 243 }XC_DELAY_TIME_STATUS; 244 245 246 //============================================================================== 247 //============================================================================== 248 #ifdef MHAL_SC_C 249 #define INTERFACE 250 #else 251 #define INTERFACE extern 252 #endif 253 254 INTERFACE void Hal_SC_setfield(void *pInstance, MS_U16 reg_1D, MS_U16 reg_21, MS_U16 reg_23, SCALER_WIN eWindow); 255 256 INTERFACE void Hal_SC_set_ficlk(void *pInstance, MS_BOOL bPreDown, SCALER_WIN eWindow); 257 INTERFACE void Hal_SC_set_shiftline(void *pInstance, MS_U8 u8Val, SCALER_WIN eWindow); 258 INTERFACE void Hal_SC_set_422_cbcr_swap(void *pInstance, MS_BOOL bEnable, SCALER_WIN eWindow); 259 INTERFACE void Hal_SC_set_pre_align_pixel(void *pInstance, MS_BOOL bEnable, MS_U16 pixels, SCALER_WIN eWindow); 260 INTERFACE void Hal_XC_Set_FreeFRCMD(void *pInstance, MS_BOOL bEnable); 261 #define Hal_SC_force3fb(args...) 262 #define Hal_SC_force4fb(args...) 263 #define Hal_SC_force8fb(args...) 264 INTERFACE XC_FRAME_STORE_NUMBER Hal_SC_GetFrameStoreMode(void *pInstance, SCALER_WIN eWindow); 265 INTERFACE void Hal_SC_set_csc(void *pInstance, MS_BOOL bEnable, SCALER_WIN eWindow); 266 INTERFACE void Hal_SC_set_wr_bank_mapping(void *pInstance, MS_U8 u8val, SCALER_WIN eWindow); 267 INTERFACE void Hal_SC_set_frcm_wr_bank_mapping(void *pInstance, MS_U8 u8val, SCALER_WIN eWindow); 268 INTERFACE void Hal_SC_set_wr_bank_mapping_num(void *pInstance, MS_U8 u8val, SCALER_WIN eWindow); 269 INTERFACE MS_U8 Hal_SC_Get_WR_Bank_Mapping(void *pInstance, SCALER_WIN eWindow); 270 INTERFACE MS_U8 Hal_SC_Get_WR_Bank_Mapping_Num(void *pInstance, SCALER_WIN eWindow); 271 INTERFACE void Hal_SC_set_delayline(void *pInstance, MS_U8 u8DelayLines, SCALER_WIN eWindow); 272 INTERFACE void Hal_SC_set_write_limit(void *pInstance, MS_PHY u32WritelimitAddrBase, SCALER_WIN eWindow); 273 INTERFACE void Hal_SC_set_dual_write_limit(void *pInstance, MS_PHY u32WritelimitAddrBase, SCALER_WIN eWindow); 274 INTERFACE void Hal_SC_set_frcm_write_limit(void *pInstance, MS_PHY u32WritelimitAddrBase, SCALER_WIN eWindow); 275 INTERFACE void Hal_SC_set_opm_write_limit(void *pInstance, MS_BOOL bEnable, MS_BOOL bFlag, MS_PHY u32OPWlimitAddr, SCALER_WIN eWindow); 276 INTERFACE void Hal_SC_sw_db(void *pInstance, P_SC_SWDB_INFO pDBreg, SCALER_WIN eWindow); 277 INTERFACE void Hal_SC_sw_db_burst(void *pInstance, P_SC_SWDB_INFO pDBreg, SCALER_WIN eWindow); 278 INTERFACE void Hal_SC_dual_sw_db_burst(void *pInstance, P_SC_SWDB_INFO pMainDBreg, P_SC_SWDB_INFO pSubDBreg); 279 INTERFACE E_APIXC_ReturnValue Hal_SC_VIP_Peaking_Setting(void *pInstance, SCALER_WIN eWindow); 280 INTERFACE E_APIXC_ReturnValue Hal_SC_support_source_to_ve(void *pInstance, MS_U16* OutputCapability); 281 INTERFACE E_APIXC_ReturnValue Hal_SC_set_output_capture_enable(void *pInstance, MS_BOOL bEnable,E_XC_SOURCE_TO_VE eSourceToVE); 282 INTERFACE void Hal_SC_set_de_window(void *pInstance, XC_PANEL_INFO *pPanel_Info); 283 INTERFACE void Hal_SC_get_disp_de_window(void *pInstance, MS_WINDOW_TYPE *pWin); 284 INTERFACE MS_PHY Hal_SC_Get_DNRBase0(void *pInstance, SCALER_WIN eWindow); 285 INTERFACE MS_PHY Hal_SC_Get_DNRBase1(void *pInstance, SCALER_WIN eWindow); 286 INTERFACE MS_PHY Hal_SC_Get_OPMBase0(void *pInstance, SCALER_WIN eWindow); 287 INTERFACE MS_PHY Hal_SC_Get_OPMBase1(void *pInstance, SCALER_WIN eWindow); 288 INTERFACE MS_PHY Hal_SC_Get_OPMBase2(void *pInstance, SCALER_WIN eWindow); 289 INTERFACE MS_PHY Hal_SC_Get_FRCMBaseAddr(void *pInstance, MS_U8 u8id,SCALER_WIN eWindow); 290 INTERFACE MS_U8 Hal_SC_Get_LBOffset(void *pInstance, SCALER_WIN eWindow); 291 INTERFACE void Hal_SC_Set_LBOffset(void *pInstance, MS_U8 u8LBOffset, SCALER_WIN eWindow); 292 INTERFACE void Hal_SC_set_DNRBase0(void *pInstance, MS_PHY u32DNRBase0, SCALER_WIN eWindow); 293 INTERFACE void Hal_SC_set_DNRBase1(void *pInstance, MS_PHY u32DNRBase1, SCALER_WIN eWindow); 294 INTERFACE void Hal_SC_set_DNRBase2(void *pInstance, MS_PHY u32DNRBase2, SCALER_WIN eWindow); 295 INTERFACE void Hal_SC_set_OPMBase0(void *pInstance, MS_PHY u32OPMBase0, SCALER_WIN eWindow); 296 INTERFACE void Hal_SC_set_OPMBase1(void *pInstance, MS_PHY u32OPMBase1, SCALER_WIN eWindow); 297 INTERFACE void Hal_SC_set_OPMBase2(void *pInstance, MS_PHY u32OPMBase2, SCALER_WIN eWindow); 298 INTERFACE void Hal_SC_set_FRCM_WBase0(void *pInstance, MS_PHY u32FRCM_WBase0, SCALER_WIN eWindow); 299 INTERFACE void Hal_SC_set_FRCM_WBase1(void *pInstance, MS_PHY u32FRCM_WBase1, SCALER_WIN eWindow); 300 INTERFACE void Hal_SC_set_FRCM_WBase2(void *pInstance, MS_PHY u32FRCM_WBase2, SCALER_WIN eWindow); 301 INTERFACE void Hal_SC_set_FRCM_RBase0(void *pInstance, MS_PHY u32FRCM_RBase0, SCALER_WIN eWindow); 302 INTERFACE void Hal_SC_set_FRCM_RBase1(void *pInstance, MS_PHY u32FRCM_RBase1, SCALER_WIN eWindow); 303 INTERFACE void Hal_SC_set_FRCM_RBase2(void *pInstance, MS_PHY u32FRCM_RBase2, SCALER_WIN eWindow); 304 INTERFACE void Hal_SC_set_memoryaddress(void *pInstance, MS_PHY u32DNRBase0, MS_PHY u32DNRBase1, MS_PHY u32DNRBase2, MS_PHY u32OPMBase0, MS_PHY u32OPMBase1, MS_PHY u32OPMBase2, SCALER_WIN eWindow); 305 INTERFACE void Hal_SC_set_frcm_memoryaddress(void *pInstance, MS_PHY u32FRCM_WBase0, MS_PHY u32FRCM_WBase1, MS_PHY u32FRCM_WBase2, MS_PHY u32FRCM_RBase0, MS_PHY u32FRCM_RBase1, MS_PHY u32FRCM_RBase2, SCALER_WIN eWindow); 306 INTERFACE void Hal_SC_set_dual_memoryaddress(void *pInstance, MS_PHY u32DNRBase0, MS_PHY u32DNRBase1, MS_PHY u32DNRBase2, MS_PHY u32OPMBase0, MS_PHY u32OPMBase1, MS_PHY u32OPMBase2, SCALER_WIN eWindow); 307 INTERFACE void Hal_SC_Enable_MiuMask(void *pInstance); 308 INTERFACE void Hal_SC_Disable_MiuMask(void *pInstance); 309 INTERFACE void Hal_SC_set_miusel(void *pInstance, MS_U8 u8MIUSel); 310 INTERFACE void Hal_SC_get_miusel(void *pInstance, SC_MIUSEL_t* stMIUSel); 311 INTERFACE void Hal_SC_set_dual_miusel(void *pInstance, MS_U8 u8MIUSel); 312 INTERFACE void Hal_SC_get_dual_miusel(void *pInstance, SC_MIUSEL_t* stMIUSel); 313 INTERFACE void Hal_SC_set_dual_disable(void *pInstance); 314 INTERFACE void Hal_SC_set_blsk(void *pInstance, MS_BOOL bEn); 315 INTERFACE void Hal_SC_set_blsk_burst(void *pInstance, MS_BOOL bEn); 316 317 INTERFACE void Hal_SC_set_main_black_screen_burst(void *pInstance, MS_BOOL bEn); 318 INTERFACE void Hal_SC_set_main_sub_black_screen_burst(void *pInstance, MS_BOOL bEn); 319 INTERFACE void Hal_SC_set_sub_blue_screen_burst(void *pInstance, MS_BOOL bEn, MS_BOOL bBlue); 320 INTERFACE void Hal_SC_set_main_black_screen(void *pInstance, MS_BOOL bEn); 321 INTERFACE void Hal_SC_set_main_sub_black_screen(void *pInstance, MS_BOOL bEn); 322 INTERFACE void Hal_SC_set_sub_blue_screen(void *pInstance, MS_BOOL bEn, MS_BOOL bBlue); 323 INTERFACE E_APIXC_ReturnValue Hal_SC_IP_Memory_Write_Request(void *pInstance, MS_BOOL bEnable, SCALER_WIN eWindow); 324 INTERFACE E_APIXC_ReturnValue Hal_SC_IP_Memory_Read_Request(void *pInstance, MS_BOOL bEnable, SCALER_WIN eWindow); 325 INTERFACE E_APIXC_ReturnValue Hal_SC_OP_Memory_Write_Request(void *pInstance, MS_BOOL bEnable, SCALER_WIN eWindow); 326 INTERFACE E_APIXC_ReturnValue Hal_SC_frcmw_Memory_Write_Request(void *pInstance, MS_BOOL bEnable, SCALER_WIN eWindow); 327 INTERFACE E_APIXC_ReturnValue Hal_SC_frcmr_Memory_Read_Request(void *pInstance, MS_BOOL bEnable, SCALER_WIN eWindow); 328 INTERFACE void Hal_SC_disable_inputsource_burst(void *pInstance, MS_BOOL bDisable, SCALER_WIN eWindow); 329 INTERFACE void Hal_SC_disable_inputsource(void *pInstance, MS_BOOL bDisable, SCALER_WIN eWindow); 330 INTERFACE MS_U16 Hal_SC_Is_InputSource_Disable(void *pInstance, SCALER_WIN eWindow); 331 INTERFACE void Hal_SC_set_nosignal_color(void *pInstance, MS_U8 u8Color,SCALER_WIN eWindow); 332 INTERFACE void Hal_SC_set_fbl(void *pInstance, MS_BOOL bEn); 333 INTERFACE MS_BOOL Hal_SC_get_fbl(void *pInstance); 334 INTERFACE void HAL_SC_Set_FB_Num(void *pInstance, SCALER_WIN eWindow, XC_FRAME_STORE_NUMBER eBestFBNum, MS_BOOL bInterlace); 335 INTERFACE void Hal_SC_set_freezeimg_burst(void *pInstance, MS_BOOL bEn, SCALER_WIN eWindow); 336 INTERFACE void Hal_SC_set_freezeimg(void *pInstance, MS_BOOL bEn, SCALER_WIN eWindow); 337 INTERFACE void Hal_SC_set_frcm_freezeimg(void *pInstance, MS_BOOL bEn, SCALER_WIN eWindow); 338 INTERFACE MS_BOOL Hal_SC_get_freezeimg(void *pInstance, SCALER_WIN eWindow); 339 INTERFACE void Hal_SC_ip_Init_for_internal_timing(void *pInstance, XC_Internal_TimingType timingtype, SCALER_WIN eWindow); 340 INTERFACE MS_U16 Hal_SC_rgb_average_info(void *pInstance, MS_U16 u16mask, SCALER_WIN eWindow); 341 INTERFACE void Hal_SC_autogain_enable(void *pInstance, MS_BOOL bEnable, SCALER_WIN eWindow); 342 INTERFACE MS_BOOL Hal_SC_autogain_status(void *pInstance, SCALER_WIN eWindow); 343 INTERFACE void Hal_SC_init_riu_base(MS_VIRT u32riu_base, MS_VIRT u32PMriu_base); 344 INTERFACE void Hal_SC_set_mirror(void *pInstance, MS_BOOL bEnable, SCALER_WIN eWindow); 345 INTERFACE void Hal_SC_set_frcm_mirror(void *pInstance, MS_BOOL bEnable, SCALER_WIN eWindow); 346 INTERFACE MS_U16 Hal_SC_GetAVDStatus(void); 347 INTERFACE void Hal_SC_set_rep_window(void *pInstance, MS_BOOL bEnable,MS_U16 x,MS_U16 y,MS_U16 w,MS_U16 h,MS_U8 u8Color); 348 INTERFACE void Hal_SC_set_disp_window(void *pInstance, SCALER_WIN eWindow, MS_WINDOW_TYPE *pdspwin); 349 INTERFACE void Hal_SC_get_disp_window(void *pInstance, SCALER_WIN eWindow, MS_WINDOW_TYPE *pdspwin); 350 INTERFACE void Hal_SC_set_Fclk(void *pInstance, EN_SET_FCLK_CASE enCase); 351 INTERFACE void Hal_SC_get_framebuf_Info(void *pInstance, SC_FRAMEBUF_INFO_t *pFrameBufInfo, SCALER_WIN eWindow); 352 INTERFACE void Hal_SC_set_framebuf_Info(void *pInstance, SC_FRAMEBUF_INFO_t pFrameBufInfo); 353 INTERFACE MS_U8 HAL_SC_get_dnr_setting(void *pInstance, SCALER_WIN eWindow); 354 INTERFACE void HAL_SC_enable_dnr(void *pInstance, MS_U8 u8Val, SCALER_WIN eWindow); 355 INTERFACE void HAL_SC_enable_field_avg_y(void *pInstance, MS_BOOL bEnable, SCALER_WIN eWindow); 356 INTERFACE void HAL_SC_enable_field_avg_c(void *pInstance, MS_BOOL bEnable, SCALER_WIN eWindow); 357 INTERFACE MS_U8 Hal_SC_get_cs_det_cnt(void *pInstance, SCALER_WIN eWindow); 358 INTERFACE void Hal_SC_set_linearmem_mode(MS_BOOL bEnable, SCALER_WIN eWindow); 359 INTERFACE void Hal_SC_set_cs_det_cnt(void *pInstance, MS_U8 u8val, SCALER_WIN eWindow); 360 INTERFACE MS_U8 Hal_SC_get_plus_width(void *pInstance, SCALER_WIN eWindow); 361 INTERFACE void Hal_SC_set_opm_fetch(void *pInstance, SCALER_WIN eWindow, MS_U16 u16OPMFetch); 362 INTERFACE MS_U16 Hal_SC_get_opm_fetch(void *pInstance, SCALER_WIN eWindow); 363 INTERFACE void Hal_SC_SWDS_AddCmd(void *pInstance, P_SC_SWDB_INFO pDBreg, SCALER_WIN eWindow); 364 INTERFACE void Hal_SC_SWDS_Fire(void *pInstance, SCALER_WIN eWindow); 365 366 INTERFACE void HAL_SC_VOP_Set_Contrast_En(void *pInstance, MS_BOOL bEenable, SCALER_WIN eWindow); 367 INTERFACE void HAL_SC_VOP_Set_Contrast_Value(void *pInstance, MS_XC_VOP_CHANNEL_t eVop_Channel, MS_U16 u16Val, SCALER_WIN eWindow); 368 INTERFACE void HAL_SC_VOP_Set_Brightness_En(void *pInstance, MS_BOOL bEenable, SCALER_WIN eWindow); 369 INTERFACE void HAL_SC_VOP_Set_Brightness_Value(void *pInstance, MS_XC_VOP_CHANNEL_t eVop_Channel, MS_U16 u16Val, SCALER_WIN eWindow); 370 371 INTERFACE void HAL_SC_Enable_VInitFactor(void *pInstance, MS_BOOL bEnable,SCALER_WIN eWindow); 372 INTERFACE void HAL_SC_Set_VInitFactorOne(void *pInstance, MS_U32 u32Value,SCALER_WIN eWindow); 373 INTERFACE void HAL_SC_Set_VInitFactorTwo(void *pInstance, MS_U32 u32Value,SCALER_WIN eWindow); 374 INTERFACE void HAL_SC_Set_vsd_input_line_count(void *pInstance, MS_BOOL bEnable,MS_BOOL bUserMode,MS_U32 u32UserLineCount,SCALER_WIN eWindow); 375 INTERFACE void HAL_SC_Set_vsd_output_line_count(void *pInstance, MS_BOOL bEnable,MS_U32 u32LineCount,SCALER_WIN eWindow); 376 INTERFACE MS_U32 Hal_SC_CheckSubWinPreScaling(MS_U16 u16ScaleDst,MS_BOOL bInterlace); 377 INTERFACE void HAL_SC_EnableFPLL(void); 378 INTERFACE MS_BOOL HAL_SC_WaitFPLLDone(void *pInstance); 379 INTERFACE MS_U16 HAL_SC_GetOutputVFreqX100(MS_U32 u32XTAL_Clock); 380 INTERFACE MS_BOOL Hal_SC_get_ip2_csc(void *pInstance, SCALER_WIN eWindow); 381 382 //Add for T3 383 INTERFACE void HAL_SC_FilmMode_Patch1(void *pInstance); 384 385 INTERFACE void HAL_SC_SetMainLineBufferOffset(void *pInstance, MS_U16 u16Linebuffer); 386 INTERFACE void HAL_SC_SetSubLineBufferOffset(void *pInstance, MS_U16 u16Linebuffer); 387 INTERFACE void HAL_SC_SetDisplay_LineBuffer_Mode(void *pInstance, MS_BOOL bEnable); 388 INTERFACE void HAL_SC_SetDisplay_Start_Mode(void *pInstance, MS_BOOL bEnable); 389 INTERFACE void HAL_SC_FillLineBuffer(void *pInstance, MS_BOOL bEnable, SCALER_WIN eWindow); 390 INTERFACE void Hal_SC_enable_window(void *pInstance, MS_BOOL bEn,SCALER_WIN eWindow); 391 INTERFACE void Hal_SC_enable_window_burst(void *pInstance, MS_BOOL bEn,SCALER_WIN eWindow); 392 INTERFACE void Hal_SC_set_trigger_signal(void); 393 INTERFACE void Hal_SC_Set_extra_fetch_line(void *pInstance, MS_U8 u8val); 394 INTERFACE void Hal_SC_Set_extra_adv_line(void *pInstance, MS_U8 u8val); 395 INTERFACE void Hal_SC_SetOPWriteOff(void *pInstance, MS_BOOL bEna); 396 INTERFACE MS_BOOL Hal_SC_GetOPWriteOff(void *pInstance); 397 INTERFACE MS_BOOL Hal_SC_get_pixel_rgb(void *pInstance, XC_Get_Pixel_RGB *pData); 398 399 // FPLL 400 void HAL_SC_Set_FPLL_Limit(void *pInstance, MS_U32 *u32PllSet, MS_U32 u32LowBound, MS_U32 u32UpBound, MS_BOOL _bInFPLLDbgMode, MS_U32 _U32LimitD5D6D7); 401 402 //Add for U4 403 INTERFACE void Hal_SC_Set_OSD2VE(void *pInstance, EN_VOP_SEL_OSD_XC2VE_MUX eVOPSelOSD_MUX); 404 //Add for T4/Janus 405 INTERFACE MS_BOOL Hal_SC_IsOPMFetchPatch_Enable(void); 406 INTERFACE MS_BOOL Hal_SC_Check_HNonLinearScaling(void *pInstance); 407 408 //Add for T8 H3D reg handle 409 INTERFACE void Hal_XC_H3D_Enable(void *pInstance, MS_BOOL bEn); 410 INTERFACE void Hal_XC_H3D_Input3DType(void *pInstance, E_XC_3D_INPUT_MODE e3DType); 411 INTERFACE void Hal_XC_H3D_Breakline_Enable(void *pInstance, MS_BOOL bEn); 412 INTERFACE void Hal_XC_H3D_HDE(void *pInstance, MS_U16 u16Hde); 413 INTERFACE void Hal_XC_H3D_VDE_F0(MS_U16 u16Vde); 414 INTERFACE void Hal_XC_H3D_VDE_F2(MS_U16 u16Vde); 415 INTERFACE void Hal_XC_H3D_HBLANK(MS_U16 u16Hblank); 416 INTERFACE void Hal_XC_H3D_INIT_VBLANK(MS_U8 u8Vblank); 417 INTERFACE void Hal_XC_H3D_VBLANK0(MS_U8 u8Vblank); 418 INTERFACE void Hal_XC_H3D_VBLANK1(MS_U8 u8Vblank); 419 INTERFACE void Hal_XC_H3D_VBLANK2(MS_U8 u8Vblank); 420 INTERFACE void Hal_XC_H3D_VSYNC_WIDTH(MS_U8 u8Width); 421 INTERFACE void Hal_XC_H3D_VSYNC_POSITION(MS_U16 u16Position); 422 INTERFACE void Hal_XC_H3D_SELECT_REGEN_TIMING(MS_BOOL bEn); 423 INTERFACE void Hal_XC_H3D_LR_Toggle_Enable(void *pInstance, MS_BOOL bEn, MS_BOOL b2DTo3D, MS_BOOL bSkipDefaultLRFlag); 424 INTERFACE void HAL_XC_H3D_OPM_SBYS_PIP_Enable(void *pInstance, MS_BOOL bEn); 425 426 INTERFACE MS_BOOL Hal_SC_Detect_RequestFBL_Mode(void *pInstance); 427 INTERFACE MS_BOOL Hal_SC_Set_RequestFBL_Mode(void *pInstance, MS_BOOL bEn); 428 INTERFACE void Hal_XC_SetFrameColor(void *pInstance, MS_U32 u32aRGB); 429 INTERFACE MS_BOOL Hal_SC_is_extra_req_en(void *pInstance, MS_U16 *pu16MainHStart, MS_U16 *pu16MainHEnd, MS_U16 *pu16SubHStart, MS_U16 *pu16SubHEnd); 430 INTERFACE MS_U8 Hal_SC_getVSyncWidth(void *pInstance, SCALER_WIN eWindow); 431 INTERFACE void Hal_SC_enable_cursor_report(void *pInstance, MS_BOOL bEn); 432 433 //Add for K1, just a dummy function at this chip 434 INTERFACE E_APIXC_ReturnValue Hal_SC_Set_OSDLayer(void *pInstance, E_VOP_OSD_LAYER_SEL eVOPOSDLayer, SCALER_WIN eWindow); 435 INTERFACE E_VOP_OSD_LAYER_SEL Hal_SC_Get_OSDLayer(void *pInstance, SCALER_WIN eWindow); 436 INTERFACE E_APIXC_ReturnValue Hal_SC_Set_VideoAlpha(void *pInstance, MS_U8 u8Val, SCALER_WIN eWindow); 437 INTERFACE E_APIXC_ReturnValue Hal_SC_Get_VideoAlpha(void *pInstance, MS_U8 *pu8Val, SCALER_WIN eWindow); 438 INTERFACE E_APIXC_ReturnValue Hal_SC_SetOSDBlendingFormula(void *pInstance, E_XC_OSD_INDEX enOsdIndex, E_XC_OSD_BlENDING_TYPE enType, SCALER_WIN eWindow); 439 INTERFACE void Hal_XC_ClearScalingFactorForInternalCalib(void *pInstance ); 440 INTERFACE MS_BOOL Hal_SC_IsHW2Dto3DPatch_Enable(void); 441 442 INTERFACE MS_U8 MHal_SC_cal_usedgain_to_reggain(MS_U32 u16UsedGain_x32); 443 INTERFACE E_APIXC_ReturnValue Hal_SC_OP2VOPDESel(void *pInstance, E_OP2VOP_DE_SEL eVopDESel); 444 INTERFACE MS_BOOL Hal_XC_SVOutput_GetCaps(void *pInstance); 445 446 INTERFACE void _MHal_SC_Flock_Caculate_LPLLSet(MS_U32 u32Dclk); 447 INTERFACE void _MHal_SC_Set_LPLL_Limit(MS_U32 u32LpllLimitHigh, MS_U32 u32LpllLimitLow, MS_U8 u8Lpll_bank); 448 INTERFACE void _MHal_SC_Flock_Set_IGainPGain(void *pInstance, MS_U8 u8FRC_Out, MS_U16 u16OutputVfreqAfterFRC, MS_U16 Htt, MS_U16 Vtt); 449 INTERFACE void _MHal_SC_Flock_Set_LPLL_Enable(E_XC_FLOCK_TYPE eFlock_type); 450 451 INTERFACE void MHal_CLKGEN_FRC_Init(void *pInstance, MS_U8 u8LPLL_Mode); 452 INTERFACE void MHal_CLKGEN_FRC_Bypass_Enable(MS_BOOL bEnable); 453 454 #define Hal_XC_IsForcePrescaling_3D Hal_XC_IsForcePrescaling 455 INTERFACE E_APIXC_ReturnValue Hal_XC_IsForcePrescaling(void *pInstance, const XC_InternalStatus *pSrcInfo, MS_BOOL *pbForceV, MS_BOOL *pbForceH, SCALER_WIN eWindow); 456 INTERFACE MS_U32 MHal_SC_Get_LpllSet_Factor(void *pInstance, MS_U8 u8LPLL_Mode, MS_U8 u8LPLL_Type,MS_U32 u32DefaultDClk); 457 INTERFACE MS_U32 MHal_SC_Get_LpllSet_Div(void *pInstance, MS_U8 u8LPLL_Mode, MS_U8 u8LPLL_Type,MS_U32 u32DefaultDClk); 458 459 INTERFACE E_APIXC_ReturnValue Hal_SC_Enable_AVMute(void *pInstance, SCALER_WIN eWindow); 460 INTERFACE MS_BOOL Hal_XC_ReportPixelInfo(void *pInstance, MS_XC_REPORT_PIXELINFO *pstRepPixInfo); 461 462 INTERFACE void MHal_XC_Calc_IGainPGain(void *pInstance, MS_U8 *u8GainI, MS_U8 *u8GainP, MS_U32 u32XTAL_Clock, MS_U8 u8LGain, MS_U8 u8Vco, MS_U16 u16HTotal, MS_U16 u16VTotal, MS_U8 u8FRC_Out); 463 464 INTERFACE void Hal_SC_set_mrq_miusel(void *pInstance, MS_U8 u8MIUSel); 465 INTERFACE MS_PHY Hal_SC_get_mcdi_memoryaddressfromreg(void *pInstance, E_XC_MCDI_TYPE eType); 466 INTERFACE void Hal_SC_set_mcdi_memoryaddress(void *pInstance, MS_PHY u32FBAddress, E_XC_MCDI_TYPE eType); 467 INTERFACE void Hal_SC_set_mcdi_write_limit(void *pInstance, MS_BOOL bEn, MS_PHY u32LimitAddress, E_XC_MCDI_TYPE eType); 468 INTERFACE void Hal_SC_enable_mcdi(void *pInstance, MS_BOOL bEn, E_XC_MCDI_TYPE eType); 469 470 INTERFACE void Hal_SC_set_bws_mode(void *pInstance, MS_BOOL bEnable, SCALER_WIN eWindow); 471 INTERFACE void Hal_SC_sw_lcnt_en(void *pInstance, MS_BOOL bEnable, SCALER_WIN eWindow); 472 INTERFACE void Hal_SC_set_sw_lcnt(void *pInstance, MS_BOOL bEnable, SCALER_WIN eWindow); 473 INTERFACE void Hal_SC_set_ipmw_lcnt_inv(void *pInstance, MS_BOOL bEnable, SCALER_WIN eWindow); 474 INTERFACE void Hal_SC_set_ipmr_lcnt_inv(void *pInstance, MS_BOOL bEnable, SCALER_WIN eWindow); 475 INTERFACE void Hal_SC_set_opm_lcnt_inv(void *pInstance, MS_BOOL bEnable, SCALER_WIN eWindow); 476 477 INTERFACE void MHAL_SC_set_osdc_tgen_hsync_start(void *pInstance, MS_U16 u16Value); 478 INTERFACE void MHAL_SC_set_osdc_tgen_hsync_end(void *pInstance, MS_U16 u16Value); 479 INTERFACE void MHAL_SC_set_osdc_tgen_hframe_de_start(void *pInstance, MS_U16 u16Value); 480 INTERFACE void MHAL_SC_set_osdc_tgen_hframe_de_end(void *pInstance, MS_U16 u16Value); 481 INTERFACE void MHAL_SC_set_osdc_tgen_htotal(void *pInstance, MS_U16 u16Value); 482 INTERFACE void MHAL_SC_set_osdc_tgen_vtotal(void *pInstance, MS_U16 u16Value); 483 INTERFACE void MHAL_SC_set_osdc_tgen_vframe_de_start(void *pInstance, MS_U16 u16Value); 484 INTERFACE void MHAL_SC_set_osdc_tgen_vframe_de_end(void *pInstance, MS_U16 u16Value); 485 INTERFACE void MHAL_SC_set_osdc_tgen_vsync_start(void *pInstance, MS_U16 u16Value); 486 INTERFACE void MHAL_SC_set_osdc_tgen_vsync_end(void *pInstance, MS_U16 u16Value); 487 INTERFACE void MHAL_SC_set_osdc_tgen_reset_enable(void *pInstance, MS_BOOL bEnable); 488 INTERFACE void MHAL_SC_set_osdc_swreset_enable(void *pInstance, MS_BOOL bEnable); 489 INTERFACE void MHAL_SC_set_osdc_mixer_bypass_enable(void *pInstance, MS_BOOL bEnable); 490 INTERFACE void MHAL_SC_set_osdc_mixer_inv_alpha_enable(void *pInstance, MS_BOOL bEnable); 491 INTERFACE void MHAL_SC_set_osdc_mixer_hs_n_vfde_enable(void *pInstance, MS_BOOL bEnable); 492 INTERFACE void MHAL_SC_set_osdc_mixer_hfde_n_vfde_enable(void *pInstance, MS_BOOL bEnable); 493 INTERFACE void MHAL_SC_enable_osdc(void *pInstance, MS_BOOL bEnable); 494 INTERFACE void MHAL_SC_set_osdc_clk_mux(void *pInstance, MS_U8 u8Clk_Mux); 495 496 INTERFACE MS_U16 MHAL_SC_get_osdc_tgen_hsync_start(void *pInstance); 497 INTERFACE MS_U16 MHAL_SC_get_osdc_tgen_hsync_end(void *pInstance); 498 INTERFACE MS_U16 MHAL_SC_get_osdc_tgen_hframe_de_start(void *pInstance); 499 INTERFACE MS_U16 MHAL_SC_get_osdc_tgen_hframe_de_end(void *pInstance); 500 INTERFACE MS_U16 MHAL_SC_get_osdc_tgen_htotal(void *pInstance); 501 INTERFACE MS_U16 MHAL_SC_get_osdc_tgen_vtotal(void *pInstance); 502 INTERFACE MS_U16 MHAL_SC_get_osdc_tgen_vframe_de_start(void *pInstance); 503 INTERFACE MS_U16 MHAL_SC_get_osdc_tgen_vframe_de_end(void *pInstance); 504 INTERFACE MS_U16 MHAL_SC_get_osdc_tgen_vsync_start(void *pInstance); 505 INTERFACE MS_U16 MHAL_SC_get_osdc_tgen_vsync_end(void *pInstance); 506 INTERFACE MS_BOOL MHAL_SC_get_osdc_mixer_bypass_status(void *pInstance); 507 INTERFACE MS_BOOL MHAL_SC_get_osdc_mixer_inv_alpha_status(void *pInstance); 508 INTERFACE MS_BOOL MHAL_SC_get_osdc_mixer_hs_n_vfde_status(void *pInstance); 509 INTERFACE MS_BOOL MHAL_SC_get_osdc_mixer_hfde_n_vfde_status(void *pInstance); 510 INTERFACE MS_BOOL MHAL_SC_get_osdc_onoff_status(void *pInstance); 511 512 INTERFACE void MHal_XC_SetForceReadBank(void *pInstance, MS_BOOL bEnable, MS_U8 u8Bank, SCALER_WIN eWindow); 513 INTERFACE void MHal_XC_SetForceCurrentReadBank(void *pInstance,MS_BOOL bEnable, SCALER_WIN eWindow); 514 #define Hal_SC_SetPX2MemFormat(args...) 0 515 #define Hal_SC_IsPX2MemFormat(args...) 0 516 517 INTERFACE MS_BOOL MHal_XC_SetDNRBufAddress(void *pInstance, MS_PHY u32DNRBaseAddr, SCALER_WIN eWindow); 518 INTERFACE MS_PHY MHal_XC_GetDNRBufAddress(void *pInstance, SCALER_WIN eWindow); 519 INTERFACE MS_BOOL MHal_XC_SetDNRBufSize(void *pInstance, MS_PHY u32DNRBufSize, SCALER_WIN eWindow); 520 INTERFACE MS_PHY MHal_XC_GetDNRBufSize(void *pInstance, SCALER_WIN eWindow); 521 INTERFACE MS_BOOL MHal_XC_SetFRCMBufAddress(void *pInstance, MS_PHY u32BaseAddr, SCALER_WIN eWindow); 522 INTERFACE MS_PHY MHal_XC_GetFRCMBufAddress(void *pInstance, SCALER_WIN eWindow); 523 INTERFACE MS_BOOL MHal_XC_SetFRCMBufSize(void *pInstance, MS_PHY u32BufSize, SCALER_WIN eWindow); 524 INTERFACE MS_PHY MHal_XC_GetFRCMBufSize(void *pInstance, SCALER_WIN eWindow); 525 INTERFACE MS_BOOL MHal_XC_SetDualDNRBufAddress(void *pInstance, MS_PHY u32DNRBaseAddr, SCALER_WIN eWindow); 526 INTERFACE MS_PHY MHal_XC_GetDualDNRBufAddress(void *pInstance, SCALER_WIN eWindow); 527 INTERFACE MS_BOOL MHal_XC_SetDualDNRBufSize(void *pInstance, MS_PHY u32DNRBufSize, SCALER_WIN eWindow); 528 INTERFACE MS_PHY MHal_XC_GetDualDNRBufSize(void *pInstance, SCALER_WIN eWindow); 529 530 INTERFACE MS_BOOL MHal_XC_Init_Patch(void *pInstance, MS_BOOL bEnable, SCALER_WIN eWindow); 531 INTERFACE E_APIXC_ReturnValue Hal_SC_SetOSDDetect(void *pInstance, MS_BOOL bEnable, MS_U32 Threhold); 532 INTERFACE E_APIXC_ReturnValue Hal_SC_GetOSDDetect(void *pInstance, MS_BOOL *pbOSD); 533 534 #define MHal_XC_ByPass_SetOSDVsyncPos(args...) 535 #define MHal_XC_Bypass_SetinputSrc(args...) 536 #define MHal_XC_BYPASS_Setinputclk(args...) 537 #define MHal_XC_BYPASS_SetCSC(args...) 538 539 //Vtrack 540 INTERFACE E_APIXC_ReturnValue MHal_XC_Vtrack_SetPayloadData(void *pInstance, MS_U16 u16Timecode, MS_U8 u8OperatorID); 541 INTERFACE E_APIXC_ReturnValue MHal_XC_Vtrack_SetUserDefindedSetting(void *pInstance, MS_BOOL bUserDefinded, MS_U8 *pu8Setting); 542 INTERFACE E_APIXC_ReturnValue MHal_XC_Vtrack_Enable(void *pInstance, MS_U8 u8FrameRate, MS_BOOL bEnable); 543 //Bypass mode 544 #define MHal_XC_Check_Bypass(args...) 0 545 546 INTERFACE void HAL_SC_Set_LB_MergeAddress(void *pInstance); 547 INTERFACE MS_BOOL MHal_XC_IsPNLYUVOutput(void *pInstance); 548 INTERFACE void MHal_XC_DTVPatch(void *pInstance, SCALER_WIN eWindow); 549 550 #ifndef DONT_USE_CMA 551 #if (XC_SUPPORT_CMA ==TRUE) 552 INTERFACE void MHal_XC_CMAPatch(void *pInstance, SCALER_WIN eWindow); 553 INTERFACE void MHal_XC_CMAPatchClose(void *pInstance, SCALER_WIN eWindow); 554 INTERFACE MS_BOOL MHal_XC_Get_CMA_UsingCondition(void *pInstance, MS_BOOL bIsGetCMABuff[], MS_U32 au32CMAMemSCMSize[],MS_U32 au32CMAMemFRCMSize[], MS_U32* pu32DualMiuMemSize, MS_U32 u32DataSize, SCALER_WIN eWindow); 555 INTERFACE MS_BOOL MHal_XC_Release_CMA(void *pInstance, XC_CMA_CLIENT enCmaClient, SCALER_WIN eWindow); 556 INTERFACE MS_U64 MHal_XC_Get_CMA_Addr(void *pInstance, XC_CMA_CLIENT enCmaClient, MS_U32 u32GetCMASize, SCALER_WIN eWindow); 557 #endif 558 #endif 559 560 #define HAL_SC_Set_vsd_3D_autofactor_reset(args...) 561 562 INTERFACE void MHal_SC_set_manual_rbank_switch_cnt(void *pInstance, MS_BOOL bEnable, MS_U16 u16SwitchCnt, SCALER_WIN eWindow); 563 INTERFACE MS_BOOL Hal_SC_Init(void *pInstance); 564 INTERFACE MS_U32 Hal_SC_Get_Device_Offset(MS_U8 deviceIdx); 565 566 INTERFACE void Hal_SC_set_edclk(void *pInstance, MS_U8 u8Clk_Mux, MS_BOOL bEnable, SCALER_WIN eWindow); 567 INTERFACE void Hal_SC_set_ficlk2(void *pInstance, MS_U8 u8Clk_Mux, MS_BOOL bEnable, SCALER_WIN eWindow); 568 INTERFACE void Hal_SC_set_fmclk(void *pInstance, MS_BOOL bEnable); 569 INTERFACE void HAL_SC_EnableLegacyMode(void *pInstance, MS_BOOL bEnable); 570 INTERFACE void MHAL_SC_set_r2y_en(void *pInstance, MS_BOOL bEnable, SCALER_WIN eWindow); 571 INTERFACE MS_BOOL MHAL_SC_get_r2y_en_status(void *pInstance, SCALER_WIN eWindow); 572 INTERFACE void Hal_SC_set_T3D_setting(void *pInstance, MS_BOOL bEnable); 573 INTERFACE void Hal_SC_set_T3D_H_size(void *pInstance, MS_U16 u16Hsize); 574 INTERFACE MS_BOOL Hal_SC_3D_Is_LR_Sbs2Line(void *pInstance); 575 INTERFACE void Hal_SC_3D_SetLRChgMode(void *pInstance, HAL_SC_3D_LRCHGMODE eLRChgMode); 576 INTERFACE void Hal_SC_3D_SetInitialLRIndex(void *pInstance, MS_BOOL bRFirst); 577 INTERFACE void Hal_SC_3D_SetSplitHalf(void *pInstance, MS_BOOL bEnable); 578 INTERFACE void Hal_SC_3D_CopyDispWinToSTGEN(void *pInstance, SCALER_WIN eWindow); 579 580 INTERFACE void Hal_SC_set_frcm_to_FD_mask(void *pInstance, MS_BOOL bEnable, SCALER_WIN eWindow); 581 INTERFACE void Hal_SC_3D_set_top_win_6Tap(void *pInstance, MS_BOOL bEnable); 582 INTERFACE void Hal_SC_set_frcm_to_freeze(void *pInstance, MS_BOOL bEnable, SCALER_WIN eWindow); 583 INTERFACE void Hal_SC_3D_SetActiveVideoHeight(void *pInstance, MS_U16 u16VideoSize); 584 INTERFACE void Hal_SC_3D_SetActiveBlankSize0(void *pInstance, MS_U16 u16BlankSize); 585 INTERFACE void Hal_SC_3D_SetActiveBlankSize1(void *pInstance, MS_U16 u16BlankSize); 586 INTERFACE void Hal_SC_3D_SetActiveVideoWidth(void *pInstance, MS_U16 u16VideoSize); 587 INTERFACE void Hal_SC_3D_SetActiveVideoHeightAfterVSD(void *pInstance, MS_U16 u16VideoSize); 588 INTERFACE void Hal_SC_3D_SetFRCMActiveVideoHeightAfterVSD(void *pInstance, MS_U16 u16VideoSize); 589 INTERFACE void Hal_SC_3D_SetPixelSeparationWidth(void *pInstance, MS_U16 u16VideoSize); 590 INTERFACE void Hal_SC_3D_SetSoftware_F2VBottomEndPosition(void *pInstance, MS_U16 u16VideoSize); 591 INTERFACE void Hal_SC_3D_SetSoftware_F1VBottomStartPosition(void *pInstance, MS_U16 u16VideoSize); 592 INTERFACE void Hal_SC_3D_SetSoftware_F1VBottomEndPosition(void *pInstance, MS_U16 u16VideoSize); 593 INTERFACE void Hal_SC_SetHDMI_Spliter(void *pInstance,XC_IP_SYNC_STATUS *sXC_Sync_Status,E_MUX_INPUTPORT enInputPort ,SCALER_WIN eWindow); 594 INTERFACE void Hal_SC_Set_2pmode(void *pInstance,MS_BOOL benable_IP2p,MS_BOOL benable_OP2p,MS_BOOL benable_bypass_all_2p,SCALER_WIN eWindow); 595 INTERFACE MS_BOOL HAL_SC_set_bwr_config(void *pInstance, void *pstParam, SCALER_WIN eWindow); 596 INTERFACE MS_BOOL HAL_SC_set_bwr_config_burst(void *pInstance, void *pstParam, SCALER_WIN eWindow); 597 INTERFACE MS_BOOL Hal_SC_AdjustIpmWriteLimite(void *pInstance, MS_BOOL bIsLeft, MS_BOOL bNeedSwap, SCALER_WIN eWindow); 598 INTERFACE void Hal_SC_3D_enable_FALLRR_out(void *pInstance, MS_BOOL bEnable); 599 INTERFACE void Hal_SC_3D_Adjust_PreHVscaling_SaveBW(void *pInstance, XC_InternalStatus *pSrcInfo, MS_BOOL *pb3DPreHScaling,MS_BOOL *pb3DPreVScaling,MS_BOOL bForcePreHScalingDown,MS_BOOL bForcePreVScalingDown,SCALER_WIN eWindow); 600 INTERFACE void Hal_SC_3D_InvertMemsyncInterlaceMode(void *pInstance); 601 INTERFACE void Hal_SC_Set_T3D_MiuSelectExternal(void *pInstance, MS_U8 u8MIUSel); 602 INTERFACE MS_BOOL MHal_XC_GetPQPathStatus(void* pInstance, E_XC_PQ_Path_Type ePqPathType, MS_U16 u16Width, MS_U16 u16Height); 603 INTERFACE void Hal_SC_3D_Enable_FRC_LR_Flag(void *pInstance, MS_BOOL bEnable); 604 605 #if FRC_INSIDE 606 INTERFACE void MHal_XC_FRCR2_IP_Patch(void *pInstance, SCALER_WIN eWindow); 607 INTERFACE void MHal_XC_FRCR2_IP_PatchClose(void *pInstance, SCALER_WIN eWindow); 608 INTERFACE void MHal_XC_FRCR2_OP_Patch(void *pInstance, SCALER_WIN eWindow); 609 INTERFACE void MHal_XC_FRCR2_OP_PatchClose(void *pInstance, SCALER_WIN eWindow); 610 #endif 611 612 #ifdef ENABLE_SPREADMODE 613 #define MHal_XC_IsSupportSpreadMode(args...) TRUE 614 #endif 615 616 #ifdef UFO_XC_AUTO_DOWNLOAD 617 INTERFACE E_APIXC_ReturnValue MHal_XC_AutoDownload_Config(void* pInstance, EN_XC_AUTODOWNLOAD_CLIENT enClient, MS_PHY phyBaseAddr, EN_XC_AUTODOWNLOAD_MODE enMode); 618 INTERFACE E_APIXC_ReturnValue MHal_XC_AutoDownload_Write(void* pInstance, EN_XC_AUTODOWNLOAD_CLIENT enClient, MS_U8* pu8Data, MS_U32 u32Size, void* pParam); 619 INTERFACE E_APIXC_ReturnValue MHal_XC_AutoDownload_Fire(void* pInstance, EN_XC_AUTODOWNLOAD_CLIENT enClient); 620 INTERFACE E_APIXC_ReturnValue MHal_XC_GetAutoDownloadCaps(EN_XC_AUTODOWNLOAD_CLIENT enClient, MS_BOOL *pbSupported); 621 #endif 622 623 #ifdef UFO_XC_HDR 624 #if (UFO_XC_HDR_VERSION == 2) 625 INTERFACE E_APIXC_ReturnValue MHal_XC_HDR_Control(void* pInstance, EN_XC_HDR_CTRL_TYPE enCtrlType, void *pParam); 626 INTERFACE E_APIXC_ReturnValue MHal_XC_HDR_GetCaps(void *pInstance, XC_HDR_SUPPORTED_CAPS *pstHDRCaps); 627 #endif 628 #endif 629 630 #ifdef CONFIG_MSTAR_SRAMPD 631 INTERFACE E_APIXC_ReturnValue MHal_XC_SRAM_PowerDown_Control(void* pInstance, MS_BOOL bEnable); 632 INTERFACE MS_BOOL MHal_XC_Is_SRAM_PowerDown(void* pInstance); 633 INTERFACE void MHal_XC_Set_LD_SRAM_Power_Down(void* pInstance, MS_BOOL bIsSRAMPowerDown); 634 INTERFACE void MHal_XC_Set_ADC_SRAM_Power_Down(void* pInstance, MS_BOOL bIsSRAMPowerDown); 635 INTERFACE void Hal_SC_Sub_SRAM_PowerDown_Control(void *pInstance, MS_BOOL bPipEnable); 636 #endif 637 INTERFACE MS_BOOL Hal_SC_get_pre_align_pixel(void * pInstance, SCALER_WIN eWindow); 638 INTERFACE MS_BOOL MHal_XC_PixelShiftStatusChange(void* pInstance, XC_PIXEL_SHIFT_STATUS enStatus); 639 INTERFACE void MHal_XC_SetVopVttByBK68(void* pInstance, MS_U16 u16Vtt, MS_BOOL bMLoadEnable); 640 INTERFACE MS_BOOL Hal_SC_CheckMuteStatusByRegister(void *pInstance, SCALER_WIN eWindow); 641 INTERFACE void Hal_SC_add_reg_to_shm(void *pInstance,SCALER_WIN eWindow,MS_U32 u32_bk,MS_U16 u16_value,MS_U16 u16_mask); 642 INTERFACE void Hal_SC_add_dram_to_shm(void *pInstance,SCALER_WIN eWindow,MS_PHY u32address,MS_U32 u32length); 643 INTERFACE MS_BOOL Hal_SC_secure_lock(void *pInstance, SCALER_WIN eWindow, MS_U32 u32SecureDMA, MS_U32 u32OperationMode); 644 INTERFACE MS_BOOL Hal_SC_secure_Check_RBase(void *pInstance); 645 INTERFACE void Hal_SC_update_to_shm(void *pInstance, SCALER_WIN eWindow); 646 INTERFACE void Hal_SC_set_Dual_DNRBase0(void *pInstance, MS_PHY u32DNRBase0, SCALER_WIN eWindow); 647 INTERFACE void Hal_SC_set_Dual_OPMBase0(void *pInstance, MS_PHY u32OPMBase0, SCALER_WIN eWindow); 648 #if PIP_PATCH_USING_SC1_MAIN_AS_SC0_SUB 649 INTERFACE MS_BOOL Hal_SC_3D_IsDualViewMode(void *pInstance, SCALER_WIN eWindow); 650 INTERFACE void Hal_SC_3D_Set_DualView(void *pInstance, MS_BOOL bEnable); 651 INTERFACE void Hal_SC_set_dualview_clone(void *pInstance, MS_BOOL bEnable); 652 #endif 653 654 INTERFACE E_XC_FB_LEVEL MHal_XC_Get_FB_Level(void* pInstance, MS_WINDOW_TYPE* pstCropWin, MS_WINDOW_TYPE* pstDispWin, MS_BOOL bInterlace, MS_U16* pu16HSize, MS_U16* pu16VSize); 655 INTERFACE MS_U32 Hal_SC_get_HDMIpolicy(void *pInstance); 656 INTERFACE MS_U16 MHal_XC_GetDelayTime(void* pInstance,XC_DELAY_TIME_STATUS enStatus); 657 658 #undef INTERFACE 659 #endif /* MHAL_SC_H */ 660 661