1 //<MStar Software> 2 //****************************************************************************** 3 // MStar Software 4 // Copyright (c) 2010 - 2012 MStar Semiconductor, Inc. All rights reserved. 5 // All software, firmware and related documentation herein ("MStar Software") are 6 // intellectual property of MStar Semiconductor, Inc. ("MStar") and protected by 7 // law, including, but not limited to, copyright law and international treaties. 8 // Any use, modification, reproduction, retransmission, or republication of all 9 // or part of MStar Software is expressly prohibited, unless prior written 10 // permission has been granted by MStar. 11 // 12 // By accessing, browsing and/or using MStar Software, you acknowledge that you 13 // have read, understood, and agree, to be bound by below terms ("Terms") and to 14 // comply with all applicable laws and regulations: 15 // 16 // 1. MStar shall retain any and all right, ownership and interest to MStar 17 // Software and any modification/derivatives thereof. 18 // No right, ownership, or interest to MStar Software and any 19 // modification/derivatives thereof is transferred to you under Terms. 20 // 21 // 2. You understand that MStar Software might include, incorporate or be 22 // supplied together with third party`s software and the use of MStar 23 // Software may require additional licenses from third parties. 24 // Therefore, you hereby agree it is your sole responsibility to separately 25 // obtain any and all third party right and license necessary for your use of 26 // such third party`s software. 27 // 28 // 3. MStar Software and any modification/derivatives thereof shall be deemed as 29 // MStar`s confidential information and you agree to keep MStar`s 30 // confidential information in strictest confidence and not disclose to any 31 // third party. 32 // 33 // 4. MStar Software is provided on an "AS IS" basis without warranties of any 34 // kind. Any warranties are hereby expressly disclaimed by MStar, including 35 // without limitation, any warranties of merchantability, non-infringement of 36 // intellectual property rights, fitness for a particular purpose, error free 37 // and in conformity with any international standard. You agree to waive any 38 // claim against MStar for any loss, damage, cost or expense that you may 39 // incur related to your use of MStar Software. 40 // In no event shall MStar be liable for any direct, indirect, incidental or 41 // consequential damages, including without limitation, lost of profit or 42 // revenues, lost or damage of data, and unauthorized system use. 43 // You agree that this Section 4 shall still apply without being affected 44 // even if MStar Software has been modified by MStar in accordance with your 45 // request or instruction for your use, except otherwise agreed by both 46 // parties in writing. 47 // 48 // 5. If requested, MStar may from time to time provide technical supports or 49 // services in relation with MStar Software to you for your use of 50 // MStar Software in conjunction with your or your customer`s product 51 // ("Services"). 52 // You understand and agree that, except otherwise agreed by both parties in 53 // writing, Services are provided on an "AS IS" basis and the warranty 54 // disclaimer set forth in Section 4 above shall apply. 55 // 56 // 6. Nothing contained herein shall be construed as by implication, estoppels 57 // or otherwise: 58 // (a) conferring any license or right to use MStar name, trademark, service 59 // mark, symbol or any other identification; 60 // (b) obligating MStar or any of its affiliates to furnish any person, 61 // including without limitation, you and your customers, any assistance 62 // of any kind whatsoever, or any information; or 63 // (c) conferring any license or right under any intellectual property right. 64 // 65 // 7. These terms shall be governed by and construed in accordance with the laws 66 // of Taiwan, R.O.C., excluding its conflict of law rules. 67 // Any and all dispute arising out hereof or related hereto shall be finally 68 // settled by arbitration referred to the Chinese Arbitration Association, 69 // Taipei in accordance with the ROC Arbitration Law and the Arbitration 70 // Rules of the Association by three (3) arbitrators appointed in accordance 71 // with the said Rules. 72 // The place of arbitration shall be in Taipei, Taiwan and the language shall 73 // be English. 74 // The arbitration award shall be final and binding to both parties. 75 // 76 //****************************************************************************** 77 //<MStar Software> 78 //////////////////////////////////////////////////////////////////////////////// 79 // 80 // Copyright (c) 2008-2009 MStar Semiconductor, Inc. 81 // All rights reserved. 82 // 83 // Unless otherwise stipulated in writing, any and all information contained 84 // herein regardless in any format shall remain the sole proprietary of 85 // MStar Semiconductor Inc. and be kept in strict confidence 86 // ("MStar Confidential Information") by the recipient. 87 // Any unauthorized act including without limitation unauthorized disclosure, 88 // copying, use, reproduction, sale, distribution, modification, disassembling, 89 // reverse engineering and compiling of the contents of MStar Confidential 90 // Information is unlawful and strictly prohibited. MStar hereby reserves the 91 // rights to any and all damages, losses, costs and expenses resulting therefrom. 92 // 93 //////////////////////////////////////////////////////////////////////////////// 94 //alex_tung 95 #ifndef _HWREG_DVI_ATOP_H_ 96 #define _HWREG_DVI_ATOP_H_ 97 98 //============================================================= 99 //DVI ATOP 100 //#define REG_DVI_ATOP_BASE 0x0900 101 102 #define REG_DVI_ATOP_00_L (REG_DVI_ATOP_BASE + 0x00) 103 #define REG_DVI_ATOP_00_H (REG_DVI_ATOP_BASE + 0x01) 104 #define REG_DVI_ATOP_01_L (REG_DVI_ATOP_BASE + 0x02) 105 #define REG_DVI_ATOP_01_H (REG_DVI_ATOP_BASE + 0x03) 106 #define REG_DVI_ATOP_02_L (REG_DVI_ATOP_BASE + 0x04) 107 #define REG_DVI_ATOP_02_H (REG_DVI_ATOP_BASE + 0x05) 108 #define REG_DVI_ATOP_03_L (REG_DVI_ATOP_BASE + 0x06) 109 #define REG_DVI_ATOP_03_H (REG_DVI_ATOP_BASE + 0x07) 110 #define REG_DVI_ATOP_04_L (REG_DVI_ATOP_BASE + 0x08) 111 #define REG_DVI_ATOP_04_H (REG_DVI_ATOP_BASE + 0x09) 112 #define REG_DVI_ATOP_05_L (REG_DVI_ATOP_BASE + 0x0A) 113 #define REG_DVI_ATOP_05_H (REG_DVI_ATOP_BASE + 0x0B) 114 #define REG_DVI_ATOP_06_L (REG_DVI_ATOP_BASE + 0x0C) 115 #define REG_DVI_ATOP_06_H (REG_DVI_ATOP_BASE + 0x0D) 116 #define REG_DVI_ATOP_07_L (REG_DVI_ATOP_BASE + 0x0E) 117 #define REG_DVI_ATOP_07_H (REG_DVI_ATOP_BASE + 0x0F) 118 #define REG_DVI_ATOP_08_L (REG_DVI_ATOP_BASE + 0x10) 119 #define REG_DVI_ATOP_08_H (REG_DVI_ATOP_BASE + 0x11) 120 #define REG_DVI_ATOP_09_L (REG_DVI_ATOP_BASE + 0x12) 121 #define REG_DVI_ATOP_09_H (REG_DVI_ATOP_BASE + 0x13) 122 #define REG_DVI_ATOP_0A_L (REG_DVI_ATOP_BASE + 0x14) 123 #define REG_DVI_ATOP_0A_H (REG_DVI_ATOP_BASE + 0x15) 124 #define REG_DVI_ATOP_0B_L (REG_DVI_ATOP_BASE + 0x16) 125 #define REG_DVI_ATOP_0B_H (REG_DVI_ATOP_BASE + 0x17) 126 #define REG_DVI_ATOP_0C_L (REG_DVI_ATOP_BASE + 0x18) 127 #define REG_DVI_ATOP_0C_H (REG_DVI_ATOP_BASE + 0x19) 128 #define REG_DVI_ATOP_0D_L (REG_DVI_ATOP_BASE + 0x1A) 129 #define REG_DVI_ATOP_0D_H (REG_DVI_ATOP_BASE + 0x1B) 130 #define REG_DVI_ATOP_0E_L (REG_DVI_ATOP_BASE + 0x1C) 131 #define REG_DVI_ATOP_0E_H (REG_DVI_ATOP_BASE + 0x1D) 132 #define REG_DVI_ATOP_0F_L (REG_DVI_ATOP_BASE + 0x1E) 133 #define REG_DVI_ATOP_0F_H (REG_DVI_ATOP_BASE + 0x1F) 134 #define REG_DVI_ATOP_10_L (REG_DVI_ATOP_BASE + 0x20) 135 #define REG_DVI_ATOP_10_H (REG_DVI_ATOP_BASE + 0x21) 136 #define REG_DVI_ATOP_11_L (REG_DVI_ATOP_BASE + 0x22) 137 #define REG_DVI_ATOP_11_H (REG_DVI_ATOP_BASE + 0x23) 138 #define REG_DVI_ATOP_12_L (REG_DVI_ATOP_BASE + 0x24) 139 #define REG_DVI_ATOP_12_H (REG_DVI_ATOP_BASE + 0x25) 140 #define REG_DVI_ATOP_13_L (REG_DVI_ATOP_BASE + 0x26) 141 #define REG_DVI_ATOP_13_H (REG_DVI_ATOP_BASE + 0x27) 142 #define REG_DVI_ATOP_14_L (REG_DVI_ATOP_BASE + 0x28) 143 #define REG_DVI_ATOP_14_H (REG_DVI_ATOP_BASE + 0x29) 144 #define REG_DVI_ATOP_15_L (REG_DVI_ATOP_BASE + 0x2A) 145 #define REG_DVI_ATOP_15_H (REG_DVI_ATOP_BASE + 0x2B) 146 #define REG_DVI_ATOP_16_L (REG_DVI_ATOP_BASE + 0x2C) 147 #define REG_DVI_ATOP_16_H (REG_DVI_ATOP_BASE + 0x2D) 148 #define REG_DVI_ATOP_17_L (REG_DVI_ATOP_BASE + 0x2E) 149 #define REG_DVI_ATOP_17_H (REG_DVI_ATOP_BASE + 0x2F) 150 #define REG_DVI_ATOP_18_L (REG_DVI_ATOP_BASE + 0x30) 151 #define REG_DVI_ATOP_18_H (REG_DVI_ATOP_BASE + 0x31) 152 #define REG_DVI_ATOP_19_L (REG_DVI_ATOP_BASE + 0x32) 153 #define REG_DVI_ATOP_19_H (REG_DVI_ATOP_BASE + 0x33) 154 #define REG_DVI_ATOP_1A_L (REG_DVI_ATOP_BASE + 0x34) 155 #define REG_DVI_ATOP_1A_H (REG_DVI_ATOP_BASE + 0x35) 156 #define REG_DVI_ATOP_1B_L (REG_DVI_ATOP_BASE + 0x36) 157 #define REG_DVI_ATOP_1B_H (REG_DVI_ATOP_BASE + 0x37) 158 #define REG_DVI_ATOP_1C_L (REG_DVI_ATOP_BASE + 0x38) 159 #define REG_DVI_ATOP_1C_H (REG_DVI_ATOP_BASE + 0x39) 160 #define REG_DVI_ATOP_1D_L (REG_DVI_ATOP_BASE + 0x3A) 161 #define REG_DVI_ATOP_1D_H (REG_DVI_ATOP_BASE + 0x3B) 162 #define REG_DVI_ATOP_1E_L (REG_DVI_ATOP_BASE + 0x3C) 163 #define REG_DVI_ATOP_1E_H (REG_DVI_ATOP_BASE + 0x3D) 164 #define REG_DVI_ATOP_1F_L (REG_DVI_ATOP_BASE + 0x3E) 165 #define REG_DVI_ATOP_1F_H (REG_DVI_ATOP_BASE + 0x3F) 166 #define REG_DVI_ATOP_20_L (REG_DVI_ATOP_BASE + 0x40) 167 #define REG_DVI_ATOP_20_H (REG_DVI_ATOP_BASE + 0x41) 168 #define REG_DVI_ATOP_21_L (REG_DVI_ATOP_BASE + 0x42) 169 #define REG_DVI_ATOP_21_H (REG_DVI_ATOP_BASE + 0x43) 170 #define REG_DVI_ATOP_22_L (REG_DVI_ATOP_BASE + 0x44) 171 #define REG_DVI_ATOP_22_H (REG_DVI_ATOP_BASE + 0x45) 172 #define REG_DVI_ATOP_23_L (REG_DVI_ATOP_BASE + 0x46) 173 #define REG_DVI_ATOP_23_H (REG_DVI_ATOP_BASE + 0x47) 174 #define REG_DVI_ATOP_24_L (REG_DVI_ATOP_BASE + 0x48) 175 #define REG_DVI_ATOP_24_H (REG_DVI_ATOP_BASE + 0x49) 176 #define REG_DVI_ATOP_25_L (REG_DVI_ATOP_BASE + 0x4A) 177 #define REG_DVI_ATOP_25_H (REG_DVI_ATOP_BASE + 0x4B) 178 #define REG_DVI_ATOP_26_L (REG_DVI_ATOP_BASE + 0x4C) 179 #define REG_DVI_ATOP_26_H (REG_DVI_ATOP_BASE + 0x4D) 180 #define REG_DVI_ATOP_27_L (REG_DVI_ATOP_BASE + 0x4E) 181 #define REG_DVI_ATOP_27_H (REG_DVI_ATOP_BASE + 0x4F) 182 #define REG_DVI_ATOP_28_L (REG_DVI_ATOP_BASE + 0x50) 183 #define REG_DVI_ATOP_28_H (REG_DVI_ATOP_BASE + 0x51) 184 #define REG_DVI_ATOP_29_L (REG_DVI_ATOP_BASE + 0x52) 185 #define REG_DVI_ATOP_29_H (REG_DVI_ATOP_BASE + 0x53) 186 #define REG_DVI_ATOP_2A_L (REG_DVI_ATOP_BASE + 0x54) 187 #define REG_DVI_ATOP_2A_H (REG_DVI_ATOP_BASE + 0x55) 188 #define REG_DVI_ATOP_2B_L (REG_DVI_ATOP_BASE + 0x56) 189 #define REG_DVI_ATOP_2B_H (REG_DVI_ATOP_BASE + 0x57) 190 #define REG_DVI_ATOP_2C_L (REG_DVI_ATOP_BASE + 0x58) 191 #define REG_DVI_ATOP_2C_H (REG_DVI_ATOP_BASE + 0x59) 192 #define REG_DVI_ATOP_2D_L (REG_DVI_ATOP_BASE + 0x5A) 193 #define REG_DVI_ATOP_2D_H (REG_DVI_ATOP_BASE + 0x5B) 194 #define REG_DVI_ATOP_2E_L (REG_DVI_ATOP_BASE + 0x5C) 195 #define REG_DVI_ATOP_2E_H (REG_DVI_ATOP_BASE + 0x5D) 196 #define REG_DVI_ATOP_2F_L (REG_DVI_ATOP_BASE + 0x5E) 197 #define REG_DVI_ATOP_2F_H (REG_DVI_ATOP_BASE + 0x5F) 198 #define REG_DVI_ATOP_30_L (REG_DVI_ATOP_BASE + 0x60) 199 #define REG_DVI_ATOP_30_H (REG_DVI_ATOP_BASE + 0x61) 200 #define REG_DVI_ATOP_31_L (REG_DVI_ATOP_BASE + 0x62) 201 #define REG_DVI_ATOP_31_H (REG_DVI_ATOP_BASE + 0x63) 202 #define REG_DVI_ATOP_32_L (REG_DVI_ATOP_BASE + 0x64) 203 #define REG_DVI_ATOP_32_H (REG_DVI_ATOP_BASE + 0x65) 204 #define REG_DVI_ATOP_33_L (REG_DVI_ATOP_BASE + 0x66) 205 #define REG_DVI_ATOP_33_H (REG_DVI_ATOP_BASE + 0x67) 206 #define REG_DVI_ATOP_34_L (REG_DVI_ATOP_BASE + 0x68) 207 #define REG_DVI_ATOP_34_H (REG_DVI_ATOP_BASE + 0x69) 208 #define REG_DVI_ATOP_35_L (REG_DVI_ATOP_BASE + 0x6A) 209 #define REG_DVI_ATOP_35_H (REG_DVI_ATOP_BASE + 0x6B) 210 #define REG_DVI_ATOP_36_L (REG_DVI_ATOP_BASE + 0x6C) 211 #define REG_DVI_ATOP_36_H (REG_DVI_ATOP_BASE + 0x6D) 212 #define REG_DVI_ATOP_37_L (REG_DVI_ATOP_BASE + 0x6E) 213 #define REG_DVI_ATOP_37_H (REG_DVI_ATOP_BASE + 0x6F) 214 #define REG_DVI_ATOP_38_L (REG_DVI_ATOP_BASE + 0x70) 215 #define REG_DVI_ATOP_38_H (REG_DVI_ATOP_BASE + 0x71) 216 #define REG_DVI_ATOP_39_L (REG_DVI_ATOP_BASE + 0x72) 217 #define REG_DVI_ATOP_39_H (REG_DVI_ATOP_BASE + 0x73) 218 #define REG_DVI_ATOP_3A_L (REG_DVI_ATOP_BASE + 0x74) 219 #define REG_DVI_ATOP_3A_H (REG_DVI_ATOP_BASE + 0x75) 220 #define REG_DVI_ATOP_3B_L (REG_DVI_ATOP_BASE + 0x76) 221 #define REG_DVI_ATOP_3B_H (REG_DVI_ATOP_BASE + 0x77) 222 #define REG_DVI_ATOP_3C_L (REG_DVI_ATOP_BASE + 0x78) 223 #define REG_DVI_ATOP_3C_H (REG_DVI_ATOP_BASE + 0x79) 224 #define REG_DVI_ATOP_3D_L (REG_DVI_ATOP_BASE + 0x7A) 225 #define REG_DVI_ATOP_3D_H (REG_DVI_ATOP_BASE + 0x7B) 226 #define REG_DVI_ATOP_3E_L (REG_DVI_ATOP_BASE + 0x7C) 227 #define REG_DVI_ATOP_3E_H (REG_DVI_ATOP_BASE + 0x7D) 228 #define REG_DVI_ATOP_3F_L (REG_DVI_ATOP_BASE + 0x7E) 229 #define REG_DVI_ATOP_3F_H (REG_DVI_ATOP_BASE + 0x7F) 230 #define REG_DVI_ATOP_40_L (REG_DVI_ATOP_BASE + 0x80) 231 #define REG_DVI_ATOP_40_H (REG_DVI_ATOP_BASE + 0x81) 232 #define REG_DVI_ATOP_41_L (REG_DVI_ATOP_BASE + 0x82) 233 #define REG_DVI_ATOP_41_H (REG_DVI_ATOP_BASE + 0x83) 234 #define REG_DVI_ATOP_42_L (REG_DVI_ATOP_BASE + 0x84) 235 #define REG_DVI_ATOP_42_H (REG_DVI_ATOP_BASE + 0x85) 236 #define REG_DVI_ATOP_43_L (REG_DVI_ATOP_BASE + 0x86) 237 #define REG_DVI_ATOP_43_H (REG_DVI_ATOP_BASE + 0x87) 238 #define REG_DVI_ATOP_44_L (REG_DVI_ATOP_BASE + 0x88) 239 #define REG_DVI_ATOP_44_H (REG_DVI_ATOP_BASE + 0x89) 240 #define REG_DVI_ATOP_45_L (REG_DVI_ATOP_BASE + 0x8A) 241 #define REG_DVI_ATOP_45_H (REG_DVI_ATOP_BASE + 0x8B) 242 #define REG_DVI_ATOP_46_L (REG_DVI_ATOP_BASE + 0x8C) 243 #define REG_DVI_ATOP_46_H (REG_DVI_ATOP_BASE + 0x8D) 244 #define REG_DVI_ATOP_47_L (REG_DVI_ATOP_BASE + 0x8E) 245 #define REG_DVI_ATOP_47_H (REG_DVI_ATOP_BASE + 0x8F) 246 #define REG_DVI_ATOP_48_L (REG_DVI_ATOP_BASE + 0x90) 247 #define REG_DVI_ATOP_48_H (REG_DVI_ATOP_BASE + 0x91) 248 #define REG_DVI_ATOP_49_L (REG_DVI_ATOP_BASE + 0x92) 249 #define REG_DVI_ATOP_49_H (REG_DVI_ATOP_BASE + 0x93) 250 #define REG_DVI_ATOP_4A_L (REG_DVI_ATOP_BASE + 0x94) 251 #define REG_DVI_ATOP_4A_H (REG_DVI_ATOP_BASE + 0x95) 252 #define REG_DVI_ATOP_4B_L (REG_DVI_ATOP_BASE + 0x96) 253 #define REG_DVI_ATOP_4B_H (REG_DVI_ATOP_BASE + 0x97) 254 #define REG_DVI_ATOP_4C_L (REG_DVI_ATOP_BASE + 0x98) 255 #define REG_DVI_ATOP_4C_H (REG_DVI_ATOP_BASE + 0x99) 256 #define REG_DVI_ATOP_4D_L (REG_DVI_ATOP_BASE + 0x9A) 257 #define REG_DVI_ATOP_4D_H (REG_DVI_ATOP_BASE + 0x9B) 258 #define REG_DVI_ATOP_4E_L (REG_DVI_ATOP_BASE + 0x9C) 259 #define REG_DVI_ATOP_4E_H (REG_DVI_ATOP_BASE + 0x9D) 260 #define REG_DVI_ATOP_4F_L (REG_DVI_ATOP_BASE + 0x9E) 261 #define REG_DVI_ATOP_4F_H (REG_DVI_ATOP_BASE + 0x9F) 262 #define REG_DVI_ATOP_50_L (REG_DVI_ATOP_BASE + 0xA0) 263 #define REG_DVI_ATOP_50_H (REG_DVI_ATOP_BASE + 0xA1) 264 #define REG_DVI_ATOP_51_L (REG_DVI_ATOP_BASE + 0xA2) 265 #define REG_DVI_ATOP_51_H (REG_DVI_ATOP_BASE + 0xA3) 266 #define REG_DVI_ATOP_52_L (REG_DVI_ATOP_BASE + 0xA4) 267 #define REG_DVI_ATOP_52_H (REG_DVI_ATOP_BASE + 0xA5) 268 #define REG_DVI_ATOP_53_L (REG_DVI_ATOP_BASE + 0xA6) 269 #define REG_DVI_ATOP_53_H (REG_DVI_ATOP_BASE + 0xA7) 270 #define REG_DVI_ATOP_54_L (REG_DVI_ATOP_BASE + 0xA8) 271 #define REG_DVI_ATOP_54_H (REG_DVI_ATOP_BASE + 0xA9) 272 #define REG_DVI_ATOP_55_L (REG_DVI_ATOP_BASE + 0xAA) 273 #define REG_DVI_ATOP_55_H (REG_DVI_ATOP_BASE + 0xAB) 274 #define REG_DVI_ATOP_56_L (REG_DVI_ATOP_BASE + 0xAC) 275 #define REG_DVI_ATOP_56_H (REG_DVI_ATOP_BASE + 0xAD) 276 #define REG_DVI_ATOP_57_L (REG_DVI_ATOP_BASE + 0xAE) 277 #define REG_DVI_ATOP_57_H (REG_DVI_ATOP_BASE + 0xAF) 278 #define REG_DVI_ATOP_58_L (REG_DVI_ATOP_BASE + 0xB0) 279 #define REG_DVI_ATOP_58_H (REG_DVI_ATOP_BASE + 0xB1) 280 #define REG_DVI_ATOP_59_L (REG_DVI_ATOP_BASE + 0xB2) 281 #define REG_DVI_ATOP_59_H (REG_DVI_ATOP_BASE + 0xB3) 282 #define REG_DVI_ATOP_5A_L (REG_DVI_ATOP_BASE + 0xB4) 283 #define REG_DVI_ATOP_5A_H (REG_DVI_ATOP_BASE + 0xB5) 284 #define REG_DVI_ATOP_5B_L (REG_DVI_ATOP_BASE + 0xB6) 285 #define REG_DVI_ATOP_5B_H (REG_DVI_ATOP_BASE + 0xB7) 286 #define REG_DVI_ATOP_5C_L (REG_DVI_ATOP_BASE + 0xB8) 287 #define REG_DVI_ATOP_5C_H (REG_DVI_ATOP_BASE + 0xB9) 288 #define REG_DVI_ATOP_5D_L (REG_DVI_ATOP_BASE + 0xBA) 289 #define REG_DVI_ATOP_5D_H (REG_DVI_ATOP_BASE + 0xBB) 290 #define REG_DVI_ATOP_5E_L (REG_DVI_ATOP_BASE + 0xBC) 291 #define REG_DVI_ATOP_5E_H (REG_DVI_ATOP_BASE + 0xBD) 292 #define REG_DVI_ATOP_5F_L (REG_DVI_ATOP_BASE + 0xBE) 293 #define REG_DVI_ATOP_5F_H (REG_DVI_ATOP_BASE + 0xBF) 294 #define REG_DVI_ATOP_60_L (REG_DVI_ATOP_BASE + 0xC0) 295 #define REG_DVI_ATOP_60_H (REG_DVI_ATOP_BASE + 0xC1) 296 #define REG_DVI_ATOP_61_L (REG_DVI_ATOP_BASE + 0xC2) 297 #define REG_DVI_ATOP_61_H (REG_DVI_ATOP_BASE + 0xC3) 298 #define REG_DVI_ATOP_62_L (REG_DVI_ATOP_BASE + 0xC4) 299 #define REG_DVI_ATOP_62_H (REG_DVI_ATOP_BASE + 0xC5) 300 #define REG_DVI_ATOP_63_L (REG_DVI_ATOP_BASE + 0xC6) 301 #define REG_DVI_ATOP_63_H (REG_DVI_ATOP_BASE + 0xC7) 302 #define REG_DVI_ATOP_64_L (REG_DVI_ATOP_BASE + 0xC8) 303 #define REG_DVI_ATOP_64_H (REG_DVI_ATOP_BASE + 0xC9) 304 #define REG_DVI_ATOP_65_L (REG_DVI_ATOP_BASE + 0xCA) 305 #define REG_DVI_ATOP_65_H (REG_DVI_ATOP_BASE + 0xCB) 306 #define REG_DVI_ATOP_66_L (REG_DVI_ATOP_BASE + 0xCC) 307 #define REG_DVI_ATOP_66_H (REG_DVI_ATOP_BASE + 0xCD) 308 #define REG_DVI_ATOP_67_L (REG_DVI_ATOP_BASE + 0xCE) 309 #define REG_DVI_ATOP_67_H (REG_DVI_ATOP_BASE + 0xCF) 310 #define REG_DVI_ATOP_68_L (REG_DVI_ATOP_BASE + 0xD0) 311 #define REG_DVI_ATOP_68_H (REG_DVI_ATOP_BASE + 0xD1) 312 #define REG_DVI_ATOP_69_L (REG_DVI_ATOP_BASE + 0xD2) 313 #define REG_DVI_ATOP_69_H (REG_DVI_ATOP_BASE + 0xD3) 314 #define REG_DVI_ATOP_6A_L (REG_DVI_ATOP_BASE + 0xD4) 315 #define REG_DVI_ATOP_6A_H (REG_DVI_ATOP_BASE + 0xD5) 316 #define REG_DVI_ATOP_6B_L (REG_DVI_ATOP_BASE + 0xD6) 317 #define REG_DVI_ATOP_6B_H (REG_DVI_ATOP_BASE + 0xD7) 318 #define REG_DVI_ATOP_6C_L (REG_DVI_ATOP_BASE + 0xD8) 319 #define REG_DVI_ATOP_6C_H (REG_DVI_ATOP_BASE + 0xD9) 320 #define REG_DVI_ATOP_6D_L (REG_DVI_ATOP_BASE + 0xDA) 321 #define REG_DVI_ATOP_6D_H (REG_DVI_ATOP_BASE + 0xDB) 322 #define REG_DVI_ATOP_6E_L (REG_DVI_ATOP_BASE + 0xDC) 323 #define REG_DVI_ATOP_6E_H (REG_DVI_ATOP_BASE + 0xDD) 324 #define REG_DVI_ATOP_6F_L (REG_DVI_ATOP_BASE + 0xDE) 325 #define REG_DVI_ATOP_6F_H (REG_DVI_ATOP_BASE + 0xDF) 326 #define REG_DVI_ATOP_70_L (REG_DVI_ATOP_BASE + 0xE0) 327 #define REG_DVI_ATOP_70_H (REG_DVI_ATOP_BASE + 0xE1) 328 #define REG_DVI_ATOP_71_L (REG_DVI_ATOP_BASE + 0xE2) 329 #define REG_DVI_ATOP_71_H (REG_DVI_ATOP_BASE + 0xE3) 330 #define REG_DVI_ATOP_72_L (REG_DVI_ATOP_BASE + 0xE4) 331 #define REG_DVI_ATOP_72_H (REG_DVI_ATOP_BASE + 0xE5) 332 #define REG_DVI_ATOP_73_L (REG_DVI_ATOP_BASE + 0xE6) 333 #define REG_DVI_ATOP_73_H (REG_DVI_ATOP_BASE + 0xE7) 334 #define REG_DVI_ATOP_74_L (REG_DVI_ATOP_BASE + 0xE8) 335 #define REG_DVI_ATOP_74_H (REG_DVI_ATOP_BASE + 0xE9) 336 #define REG_DVI_ATOP_75_L (REG_DVI_ATOP_BASE + 0xEA) 337 #define REG_DVI_ATOP_75_H (REG_DVI_ATOP_BASE + 0xEB) 338 #define REG_DVI_ATOP_76_L (REG_DVI_ATOP_BASE + 0xEC) 339 #define REG_DVI_ATOP_76_H (REG_DVI_ATOP_BASE + 0xED) 340 #define REG_DVI_ATOP_77_L (REG_DVI_ATOP_BASE + 0xEE) 341 #define REG_DVI_ATOP_77_H (REG_DVI_ATOP_BASE + 0xEF) 342 #define REG_DVI_ATOP_78_L (REG_DVI_ATOP_BASE + 0xF0) 343 #define REG_DVI_ATOP_78_H (REG_DVI_ATOP_BASE + 0xF1) 344 #define REG_DVI_ATOP_79_L (REG_DVI_ATOP_BASE + 0xF2) 345 #define REG_DVI_ATOP_79_H (REG_DVI_ATOP_BASE + 0xF3) 346 #define REG_DVI_ATOP_7A_L (REG_DVI_ATOP_BASE + 0xF4) 347 #define REG_DVI_ATOP_7A_H (REG_DVI_ATOP_BASE + 0xF5) 348 #define REG_DVI_ATOP_7B_L (REG_DVI_ATOP_BASE + 0xF6) 349 #define REG_DVI_ATOP_7B_H (REG_DVI_ATOP_BASE + 0xF7) 350 #define REG_DVI_ATOP_7C_L (REG_DVI_ATOP_BASE + 0xF8) 351 #define REG_DVI_ATOP_7C_H (REG_DVI_ATOP_BASE + 0xF9) 352 #define REG_DVI_ATOP_7D_L (REG_DVI_ATOP_BASE + 0xFA) 353 #define REG_DVI_ATOP_7D_H (REG_DVI_ATOP_BASE + 0xFB) 354 #define REG_DVI_ATOP_7E_L (REG_DVI_ATOP_BASE + 0xFC) 355 #define REG_DVI_ATOP_7E_H (REG_DVI_ATOP_BASE + 0xFD) 356 #define REG_DVI_ATOP_7F_L (REG_DVI_ATOP_BASE + 0xFE) 357 #define REG_DVI_ATOP_7F_H (REG_DVI_ATOP_BASE + 0xFF) 358 359 360 #endif 361 362