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MStar hereby reserves the 91*53ee8cc1Swenshuai.xi // rights to any and all damages, losses, costs and expenses resulting therefrom. 92*53ee8cc1Swenshuai.xi // 93*53ee8cc1Swenshuai.xi //////////////////////////////////////////////////////////////////////////////// 94*53ee8cc1Swenshuai.xi //============================================================================== 95*53ee8cc1Swenshuai.xi // [mhal_dip.h] 96*53ee8cc1Swenshuai.xi // Date: 20120208 97*53ee8cc1Swenshuai.xi // Descriptions: Add a new layer for HW setting 98*53ee8cc1Swenshuai.xi //============================================================================== 99*53ee8cc1Swenshuai.xi #ifndef MHAL_DIP_H 100*53ee8cc1Swenshuai.xi #define MHAL_DIP_H 101*53ee8cc1Swenshuai.xi 102*53ee8cc1Swenshuai.xi #include "hwreg_sc.h" 103*53ee8cc1Swenshuai.xi 104*53ee8cc1Swenshuai.xi #define MVOP_PATH_COUNT_SUPPT 2 105*53ee8cc1Swenshuai.xi #define XC_PATH_COUNT_SUPPT 2 106*53ee8cc1Swenshuai.xi 107*53ee8cc1Swenshuai.xi //#if (defined ANDROID) && (defined TV_OS) 108*53ee8cc1Swenshuai.xi #define DIP_CMDQ_ENABLE 1 109*53ee8cc1Swenshuai.xi //#else 110*53ee8cc1Swenshuai.xi //#define DIP_CMDQ_ENABLE 0 111*53ee8cc1Swenshuai.xi //#endif 112*53ee8cc1Swenshuai.xi 113*53ee8cc1Swenshuai.xi /// Define DIP destion 114*53ee8cc1Swenshuai.xi typedef struct 115*53ee8cc1Swenshuai.xi { 116*53ee8cc1Swenshuai.xi MS_BOOL bSOURCE_TYPE_MVOP[MVOP_PATH_COUNT_SUPPT][MAX_DIP_WINDOW]; ///< DIP from MVOP 117*53ee8cc1Swenshuai.xi MS_BOOL bSOURCE_TYPE_IP_MAIN[XC_PATH_COUNT_SUPPT][MAX_DIP_WINDOW]; ///< DIP from MAIN(IP_MAIN) 118*53ee8cc1Swenshuai.xi MS_BOOL bSOURCE_TYPE_IP_SUB[XC_PATH_COUNT_SUPPT][MAX_DIP_WINDOW]; ///< DIP from SUB (IP_SUB) 119*53ee8cc1Swenshuai.xi MS_BOOL bSOURCE_TYPE_OP_MAIN[XC_PATH_COUNT_SUPPT][MAX_DIP_WINDOW]; ///< DIP from MAIN(OP_MAIN) 120*53ee8cc1Swenshuai.xi MS_BOOL bSOURCE_TYPE_OP_SUB[XC_PATH_COUNT_SUPPT][MAX_DIP_WINDOW]; ///< DIP from SUB(OP_SUB) 121*53ee8cc1Swenshuai.xi MS_BOOL bSOURCE_TYPE_OP_CAPTURE[XC_PATH_COUNT_SUPPT][MAX_DIP_WINDOW]; ///< DIP from OP capture 122*53ee8cc1Swenshuai.xi MS_BOOL bSOURCE_TYPE_DRAM[MAX_DIP_WINDOW]; ///< DIP from DRAM 123*53ee8cc1Swenshuai.xi MS_BOOL bSOURCE_TYPE_OSD[MAX_DIP_WINDOW]; ///< DIP from OSD capture 124*53ee8cc1Swenshuai.xi }DIP_CHIP_SOURCE_SEL; 125*53ee8cc1Swenshuai.xi 126*53ee8cc1Swenshuai.xi /// Define DIP chip property for different chip characteristic. 127*53ee8cc1Swenshuai.xi typedef struct 128*53ee8cc1Swenshuai.xi { 129*53ee8cc1Swenshuai.xi MS_BOOL bSourceSupport[MAX_DIP_WINDOW]; ///<DIP resource support number 130*53ee8cc1Swenshuai.xi MS_BOOL bDIPBuildIn[MAX_DIP_WINDOW]; ///<DIP XC buildIn or GOP 131*53ee8cc1Swenshuai.xi MS_U8 XCPathCount; ///<SC0/SC1/SC2 132*53ee8cc1Swenshuai.xi MS_U16 BusWordUnit[MAX_DIP_WINDOW]; ///<DIP Bus 133*53ee8cc1Swenshuai.xi DIP_CHIP_SOURCE_SEL bSourceSel; ///<DIP Source select 134*53ee8cc1Swenshuai.xi }DIP_CHIP_PROPERTY; 135*53ee8cc1Swenshuai.xi 136*53ee8cc1Swenshuai.xi //============================================================================== 137*53ee8cc1Swenshuai.xi // Scaling Ratio Macro 138*53ee8cc1Swenshuai.xi 139*53ee8cc1Swenshuai.xi // H_PreScalingDownRatio() was refined to reduce the calculation error. 140*53ee8cc1Swenshuai.xi // Use round up (x+y/2)/y might reduce the scaling ratio and induce right vertical garbage line. 141*53ee8cc1Swenshuai.xi // So use un-conditional add by 1 (x+y)/y. 142*53ee8cc1Swenshuai.xi #define H_PreScalingDownRatioDIP(Input, Output) ( (((MS_U32)(Output)) * 1048576ul)/ (Input) + 1 ) 143*53ee8cc1Swenshuai.xi #define V_PreScalingDownRatioDIP(Input, Output) ( (((MS_U32)(Output)) * 1048576ul)/ (Input) + 1 ) // CB mode 144*53ee8cc1Swenshuai.xi 145*53ee8cc1Swenshuai.xi #define DIP_CHIP_CAP(eWindow,_ret) do{ \ 146*53ee8cc1Swenshuai.xi switch(eWindow){ \ 147*53ee8cc1Swenshuai.xi case DIP_WINDOW: \ 148*53ee8cc1Swenshuai.xi _ret = DIP_CAP_EXIST| \ 149*53ee8cc1Swenshuai.xi DIP_CAP_420TILE| \ 150*53ee8cc1Swenshuai.xi DIP_CAP_MIRROR| \ 151*53ee8cc1Swenshuai.xi DIP_CAP_DIPR| \ 152*53ee8cc1Swenshuai.xi DIP_CAP_R2Y| \ 153*53ee8cc1Swenshuai.xi DIP_CAP_OP1_CAPTURE_V2|\ 154*53ee8cc1Swenshuai.xi DIP_CAP_SCALING_DOWN; \ 155*53ee8cc1Swenshuai.xi break; \ 156*53ee8cc1Swenshuai.xi default: \ 157*53ee8cc1Swenshuai.xi _ret = 0; \ 158*53ee8cc1Swenshuai.xi break; \ 159*53ee8cc1Swenshuai.xi } \ 160*53ee8cc1Swenshuai.xi }while(0) 161*53ee8cc1Swenshuai.xi 162*53ee8cc1Swenshuai.xi typedef enum 163*53ee8cc1Swenshuai.xi { 164*53ee8cc1Swenshuai.xi E_XC_DIP_SOURCE_TYPE_SUB2, 165*53ee8cc1Swenshuai.xi E_XC_DIP_SOURCE_TYPE_SUB, 166*53ee8cc1Swenshuai.xi E_XC_DIP_SOURCE_TYPE_MAIN, 167*53ee8cc1Swenshuai.xi E_XC_DIP_SOURCE_TYPE_OP, 168*53ee8cc1Swenshuai.xi } MS_XC_DIP_SOURCE_TYPE; 169*53ee8cc1Swenshuai.xi 170*53ee8cc1Swenshuai.xi typedef enum 171*53ee8cc1Swenshuai.xi { 172*53ee8cc1Swenshuai.xi E_DIP_NULL_FIELD =0x00, 173*53ee8cc1Swenshuai.xi E_DIP_TOP_FIELD =0x01, 174*53ee8cc1Swenshuai.xi E_DIP_BOTTOM_FIELD =0x02, 175*53ee8cc1Swenshuai.xi }EN_TB_FIELD; 176*53ee8cc1Swenshuai.xi 177*53ee8cc1Swenshuai.xi //============================================================================== 178*53ee8cc1Swenshuai.xi //============================================================================== 179*53ee8cc1Swenshuai.xi #ifdef MHAL_DIP_C 180*53ee8cc1Swenshuai.xi #define INTERFACE 181*53ee8cc1Swenshuai.xi #else 182*53ee8cc1Swenshuai.xi #define INTERFACE extern 183*53ee8cc1Swenshuai.xi #endif 184*53ee8cc1Swenshuai.xi 185*53ee8cc1Swenshuai.xi #define Hal_SC_DWIN_set_ficlk(args...) 186*53ee8cc1Swenshuai.xi #define Hal_SC_DWIN_set_wr_bank_mapping(args...) 187*53ee8cc1Swenshuai.xi #define Hal_SC_DWIN_set_csc(args...) 188*53ee8cc1Swenshuai.xi #define Hal_SC_DWIN_set_delayline(args...) 189*53ee8cc1Swenshuai.xi #define Hal_SC_DWIN_sw_db_burst(args...) 190*53ee8cc1Swenshuai.xi #define Hal_SC_DWIN_Set_FB_Num(args...) 191*53ee8cc1Swenshuai.xi #define Hal_SC_DWIN_get_memory_bit_fmt(args...) 0 192*53ee8cc1Swenshuai.xi #define Hal_SC_DWIN_set_capture_v_start(args...) 193*53ee8cc1Swenshuai.xi #define Hal_SC_DWIN_set_capture_h_start(args...) 194*53ee8cc1Swenshuai.xi #define Hal_SC_DWIN_set_capture_v_size(args...) 195*53ee8cc1Swenshuai.xi #define Hal_SC_DWIN_set_capture_h_size(args...) 196*53ee8cc1Swenshuai.xi #define Hal_SC_DWIN_get_capture_window(args...) 197*53ee8cc1Swenshuai.xi #define Hal_SC_DWIN_set_miusel(args...) 198*53ee8cc1Swenshuai.xi #define Hal_SC_DWIN_set_memoryaddress(args...) 199*53ee8cc1Swenshuai.xi #define Hal_SC_DWIN_DisableInputSource(args...) 200*53ee8cc1Swenshuai.xi #define Hal_SC_DWIN_SetInputSource(args...) 201*53ee8cc1Swenshuai.xi #define Hal_SC_DWIN_software_reset(args...) 202*53ee8cc1Swenshuai.xi #define Hal_SC_DWIN_setfield(args...) 203*53ee8cc1Swenshuai.xi #define Hal_SC_DWIN_set_image_wrap(args...) 204*53ee8cc1Swenshuai.xi #define Hal_SC_DWIN_set_input_sync_reference_edge(args...) 205*53ee8cc1Swenshuai.xi #define Hal_SC_DWIN_set_input_vsync_delay(args...) 206*53ee8cc1Swenshuai.xi #define Hal_SC_DWIN_set_de_only_mode(args...) 207*53ee8cc1Swenshuai.xi #define Hal_SC_DWIN_set_input_10bit(args...) 208*53ee8cc1Swenshuai.xi #define Hal_SC_DWIN_set_fir_down_sample_divider(args...) 209*53ee8cc1Swenshuai.xi #define Hal_SC_DWIN_set_coast_input(args...) 210*53ee8cc1Swenshuai.xi #define Hal_SC_DWIN_set_coast_window(args...) 211*53ee8cc1Swenshuai.xi #define Hal_SC_DWIN_set_input_sync_sample_mode(args...) 212*53ee8cc1Swenshuai.xi #define Hal_SC_DWIN_set_post_glitch_removal(args...) 213*53ee8cc1Swenshuai.xi #define Hal_SC_DWIN_set_DE_Mode_Glitch(args...) 214*53ee8cc1Swenshuai.xi #define Hal_SC_DWIN_set_de_bypass_mode(args...) 215*53ee8cc1Swenshuai.xi #define Hal_SC_DWIN_set_ms_filter(args...) 216*53ee8cc1Swenshuai.xi #define Hal_SC_DWIN_Disable_IPM_ReadWriteRequest(args...) 217*53ee8cc1Swenshuai.xi #define Hal_SC_DWIN_get_de_window(args...) 218*53ee8cc1Swenshuai.xi #define Hal_SC_DWIN_EnableIPAutoCoast(args...) 219*53ee8cc1Swenshuai.xi INTERFACE void Hal_SC_DWIN_set_422_cbcr_swap(void *pInstance, MS_BOOL bEnable, SCALER_DIP_WIN eWindow); 220*53ee8cc1Swenshuai.xi INTERFACE void Hal_SC_DWIN_set_pre_align_pixel(void *pInstance, MS_BOOL bEnable, MS_U16 pixels, SCALER_DIP_WIN eWindow); 221*53ee8cc1Swenshuai.xi INTERFACE XC_FRAME_STORE_NUMBER Hal_SC_DWIN_GetFrameStoreMode(void *pInstance, SCALER_DIP_WIN eWindow,MS_BOOL bInterlace); 222*53ee8cc1Swenshuai.xi INTERFACE void Hal_SC_DWIN_EnableR2YCSC(void *pInstance, MS_BOOL bEnable, SCALER_DIP_WIN eWindow); 223*53ee8cc1Swenshuai.xi INTERFACE void Hal_SC_DWIN_Set_vsd_output_line_count(void *pInstance, MS_BOOL bEnable,MS_U32 u32LineCount,SCALER_DIP_WIN eWindow); 224*53ee8cc1Swenshuai.xi INTERFACE void Hal_SC_DWIN_Set_vsd_input_line_count(void *pInstance, MS_BOOL bEnable,MS_BOOL bUserMode,MS_U32 u32UserLineCount,SCALER_DIP_WIN eWindow); 225*53ee8cc1Swenshuai.xi INTERFACE void Hal_SC_DWIN_sw_db(void *pInstance, P_SC_DIP_SWDB_INFO pDBreg, SCALER_DIP_WIN eWindow); 226*53ee8cc1Swenshuai.xi INTERFACE void Hal_SC_DWIN_set_input_vsync_inverse(void *pInstance, MS_BOOL bEnable, SCALER_DIP_WIN eWindow); 227*53ee8cc1Swenshuai.xi //==============Set=================== 228*53ee8cc1Swenshuai.xi INTERFACE MS_U16 HAL_XC_DIP_GetBusSize(void *pInstance, SCALER_DIP_WIN eWindow); 229*53ee8cc1Swenshuai.xi INTERFACE void HAL_XC_DIP_SWReset(void *pInstance, SCALER_DIP_WIN eWindow); 230*53ee8cc1Swenshuai.xi INTERFACE void HAL_XC_DIP_Init(void *pInstance, SCALER_DIP_WIN eWindow); 231*53ee8cc1Swenshuai.xi INTERFACE void HAL_XC_DIP_SetBase0(void *pInstance, MS_PHY u64BufStart,MS_PHY u64BufEnd,SCALER_DIP_WIN eWindow); 232*53ee8cc1Swenshuai.xi INTERFACE void HAL_XC_DIP_SetBase1(void *pInstance, MS_PHY u64BufStart,MS_PHY u64BufEnd,SCALER_DIP_WIN eWindow); 233*53ee8cc1Swenshuai.xi INTERFACE void HAL_XC_DIP_SetWinProperty(void *pInstance, MS_U8 u8BufCnt,MS_U16 u16Width,MS_U16 u16LineOft,MS_U16 u16Height,MS_PHY u64OffSet, SCALER_DIP_SOURCE_TYPE eSource,MS_BOOL bPIP,MS_BOOL b2P_Enable,SCALER_DIP_WIN eWindow); 234*53ee8cc1Swenshuai.xi INTERFACE void HAL_XC_DIP_SetWinProperty1(void *pInstance, MS_PHY u64OffSet,SCALER_DIP_WIN eWindow); 235*53ee8cc1Swenshuai.xi INTERFACE void HAL_XC_DIP_SetMiuSel(void *pInstance, MS_U8 u8MIUSel,SCALER_DIP_WIN eWindow); 236*53ee8cc1Swenshuai.xi INTERFACE void HAL_XC_DIP_SetDIPRMiuSel(void *pInstance, MS_U8 u8MIUSel,SCALER_DIP_WIN eWindow); 237*53ee8cc1Swenshuai.xi INTERFACE void HAL_XC_DIP_CpatureOneFrame(void *pInstance, SCALER_DIP_WIN eWindow); 238*53ee8cc1Swenshuai.xi INTERFACE void HAL_XC_DIP_CpatureOneFrame2(void *pInstance, SCALER_DIP_WIN eWindow); 239*53ee8cc1Swenshuai.xi INTERFACE void HAL_XC_DIP_ClearIntr(void *pInstance, MS_U16 u16mask,SCALER_DIP_WIN eWindow); 240*53ee8cc1Swenshuai.xi INTERFACE void HAL_XC_DIP_EnableCaptureStream(void *pInstance, MS_BOOL bEnable,SCALER_DIP_WIN eWindow); 241*53ee8cc1Swenshuai.xi INTERFACE void HAL_XC_DIP_EnableIntr(void *pInstance, MS_U16 u8mask, MS_BOOL bEnable,SCALER_DIP_WIN eWindow); 242*53ee8cc1Swenshuai.xi INTERFACE void HAL_XC_DIP_SetDataFmt(void *pInstance, EN_DRV_XC_DWIN_DATA_FMT fmt,SCALER_DIP_WIN eWindow); 243*53ee8cc1Swenshuai.xi INTERFACE void HAL_XC_DIP_SelectSourceScanType(void *pInstance, EN_XC_DWIN_SCAN_TYPE enScan,SCALER_DIP_WIN eWindow); 244*53ee8cc1Swenshuai.xi INTERFACE void HAL_XC_DIP_SetAlphaValue(void *pInstance, MS_U8 u8AlphaVal,SCALER_DIP_WIN eWindow); 245*53ee8cc1Swenshuai.xi INTERFACE void HAL_XC_DIP_SetUVSwap(void *pInstance, MS_BOOL bEnable,SCALER_DIP_WIN eWindow); 246*53ee8cc1Swenshuai.xi INTERFACE void HAL_XC_DIP_SetInterlaceWrite(void *pInstance, MS_BOOL bEnable,SCALER_DIP_WIN eWindow); 247*53ee8cc1Swenshuai.xi INTERFACE void HAL_XC_DIP_SetY2R(void *pInstance, MS_BOOL bEnable,SCALER_DIP_WIN eWindow); 248*53ee8cc1Swenshuai.xi INTERFACE void HAL_XC_DIP_SetYCSwap(void *pInstance, MS_BOOL bEnable,SCALER_DIP_WIN eWindow); 249*53ee8cc1Swenshuai.xi INTERFACE void HAL_XC_DIP_SetRGBSwap(void *pInstance, MS_BOOL bEnable,SCALER_DIP_WIN eWindow); 250*53ee8cc1Swenshuai.xi INTERFACE void HAL_XC_DIP_SetOutputCapture(void *pInstance, MS_BOOL bEnable,EN_XC_DIP_OP_CAPTURE eOpCapture,SCALER_DIP_WIN eWindow); 251*53ee8cc1Swenshuai.xi INTERFACE void HAL_XC_DIP_Set444to422(void *pInstance, EN_DRV_XC_DWIN_DATA_FMT fmt,MS_BOOL bSrcYUVFmt,MS_BOOL bSrcFmt422,SCALER_DIP_WIN eWindow); 252*53ee8cc1Swenshuai.xi INTERFACE void HAL_XC_DIP_SetFRC(void *pInstance, MS_BOOL bEnable,MS_U16 u16In,MS_U16 u16Out,SCALER_DIP_WIN eWindow); 253*53ee8cc1Swenshuai.xi INTERFACE void HAL_XC_DIP_SetMirror(void *pInstance, MS_BOOL bHMirror,MS_BOOL bVMirror,SCALER_DIP_WIN eWindow); 254*53ee8cc1Swenshuai.xi INTERFACE void HAL_XC_DIP_SetDIPRProperty(void *pInstance, ST_XC_DIPR_PROPERTY *pstDIPRProperty, SCALER_DIP_WIN eWindow); 255*53ee8cc1Swenshuai.xi INTERFACE void HAL_XC_DIP_SetDIPRProperty_MFDEC(void *pInstance, ST_DIP_MFDEC_INFO stDIPR_MFDecInfo, SCALER_DIP_WIN eWindow); 256*53ee8cc1Swenshuai.xi INTERFACE void HAL_XC_DIP_SetDIPRProperty_DI(void *pInstance, ST_XC_DIPR_PROPERTY *pstDIPRProperty, ST_DIP_DIPR_3DDI_SETTING *stDIPR_DIInfo, SCALER_DIP_WIN eWindow); 257*53ee8cc1Swenshuai.xi INTERFACE void HAL_XC_DIP_InterruptAttach(void *pInstance, InterruptCb pIntCb,SCALER_DIP_WIN eWindow); 258*53ee8cc1Swenshuai.xi INTERFACE void HAL_XC_DIP_InterruptDetach(void *pInstance, SCALER_DIP_WIN eWindow); 259*53ee8cc1Swenshuai.xi INTERFACE void HAL_XC_DIP_MuxDispatch(void *pInstance, SCALER_DIP_SOURCE_TYPE eSource,SCALER_DIP_WIN eWindow); 260*53ee8cc1Swenshuai.xi INTERFACE void HAL_XC_DIP_Rotation(void *pInstance, MS_BOOL bRotation,EN_XC_DIP_ROTATION eRoDirection,MS_PHY u64StartAddr,SCALER_DIP_WIN eTmpWindow); 261*53ee8cc1Swenshuai.xi INTERFACE void HAL_XC_DIP_SetPinpon(void *pInstance, MS_BOOL bPinpon,MS_PHY u64PinponAddr,MS_PHY u64OffSet,SCALER_DIP_WIN eWindow); 262*53ee8cc1Swenshuai.xi INTERFACE SCALER_DIP_WIN HAL_XC_DIP_GetHVSP(void* pInstance); 263*53ee8cc1Swenshuai.xi INTERFACE MS_BOOL HAL_XC_DIP_SetHVSP(void* pInstance,MS_BOOL bSelect, SCALER_DIP_WIN eWindow); 264*53ee8cc1Swenshuai.xi INTERFACE MS_BOOL HAL_XC_DIP_Set420TileBlock(void* pInstance,EN_XC_DIP_TILE_BLOCK eTileBlock,SCALER_DIP_WIN eWindow); 265*53ee8cc1Swenshuai.xi #ifdef CONFIG_UTOPIA_PROC_DBG_SUPPORT 266*53ee8cc1Swenshuai.xi INTERFACE void HAL_XC_DIP_Check_Clock(MS_U64* u64ReqHdl,SCALER_DIP_WIN eWindow); 267*53ee8cc1Swenshuai.xi INTERFACE void HAL_XC_DIP_Check_Scale(MS_U64* u64ReqHdl,MS_U16 *u16H_Scaling_Enable, MS_U32 *u32H_Scaling_Ratio, MS_U16 *u16V_Scaling_Enable, MS_U32 *u32V_Scaling_Ratio,SCALER_DIP_WIN eWindow); 268*53ee8cc1Swenshuai.xi #endif 269*53ee8cc1Swenshuai.xi INTERFACE void HAL_XC_DIP_Enable(void *pInstance, MS_BOOL bEnable); 270*53ee8cc1Swenshuai.xi //==============Get=================== 271*53ee8cc1Swenshuai.xi INTERFACE MS_U8 HAL_XC_DIP_GetBufCnt(void *pInstance, SCALER_DIP_WIN eWindow); 272*53ee8cc1Swenshuai.xi INTERFACE MS_U16 HAL_XC_DIP_GetBPP(void *pInstance, EN_DRV_XC_DWIN_DATA_FMT fbFmt,SCALER_DIP_WIN eWindow); 273*53ee8cc1Swenshuai.xi INTERFACE MS_U16 HAL_XC_DIP_WidthAlignCheck(void *pInstance, MS_U16 u16Width,MS_U16 u16Bpp,SCALER_DIP_WIN eWindow); 274*53ee8cc1Swenshuai.xi INTERFACE MS_U16 HAL_XC_DIP_GetIntrStatus(void *pInstance, SCALER_DIP_WIN eWindow); 275*53ee8cc1Swenshuai.xi INTERFACE MS_BOOL HAL_XC_DIP_GetInterlaceWrite(void *pInstance, SCALER_DIP_WIN eWindow); 276*53ee8cc1Swenshuai.xi INTERFACE EN_DRV_XC_DWIN_DATA_FMT HAL_XC_DIP_GetDataFmt(void *pInstance, SCALER_DIP_WIN eWindow); 277*53ee8cc1Swenshuai.xi INTERFACE EN_XC_DWIN_SCAN_TYPE HAL_XC_DIP_GetSourceScanType(void *pInstance, SCALER_DIP_WIN eWindow); 278*53ee8cc1Swenshuai.xi INTERFACE void HAL_XC_DIP_2P_Width_Check(void *pInstance, XC_SETWIN_INFO *pstXC_SetWin_Info, SCALER_DIP_WIN eWindow); 279*53ee8cc1Swenshuai.xi INTERFACE MS_BOOL HAL_XC_DIP_GetCaptureSourceStatus(void *pInstance, SCALER_DIP_SOURCE_TYPE eSource,SCALER_DIP_WIN eWindow, MS_BOOL* bstatus); 280*53ee8cc1Swenshuai.xi INTERFACE MS_BOOL HAL_XC_DIP_CMDQBegin(void *pInstance,SCALER_DIP_WIN eWindow); 281*53ee8cc1Swenshuai.xi INTERFACE MS_BOOL HAL_XC_DIP_CMDQEnd(void *pInstance,SCALER_DIP_WIN eWindow); 282*53ee8cc1Swenshuai.xi INTERFACE MS_BOOL HAL_XC_DIP_CMDQ_SetOperations(void* pInstance, cmd_mload_utopia_interface *pOps, MS_BOOL bEnable, SCALER_DIP_WIN eWindow); 283*53ee8cc1Swenshuai.xi 284*53ee8cc1Swenshuai.xi #undef INTERFACE 285*53ee8cc1Swenshuai.xi #endif /* MHAL_DIP_H */ 286