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MStar hereby reserves the 91 // rights to any and all damages, losses, costs and expenses resulting therefrom. 92 // 93 //////////////////////////////////////////////////////////////////////////////// 94 //============================================================================== 95 // [mhal_dip.h] 96 // Date: 20120208 97 // Descriptions: Add a new layer for HW setting 98 //============================================================================== 99 #ifndef MHAL_DIP_H 100 #define MHAL_DIP_H 101 102 #include "hwreg_sc.h" 103 104 #define MVOP_PATH_COUNT_SUPPT 2 105 #define XC_PATH_COUNT_SUPPT 2 106 107 //#if (defined ANDROID) && (defined TV_OS) 108 #define DIP_CMDQ_ENABLE 1 109 //#else 110 //#define DIP_CMDQ_ENABLE 0 111 //#endif 112 113 /// Define DIP destion 114 typedef struct 115 { 116 MS_BOOL bSOURCE_TYPE_MVOP[MVOP_PATH_COUNT_SUPPT][MAX_DIP_WINDOW]; ///< DIP from MVOP 117 MS_BOOL bSOURCE_TYPE_IP_MAIN[XC_PATH_COUNT_SUPPT][MAX_DIP_WINDOW]; ///< DIP from MAIN(IP_MAIN) 118 MS_BOOL bSOURCE_TYPE_IP_SUB[XC_PATH_COUNT_SUPPT][MAX_DIP_WINDOW]; ///< DIP from SUB (IP_SUB) 119 MS_BOOL bSOURCE_TYPE_OP_MAIN[XC_PATH_COUNT_SUPPT][MAX_DIP_WINDOW]; ///< DIP from MAIN(OP_MAIN) 120 MS_BOOL bSOURCE_TYPE_OP_SUB[XC_PATH_COUNT_SUPPT][MAX_DIP_WINDOW]; ///< DIP from SUB(OP_SUB) 121 MS_BOOL bSOURCE_TYPE_OP_CAPTURE[XC_PATH_COUNT_SUPPT][MAX_DIP_WINDOW]; ///< DIP from OP capture 122 MS_BOOL bSOURCE_TYPE_DRAM[MAX_DIP_WINDOW]; ///< DIP from DRAM 123 MS_BOOL bSOURCE_TYPE_OSD[MAX_DIP_WINDOW]; ///< DIP from OSD capture 124 }DIP_CHIP_SOURCE_SEL; 125 126 /// Define DIP chip property for different chip characteristic. 127 typedef struct 128 { 129 MS_BOOL bSourceSupport[MAX_DIP_WINDOW]; ///<DIP resource support number 130 MS_BOOL bDIPBuildIn[MAX_DIP_WINDOW]; ///<DIP XC buildIn or GOP 131 MS_U8 XCPathCount; ///<SC0/SC1/SC2 132 MS_U16 BusWordUnit[MAX_DIP_WINDOW]; ///<DIP Bus 133 DIP_CHIP_SOURCE_SEL bSourceSel; ///<DIP Source select 134 }DIP_CHIP_PROPERTY; 135 136 //============================================================================== 137 // Scaling Ratio Macro 138 139 // H_PreScalingDownRatio() was refined to reduce the calculation error. 140 // Use round up (x+y/2)/y might reduce the scaling ratio and induce right vertical garbage line. 141 // So use un-conditional add by 1 (x+y)/y. 142 #define H_PreScalingDownRatioDIP(Input, Output) ( (((MS_U32)(Output)) * 1048576ul)/ (Input) + 1 ) 143 #define V_PreScalingDownRatioDIP(Input, Output) ( (((MS_U32)(Output)) * 1048576ul)/ (Input) + 1 ) // CB mode 144 145 #define DIP_CHIP_CAP(eWindow,_ret) do{ \ 146 switch(eWindow){ \ 147 case DIP_WINDOW: \ 148 _ret = DIP_CAP_EXIST| \ 149 DIP_CAP_420TILE| \ 150 DIP_CAP_MIRROR| \ 151 DIP_CAP_DIPR| \ 152 DIP_CAP_R2Y| \ 153 DIP_CAP_OP1_CAPTURE_V2|\ 154 DIP_CAP_SCALING_DOWN; \ 155 break; \ 156 default: \ 157 _ret = 0; \ 158 break; \ 159 } \ 160 }while(0) 161 162 typedef enum 163 { 164 E_XC_DIP_SOURCE_TYPE_SUB2, 165 E_XC_DIP_SOURCE_TYPE_SUB, 166 E_XC_DIP_SOURCE_TYPE_MAIN, 167 E_XC_DIP_SOURCE_TYPE_OP, 168 } MS_XC_DIP_SOURCE_TYPE; 169 170 typedef enum 171 { 172 E_DIP_NULL_FIELD =0x00, 173 E_DIP_TOP_FIELD =0x01, 174 E_DIP_BOTTOM_FIELD =0x02, 175 }EN_TB_FIELD; 176 177 //============================================================================== 178 //============================================================================== 179 #ifdef MHAL_DIP_C 180 #define INTERFACE 181 #else 182 #define INTERFACE extern 183 #endif 184 185 #define Hal_SC_DWIN_set_ficlk(args...) 186 #define Hal_SC_DWIN_set_wr_bank_mapping(args...) 187 #define Hal_SC_DWIN_set_csc(args...) 188 #define Hal_SC_DWIN_set_delayline(args...) 189 #define Hal_SC_DWIN_sw_db_burst(args...) 190 #define Hal_SC_DWIN_Set_FB_Num(args...) 191 #define Hal_SC_DWIN_get_memory_bit_fmt(args...) 0 192 #define Hal_SC_DWIN_set_capture_v_start(args...) 193 #define Hal_SC_DWIN_set_capture_h_start(args...) 194 #define Hal_SC_DWIN_set_capture_v_size(args...) 195 #define Hal_SC_DWIN_set_capture_h_size(args...) 196 #define Hal_SC_DWIN_get_capture_window(args...) 197 #define Hal_SC_DWIN_set_miusel(args...) 198 #define Hal_SC_DWIN_set_memoryaddress(args...) 199 #define Hal_SC_DWIN_DisableInputSource(args...) 200 #define Hal_SC_DWIN_SetInputSource(args...) 201 #define Hal_SC_DWIN_software_reset(args...) 202 #define Hal_SC_DWIN_setfield(args...) 203 #define Hal_SC_DWIN_set_image_wrap(args...) 204 #define Hal_SC_DWIN_set_input_sync_reference_edge(args...) 205 #define Hal_SC_DWIN_set_input_vsync_delay(args...) 206 #define Hal_SC_DWIN_set_de_only_mode(args...) 207 #define Hal_SC_DWIN_set_input_10bit(args...) 208 #define Hal_SC_DWIN_set_fir_down_sample_divider(args...) 209 #define Hal_SC_DWIN_set_coast_input(args...) 210 #define Hal_SC_DWIN_set_coast_window(args...) 211 #define Hal_SC_DWIN_set_input_sync_sample_mode(args...) 212 #define Hal_SC_DWIN_set_post_glitch_removal(args...) 213 #define Hal_SC_DWIN_set_DE_Mode_Glitch(args...) 214 #define Hal_SC_DWIN_set_de_bypass_mode(args...) 215 #define Hal_SC_DWIN_set_ms_filter(args...) 216 #define Hal_SC_DWIN_Disable_IPM_ReadWriteRequest(args...) 217 #define Hal_SC_DWIN_get_de_window(args...) 218 #define Hal_SC_DWIN_EnableIPAutoCoast(args...) 219 INTERFACE void Hal_SC_DWIN_set_422_cbcr_swap(void *pInstance, MS_BOOL bEnable, SCALER_DIP_WIN eWindow); 220 INTERFACE void Hal_SC_DWIN_set_pre_align_pixel(void *pInstance, MS_BOOL bEnable, MS_U16 pixels, SCALER_DIP_WIN eWindow); 221 INTERFACE XC_FRAME_STORE_NUMBER Hal_SC_DWIN_GetFrameStoreMode(void *pInstance, SCALER_DIP_WIN eWindow,MS_BOOL bInterlace); 222 INTERFACE void Hal_SC_DWIN_EnableR2YCSC(void *pInstance, MS_BOOL bEnable, SCALER_DIP_WIN eWindow); 223 INTERFACE void Hal_SC_DWIN_Set_vsd_output_line_count(void *pInstance, MS_BOOL bEnable,MS_U32 u32LineCount,SCALER_DIP_WIN eWindow); 224 INTERFACE void Hal_SC_DWIN_Set_vsd_input_line_count(void *pInstance, MS_BOOL bEnable,MS_BOOL bUserMode,MS_U32 u32UserLineCount,SCALER_DIP_WIN eWindow); 225 INTERFACE void Hal_SC_DWIN_sw_db(void *pInstance, P_SC_DIP_SWDB_INFO pDBreg, SCALER_DIP_WIN eWindow); 226 INTERFACE void Hal_SC_DWIN_set_input_vsync_inverse(void *pInstance, MS_BOOL bEnable, SCALER_DIP_WIN eWindow); 227 //==============Set=================== 228 INTERFACE MS_U16 HAL_XC_DIP_GetBusSize(void *pInstance, SCALER_DIP_WIN eWindow); 229 INTERFACE void HAL_XC_DIP_SWReset(void *pInstance, SCALER_DIP_WIN eWindow); 230 INTERFACE void HAL_XC_DIP_Init(void *pInstance, SCALER_DIP_WIN eWindow); 231 INTERFACE void HAL_XC_DIP_SetBase0(void *pInstance, MS_PHY u64BufStart,MS_PHY u64BufEnd,SCALER_DIP_WIN eWindow); 232 INTERFACE void HAL_XC_DIP_SetBase1(void *pInstance, MS_PHY u64BufStart,MS_PHY u64BufEnd,SCALER_DIP_WIN eWindow); 233 INTERFACE void HAL_XC_DIP_SetWinProperty(void *pInstance, MS_U8 u8BufCnt,MS_U16 u16Width,MS_U16 u16LineOft,MS_U16 u16Height,MS_PHY u64OffSet, SCALER_DIP_SOURCE_TYPE eSource,MS_BOOL bPIP,MS_BOOL b2P_Enable,SCALER_DIP_WIN eWindow); 234 INTERFACE void HAL_XC_DIP_SetWinProperty1(void *pInstance, MS_PHY u64OffSet,SCALER_DIP_WIN eWindow); 235 INTERFACE void HAL_XC_DIP_SetMiuSel(void *pInstance, MS_U8 u8MIUSel,SCALER_DIP_WIN eWindow); 236 INTERFACE void HAL_XC_DIP_SetDIPRMiuSel(void *pInstance, MS_U8 u8MIUSel,SCALER_DIP_WIN eWindow); 237 INTERFACE void HAL_XC_DIP_CpatureOneFrame(void *pInstance, SCALER_DIP_WIN eWindow); 238 INTERFACE void HAL_XC_DIP_CpatureOneFrame2(void *pInstance, SCALER_DIP_WIN eWindow); 239 INTERFACE void HAL_XC_DIP_ClearIntr(void *pInstance, MS_U16 u16mask,SCALER_DIP_WIN eWindow); 240 INTERFACE void HAL_XC_DIP_EnableCaptureStream(void *pInstance, MS_BOOL bEnable,SCALER_DIP_WIN eWindow); 241 INTERFACE void HAL_XC_DIP_EnableIntr(void *pInstance, MS_U16 u8mask, MS_BOOL bEnable,SCALER_DIP_WIN eWindow); 242 INTERFACE void HAL_XC_DIP_SetDataFmt(void *pInstance, EN_DRV_XC_DWIN_DATA_FMT fmt,SCALER_DIP_WIN eWindow); 243 INTERFACE void HAL_XC_DIP_SelectSourceScanType(void *pInstance, EN_XC_DWIN_SCAN_TYPE enScan,SCALER_DIP_WIN eWindow); 244 INTERFACE void HAL_XC_DIP_SetAlphaValue(void *pInstance, MS_U8 u8AlphaVal,SCALER_DIP_WIN eWindow); 245 INTERFACE void HAL_XC_DIP_SetUVSwap(void *pInstance, MS_BOOL bEnable,SCALER_DIP_WIN eWindow); 246 INTERFACE void HAL_XC_DIP_SetInterlaceWrite(void *pInstance, MS_BOOL bEnable,SCALER_DIP_WIN eWindow); 247 INTERFACE void HAL_XC_DIP_SetY2R(void *pInstance, MS_BOOL bEnable,SCALER_DIP_WIN eWindow); 248 INTERFACE void HAL_XC_DIP_SetYCSwap(void *pInstance, MS_BOOL bEnable,SCALER_DIP_WIN eWindow); 249 INTERFACE void HAL_XC_DIP_SetRGBSwap(void *pInstance, MS_BOOL bEnable,SCALER_DIP_WIN eWindow); 250 INTERFACE void HAL_XC_DIP_SetOutputCapture(void *pInstance, MS_BOOL bEnable,EN_XC_DIP_OP_CAPTURE eOpCapture,SCALER_DIP_WIN eWindow); 251 INTERFACE void HAL_XC_DIP_Set444to422(void *pInstance, EN_DRV_XC_DWIN_DATA_FMT fmt,MS_BOOL bSrcYUVFmt,MS_BOOL bSrcFmt422,SCALER_DIP_WIN eWindow); 252 INTERFACE void HAL_XC_DIP_SetFRC(void *pInstance, MS_BOOL bEnable,MS_U16 u16In,MS_U16 u16Out,SCALER_DIP_WIN eWindow); 253 INTERFACE void HAL_XC_DIP_SetMirror(void *pInstance, MS_BOOL bHMirror,MS_BOOL bVMirror,SCALER_DIP_WIN eWindow); 254 INTERFACE void HAL_XC_DIP_SetDIPRProperty(void *pInstance, ST_XC_DIPR_PROPERTY *pstDIPRProperty, SCALER_DIP_WIN eWindow); 255 INTERFACE void HAL_XC_DIP_SetDIPRProperty_MFDEC(void *pInstance, ST_DIP_MFDEC_INFO stDIPR_MFDecInfo, SCALER_DIP_WIN eWindow); 256 INTERFACE void HAL_XC_DIP_SetDIPRProperty_DI(void *pInstance, ST_XC_DIPR_PROPERTY *pstDIPRProperty, ST_DIP_DIPR_3DDI_SETTING *stDIPR_DIInfo, SCALER_DIP_WIN eWindow); 257 INTERFACE void HAL_XC_DIP_InterruptAttach(void *pInstance, InterruptCb pIntCb,SCALER_DIP_WIN eWindow); 258 INTERFACE void HAL_XC_DIP_InterruptDetach(void *pInstance, SCALER_DIP_WIN eWindow); 259 INTERFACE void HAL_XC_DIP_MuxDispatch(void *pInstance, SCALER_DIP_SOURCE_TYPE eSource,SCALER_DIP_WIN eWindow); 260 INTERFACE void HAL_XC_DIP_Rotation(void *pInstance, MS_BOOL bRotation,EN_XC_DIP_ROTATION eRoDirection,MS_PHY u64StartAddr,SCALER_DIP_WIN eTmpWindow); 261 INTERFACE void HAL_XC_DIP_SetPinpon(void *pInstance, MS_BOOL bPinpon,MS_PHY u64PinponAddr,MS_PHY u64OffSet,SCALER_DIP_WIN eWindow); 262 INTERFACE SCALER_DIP_WIN HAL_XC_DIP_GetHVSP(void* pInstance); 263 INTERFACE MS_BOOL HAL_XC_DIP_SetHVSP(void* pInstance,MS_BOOL bSelect, SCALER_DIP_WIN eWindow); 264 INTERFACE MS_BOOL HAL_XC_DIP_Set420TileBlock(void* pInstance,EN_XC_DIP_TILE_BLOCK eTileBlock,SCALER_DIP_WIN eWindow); 265 #ifdef CONFIG_UTOPIA_PROC_DBG_SUPPORT 266 INTERFACE void HAL_XC_DIP_Check_Clock(MS_U64* u64ReqHdl,SCALER_DIP_WIN eWindow); 267 INTERFACE void HAL_XC_DIP_Check_Scale(MS_U64* u64ReqHdl,MS_U16 *u16H_Scaling_Enable, MS_U32 *u32H_Scaling_Ratio, MS_U16 *u16V_Scaling_Enable, MS_U32 *u32V_Scaling_Ratio,SCALER_DIP_WIN eWindow); 268 #endif 269 INTERFACE void HAL_XC_DIP_Enable(void *pInstance, MS_BOOL bEnable); 270 //==============Get=================== 271 INTERFACE MS_U8 HAL_XC_DIP_GetBufCnt(void *pInstance, SCALER_DIP_WIN eWindow); 272 INTERFACE MS_U16 HAL_XC_DIP_GetBPP(void *pInstance, EN_DRV_XC_DWIN_DATA_FMT fbFmt,SCALER_DIP_WIN eWindow); 273 INTERFACE MS_U16 HAL_XC_DIP_WidthAlignCheck(void *pInstance, MS_U16 u16Width,MS_U16 u16Bpp,SCALER_DIP_WIN eWindow); 274 INTERFACE MS_U16 HAL_XC_DIP_GetIntrStatus(void *pInstance, SCALER_DIP_WIN eWindow); 275 INTERFACE MS_BOOL HAL_XC_DIP_GetInterlaceWrite(void *pInstance, SCALER_DIP_WIN eWindow); 276 INTERFACE EN_DRV_XC_DWIN_DATA_FMT HAL_XC_DIP_GetDataFmt(void *pInstance, SCALER_DIP_WIN eWindow); 277 INTERFACE EN_XC_DWIN_SCAN_TYPE HAL_XC_DIP_GetSourceScanType(void *pInstance, SCALER_DIP_WIN eWindow); 278 INTERFACE void HAL_XC_DIP_2P_Width_Check(void *pInstance, XC_SETWIN_INFO *pstXC_SetWin_Info, SCALER_DIP_WIN eWindow); 279 INTERFACE MS_BOOL HAL_XC_DIP_GetCaptureSourceStatus(void *pInstance, SCALER_DIP_SOURCE_TYPE eSource,SCALER_DIP_WIN eWindow, MS_BOOL* bstatus); 280 INTERFACE MS_BOOL HAL_XC_DIP_CMDQBegin(void *pInstance,SCALER_DIP_WIN eWindow); 281 INTERFACE MS_BOOL HAL_XC_DIP_CMDQEnd(void *pInstance,SCALER_DIP_WIN eWindow); 282 INTERFACE MS_BOOL HAL_XC_DIP_CMDQ_SetOperations(void* pInstance, cmd_mload_utopia_interface *pOps, MS_BOOL bEnable, SCALER_DIP_WIN eWindow); 283 284 #undef INTERFACE 285 #endif /* MHAL_DIP_H */ 286