1 //<MStar Software>
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76 //******************************************************************************
77 //<MStar Software>
78 #ifndef _HAL_PNL_C_
79 #define _HAL_PNL_C_
80
81 //-------------------------------------------------------------------------------------------------
82 // Include Files
83 //-------------------------------------------------------------------------------------------------
84
85 #include "MsCommon.h"
86 #include "MsTypes.h"
87 #include "utopia.h"
88 #include "utopia_dapi.h"
89 #include "apiPNL.h"
90 #include "apiPNL_v2.h"
91 #include "drvPNL.h"
92 #include "halPNL.h"
93 #include "PNL_private.h"
94 #include "pnl_hwreg_utility2.h"
95
96 #ifdef MSOS_TYPE_LINUX_KERNEL
97 #include <linux/string.h>
98 #include <linux/delay.h>
99 #include <asm/div64.h>
100 #else
101 #include "string.h"
102 #define do_div(x,y) ((x)/=(y))
103 #endif
104
105 //-------------------------------------------------------------------------------------------------
106 // Driver Compiler Options
107 //-------------------------------------------------------------------------------------------------
108
109 //-------------------------------------------------------------------------------------------------
110 // Local Defines
111 //-------------------------------------------------------------------------------------------------
112
113 #define UNUSED(x) (x=x)
114 #if 1
115 #define HAL_PNL_DBG(_dbgSwitch_, _fmt, _args...) { if((_dbgSwitch_ & _u16PnlDbgSwitch) != 0) printf("PNL:"_fmt, ##_args); }
116 #define HAL_MOD_CAL_DBG(x) //x
117 #else
118 #define HAL_PNL_DBG(_dbgSwitch_, _fmt, _args...) { }
119 #endif
120
121 #define DAC_LPLL_ICTRL 0x0002
122 #define LVDS_LPLL_ICTRL 0x0001
123
124 //-------------------------------------------------------------------------------------------------
125 // Local Structurs
126 //-------------------------------------------------------------------------------------------------
127
128 //-------------------------------------------------------------------------------------------------
129 // Global Variables
130 //-------------------------------------------------------------------------------------------------
131
132 //-------------------------------------------------------------------------------------------------
133 // Local Variables
134 //-------------------------------------------------------------------------------------------------
135
136 //-------------------------------------------------------------------------------------------------
137 // Debug Functions
138 //-------------------------------------------------------------------------------------------------
139
140 //-------------------------------------------------------------------------------------------------
141 // Local Functions
142 //-------------------------------------------------------------------------------------------------
143
144 //-------------------------------------------------------------------------------------------------
145 // Global Function
146 //-------------------------------------------------------------------------------------------------
147 /**
148 * @brief: Power On MOD. but not mutex protected
149 *
150 */
MHal_MOD_PowerOn(void * pInstance,MS_BOOL bEn,MS_U8 u8LPLL_Type,MS_U8 DualModeType,MS_U16 u16OutputCFG0_7,MS_U16 u16OutputCFG8_15,MS_U16 u16OutputCFG16_21)151 MS_U8 MHal_MOD_PowerOn(void *pInstance, MS_BOOL bEn, MS_U8 u8LPLL_Type,MS_U8 DualModeType, MS_U16 u16OutputCFG0_7, MS_U16 u16OutputCFG8_15, MS_U16 u16OutputCFG16_21)
152 {
153
154 UNUSED(u8LPLL_Type);
155
156
157 if( bEn )
158 {
159 //analog MOD power down. 1: power down, 0: power up
160 // For Mod2 no output signel
161 ///////////////////////////////////////////////////
162 // Power On
163 MOD_W2BYTEMSK(REG_MOD_BK00_78_L, 0x0 , BIT(0) );
164
165 //enable ib , enable ck
166 MOD_W2BYTEMSK(REG_MOD_BK00_77_L, (BIT(1) | BIT(0)), (BIT(1) | BIT(0)));
167 }
168 else
169 { //1: power down, 0: power up
170 MOD_W2BYTEMSK(REG_MOD_BK00_78_L, BIT(0), BIT(0));
171 //disable ib, disable ck
172 MOD_W2BYTEMSK(REG_MOD_BK00_77_L, 0x00, (BIT(1) | BIT(0)));
173 }
174
175
176 return 1;
177 }
178
179 /**
180 * @brief: Setup the PVDD power 1:2.5V, 0:3.3V
181 *
182 */
MHal_MOD_PVDD_Power_Setting(void * pInstance,MS_BOOL bIs2p5)183 void MHal_MOD_PVDD_Power_Setting(void *pInstance, MS_BOOL bIs2p5)
184 {
185 // MOD_W2BYTEMSK(REG_MOD_BK00_37_L, ((bIs2p5)? BIT(6):0), BIT(6)); //MOD PVDD=1: 2.5,PVDD=0: 3.3
186 }
187
MHal_PNL_TCON_Init(void * pInstance)188 void MHal_PNL_TCON_Init(void *pInstance)
189 {
190
191 }
192
MHal_Shift_LVDS_Pair(void * pInstance,MS_U8 Type)193 void MHal_Shift_LVDS_Pair(void *pInstance, MS_U8 Type)
194 {
195 UNUSED(Type);
196 MOD_W2BYTEMSK(REG_MOD_BK00_42_L, 0x0000, (BIT(7) | BIT(6))); // shift_lvds_pair, set LVDS Mode3
197 }
198
199
200
MHal_Output_LVDS_Pair_Setting(void * pInstance,MS_U8 Type,MS_U16 u16OutputCFG0_7,MS_U16 u16OutputCFG8_15,MS_U16 u16OutputCFG16_21)201 void MHal_Output_LVDS_Pair_Setting(void *pInstance, MS_U8 Type, MS_U16 u16OutputCFG0_7, MS_U16 u16OutputCFG8_15, MS_U16 u16OutputCFG16_21)
202 {
203 UNUSED(Type);
204 UNUSED(u16OutputCFG0_7);
205 UNUSED(u16OutputCFG8_15);
206 UNUSED(u16OutputCFG16_21);
207 MOD_W2BYTEMSK(REG_MOD_BK00_6D_L, 0x5000, 0xF000);
208 MOD_W2BYTE(REG_MOD_BK00_6E_L, 0x5555);
209 MOD_W2BYTEMSK(REG_MOD_BK00_6F_L, 0x0005, 0x000F);
210 }
211
MHal_PQ_Clock_Gen_For_Gamma(void * pInstance)212 void MHal_PQ_Clock_Gen_For_Gamma(void *pInstance)
213 {
214
215 }
216
MHal_VOP_SetGammaMappingMode(void * pInstance,MS_U8 u8Mapping)217 void MHal_VOP_SetGammaMappingMode(void *pInstance, MS_U8 u8Mapping)
218 {
219
220 if(u8Mapping & GAMMA_MAPPING)
221 {
222 SC_W2BYTEMSK(0, REG_SC_BK10_74_L, (u8Mapping & GAMMA_10BIT_MAPPING)? BIT(4):0, BIT(4));
223 }
224 else
225 {
226 PNL_ASSERT(0, "Invalid eSupportGammaMapMode [%d] Passed to [%s], please make sure the u8Mapping[%d] is valid\n.",
227 u8Mapping, __FUNCTION__, u8Mapping);
228 }
229 }
230
Hal_VOP_Is_GammaMappingMode_enable(void * pInstance)231 MS_BOOL Hal_VOP_Is_GammaMappingMode_enable(void *pInstance)
232 {
233 return SC_R2BYTEMSK(0, REG_SC_BK10_74_L, BIT(4));
234 }
235
236 // After A5, 8 bit mode only support burst write!!!
Hal_VOP_Is_GammaSupportSignalWrite(void * pInstance,DRVPNL_GAMMA_MAPPEING_MODE u8Mapping)237 MS_BOOL Hal_VOP_Is_GammaSupportSignalWrite(void *pInstance, DRVPNL_GAMMA_MAPPEING_MODE u8Mapping)
238 {
239 return TRUE;
240 }
241
hal_PNL_WriteGamma12Bit(void * pInstance,MS_U8 u8Channel,MS_BOOL bBurstWrite,MS_U16 u16Addr,MS_U16 u16GammaValue)242 void hal_PNL_WriteGamma12Bit(void *pInstance, MS_U8 u8Channel, MS_BOOL bBurstWrite, MS_U16 u16Addr, MS_U16 u16GammaValue)
243 {
244 MS_U16 u16Delay = 0xFFFF;
245 PNL_INSTANCE_PRIVATE *pPNLInstancePrivate = NULL;
246 UtopiaInstanceGetPrivate(pInstance, (void**)&pPNLInstancePrivate);
247
248 PNL_DBG(PNL_DBGLEVEL_GAMMA, "Write [ch %d][addr 0x%x]: 0x%x \n", u8Channel, u16Addr, u16GammaValue);
249
250 if (!bBurstWrite )
251 {
252 while (SC_R2BYTEMSK(pPNLInstancePrivate->u32DeviceID, REG_SC_BK10_6D_L, 0xE0) && (u16Delay > 0)) // Check whether the Write chanel is ready
253 {
254 u16Delay--;
255 }
256 PNL_ASSERT(u16Delay > 0, "%s\n", "WriteGamma timeout");
257
258 SC_W2BYTEMSK(pPNLInstancePrivate->u32DeviceID, REG_SC_BK10_6C_L, u16Addr, 0x3FF); // set address port
259 SC_W2BYTEMSK(pPNLInstancePrivate->u32DeviceID, (REG_SC_BK10_6E_L + u8Channel *2), u16GammaValue, 0xFFF); // Set channel data
260
261 // kick off write
262 switch(u8Channel)
263 {
264 case 0: // Red
265 SC_W2BYTEMSK(pPNLInstancePrivate->u32DeviceID, REG_SC_BK10_6D_L, BIT(5), BIT(5));
266 break;
267
268 case 1: // Green
269 SC_W2BYTEMSK(pPNLInstancePrivate->u32DeviceID, REG_SC_BK10_6D_L, BIT(6), BIT(6));
270 break;
271
272 case 2: // Blue
273 SC_W2BYTEMSK(pPNLInstancePrivate->u32DeviceID, REG_SC_BK10_6D_L, BIT(7), BIT(7));
274 break;
275 }
276
277 while (SC_R2BYTEMSK(pPNLInstancePrivate->u32DeviceID, REG_SC_BK10_6D_L, 0xE0) && (u16Delay > 0)) // Check whether the Write chanel is ready
278 {
279 u16Delay--;
280 }
281 }
282 else
283 {
284 SC_W2BYTEMSK(pPNLInstancePrivate->u32DeviceID, REG_SC_BK10_6E_L, u16GammaValue, 0xFFF);
285 }
286
287
288 PNL_ASSERT(u16Delay > 0, "%s\n", "WriteGamma timeout");
289
290 }
291
292
hal_PNL_SetMaxGammaValue(void * pInstance,MS_U8 u8Channel,MS_U16 u16MaxGammaValue)293 void hal_PNL_SetMaxGammaValue( void *pInstance, MS_U8 u8Channel, MS_U16 u16MaxGammaValue)
294 {
295 PNL_INSTANCE_PRIVATE *pPNLInstancePrivate = NULL;
296 UtopiaInstanceGetPrivate(pInstance, (void**)&pPNLInstancePrivate);
297
298 PNL_DBG(PNL_DBGLEVEL_GAMMA, "Max gamma of %d is 0x%x\n", u8Channel, u16MaxGammaValue);
299
300 SC_W2BYTEMSK(pPNLInstancePrivate->u32DeviceID, (REG_SC_BK10_7A_L + 4 * u8Channel), u16MaxGammaValue, 0xFFF); // max. base 0
301 SC_W2BYTEMSK(pPNLInstancePrivate->u32DeviceID, (REG_SC_BK10_7B_L + 4 * u8Channel), u16MaxGammaValue, 0xFFF); // max. base 1
302 }
303
304
305 /////////////////////////////////////////////////////////////////////////////
306 // Gamma format (12 bit LUT)
307 // 0, 1, 2, 3, ..., NumOfLevel, totally N Sets of tNormalGammaR/G/B[],
308 // 1 set uses 2 bytes of memory.
309 //
310 // [T2 and before ] N = 256
311 // [T3] N = 256 or 1024
312 // ______________________________________________________________________________
313 // Byte | 0 1 2 n-1 n
314 // [G1|G0] [G0] [G1] . ...... . [Gmax] [Gmax]
315 // 3:0 3:0 11:4 11:4 3:0 11:4
316 //
317
Hal_PNL_Set12BitGammaPerChannel(void * pInstance,MS_U8 u8Channel,MS_U8 * u8Tab,DRVPNL_GAMMA_MAPPEING_MODE GammaMapMode)318 void Hal_PNL_Set12BitGammaPerChannel( void *pInstance, MS_U8 u8Channel, MS_U8 * u8Tab, DRVPNL_GAMMA_MAPPEING_MODE GammaMapMode )
319 {
320 MS_U16 u16Addr = 0;
321 MS_U16 u16CodeTableIndex = u16Addr/2*3;
322 MS_U16 u16GammaValue = 0;
323 MS_U16 u16MaxGammaValue = 0;
324 MS_U16 u16NumOfLevel = GammaMapMode == E_DRVPNL_GAMMA_8BIT_MAPPING ? 256 : 1024;
325 MS_BOOL bUsingBurstWrite = !Hal_VOP_Is_GammaSupportSignalWrite(pInstance, GammaMapMode);
326 PNL_INSTANCE_PRIVATE *pPNLInstancePrivate = NULL;
327 UtopiaInstanceGetPrivate(pInstance, (void**)&pPNLInstancePrivate);
328
329 // Go to burst write if not support
330 if ( bUsingBurstWrite )
331 {
332 // 1. initial burst write address, LUT_ADDR[7:0]
333 SC_W2BYTEMSK(pPNLInstancePrivate->u32DeviceID,REG_SC_BK10_6C_L, 0x00 , 0x3FF);
334
335 // 2. select burst write channel, REG_LUT_BW_CH_SEL[1:0]
336 switch(u8Channel)
337 {
338 case 0: // Red
339 SC_W2BYTEMSK(pPNLInstancePrivate->u32DeviceID,REG_SC_BK10_6D_L, 0x00 , BIT(3) | BIT(2) );
340 break;
341
342 case 1: // Green
343 SC_W2BYTEMSK(pPNLInstancePrivate->u32DeviceID,REG_SC_BK10_6D_L, BIT(2) , BIT(3) | BIT(2) );
344 break;
345
346 case 2: // Blue
347 SC_W2BYTEMSK(pPNLInstancePrivate->u32DeviceID,REG_SC_BK10_6D_L, BIT(3) , BIT(3) | BIT(2) );
348 break;
349 }
350
351 // 3. enable burst write mode, REG_LUT_BW_MAIN_EN
352 SC_W2BYTEMSK(pPNLInstancePrivate->u32DeviceID,REG_SC_BK10_6D_L, BIT(0) , BIT(0)); // Burst write enable
353
354 }
355
356 //printf("\33[0;31m Gamma Mapping mode %d \n \33[m",GammaMapMode );
357 // write gamma table per one channel
358 for(; u16Addr < u16NumOfLevel; u16CodeTableIndex += 3)
359 {
360 // gamma x
361 u16GammaValue = u8Tab[u16CodeTableIndex] & 0x0F;
362 u16GammaValue |= u8Tab[u16CodeTableIndex+1] << 4;
363
364 PNL_DBG(PNL_DBGLEVEL_GAMMA,"Gamma x: SrcGTbl[%d] = 0x%x, [%d] = 0x%x, Gamma = 0x%x, GammaLvl=%d\n",
365 u16CodeTableIndex, u8Tab[u16CodeTableIndex], u16CodeTableIndex+1, u8Tab[u16CodeTableIndex+1], u16GammaValue, u16NumOfLevel);
366
367 if(u16MaxGammaValue < u16GammaValue)
368 {
369 u16MaxGammaValue = u16GammaValue;
370 }
371
372 // write gamma value
373 hal_PNL_WriteGamma12Bit(pInstance, u8Channel,bUsingBurstWrite, u16Addr, u16GammaValue);
374 u16Addr++;
375
376 // gamma x+1
377 u16GammaValue = (u8Tab[u16CodeTableIndex] & 0xF0) >> 4;
378 u16GammaValue |= u8Tab[u16CodeTableIndex+2] << 4;
379
380 PNL_DBG(PNL_DBGLEVEL_GAMMA, "Gamma x+1: SrcGTbl[%d] = 0x%x, [%d] = 0x%x, Gamma = 0x%x\n", u16CodeTableIndex, u8Tab[u16CodeTableIndex], u16CodeTableIndex+2, u8Tab[u16CodeTableIndex+2], u16GammaValue);
381
382 if(u16MaxGammaValue < u16GammaValue)
383 {
384 u16MaxGammaValue = u16GammaValue;
385 }
386
387 // write gamma value
388 hal_PNL_WriteGamma12Bit(pInstance, u8Channel,bUsingBurstWrite, u16Addr, u16GammaValue);
389 u16Addr++;
390 }
391
392 if ( bUsingBurstWrite )
393 {
394 // 5. after finish burst write data of one channel, disable burst write mode
395 SC_W2BYTEMSK(pPNLInstancePrivate->u32DeviceID,REG_SC_BK10_6D_L, 0x00 , BIT(0));
396 }
397
398 hal_PNL_SetMaxGammaValue(pInstance, u8Channel, u16MaxGammaValue);
399 }
400
401
MHal_PNL_Init_LPLL(void * pInstance,PNL_TYPE eLPLL_Type,PNL_MODE eLPLL_Mode,MS_U64 ldHz)402 void MHal_PNL_Init_LPLL(void *pInstance, PNL_TYPE eLPLL_Type,PNL_MODE eLPLL_Mode,MS_U64 ldHz)
403 {
404 #if 0
405 W2BYTE(L_BK_LPLL(0x42),0x1000); // {H_BK_MOD(0x42), 0x10}, //PDP must set to 1
406
407 W2BYTE(L_BK_LPLL(0x00), ((PANEL_LPLL_INPUT_DIV_2nd<<8) | PANEL_LPLL_INPUT_DIV_1st));
408 W2BYTE(L_BK_LPLL(0x01), ((PANEL_LPLL_LOOP_DIV_2nd<<8) | PANEL_LPLL_LOOP_DIV_1st));
409 W2BYTE(L_BK_LPLL(0x02), ((PANEL_LPLL_OUTPUT_DIV_2nd<<8) | PANEL_LPLL_OUTPUT_DIV_1st));
410
411 if (eLPLL_Type == E_PNL_TYPE_DAC_I ||
412 eLPLL_Type == E_PNL_TYPE_DAC_P)
413 {
414 W2BYTE(L_BK_LPLL(0x03), DAC_LPLL_ICTRL);//DAC output: better value(ICTRL) for stable LPLL
415 }
416 else
417 {
418 W2BYTE(L_BK_LPLL(0x03), LVDS_LPLL_ICTRL);
419 }
420
421 W2BYTEMSK(L_BK_LPLL(0x03), 0, BIT(6));
422
423 W2BYTEMSK(L_BK_LPLL(0x03), (eLPLL_Mode << 7) , BIT(7));
424 #endif
425
426 }
427
MHal_PNL_Get_Loop_DIV(void * pInstance,MS_U8 u8LPLL_Mode,MS_U8 eLPLL_Type,MS_U64 ldHz)428 MS_U8 MHal_PNL_Get_Loop_DIV( void *pInstance, MS_U8 u8LPLL_Mode, MS_U8 eLPLL_Type, MS_U64 ldHz)
429 {
430 UNUSED(u8LPLL_Mode);
431 UNUSED(eLPLL_Type);
432
433 return (u8LPLL_Mode == 0 ? 14 : 7);
434 }
435
MHal_PNL_Get_LPLL_LoopGain(void * pInstance,MS_U8 eLPLL_Mode,MS_U8 eLPLL_Type,MS_U64 ldHz)436 MS_U16 MHal_PNL_Get_LPLL_LoopGain(void *pInstance, MS_U8 eLPLL_Mode, MS_U8 eLPLL_Type, MS_U64 ldHz)
437 {
438 MS_U16 u16loopgain = 0;
439
440 switch(eLPLL_Type)
441 {
442 case E_PNL_TYPE_MINILVDS:
443 case E_PNL_TYPE_ANALOG_MINILVDS:
444 case E_PNL_TYPE_DIGITAL_MINILVDS:
445 u16loopgain = 2;
446 break;
447
448 case E_PNL_TYPE_TTL:
449 case E_PNL_TYPE_LVDS:
450 case E_PNL_TYPE_RSDS:
451 case E_PNL_TYPE_PDPLVDS:
452 default:
453 u16loopgain = LPLL_LOOPGAIN;
454 break;
455 }
456
457 return u16loopgain;
458 }
459
460 #define SKIP_TIMING_CHANGE_CAP TRUE
Hal_PNL_SkipTimingChange_GetCaps(void * pInstance)461 MS_BOOL Hal_PNL_SkipTimingChange_GetCaps(void *pInstance)
462 {
463 #if (SKIP_TIMING_CHANGE_CAP)
464 return TRUE;
465 #else
466 return FALSE;
467 #endif
468 }
469
MHal_PNL_PreSetModeOn(void * pInstance,MS_BOOL bSetMode)470 void MHal_PNL_PreSetModeOn(void *pInstance, MS_BOOL bSetMode)
471 {
472 UNUSED(bSetMode);
473 }
474
MHal_PNL_HWLVDSReservedtoLRFlag(void * pInstance,PNL_DrvHW_LVDSResInfo lvdsresinfo)475 void MHal_PNL_HWLVDSReservedtoLRFlag(void *pInstance, PNL_DrvHW_LVDSResInfo lvdsresinfo)
476 {
477 UNUSED(lvdsresinfo);
478 }
479
480 ////////////////////////////////////////////////////////////////////////
481 // Turn OD function
482 ////////////////////////////////////////////////////////////////////////
MHal_PNL_OverDriver_Init(void * pInstance,MS_PHY u32OD_MSB_Addr,MS_PHY u32OD_MSB_limit,MS_PHY u32OD_LSB_Addr,MS_PHY u32OD_LSB_limit,MS_U8 u8MIUSel)483 void MHal_PNL_OverDriver_Init(void *pInstance, MS_PHY u32OD_MSB_Addr, MS_PHY u32OD_MSB_limit, MS_PHY u32OD_LSB_Addr, MS_PHY u32OD_LSB_limit, MS_U8 u8MIUSel)
484 {
485 PNL_INSTANCE_PRIVATE *pPNLInstancePrivate = NULL;
486 UtopiaInstanceGetPrivate(pInstance, (void**)&pPNLInstancePrivate);
487
488 SC_W2BYTE(pPNLInstancePrivate->u32DeviceID, REG_SC_BK16_15_L, (MS_U16)(u32OD_MSB_Addr & 0xFFFF)); // OD MSB request base address
489 SC_W2BYTEMSK(pPNLInstancePrivate->u32DeviceID, REG_SC_BK16_16_L, (MS_U16)((u32OD_MSB_Addr >> 16) & 0x00FF), 0x00FF); // OD MSB request base address
490 SC_W2BYTE(pPNLInstancePrivate->u32DeviceID, REG_SC_BK16_17_L, (MS_U16)(u32OD_MSB_limit & 0xFFFF)); // OD MSB request address limit
491 SC_W2BYTEMSK(pPNLInstancePrivate->u32DeviceID, REG_SC_BK16_18_L, (MS_U16)((u32OD_MSB_limit >> 16) & 0x00FF), 0x00FF); // OD MSB request address limit
492 SC_W2BYTE(pPNLInstancePrivate->u32DeviceID, REG_SC_BK16_39_L, (MS_U16)(u32OD_LSB_limit & 0xFFFF)); // OD frame buffer write address limit
493 SC_W2BYTEMSK(pPNLInstancePrivate->u32DeviceID, REG_SC_BK16_3A_L, (MS_U16)((u32OD_LSB_limit >> 16) & 0x00FF), 0x00FF); // OD frame buffer write address limit
494 SC_W2BYTE(pPNLInstancePrivate->u32DeviceID, REG_SC_BK16_3B_L, (MS_U16)(u32OD_LSB_limit & 0xFFFF)); // OD frame buffer read address limit
495 SC_W2BYTEMSK(pPNLInstancePrivate->u32DeviceID, REG_SC_BK16_3C_L, (MS_U16)((u32OD_LSB_limit >> 16) & 0x00FF), 0x00FF); // OD frame buffer read address limit
496 SC_W2BYTE(pPNLInstancePrivate->u32DeviceID, REG_SC_BK16_4F_L, (MS_U16)(u32OD_LSB_Addr & 0xFFFF)); // OD LSB request base address
497 SC_W2BYTEMSK(pPNLInstancePrivate->u32DeviceID, REG_SC_BK16_50_L, (MS_U16)((u32OD_LSB_Addr >> 16) & 0x00FF), 0x00FF); // OD LSB request base address
498 SC_W2BYTEMSK(pPNLInstancePrivate->u32DeviceID, REG_SC_BK16_50_L, (MS_U16)((u32OD_LSB_limit & 0x00FF) << 8), 0xFF00); // OD LSB request limit address
499 SC_W2BYTE(pPNLInstancePrivate->u32DeviceID, REG_SC_BK16_51_L, (MS_U16)((u32OD_LSB_limit >> 8) & 0xFFFF)); // OD LSB request limit address
500
501 SC_W2BYTE(pPNLInstancePrivate->u32DeviceID, REG_SC_BK16_1A_L, 0x4020); // OD request rFIFO limit threshold, priority threshold
502 SC_W2BYTE(pPNLInstancePrivate->u32DeviceID, REG_SC_BK16_1C_L, 0x4020); // OD request wFIFO limit threshold, priority threshold
503 }
504
MHal_PNL_OverDriver_Enable(void * pInstance,MS_BOOL bEnable)505 void MHal_PNL_OverDriver_Enable(void *pInstance, MS_BOOL bEnable)
506 {
507 PNL_INSTANCE_PRIVATE *pPNLInstancePrivate = NULL;
508 UtopiaInstanceGetPrivate(pInstance, (void**)&pPNLInstancePrivate);
509
510 // OD mode
511 // OD used user weight to output blending directly
512 // OD Enable
513 if (bEnable)
514 {
515 SC_W2BYTEMSK(pPNLInstancePrivate->u32DeviceID, REG_SC_BK16_10_L, 0x2D, 0x2F);
516 }
517 else
518 {
519 SC_W2BYTEMSK(pPNLInstancePrivate->u32DeviceID, REG_SC_BK16_10_L, 0x2C, 0x2F);
520 }
521 }
522
MHal_PNL_OverDriver_TBL(void * pInstance,MS_U8 u8ODTbl[1056])523 void MHal_PNL_OverDriver_TBL(void *pInstance, MS_U8 u8ODTbl[1056])
524 {
525 PNL_INSTANCE_PRIVATE *pPNLInstancePrivate = NULL;
526 UtopiaInstanceGetPrivate(pInstance, (void**)&pPNLInstancePrivate);
527
528 MS_U16 i;
529 MS_U8 u8target;
530 MS_BOOL bEnable;
531
532 bEnable = SC_R2BYTEMSK(pPNLInstancePrivate->u32DeviceID, REG_SC_BK16_10_L, BIT(0));
533 SC_W2BYTEMSK(pPNLInstancePrivate->u32DeviceID, REG_SC_BK16_10_L, 0x00, BIT(0)); // OD enable
534 SC_W2BYTEMSK(pPNLInstancePrivate->u32DeviceID, REG_SC_BK16_01_L, 0x0E, 0x0E); // OD table SRAM enable, RGB channel
535
536 u8target= u8ODTbl[9];
537 for (i=0; i<272; i++)
538 {
539 SC_W2BYTEMSK(pPNLInstancePrivate->u32DeviceID, REG_SC_BK16_03_L, (i == 9)?u8target:(u8target ^ u8ODTbl[i]), 0x00FF);
540 SC_W2BYTEMSK(pPNLInstancePrivate->u32DeviceID, REG_SC_BK16_02_L, (i|0x8000), 0x81FF);
541 while(SC_R2BYTEMSK(pPNLInstancePrivate->u32DeviceID, REG_SC_BK16_02_L, BIT(15)));
542 }
543
544 u8target= u8ODTbl[(272+19)];
545 for (i=0; i<272; i++)
546 {
547 SC_W2BYTEMSK(pPNLInstancePrivate->u32DeviceID, REG_SC_BK16_06_L, (i == 19)?u8target:(u8target ^ u8ODTbl[(272+i)]), 0x00FF);
548 SC_W2BYTEMSK(pPNLInstancePrivate->u32DeviceID, REG_SC_BK16_05_L, (i|0x8000), 0x81FF);
549 while(SC_R2BYTEMSK(pPNLInstancePrivate->u32DeviceID, REG_SC_BK16_05_L, BIT(15)));
550 }
551
552 u8target= u8ODTbl[(272*2+29)];
553 for (i=0; i<256; i++)
554 {
555 SC_W2BYTEMSK(pPNLInstancePrivate->u32DeviceID, REG_SC_BK16_09_L, (i == 29)?u8target:(u8target ^ u8ODTbl[(272*2+i)]), 0x00FF);
556 SC_W2BYTEMSK(pPNLInstancePrivate->u32DeviceID, REG_SC_BK16_08_L, (i|0x8000), 0x81FF);
557 while(SC_R2BYTEMSK(pPNLInstancePrivate->u32DeviceID, REG_SC_BK16_08_L, BIT(15)));
558 }
559
560 u8target= u8ODTbl[(272*2+256+39)];
561 for (i=0; i<256; i++)
562 {
563 SC_W2BYTEMSK(pPNLInstancePrivate->u32DeviceID, REG_SC_BK16_0C_L, (i == 39)?u8target:(u8target ^ u8ODTbl[(272*2+256+i)]), 0x00FF);
564 SC_W2BYTEMSK(pPNLInstancePrivate->u32DeviceID, REG_SC_BK16_0B_L, (i|0x8000), 0x81FF);
565 while(SC_R2BYTEMSK(pPNLInstancePrivate->u32DeviceID, REG_SC_BK16_0D_L, BIT(15)));
566 }
567
568 SC_W2BYTEMSK(pPNLInstancePrivate->u32DeviceID, REG_SC_BK16_01_L, 0x00, 0x0E); // OD table SRAM enable, RGB channel
569 SC_W2BYTEMSK(pPNLInstancePrivate->u32DeviceID, REG_SC_BK16_10_L, bEnable, BIT(0)); // OD enable
570 }
571
MHal_PNL_MOD_Control_Out_Swing(void * pInstance,MS_U16 u16Swing_Level)572 MS_BOOL MHal_PNL_MOD_Control_Out_Swing(void *pInstance, MS_U16 u16Swing_Level)
573 {
574 // 2X mode
575 MOD_W2BYTE(REG_MOD_BK00_2B_L, u16Swing_Level); //Bank R output swing level
576 MOD_W2BYTE(REG_MOD_BK00_2C_L, u16Swing_Level); //Bank L output swing level
577
578 return TRUE;
579 }
580
MHal_PNL_PreInit(void * pInstance,PNL_OUTPUT_MODE eParam)581 void MHal_PNL_PreInit(void *pInstance, PNL_OUTPUT_MODE eParam)
582 {
583 PNL_INSTANCE_PRIVATE *pPNLInstancePrivate = NULL;
584 PNL_RESOURCE_PRIVATE* pPNLResourcePrivate = NULL;
585 UtopiaInstanceGetPrivate(pInstance, (void**)&pPNLInstancePrivate);
586 UtopiaResourceGetPrivate(g_pPNLResource[PNL_GET_INTERNAL_POOL_ID(pPNLInstancePrivate->u32DeviceID)],(void**)(&pPNLResourcePrivate));
587 pPNLResourcePrivate->sthalPNL._eDrvPnlInitOptions = eParam;
588 }
589
MHal_PNL_Get_Output_MODE(void * pInstance)590 PNL_OUTPUT_MODE MHal_PNL_Get_Output_MODE(void *pInstance)
591 {
592 PNL_INSTANCE_PRIVATE *pPNLInstancePrivate = NULL;
593 PNL_RESOURCE_PRIVATE* pPNLResourcePrivate = NULL;
594 UtopiaInstanceGetPrivate(pInstance, (void**)&pPNLInstancePrivate);
595 UtopiaResourceGetPrivate(g_pPNLResource[PNL_GET_INTERNAL_POOL_ID(pPNLInstancePrivate->u32DeviceID)],(void**)(&pPNLResourcePrivate));
596 PNL_OUTPUT_MODE eParam = pPNLResourcePrivate->sthalPNL._eDrvPnlInitOptions;
597
598 return eParam;
599 }
600
MHal_PNL_SetOutputType(void * pInstance,PNL_OUTPUT_MODE eOutputMode,PNL_TYPE eLPLL_Type)601 void MHal_PNL_SetOutputType(void *pInstance, PNL_OUTPUT_MODE eOutputMode, PNL_TYPE eLPLL_Type)
602 {
603 PNL_INSTANCE_PRIVATE *pPNLInstancePrivate = NULL;
604 PNL_RESOURCE_PRIVATE* pPNLResourcePrivate = NULL;
605 UtopiaInstanceGetPrivate(pInstance, (void**)&pPNLInstancePrivate);
606 UtopiaResourceGetPrivate(g_pPNLResource[PNL_GET_INTERNAL_POOL_ID(pPNLInstancePrivate->u32DeviceID)],(void**)(&pPNLResourcePrivate));
607 if( eLPLL_Type == E_PNL_TYPE_TTL)
608 {
609 // select pair output to be TTL
610 MOD_W2BYTE(REG_MOD_BK00_6D_L, 0x0000);
611 MOD_W2BYTE(REG_MOD_BK00_6E_L, 0x0000);
612 MOD_W2BYTEMSK(REG_MOD_BK00_6F_L, 0x0000, 0xEFFF);//0x6F
613
614 MOD_W2BYTEMSK(REG_MOD_BK00_42_L, 0x0000, (BIT(7) | BIT(6))); // shift_lvds_pair
615
616 // other TTL setting
617 MOD_W2BYTE(REG_MOD_BK00_45_L, 0x0000); // TTL output enable
618
619 MOD_W2BYTE(REG_MOD_BK00_46_L, 0x0000);
620 MOD_W2BYTE(REG_MOD_BK00_47_L, 0x0000);
621 MOD_W2BYTEMSK(REG_MOD_BK00_7E_L, 0x0000, 0xE000);
622
623 MOD_W2BYTEMSK(REG_MOD_BK00_44_L, 0x3FF, 0x3FF); // TTL skew
624
625 // GPO gating
626 MOD_W2BYTEMSK(REG_MOD_BK00_4A_L, BIT(8), BIT(8)); // GPO gating
627 }
628 else
629 {
630 switch(eOutputMode)
631 {
632 case E_PNL_OUTPUT_NO_OUTPUT:
633 // if MOD_45[5:0] = 0x3F && XC_MOD_EXT_DATA_EN_L = 0x0,
634 // then if XC_MOD_OUTPUT_CONF_L = 0x0 ---> output TTL as tri-state
635 MOD_W2BYTE(REG_MOD_BK00_6D_L, 0x0000);
636 MOD_W2BYTE(REG_MOD_BK00_6E_L, 0x0000);
637 MOD_W2BYTEMSK(REG_MOD_BK00_6F_L, 0x0000, 0x000F);
638
639 MOD_W2BYTEMSK(REG_MOD_BK00_46_L, 0xF000, 0xF000);
640 MOD_W2BYTE(REG_MOD_BK00_47_L, 0xFFFF);
641 MOD_W2BYTEMSK(REG_MOD_BK00_7E_L, 0x0000, 0x000F);
642
643
644 MOD_W2BYTEMSK(REG_MOD_BK00_4D_L, 0xF000, 0xF000);
645 MOD_W2BYTE(REG_MOD_BK00_4E_L, 0xFFFF);
646 MOD_W2BYTEMSK(REG_MOD_BK00_4F_L, 0xF000, 0xF000);
647 MOD_W2BYTE(REG_MOD_BK00_50_L, 0x0000);
648 MOD_W2BYTEMSK(REG_MOD_BK00_51_L, 0x0000, 0xF000);
649 MOD_W2BYTE(REG_MOD_BK00_52_L, 0x0000);
650
651 break;
652
653 case E_PNL_OUTPUT_CLK_ONLY:
654
655 break;
656
657 case E_PNL_OUTPUT_DATA_ONLY:
658 case E_PNL_OUTPUT_CLK_DATA:
659 default:
660
661 MOD_W2BYTEMSK(REG_MOD_BK00_4D_L, 0x0000, 0xF000);
662 MOD_W2BYTE(REG_MOD_BK00_4E_L, 0x0000);
663
664 MHal_Output_LVDS_Pair_Setting(pInstance, pPNLResourcePrivate->sthalPNL._u8MOD_LVDS_Pair_Type
665 , pPNLResourcePrivate->stdrvPNL._stPnlInitData.u16OutputCFG0_7
666 , pPNLResourcePrivate->stdrvPNL._stPnlInitData.u16OutputCFG8_15
667 , pPNLResourcePrivate->stdrvPNL._stPnlInitData.u16OutputCFG16_21);
668 MHal_Shift_LVDS_Pair(pInstance, pPNLResourcePrivate->sthalPNL._u8MOD_LVDS_Pair_Shift);
669
670 // other TTL setting
671 MOD_W2BYTE(REG_MOD_BK00_45_L, 0x003F); // LVDS output enable, [5:4] Output enable: PANEL_LVDS/ PANEL_miniLVDS/ PANEL_RSDS
672
673 MOD_W2BYTEMSK(REG_MOD_BK00_46_L, 0x0000, 0xF000);
674 MOD_W2BYTE(REG_MOD_BK00_47_L, 0x0000);
675 MOD_W2BYTEMSK(REG_MOD_BK00_7E_L, 0x0000, 0x000F);
676
677 MOD_W2BYTEMSK(REG_MOD_BK00_44_L, 0x000, 0x3FF); // TTL skew
678
679 // GPO gating
680 MOD_W2BYTEMSK(REG_MOD_BK00_4A_L, 0x0, BIT(8)); // GPO gating
681 break;
682 }
683 }
684 }
685
Mhal_PNL_Flock_LPLLSet(void * pInstance,MS_U64 ldHz)686 void Mhal_PNL_Flock_LPLLSet(void *pInstance, MS_U64 ldHz)
687 {
688 UNUSED(ldHz);
689 }
690
MHal_PNL_MISC_Control(void * pInstance,MS_U32 u32PNL_MISC)691 void MHal_PNL_MISC_Control(void *pInstance, MS_U32 u32PNL_MISC)
692 {
693 if(u32PNL_MISC & E_DRVPNL_MISC_MFC_ENABLE)
694 {
695 MOD_W2BYTEMSK(REG_MOD_BK00_42_L, BIT(7), BIT(7)); // shift LVDS pair
696 }
697 }
698
MHal_PNL_Init_XC_Clk(void * pInstance,PNL_InitData * pstPanelInitData)699 void MHal_PNL_Init_XC_Clk(void *pInstance, PNL_InitData *pstPanelInitData)
700 {
701 PNL_INSTANCE_PRIVATE *pPNLInstancePrivate = NULL;
702 UtopiaInstanceGetPrivate(pInstance, (void**)&pPNLInstancePrivate);
703
704 UNUSED(pstPanelInitData);
705
706 if(pPNLInstancePrivate->u32DeviceID == 0) // SC0
707 {
708 // setup output dot clock
709 //W2BYTEMSK(REG_CKG_ODCLK, CKG_ODCLK_CLK_LPLL, CKG_ODCLK_MASK); // will set by DAC table
710 W2BYTEMSK(REG_CKG_ODCLK, DISABLE, CKG_ODCLK_INVERT); // clock not invert
711 W2BYTEMSK(REG_CKG_ODCLK, DISABLE, CKG_ODCLK_GATED); // enable clock
712 }
713 else if(pPNLInstancePrivate->u32DeviceID == 1) // SC1
714 {
715 // setup output dot clock
716 W2BYTEMSK(REG_CKG_SC1_ODCLK, CKG_SC1_ODCLK_13M, CKG_SC1_ODCLK_MASK); // select 13.5M
717 W2BYTEMSK(REG_CKG_SC1_ODCLK, DISABLE, CKG_SC1_ODCLK_INVERT); // clock not invert
718 W2BYTEMSK(REG_CKG_SC1_ODCLK, DISABLE, CKG_SC1_ODCLK_GATED); // enable clock
719 }
720 else
721 {
722 PNL_DBG(PNL_DBGLEVEL_INIT, "Invalid device ID %tu !\n", (ptrdiff_t)pPNLInstancePrivate->u32DeviceID);
723 }
724 }
725
MHal_PNL_Init_MOD(void * pInstance,PNL_InitData * pstPanelInitData)726 void MHal_PNL_Init_MOD(void *pInstance, PNL_InitData *pstPanelInitData)
727 {
728 PNL_INSTANCE_PRIVATE *pPNLInstancePrivate = NULL;
729 PNL_RESOURCE_PRIVATE* pPNLResourcePrivate = NULL;
730 UtopiaInstanceGetPrivate(pInstance, (void**)&pPNLInstancePrivate);
731 UtopiaResourceGetPrivate(g_pPNLResource[PNL_GET_INTERNAL_POOL_ID(pPNLInstancePrivate->u32DeviceID)],(void**)(&pPNLResourcePrivate));
732
733 //-------------------------------------------------------------------------
734 // Set MOD registers
735 //-------------------------------------------------------------------------
736
737 MOD_W2BYTEMSK(REG_MOD_BK00_40_L, pstPanelInitData->u16MOD_CTRL0, LBMASK);
738
739 // GPIO is controlled in drvPadConf.c
740 // MDrv_Write2Byte(L_BK_MOD(0x46), 0x0000); //EXT GPO disable
741 // MDrv_Write2Byte(L_BK_MOD(0x47), 0x0000); //EXT GPO disable
742 MOD_W2BYTE(REG_MOD_BK00_49_L, pstPanelInitData->u16MOD_CTRL9); //{L_BK_MOD(0x49), 0x00}, // [7,6] : output formate selction 10: 8bit, 01: 6bit :other 10bit, bit shift
743 MOD_W2BYTE(REG_MOD_BK00_4A_L, pstPanelInitData->u16MOD_CTRLA);
744 MOD_W2BYTE(REG_MOD_BK00_4B_L, pstPanelInitData->u8MOD_CTRLB); //[1:0]ti_bitmode 10:8bit 11:6bit 0x:10bit
745
746 if ( SUPPORT_SYNC_FOR_DUAL_MODE )
747 {
748 // Set 1 only when PNL is dual mode
749 MOD_W2BYTEMSK(REG_MOD_BK00_44_L, (pstPanelInitData->eLPLL_Mode << 12) , BIT(12));
750 }
751
752 //dual port lvds _start_//
753 // output configure for 26 pair output 00: TTL, 01: LVDS/RSDS/mini-LVDS data differential pair, 10: mini-LVDS clock output, 11: RSDS clock output
754 MOD_W2BYTE(REG_MOD_BK00_6F_L, 0x0000); // output configure for 26 pair output 00: TTL, 01: LVDS/RSDS/mini-LVDS data differential pair, 10: mini-LVDS clock output, 11: RSDS clock output
755 MOD_W2BYTEMSK(REG_MOD_BK00_77_L, 0x0C, 0xFC); // original is MDrv_WriteByteMask(L_BK_MOD(0x77), 0x0F, BITMASK(7:2));
756 //dual port lvds _end_//
757
758 //MOD_W2BYTEMSK(REG_MOD_BK00_78_L, (_u8PnlDiffSwingLevel << 1), 0xFE); //differential output swing level
759 if(!MHal_PNL_MOD_Control_Out_Swing(pInstance, pPNLResourcePrivate->sthalPNL._u8PnlDiffSwingLevel))
760 printf(">>Swing Level setting error!!\n");
761 if(pstPanelInitData->eLPLL_Type != E_PNL_TYPE_MINILVDS)
762 {
763 MOD_W2BYTEMSK(REG_MOD_BK00_7D_L, 0x1F, LBMASK); //[6]disable power down bit and [5:0]enable all channel
764 }
765 MOD_W2BYTE(REG_MOD_BK00_73_L, pstPanelInitData->u16LVDSTxSwapValue);
766
767
768 // TODO: move from MDrv_Scaler_Init(), need to double check!
769 MOD_W2BYTEMSK(REG_MOD_BK00_53_L, BIT(0), BIT(0));
770
771
772 //--------------------------------------------------------------
773 //Depend On Bitmode to set Dither
774 //--------------------------------------------------------------
775
776
777 // always enable noise dither and disable TAILCUT
778 SC_W2BYTEMSK(pPNLInstancePrivate->u32DeviceID, REG_SC_BK24_3F_L, ((pstPanelInitData->u8PanelNoiseDith ? XC_PAFRC_DITH_NOISEDITH_EN : (1 - XC_PAFRC_DITH_NOISEDITH_EN)) <<3) , BIT(3));
779 SC_W2BYTEMSK(pPNLInstancePrivate->u32DeviceID, REG_SC_BK24_3F_L, XC_PAFRC_DITH_TAILCUT_DISABLE, BIT(4));
780
781 switch(pstPanelInitData->u8MOD_CTRLB & 0x03)//[1:0]ti_bitmode b'10:8bit 11:6bit 0x:10bit
782 {
783 case HAL_TI_6BIT_MODE:
784 SC_W2BYTEMSK(pPNLInstancePrivate->u32DeviceID, REG_SC_BK24_3F_L, BIT(0), BIT(0));
785 SC_W2BYTEMSK(pPNLInstancePrivate->u32DeviceID, REG_SC_BK24_3F_L, BIT(2), BIT(2));
786 break;
787
788 case HAL_TI_8BIT_MODE:
789 SC_W2BYTEMSK(pPNLInstancePrivate->u32DeviceID, REG_SC_BK24_3F_L, BIT(0), BIT(0));
790 SC_W2BYTEMSK(pPNLInstancePrivate->u32DeviceID, REG_SC_BK24_3F_L, 0x00, BIT(2));
791 break;
792
793 case HAL_TI_10BIT_MODE:
794 default:
795 SC_W2BYTEMSK(pPNLInstancePrivate->u32DeviceID, REG_SC_BK24_3F_L, 0x00, BIT(0));
796 SC_W2BYTEMSK(pPNLInstancePrivate->u32DeviceID, REG_SC_BK24_3F_L, 0x00, BIT(2));
797 break;
798 }
799
800
801 //-----depend on bitmode to set Dither------------------------------
802 MHal_PNL_SetOutputType(pInstance, pPNLResourcePrivate->sthalPNL._eDrvPnlInitOptions, pstPanelInitData->eLPLL_Type); // TTL to Ursa
803
804 MHal_PNL_MISC_Control(pInstance, pstPanelInitData->u32PNL_MISC);
805
806 }
807
MHal_PNL_DumpMODReg(void * pInstance,MS_U32 u32Addr,MS_U16 u16Value,MS_BOOL bHiByte,MS_U16 u16Mask)808 void MHal_PNL_DumpMODReg(void *pInstance, MS_U32 u32Addr, MS_U16 u16Value, MS_BOOL bHiByte, MS_U16 u16Mask)
809 {
810 if (bHiByte)
811 {
812 MOD_W2BYTEMSK(u32Addr, (u16Value << 8), (u16Mask << 8));
813 }
814 else
815 {
816 MOD_W2BYTEMSK(u32Addr, u16Value, u16Mask);
817 }
818 }
819
MHal_MOD_Calibration_Init(void * pInstance,PNL_ModCali_InitData * pstModCaliInitData)820 void MHal_MOD_Calibration_Init(void *pInstance, PNL_ModCali_InitData *pstModCaliInitData)
821 {
822 PNL_INSTANCE_PRIVATE *pPNLInstancePrivate = NULL;
823 PNL_RESOURCE_PRIVATE* pPNLResourcePrivate = NULL;
824 UtopiaInstanceGetPrivate(pInstance, (void**)&pPNLInstancePrivate);
825 UtopiaResourceGetPrivate(g_pPNLResource[PNL_GET_INTERNAL_POOL_ID(pPNLInstancePrivate->u32DeviceID)],(void**)(&pPNLResourcePrivate));
826 // Target setting
827 // =========
828 // GCR_CAL_LEVEL[1:0] : REG_MOD_BK00_7D_L =>
829 // =========
830 //in msModCurrentCalibration, it will transfer to the real data
831 switch(pstModCaliInitData->u8ModCaliTarget)
832 {
833 default:
834 case 0:
835 pPNLResourcePrivate->sthalPNL._u8MOD_CALI_TARGET = 0;
836 break;
837 case 1:
838 pPNLResourcePrivate->sthalPNL._u8MOD_CALI_TARGET = 1;
839 break;
840 case 2:
841 pPNLResourcePrivate->sthalPNL._u8MOD_CALI_TARGET = 2;
842 break;
843 case 3:
844 pPNLResourcePrivate->sthalPNL._u8MOD_CALI_TARGET = 3;
845 break;
846 }
847 // Offset setting, for fine tune
848 //_usMOD_CALI_OFFSET = pstModCaliInitData->s8ModCaliOffset;
849 }
850
MHal_BD_LVDS_Output_Type(void * pInstance,MS_U16 Type)851 void MHal_BD_LVDS_Output_Type(void *pInstance, MS_U16 Type)
852 {
853 PNL_INSTANCE_PRIVATE *pPNLInstancePrivate = NULL;
854 PNL_RESOURCE_PRIVATE* pPNLResourcePrivate = NULL;
855 UtopiaInstanceGetPrivate(pInstance, (void**)&pPNLInstancePrivate);
856 UtopiaResourceGetPrivate(g_pPNLResource[PNL_GET_INTERNAL_POOL_ID(pPNLInstancePrivate->u32DeviceID)],(void**)(&pPNLResourcePrivate));
857 if(Type == LVDS_DUAL_OUTPUT_SPECIAL )
858 {
859 pPNLResourcePrivate->sthalPNL._u8MOD_LVDS_Pair_Shift = LVDS_DUAL_OUTPUT_SPECIAL;
860 pPNLResourcePrivate->sthalPNL._u8MOD_LVDS_Pair_Type = 1;
861 }
862 else
863 {
864 pPNLResourcePrivate->sthalPNL._u8MOD_LVDS_Pair_Type = Type;
865 }
866 }
867
868
msModCalDDAOUT(void * pInstance)869 MS_BOOL msModCalDDAOUT(void *pInstance)
870 {
871 // W2BYTEMSK(BK_MOD(0x7D), ENABLE, 8:8);
872 // MsOS_DelayTask(10); //10ms
873 return (MS_BOOL)((MOD_R2BYTEMSK(REG_MOD_BK00_7D_L, BIT(8))) >> 8);
874 }
875
msModCurrentCalibration(void * pInstance)876 MS_U8 msModCurrentCalibration(void *pInstance)
877 {
878 return 0x60;
879 }
880
MHal_PNL_MOD_Calibration(void * pInstance)881 PNL_Result MHal_PNL_MOD_Calibration(void *pInstance)
882 {
883
884 MS_U8 u8BackUSBPwrStatus;
885
886 u8BackUSBPwrStatus = R2BYTEMSK(L_BK_UTMI1(0x04), BIT(7));
887
888 W2BYTEMSK(L_BK_UTMI1(0x04), 0x00, BIT(7));
889
890 msModCurrentCalibration(pInstance);
891
892 W2BYTEMSK(L_BK_UTMI1(0x04), u8BackUSBPwrStatus, BIT(7));
893
894
895 return E_PNL_OK;
896
897 }
898
MHal_PNL_PowerDownLPLL(MS_BOOL bEnable)899 static void MHal_PNL_PowerDownLPLL(MS_BOOL bEnable)
900 {
901 if(bEnable)
902 {
903 W2BYTEMSK(L_BK_LPLL(0x03), BIT(5), BIT(5));
904 }
905 else
906 {
907 W2BYTEMSK(L_BK_LPLL(0x03), FALSE, BIT(5));
908 }
909 }
910
MHal_PNL_En(void * pInstance,MS_BOOL bPanelOn,MS_BOOL bCalEn)911 PNL_Result MHal_PNL_En(void *pInstance, MS_BOOL bPanelOn, MS_BOOL bCalEn)
912 {
913 MS_U8 u8BackUSBPwrStatus;
914 PNL_INSTANCE_PRIVATE *pPNLInstancePrivate = NULL;
915 PNL_RESOURCE_PRIVATE* pPNLResourcePrivate = NULL;
916 UtopiaInstanceGetPrivate(pInstance, (void**)&pPNLInstancePrivate);
917 UtopiaResourceGetPrivate(g_pPNLResource[PNL_GET_INTERNAL_POOL_ID(pPNLInstancePrivate->u32DeviceID)],(void**)(&pPNLResourcePrivate));
918 if(bPanelOn)
919 {
920 // The order is PanelVCC -> delay pnlGetOnTiming1() -> VOP -> MOD
921 // VOP
922 SC_W2BYTEMSK(0, REG_SC_BK10_46_L, 0x4000, HBMASK);
923
924 // mod power on
925 MHal_MOD_PowerOn(pInstance, ENABLE
926 , pPNLResourcePrivate->stdrvPNL._stPnlInitData.eLPLL_Type
927 , pPNLResourcePrivate->sthalPNL._u8MOD_LVDS_Pair_Type
928 , pPNLResourcePrivate->stdrvPNL._stPnlInitData.u16OutputCFG0_7
929 , pPNLResourcePrivate->stdrvPNL._stPnlInitData.u16OutputCFG8_15
930 , pPNLResourcePrivate->stdrvPNL._stPnlInitData.u16OutputCFG16_21);
931
932 // turn on LPLL
933 MHal_PNL_PowerDownLPLL(FALSE);
934
935 #if ENABLE_MODE_PATCH
936 MOD_W2BYTE(REG_MOD_BK00_33_L, 0x0039);
937 MsOS_DelayTask(5);
938 MOD_W2BYTEMSK(REG_MOD_BK00_33_L, BIT(8), BIT(8));
939 MOD_W2BYTEMSK(REG_MOD_BK00_33_L, BIT(9), BIT(9));
940 #endif
941
942 if(bCalEn)
943 {
944
945 u8BackUSBPwrStatus = R2BYTEMSK(L_BK_UTMI1(0x04), BIT(7));
946
947 W2BYTEMSK(L_BK_UTMI1(0x04), 0x00, BIT(7));
948
949 msModCurrentCalibration(pInstance);
950
951 W2BYTEMSK(L_BK_UTMI1(0x04), u8BackUSBPwrStatus, BIT(7));
952
953 }
954 if(!MHal_PNL_MOD_Control_Out_Swing(pInstance, pPNLResourcePrivate->sthalPNL._u16PnlDefault_SwingLevel))
955 printf(">>Swing Level setting error!!\n");
956 }
957 else
958 {
959 // The order is LPLL -> MOD -> VOP -> delay for MOD power off -> turn off VCC
960
961 // LPLL
962 // MHal_PNL_PowerDownLPLL(TRUE); //Remove to keep op vsync if panel off
963
964 MHal_MOD_PowerOn(pInstance, DISABLE
965 , pPNLResourcePrivate->stdrvPNL._stPnlInitData.eLPLL_Type
966 , pPNLResourcePrivate->sthalPNL._u8MOD_LVDS_Pair_Type
967 , pPNLResourcePrivate->stdrvPNL._stPnlInitData.u16OutputCFG0_7
968 , pPNLResourcePrivate->stdrvPNL._stPnlInitData.u16OutputCFG8_15
969 , pPNLResourcePrivate->stdrvPNL._stPnlInitData.u16OutputCFG16_21);
970 // VOP
971 if(pPNLResourcePrivate->stdrvPNL._stPnlInitData.eLPLL_Type == E_PNL_TYPE_LVDS ||
972 pPNLResourcePrivate->stdrvPNL._stPnlInitData.eLPLL_Type == E_PNL_TYPE_DAC_I ||
973 pPNLResourcePrivate->stdrvPNL._stPnlInitData.eLPLL_Type == E_PNL_TYPE_DAC_P)//(bIsLVDS)
974 SC_W2BYTEMSK(pPNLInstancePrivate->u32DeviceID, REG_SC_BK10_46_L, 0xFF, LBMASK);
975 else
976 SC_W2BYTEMSK(pPNLInstancePrivate->u32DeviceID, REG_SC_BK10_46_L, 0x00, 0xFF);
977 }
978
979 return E_PNL_OK;
980 }
981
MHal_PNL_SetOutputPattern(void * pInstance,MS_BOOL bEnable,MS_U16 u16Red,MS_U16 u16Green,MS_U16 u16Blue)982 void MHal_PNL_SetOutputPattern(void *pInstance, MS_BOOL bEnable, MS_U16 u16Red , MS_U16 u16Green, MS_U16 u16Blue)
983 {
984 if (bEnable)
985 {
986 MOD_W2BYTEMSK(REG_MOD_BK00_02_L, u16Red , 0x03FF);
987 MOD_W2BYTEMSK(REG_MOD_BK00_03_L, u16Green , 0x03FF);
988 MOD_W2BYTEMSK(REG_MOD_BK00_04_L, u16Blue , 0x03FF);
989 MsOS_DelayTask(10);
990 MOD_W2BYTEMSK(REG_MOD_BK00_01_L, BIT(15) , BIT(15));
991 }
992 else
993 {
994 MOD_W2BYTEMSK(REG_MOD_BK00_01_L, DISABLE , BIT(15));
995 }
996
997 }
998
MHal_PNL_Switch_LPLL_SubBank(void * pInstance,MS_U16 u16Bank)999 void MHal_PNL_Switch_LPLL_SubBank(void *pInstance, MS_U16 u16Bank)
1000 {
1001 UNUSED(u16Bank);
1002 }
1003
1004
MHal_PNL_Switch_TCON_SubBank(void * pInstance,MS_U16 u16Bank)1005 void MHal_PNL_Switch_TCON_SubBank(void *pInstance, MS_U16 u16Bank)
1006 {
1007 UNUSED(u16Bank);
1008 }
1009
MHal_PNL_Read_TCON_SubBank(void * pInstance)1010 MS_U16 MHal_PNL_Read_TCON_SubBank(void *pInstance)
1011 {
1012 printf("TCON Unsupported");
1013 return 0x00;
1014 }
1015
MHal_PNL_IsYUVOutput(void * pInstance)1016 MS_BOOL MHal_PNL_IsYUVOutput(void *pInstance)
1017 {
1018 return TRUE;
1019 }
1020
MHal_PNL_SetOSDSSC(void * pInstance,MS_U16 u16Fmodulation,MS_U16 u16Rdeviation,MS_BOOL bEnable)1021 MS_BOOL MHal_PNL_SetOSDSSC(void *pInstance, MS_U16 u16Fmodulation, MS_U16 u16Rdeviation, MS_BOOL bEnable)
1022 {
1023 UNUSED(u16Fmodulation);
1024 UNUSED(u16Rdeviation);
1025 UNUSED(bEnable);
1026 return FALSE;
1027 }
1028
MHal_PNL_SetOSDSSC_En(void * pInstance,MS_BOOL bEnable)1029 void MHal_PNL_SetOSDSSC_En(void *pInstance, MS_BOOL bEnable)
1030 {
1031 UNUSED(bEnable);
1032 }
1033
MHal_PNL_GetOutputInterlaceTiming(void * pInstance)1034 MS_BOOL MHal_PNL_GetOutputInterlaceTiming(void *pInstance)
1035 {
1036 PNL_INSTANCE_PRIVATE *pPNLInstancePrivate = NULL;
1037 UtopiaInstanceGetPrivate(pInstance, (void**)&pPNLInstancePrivate);
1038
1039 if(pPNLInstancePrivate->u32DeviceID == 0) // SC0
1040 {
1041 return FALSE;
1042 }
1043 else if(pPNLInstancePrivate->u32DeviceID == 1) // SC1
1044 {
1045 return TRUE;
1046 }
1047 else
1048 {
1049 PNL_DBG(PNL_DBGLEVEL_PANEL_EN, "Invalid device ID %tu !\n", (ptrdiff_t)pPNLInstancePrivate->u32DeviceID);
1050 return FALSE;
1051 }
1052 }
1053
1054
MHal_PNL_Set_Device_Bank_Offset(void * pInstance)1055 void MHal_PNL_Set_Device_Bank_Offset(void *pInstance)
1056 {
1057 UNUSED(pInstance);
1058 memset(u32PNL_XCDeviceBankOffset, 0, sizeof(MS_U32)*E_PNL_DEVICE_ID_NUM);
1059 u32PNL_XCDeviceBankOffset[E_PNL_DEVICE_ID_0] = E_HALPNL_DEVICE0_XC_BANK_OFFSET; // Set SC0 reg bank offset
1060 u32PNL_XCDeviceBankOffset[E_PNL_DEVICE_ID_1] = E_HALPNL_DEVICE1_XC_BANK_OFFSET; // Set SC1 reg bank offset
1061 }
1062
MHal_PNL_Init(void * pInstance)1063 void MHal_PNL_Init(void *pInstance)
1064 {
1065 PNL_INSTANCE_PRIVATE *pPNLInstancePrivate = NULL;
1066 UtopiaInstanceGetPrivate(pInstance, (void**)&pPNLInstancePrivate);
1067
1068 // Set XC no-signal color
1069 SC_W2BYTEMSK(pPNLInstancePrivate->u32DeviceID, REG_SC_BK10_24_L, 0x0082, 0x00FF);
1070 }
1071
MHal_PNL_GetPanelVStart(void)1072 MS_U16 MHal_PNL_GetPanelVStart(void)
1073 {
1074 return 0;
1075 }
1076
1077 #endif
1078