xref: /utopia/UTPA2-700.0.x/modules/ve/hal/messi/ve/include/mhal_tvencoder.h (revision 53ee8cc121a030b8d368113ac3e966b4705770ef)
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93 ////////////////////////////////////////////////////////////////////////////////
94 #ifndef _MHALTVENCODER_H
95 #define _MHALTVENCODER_H
96 
97 #ifdef __cplusplus
98 extern "C"
99 {
100 #endif
101 
102 #include "MsCommon.h"
103 
104 //-------------------------------------------------------------------------------------------------
105 //  Macro and Define
106 //-------------------------------------------------------------------------------------------------
107 //Video Encoder Capability
108 #define VE_SUPPORTED            TRUE
109 #define ENABLE_VE_SUBTITLE      TRUE
110 //Feature for: ve support isr from TVS(VE Source), and HW will report current VE Write frame index
111 #define VE_TVS_ISR_SUPPORT      TRUE
112 #define VE_SUPPORT_SOURCE_SCALER_OP 0
113 
114 //Feature: predownscaling before TVS
115 #define VE_PRESCALE_SUPPORT     FALSE
116 
117 #define ENABLE_VE_FIELD_INV       1
118 
119 #define VE_DE_HEND_MASK 0x1FFF //0x3B13
120 #define VE_DE_VEND_MASK 0xFFF  //0x3B15
121 
122 #define VE_MIU_DATA_LENGTH      128
123 #define BYTE_PER_WORD           (VE_MIU_DATA_LENGTH/8)
124 
125 //VE customized table max size
126 #define VE_CUSTBL_MAX_SIZE 64 //4bytes * 16sets (include end of table)
127 
128 #define REG_CKG_VE_IN           0x1E38
129 #define CKG_VE_IN_GATED         BIT(0)
130 #define CKG_VE_IN_INVERT        BIT(1)
131 #define CKG_VE_IN_MASK          (BIT(5) | BIT(4) | BIT(3) | BIT(2))
132 #define CKG_VE_IN_CLK_ADC       (0 << 2)
133 #define CKG_VE_IN_CLK_DVI       (1 << 2)
134 #define CKG_VE_IN_CLK_VD        (2 << 2)
135 #define CKG_VE_IN_CLK_MPEG0     (3 << 2)
136 #define CKG_VE_IN_1             (4 << 2) //IDclk2 for IP_MAIN
137 #define CKG_VE_IN_CLK_EXT_DI    (5 << 2)
138 #define CKG_VE_IN_0             (6 << 2) //Sub MPEG0
139 #define CKG_VE_IN_0_            (7 << 2) //ODclk
140 #define CKG_VE_IN_DFT_LIVE      (8 << 2)
141 #define CKG_VE_IN_CLK_DI        (10 << 2)
142 
143 #define VE_NTSC_FRAME_SIZE  ((MS_U32)(720ul * 480ul)*16/VE_MIU_DATA_LENGTH) // 720*480*16bits/128bits
144 #define VE_PAL_FRAME_SIZE   ((MS_U32)(720ul * 576ul)*16/VE_MIU_DATA_LENGTH) // 720*576*16bits/128bits
145 
146  //VE out
147 #define VE_OUT_CVBS_YCC         0x00
148 #define VE_OUT_CVBS_YCbCr       0x01
149 #define VE_OUT_CVBS_RGB         0x02
150 #define VE_OUT_NONE             0xFF
151 
152 #define VE_V_SCALE_DOWN_RATIO(IN, OUT)  (((MS_U32)(OUT) * 2048ul / (MS_U32)(IN))+1)
153 #define VE_H_SCALE_DOWN_RATIO(IN, OUT)  ((MS_U32)(OUT) * 2048ul / (MS_U32)(IN))
154 #define VE_V_SCALE_UP_RATIO(IN, OUT)  ((MS_U32)(IN - 1) * 0x100000ul / (MS_U32)(OUT - 1))
155 #define VE_H_SCALE_UP_RATIO(IN, OUT)  ((MS_U32)(IN) * 0x100000ul/ (MS_U32)(OUT))
156 
157 #define VE_SOURCE_AFTER_DI
158 
159 typedef enum
160 {
161     EN_VE_DEMODE         = 0x01,
162     EN_VE_CCIR656_IN     = 0x02,
163     EN_VE_RGB_IN         = 0x04,
164     EN_VE_INVERSE_HSYNC  = 0x08,
165 }EN_VE_DISPLAY_STATUS;
166 
167 //MV Type
168 typedef enum
169 {
170     MS_VE_MV_NTSC_START = 0,
171     MS_VE_MV_NTSC_TYPE1 = MS_VE_MV_NTSC_START,
172     MS_VE_MV_NTSC_TYPE2,
173     MS_VE_MV_NTSC_TYPE3,
174     MS_VE_MV_NTSC_TEST_N01,
175     MS_VE_MV_NTSC_TEST_N02,
176     MS_VE_MV_NTSC_TYPE2_TTX,
177     MS_VE_MV_NTSC_TEST_N01_TTX,
178     MS_VE_MV_PAL_START = 0x10,
179     MS_VE_MV_PAL_TYPE1 = MS_VE_MV_PAL_START,
180     MS_VE_MV_PAL_TYPE2,
181     MS_VE_MV_PAL_TYPE3,
182     MS_VE_MV_PAL_TEST_P01,
183     MS_VE_MV_PAL_TEST_P02,
184     MS_VE_MV_PAL_TYPE2_TTX,
185     MS_VE_MV_PAL_TEST_P01_TTX,
186 } MS_VE_MV_TYPE;
187 
188 /*
189  * This Enum type was defined base on DCS for composite (CVBS)
190  */
191 typedef enum
192 {
193     MS_VE_DCS_TYPE_MIN = 0,
194     MS_VE_DCS_CVBS_NTSC = MS_VE_DCS_TYPE_MIN,
195     MS_VE_DCS_CVBS_PAL,
196     MS_VE_DCS_TYPE_MAX = MS_VE_DCS_CVBS_PAL,
197     MS_VE_DCS_TYPE_NUM,
198 } MS_VE_DCS_TYPE;
199 
200 //VE capability struct
201 typedef struct
202 {
203     MS_BOOL bSupport_UpScale;
204     MS_BOOL bSupport_CropMode;
205     MS_BOOL bSupport_DolbyVerifier;
206 }MS_VE_Cap;
207 
208 typedef enum
209 {
210     MS_VE_DRAM_FORMAT_Y8C8 = 0,
211     MS_VE_DRAM_FORMAT_Y8C8M4,
212 }MS_VE_DRAM_FORMAT;
213 
214 typedef enum
215 {
216     MS_VE_INT_TVE_FIELD = 0,
217     MS_VE_INT_TVE_VSYNC_TVE_FIELD,
218     MS_VE_INT_TVS_VSYNC,
219 }MS_VE_INT_TYPE;
220 
221 //-------------------------------------------------------------------------------------------------
222 //  Function and Variable
223 //-------------------------------------------------------------------------------------------------
224 
225 void MDrv_VE_PowerOn(void);
226 void MDrv_VE_PowerOff(void);
227 void Hal_VE_set_fix_color_out(MS_BOOL ben, MS_U8 u8color_y, MS_U8 u8color_cb, MS_U8 u8color_cr);
228 
229 void Hal_VE_set_wss_data(MS_BOOL ben, MS_U16 u16wssdata);
230 MS_U16 Hal_VE_get_wss_data(void);
231 void Hal_VE_set_color_convert(MS_VE_VIDEOSYS VideoSys, MS_U8 u8DACType);
232 
233 void Hal_VE_init(void);
234 MS_BOOL Hal_VE_set_output_video_std(MS_VE_VIDEOSYS VideoSystem);
235 MS_VE_VIDEOSYS Hal_VE_Get_Output_Video_Std(void);
236 
237 MS_BOOL Hal_VE_SetCusTable(MS_VE_VIDEOSYS VideoSystem, MS_U8* pu8Tbl, MS_U16 u16size);
238 void Hal_VE_EnableCusTable(MS_BOOL bEnable);
239 
240 void Hal_VE_set_capture_window(MS_U16 u16hstart, MS_U16 u16hend, MS_U16 u16vstart, MS_U16 u16vend);
241 void Hal_VE_set_hsync_inverse(MS_BOOL bEn);
242 void Hal_VE_set_cvbs_buffer_out(MS_U16 u16chnl, MS_U16 u16mux, MS_U16 u16clamp, MS_U16 u16test);
243 void Hal_VE_set_frc(MS_BOOL bfulldrop, MS_U32 u32fullnum, MS_U32 u32emptynum, MS_BOOL binterlace, MS_BOOL b3FrameMode);
244 void Hal_VE_set_field_inverse(MS_BOOL ben);
245 void Hal_VE_set_ccir656_out_pal(MS_BOOL bpal);
246 void Hal_VE_sofeware_reset(MS_BOOL ben);
247 void Hal_VE_set_vbi(MS_BOOL ben);
248 void Hal_VE_set_reg_load(MS_BOOL ben);
249 void Hal_VE_set_ctrl(MS_U16 u16enval);
250 void Hal_VE_set_h_scaling(MS_BOOL ben, MS_U16 u16ratio);
251 void Hal_VE_set_v_scaling(MS_BOOL ben, MS_U16 u16ratio);
252 void Hal_VE_set_v_scaling_Traditional(MS_BOOL ben, MS_U16 u16ratio);
253 void Hal_VE_set_v_initfactor(MS_BOOL binterlace, MS_U32 u32V_Ratio);
254 void Hal_VE_set_out_sel(MS_U8 u8out_sel);
255 void Hal_VE_set_source_sync_inv(MS_U8 u8val, MS_U8 u8Mask);
256 void Hal_VE_set_sog(MS_BOOL ben);
257 void Hal_VE_set_inputsource(PMS_VE_InputSrc_Info pInputSrcInfo);
258 void Hal_VE_set_mux(MS_U8 u8clk, MS_U8 u8data);
259 void Hal_VE_set_rgb_in(MS_BOOL ben);
260 void Hal_VE_set_ccir656_in(MS_BOOL ben);
261 void Hal_VE_set_source_interlace(MS_BOOL ben);
262 void Hal_VE_set_clk_on_off(MS_BOOL ben);
263 void Hal_VE_set_ve_on_off(MS_BOOL ben);
264 void Hal_VE_set_blackscreen(MS_BOOL ben);
265 MS_BOOL Hal_VE_is_blackscreen_enabled(void);
266 void Hal_VE_init_riu_base(MS_VIRT virtRiu_Base);
267 void Hal_VE_EnableTtx(MS_BOOL bEnable);
268 void Hal_VE_Set_ttx_Buffer(MS_U32 u32StartAddr, MS_U32 u32Size);
269 void Hal_VE_Clear_ttxReadDoneStatus(void);
270 MS_BOOL Hal_VE_Get_ttxReadDoneStatus(void);
271 void Hal_VE_Set_VbiTtxActiveLines(MS_U8 u8LinePerField);
272 void Hal_VE_SetVbiTtxRange(MS_U16 odd_start, MS_U16 odd_end,
273                          MS_U16 even_start, MS_U16 enen_end);
274 void Hal_VE_Set_VbiTtxActiveLinesBitmap(MS_U32 u32Bitmap);
275 void Hal_VE_Set_winodw_offset(MS_PHY phyoffsetaddr);
276 MS_U32 Hal_VE_ConvertARGB2YUV(MS_U32 u32aRGB);
277 VE_Result Hal_VE_SetFrameColor(MS_U32 u32aRGB);
278 void Hal_VE_Set_OSD(MS_BOOL bEnable);
279 VE_Result Hal_VE_Set_OSDLayer(MS_VE_OSD_LAYER_SEL eVideoOSDLayer);
280 MS_VE_OSD_LAYER_SEL Hal_VE_Get_OSDLayer(void);
281 VE_Result Hal_VE_Set_VideoAlpha(MS_U8 u8Val);
282 VE_Result Hal_VE_Get_VideoAlpha(MS_U8 *pu8Val);
283 void Hal_VE_EnableCcSw(MS_BOOL bEnable);
284 void Hal_VE_SetCcRange(MS_U16 odd_start, MS_U16 odd_end, MS_U16 even_start, MS_U16 enen_end);
285 void Hal_VE_SendCcData(MS_BOOL bIsOdd, MS_U16 data);
286 void Hal_VE_Set_TestPattern(MS_BOOL ben);
287 
288 void Hal_VE_W2BYTE_MSK(MS_U32 u32Reg, MS_U16 u16Val, MS_U16 u16Mask);
289 MS_U16 Hal_VE_R2BYTE_MSK(MS_U32 u32Reg, MS_U16 u16Mask);
290 
291 //Dump Table
292 void Hal_VE_DumpTable(MS_U8 *pVeTable, MS_U8 u8TableType);
293 
294 //Set MV
295 VE_Result Hal_VE_SetMV(MS_BOOL bEnable, MS_VE_MV_TYPE eMvType);
296 
297 //Set DCS
298 VE_Result Hal_VE_DCS_SetType(MS_BOOL bEnable, MS_VE_DCS_TYPE eDCSType);
299 VE_Result Hal_VE_DCS_SetActivationKey(MS_U8 *pu8ActivationKeyTbl, MS_U8 u8ActivationKeyTblSize);
300 
301 MS_BOOL Hal_VE_DisableRegWrite_GetCaps(void);
302 
303 // show internal color bar
304 // TRUE: enable color bar
305 // FALSE: disable color bar
306 void Hal_VE_ShowColorBar(MS_BOOL bEnable);
307 VE_Result Hal_VE_AdjustPositionBase(MS_S32 s32WAddrAdjustment, MS_S32 s32RAddrAdjustment);
308 void Hal_VE_set_field_size(MS_U16 u16FieldSize);
309 void Hal_VE_SelMIU(MS_U8 u8MIU_Seltype);
310 void Hal_VE_SetMemAddr(MS_PHY *phyRDAddress, MS_PHY *phyWRAddress);
311 VE_Result HAL_VE_SetFrameLock(MS_U32 u32IDclk, MS_U32 u32ODclk, MS_U32 u32InitPll, MS_BOOL bEnable);
312 VE_Result Hal_VE_GetCaps(MS_VE_Cap *cap);
313 void Hal_VE_set_h_upscaling(MS_BOOL ben, MS_U32 u32ratio);
314 void Hal_VE_set_v_upscaling(MS_BOOL ben, MS_U32 u32ratio);
315 MS_VE_DRAM_FORMAT Hal_VE_Get_DRAM_Format(void);
316 void Hal_VE_Set_DRAM_Format(MS_VE_DRAM_FORMAT fmt);
317 MS_U8 Hal_VE_Get_Pack_Num_Per_Line(void);
318 void Hal_VE_Set_Pack_Num_Per_Line(MS_U8 PackNumPerLine);
319 MS_U16 Hal_VE_Get_Field_Line_Number(void);
320 void Hal_VE_Set_Field_Line_Number(MS_U16 FieldLineNumber);
321 void Hal_VE_Set_Crop_OSD_Offset(MS_U16 hstart, MS_U16 vstart);
322 void Hal_VE_Set_VScale_Output_Line_Number(MS_U16 line);
323 void Hal_VE_Set_HScale_Output_Line_Number(MS_U16 line);
324 VE_Result Hal_VE_Adjust_FrameStart(MS_S16 pixel_offset);
325 MS_BOOL Hal_VE_ISRConfig(MS_VE_INT_TYPE eIntType);
326 VE_Result Hal_VE_set_wss525_data(MS_BOOL ben, MS_U32 u32wssdata);
327 MS_U32 Hal_VE_get_wss525_data(void);
328 #define Hal_VE_set_dolby_verifier_addr(args...)
329 MS_U32 Hal_VE_get_dolby_verifier_buf_size(void);
330 void Hal_VE_Set_PreHSD(MS_VE_INPUT_SRC_TYPE eInputSrcType,MS_U16 *u16In_Hsize,MS_U16 *u16In_Vsize);
331 
332 #ifdef __cplusplus
333 }
334 #endif
335 
336 #endif
337 
338