xref: /utopia/UTPA2-700.0.x/modules/vdec_v3/hal/manhattan/mvd_v3/mvd4_interface.h (revision 53ee8cc121a030b8d368113ac3e966b4705770ef)
1 //<MStar Software>
2 //******************************************************************************
3 // MStar Software
4 // Copyright (c) 2010 - 2012 MStar Semiconductor, Inc. All rights reserved.
5 // All software, firmware and related documentation herein ("MStar Software") are
6 // intellectual property of MStar Semiconductor, Inc. ("MStar") and protected by
7 // law, including, but not limited to, copyright law and international treaties.
8 // Any use, modification, reproduction, retransmission, or republication of all
9 // or part of MStar Software is expressly prohibited, unless prior written
10 // permission has been granted by MStar.
11 //
12 // By accessing, browsing and/or using MStar Software, you acknowledge that you
13 // have read, understood, and agree, to be bound by below terms ("Terms") and to
14 // comply with all applicable laws and regulations:
15 //
16 // 1. MStar shall retain any and all right, ownership and interest to MStar
17 //    Software and any modification/derivatives thereof.
18 //    No right, ownership, or interest to MStar Software and any
19 //    modification/derivatives thereof is transferred to you under Terms.
20 //
21 // 2. You understand that MStar Software might include, incorporate or be
22 //    supplied together with third party`s software and the use of MStar
23 //    Software may require additional licenses from third parties.
24 //    Therefore, you hereby agree it is your sole responsibility to separately
25 //    obtain any and all third party right and license necessary for your use of
26 //    such third party`s software.
27 //
28 // 3. MStar Software and any modification/derivatives thereof shall be deemed as
29 //    MStar`s confidential information and you agree to keep MStar`s
30 //    confidential information in strictest confidence and not disclose to any
31 //    third party.
32 //
33 // 4. MStar Software is provided on an "AS IS" basis without warranties of any
34 //    kind. Any warranties are hereby expressly disclaimed by MStar, including
35 //    without limitation, any warranties of merchantability, non-infringement of
36 //    intellectual property rights, fitness for a particular purpose, error free
37 //    and in conformity with any international standard.  You agree to waive any
38 //    claim against MStar for any loss, damage, cost or expense that you may
39 //    incur related to your use of MStar Software.
40 //    In no event shall MStar be liable for any direct, indirect, incidental or
41 //    consequential damages, including without limitation, lost of profit or
42 //    revenues, lost or damage of data, and unauthorized system use.
43 //    You agree that this Section 4 shall still apply without being affected
44 //    even if MStar Software has been modified by MStar in accordance with your
45 //    request or instruction for your use, except otherwise agreed by both
46 //    parties in writing.
47 //
48 // 5. If requested, MStar may from time to time provide technical supports or
49 //    services in relation with MStar Software to you for your use of
50 //    MStar Software in conjunction with your or your customer`s product
51 //    ("Services").
52 //    You understand and agree that, except otherwise agreed by both parties in
53 //    writing, Services are provided on an "AS IS" basis and the warranty
54 //    disclaimer set forth in Section 4 above shall apply.
55 //
56 // 6. Nothing contained herein shall be construed as by implication, estoppels
57 //    or otherwise:
58 //    (a) conferring any license or right to use MStar name, trademark, service
59 //        mark, symbol or any other identification;
60 //    (b) obligating MStar or any of its affiliates to furnish any person,
61 //        including without limitation, you and your customers, any assistance
62 //        of any kind whatsoever, or any information; or
63 //    (c) conferring any license or right under any intellectual property right.
64 //
65 // 7. These terms shall be governed by and construed in accordance with the laws
66 //    of Taiwan, R.O.C., excluding its conflict of law rules.
67 //    Any and all dispute arising out hereof or related hereto shall be finally
68 //    settled by arbitration referred to the Chinese Arbitration Association,
69 //    Taipei in accordance with the ROC Arbitration Law and the Arbitration
70 //    Rules of the Association by three (3) arbitrators appointed in accordance
71 //    with the said Rules.
72 //    The place of arbitration shall be in Taipei, Taiwan and the language shall
73 //    be English.
74 //    The arbitration award shall be final and binding to both parties.
75 //
76 //******************************************************************************
77 //<MStar Software>
78 #ifndef __M4VD_MSG_QUE_H__
79 #define __M4VD_MSG_QUE_H__
80 
81 #include "controller.h"
82 
83 
84 
85 #define DISPQ_SIZE 12
86 
87 #if defined(SUPPORT_EVD) && (1==SUPPORT_EVD)
88 #define OFFSET_BASE              0x00100000
89 #else
90 #define OFFSET_BASE              0x000a0000
91 #endif
92 
93 #define FW_VOL_INFO_START           (0x000+OFFSET_BASE)
94 #define DEBUG_BUF_START             (0x500+OFFSET_BASE)
95 #define FW_FRAME_INFO_START         (0x1000+OFFSET_BASE)
96 #define FW_DIVX_INFO_START          (0x2000+OFFSET_BASE)
97 #define DEC_FRMAE_INFO_START        (0x14300+OFFSET_BASE)
98 #define VBBU_TABLE_START            (0x15400+OFFSET_BASE)
99 #define DISP_QUEUE_START            (0x17400+OFFSET_BASE)
100 #define VCOMMANDQ_INFO_START        (0x18400+OFFSET_BASE)
101 #define VDISP_COMMANDQ_START        (0x19400+OFFSET_BASE)  // 4k bytes
102 #define VNORMAL_COMMANDQ_START      (0x1A400+OFFSET_BASE)  // 4k bytes
103 
104 #define MVD_DRAM_SIZE 0x40000   // MVD DRAM heap size, 256k
105 
106 /*
107 Share Memory layout
108   | FW_VOL_INFO | DEBUG_BUF | FW_FRAME_INFO | FW_DIVX_INFO | USERDATABUF | SLQBUF | PTSTBL | DSADDR | SCALER_INFO | DEC_FRMAE_INFO | VBBU_TABLE | VSYNC_BRIDGE
109   0            500        1000            2000           3000          B000     B200     13200    14200         14300            14400         1FA00
110 */
111 
112 // VC1_SEQ_INFO put on 65K
113 #define FW_VERSION               0x08043655
114 #define INTERFACE_VERSION        0x00000356 // Add OFFSET_REPEAT_FRAME_COUNT
115 #define EN_SECTION_START         0x20000000
116 
117 typedef struct _FW_VOL_INFO
118 {
119     //VOL infomation
120     unsigned short      vol_info;                    //0
121 //    D[5] short_video_header; //1
122 //    D[4] vol_interlaced;
123 //    D[3] vol_qpel;
124 //    D[2] vol_rsync_marker_disable;
125 //    D[1] vol_dp_enable;
126 //    D[0] vol_rvlc_enable;
127     unsigned short      sprite_usage;                          //2
128 
129     unsigned int        width;                                 //4
130     unsigned int        height;                                //8
131 
132     unsigned short      pts_incr;                              //12
133     unsigned short      reserved0;                             //14
134 
135     unsigned char       aspect_ratio;                          //16
136     unsigned char       progressive_sequence;                  //17
137     unsigned char       mpeg1;                                 //18
138     unsigned char       play_mode;                             //19
139 
140     unsigned char       mpeg_frc_mode;                         //20
141     unsigned char       first_display;                         //21
142     unsigned char       low_delay;                             //22
143     unsigned char       video_range;                           //23
144 
145     unsigned int        bit_rate;                              //24
146 
147     unsigned short      vol_time_incr_res;                     //28
148     unsigned short      fixed_vop_time_incr;                   //30    // 0: not fixed_vop_rate  others : vop_time_incr
149 
150     unsigned char       par_width;                             //32
151     unsigned char       par_height;                            //33
152     unsigned char       u8AFD;                                 //34
153     unsigned char       original_progressive;                  //35
154 
155     unsigned int        vc1_frame_rate;                        //36
156     unsigned int        frame_rate;                            //40
157 
158     unsigned char       key_gen[32];                           //44
159 
160     unsigned char       ds_enable;                             //76
161     unsigned char       stereo_type;                           //77
162     unsigned short      CropBottom;                            //78    // For HDMI 3D Output mode.
163 
164     unsigned int        DSbufsize;                             //80
165 
166     unsigned char       suspend_ds;                            //84
167     unsigned char       reserved4[2];                          //85,86
168     unsigned char       CMA_AllocDone;                         //87
169 
170     unsigned int        CMA_FB_Address;                        //88
171     unsigned int        CMA_FB_Size;                           //92
172     unsigned int        slq_end;                               //96
173     unsigned int        slq_start;                             //100
174     unsigned int        slq_end2;                             //104
175     unsigned int        slq_start2;                           //108
176 
177     volatile unsigned char          u32VirtualCommandArg0;     //112
178     volatile unsigned char          u32VirtualCommandArg1;     //113
179     volatile unsigned char          u32VirtualCommandArg2;     //114
180     volatile unsigned char          u32VirtualCommandArg3;     //115
181 
182     volatile unsigned char          u32VirtualCommandArg4;     //116
183     volatile unsigned char          u32VCHandshake;            //117
184     unsigned char       reserved[2];                           //118
185 
186 }FW_VOL_INFO,*pFW_VOL_INFO;//16 byte
187 
188 #define OFFSET_VOL_INFO                0
189 #define OFFSET_SPRITE_USAGE            2
190 #define OFFSET_WIDTH                   4
191 #define OFFSET_HEIGHT                  8
192 #define OFFSET_PTS_INCR                12
193 #define OFFSET_RESERVED0               14
194 #define OFFSET_ASPECT_RATIO            16
195 #define OFFSET_PROGRESSIVE_SEQUENCE    17
196 #define OFFSET_MPEG1                   18
197 #define OFFSET_PLAY_MODE               19
198 #define OFFSET_MPEG_FRC_MODE           20
199 #define OFFSET_FIRST_DISPLAY           21
200 #define OFFSET_LOW_DELAY               22
201 #define OFFSET_VIDEO_RANGE             23
202 #define OFFSET_BIT_RATE                24
203 #define OFFSET_VOL_TIME_INCR_RES       28
204 #define OFFSET_FIXED_VOP_TIME_INCR     30
205 #define OFFSET_PAR_WIDTH               32
206 #define OFFSET_PAR_HEIGHT              33
207 #define OFFSET_AFD                     34
208 #define OFFSET_ORIGINAL_PROGRESSIVE    35
209 #define OFFSET_VC1_FRAME_RATE          36
210 #define OFFSET_FRAME_RATE              40
211 #define OFFSET_KEY_GEN                 44
212 #define OFFSET_DS_ENABLE               76
213 #define OFFSET_STEREO_TYPE             77
214 #define OFFSET_CROPBOTTOM              78
215 #define OFFSET_DSBUFSIZE               80
216 #define OFFSET_SUSPEND_DS              84
217 #define OFFSET_CMA_ALLOCDONE           87
218 #define OFFSET_CMA_FB_ADDRESS          88
219 #define OFFSET_CMA_FB_SIZE             92
220 #define OFFSET_SLQ_END                 96
221 #define OFFSET_SLQ_START               100
222 #define OFFSET_SLQ_END1                104
223 #define OFFSET_SLQ_START1              108
224 #define OFFSET_VIRTUAL_COMMANDARG0     112
225 #define OFFSET_VIRTUAL_COMMANDARG1     113
226 #define OFFSET_VIRTUAL_COMMANDARG2     114
227 #define OFFSET_VIRTUAL_COMMANDARG3     115
228 #define OFFSET_VIRTUAL_COMMANDARG4     116
229 #define OFFSET_VCHANDSHAKE             117
230 
231 typedef struct
232 {
233     union
234     {
235         struct
236         {
237             unsigned int mvdcmd_handshake_pause : 1;        // 1 for handshake ready with CMD_PAUSE,
238             unsigned int mvdcmd_handshake_slq_reset : 1;    // 1 for handshake ready with CMD_VC1_HW_SLQ_RESET
239             unsigned int mvdcmd_handshake_stop : 1;         // 1 for handshake ready with CMD_STOP
240             unsigned int mvdcmd_handshake_skip_data : 1;    // 1 for handshake ready with CMD_SKIP_DATA
241             unsigned int mvdcmd_handshake_skip_to_pts : 1;  // 1 for handshake ready with CMD_SKIP_TO_PTS
242             unsigned int mvdcmd_handshake_single_step : 1;  // 1 for handshake ready with CMD_SINGLE_STEP
243             unsigned int mvdcmd_handshake_scaler_data_ready : 1;
244             unsigned int mvdcmd_handshake_get_nextdispfrm_ready : 1; // for Mstreamer mode
245             unsigned int mvdcmd_handshake_parser_rst : 1;  // 1 for handshake done with CMD_PTS_TBL_RESET
246             unsigned int mvdcmd_handshake_cc608_rst : 1;    // "0" for handshake done with mstar cc608
247             unsigned int mvdcmd_handshake_cc708_rst : 1;    // "0" for handshake done with mstar cc708
248             unsigned int mvdcmd_handshake_fast_rst : 1;     // 1 for handshake done with CMD_FAST_RST, 1 for fast_rst_done...
249             unsigned int mvdcmd_handshake_detatch : 1;      // 1 for handshake ready with exit main loop
250             unsigned int mvdcmd_handshake_pvr_seamless_mode : 1;      // 1 for handshake ready
251             unsigned int mvdcmd_handshake_virtualCommand : 1;      // 1 for handshake ready with virtual command get status done
252             unsigned int mvdcmd_handshake_flush : 1;      // 1 for handshake ready with flush disp queue command
253             unsigned int mvdcmd_handshake_reserved : 16;    // reserved for extend
254         };
255         unsigned int value;
256     };
257 }MVD_CMD_HANDSHADE_INDEX;
258 
259 typedef struct
260 {
261     union
262     {
263         struct
264         {
265             unsigned int mvd_xc_disable_black_screen : 1;   // 1 for XC disable the black screen, defaule is "0"...
266             unsigned int mvd_xc_release_force_rbank : 1;    // 1 for XC release force read bank, defaule is "0"...
267             unsigned int mvd_xc_release_bob_mode : 1;       // 1 for XC release BOB mode, defaule is "0"...
268             unsigned int mvd_xc_release_UCNR : 1;           // 1 for XC release UCNR, defaule is "0"...
269             unsigned int mvd_xc_reserved : 28;              // reserved for extend
270         };
271         unsigned int value;
272     };
273 }MVD_XC_LOW_DELAY_INT_STATE;
274 
275 typedef struct _FW_FRAME_INFO
276 {
277     unsigned int            frame_count;                 //0
278     unsigned int            slq_tbl_rptr;                //4        // ==>ms
279     unsigned int            vol_update;                  //8
280     unsigned int            error_code;                  //12
281 
282     unsigned int            error_status;                //16
283     unsigned int            skip_frame_count;            //20
284     unsigned int            picture_type;                //24    // 0:I frame 1:P frame 2:B frame
285     unsigned int            slq_sw_index;                //28
286 
287     unsigned char           fb_index;                    //32
288     unsigned char           top_ff;                      //33
289     unsigned char           repeat_ff;                   //34
290     unsigned char           invalidstream;               //35
291     unsigned int            vld_err_count;               //36
292     unsigned short          tmp_ref;                     //40
293     unsigned char           first_frame;                 //42
294     unsigned char           first_I_found;               //43
295     unsigned int            gop_i_fcnt;                  //44
296 
297     unsigned int            gop_p_fcnt;                  //48
298     unsigned int            gop_b_fcnt;                  //52
299     unsigned int            overflow_count;              //56
300     unsigned int            time_incr;                   //60
301 
302     unsigned int            self_rst_count;              //64
303     unsigned int            sw_vd_count;                 //68
304     unsigned int            step_disp_done;              //72
305     unsigned int            step_to_pts_done;            //76
306 
307     MVD_CMD_HANDSHADE_INDEX cmd_handshake_index;         //80
308     unsigned int            last_frame_show_done;        //84
309     unsigned int            meet_file_end_sc;            //88
310     unsigned int            rcv_payload_lenth;           //92
311 
312     unsigned int            firmware_version;            //96
313     unsigned int            ic_version;                  //100
314     unsigned int            interface_version;           //104
315     unsigned char           color_primaries;             //108
316     unsigned char           transfer_char;               //109
317     unsigned char           matrix_coef;                 //110
318     unsigned char           video_format;                //111
319 
320     unsigned short          disp_h_size;                 //112
321     unsigned short          disp_v_size;                 //114
322     unsigned char           time_code_hours;             //116
323     unsigned char           time_code_minutes;           //117
324     unsigned char           time_code_seconds;           //118
325     unsigned char           time_code_pictures;          //119
326     unsigned char           drop_frame_flag;             //120
327     unsigned char           time_code_hours_disp;        //121
328     unsigned char           time_code_minutes_disp;      //122
329     unsigned char           time_code_seconds_disp;      //123
330     unsigned char           time_code_pictures_disp;     //124
331     unsigned char           drop_frame_flag_disp;        //125
332     unsigned char           PicStruct;                   //126
333     unsigned char           chroma_format;               //127
334 
335     int                     pts_stc;                     //128
336     unsigned int            displayed_cnt;               //132
337     unsigned int            next_pts;                    //136
338     unsigned short          centre_h_offset;             //140
339     unsigned short          centre_v_offset;             //142
340 
341     unsigned int            int_cnt;                     //144
342     unsigned int            disp_pts;                    //148    // pts of current displayed frame
343     unsigned int            high32_pts;                  //152    // msb of 33-bit pts
344     unsigned char           dispQnum;                    //156
345     unsigned char           CurrentESBufferStatus;       //157    // init:0x00,underflow:0x01,overflow:0x02,normal:0x03
346     unsigned char           framebufferresource;         //158    // default: 0, ok: 1, fail : 2
347     unsigned char           framebuffer_status;          //159
348 
349     unsigned int            divx_ver_5x;                 //160    // report divx version...
350     unsigned int            frame_buf_size;              //164    // report real frame buffer size(unit in bytes)...
351     MVD_XC_LOW_DELAY_INT_STATE xc_low_delay_int_state;   //168    // for xc low delay interrupt status...
352     unsigned int            xc_low_delay_cnt;            //172
353 
354     unsigned int            xc_diff_field_no;            //176    // for get XC diff field number...
355     unsigned int            xc_low_delay_cnt_latched;    //180    // for dbg xc_low_delay timing only...
356     unsigned int            drop_count;                  //184    // for counting that decoded frame who doesn't display
357 
358     unsigned int            rdptr_pts_low;               //188    // for TM14 pts flow control, pts based on pts table read pointer
359     unsigned int            rdptr_pts_high;              //192    // for TM14 pts flow control, pts based on pts table read pointer
360     unsigned int            wrptr_pts_low;               //196    // for TM14 pts flow control, pts based on pts table write pointer
361     unsigned int            wrptr_pts_high;              //200    // for TM14 pts flow control, pts based on pts table write pointer
362 
363     unsigned int            wait_decode_done_cnt;       //204
364     unsigned int            wait_seach_buffer_cnt;      //208
365     unsigned int            wait_search_code_cnt;       //212
366     unsigned int            wait_pre_buf_cnt;           //216
367     unsigned int            wait_vfifo_buf_cnt;         //220
368     unsigned int            wait_search_header_cnt;     //224
369     unsigned int            wait_flash_pattern_cnt;     //228
370     unsigned int            pb_chunk_count;             //232
371     unsigned int            pb_buffer_count;            //236
372     unsigned int            pb_chunk_flag;              //240
373     unsigned int            divx311_flag;               //244
374     unsigned int            pvr_seamless_status;        //248
375     unsigned int            int_stat;                   //252
376     unsigned int            drop_frame_count;           //256
377     unsigned int            disp_stc;                   //260
378     unsigned int            repeat_frame_count;         //264
379     unsigned char           color_descript;             //268
380     unsigned char           reserve8_3[3];              //269
381 
382 }FW_FRAME_INFO, *pFW_FRAME_INFO;
383 
384 #define OFFSET_FRAME_COUNT                 0
385 #define OFFSET_SLQ_TBL_RPTR                4
386 #define OFFSET_VOL_UPDATE                  8
387 #define OFFSET_ERROR_CODE                  12
388 #define OFFSET_ERROR_STATUS                16
389 #define OFFSET_SKIP_FRAME_COUNT            20
390 #define OFFSET_PICTURE_TYPE                24
391 #define OFFSET_SLQ_SW_INDEX                28
392 #define OFFSET_FB_INDEX                    32
393 #define OFFSET_TOP_FF                      33
394 #define OFFSET_REPEAT_FF                   34
395 #define OFFSET_INVALIDSTREAM               35
396 #define OFFSET_VLD_ERR_COUNT               36
397 #define OFFSET_TMP_REF                     40
398 #define OFFSET_FIRST_FRAME                 42
399 #define OFFSET_FIRST_I_FOUND               43
400 #define OFFSET_GOP_I_FCNT                  44
401 #define OFFSET_GOP_P_FCNT                  48
402 #define OFFSET_GOP_B_FCNT                  52
403 #define OFFSET_OVERFLOW_COUNT              56
404 #define OFFSET_TIME_INCR                   60
405 #define OFFSET_SELF_RST_COUNT              64
406 #define OFFSET_SW_VD_COUNT                 68
407 #define OFFSET_STEP_DISP_DONE              72
408 #define OFFSET_STEP_TO_PTS_DONE            76
409 #define OFFSET_CMD_HANDSHAKE_INDEX         80
410 #define OFFSET_CMD_LAST_FRAME_SHOW         84
411 #define OFFSET_MEET_FILE_END_SC            88
412 #define OFFSET_RCV_PAYLOAD_LENGTH          92
413 #define OFFSET_FIRMWARE_VERSION            96
414 #define OFFSET_IC_VERSION                  100
415 #define OFFSET_INTERFACE_VERSION           104
416 #define OFFSET_COLOR_PRIMARIES             108
417 #define OFFSET_TRANSFER_CHAR               109
418 #define OFFSET_MATRIX_COEF                 110
419 #define OFFSET_VIDEO_FORMAT                111
420 #define OFFSET_DISP_H_SIZE                 112
421 #define OFFSET_DISP_V_SIZE                 114
422 #define OFFSET_TIME_CODE_HOURS             116 // for decoding frame
423 #define OFFSET_TIME_CODE_MINUTES           117 // for decoding frame
424 #define OFFSET_TIME_CODE_SECONDS           118 // for decoding frame
425 #define OFFSET_TIME_CODE_PICTURES          119 // for decoding frame
426 #define OFFSET_DROP_FRAME_FLAG             120 // for decoding frame
427 #define OFFSET_TIME_CODE_HOURS_DISP        121 // for displaying frame
428 #define OFFSET_TIME_CODE_MINUTES_DISP      122 // for displaying frame
429 #define OFFSET_TIME_CODE_SECONDS_DISP      123 // for displaying frame
430 #define OFFSET_TIME_CODE_PICTURES_DISP     124 // for displaying frame
431 #define OFFSET_DROP_FRAME_FLAG_DISP        125 // for displaying frame
432 #define OFFSET_PICTURE_STRUCTURE           126
433 #define OFFSET_CHROMA_FORMAT               127
434 #define OFFSET_PTS_STC                     128 // integer, pts_stc(n)=pts(n)-stc(n)
435 #define OFFSET_DISPLAYED_CNT               132
436 #define OFFSET_NEXT_PTS                    136
437 #define OFFSET_CENTRE_H_OFFSET             140
438 #define OFFSET_CENTRE_V_OFFSET             142
439 #define OFFSET_INT_CNT                     144
440 #define OFFSET_DISP_PTS                    148
441 #define OFFSET_DISP_PTS_MSB                152
442 #define OFFSET_DISPQ_NUM                   156
443 #define OFFSET_CURRENT_ES_BUFFER_STATUS    157
444 #define OFFSET_FRAME_BUFFER_RESOURCE       158
445 #define OFFSET_FRAME_BUFFER_STATUS         159
446 #define OFFSET_DIVX_VER_5X                 160
447 #define OFFSET_FRAME_BUF_SIZE              164 // report real frame buffer size(unit in bytes)...
448 #define OFFSET_XC_LOW_DELAY_INT_STATE      168 // for xc low delay interrupt status...
449 #define OFFSET_XC_LOW_DELAY_CNT            172 // for xc low delay interrupt status...
450 #define OFFSET_XC_DIFF_FIELD_NO            176 // for get XC diff field number...
451 #define OFFSET_XC_LOW_DELAY_CNT_LATCH      180 // for dbg xc_low_delay timing only...
452 #define OFFSET_DROP_COUNT                  184 // for counting that decoded frame who doesn't display
453 #define OFFSET_RDPTR_PTS_LOW               188
454 #define OFFSET_RDPTR_PTS_HIGH              192
455 #define OFFSET_WRPTR_PTS_LOW               196
456 #define OFFSET_WRPTR_PTS_HIGH              200
457 #define OFFSET_DECODEDONE_COUNT            204
458 #define OFFSET_SEARCHBUF_COUNT             208
459 #define OFFSET_SEARCHCODE_COUNT            212
460 #define OFFSET_PREBUF_COUNT                216
461 #define OFFSET_VFIFOBUF_COUNT              220
462 #define OFFSET_SEARCHHEADER_COUNT          224
463 #define OFFSET_FLASHPATTERN_COUNT          228
464 #define OFFSET_PB_CHUNK_COUNT              232
465 #define OFFSET_PB_BUFFER_COUNT             236
466 #define OFFSET_PB_CHUNK_FLAG               240
467 #define OFFSET_DIVX311_FLAG                244
468 #define OFFSET_PVR_SEAMLESS_STATUS         248
469 #define OFFSET_INT_STAT                    252
470 #define OFFSET_DROP_FRAME_COUNT            256
471 #define OFFSET_DISP_STC                    260
472 #define OFFSET_REPEAT_FRAME_COUNT          264
473 #define OFFSET_COLOR_DESCRIPT              268
474 
475 typedef struct _FW_DIVX_INFO
476 {
477     unsigned int        vol_handle_done;            //0
478 
479     unsigned int        width;                        //4
480     unsigned int        height;                        //8
481     unsigned int        frame_count;                //12
482     unsigned int        frame_time;                    //16
483 
484     unsigned short      pts_incr;                    //20
485     unsigned short      reserve0;
486 
487     unsigned char       aspect_ratio;                //24
488     unsigned char       progressive_sequence;        //25
489     unsigned char       mpeg1;                        //26
490     unsigned char       play_mode;                    //27
491 
492     unsigned char       mpeg_frc_mode;                //28
493     unsigned char       invalidstream;                //29
494     unsigned char       reserve[2];                    //30
495     unsigned int        frame_rate;                    //32
496 }FW_DIVX_INFO, *pFW_DIVX_INFO;
497 
498 #define OFFSET_DIVX_VOL_HANDLE_DONE      0
499 #define OFFSET_DIVX_WIDTH                4
500 #define OFFSET_DIVX_HEIGHT               8
501 #define OFFSET_DIVX_FRAME_COUNT          12
502 #define OFFSET_DIVX_FRAME_TIME           16
503 #define OFFSET_DIVX_PTS_INCR             20
504 #define OFFSET_DIVX_RESERVE0             22
505 #define OFFSET_DIVX_ASPECT_RATIO         24
506 #define OFFSET_DIVX_PROGRESSIVE_SEQUENCE 25
507 #define OFFSET_DIVX_MPEG1                26
508 #define OFFSET_DIVX_PLAY_MODE            27
509 #define OFFSET_DIVX_MPEG_FRC_MODE        28
510 #define OFFSET_DIVX_INVALIDSTREAM        29
511 #define OFFSET_DIVX_RESERVED             30
512 #define OFFSET_DIVX_FRAME_RATE           32
513 
514 #define STATUS_VIDEO_SYNC    (1<<0)
515 #define STATUS_VIDEO_FREERUN (1<<1)
516 #define STATUS_VIDEO_SKIP    (1<<2)
517 #define STATUS_VIDEO_REPEAT  (1<<3)
518 
519 typedef struct _FW_USER_DATA_BUF
520 {
521     unsigned char picType;                            /* picture type: 1->I picture, 2->P,3->B */
522     unsigned char top_ff;                            /* Top field first: 1 if top field first*/
523     unsigned char rpt_ff;                            /* Repeat first field: 1 if repeat field first*/
524     unsigned char userdatabytecnt;
525 
526     unsigned short     tmpRef;                        /* Temporal reference of the picture*/
527 
528     unsigned char userdata[250];
529 }FW_USER_DATA_BUF,*pFW_USER_DATA_BUF;
530 
531 #define FW_USER_DATA_BUF_EXT_PACK_LEN  240
532 typedef struct _FW_USER_DATA_BUF_EXT
533 {
534     unsigned char            picType;                /* picture type: 1->I picture, 2->P,3->B */
535     unsigned char            top_ff;                    /* Top field first: 1 if top field first*/
536     unsigned char            rpt_ff;                    /* Repeat first field: 1 if repeat field first*/
537     unsigned char            userdatabytecnt;
538 
539     unsigned short           tmpRef;                    /* Temporal reference of the picture*/
540     unsigned char            PicStruct;                /* picture struct with this cc pack*/
541     unsigned char            reserved;
542 
543     unsigned int             pts;                    /* pts with this cc pack*/
544     unsigned int             reserved2;
545 
546     unsigned char userdata[FW_USER_DATA_BUF_EXT_PACK_LEN];
547 }FW_USER_DATA_BUF_EXT,*pFW_USER_DATA_BUF_EXT;
548 
549 typedef struct _DecFrameInfo
550 {
551     unsigned int            u32DecLumaAddr;                //0
552     unsigned int            u32DecChromaAddr;            //4
553     unsigned int            u32DecTimeStamp;            //8
554     unsigned int            u32DecID_L;                    //12
555     unsigned int            u32DecID_H;                    //16
556     unsigned short          u16DecPitch;                //20
557     unsigned short          u16DecWidth;                //22
558     unsigned short          u16DecHeight;                //24
559     unsigned short          u16DeceFrameType;            //26
560     unsigned int            u32DispLumaAddr;            //28
561     unsigned int            u32DispChromaAddr;            //32
562     unsigned int            u32DispTimeStamp;            //36
563     unsigned int            u32DispID_L;                //40
564     unsigned int            u32DispID_H;                //44
565     unsigned short          u16DispPitch;                //48
566     unsigned short          u16DispWidth;                //50
567     unsigned short          u16DispHeight;                //52
568     unsigned short          u16DispeFrameType;            //54
569     // for Mstreamer mode
570     unsigned int            u32NextDispLumaAddr;        //56
571     unsigned int            u32NextDispChromaAddr;        //60
572     unsigned int            u32NextDispTimeStamp;        //64
573     unsigned int            u32NextDispID_L;            //68
574     unsigned int            u32NextDispID_H;            //72
575     unsigned short          u16NextDispPitch;            //76
576     unsigned short          u16NextDispWidth;            //78
577     unsigned short          u16NextDispHeight;            //80
578     unsigned short          u16NextDispeFrameType;        //82
579     unsigned short          u16NextDispFrameIdx;        //84
580     // for vc1/rcv range reduction
581     unsigned char           u8NextDispRangeRed_Y;      //86 //[7]: on/off [6:0]: scale
582     unsigned char           u8NextDispRangeRed_UV;     //87 //[7]: on/off [6:0]: scale
583     // for MCU mode, which support interlace
584     unsigned short          u16ExtData;                     //88
585     unsigned char           u8Progressive;                  //90
586     unsigned char           u8reserved;                     //91
587 }DecFrameInfo, *pDecFrameInfo;
588 
589 #define OFFSET_DECFRAMEINFO_DEC_LUMAADDR           0
590 #define OFFSET_DECFRAMEINFO_DEC_CHROMAADDR         4
591 #define OFFSET_DECFRAMEINFO_DEC_TIMESTAMP          8
592 #define OFFSET_DECFRAMEINFO_DEC_ID_L              12
593 #define OFFSET_DECFRAMEINFO_DEC_ID_H              16
594 #define OFFSET_DECFRAMEINFO_DEC_PITCH             20
595 #define OFFSET_DECFRAMEINFO_DEC_WIDTH             22
596 #define OFFSET_DECFRAMEINFO_DEC_HEIGHT            24
597 #define OFFSET_DECFRAMEINFO_DEC_FRAMETYPE         26
598 #define OFFSET_DECFRAMEINFO_DISP_LUMAADDR         28
599 #define OFFSET_DECFRAMEINFO_DISP_CHROMAADDR       32
600 #define OFFSET_DECFRAMEINFO_DISP_TIMESTAMP        36
601 #define OFFSET_DECFRAMEINFO_DISP_ID_L             40
602 #define OFFSET_DECFRAMEINFO_DISP_ID_H             44
603 #define OFFSET_DECFRAMEINFO_DISP_PITCH            48
604 #define OFFSET_DECFRAMEINFO_DISP_WIDTH            50
605 #define OFFSET_DECFRAMEINFO_DISP_HEIGHT           52
606 #define OFFSET_DECFRAMEINFO_DISP_FRAMETYPE        54
607 #define OFFSET_DECFRAMEINFO_NEXTDISP_LUMAADDR     56 // for Mstreamer mode
608 #define OFFSET_DECFRAMEINFO_NEXTDISP_CHROMAADDR   60
609 #define OFFSET_DECFRAMEINFO_NEXTDISP_TIMESTAMP    64
610 #define OFFSET_DECFRAMEINFO_NEXTDISP_ID_L         68
611 #define OFFSET_DECFRAMEINFO_NEXTDISP_ID_H         72
612 #define OFFSET_DECFRAMEINFO_NEXTDISP_PITCH        76
613 #define OFFSET_DECFRAMEINFO_NEXTDISP_WIDTH        78
614 #define OFFSET_DECFRAMEINFO_NEXTDISP_HEIGHT       80
615 #define OFFSET_DECFRAMEINFO_NEXTDISP_FRAMETYPE    82
616 #define OFFSET_DECFRAMEINFO_NEXTDISP_FRAMEIDX     84 // for Mstreamer mode
617 #define OFFSET_DECFRAMEINFO_NEXTDISP_RANGERED_Y   86 // for vc1/rcv
618 #define OFFSET_DECFRAMEINFO_NEXTDISP_RANGERED_UV  87 // for vc1/rcv
619 #define OFFSET_DECFRAMEINFO_NEXTDISP_EXT_DATA     88 // for MCU mode, which support interlace
620 #define OFFSET_DECFRAMEINFO_NEXTDISP_PROGRESSIVE  90 // is progressive or not
621 
622 
623 typedef struct __DISPQ_IN_DRAM
624 {
625     volatile unsigned int        dispQ_rd;
626     volatile unsigned int        dispQ_wr;
627     volatile DecFrameInfo        disp_info[DISPQ_SIZE];
628     volatile int        dispQ_len;
629     volatile unsigned int        bUsedByOutside[DISPQ_SIZE];
630 }DISPQ_IN_DRAM;
631 
632 
633 
634 typedef struct _DEBUG_INFO
635 {
636     //
637     volatile unsigned short max_coded_width;
638     volatile unsigned short max_coded_height;
639     volatile unsigned short sync_status;              // defined by AV_SYNC
640 
641     volatile unsigned short REG67;
642     volatile unsigned short REG68;
643     volatile unsigned short REG69;
644 
645     volatile unsigned short REG6a;
646     volatile unsigned short REG6b;
647     volatile unsigned short REG6c;
648 
649     volatile unsigned short REG6d;
650     volatile unsigned short REG6e;
651     volatile unsigned short REG6f;
652 
653     //
654     volatile unsigned short overflow_count;
655     volatile unsigned short underflow_count;
656     volatile unsigned short vlderr_count;
657     volatile unsigned short frame_conut;//0
658 
659     volatile unsigned int   y_start_addr; //in byte unit
660     volatile unsigned int   uv_start_addr;//in byte unit
661 
662     volatile unsigned int   width;
663     volatile unsigned int   height;
664 
665     // where
666     volatile unsigned short mb_x;
667     volatile unsigned short mb_y;
668 
669     volatile unsigned short file_end;
670     //16-byte aligned
671     volatile unsigned char reserved[24];
672 
673 }DebugInfo;
674 
675 typedef struct VC1_SEQ_INFO
676 {
677     volatile    unsigned int        PROFILE;
678     volatile    unsigned int        FRMRTQ_POSTPROC;
679     volatile    unsigned int        BITRTQ_POSTPROC;
680     volatile    unsigned int        LOOPFILTER;
681     volatile    unsigned int        MULTIRES;
682     volatile    unsigned int        FASTUVMC;
683     volatile    unsigned int        EXTENDED_MV;
684     volatile    unsigned int        DQUANT;
685     volatile    unsigned int        VSTRANSFORM;
686     volatile    unsigned int        OVERLAP;
687     volatile    unsigned int        SYNCMARKER;
688     volatile    unsigned int        RANGERED;
689     volatile    unsigned int        MAXBFRAMES;
690     volatile    unsigned int        QUANTIZER;
691     volatile    unsigned int        FINTERPFLAG;
692     volatile    unsigned int        LEVEL;
693     volatile    unsigned int        CBR;
694     volatile    unsigned int        FRAMERATE;
695     volatile    unsigned int        VERT_SIZE;
696     volatile    unsigned int        HORIZ_SIZE;
697 }VC1_SEQUENCE_INFO, *pVC1_SEQUENCE_INFO;
698 
699 #define OFFSET_RCV_PROFILE                        0
700 #define OFFSET_RCV_FRMRTQ_POSTPROC                4
701 #define OFFSET_RCV_BITRTQ_POSTPROC                8
702 #define OFFSET_RCV_LOOPFILTER                    12
703 #define OFFSET_RCV_MULTIRES                      16
704 #define OFFSET_RCV_FASTUVMC                      20
705 #define OFFSET_RCV_EXTENDED_MV                   24
706 #define OFFSET_RCV_DQUANT                        28
707 #define OFFSET_RCV_VSTRANSFORM                   32
708 #define OFFSET_RCV_OVERLAP                       36
709 #define OFFSET_RCV_SYNCMARKER                    40
710 #define OFFSET_RCV_RANGERED                      44
711 #define OFFSET_RCV_MAXBFRAMES                    48
712 #define OFFSET_RCV_QUANTIZER                     52
713 #define OFFSET_RCV_FINTERPFLAG                   56
714 #define OFFSET_RCV_LEVEL                         60
715 #define OFFSET_RCV_CBR                           64
716 #define OFFSET_RCV_FRAMERATE                     68
717 #define OFFSET_RCV_VERT_SIZE                     72
718 #define OFFSET_RCV_HORIZ_SIZE                    76
719 
720 typedef struct _FW_AVSYNC_TABLE
721 {
722     unsigned int            byte_cnt;            //0        //23 valid bits
723     unsigned int            dummy_cnt;            //4        //dummy packet counter
724     unsigned int            id_low;                //8        //ID specified by player
725     unsigned int            id_high;            //12
726 
727     unsigned int            time_stamp;            //16    //pts or dts
728     unsigned int            reserved_int0;        //20
729     unsigned int            reserved_int1;        //24
730     unsigned int            reserved_int2;        //28
731 }FW_AVSYNC_TABLE, *pFW_AVSYNC_TABLE;
732 
733 #define OFFSET_BYTE_CNT                         0
734 #define OFFSET_DUMMY_CNT                        4
735 #define OFFSET_ID_LOW                           8
736 #define OFFSET_ID_HIGH                         12
737 #define OFFSET_TIME_STAMP                      16
738 
739 typedef struct _fw_VBBU
740 {
741     unsigned int u32WrPtr;
742     unsigned int u32RdPtr;
743     unsigned char u8Reserved[8];
744     VDEC_VBBU_Entry stEntry[MAX_VDEC_VBBU_ENTRY_COUNT];
745 } FW_VBBU,*pFW_VBBU;
746 
747 #ifdef M4VDPLAYER
748 extern    pFW_VOL_INFO        gp_vol_info;
749 extern    pFW_DIVX_INFO       gp_divx_info;
750 #endif
751 
752 //interupt flag
753 #define INT_CC_NEW          (1<<0)
754 #define INT_USER_DATA       (1<<0)
755 #define INT_VBUF_OVF        (1<<1)
756 #define INT_VBUF_UNF        (1<<2)
757 #define INT_VES_VALID       (1<<3)
758 #define INT_VES_INVALID     (1<<4)
759 #define INT_SEQ_FOUND       (1<<5)
760 #define INT_PIC_FOUND       (1<<6)
761 #define INT_DEC_ERR         (1<<7)
762 #define INT_FIRST_FRAME     (1<<8)
763 #define INT_DISP_RDY        (1<<9)
764 #define INT_SYN_SKIP        (1<<10)
765 #define INT_SYN_REP         (1<<11)
766 #define INT_DISP_VSYNC      (1<<12)
767 #define INT_USER_DATA_DISP  (1<<13) //user data in display order
768 #define INT_PTS_DISCONTINUE (1<<14) //detection pts discontinue for t3-gp2, 20101214
769 #define INT_DEC_DONE        (1<<15) //finishing decoding one frame.
770 #define INT_DEC_I           (1<<16) //finishing decoding one frame.
771 #define INT_XC_LOW_DELAY    (1<<17) //trigger this interrupt for XC speed up to show image on channel change...
772 
773 #define INT_SYN_SKIP_P       10
774 #define INT_SYN_REP_P        11
775 
776 
777 //MVD TLB
778 #define MVD_TLB_BSR1          (1<<0)
779 #define MVD_TLB_BSR2          (1<<1)
780 #define MVD_TLB_PAS1          (1<<2)
781 #define MVD_TLB_PAS2          (1<<3)
782 #define MVD_TLB_PESFI1        (1<<4)
783 #define MVD_TLB_PESFI2        (1<<5)
784 #define MVD_TLB_SMDB          (1<<6)
785 #define MVD_TLB_VLD           (1<<7)
786 #define MVD_TLB_REF           (1<<8)
787 #define MVD_TLB_NM            (1<<9)
788 #define MVD_TLB_IAP           (1<<10)
789 #define MVD_TLB_JSC           (1<<11)
790 #define MVD_TLB_MTO           (1<<12)
791 #define MVD_TLB_BSR3          (1<<13)
792 
793 
794 // decoding state definition
795 #define DEC_STAT_IDLE                0x00
796 #define DEC_STAT_FIND_SC             0x01
797 #define DEC_STAT_FIND_SPE_SC         0x11
798 #define DEC_STAT_FIND_FRAMEBUFFER    0x02
799 #define DEC_STAT_WAIT_DECODE_DONE    0x03
800 #define DEC_STAT_DECODE_DONE         0x04
801 #define DEC_STAT_WAIT_VDFIFO         0x05
802 #define DEC_STAT_INIT_SUCCESS        0x06
803 #define DEC_STAT_NO_FRAME_BUFFER     0x07
804 
805 //error_code
806 #define VOL_SHAPE                       1  //error_status 0:rectanglular    1:binary 2: binary only 3: grayscale
807 #define VOL_USED_SPRITE                 2  //error_status 0:sprite not used 1:static 2: GMC 3: reserved
808 #define VOL_NOT_8_BIT                   3  //error_status : bits per pixel
809 #define VOL_NERPRED_ENABLE              4
810 #define VOL_REDUCED_RES_ENABLE          5
811 #define VOL_SCALABILITY                 6
812 #define VOL_OTHER                       7
813 #define VOL_H263_ERROR                  8
814 #define VOL_RES_NOT_SUPPORT             9 //error_status : none
815 #define VOL_MPEG4_NOT_SUPPORT          10 //error_status : none
816 #define VOL_PROFILE_NOT_SUPPORT        11
817 #define VOL_RCV_ERROR_OCCUR            12
818 #define VOL_VC1_NOT_SUPPORT            13
819 #define VOL_UNKNOW_CODEC_NOT_SUPPORT   14
820 #define VOL_SLQ_TBL_NOT_SUPPORT        15
821 #define VOL_FRAME_BUF_NOT_ENOUGH       16 //error_status : none
822 #define CODEC_MPEG4                    0x00 //arg0: 0: mpeg4, 1: mpeg4 with short_video_header, 2: DivX311
823 #define CODEC_MPEG4_SHORT_VIDEO_HEADER 0x01
824 #define CODEC_DIVX311                  0x02
825 #define CODEC_MPEG2                    0x10
826 typedef enum //arg1: 0: file mode 1:slq  2:live stream mode 3:slqtbl 4: Ts file mode
827 {
828     FILE_MODE = 0,
829     SLQ_MODE,
830     STREAM_MODE,
831     SLQ_TBL_MODE,
832     TS_FILE_MODE,
833     OTHER
834 }stream_type;
835 
836 typedef enum
837 {
838     E_MVD_CHIP_U01 = 0,
839     E_MVD_CHIP_U02,
840 }chip_eco_rev;
841 
842 #define ENABLE_PARSER                  0x00 //arg2: 0/1 enable/disable parser;
843 #define DISABLE_PARSER                 0x01
844 #define ENABLE_PKT_LEN                 0x02
845 #define PARSER_MPEG2                   0x00 //arg3: 0 13818-1 pes header;
846 #define PARSER_MPEG1                   0x01 //      1 11172-1 pes header;
847 
848 #define FrcNormal                         0
849 #define FrcDisplayTwice                   1 //output rate is twice of input rate (ex. 30p a 60p)
850 #define Frc32Pulldown                     2 //3:2 pulldown mode (ex. 24p a 60i or 60p)
851 #define FrcPALtoNTSC                      3 //PALaNTSC conversion (50i a 60i)
852 #define FrcNTSCtoPAL                      4 //NTSCaPAL conversion (60i a 50i)
853 #define FrcShowOneFiled                   5
854 #define FrcDisplayDropHalf                6
855 #define FrcDisplay120To50                 7
856 #define FrcDisplay100To60                 8
857 #define FrcDisplay30To50                  9
858 #define FrcDisplayRepeat51                10
859 #define FrcDisplayDrop51                  11
860 #define FrcDisplayDrop52                  12
861 #define FrcDisplayDrop53                  13
862 #define FrcDisplay50To30                  14
863 #define FrcDisplay60To24                  15
864 #define FrcDisplay60To25                  16
865 #define FrcDisplay30To24                  17
866 
867 #define FrcDisplayMultipleRepeat          20 //output_rate/input_rate=integer
868 #define FrcDisplayGeneralRepeat           21 //output_rate > input_rate, ex. 15->50...
869 #define FrcDisplayGeneralSkip             22 //output_rate < input_rate,
870 #define FrcDisplayThreeTimes              23
871 #define FrcDisplayFourTimes               24
872 
873 #define MVD3_FILE_SD_MODE              0x02 //960*544
874 #define MVD3_HD_MODE                   0x10 //1920*1088
875 #define MVD3_SD_MODE                   0x00 //720*576
876 #define MVD3_DHD_MODE                  0x20  // dual HD
877 #define MVD3_DHD_MODE_MIN              0x40  //ECO ISSUE : THE WIDTH OVER 2560 IN VC1 WILL HIT THE HW_ISSUE
878 
879 #define MVD_CMA_MODE                   0x1
880 // File mode avsync related
881 #define NONE_FILE_MODE                    0
882 #define FILE_PTS_MODE                     1
883 #define FILE_DTS_MODE                     2
884 #define FILE_STS_MODE                     3
885 
886 
887 // argument for "CMD_DISPLAY_PAUSE"
888 #define DISPLAY_PAUSE_OFF              0x00
889 #define DISPLAY_PAUSE_ON               0x01
890 
891 // argument for "CMD_FRC_DROP_BEHAVIOR"
892 #define FRC_DROP_FRAME                 0x00 // for default frc drop behavior, drop per frame
893 #define FRC_DROP_FIELD                 0x01 // for frc drop behavior, drop per field to improve more smoothly in field mode
894 
895 // ARG0 for "CMD_DRAM_OBF"
896 #define OBF_PAS1_WR                    0x01 // for Dram obf write index (Parser1 write)
897 #define OBF_VBUF1_RD                   0x02 // for Dram obf read index (VBUF1 read)
898 #define OBF_PES_FILE_IN1_WR            0x03 // for Dram obf read index for PESFI1
899 #define OBF_PAS2_WR                    0x04 // for Dram obf write index (Parser2 write)
900 #define OBF_VBUF2_RD                   0x05 // for Dram obf read index (VBUF2 read)
901 #define OBF_PES_FILE_IN2_WR            0x06 // for Dram obf read index for PESFI2
902 
903 //command interface
904 #define CMD_PLAY                       0x01
905 #define CMD_PAUSE                      0x02
906 #define CMD_STOP                       0x03
907 #define CMD_FIND_SEQ                   0x04 //find seq header and set command = pause at picture header start code found
908 #define CMD_SINGLE_STEP                0x05
909 #define CMD_PLAY_NO_SQE                0x06
910 #define CMD_FAST_SLOW                  0x07 //arg0: 0: nomarl mode, 1: decode I only,  2: deocde I/P only,  3: slow motion
911 #define CMD_CODEC_INFO                 0x08 //arg0: 0: mpeg4, 1: mpeg4 with short_video_header, 2: DivX311
912 #define CMD_SYN_THRESHOLD              0x09
913 #define CMD_SYNC_ON                    0x0a
914 #define CMD_SYNC_OFFSET                0x0b
915 #define CMD_DISPLAY_CTL                0x0c
916 //arg0: 0/1-display by display/decode order
917 //arg1:   1-drop display decoding error frame
918 //arg2:   1-drop display when decode fast than display
919 //arg3:set frame rate conversion mode
920 #define CMD_GET_SYNC_STAT               0x0d //return arg0: 0/1 sync off/on ; arg1: 3 sync init done
921 #define CMD_GET_AFD                     0x0e
922 #define CMD_SKIP_DATA                   0x0f //set to skip all data till find FW_SPE_SCODE to resume normal play
923 
924 #define CMD_STREAM_BUF_START           0x10
925 #define CMD_STREAM_BUF_END             0x11
926 #define CMD_FB_BASE                    0x12 //Frame buffer base address, from LSB to MSB are arg0, arg1, arg2, arg3
927 #define CMD_IAP_BUF_START              0x13
928 #define CMD_DP_BUF_START               0x14
929 #define CMD_MV_BUF_START               0x15
930 #define CMD_DMA_OVFTH                  0x16
931 #define CMD_DMA_UNFTH                  0x17
932 #define CMD_VC1_MIU_PROTECT_START      0x18
933 #define CMD_VC1_MIU_PROTECT_END        0x19
934 #define CMD_DISP_SPEED_CTRL            0x1a
935 #define CMD_STEP_DISP_DECODE_ONE       0x1b
936 #define CMD_STEP_DISP_ING              0x1c // repeat disp this frame
937 #define CMD_STEP_TO_PTS                0x1d
938 #define CMD_HANDSHAKE_STATUS           0x1e //report handshake status
939 #define CMD_DISPLAY_PAUSE              0x1f // display pause
940 
941 #define CMD_USER_BUF_START             0x20
942 #define CMD_USER_BUF_SIZE              0x21
943 #define CMD_RD_USER_WP                 0x22
944 #define CMD_WD_USER_RP                 0x23
945 #define CMD_RD_CC_PKTCNT               0x24
946 #define CMD_RD_CC_OV                   0x25
947 #define CMD_CLOSE_CC                   0x26
948 #define CMD_EN_CC_INFO_ENHANCE         0X27 // arg0=1, for enhance to dump the pts/tmp_ref info with each cc-608 packet for mstar cc-lib, 20120406
949 #define CMD_BUF_OFFSET                 0x2d // stream/frame buf offset, programable high adderss [bit-25] that allocate to low/high 256MB MIU:(only for K2)
950 #define CMD_ENABLE_VLD_TIMEOUT         0x2e // enable mvd vld timeout and threshold
951 #define CMD_ENABLE_INT_STAT            0x2f // set which int be enabled
952 
953 #define CMD_GET_INT_STAT               0x30
954 #define CMD_PARSE_M4V_PACKMD           0x31
955 #define CMD_RD_PTS                     0x32
956 #define CMD_FLUSH_LAST_IPFRAME         0x33
957 #define CMD_DECODE_STATUS              0x34 // arg0 = lastcommand ; arg1 = decode_status
958 #define CMD_VBUFFER_COUNT              0x35
959 #define CMD_START_DEC_STRICT           0x36 // start decoding in First I and skip non reference frame B decoding
960 #define CMD_SW_RESET                   0x37
961 #define CMD_MVD_FAST_INT               0x38
962 #define CMD_DIU_WIDTH_ALIGN            0x39
963 #define CMD_SW_IDX_ADJ                 0x3a // arg0=1 set sw_index as previous queue index infomation
964 #define CMD_PARSER_READ_POSITION       0x3b
965 #define CMD_REPEAT_MODE                0x3c // arg0=1 when frame display repeat only show one field
966 #define CMD_PTS_BASE                   0x3d
967 #define CMD_SKIP_TO_PTS                0x3e
968 #define CMD_AVSYNC_FREERUN_THRESHOLD   0x3f
969 
970 #define CMD_DEBUG_BUF_START            0x40
971 #define CMD_DEBUG_CTL                  0x42
972 #define CMD_RD_IO                      0x43
973 #define CMD_WR_IO                      0x44
974 #define CMD_FB_RED_SET                 0x45
975 #define CMD_FB_NUM                     0x46
976 #define CMD_PTS_DETECTOR_EN            0x47 // enable filter for stream discontinue // to force the pts follow stc when pts=-1
977 #define CMD_PTS_TBL_RESET              0x48 // to reset pas/vld and pts_tbl
978 #define CMD_DRAM_OBF                   0x49 // for Dram OBF key setting
979 #define CMD_FP_FILTER                  0x4A // 0:1 for disable/enable field polarity tuning filter, 0 for default...
980 #define CMD_PUSH_FIRST_FRAME_DISP      0x4B // 0:1 for disable/enable to push the first I-frame to dispQ when decoded done on ts and ts-file mode, 0 for default(disable)...
981 #define CMD_FAST_RST                   0x4C // 1 for enable mvd self reset...
982 #define CMD_RVU_EN                     0x4D //open RVU feature
983 
984 #define CMD_SLQ_START                  0x50 //SLQ start address, from LSB to MSB are arg0, arg1, arg2, arg3
985 #define CMD_SLQ_END                    0x51 //SLQ end address, from LSB to MSB are arg0, arg1, arg2, arg3
986 #define CMD_SLQ_AVAIL_LEVEL            0x52 //arg0: 4-0
987 #define CMD_FPGA_COMP                  0x53 //arg0: 1/0:enable/disable FPGA comp
988 #define CMD_DIVX_PATCH                 0x54 //arg0: D[0] divx mv p interlace chroma adjust
989 #define CMD_HEADER_INFO_BUF            0x55 //header info buffer base address, from LSB to MSB are arg0, arg1, arg2, arg3
990 #define CMD_IDCT_SEL                   0x56 // arg0 D[0]:0/1 llm/divx6   D[1]:0/1 unbias/bias rounding mode
991 #define CMD_VOL_INFO_BUF               0x57
992 #define CMD_FRAME_INFO_BUF             0x58
993 #define CMD_CODE_OFFSET                0x59
994 #define CMD_RESET_FRAMECOUNT           0x5a
995 #define CMD_CHIPID                     0x5b
996 #define CMD_DEC_FRAME_INFO_BUF         0x5c
997 #define CMD_GET_FW_VERSION             0x5E
998 #define CMD_GET_EN_CATCH_DATA          0x5F
999 
1000 #define CMD_SLQ_TBL_BUF_START          0x60
1001 #define CMD_SLQ_TBL_BUF_END            0x61
1002 #define CMD_SLQ_UPDATE_TBL_WPTR        0x62
1003 #define CMD_SLQ_GET_TBL_RPTR           0x63
1004 
1005 // FW stop updating frames when vsync, but decoding process is still going.
1006 #define CMD_FREEZE_DISP                0x64
1007 #define CMD_DS_VIRTUAL_BOX             0x65
1008 #define CMD_SHOW_ONE_FIELD             0x66
1009 #define CMD_FD_MASK_DELAY_CNT          0x67 // delay n's vsync then active the fd_mask
1010 
1011 #define CMD_UPDATE_FRAME               0x68 // updating next frame in slow motion mode
1012 #define CMD_FRC_OUPUT                  0x69
1013 #define CMD_FRC_DROP_BEHAVIOR          0x6A // arg0: FRC_DROP_FRAME/FRC_DROP_FIELD, default is FRC_DROP_FRAME
1014 
1015 #define CMD_GET_NEXTDISPFRM            0x6B // for Mstreamer mode and mcu mode
1016 #define CMD_FLIP_RELEASE_FRAME         0x6C // for Mstreamer mode and mcu mode
1017 #define CMD_SEND_UNI_PTS               0x6D // for Mstreamer mode and mcu mode
1018 #define CMD_SET_MST_MODE               0x6E // for Mstreamer mode and mcu mode
1019 #define CMD_SET_MCU_MODE               0x6F // for mcu mode
1020 
1021 #define CMD_DUMP_BITSTREAM_BASE        0x70
1022 #define CMD_DUMP_BITSTREAM_LENGTH      0x71
1023 
1024 #define CMD_XC_LOW_DELAY_PARA          0x72 // set the parameter for XC_low_delay mechanism
1025 
1026 #define CMD_MVD_IDLE                   0x73
1027 #define CMD_INTERFACE_VERSION          0x74
1028 #define CMD_VC1_STREAM_TYPE_JPEG       0x75
1029 #define CMD_VC1_STREAM_TYPE_MJPEG      0x76
1030 #define CMD_VC1_BYPASS_MODE            0x77
1031 #define CMD_VC1_UPDATE_SLQ             0x78
1032 #define CMD_VC1_HW_SLQ_RESET           0x79
1033 #define CMD_FLUSH_DISP_QUEUE           0x7A
1034 #define CMD_VC1_FORCE_INTLACE_DISP     0x7B
1035 #define CMD_VC1_IP_SCALE_THRESHOLD     0x7C
1036 #define CMD_MOTION_COM_REDUCE          0x7D
1037 #define CMD_CLOSE_DEBLOCK              0x7E
1038 #define CMD_FIXED_FRAME_BUFFER         0x7F
1039 #define CMD_ENABLE_AUTO_MUTE           0x80
1040 #define CMD_FORCE_ALIGN_VSIZE          0x81
1041 #define CMD_PROG_SEQ_STREAM            0x82
1042 
1043 // File mode avsync related
1044 #define CMD_ENABLE_AVSYNC_QUALIFIER     0x83// arg0=1:for enhance to do avsync when "enable_avsync=1" && "(lastcommand != CMD_PLAY)" for patch avsync on particular clip, 20120314
1045 #define CMD_ENABLE_LAST_FRAME_QUALIFIER 0x84// arg0=1:for strict qualify the last_frame_show_done after the last_frame been displayed by mvop, 20120309
1046 #define CMD_ENABLE_FILE_SYNC            0x85
1047 #define CMD_PTS_TBL_START               0x86
1048 #define CMD_FORCE_BLUE_SCREEN           0x87
1049 #define CMD_ENABLE_LAST_FRAME_SHOW      0x88
1050 #define CMD_DYNAMIC_SCALE_BASE          0x89
1051 #define CMD_ENABLE_DYNAMIC_SCALE        0x8A
1052 #define CMD_SCALER_INFO_BASE            0x8B
1053 #define CMD_SW_BITPLANE_BASE            0x8C
1054 #define CMD_FRONTEND_SEL                0x8D      // front end input selection
1055 #define CMD_ENABLE_FREEZE_PIC           0x8E
1056 #define CMD_FORBID_RESOLUTION_CHANGE    0x8F
1057 
1058 // JPEG command
1059 #define CMD_JPEG_CONSTRAIN_SIZE        0x91
1060 #define CMD_JPEG_STATUS                0x92
1061 #define CMD_JPEG_SCALEFACTOR           0x93
1062 #define CMD_JPEG_ROI                   0x94
1063 #define CMD_JPEG_ROI_DIM               0x95
1064 #define CMD_JPEG_IPM                   0x96
1065 
1066 #define CMD_ENABLE_SAM_UNI               0xA0 // for Mstreamer mode
1067 #define CMD_FLIP_TO_DISP                 0xA1 // for Mstreamer mode
1068 
1069 #define CMD_MIU_OFFSET                   0xA2 // saving miu offset from hk for LDMA usage
1070 #define CMD_IQMEM_CTRL                   0xA3 // for iqmem ctrl from HK
1071 #define CMD_IQMEM_CTRL_ACK               0xA4 // return ack by f/w
1072 #define CMD_IQMEM_BASE_ADDR              0xA5 // unit in byte
1073 
1074 // PES file-in command
1075 #define CMD_PES_FILE_LOW_BND           0xA6 // for pes file in mode low bound
1076 #define CMD_PES_FILE_UP_BND            0xA7 // for pes file in mode upper bound
1077 #define CMD_PES_FILE_EN                0xA8 // for enable pes file in mode
1078 #define CMD_PES_FILE_UPDATE_WPTR       0xA9 // for update pes file mode wr_ptr
1079 #define CMD_PES_FILE_GET_RPTR          0xAA // for got pes file in mode rd_ptr
1080 
1081 #define CMD_REGISTER_BASE              0xAB
1082 
1083 //new feature
1084 #define CMD_SUSPEND_DS                 0xB0
1085 #define CMD_MPEG_LINER_START           0xB1
1086 #define CMD_PREBUFFER_SIZE             0xB2 //unit:bytes
1087 #define CMD_CC_ENABLE_EXTERNAL_BUFFER  0xB3
1088 #define CMD_TIME_INCR_PREDICT	 	   0xB4 // to predict the "vol_time_incr" when there is no vol_header on mpeg4...
1089 #define CMD_RUNTIME_DEBUG_CMD          0XB5
1090 #define CMD_DUMP_MVD_HARDWARE_REGISTER 0xB6
1091 #define CMD_SMOOTH_REWIND              0xB7 //Smooth_rewind
1092 #define CMD_DECODE_ERROR_TOLERANCE     0xB8 //drop error rate
1093 #define CMD_PVR_SEAMLESS_MODE          0xB9
1094 #define CMD_AUTO_REDUCE_ES_DATA        0xBA
1095 #define CMD_MVD_TLB                    0xBB
1096 #define CMD_FRC_ONLY_SHOW_TOP_FIELD    0xBC
1097 #define CMD_THUMBNAIL_LESS_FB_MODE     0xBD
1098 #define CMD_ES_FULL_STOP               0xBE
1099 #define CMD_SET_DV_XC_SHM_ADDR         0xBF
1100 
1101 // add data in bitstream from skip mode back to normal
1102 // 00_00_01_C5_ab_08_06_27
1103 #define FW_SPE_SCODE                     0xC5
1104 #define FW_RESUME1                       0xab08
1105 #define FW_RESUME2                       0x0627
1106 #define FILE_PAUSE_SC                    0xBE
1107 #define FILE_END_SC                      0xC6
1108 #define FILE_END_EXT1                    0xaabb
1109 #define FILE_END_EXT2                    0xccdd
1110 #define FILE_END_EXT3                    0xeeff
1111 #define FILE_END_EXT4                    0xffff
1112 #define FILE_END_EXT5                    0x0000
1113 // For Git Changes
1114 #define GIT_TIMESTAMP 1457445222
1115 #endif
1116