1*53ee8cc1Swenshuai.xi //<MStar Software> 2*53ee8cc1Swenshuai.xi //****************************************************************************** 3*53ee8cc1Swenshuai.xi // MStar Software 4*53ee8cc1Swenshuai.xi // Copyright (c) 2010 - 2012 MStar Semiconductor, Inc. All rights reserved. 5*53ee8cc1Swenshuai.xi // All software, firmware and related documentation herein ("MStar Software") are 6*53ee8cc1Swenshuai.xi // intellectual property of MStar Semiconductor, Inc. ("MStar") and protected by 7*53ee8cc1Swenshuai.xi // law, including, but not limited to, copyright law and international treaties. 8*53ee8cc1Swenshuai.xi // Any use, modification, reproduction, retransmission, or republication of all 9*53ee8cc1Swenshuai.xi // or part of MStar Software is expressly prohibited, unless prior written 10*53ee8cc1Swenshuai.xi // permission has been granted by MStar. 11*53ee8cc1Swenshuai.xi // 12*53ee8cc1Swenshuai.xi // By accessing, browsing and/or using MStar Software, you acknowledge that you 13*53ee8cc1Swenshuai.xi // have read, understood, and agree, to be bound by below terms ("Terms") and to 14*53ee8cc1Swenshuai.xi // comply with all applicable laws and regulations: 15*53ee8cc1Swenshuai.xi // 16*53ee8cc1Swenshuai.xi // 1. MStar shall retain any and all right, ownership and interest to MStar 17*53ee8cc1Swenshuai.xi // Software and any modification/derivatives thereof. 18*53ee8cc1Swenshuai.xi // No right, ownership, or interest to MStar Software and any 19*53ee8cc1Swenshuai.xi // modification/derivatives thereof is transferred to you under Terms. 20*53ee8cc1Swenshuai.xi // 21*53ee8cc1Swenshuai.xi // 2. You understand that MStar Software might include, incorporate or be 22*53ee8cc1Swenshuai.xi // supplied together with third party`s software and the use of MStar 23*53ee8cc1Swenshuai.xi // Software may require additional licenses from third parties. 24*53ee8cc1Swenshuai.xi // Therefore, you hereby agree it is your sole responsibility to separately 25*53ee8cc1Swenshuai.xi // obtain any and all third party right and license necessary for your use of 26*53ee8cc1Swenshuai.xi // such third party`s software. 27*53ee8cc1Swenshuai.xi // 28*53ee8cc1Swenshuai.xi // 3. MStar Software and any modification/derivatives thereof shall be deemed as 29*53ee8cc1Swenshuai.xi // MStar`s confidential information and you agree to keep MStar`s 30*53ee8cc1Swenshuai.xi // confidential information in strictest confidence and not disclose to any 31*53ee8cc1Swenshuai.xi // third party. 32*53ee8cc1Swenshuai.xi // 33*53ee8cc1Swenshuai.xi // 4. MStar Software is provided on an "AS IS" basis without warranties of any 34*53ee8cc1Swenshuai.xi // kind. Any warranties are hereby expressly disclaimed by MStar, including 35*53ee8cc1Swenshuai.xi // without limitation, any warranties of merchantability, non-infringement of 36*53ee8cc1Swenshuai.xi // intellectual property rights, fitness for a particular purpose, error free 37*53ee8cc1Swenshuai.xi // and in conformity with any international standard. You agree to waive any 38*53ee8cc1Swenshuai.xi // claim against MStar for any loss, damage, cost or expense that you may 39*53ee8cc1Swenshuai.xi // incur related to your use of MStar Software. 40*53ee8cc1Swenshuai.xi // In no event shall MStar be liable for any direct, indirect, incidental or 41*53ee8cc1Swenshuai.xi // consequential damages, including without limitation, lost of profit or 42*53ee8cc1Swenshuai.xi // revenues, lost or damage of data, and unauthorized system use. 43*53ee8cc1Swenshuai.xi // You agree that this Section 4 shall still apply without being affected 44*53ee8cc1Swenshuai.xi // even if MStar Software has been modified by MStar in accordance with your 45*53ee8cc1Swenshuai.xi // request or instruction for your use, except otherwise agreed by both 46*53ee8cc1Swenshuai.xi // parties in writing. 47*53ee8cc1Swenshuai.xi // 48*53ee8cc1Swenshuai.xi // 5. If requested, MStar may from time to time provide technical supports or 49*53ee8cc1Swenshuai.xi // services in relation with MStar Software to you for your use of 50*53ee8cc1Swenshuai.xi // MStar Software in conjunction with your or your customer`s product 51*53ee8cc1Swenshuai.xi // ("Services"). 52*53ee8cc1Swenshuai.xi // You understand and agree that, except otherwise agreed by both parties in 53*53ee8cc1Swenshuai.xi // writing, Services are provided on an "AS IS" basis and the warranty 54*53ee8cc1Swenshuai.xi // disclaimer set forth in Section 4 above shall apply. 55*53ee8cc1Swenshuai.xi // 56*53ee8cc1Swenshuai.xi // 6. Nothing contained herein shall be construed as by implication, estoppels 57*53ee8cc1Swenshuai.xi // or otherwise: 58*53ee8cc1Swenshuai.xi // (a) conferring any license or right to use MStar name, trademark, service 59*53ee8cc1Swenshuai.xi // mark, symbol or any other identification; 60*53ee8cc1Swenshuai.xi // (b) obligating MStar or any of its affiliates to furnish any person, 61*53ee8cc1Swenshuai.xi // including without limitation, you and your customers, any assistance 62*53ee8cc1Swenshuai.xi // of any kind whatsoever, or any information; or 63*53ee8cc1Swenshuai.xi // (c) conferring any license or right under any intellectual property right. 64*53ee8cc1Swenshuai.xi // 65*53ee8cc1Swenshuai.xi // 7. These terms shall be governed by and construed in accordance with the laws 66*53ee8cc1Swenshuai.xi // of Taiwan, R.O.C., excluding its conflict of law rules. 67*53ee8cc1Swenshuai.xi // Any and all dispute arising out hereof or related hereto shall be finally 68*53ee8cc1Swenshuai.xi // settled by arbitration referred to the Chinese Arbitration Association, 69*53ee8cc1Swenshuai.xi // Taipei in accordance with the ROC Arbitration Law and the Arbitration 70*53ee8cc1Swenshuai.xi // Rules of the Association by three (3) arbitrators appointed in accordance 71*53ee8cc1Swenshuai.xi // with the said Rules. 72*53ee8cc1Swenshuai.xi // The place of arbitration shall be in Taipei, Taiwan and the language shall 73*53ee8cc1Swenshuai.xi // be English. 74*53ee8cc1Swenshuai.xi // The arbitration award shall be final and binding to both parties. 75*53ee8cc1Swenshuai.xi // 76*53ee8cc1Swenshuai.xi //****************************************************************************** 77*53ee8cc1Swenshuai.xi //<MStar Software> 78*53ee8cc1Swenshuai.xi #ifndef __M4VD_MSG_QUE_H__ 79*53ee8cc1Swenshuai.xi #define __M4VD_MSG_QUE_H__ 80*53ee8cc1Swenshuai.xi 81*53ee8cc1Swenshuai.xi 82*53ee8cc1Swenshuai.xi #if defined(SUPPORT_NEW_MEM_LAYOUT) 83*53ee8cc1Swenshuai.xi #if defined(SUPPORT_EVD) && (1==SUPPORT_EVD) 84*53ee8cc1Swenshuai.xi #define OFFSET_BASE 0x000b0000 85*53ee8cc1Swenshuai.xi #else 86*53ee8cc1Swenshuai.xi #define OFFSET_BASE 0x000a0000 87*53ee8cc1Swenshuai.xi #endif 88*53ee8cc1Swenshuai.xi #else 89*53ee8cc1Swenshuai.xi #define OFFSET_BASE 0x000e0000 90*53ee8cc1Swenshuai.xi #endif 91*53ee8cc1Swenshuai.xi #define VSYNC_BRIGE_SHM_OFFSET 0x1FA00 92*53ee8cc1Swenshuai.xi 93*53ee8cc1Swenshuai.xi #define FW_VOL_INFO_START (0x000+OFFSET_BASE) 94*53ee8cc1Swenshuai.xi #define DEBUG_BUF_START (0x500+OFFSET_BASE) 95*53ee8cc1Swenshuai.xi #define FW_FRAME_INFO_START (0x1000+OFFSET_BASE) 96*53ee8cc1Swenshuai.xi #define FW_DIVX_INFO_START (0x2000+OFFSET_BASE) 97*53ee8cc1Swenshuai.xi #define DEC_FRMAE_INFO_START (0x14300+OFFSET_BASE) 98*53ee8cc1Swenshuai.xi #define VSYNC_BRIGE_SHM_START (VSYNC_BRIGE_SHM_OFFSET+OFFSET_BASE) 99*53ee8cc1Swenshuai.xi 100*53ee8cc1Swenshuai.xi #define MVD_DRAM_SIZE 0x40000 // MVD DRAM heap size, 256k 101*53ee8cc1Swenshuai.xi 102*53ee8cc1Swenshuai.xi /* 103*53ee8cc1Swenshuai.xi Share Memory layout 104*53ee8cc1Swenshuai.xi 105*53ee8cc1Swenshuai.xi | FW_VOL_INFO | DEBUG_BUF | FW_FRAME_INFO | FW_DIVX_INFO | USERDATABUF | SLQBUF | PTSTBL | DSADDR | SCALER_INFO | DEC_FRMAE_INFO | 106*53ee8cc1Swenshuai.xi 0 500 1000 2000 3000 B000 B200 13200 14200 14300 14400 (+OFFSET_BASE) 107*53ee8cc1Swenshuai.xi 108*53ee8cc1Swenshuai.xi */ 109*53ee8cc1Swenshuai.xi 110*53ee8cc1Swenshuai.xi // VC1_SEQ_INFO put on 65K 111*53ee8cc1Swenshuai.xi #define FW_VERSION 0x08043655 112*53ee8cc1Swenshuai.xi #define INTERFACE_VERSION 0x00000344 //ver.344 dd CMD_AUTO_REDUCE_ES_DATA (sync from x14) 113*53ee8cc1Swenshuai.xi #define EN_SECTION_START 0x20000000 114*53ee8cc1Swenshuai.xi 115*53ee8cc1Swenshuai.xi typedef struct _FW_VOL_INFO 116*53ee8cc1Swenshuai.xi { 117*53ee8cc1Swenshuai.xi //VOL infomation 118*53ee8cc1Swenshuai.xi unsigned short vol_info; //0 119*53ee8cc1Swenshuai.xi // D[5] short_video_header; //1 120*53ee8cc1Swenshuai.xi // D[4] vol_interlaced; 121*53ee8cc1Swenshuai.xi // D[3] vol_qpel; 122*53ee8cc1Swenshuai.xi // D[2] vol_rsync_marker_disable; 123*53ee8cc1Swenshuai.xi // D[1] vol_dp_enable; 124*53ee8cc1Swenshuai.xi // D[0] vol_rvlc_enable; 125*53ee8cc1Swenshuai.xi unsigned short sprite_usage; //2 126*53ee8cc1Swenshuai.xi 127*53ee8cc1Swenshuai.xi unsigned int width; //4 128*53ee8cc1Swenshuai.xi unsigned int height; //8 129*53ee8cc1Swenshuai.xi 130*53ee8cc1Swenshuai.xi unsigned short pts_incr; //12 131*53ee8cc1Swenshuai.xi unsigned short reserved0; //14 132*53ee8cc1Swenshuai.xi 133*53ee8cc1Swenshuai.xi unsigned char aspect_ratio; //16 134*53ee8cc1Swenshuai.xi unsigned char progressive_sequence; //17 135*53ee8cc1Swenshuai.xi unsigned char mpeg1; //18 136*53ee8cc1Swenshuai.xi unsigned char play_mode; //19 137*53ee8cc1Swenshuai.xi 138*53ee8cc1Swenshuai.xi unsigned char mpeg_frc_mode; //20 139*53ee8cc1Swenshuai.xi unsigned char first_display; //21 140*53ee8cc1Swenshuai.xi unsigned char low_delay; //22 141*53ee8cc1Swenshuai.xi unsigned char video_range; //23 142*53ee8cc1Swenshuai.xi 143*53ee8cc1Swenshuai.xi unsigned int bit_rate; //24 144*53ee8cc1Swenshuai.xi 145*53ee8cc1Swenshuai.xi unsigned short vol_time_incr_res; //28 146*53ee8cc1Swenshuai.xi unsigned short fixed_vop_time_incr; //30 // 0: not fixed_vop_rate others : vop_time_incr 147*53ee8cc1Swenshuai.xi 148*53ee8cc1Swenshuai.xi unsigned char par_width; //32 149*53ee8cc1Swenshuai.xi unsigned char par_height; //33 150*53ee8cc1Swenshuai.xi unsigned char reserved1; //34 151*53ee8cc1Swenshuai.xi unsigned char reserved2; //35 152*53ee8cc1Swenshuai.xi 153*53ee8cc1Swenshuai.xi unsigned int vc1_frame_rate; //36 154*53ee8cc1Swenshuai.xi unsigned int frame_rate; //40 155*53ee8cc1Swenshuai.xi 156*53ee8cc1Swenshuai.xi unsigned char key_gen[32]; //44 157*53ee8cc1Swenshuai.xi 158*53ee8cc1Swenshuai.xi unsigned char ds_enable; //76 159*53ee8cc1Swenshuai.xi unsigned char reserved3; //77 160*53ee8cc1Swenshuai.xi unsigned short CropBottom; //78 // For HDMI 3D Output mode. 161*53ee8cc1Swenshuai.xi 162*53ee8cc1Swenshuai.xi unsigned int DSbufsize; //80 163*53ee8cc1Swenshuai.xi unsigned char suspend_ds; //84 164*53ee8cc1Swenshuai.xi unsigned char reserved4[3]; //85 165*53ee8cc1Swenshuai.xi }FW_VOL_INFO,*pFW_VOL_INFO;//16 byte 166*53ee8cc1Swenshuai.xi 167*53ee8cc1Swenshuai.xi #define OFFSET_VOL_INFO 0 168*53ee8cc1Swenshuai.xi #define OFFSET_SPRITE_USAGE 2 169*53ee8cc1Swenshuai.xi #define OFFSET_WIDTH 4 170*53ee8cc1Swenshuai.xi #define OFFSET_HEIGHT 8 171*53ee8cc1Swenshuai.xi #define OFFSET_PTS_INCR 12 172*53ee8cc1Swenshuai.xi #define OFFSET_RESERVED0 14 173*53ee8cc1Swenshuai.xi #define OFFSET_ASPECT_RATIO 16 174*53ee8cc1Swenshuai.xi #define OFFSET_PROGRESSIVE_SEQUENCE 17 175*53ee8cc1Swenshuai.xi #define OFFSET_MPEG1 18 176*53ee8cc1Swenshuai.xi #define OFFSET_PLAY_MODE 19 177*53ee8cc1Swenshuai.xi #define OFFSET_MPEG_FRC_MODE 20 178*53ee8cc1Swenshuai.xi #define OFFSET_FIRST_DISPLAY 21 179*53ee8cc1Swenshuai.xi #define OFFSET_LOW_DELAY 22 180*53ee8cc1Swenshuai.xi #define OFFSET_VIDEO_RANGE 23 181*53ee8cc1Swenshuai.xi #define OFFSET_BIT_RATE 24 182*53ee8cc1Swenshuai.xi #define OFFSET_VOL_TIME_INCR_RES 28 183*53ee8cc1Swenshuai.xi #define OFFSET_FIXED_VOP_TIME_INCR 30 184*53ee8cc1Swenshuai.xi #define OFFSET_PAR_WIDTH 32 185*53ee8cc1Swenshuai.xi #define OFFSET_PAR_HEIGHT 33 186*53ee8cc1Swenshuai.xi #define OFFSET_VC1_FRAME_RATE 36 187*53ee8cc1Swenshuai.xi #define OFFSET_FRAME_RATE 40 188*53ee8cc1Swenshuai.xi #define OFFSET_KEY_GEN 44 189*53ee8cc1Swenshuai.xi #define OFFSET_DS_ENABLE 76 190*53ee8cc1Swenshuai.xi #define OFFSET_CROPBOTTOM 78 191*53ee8cc1Swenshuai.xi #define OFFSET_DSBUFSIZE 80 192*53ee8cc1Swenshuai.xi #define OFFSET_SUSPEND_DS 84 193*53ee8cc1Swenshuai.xi 194*53ee8cc1Swenshuai.xi typedef struct 195*53ee8cc1Swenshuai.xi { 196*53ee8cc1Swenshuai.xi union 197*53ee8cc1Swenshuai.xi { 198*53ee8cc1Swenshuai.xi struct 199*53ee8cc1Swenshuai.xi { 200*53ee8cc1Swenshuai.xi unsigned int mvdcmd_handshake_pause : 1; // 1 for handshake ready with CMD_PAUSE, 201*53ee8cc1Swenshuai.xi unsigned int mvdcmd_handshake_slq_reset : 1; // 1 for handshake ready with CMD_VC1_HW_SLQ_RESET 202*53ee8cc1Swenshuai.xi unsigned int mvdcmd_handshake_stop : 1; // 1 for handshake ready with CMD_STOP 203*53ee8cc1Swenshuai.xi unsigned int mvdcmd_handshake_skip_data : 1; // 1 for handshake ready with CMD_SKIP_DATA 204*53ee8cc1Swenshuai.xi unsigned int mvdcmd_handshake_skip_to_pts : 1; // 1 for handshake ready with CMD_SKIP_TO_PTS 205*53ee8cc1Swenshuai.xi unsigned int mvdcmd_handshake_single_step : 1; // 1 for handshake ready with CMD_SINGLE_STEP 206*53ee8cc1Swenshuai.xi unsigned int mvdcmd_handshake_scaler_data_ready : 1; 207*53ee8cc1Swenshuai.xi unsigned int mvdcmd_handshake_get_nextdispfrm_ready : 1; // for Mstreamer mode 208*53ee8cc1Swenshuai.xi unsigned int mvdcmd_handshake_parser_rst : 1; // 1 for handshake done with CMD_PTS_TBL_RESET 209*53ee8cc1Swenshuai.xi unsigned int mvdcmd_handshake_cc608_rst : 1; // "0" for handshake done with mstar cc608 210*53ee8cc1Swenshuai.xi unsigned int mvdcmd_handshake_cc708_rst : 1; // "0" for handshake done with mstar cc708 211*53ee8cc1Swenshuai.xi unsigned int mvdcmd_handshake_fast_rst : 1; // 1 for handshake done with CMD_FAST_RST, 1 for fast_rst_done... 212*53ee8cc1Swenshuai.xi unsigned int mvdcmd_handshake_detatch : 1; // 1 for handshake ready with exit main loop 213*53ee8cc1Swenshuai.xi unsigned int mvdcmd_handshake_pvr_seamless_mode : 1; // 1 for handshake ready 214*53ee8cc1Swenshuai.xi unsigned int mvdcmd_handshake_reserved : 18; // reserved for extend 215*53ee8cc1Swenshuai.xi }; 216*53ee8cc1Swenshuai.xi unsigned int value; 217*53ee8cc1Swenshuai.xi }; 218*53ee8cc1Swenshuai.xi }MVD_CMD_HANDSHADE_INDEX; 219*53ee8cc1Swenshuai.xi 220*53ee8cc1Swenshuai.xi typedef struct 221*53ee8cc1Swenshuai.xi { 222*53ee8cc1Swenshuai.xi union 223*53ee8cc1Swenshuai.xi { 224*53ee8cc1Swenshuai.xi struct 225*53ee8cc1Swenshuai.xi { 226*53ee8cc1Swenshuai.xi unsigned int mvd_xc_disable_black_screen : 1; // 1 for XC disable the black screen, defaule is "0"... 227*53ee8cc1Swenshuai.xi unsigned int mvd_xc_release_force_rbank : 1; // 1 for XC release force read bank, defaule is "0"... 228*53ee8cc1Swenshuai.xi unsigned int mvd_xc_release_bob_mode : 1; // 1 for XC release BOB mode, defaule is "0"... 229*53ee8cc1Swenshuai.xi unsigned int mvd_xc_release_UCNR : 1; // 1 for XC release UCNR, defaule is "0"... 230*53ee8cc1Swenshuai.xi unsigned int mvd_xc_reserved : 28; // reserved for extend 231*53ee8cc1Swenshuai.xi }; 232*53ee8cc1Swenshuai.xi unsigned int value; 233*53ee8cc1Swenshuai.xi }; 234*53ee8cc1Swenshuai.xi }MVD_XC_LOW_DELAY_INT_STATE; 235*53ee8cc1Swenshuai.xi 236*53ee8cc1Swenshuai.xi typedef struct _FW_FRAME_INFO 237*53ee8cc1Swenshuai.xi { 238*53ee8cc1Swenshuai.xi unsigned int frame_count; //0 239*53ee8cc1Swenshuai.xi unsigned int slq_tbl_rptr; //4 // ==>ms 240*53ee8cc1Swenshuai.xi unsigned int vol_update; //8 241*53ee8cc1Swenshuai.xi unsigned int error_code; //12 242*53ee8cc1Swenshuai.xi 243*53ee8cc1Swenshuai.xi unsigned int error_status; //16 244*53ee8cc1Swenshuai.xi unsigned int skip_frame_count; //20 245*53ee8cc1Swenshuai.xi unsigned int picture_type; //24 // 0:I frame 1:P frame 2:B frame 246*53ee8cc1Swenshuai.xi unsigned int slq_sw_index; //28 247*53ee8cc1Swenshuai.xi 248*53ee8cc1Swenshuai.xi unsigned char fb_index; //32 249*53ee8cc1Swenshuai.xi unsigned char top_ff; //33 250*53ee8cc1Swenshuai.xi unsigned char repeat_ff; //34 251*53ee8cc1Swenshuai.xi unsigned char invalidstream; //35 252*53ee8cc1Swenshuai.xi unsigned int vld_err_count; //36 253*53ee8cc1Swenshuai.xi unsigned short tmp_ref; //40 254*53ee8cc1Swenshuai.xi unsigned char first_frame; //42 255*53ee8cc1Swenshuai.xi unsigned char first_I_found; //43 256*53ee8cc1Swenshuai.xi unsigned int gop_i_fcnt; //44 257*53ee8cc1Swenshuai.xi 258*53ee8cc1Swenshuai.xi unsigned int gop_p_fcnt; //48 259*53ee8cc1Swenshuai.xi unsigned int gop_b_fcnt; //52 260*53ee8cc1Swenshuai.xi unsigned int overflow_count; //56 261*53ee8cc1Swenshuai.xi unsigned int time_incr; //60 262*53ee8cc1Swenshuai.xi 263*53ee8cc1Swenshuai.xi unsigned int self_rst_count; //64 264*53ee8cc1Swenshuai.xi unsigned int sw_vd_count; //68 265*53ee8cc1Swenshuai.xi unsigned int step_disp_done; //72 266*53ee8cc1Swenshuai.xi unsigned int step_to_pts_done; //76 267*53ee8cc1Swenshuai.xi 268*53ee8cc1Swenshuai.xi MVD_CMD_HANDSHADE_INDEX cmd_handshake_index; //80 269*53ee8cc1Swenshuai.xi unsigned int last_frame_show_done; //84 270*53ee8cc1Swenshuai.xi unsigned int meet_file_end_sc; //88 271*53ee8cc1Swenshuai.xi unsigned int rcv_payload_lenth; //92 272*53ee8cc1Swenshuai.xi 273*53ee8cc1Swenshuai.xi unsigned int firmware_version; //96 274*53ee8cc1Swenshuai.xi unsigned int ic_version; //100 275*53ee8cc1Swenshuai.xi unsigned int interface_version; //104 276*53ee8cc1Swenshuai.xi unsigned char color_primaries; //108 277*53ee8cc1Swenshuai.xi unsigned char transfer_char; //109 278*53ee8cc1Swenshuai.xi unsigned char matrix_coef; //110 279*53ee8cc1Swenshuai.xi unsigned char video_format; //111 280*53ee8cc1Swenshuai.xi 281*53ee8cc1Swenshuai.xi unsigned short disp_h_size; //112 282*53ee8cc1Swenshuai.xi unsigned short disp_v_size; //114 283*53ee8cc1Swenshuai.xi unsigned char time_code_hours; //116 284*53ee8cc1Swenshuai.xi unsigned char time_code_minutes; //117 285*53ee8cc1Swenshuai.xi unsigned char time_code_seconds; //118 286*53ee8cc1Swenshuai.xi unsigned char time_code_pictures; //119 287*53ee8cc1Swenshuai.xi unsigned char drop_frame_flag; //120 288*53ee8cc1Swenshuai.xi unsigned char time_code_hours_disp; //121 289*53ee8cc1Swenshuai.xi unsigned char time_code_minutes_disp; //122 290*53ee8cc1Swenshuai.xi unsigned char time_code_seconds_disp; //123 291*53ee8cc1Swenshuai.xi unsigned char time_code_pictures_disp; //124 292*53ee8cc1Swenshuai.xi unsigned char drop_frame_flag_disp; //125 293*53ee8cc1Swenshuai.xi unsigned char PicStruct; //126 294*53ee8cc1Swenshuai.xi unsigned char chroma_format; //127 295*53ee8cc1Swenshuai.xi 296*53ee8cc1Swenshuai.xi int pts_stc; //128 297*53ee8cc1Swenshuai.xi unsigned int displayed_cnt; //132 298*53ee8cc1Swenshuai.xi unsigned int next_pts; //136 299*53ee8cc1Swenshuai.xi unsigned short centre_h_offset; //140 300*53ee8cc1Swenshuai.xi unsigned short centre_v_offset; //142 301*53ee8cc1Swenshuai.xi 302*53ee8cc1Swenshuai.xi unsigned int int_cnt; //144 303*53ee8cc1Swenshuai.xi unsigned int disp_pts; //148 // pts of current displayed frame 304*53ee8cc1Swenshuai.xi unsigned int high32_pts; //152 // msb of 33-bit pts 305*53ee8cc1Swenshuai.xi unsigned char dispQnum; //156 306*53ee8cc1Swenshuai.xi unsigned char CurrentESBufferStatus; //157 // init:0x00,underflow:0x01,overflow:0x02,normal:0x03 307*53ee8cc1Swenshuai.xi unsigned char reserved[2]; //158 308*53ee8cc1Swenshuai.xi 309*53ee8cc1Swenshuai.xi unsigned int divx_ver_5x; //160 // report divx version... 310*53ee8cc1Swenshuai.xi unsigned int frame_buf_size; //164 // report real frame buffer size(unit in bytes)... 311*53ee8cc1Swenshuai.xi MVD_XC_LOW_DELAY_INT_STATE xc_low_delay_int_state; //168 // for xc low delay interrupt status... 312*53ee8cc1Swenshuai.xi unsigned int xc_low_delay_cnt; //172 313*53ee8cc1Swenshuai.xi 314*53ee8cc1Swenshuai.xi unsigned int xc_diff_field_no; //176 // for get XC diff field number... 315*53ee8cc1Swenshuai.xi unsigned int xc_low_delay_cnt_latched; //180 // for dbg xc_low_delay timing only... 316*53ee8cc1Swenshuai.xi unsigned int drop_count; //184 // for counting that decoded frame who doesn't display 317*53ee8cc1Swenshuai.xi 318*53ee8cc1Swenshuai.xi unsigned int rdptr_pts_low; //188 // for TM14 pts flow control, pts based on pts table read pointer 319*53ee8cc1Swenshuai.xi unsigned int rdptr_pts_high; //192 // for TM14 pts flow control, pts based on pts table read pointer 320*53ee8cc1Swenshuai.xi unsigned int wrptr_pts_low; //196 // for TM14 pts flow control, pts based on pts table write pointer 321*53ee8cc1Swenshuai.xi unsigned int wrptr_pts_high; //200 // for TM14 pts flow control, pts based on pts table write pointer 322*53ee8cc1Swenshuai.xi 323*53ee8cc1Swenshuai.xi unsigned int wait_decode_done_cnt; //204 324*53ee8cc1Swenshuai.xi unsigned int wait_seach_buffer_cnt; //208 325*53ee8cc1Swenshuai.xi unsigned int wait_search_code_cnt; //212 326*53ee8cc1Swenshuai.xi unsigned int wait_pre_buf_cnt; //216 327*53ee8cc1Swenshuai.xi unsigned int wait_vfifo_buf_cnt; //220 328*53ee8cc1Swenshuai.xi unsigned int wait_search_header_cnt; //224 329*53ee8cc1Swenshuai.xi unsigned int wait_flash_pattern_cnt; //228 330*53ee8cc1Swenshuai.xi unsigned int pvr_seamless_status; //232 331*53ee8cc1Swenshuai.xi unsigned char framebufferresource; //236 // default: 0, ok: 1, fail : 2 332*53ee8cc1Swenshuai.xi 333*53ee8cc1Swenshuai.xi }FW_FRAME_INFO, *pFW_FRAME_INFO; 334*53ee8cc1Swenshuai.xi 335*53ee8cc1Swenshuai.xi #define OFFSET_FRAME_COUNT 0 336*53ee8cc1Swenshuai.xi #define OFFSET_SLQ_TBL_RPTR 4 337*53ee8cc1Swenshuai.xi #define OFFSET_VOL_UPDATE 8 338*53ee8cc1Swenshuai.xi #define OFFSET_ERROR_CODE 12 339*53ee8cc1Swenshuai.xi #define OFFSET_ERROR_STATUS 16 340*53ee8cc1Swenshuai.xi #define OFFSET_SKIP_FRAME_COUNT 20 341*53ee8cc1Swenshuai.xi #define OFFSET_PICTURE_TYPE 24 342*53ee8cc1Swenshuai.xi #define OFFSET_SLQ_SW_INDEX 28 343*53ee8cc1Swenshuai.xi #define OFFSET_FB_INDEX 32 344*53ee8cc1Swenshuai.xi #define OFFSET_TOP_FF 33 345*53ee8cc1Swenshuai.xi #define OFFSET_REPEAT_FF 34 346*53ee8cc1Swenshuai.xi #define OFFSET_INVALIDSTREAM 35 347*53ee8cc1Swenshuai.xi #define OFFSET_VLD_ERR_COUNT 36 348*53ee8cc1Swenshuai.xi #define OFFSET_TMP_REF 40 349*53ee8cc1Swenshuai.xi #define OFFSET_FIRST_FRAME 42 350*53ee8cc1Swenshuai.xi #define OFFSET_FIRST_I_FOUND 43 351*53ee8cc1Swenshuai.xi #define OFFSET_GOP_I_FCNT 44 352*53ee8cc1Swenshuai.xi #define OFFSET_GOP_P_FCNT 48 353*53ee8cc1Swenshuai.xi #define OFFSET_GOP_B_FCNT 52 354*53ee8cc1Swenshuai.xi #define OFFSET_OVERFLOW_COUNT 56 355*53ee8cc1Swenshuai.xi #define OFFSET_TIME_INCR 60 356*53ee8cc1Swenshuai.xi #define OFFSET_SELF_RST_COUNT 64 357*53ee8cc1Swenshuai.xi #define OFFSET_SW_VD_COUNT 68 358*53ee8cc1Swenshuai.xi #define OFFSET_STEP_DISP_DONE 72 359*53ee8cc1Swenshuai.xi #define OFFSET_STEP_TO_PTS_DONE 76 360*53ee8cc1Swenshuai.xi #define OFFSET_CMD_HANDSHAKE_INDEX 80 361*53ee8cc1Swenshuai.xi #define OFFSET_CMD_LAST_FRAME_SHOW 84 362*53ee8cc1Swenshuai.xi #define OFFSET_MEET_FILE_END_SC 88 363*53ee8cc1Swenshuai.xi #define OFFSET_RCV_PAYLOAD_LENGTH 92 364*53ee8cc1Swenshuai.xi #define OFFSET_FIRMWARE_VERSION 96 365*53ee8cc1Swenshuai.xi #define OFFSET_IC_VERSION 100 366*53ee8cc1Swenshuai.xi #define OFFSET_INTERFACE_VERSION 104 367*53ee8cc1Swenshuai.xi #define OFFSET_COLOR_PRIMARIES 108 368*53ee8cc1Swenshuai.xi #define OFFSET_TRANSFER_CHAR 109 369*53ee8cc1Swenshuai.xi #define OFFSET_MATRIX_COEF 110 370*53ee8cc1Swenshuai.xi #define OFFSET_VIDEO_FORMAT 111 371*53ee8cc1Swenshuai.xi #define OFFSET_DISP_H_SIZE 112 372*53ee8cc1Swenshuai.xi #define OFFSET_DISP_V_SIZE 114 373*53ee8cc1Swenshuai.xi #define OFFSET_TIME_CODE_HOURS 116 // for decoding frame 374*53ee8cc1Swenshuai.xi #define OFFSET_TIME_CODE_MINUTES 117 // for decoding frame 375*53ee8cc1Swenshuai.xi #define OFFSET_TIME_CODE_SECONDS 118 // for decoding frame 376*53ee8cc1Swenshuai.xi #define OFFSET_TIME_CODE_PICTURES 119 // for decoding frame 377*53ee8cc1Swenshuai.xi #define OFFSET_DROP_FRAME_FLAG 120 // for decoding frame 378*53ee8cc1Swenshuai.xi #define OFFSET_TIME_CODE_HOURS_DISP 121 // for displaying frame 379*53ee8cc1Swenshuai.xi #define OFFSET_TIME_CODE_MINUTES_DISP 122 // for displaying frame 380*53ee8cc1Swenshuai.xi #define OFFSET_TIME_CODE_SECONDS_DISP 123 // for displaying frame 381*53ee8cc1Swenshuai.xi #define OFFSET_TIME_CODE_PICTURES_DISP 124 // for displaying frame 382*53ee8cc1Swenshuai.xi #define OFFSET_DROP_FRAME_FLAG_DISP 125 // for displaying frame 383*53ee8cc1Swenshuai.xi #define OFFSET_PICTURE_STRUCTURE 126 384*53ee8cc1Swenshuai.xi #define OFFSET_CHROMA_FORMAT 127 385*53ee8cc1Swenshuai.xi #define OFFSET_PTS_STC 128 // integer, pts_stc(n)=pts(n)-stc(n) 386*53ee8cc1Swenshuai.xi #define OFFSET_DISPLAYED_CNT 132 387*53ee8cc1Swenshuai.xi #define OFFSET_NEXT_PTS 136 388*53ee8cc1Swenshuai.xi #define OFFSET_CENTRE_H_OFFSET 140 389*53ee8cc1Swenshuai.xi #define OFFSET_CENTRE_V_OFFSET 142 390*53ee8cc1Swenshuai.xi #define OFFSET_INT_CNT 144 391*53ee8cc1Swenshuai.xi #define OFFSET_DISP_PTS 148 392*53ee8cc1Swenshuai.xi #define OFFSET_DISP_PTS_MSB 152 393*53ee8cc1Swenshuai.xi #define OFFSET_DISPQ_NUM 156 394*53ee8cc1Swenshuai.xi #define OFFSET_CURRENT_ES_BUFFER_STATUS 157 395*53ee8cc1Swenshuai.xi #define OFFSET_DIVX_VER_5X 160 396*53ee8cc1Swenshuai.xi #define OFFSET_FRAME_BUF_SIZE 164 // report real frame buffer size(unit in bytes)... 397*53ee8cc1Swenshuai.xi #define OFFSET_XC_LOW_DELAY_INT_STATE 168 // for xc low delay interrupt status... 398*53ee8cc1Swenshuai.xi #define OFFSET_XC_LOW_DELAY_CNT 172 // for xc low delay interrupt status... 399*53ee8cc1Swenshuai.xi #define OFFSET_XC_DIFF_FIELD_NO 176 // for get XC diff field number... 400*53ee8cc1Swenshuai.xi #define OFFSET_XC_LOW_DELAY_CNT_LATCH 180 // for dbg xc_low_delay timing only... 401*53ee8cc1Swenshuai.xi #define OFFSET_DROP_COUNT 184 // for counting that decoded frame who doesn't display 402*53ee8cc1Swenshuai.xi #define OFFSET_RDPTR_PTS_LOW 188 403*53ee8cc1Swenshuai.xi #define OFFSET_RDPTR_PTS_HIGH 192 404*53ee8cc1Swenshuai.xi #define OFFSET_WRPTR_PTS_LOW 196 405*53ee8cc1Swenshuai.xi #define OFFSET_WRPTR_PTS_HIGH 200 406*53ee8cc1Swenshuai.xi 407*53ee8cc1Swenshuai.xi #define OFFSET_DECODEDONE_COUNT 204 408*53ee8cc1Swenshuai.xi #define OFFSET_SEARCHBUF_COUNT 208 409*53ee8cc1Swenshuai.xi #define OFFSET_SEARCHCODE_COUNT 212 410*53ee8cc1Swenshuai.xi #define OFFSET_PREBUF_COUNT 216 411*53ee8cc1Swenshuai.xi #define OFFSET_VFIFOBUF_COUNT 220 412*53ee8cc1Swenshuai.xi #define OFFSET_SEARCHHEADER_COUNT 224 413*53ee8cc1Swenshuai.xi #define OFFSET_FLASHPATTERN_COUNT 228 414*53ee8cc1Swenshuai.xi #define OFFSET_PVR_SEAMLESS_STATUS 232 415*53ee8cc1Swenshuai.xi #define OFFSET_FRAME_BUFFER_RESOURCE 236 416*53ee8cc1Swenshuai.xi 417*53ee8cc1Swenshuai.xi typedef struct _FW_DIVX_INFO 418*53ee8cc1Swenshuai.xi { 419*53ee8cc1Swenshuai.xi unsigned int vol_handle_done; //0 420*53ee8cc1Swenshuai.xi 421*53ee8cc1Swenshuai.xi unsigned int width; //4 422*53ee8cc1Swenshuai.xi unsigned int height; //8 423*53ee8cc1Swenshuai.xi unsigned int frame_count; //12 424*53ee8cc1Swenshuai.xi unsigned int frame_time; //16 425*53ee8cc1Swenshuai.xi 426*53ee8cc1Swenshuai.xi unsigned short pts_incr; //20 427*53ee8cc1Swenshuai.xi unsigned short reserve0; 428*53ee8cc1Swenshuai.xi 429*53ee8cc1Swenshuai.xi unsigned char aspect_ratio; //24 430*53ee8cc1Swenshuai.xi unsigned char progressive_sequence; //25 431*53ee8cc1Swenshuai.xi unsigned char mpeg1; //26 432*53ee8cc1Swenshuai.xi unsigned char play_mode; //27 433*53ee8cc1Swenshuai.xi 434*53ee8cc1Swenshuai.xi unsigned char mpeg_frc_mode; //28 435*53ee8cc1Swenshuai.xi unsigned char invalidstream; //29 436*53ee8cc1Swenshuai.xi unsigned char reserve[2]; //30 437*53ee8cc1Swenshuai.xi unsigned int frame_rate; //32 438*53ee8cc1Swenshuai.xi }FW_DIVX_INFO, *pFW_DIVX_INFO; 439*53ee8cc1Swenshuai.xi 440*53ee8cc1Swenshuai.xi #define OFFSET_DIVX_VOL_HANDLE_DONE 0 441*53ee8cc1Swenshuai.xi #define OFFSET_DIVX_WIDTH 4 442*53ee8cc1Swenshuai.xi #define OFFSET_DIVX_HEIGHT 8 443*53ee8cc1Swenshuai.xi #define OFFSET_DIVX_FRAME_COUNT 12 444*53ee8cc1Swenshuai.xi #define OFFSET_DIVX_FRAME_TIME 16 445*53ee8cc1Swenshuai.xi #define OFFSET_DIVX_PTS_INCR 20 446*53ee8cc1Swenshuai.xi #define OFFSET_DIVX_RESERVE0 22 447*53ee8cc1Swenshuai.xi #define OFFSET_DIVX_ASPECT_RATIO 24 448*53ee8cc1Swenshuai.xi #define OFFSET_DIVX_PROGRESSIVE_SEQUENCE 25 449*53ee8cc1Swenshuai.xi #define OFFSET_DIVX_MPEG1 26 450*53ee8cc1Swenshuai.xi #define OFFSET_DIVX_PLAY_MODE 27 451*53ee8cc1Swenshuai.xi #define OFFSET_DIVX_MPEG_FRC_MODE 28 452*53ee8cc1Swenshuai.xi #define OFFSET_DIVX_INVALIDSTREAM 29 453*53ee8cc1Swenshuai.xi #define OFFSET_DIVX_RESERVED 30 454*53ee8cc1Swenshuai.xi #define OFFSET_DIVX_FRAME_RATE 32 455*53ee8cc1Swenshuai.xi 456*53ee8cc1Swenshuai.xi #define STATUS_VIDEO_SYNC (1<<0) 457*53ee8cc1Swenshuai.xi #define STATUS_VIDEO_FREERUN (1<<1) 458*53ee8cc1Swenshuai.xi #define STATUS_VIDEO_SKIP (1<<2) 459*53ee8cc1Swenshuai.xi #define STATUS_VIDEO_REPEAT (1<<3) 460*53ee8cc1Swenshuai.xi 461*53ee8cc1Swenshuai.xi typedef struct _FW_USER_DATA_BUF 462*53ee8cc1Swenshuai.xi { 463*53ee8cc1Swenshuai.xi unsigned char picType; /* picture type: 1->I picture, 2->P,3->B */ 464*53ee8cc1Swenshuai.xi unsigned char top_ff; /* Top field first: 1 if top field first*/ 465*53ee8cc1Swenshuai.xi unsigned char rpt_ff; /* Repeat first field: 1 if repeat field first*/ 466*53ee8cc1Swenshuai.xi unsigned char userdatabytecnt; 467*53ee8cc1Swenshuai.xi 468*53ee8cc1Swenshuai.xi unsigned short tmpRef; /* Temporal reference of the picture*/ 469*53ee8cc1Swenshuai.xi 470*53ee8cc1Swenshuai.xi unsigned char userdata[250]; 471*53ee8cc1Swenshuai.xi }FW_USER_DATA_BUF,*pFW_USER_DATA_BUF; 472*53ee8cc1Swenshuai.xi 473*53ee8cc1Swenshuai.xi #define FW_USER_DATA_BUF_EXT_PACK_LEN 240 474*53ee8cc1Swenshuai.xi typedef struct _FW_USER_DATA_BUF_EXT 475*53ee8cc1Swenshuai.xi { 476*53ee8cc1Swenshuai.xi unsigned char picType; /* picture type: 1->I picture, 2->P,3->B */ 477*53ee8cc1Swenshuai.xi unsigned char top_ff; /* Top field first: 1 if top field first*/ 478*53ee8cc1Swenshuai.xi unsigned char rpt_ff; /* Repeat first field: 1 if repeat field first*/ 479*53ee8cc1Swenshuai.xi unsigned char userdatabytecnt; 480*53ee8cc1Swenshuai.xi 481*53ee8cc1Swenshuai.xi unsigned short tmpRef; /* Temporal reference of the picture*/ 482*53ee8cc1Swenshuai.xi unsigned char PicStruct; /* picture struct with this cc pack*/ 483*53ee8cc1Swenshuai.xi unsigned char reserved; 484*53ee8cc1Swenshuai.xi 485*53ee8cc1Swenshuai.xi unsigned int pts; /* pts with this cc pack*/ 486*53ee8cc1Swenshuai.xi unsigned int reserved2; 487*53ee8cc1Swenshuai.xi 488*53ee8cc1Swenshuai.xi unsigned char userdata[FW_USER_DATA_BUF_EXT_PACK_LEN]; 489*53ee8cc1Swenshuai.xi }FW_USER_DATA_BUF_EXT,*pFW_USER_DATA_BUF_EXT; 490*53ee8cc1Swenshuai.xi 491*53ee8cc1Swenshuai.xi typedef struct _DecFrameInfo 492*53ee8cc1Swenshuai.xi { 493*53ee8cc1Swenshuai.xi unsigned int u32DecLumaAddr; //0 494*53ee8cc1Swenshuai.xi unsigned int u32DecChromaAddr; //4 495*53ee8cc1Swenshuai.xi unsigned int u32DecTimeStamp; //8 496*53ee8cc1Swenshuai.xi unsigned int u32DecID_L; //12 497*53ee8cc1Swenshuai.xi unsigned int u32DecID_H; //16 498*53ee8cc1Swenshuai.xi unsigned short u16DecPitch; //20 499*53ee8cc1Swenshuai.xi unsigned short u16DecWidth; //22 500*53ee8cc1Swenshuai.xi unsigned short u16DecHeight; //24 501*53ee8cc1Swenshuai.xi unsigned short u16DeceFrameType; //26 502*53ee8cc1Swenshuai.xi unsigned int u32DispLumaAddr; //28 503*53ee8cc1Swenshuai.xi unsigned int u32DispChromaAddr; //32 504*53ee8cc1Swenshuai.xi unsigned int u32DispTimeStamp; //36 505*53ee8cc1Swenshuai.xi unsigned int u32DispID_L; //40 506*53ee8cc1Swenshuai.xi unsigned int u32DispID_H; //44 507*53ee8cc1Swenshuai.xi unsigned short u16DispPitch; //48 508*53ee8cc1Swenshuai.xi unsigned short u16DispWidth; //50 509*53ee8cc1Swenshuai.xi unsigned short u16DispHeight; //52 510*53ee8cc1Swenshuai.xi unsigned short u16DispeFrameType; //54 511*53ee8cc1Swenshuai.xi // for Mstreamer mode 512*53ee8cc1Swenshuai.xi unsigned int u32NextDispLumaAddr; //56 513*53ee8cc1Swenshuai.xi unsigned int u32NextDispChromaAddr; //60 514*53ee8cc1Swenshuai.xi unsigned int u32NextDispTimeStamp; //64 515*53ee8cc1Swenshuai.xi unsigned int u32NextDispID_L; //68 516*53ee8cc1Swenshuai.xi unsigned int u32NextDispID_H; //72 517*53ee8cc1Swenshuai.xi unsigned short u16NextDispPitch; //76 518*53ee8cc1Swenshuai.xi unsigned short u16NextDispWidth; //78 519*53ee8cc1Swenshuai.xi unsigned short u16NextDispHeight; //80 520*53ee8cc1Swenshuai.xi unsigned short u16NextDispeFrameType; //82 521*53ee8cc1Swenshuai.xi unsigned short u16NextDispFrameIdx; //84 522*53ee8cc1Swenshuai.xi // for vc1/rcv range reduction 523*53ee8cc1Swenshuai.xi unsigned char u8NextDispRangeRed_Y; //86 //[7]: on/off [6:0]: scale 524*53ee8cc1Swenshuai.xi unsigned char u8NextDispRangeRed_UV; //87 //[7]: on/off [6:0]: scale 525*53ee8cc1Swenshuai.xi // for MCU mode, which support interlace 526*53ee8cc1Swenshuai.xi unsigned short u16ExtData; //88 527*53ee8cc1Swenshuai.xi }DecFrameInfo, *pDecFrameInfo; 528*53ee8cc1Swenshuai.xi 529*53ee8cc1Swenshuai.xi #define OFFSET_DECFRAMEINFO_DEC_LUMAADDR 0 530*53ee8cc1Swenshuai.xi #define OFFSET_DECFRAMEINFO_DEC_CHROMAADDR 4 531*53ee8cc1Swenshuai.xi #define OFFSET_DECFRAMEINFO_DEC_TIMESTAMP 8 532*53ee8cc1Swenshuai.xi #define OFFSET_DECFRAMEINFO_DEC_ID_L 12 533*53ee8cc1Swenshuai.xi #define OFFSET_DECFRAMEINFO_DEC_ID_H 16 534*53ee8cc1Swenshuai.xi #define OFFSET_DECFRAMEINFO_DEC_PITCH 20 535*53ee8cc1Swenshuai.xi #define OFFSET_DECFRAMEINFO_DEC_WIDTH 22 536*53ee8cc1Swenshuai.xi #define OFFSET_DECFRAMEINFO_DEC_HEIGHT 24 537*53ee8cc1Swenshuai.xi #define OFFSET_DECFRAMEINFO_DEC_FRAMETYPE 26 538*53ee8cc1Swenshuai.xi #define OFFSET_DECFRAMEINFO_DISP_LUMAADDR 28 539*53ee8cc1Swenshuai.xi #define OFFSET_DECFRAMEINFO_DISP_CHROMAADDR 32 540*53ee8cc1Swenshuai.xi #define OFFSET_DECFRAMEINFO_DISP_TIMESTAMP 36 541*53ee8cc1Swenshuai.xi #define OFFSET_DECFRAMEINFO_DISP_ID_L 40 542*53ee8cc1Swenshuai.xi #define OFFSET_DECFRAMEINFO_DISP_ID_H 44 543*53ee8cc1Swenshuai.xi #define OFFSET_DECFRAMEINFO_DISP_PITCH 48 544*53ee8cc1Swenshuai.xi #define OFFSET_DECFRAMEINFO_DISP_WIDTH 50 545*53ee8cc1Swenshuai.xi #define OFFSET_DECFRAMEINFO_DISP_HEIGHT 52 546*53ee8cc1Swenshuai.xi #define OFFSET_DECFRAMEINFO_DISP_FRAMETYPE 54 547*53ee8cc1Swenshuai.xi #define OFFSET_DECFRAMEINFO_NEXTDISP_LUMAADDR 56 // for Mstreamer mode 548*53ee8cc1Swenshuai.xi #define OFFSET_DECFRAMEINFO_NEXTDISP_CHROMAADDR 60 549*53ee8cc1Swenshuai.xi #define OFFSET_DECFRAMEINFO_NEXTDISP_TIMESTAMP 64 550*53ee8cc1Swenshuai.xi #define OFFSET_DECFRAMEINFO_NEXTDISP_ID_L 68 551*53ee8cc1Swenshuai.xi #define OFFSET_DECFRAMEINFO_NEXTDISP_ID_H 72 552*53ee8cc1Swenshuai.xi #define OFFSET_DECFRAMEINFO_NEXTDISP_PITCH 76 553*53ee8cc1Swenshuai.xi #define OFFSET_DECFRAMEINFO_NEXTDISP_WIDTH 78 554*53ee8cc1Swenshuai.xi #define OFFSET_DECFRAMEINFO_NEXTDISP_HEIGHT 80 555*53ee8cc1Swenshuai.xi #define OFFSET_DECFRAMEINFO_NEXTDISP_FRAMETYPE 82 556*53ee8cc1Swenshuai.xi #define OFFSET_DECFRAMEINFO_NEXTDISP_FRAMEIDX 84 // for Mstreamer mode 557*53ee8cc1Swenshuai.xi #define OFFSET_DECFRAMEINFO_NEXTDISP_RANGERED_Y 86 // for vc1/rcv 558*53ee8cc1Swenshuai.xi #define OFFSET_DECFRAMEINFO_NEXTDISP_RANGERED_UV 87 // for vc1/rcv 559*53ee8cc1Swenshuai.xi #define OFFSET_DECFRAMEINFO_NEXTDISP_EXT_DATA 88 // for MCU mode, which support interlace 560*53ee8cc1Swenshuai.xi 561*53ee8cc1Swenshuai.xi typedef struct _DEBUG_INFO 562*53ee8cc1Swenshuai.xi { 563*53ee8cc1Swenshuai.xi // 564*53ee8cc1Swenshuai.xi volatile unsigned short max_coded_width; 565*53ee8cc1Swenshuai.xi volatile unsigned short max_coded_height; 566*53ee8cc1Swenshuai.xi volatile unsigned short sync_status; // defined by AV_SYNC 567*53ee8cc1Swenshuai.xi 568*53ee8cc1Swenshuai.xi volatile unsigned short REG67; 569*53ee8cc1Swenshuai.xi volatile unsigned short REG68; 570*53ee8cc1Swenshuai.xi volatile unsigned short REG69; 571*53ee8cc1Swenshuai.xi 572*53ee8cc1Swenshuai.xi volatile unsigned short REG6a; 573*53ee8cc1Swenshuai.xi volatile unsigned short REG6b; 574*53ee8cc1Swenshuai.xi volatile unsigned short REG6c; 575*53ee8cc1Swenshuai.xi 576*53ee8cc1Swenshuai.xi volatile unsigned short REG6d; 577*53ee8cc1Swenshuai.xi volatile unsigned short REG6e; 578*53ee8cc1Swenshuai.xi volatile unsigned short REG6f; 579*53ee8cc1Swenshuai.xi 580*53ee8cc1Swenshuai.xi // 581*53ee8cc1Swenshuai.xi volatile unsigned short overflow_count; 582*53ee8cc1Swenshuai.xi volatile unsigned short underflow_count; 583*53ee8cc1Swenshuai.xi volatile unsigned short vlderr_count; 584*53ee8cc1Swenshuai.xi volatile unsigned short frame_conut;//0 585*53ee8cc1Swenshuai.xi 586*53ee8cc1Swenshuai.xi volatile unsigned int y_start_addr; //in byte unit 587*53ee8cc1Swenshuai.xi volatile unsigned int uv_start_addr;//in byte unit 588*53ee8cc1Swenshuai.xi 589*53ee8cc1Swenshuai.xi volatile unsigned int width; 590*53ee8cc1Swenshuai.xi volatile unsigned int height; 591*53ee8cc1Swenshuai.xi 592*53ee8cc1Swenshuai.xi // where 593*53ee8cc1Swenshuai.xi volatile unsigned short mb_x; 594*53ee8cc1Swenshuai.xi volatile unsigned short mb_y; 595*53ee8cc1Swenshuai.xi 596*53ee8cc1Swenshuai.xi volatile unsigned short file_end; 597*53ee8cc1Swenshuai.xi //16-byte aligned 598*53ee8cc1Swenshuai.xi volatile unsigned char reserved[24]; 599*53ee8cc1Swenshuai.xi 600*53ee8cc1Swenshuai.xi }DebugInfo; 601*53ee8cc1Swenshuai.xi 602*53ee8cc1Swenshuai.xi typedef struct VC1_SEQ_INFO 603*53ee8cc1Swenshuai.xi { 604*53ee8cc1Swenshuai.xi volatile unsigned int PROFILE; 605*53ee8cc1Swenshuai.xi volatile unsigned int FRMRTQ_POSTPROC; 606*53ee8cc1Swenshuai.xi volatile unsigned int BITRTQ_POSTPROC; 607*53ee8cc1Swenshuai.xi volatile unsigned int LOOPFILTER; 608*53ee8cc1Swenshuai.xi volatile unsigned int MULTIRES; 609*53ee8cc1Swenshuai.xi volatile unsigned int FASTUVMC; 610*53ee8cc1Swenshuai.xi volatile unsigned int EXTENDED_MV; 611*53ee8cc1Swenshuai.xi volatile unsigned int DQUANT; 612*53ee8cc1Swenshuai.xi volatile unsigned int VSTRANSFORM; 613*53ee8cc1Swenshuai.xi volatile unsigned int OVERLAP; 614*53ee8cc1Swenshuai.xi volatile unsigned int SYNCMARKER; 615*53ee8cc1Swenshuai.xi volatile unsigned int RANGERED; 616*53ee8cc1Swenshuai.xi volatile unsigned int MAXBFRAMES; 617*53ee8cc1Swenshuai.xi volatile unsigned int QUANTIZER; 618*53ee8cc1Swenshuai.xi volatile unsigned int FINTERPFLAG; 619*53ee8cc1Swenshuai.xi volatile unsigned int LEVEL; 620*53ee8cc1Swenshuai.xi volatile unsigned int CBR; 621*53ee8cc1Swenshuai.xi volatile unsigned int FRAMERATE; 622*53ee8cc1Swenshuai.xi volatile unsigned int VERT_SIZE; 623*53ee8cc1Swenshuai.xi volatile unsigned int HORIZ_SIZE; 624*53ee8cc1Swenshuai.xi }VC1_SEQUENCE_INFO, *pVC1_SEQUENCE_INFO; 625*53ee8cc1Swenshuai.xi 626*53ee8cc1Swenshuai.xi #define OFFSET_RCV_PROFILE 0 627*53ee8cc1Swenshuai.xi #define OFFSET_RCV_FRMRTQ_POSTPROC 4 628*53ee8cc1Swenshuai.xi #define OFFSET_RCV_BITRTQ_POSTPROC 8 629*53ee8cc1Swenshuai.xi #define OFFSET_RCV_LOOPFILTER 12 630*53ee8cc1Swenshuai.xi #define OFFSET_RCV_MULTIRES 16 631*53ee8cc1Swenshuai.xi #define OFFSET_RCV_FASTUVMC 20 632*53ee8cc1Swenshuai.xi #define OFFSET_RCV_EXTENDED_MV 24 633*53ee8cc1Swenshuai.xi #define OFFSET_RCV_DQUANT 28 634*53ee8cc1Swenshuai.xi #define OFFSET_RCV_VSTRANSFORM 32 635*53ee8cc1Swenshuai.xi #define OFFSET_RCV_OVERLAP 36 636*53ee8cc1Swenshuai.xi #define OFFSET_RCV_SYNCMARKER 40 637*53ee8cc1Swenshuai.xi #define OFFSET_RCV_RANGERED 44 638*53ee8cc1Swenshuai.xi #define OFFSET_RCV_MAXBFRAMES 48 639*53ee8cc1Swenshuai.xi #define OFFSET_RCV_QUANTIZER 52 640*53ee8cc1Swenshuai.xi #define OFFSET_RCV_FINTERPFLAG 56 641*53ee8cc1Swenshuai.xi #define OFFSET_RCV_LEVEL 60 642*53ee8cc1Swenshuai.xi #define OFFSET_RCV_CBR 64 643*53ee8cc1Swenshuai.xi #define OFFSET_RCV_FRAMERATE 68 644*53ee8cc1Swenshuai.xi #define OFFSET_RCV_VERT_SIZE 72 645*53ee8cc1Swenshuai.xi #define OFFSET_RCV_HORIZ_SIZE 76 646*53ee8cc1Swenshuai.xi 647*53ee8cc1Swenshuai.xi typedef struct _FW_AVSYNC_TABLE 648*53ee8cc1Swenshuai.xi { 649*53ee8cc1Swenshuai.xi unsigned int byte_cnt; //0 //23 valid bits 650*53ee8cc1Swenshuai.xi unsigned int dummy_cnt; //4 //dummy packet counter 651*53ee8cc1Swenshuai.xi unsigned int id_low; //8 //ID specified by player 652*53ee8cc1Swenshuai.xi unsigned int id_high; //12 653*53ee8cc1Swenshuai.xi 654*53ee8cc1Swenshuai.xi unsigned int time_stamp; //16 //pts or dts 655*53ee8cc1Swenshuai.xi unsigned int reserved_int0; //20 656*53ee8cc1Swenshuai.xi unsigned int reserved_int1; //24 657*53ee8cc1Swenshuai.xi unsigned int reserved_int2; //28 658*53ee8cc1Swenshuai.xi }FW_AVSYNC_TABLE, *pFW_AVSYNC_TABLE; 659*53ee8cc1Swenshuai.xi 660*53ee8cc1Swenshuai.xi #define OFFSET_BYTE_CNT 0 661*53ee8cc1Swenshuai.xi #define OFFSET_DUMMY_CNT 4 662*53ee8cc1Swenshuai.xi #define OFFSET_ID_LOW 8 663*53ee8cc1Swenshuai.xi #define OFFSET_ID_HIGH 12 664*53ee8cc1Swenshuai.xi #define OFFSET_TIME_STAMP 16 665*53ee8cc1Swenshuai.xi 666*53ee8cc1Swenshuai.xi #ifdef M4VDPLAYER 667*53ee8cc1Swenshuai.xi extern pFW_VOL_INFO gp_vol_info; 668*53ee8cc1Swenshuai.xi extern pFW_DIVX_INFO gp_divx_info; 669*53ee8cc1Swenshuai.xi #endif 670*53ee8cc1Swenshuai.xi 671*53ee8cc1Swenshuai.xi //interupt flag 672*53ee8cc1Swenshuai.xi #define INT_CC_NEW (1<<0) 673*53ee8cc1Swenshuai.xi #define INT_USER_DATA (1<<0) 674*53ee8cc1Swenshuai.xi #define INT_VBUF_OVF (1<<1) 675*53ee8cc1Swenshuai.xi #define INT_VBUF_UNF (1<<2) 676*53ee8cc1Swenshuai.xi #define INT_VES_VALID (1<<3) 677*53ee8cc1Swenshuai.xi #define INT_VES_INVALID (1<<4) 678*53ee8cc1Swenshuai.xi #define INT_SEQ_FOUND (1<<5) 679*53ee8cc1Swenshuai.xi #define INT_PIC_FOUND (1<<6) 680*53ee8cc1Swenshuai.xi #define INT_DEC_ERR (1<<7) 681*53ee8cc1Swenshuai.xi #define INT_FIRST_FRAME (1<<8) 682*53ee8cc1Swenshuai.xi #define INT_DISP_RDY (1<<9) 683*53ee8cc1Swenshuai.xi #define INT_SYN_SKIP (1<<10) 684*53ee8cc1Swenshuai.xi #define INT_SYN_REP (1<<11) 685*53ee8cc1Swenshuai.xi #define INT_DISP_VSYNC (1<<12) 686*53ee8cc1Swenshuai.xi #define INT_USER_DATA_DISP (1<<13) //user data in display order 687*53ee8cc1Swenshuai.xi #define INT_PTS_DISCONTINUE (1<<14) //detection pts discontinue for t3-gp2, 20101214 688*53ee8cc1Swenshuai.xi #define INT_DEC_DONE (1<<15) //finishing decoding one frame. 689*53ee8cc1Swenshuai.xi #define INT_DEC_I (1<<16) //finishing decoding one frame. 690*53ee8cc1Swenshuai.xi #define INT_XC_LOW_DELAY (1<<17) //trigger this interrupt for XC speed up to show image on channel change... 691*53ee8cc1Swenshuai.xi 692*53ee8cc1Swenshuai.xi #define INT_SYN_SKIP_P 10 693*53ee8cc1Swenshuai.xi #define INT_SYN_REP_P 11 694*53ee8cc1Swenshuai.xi 695*53ee8cc1Swenshuai.xi // decoding state definition 696*53ee8cc1Swenshuai.xi #define DEC_STAT_IDLE 0x00 697*53ee8cc1Swenshuai.xi #define DEC_STAT_FIND_SC 0x01 698*53ee8cc1Swenshuai.xi #define DEC_STAT_FIND_SPE_SC 0x11 699*53ee8cc1Swenshuai.xi #define DEC_STAT_FIND_FRAMEBUFFER 0x02 700*53ee8cc1Swenshuai.xi #define DEC_STAT_WAIT_DECODE_DONE 0x03 701*53ee8cc1Swenshuai.xi #define DEC_STAT_DECODE_DONE 0x04 702*53ee8cc1Swenshuai.xi #define DEC_STAT_WAIT_VDFIFO 0x05 703*53ee8cc1Swenshuai.xi #define DEC_STAT_INIT_SUCCESS 0x06 704*53ee8cc1Swenshuai.xi 705*53ee8cc1Swenshuai.xi //error_code 706*53ee8cc1Swenshuai.xi #define VOL_SHAPE 1 //error_status 0:rectanglular 1:binary 2: binary only 3: grayscale 707*53ee8cc1Swenshuai.xi #define VOL_USED_SPRITE 2 //error_status 0:sprite not used 1:static 2: GMC 3: reserved 708*53ee8cc1Swenshuai.xi #define VOL_NOT_8_BIT 3 //error_status : bits per pixel 709*53ee8cc1Swenshuai.xi #define VOL_NERPRED_ENABLE 4 710*53ee8cc1Swenshuai.xi #define VOL_REDUCED_RES_ENABLE 5 711*53ee8cc1Swenshuai.xi #define VOL_SCALABILITY 6 712*53ee8cc1Swenshuai.xi #define VOL_OTHER 7 713*53ee8cc1Swenshuai.xi #define VOL_H263_ERROR 8 714*53ee8cc1Swenshuai.xi #define VOL_RES_NOT_SUPPORT 9 //error_status : none 715*53ee8cc1Swenshuai.xi #define VOL_MPEG4_NOT_SUPPORT 10 //error_status : none 716*53ee8cc1Swenshuai.xi #define VOL_PROFILE_NOT_SUPPORT 11 717*53ee8cc1Swenshuai.xi #define VOL_RCV_ERROR_OCCUR 12 718*53ee8cc1Swenshuai.xi #define VOL_VC1_NOT_SUPPORT 13 719*53ee8cc1Swenshuai.xi #define VOL_UNKNOW_CODEC_NOT_SUPPORT 14 720*53ee8cc1Swenshuai.xi #define VOL_SLQ_TBL_NOT_SUPPORT 15 721*53ee8cc1Swenshuai.xi #define VOL_FRAME_BUF_NOT_ENOUGH 16 //error_status : none 722*53ee8cc1Swenshuai.xi #define CODEC_MPEG4 0x00 //arg0: 0: mpeg4, 1: mpeg4 with short_video_header, 2: DivX311 723*53ee8cc1Swenshuai.xi #define CODEC_MPEG4_SHORT_VIDEO_HEADER 0x01 724*53ee8cc1Swenshuai.xi #define CODEC_DIVX311 0x02 725*53ee8cc1Swenshuai.xi #define CODEC_MPEG2 0x10 726*53ee8cc1Swenshuai.xi typedef enum //arg1: 0: file mode 1:slq 2:live stream mode 3:slqtbl 4: Ts file mode 727*53ee8cc1Swenshuai.xi { 728*53ee8cc1Swenshuai.xi FILE_MODE = 0, 729*53ee8cc1Swenshuai.xi SLQ_MODE, 730*53ee8cc1Swenshuai.xi STREAM_MODE, 731*53ee8cc1Swenshuai.xi SLQ_TBL_MODE, 732*53ee8cc1Swenshuai.xi TS_FILE_MODE, 733*53ee8cc1Swenshuai.xi OTHER 734*53ee8cc1Swenshuai.xi }stream_type; 735*53ee8cc1Swenshuai.xi #define ENABLE_PARSER 0x00 //arg2: 0/1 enable/disable parser; 736*53ee8cc1Swenshuai.xi #define DISABLE_PARSER 0x01 737*53ee8cc1Swenshuai.xi #define ENABLE_PKT_LEN 0x02 738*53ee8cc1Swenshuai.xi #define PARSER_MPEG2 0x00 //arg3: 0 13818-1 pes header; 739*53ee8cc1Swenshuai.xi #define PARSER_MPEG1 0x01 // 1 11172-1 pes header; 740*53ee8cc1Swenshuai.xi 741*53ee8cc1Swenshuai.xi #define FrcNormal 0 742*53ee8cc1Swenshuai.xi #define FrcDisplayTwice 1 //output rate is twice of input rate (ex. 30p a 60p) 743*53ee8cc1Swenshuai.xi #define Frc32Pulldown 2 //3:2 pulldown mode (ex. 24p a 60i or 60p) 744*53ee8cc1Swenshuai.xi #define FrcPALtoNTSC 3 //PALaNTSC conversion (50i a 60i) 745*53ee8cc1Swenshuai.xi #define FrcNTSCtoPAL 4 //NTSCaPAL conversion (60i a 50i) 746*53ee8cc1Swenshuai.xi #define FrcShowOneFiled 5 747*53ee8cc1Swenshuai.xi #define FrcDisplayDropHalf 6 748*53ee8cc1Swenshuai.xi #define FrcDisplay120To50 7 749*53ee8cc1Swenshuai.xi #define FrcDisplay100To60 8 750*53ee8cc1Swenshuai.xi #define FrcDisplay30To50 9 751*53ee8cc1Swenshuai.xi #define FrcDisplayMultipleRepeat 20 //output_rate/input_rate=integer 752*53ee8cc1Swenshuai.xi #define FrcDisplayGeneralRepeat 21 //output_rate > input_rate, ex. 15->50... 753*53ee8cc1Swenshuai.xi #define FrcDisplayGeneralSkip 22 //output_rate < input_rate, 754*53ee8cc1Swenshuai.xi 755*53ee8cc1Swenshuai.xi #define MVD3_FILE_SD_MODE 0x02 //960*544 756*53ee8cc1Swenshuai.xi #define MVD3_HD_MODE 0x10 //1920*1088 757*53ee8cc1Swenshuai.xi #define MVD3_SD_MODE 0x00 //720*576 758*53ee8cc1Swenshuai.xi #define MVD3_DHD_MODE 0x20 // dual HD 759*53ee8cc1Swenshuai.xi #define MVD3_DHD_MODE_MIN 0x40 //ECO ISSUE : THE WIDTH OVER 2560 IN VC1 WILL HIT THE HW_ISSUE 760*53ee8cc1Swenshuai.xi // File mode avsync related 761*53ee8cc1Swenshuai.xi #define NONE_FILE_MODE 0 762*53ee8cc1Swenshuai.xi #define FILE_PTS_MODE 1 763*53ee8cc1Swenshuai.xi #define FILE_DTS_MODE 2 764*53ee8cc1Swenshuai.xi #define FILE_STS_MODE 3 765*53ee8cc1Swenshuai.xi 766*53ee8cc1Swenshuai.xi 767*53ee8cc1Swenshuai.xi // argument for "CMD_DISPLAY_PAUSE" 768*53ee8cc1Swenshuai.xi #define DISPLAY_PAUSE_OFF 0x00 769*53ee8cc1Swenshuai.xi #define DISPLAY_PAUSE_ON 0x01 770*53ee8cc1Swenshuai.xi 771*53ee8cc1Swenshuai.xi // argument for "CMD_FRC_DROP_BEHAVIOR" 772*53ee8cc1Swenshuai.xi #define FRC_DROP_FRAME 0x00 // for default frc drop behavior, drop per frame 773*53ee8cc1Swenshuai.xi #define FRC_DROP_FIELD 0x01 // for frc drop behavior, drop per field to improve more smoothly in field mode 774*53ee8cc1Swenshuai.xi 775*53ee8cc1Swenshuai.xi // ARG0 for "CMD_DRAM_OBF" 776*53ee8cc1Swenshuai.xi #define OBF_PAS1_WR 0x01 // for Dram obf write index (Parser1 write) 777*53ee8cc1Swenshuai.xi #define OBF_VBUF1_RD 0x02 // for Dram obf read index (VBUF1 read) 778*53ee8cc1Swenshuai.xi #define OBF_PES_FILE_IN1_WR 0x03 // for Dram obf read index for PESFI1 779*53ee8cc1Swenshuai.xi #define OBF_PAS2_WR 0x04 // for Dram obf write index (Parser2 write) 780*53ee8cc1Swenshuai.xi #define OBF_VBUF2_RD 0x05 // for Dram obf read index (VBUF2 read) 781*53ee8cc1Swenshuai.xi #define OBF_PES_FILE_IN2_WR 0x06 // for Dram obf read index for PESFI2 782*53ee8cc1Swenshuai.xi 783*53ee8cc1Swenshuai.xi //command interface 784*53ee8cc1Swenshuai.xi #define CMD_PLAY 0x01 785*53ee8cc1Swenshuai.xi #define CMD_PAUSE 0x02 786*53ee8cc1Swenshuai.xi #define CMD_STOP 0x03 787*53ee8cc1Swenshuai.xi #define CMD_FIND_SEQ 0x04 //find seq header and set command = pause at picture header start code found 788*53ee8cc1Swenshuai.xi #define CMD_SINGLE_STEP 0x05 789*53ee8cc1Swenshuai.xi #define CMD_PLAY_NO_SQE 0x06 790*53ee8cc1Swenshuai.xi #define CMD_FAST_SLOW 0x07 //arg0: 0: nomarl mode, 1: decode I only, 2: deocde I/P only, 3: slow motion 791*53ee8cc1Swenshuai.xi #define CMD_CODEC_INFO 0x08 //arg0: 0: mpeg4, 1: mpeg4 with short_video_header, 2: DivX311 792*53ee8cc1Swenshuai.xi #define CMD_SYN_THRESHOLD 0x09 793*53ee8cc1Swenshuai.xi #define CMD_SYNC_ON 0x0a 794*53ee8cc1Swenshuai.xi #define CMD_SYNC_OFFSET 0x0b 795*53ee8cc1Swenshuai.xi #define CMD_DISPLAY_CTL 0x0c 796*53ee8cc1Swenshuai.xi //arg0: 0/1-display by display/decode order 797*53ee8cc1Swenshuai.xi //arg1: 1-drop display decoding error frame 798*53ee8cc1Swenshuai.xi //arg2: 1-drop display when decode fast than display 799*53ee8cc1Swenshuai.xi //arg3:set frame rate conversion mode 800*53ee8cc1Swenshuai.xi #define CMD_GET_SYNC_STAT 0x0d //return arg0: 0/1 sync off/on ; arg1: 3 sync init done 801*53ee8cc1Swenshuai.xi #define CMD_GET_AFD 0x0e 802*53ee8cc1Swenshuai.xi #define CMD_SKIP_DATA 0x0f //set to skip all data till find FW_SPE_SCODE to resume normal play 803*53ee8cc1Swenshuai.xi 804*53ee8cc1Swenshuai.xi #define CMD_STREAM_BUF_START 0x10 805*53ee8cc1Swenshuai.xi #define CMD_STREAM_BUF_END 0x11 806*53ee8cc1Swenshuai.xi #define CMD_FB_BASE 0x12 //Frame buffer base address, from LSB to MSB are arg0, arg1, arg2, arg3 807*53ee8cc1Swenshuai.xi #define CMD_IAP_BUF_START 0x13 808*53ee8cc1Swenshuai.xi #define CMD_DP_BUF_START 0x14 809*53ee8cc1Swenshuai.xi #define CMD_MV_BUF_START 0x15 810*53ee8cc1Swenshuai.xi #define CMD_DMA_OVFTH 0x16 811*53ee8cc1Swenshuai.xi #define CMD_DMA_UNFTH 0x17 812*53ee8cc1Swenshuai.xi #define CMD_VC1_MIU_PROTECT_START 0x18 813*53ee8cc1Swenshuai.xi #define CMD_VC1_MIU_PROTECT_END 0x19 814*53ee8cc1Swenshuai.xi #define CMD_DISP_SPEED_CTRL 0x1a 815*53ee8cc1Swenshuai.xi #define CMD_STEP_DISP_DECODE_ONE 0x1b 816*53ee8cc1Swenshuai.xi #define CMD_STEP_DISP_ING 0x1c // repeat disp this frame 817*53ee8cc1Swenshuai.xi #define CMD_STEP_TO_PTS 0x1d 818*53ee8cc1Swenshuai.xi #define CMD_HANDSHAKE_STATUS 0x1e //report handshake status 819*53ee8cc1Swenshuai.xi #define CMD_DISPLAY_PAUSE 0x1f // display pause 820*53ee8cc1Swenshuai.xi 821*53ee8cc1Swenshuai.xi #define CMD_USER_BUF_START 0x20 822*53ee8cc1Swenshuai.xi #define CMD_USER_BUF_SIZE 0x21 823*53ee8cc1Swenshuai.xi #define CMD_RD_USER_WP 0x22 824*53ee8cc1Swenshuai.xi #define CMD_WD_USER_RP 0x23 825*53ee8cc1Swenshuai.xi #define CMD_RD_CC_PKTCNT 0x24 826*53ee8cc1Swenshuai.xi #define CMD_RD_CC_OV 0x25 827*53ee8cc1Swenshuai.xi #define CMD_CLOSE_CC 0x26 828*53ee8cc1Swenshuai.xi #define CMD_EN_CC_INFO_ENHANCE 0X27 // arg0=1, for enhance to dump the pts/tmp_ref info with each cc-608 packet for mstar cc-lib, 20120406 829*53ee8cc1Swenshuai.xi #define CMD_BUF_OFFSET 0x2d // stream/frame buf offset, programable high adderss [bit-25] that allocate to low/high 256MB MIU:(only for K2) 830*53ee8cc1Swenshuai.xi #define CMD_ENABLE_VLD_TIMEOUT 0x2e // enable mvd vld timeout and threshold 831*53ee8cc1Swenshuai.xi #define CMD_ENABLE_INT_STAT 0x2f // set which int be enabled 832*53ee8cc1Swenshuai.xi 833*53ee8cc1Swenshuai.xi #define CMD_GET_INT_STAT 0x30 834*53ee8cc1Swenshuai.xi #define CMD_PARSE_M4V_PACKMD 0x31 835*53ee8cc1Swenshuai.xi #define CMD_RD_PTS 0x32 836*53ee8cc1Swenshuai.xi #define CMD_FLUSH_LAST_IPFRAME 0x33 837*53ee8cc1Swenshuai.xi #define CMD_DECODE_STATUS 0x34 // arg0 = lastcommand ; arg1 = decode_status 838*53ee8cc1Swenshuai.xi #define CMD_VBUFFER_COUNT 0x35 839*53ee8cc1Swenshuai.xi #define CMD_START_DEC_STRICT 0x36 // start decoding in First I and skip non reference frame B decoding 840*53ee8cc1Swenshuai.xi #define CMD_SW_RESET 0x37 841*53ee8cc1Swenshuai.xi #define CMD_MVD_FAST_INT 0x38 842*53ee8cc1Swenshuai.xi #define CMD_DIU_WIDTH_ALIGN 0x39 843*53ee8cc1Swenshuai.xi #define CMD_SW_IDX_ADJ 0x3a // arg0=1 set sw_index as previous queue index infomation 844*53ee8cc1Swenshuai.xi #define CMD_PARSER_READ_POSITION 0x3b 845*53ee8cc1Swenshuai.xi #define CMD_REPEAT_MODE 0x3c // arg0=1 when frame display repeat only show one field 846*53ee8cc1Swenshuai.xi #define CMD_PTS_BASE 0x3d 847*53ee8cc1Swenshuai.xi #define CMD_SKIP_TO_PTS 0x3e 848*53ee8cc1Swenshuai.xi #define CMD_AVSYNC_FREERUN_THRESHOLD 0x3f 849*53ee8cc1Swenshuai.xi 850*53ee8cc1Swenshuai.xi #define CMD_DEBUG_BUF_START 0x40 851*53ee8cc1Swenshuai.xi #define CMD_DEBUG_CTL 0x42 852*53ee8cc1Swenshuai.xi #define CMD_RD_IO 0x43 853*53ee8cc1Swenshuai.xi #define CMD_WR_IO 0x44 854*53ee8cc1Swenshuai.xi #define CMD_FB_RED_SET 0x45 855*53ee8cc1Swenshuai.xi #define CMD_FB_NUM 0x46 856*53ee8cc1Swenshuai.xi #define CMD_PTS_DETECTOR_EN 0x47 // enable filter for stream discontinue // to force the pts follow stc when pts=-1 857*53ee8cc1Swenshuai.xi #define CMD_PTS_TBL_RESET 0x48 // to reset pas/vld and pts_tbl 858*53ee8cc1Swenshuai.xi #define CMD_DRAM_OBF 0x49 // for Dram OBF key setting 859*53ee8cc1Swenshuai.xi #define CMD_FP_FILTER 0x4A // 0:1 for disable/enable field polarity tuning filter, 0 for default... 860*53ee8cc1Swenshuai.xi #define CMD_PUSH_FIRST_FRAME_DISP 0x4B // 0:1 for disable/enable to push the first I-frame to dispQ when decoded done on ts and ts-file mode, 0 for default(disable)... 861*53ee8cc1Swenshuai.xi #define CMD_FAST_RST 0x4C // 1 for enable mvd self reset... 862*53ee8cc1Swenshuai.xi #define CMD_RVU_EN 0x4D //open RVU feature 863*53ee8cc1Swenshuai.xi 864*53ee8cc1Swenshuai.xi #define CMD_SLQ_START 0x50 //SLQ start address, from LSB to MSB are arg0, arg1, arg2, arg3 865*53ee8cc1Swenshuai.xi #define CMD_SLQ_END 0x51 //SLQ end address, from LSB to MSB are arg0, arg1, arg2, arg3 866*53ee8cc1Swenshuai.xi #define CMD_SLQ_AVAIL_LEVEL 0x52 //arg0: 4-0 867*53ee8cc1Swenshuai.xi #define CMD_FPGA_COMP 0x53 //arg0: 1/0:enable/disable FPGA comp 868*53ee8cc1Swenshuai.xi #define CMD_DIVX_PATCH 0x54 //arg0: D[0] divx mv p interlace chroma adjust 869*53ee8cc1Swenshuai.xi #define CMD_HEADER_INFO_BUF 0x55 //header info buffer base address, from LSB to MSB are arg0, arg1, arg2, arg3 870*53ee8cc1Swenshuai.xi #define CMD_IDCT_SEL 0x56 // arg0 D[0]:0/1 llm/divx6 D[1]:0/1 unbias/bias rounding mode 871*53ee8cc1Swenshuai.xi #define CMD_VOL_INFO_BUF 0x57 872*53ee8cc1Swenshuai.xi #define CMD_FRAME_INFO_BUF 0x58 873*53ee8cc1Swenshuai.xi #define CMD_CODE_OFFSET 0x59 874*53ee8cc1Swenshuai.xi #define CMD_RESET_FRAMECOUNT 0x5a 875*53ee8cc1Swenshuai.xi #define CMD_CHIPID 0x5b 876*53ee8cc1Swenshuai.xi #define CMD_DEC_FRAME_INFO_BUF 0x5c 877*53ee8cc1Swenshuai.xi #define CMD_GET_FW_VERSION 0x5E 878*53ee8cc1Swenshuai.xi #define CMD_GET_EN_CATCH_DATA 0x5F 879*53ee8cc1Swenshuai.xi 880*53ee8cc1Swenshuai.xi #define CMD_SLQ_TBL_BUF_START 0x60 881*53ee8cc1Swenshuai.xi #define CMD_SLQ_TBL_BUF_END 0x61 882*53ee8cc1Swenshuai.xi #define CMD_SLQ_UPDATE_TBL_WPTR 0x62 883*53ee8cc1Swenshuai.xi #define CMD_SLQ_GET_TBL_RPTR 0x63 884*53ee8cc1Swenshuai.xi 885*53ee8cc1Swenshuai.xi // FW stop updating frames when vsync, but decoding process is still going. 886*53ee8cc1Swenshuai.xi #define CMD_FREEZE_DISP 0x64 887*53ee8cc1Swenshuai.xi #define CMD_DS_VIRTUAL_BOX 0x65 888*53ee8cc1Swenshuai.xi #define CMD_SHOW_ONE_FIELD 0x66 889*53ee8cc1Swenshuai.xi #define CMD_FD_MASK_DELAY_CNT 0x67 // delay n's vsync then active the fd_mask 890*53ee8cc1Swenshuai.xi 891*53ee8cc1Swenshuai.xi #define CMD_UPDATE_FRAME 0x68 // updating next frame in slow motion mode 892*53ee8cc1Swenshuai.xi #define CMD_FRC_OUPUT 0x69 893*53ee8cc1Swenshuai.xi #define CMD_FRC_DROP_BEHAVIOR 0x6A // arg0: FRC_DROP_FRAME/FRC_DROP_FIELD, default is FRC_DROP_FRAME 894*53ee8cc1Swenshuai.xi 895*53ee8cc1Swenshuai.xi #define CMD_GET_NEXTDISPFRM 0x6B // for Mstreamer mode and mcu mode 896*53ee8cc1Swenshuai.xi #define CMD_FLIP_RELEASE_FRAME 0x6C // for Mstreamer mode and mcu mode 897*53ee8cc1Swenshuai.xi #define CMD_SEND_UNI_PTS 0x6D // for Mstreamer mode and mcu mode 898*53ee8cc1Swenshuai.xi #define CMD_SET_MST_MODE 0x6E // for Mstreamer mode and mcu mode 899*53ee8cc1Swenshuai.xi #define CMD_SET_MCU_MODE 0x6F // for mcu mode 900*53ee8cc1Swenshuai.xi 901*53ee8cc1Swenshuai.xi #define CMD_DUMP_BITSTREAM_BASE 0x70 902*53ee8cc1Swenshuai.xi #define CMD_DUMP_BITSTREAM_LENGTH 0x71 903*53ee8cc1Swenshuai.xi 904*53ee8cc1Swenshuai.xi #define CMD_XC_LOW_DELAY_PARA 0x72 // set the parameter for XC_low_delay mechanism 905*53ee8cc1Swenshuai.xi 906*53ee8cc1Swenshuai.xi #define CMD_MVD_IDLE 0x73 907*53ee8cc1Swenshuai.xi #define CMD_INTERFACE_VERSION 0x74 908*53ee8cc1Swenshuai.xi #define CMD_VC1_STREAM_TYPE_JPEG 0x75 909*53ee8cc1Swenshuai.xi #define CMD_VC1_STREAM_TYPE_MJPEG 0x76 910*53ee8cc1Swenshuai.xi #define CMD_VC1_BYPASS_MODE 0x77 911*53ee8cc1Swenshuai.xi #define CMD_VC1_UPDATE_SLQ 0x78 912*53ee8cc1Swenshuai.xi #define CMD_VC1_HW_SLQ_RESET 0x79 913*53ee8cc1Swenshuai.xi #define CMD_FLUSH_DISP_QUEUE 0x7A 914*53ee8cc1Swenshuai.xi #define CMD_VC1_FORCE_INTLACE_DISP 0x7B 915*53ee8cc1Swenshuai.xi #define CMD_VC1_IP_SCALE_THRESHOLD 0x7C 916*53ee8cc1Swenshuai.xi #define CMD_MOTION_COM_REDUCE 0x7D 917*53ee8cc1Swenshuai.xi #define CMD_CLOSE_DEBLOCK 0x7E 918*53ee8cc1Swenshuai.xi #define CMD_FIXED_FRAME_BUFFER 0x7F 919*53ee8cc1Swenshuai.xi #define CMD_ENABLE_AUTO_MUTE 0x80 920*53ee8cc1Swenshuai.xi #define CMD_FORCE_ALIGN_VSIZE 0x81 921*53ee8cc1Swenshuai.xi #define CMD_PROG_SEQ_STREAM 0x82 922*53ee8cc1Swenshuai.xi 923*53ee8cc1Swenshuai.xi // File mode avsync related 924*53ee8cc1Swenshuai.xi #define CMD_ENABLE_AVSYNC_QUALIFIER 0x83// arg0=1:for enhance to do avsync when "enable_avsync=1" && "(lastcommand != CMD_PLAY)" for patch avsync on particular clip, 20120314 925*53ee8cc1Swenshuai.xi #define CMD_ENABLE_LAST_FRAME_QUALIFIER 0x84// arg0=1:for strict qualify the last_frame_show_done after the last_frame been displayed by mvop, 20120309 926*53ee8cc1Swenshuai.xi #define CMD_ENABLE_FILE_SYNC 0x85 927*53ee8cc1Swenshuai.xi #define CMD_PTS_TBL_START 0x86 928*53ee8cc1Swenshuai.xi #define CMD_FORCE_BLUE_SCREEN 0x87 929*53ee8cc1Swenshuai.xi #define CMD_ENABLE_LAST_FRAME_SHOW 0x88 930*53ee8cc1Swenshuai.xi #define CMD_DYNAMIC_SCALE_BASE 0x89 931*53ee8cc1Swenshuai.xi #define CMD_ENABLE_DYNAMIC_SCALE 0x8A 932*53ee8cc1Swenshuai.xi #define CMD_SCALER_INFO_BASE 0x8B 933*53ee8cc1Swenshuai.xi #define CMD_SW_BITPLANE_BASE 0x8C 934*53ee8cc1Swenshuai.xi #define CMD_FRONTEND_SEL 0x8D // front end input selection 935*53ee8cc1Swenshuai.xi #define CMD_ENABLE_FREEZE_PIC 0x8E 936*53ee8cc1Swenshuai.xi #define CMD_FORBID_RESOLUTION_CHANGE 0x8F 937*53ee8cc1Swenshuai.xi 938*53ee8cc1Swenshuai.xi // JPEG command 939*53ee8cc1Swenshuai.xi #define CMD_JPEG_CONSTRAIN_SIZE 0x91 940*53ee8cc1Swenshuai.xi #define CMD_JPEG_STATUS 0x92 941*53ee8cc1Swenshuai.xi #define CMD_JPEG_SCALEFACTOR 0x93 942*53ee8cc1Swenshuai.xi #define CMD_JPEG_ROI 0x94 943*53ee8cc1Swenshuai.xi #define CMD_JPEG_ROI_DIM 0x95 944*53ee8cc1Swenshuai.xi #define CMD_JPEG_IPM 0x96 945*53ee8cc1Swenshuai.xi 946*53ee8cc1Swenshuai.xi #define CMD_ENABLE_SAM_UNI 0xA0 // for Mstreamer mode 947*53ee8cc1Swenshuai.xi #define CMD_FLIP_TO_DISP 0xA1 // for Mstreamer mode 948*53ee8cc1Swenshuai.xi 949*53ee8cc1Swenshuai.xi #define CMD_MIU_OFFSET 0xA2 // saving miu offset from hk for LDMA usage 950*53ee8cc1Swenshuai.xi #define CMD_IQMEM_CTRL 0xA3 // for iqmem ctrl from HK 951*53ee8cc1Swenshuai.xi #define CMD_IQMEM_CTRL_ACK 0xA4 // return ack by f/w 952*53ee8cc1Swenshuai.xi #define CMD_IQMEM_BASE_ADDR 0xA5 // unit in byte 953*53ee8cc1Swenshuai.xi 954*53ee8cc1Swenshuai.xi // PES file-in command 955*53ee8cc1Swenshuai.xi #define CMD_PES_FILE_LOW_BND 0xA6 // for pes file in mode low bound 956*53ee8cc1Swenshuai.xi #define CMD_PES_FILE_UP_BND 0xA7 // for pes file in mode upper bound 957*53ee8cc1Swenshuai.xi #define CMD_PES_FILE_EN 0xA8 // for enable pes file in mode 958*53ee8cc1Swenshuai.xi #define CMD_PES_FILE_UPDATE_WPTR 0xA9 // for update pes file mode wr_ptr 959*53ee8cc1Swenshuai.xi #define CMD_PES_FILE_GET_RPTR 0xAA // for got pes file in mode rd_ptr 960*53ee8cc1Swenshuai.xi 961*53ee8cc1Swenshuai.xi #define CMD_REGISTER_BASE 0xAB 962*53ee8cc1Swenshuai.xi 963*53ee8cc1Swenshuai.xi //new feature 964*53ee8cc1Swenshuai.xi #define CMD_SUSPEND_DS 0xB0 965*53ee8cc1Swenshuai.xi #define CMD_MPEG_LINER_START 0xB1 966*53ee8cc1Swenshuai.xi #define CMD_PREBUFFER_SIZE 0xB2 //unit:bytes 967*53ee8cc1Swenshuai.xi #define CMD_CC_ENABLE_EXTERNAL_BUFFER 0xB3 968*53ee8cc1Swenshuai.xi #define CMD_TIME_INCR_PREDICT 0xB4 // to predict the "vol_time_incr" when there is no vol_header on mpeg4... 969*53ee8cc1Swenshuai.xi #define CMD_RUNTIME_DEBUG_CMD 0XB5 970*53ee8cc1Swenshuai.xi #define CMD_DUMP_MVD_HARDWARE_REGISTER 0xB6 971*53ee8cc1Swenshuai.xi #define CMD_SMOOTH_REWIND 0xB7 //Smooth_rewind 972*53ee8cc1Swenshuai.xi #define CMD_DECODE_ERROR_TOLERANCE 0xB8 //drop error rate 973*53ee8cc1Swenshuai.xi #define CMD_PVR_SEAMLESS_MODE 0xB9 974*53ee8cc1Swenshuai.xi #define CMD_AUTO_REDUCE_ES_DATA 0xBA 975*53ee8cc1Swenshuai.xi 976*53ee8cc1Swenshuai.xi // add data in bitstream from skip mode back to normal 977*53ee8cc1Swenshuai.xi // 00_00_01_C5_ab_08_06_27 978*53ee8cc1Swenshuai.xi #define FW_SPE_SCODE 0xC5 979*53ee8cc1Swenshuai.xi #define FW_RESUME1 0xab08 980*53ee8cc1Swenshuai.xi #define FW_RESUME2 0x0627 981*53ee8cc1Swenshuai.xi #define FILE_PAUSE_SC 0xBE 982*53ee8cc1Swenshuai.xi #define FILE_END_SC 0xC6 983*53ee8cc1Swenshuai.xi #define FILE_END_EXT1 0xaabb 984*53ee8cc1Swenshuai.xi #define FILE_END_EXT2 0xccdd 985*53ee8cc1Swenshuai.xi #define FILE_END_EXT3 0xeeff 986*53ee8cc1Swenshuai.xi #define FILE_END_EXT4 0xffff 987*53ee8cc1Swenshuai.xi #define FILE_END_EXT5 0x0000 988*53ee8cc1Swenshuai.xi #endif 989