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93 ////////////////////////////////////////////////////////////////////////////////
94
95 ///////////////////////////////////////////////////////////////////////////////////////////////////
96 ///
97 /// file drvHVD_EX.c
98 /// @brief HVD Driver Interface
99 /// @author MStar Semiconductor Inc.
100 ///////////////////////////////////////////////////////////////////////////////////////////////////
101
102
103 //-------------------------------------------------------------------------------------------------
104 // Include Files
105 //-------------------------------------------------------------------------------------------------
106 // Common Definition
107 #include <string.h>
108 #include "drvHVD_Common.h"
109 #include "drvHVD_EX.h"
110 #include "drvHVD_def.h"
111
112 #include "fwHVD_if.h"
113 #include "halVPU_EX.h"
114 #include "halHVD_EX.h"
115 #include "drvSYS.h"
116
117 #if HVD_ENABLE_AUTO_SET_REG_BASE
118 #include "drvMMIO.h"
119 #endif
120
121 #if !defined(MSOS_TYPE_NUTTX) || defined(SUPPORT_X_MODEL_FEATURE)
122
123 //-------------------------------------------------------------------------------------------------
124 // Driver Compiler Options
125 //-------------------------------------------------------------------------------------------------
126 //#define SUPPORT_X_MODEL_FEATURE
127 //#define SUPPORT_X_MODEL_HVD_FEATURE //there is a side effect for CB when enable this define.should find the root cause then enable it
128 #define DISABLE_ISR_DETACH
129
130 //-------------------------------------------------------------------------------------------------
131 // Local Defines
132 //-------------------------------------------------------------------------------------------------
133
134 // Drv memory usage
135 #if defined(REDLION_LINUX_KERNEL_ENVI)
136 #define HVD_DTV_VIDEO_DELAY 0 // ms
137 #else
138 #define HVD_DTV_VIDEO_DELAY 0 // ms
139 #endif
140 #define HVD_FW_CMD_TIMEOUT_DEFAULT 100 // ms
141 #define HVD_FW_EXIT_ACTION_TIMEOUT 3500 // ms
142
143 #define HVD_MAX_STREAMS 2
144
145 #define HVD_CTRL_INIT_FINISHED BIT(0) // deflaut: 0
146 #define HVD_CTRL_PROCESSING BIT(1) // deflaut: 0
147 #define HVD_CTRL_DATA_END BIT(2) // deflaut: 0
148 #define HVD_CTRL_DISPLAY_CTRL BIT(3) // deflaut: 0
149 #define HVD_CTRL_DISP_INFO_RDY BIT(4) // deflaut: 0
150
151 #define HVD_CTRL_DISP_OUTSIDE BIT(5)//BIT(9) // deflaut: 0
152 typedef enum
153 {
154 E_HVD_CHECK_CMD_NONE = 0, //decode -> decode_finish
155 E_HVD_CHECK_CMD_INIT,
156 E_HVD_CHECK_CMD_TRIGGER_DISP,
157 E_HVD_CHECK_CMD_SEEK2PTS,
158 E_HVD_CHECK_CMD_MAX,
159 } HVD_Check_Cmd;
160
161 #define HVD_MIU_PROTECT_HVD BIT(0)
162 #define HVD_MIU_PROTECT_MVD BIT(1)
163 #define HVD_MIU_PROTECT_VPU BIT(2)
164
165 #define _DRV_HVD_EX_Entry(u8DrvId) \
166 do \
167 { \
168 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32CtrlMode |= HVD_CTRL_PROCESSING; \
169 } while (0)
170
171 #define _DRV_HVD_EX_RET(u8DrvId, _ret_) \
172 do \
173 { \
174 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32CtrlMode &= (~HVD_CTRL_PROCESSING); \
175 return (_ret_); \
176 } while (0)
177
178 #define _DRV_HVD_Inited(u8DrvId,_ret_) \
179 do \
180 { \
181 if (!(pHVDDrvContext->bHVDIsInited[u8DrvId])) \
182 { \
183 return _ret_; \
184 } \
185 } while (0)
186
187 #define _DRV_HVD_Rsting(u8DrvId,_ret_) \
188 do \
189 { \
190 if (pHVDDrvContext->bHVDIsIniting[u8DrvId]) \
191 { \
192 return _ret_; \
193 } \
194 } while (0)
195
196 #define _DRV_HVD_Ctrl(u8DrvId, x) ( pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32CtrlMode & (x) )
197
198 #define _DRV_HVD_SetCtrl(u8DrvId, x) \
199 do \
200 { \
201 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32CtrlMode |= (x); \
202 } while (0)
203
204 #ifndef UNUSED
205 #define UNUSED(x) (void)(x)
206 #endif
207
208 //-------------------------------------------------------------------------------------------------
209 // Local Structures
210 //-------------------------------------------------------------------------------------------------
211
212 //-------------------------------------------------------------------------------------------------
213 // Local Functions Prototype
214 //-------------------------------------------------------------------------------------------------
215 static void _HVD_EX_SetShareInfoAddr(MS_U32 u32Id);
216 static HVD_EX_Result _HVD_EX_InitVariables(MS_U32 u32Id, HVD_EX_MemCfg *pStMemCfg, HVD_Init_Params *pStInitParams);
217 static HVD_EX_Result _HVD_EX_Check_Cmd(MS_U32 u32Id, HVD_Check_Cmd eCmd);
218 static HVD_EX_Result _HVD_EX_InitRegCPU(MS_U32 u32Id);
219 static HVD_EX_Result _HVD_EX_SetSyncMode(MS_U32 u32Id, HVD_Sync_Tbl_Type eMode);
220 static HVD_EX_Result _HVD_EX_InitFW_AVC(MS_U32 u32Id);
221 static HVD_EX_Result _HVD_EX_InitFW_RM(MS_U32 u32Id);
222 static HVD_EX_Result _HVD_EX_CheckFWVersion(MS_U32 u32Id);
223 static HVD_EX_Result _HVD_EX_InitFW(MS_U32 u32Id);
224 static MS_BOOL _HVD_EX_IsAllBufferEmpty(MS_U32 u32Id);
225 static MS_BOOL _HVD_EX_IsAllBufferEmpty_VP8(MS_U32 u32Id);
226 static MS_U8 _HVD_EX_GetDrvId(MS_U32 u32Id);
227
228 #if defined(REDLION_LINUX_KERNEL_ENVI)
229 static MS_S32 _HVD_EX_ISRHandler(void);
230 #else
231 static void _HVD_EX_ISRHandler(void);
232 #endif
233
234 static MS_U32 _HVD_EX_ReportLow32BitPTS(MS_U32 u32Id, MS_U32 u32PTS);
235 static MS_U32 _HVD_EX_Map2HVDErrCode(MS_U32 u32ErrCode);
236 static MS_U32 _HVD_EX_Map2HVDESBufStatus(MS_U32 u32ESBufStatus);
237
238 #if 0
239 //-------------------------------------------------------------------------------------------------
240 // Global Variables
241 //-------------------------------------------------------------------------------------------------
242 MS_U32 u32UartCtrl = (E_HVD_UART_CTRL_ERR | E_HVD_UART_CTRL_MUST);
243 MS_U32 u32InitSysTimeBase = 0;
244
245 //-------------------------------------------------------------------------------------------------
246 // Local Variables
247 //-------------------------------------------------------------------------------------------------
248 static MSIF_Version _drv_hvd_version =
249 {
250 .DDI = {HVD_DRV_VERSION,},
251 };
252 static MS_BOOL bHVDIsInited;
253 static MS_BOOL bHVDIsIniting;
254 static HVD_EX_DrvInfo DrvInfo;
255 static HVD_EX_Drv_Ctrl gHVDCtrl_EX[HVD_MAX_STREAMS] =
256 {
257 { .bUsed = FALSE,
258 },
259 { .bUsed = FALSE,
260 },
261 };
262
263 static MS_BOOL bHVDIsrAttached = FALSE;
264 #endif
265 MS_U32 u32UartCtrl = (E_HVD_UART_CTRL_ERR | E_HVD_UART_CTRL_MUST);
266
267 typedef struct
268 {
269 MS_U32 u32InitSysTimeBase[HVD_MAX_STREAMS];
270 MS_BOOL bHVDIsInited[HVD_MAX_STREAMS];
271 MS_BOOL bHVDIsIniting[HVD_MAX_STREAMS];
272 HVD_EX_Drv_Ctrl gHVDCtrl_EX[HVD_MAX_STREAMS];
273 MS_BOOL bHVDIsIsrAttached; //check HVD isr already attached, avoid HVD+HVD re-attached
274 MS_BOOL bEVDIsIsrAttached; //check EVD isr already attached, avoid HVD+HVD re-attached
275 MS_BOOL bHVDDisableISRFlag;
276 MS_BOOL bEVDDisableISRFlag;
277 MS_BOOL bVPUIsSecureMode;
278 //pre_set
279 HVD_Pre_Ctrl gHVDPreCtrl[HVD_MAX_STREAMS];
280 } HVD_Drv_CTX;
281
282 //global variables
283 HVD_Drv_CTX* pHVDDrvContext = NULL;
284 HVD_Drv_CTX gHVDDrvContext;
285 MSIF_Version _drv_hvd_version =
286 {
287 .DDI = {HVD_DRV_VERSION,},
288 };
289 HVD_EX_DrvInfo DrvInfo;
290
291 //-------------------------------------------------------------------------------------------------
292 // Debug Functions
293 //-------------------------------------------------------------------------------------------------
294
295
296 //-------------------------------------------------------------------------------------------------
297 // Local Functions
298 //-------------------------------------------------------------------------------------------------
_HVD_EX_Context_Init(void)299 static void _HVD_EX_Context_Init(void)
300 {
301 pHVDDrvContext->bHVDIsIsrAttached = FALSE;
302 pHVDDrvContext->bEVDIsIsrAttached = FALSE;
303 return;
304 }
305
_HVD_EX_SetShareInfoAddr(MS_U32 u32Id)306 static void _HVD_EX_SetShareInfoAddr(MS_U32 u32Id)
307 {
308 MS_VIRT u32ShmAddr = HAL_VPU_EX_GetSHMAddr();
309
310 HAL_VPU_EX_SetShareInfoAddr(u32Id, u32ShmAddr);
311
312 return;
313 }
314
_HVD_EX_InitVariables(MS_U32 u32Id,HVD_EX_MemCfg * pStMemCfg,HVD_Init_Params * pStInitParams)315 static HVD_EX_Result _HVD_EX_InitVariables(MS_U32 u32Id, HVD_EX_MemCfg *pStMemCfg, HVD_Init_Params *pStInitParams)
316 {
317 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
318 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
319
320 memset((void *) pCtrl, 0, sizeof(HVD_EX_Drv_Ctrl));
321 pCtrl->bFrmRateSupported = TRUE;
322
323 // PreSetControl
324 HAL_HVD_EX_SetPreCtrlVariables(u32Id,(MS_VIRT)(&pHVDDrvContext->gHVDPreCtrl[u8DrvId]));
325
326 if (sizeof(HVD_Init_Params) == sizeof(HVD_EX_InitSettings))
327 {
328 HVD_memcpy((void *) &pCtrl->InitParams, pStInitParams, sizeof(HVD_Init_Params));
329 }
330 else
331 {
332 HVD_EX_MSG_ERR("HVD struct define is diff: HVD_Init_Params(%u) vs HVD_Init_Settings(%u)\n",
333 (MS_U32) sizeof(HVD_Init_Params), (MS_U32) sizeof(HVD_EX_InitSettings));
334 return E_HVD_EX_FAIL;
335 }
336
337 // fill memory
338 if (pStMemCfg->u32MIU1BaseAddr == 0)
339 {
340 // Get physical address from MIU selection= E_CHIP_MIU_2 and offset=0x10000000
341 _miu_offset_to_phy(E_CHIP_MIU_1, 0, pCtrl->MemMap.u32MIU1BaseAddr);
342 _miu_offset_to_phy(E_CHIP_MIU_2, 0, pCtrl->MemMap.u32MIU2BaseAddr);
343
344 }
345 else
346 {
347 pCtrl->MemMap.u32MIU1BaseAddr = pStMemCfg->u32MIU1BaseAddr; /// TODO : pStMemCfg need member u32MIU2BaseAddr
348 }
349
350 pCtrl->MemMap.eFWSourceType = (HVD_FWInputSourceType) pStMemCfg->eFWSourceType;
351 pCtrl->MemMap.u32FWBinaryVAddr = pStMemCfg->u32FWBinaryVAddr;
352 pCtrl->MemMap.u32FWBinaryAddr = (MS_U32) pStMemCfg->u32FWBinaryAddr;
353 pCtrl->MemMap.u32FWBinarySize = pStMemCfg->u32FWBinarySize;
354 pCtrl->MemMap.u32VLCBinaryVAddr = pStMemCfg->u32VLCBinaryVAddr;
355 pCtrl->MemMap.u32VLCBinaryAddr = (MS_U32) pStMemCfg->u32VLCBinaryAddr;
356 pCtrl->MemMap.u32VLCBinarySize = pStMemCfg->u32VLCBinarySize;
357 pCtrl->MemMap.u32CodeBufVAddr = pStMemCfg->u32CodeBufVAddr;
358 pCtrl->MemMap.u32CodeBufAddr = (MS_U32) pStMemCfg->u32CodeBufAddr;
359 pCtrl->MemMap.u32CodeBufSize = pStMemCfg->u32CodeBufSize;
360 pCtrl->MemMap.u32FrameBufVAddr = pStMemCfg->u32FrameBufVAddr;
361 pCtrl->MemMap.u32FrameBufAddr = (MS_U32) pStMemCfg->u32FrameBufAddr;
362 pCtrl->MemMap.u32FrameBufSize = pStMemCfg->u32FrameBufSize;
363
364 #if HVD_ENABLE_MVC
365 if (((pCtrl->InitParams.u32ModeFlag & HVD_INIT_HW_MASK) == HVD_INIT_HW_MVC) &&
366 ((pCtrl->InitParams.u32ModeFlag & HVD_INIT_DUAL_ES_MASK) == HVD_INIT_DUAL_ES_ENABLE))
367 {
368 HVD_EX_Drv_Ctrl *pDrvCtrl_sub = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId+1]);
369 memset((void *) pDrvCtrl_sub, 0, sizeof(HVD_EX_Drv_Ctrl));
370
371 /// Copy to sub view ctrl
372 HVD_memcpy((void *) &pDrvCtrl_sub->InitParams, pStInitParams, sizeof(HVD_Init_Params));
373
374 // fill memory
375 if (pStMemCfg->u32MIU1BaseAddr == 0)
376 {
377 _miu_offset_to_phy(E_CHIP_MIU_1, 0, pDrvCtrl_sub->MemMap.u32MIU1BaseAddr);
378 _miu_offset_to_phy(E_CHIP_MIU_2, 0, pDrvCtrl_sub->MemMap.u32MIU2BaseAddr);
379 }
380 else
381 {
382 pDrvCtrl_sub->MemMap.u32MIU1BaseAddr = pStMemCfg->u32MIU1BaseAddr; /// TODO : pStMemCfg need member u32MIU2BaseAddr
383 }
384
385 pCtrl->MemMap.u32BitstreamBufVAddr= pStMemCfg->u32BitstreamBufVAddr;
386 pCtrl->MemMap.u32BitstreamBufAddr = (MS_U32) pStMemCfg->u32BitstreamBufAddr ;
387 #if 1
388 pCtrl->MemMap.u32BitstreamBufSize = pStMemCfg->u32BitstreamBufSize/2 ;
389 pDrvCtrl_sub->MemMap.u32BitstreamBufVAddr = pStMemCfg->u32BitstreamBufVAddr + pStMemCfg->u32BitstreamBufSize/2;
390 pDrvCtrl_sub->MemMap.u32BitstreamBufAddr = (MS_U32) pStMemCfg->u32BitstreamBufAddr + pStMemCfg->u32BitstreamBufSize/2;
391 pDrvCtrl_sub->MemMap.u32BitstreamBufSize = pStMemCfg->u32BitstreamBufSize/2 ;
392 #else
393 pCtrl->MemMap.u32BitstreamBufSize = (pStMemCfg->u32BitstreamBufSize*57/128) ;
394 pDrvCtrl_sub->MemMap.u32BitstreamBufVAddr = pStMemCfg->u32BitstreamBufVAddr + (pStMemCfg->u32BitstreamBufSize*57/128);
395 pDrvCtrl_sub->MemMap.u32BitstreamBufAddr = (MS_U32) pStMemCfg->u32BitstreamBufAddr + (pStMemCfg->u32BitstreamBufSize*57/128);
396 pDrvCtrl_sub->MemMap.u32BitstreamBufSize = (pStMemCfg->u32BitstreamBufSize*71/128) ;
397 #endif
398
399 pCtrl->MemMap.u32DrvProcessBufVAddr = pDrvCtrl_sub->MemMap.u32DrvProcessBufVAddr = pStMemCfg->u32DrvProcessBufVAddr;
400 pCtrl->MemMap.u32DrvProcessBufAddr = pDrvCtrl_sub->MemMap.u32DrvProcessBufAddr = (MS_U32) pStMemCfg->u32DrvProcessBufAddr;
401 pCtrl->MemMap.u32DrvProcessBufSize = pDrvCtrl_sub->MemMap.u32DrvProcessBufSize = pStMemCfg->u32DrvProcessBufSize;
402
403 pDrvCtrl_sub->MemMap.u32CodeBufVAddr = pStMemCfg->u32CodeBufVAddr;
404 pDrvCtrl_sub->MemMap.u32CodeBufAddr = (MS_U32) pStMemCfg->u32CodeBufAddr;
405 pDrvCtrl_sub->MemMap.u32CodeBufSize = pStMemCfg->u32CodeBufSize;
406
407 HVD_EX_MSG_INF("[MVC] Bitstream buffer: 1st = [0x%lx, 0x%lx, 0x%lx], 2nd = [0x%lx, 0x%lx, 0x%lx].\n",
408 pCtrl->MemMap.u32BitstreamBufVAddr,
409 pCtrl->MemMap.u32BitstreamBufAddr,
410 pCtrl->MemMap.u32BitstreamBufSize,
411 pDrvCtrl_sub->MemMap.u32BitstreamBufVAddr,
412 pDrvCtrl_sub->MemMap.u32BitstreamBufAddr,
413 pDrvCtrl_sub->MemMap.u32BitstreamBufSize);
414 }
415 else
416 #endif
417 {
418 pCtrl->MemMap.u32BitstreamBufVAddr = pStMemCfg->u32BitstreamBufVAddr;
419 pCtrl->MemMap.u32BitstreamBufAddr = (MS_U32) pStMemCfg->u32BitstreamBufAddr;
420 pCtrl->MemMap.u32BitstreamBufSize = pStMemCfg->u32BitstreamBufSize;
421 pCtrl->MemMap.u32DrvProcessBufVAddr = pStMemCfg->u32DrvProcessBufVAddr;
422 pCtrl->MemMap.u32DrvProcessBufAddr = (MS_U32) pStMemCfg->u32DrvProcessBufAddr;
423 pCtrl->MemMap.u32DrvProcessBufSize = pStMemCfg->u32DrvProcessBufSize;
424 }
425
426 HVD_EX_MSG_INF("HVD mmap: MIU1base:0x%lx, MIU2base:0x%lx,FW(type:%d addr=0x%lx size=0x%lx), VLC(addr=0x%lx size=0x%lx), Code(addr=0x%lx size=0x%lx), FB(addr=0x%lx size=0x%lx), Bit(addr=0x%lx size=0x%lx), Drv(addr=0x%lx size=0x%lx)\n",
427 pCtrl->MemMap.u32MIU1BaseAddr,
428 pCtrl->MemMap.u32MIU2BaseAddr,
429 pCtrl->MemMap.eFWSourceType, pCtrl->MemMap.u32FWBinaryAddr, pCtrl->MemMap.u32FWBinarySize,
430 pCtrl->MemMap.u32VLCBinaryAddr, pCtrl->MemMap.u32VLCBinarySize,
431 pCtrl->MemMap.u32CodeBufAddr, pCtrl->MemMap.u32CodeBufSize,
432 pCtrl->MemMap.u32FrameBufAddr, pCtrl->MemMap.u32FrameBufSize,
433 pCtrl->MemMap.u32BitstreamBufAddr, pCtrl->MemMap.u32BitstreamBufSize,
434 pCtrl->MemMap.u32DrvProcessBufAddr, pCtrl->MemMap.u32DrvProcessBufSize);
435
436 pCtrl->InitParams.u16DecoderClock = HAL_HVD_EX_GetCorretClock(pStInitParams->u16DecoderClock);
437 pCtrl->InitParams.u16ChipECONum = (MS_U16)MDrv_SYS_GetChipRev();
438
439
440 HVD_EX_MSG_INF("[VDEC]pCtrl->InitParams.u16ChipECONum : %d \n ", pCtrl->InitParams.u16ChipECONum);
441
442 MS_U32 i;
443 pCtrl->CloseCaptionInfo.u8ParsingStatus = 0xff;
444 pCtrl->CloseCaptionInfo.u8BufMiuSel[0] = pCtrl->CloseCaptionInfo.u8BufMiuSel[1] = E_CHIP_MIU_0;
445 pCtrl->CloseCaptionInfo.b708Enable = FALSE;
446 pCtrl->CloseCaptionInfo.u32FWUsrDataRIdx = pCtrl->CloseCaptionInfo.u32FWUsrDataWIdx = 0;
447 pCtrl->CloseCaptionInfo.u32PktLen708 = 0;
448 pCtrl->CloseCaptionInfo.u32PktHdrAddr708 = 0;
449
450
451 for (i=0;i<2;i++)
452 {
453 pCtrl->CloseCaptionInfo.u32RingBufStartPAddr[i] = 0;
454 pCtrl->CloseCaptionInfo.u32RingBufLen[i] = 0;
455 pCtrl->CloseCaptionInfo.u32RingBufVacancy[i] = 0;
456 pCtrl->CloseCaptionInfo.u32RingBufRPAddr[i] = 0;
457 pCtrl->CloseCaptionInfo.u32RingBufWPAddr[i] = 0;
458 pCtrl->CloseCaptionInfo.bOverFlow[i] = FALSE;
459 }
460
461 pCtrl->CloseCaptionInfo.b608InfoEnhance = FALSE;
462
463 #if HVD_ENABLE_STOP_ACCESS_OVER_256
464 pCtrl->bCannotAccessMIU256 = TRUE;
465 #endif
466
467 pCtrl->bAutoRmLastZeroByte = TRUE;
468 pCtrl->u32CmdTimeout = HVD_FW_CMD_TIMEOUT_DEFAULT;
469
470 if (pStInitParams->u8TurboInit & E_HVD_EX_TURBOINIT_FW_RELOAD)
471 {
472 pCtrl->bTurboFWMode = TRUE;
473 }
474
475 HAL_HVD_EX_SetMiuBurstLevel(pCtrl, E_HVD_BURST_CNT_DISABLE);
476
477 pCtrl->u32FlushRstPtr = 0;
478
479 return E_HVD_EX_OK;
480 }
481
_HVD_EX_Check_Cmd(MS_U32 u32Id,HVD_Check_Cmd eCmd)482 static HVD_EX_Result _HVD_EX_Check_Cmd(MS_U32 u32Id, HVD_Check_Cmd eCmd)
483 {
484 MS_U32 u32Tmp0 = 0;
485 MS_U32 u32Tmp1 = 0;
486 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
487
488 switch (eCmd)
489 {
490 case E_HVD_CHECK_CMD_INIT:
491 {
492 if (!(pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u8TurboInit & E_HVD_EX_TURBOINIT_CHECK))
493 {
494 // Check mode
495 u32Tmp0 = pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_HW_MASK;
496
497 if (!MDrv_HVD_EX_GetCaps((HVD_EX_Codec) u32Tmp0))
498 {
499 HVD_EX_MSG_ERR("Init: HW not support type:%d\n", eCmd);
500 return E_HVD_EX_RET_UNSUPPORTED;
501 }
502
503 u32Tmp0 = pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK;
504
505 if (u32Tmp0 == HVD_INIT_MAIN_LIVE_STREAM)
506 {
507 if ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_INPUT_MASK) == HVD_INIT_INPUT_DRV)
508 {
509 HVD_EX_MSG_ERR("Init: Live stream mode can not use Drv input\n");
510 return E_HVD_EX_RET_INVALID_PARAMETER;
511 }
512 if (!(pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & (HVD_INIT_UTOPIA_ENVI | HVD_INIT_DBG_FW)))
513 {
514 // need not to check this under debug mode
515 if ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_START_CODE_MASK) ==
516 HVD_INIT_START_CODE_REMOVED)
517 {
518 HVD_EX_MSG_ERR("Init: Live stream mode must have start code\n");
519 return E_HVD_EX_RET_INVALID_PARAMETER;
520 }
521 if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u8SyncType != E_HVD_SYNC_TBL_TYPE_NON)
522 {
523 HVD_EX_MSG_ERR("Init: Live stream mode can not use none ATS sync mode\n");
524 return E_HVD_EX_RET_INVALID_PARAMETER;
525 }
526 }
527 }
528 else if ((u32Tmp0 == HVD_INIT_MAIN_FILE_RAW) || (u32Tmp0 == HVD_INIT_MAIN_FILE_TS))
529 {
530 if (!(pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & (HVD_INIT_UTOPIA_ENVI | HVD_INIT_DBG_FW)))
531 {
532 if ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u8SyncType != E_HVD_SYNC_TBL_TYPE_DTS)
533 && (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u8SyncType != E_HVD_SYNC_TBL_TYPE_STS)
534 && (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u8SyncType != E_HVD_SYNC_TBL_TYPE_PTS)
535 && (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u8SyncType != E_HVD_SYNC_TBL_TYPE_NON))
536 {
537 HVD_EX_MSG_ERR("Init: sync mode is not set. use default value:%d\n",
538 (MS_U16) E_HVD_SYNC_TBL_TYPE_PTS);
539 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u8SyncType = E_HVD_SYNC_TBL_TYPE_PTS;
540 }
541 }
542 }
543 else if ((u32Tmp0 != HVD_INIT_MAIN_FILE_RAW) && (u32Tmp0 != HVD_INIT_MAIN_FILE_TS))
544 {
545 HVD_EX_MSG_ERR("Init: main type can not be recognized:%ld\n", u32Tmp0);
546 return E_HVD_EX_RET_INVALID_PARAMETER;
547 }
548
549 // check memory map
550 if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32MIU1BaseAddr == 0)
551 {
552 HVD_EX_MSG_ERR("Init: MIU 1 Base addr should not be zero\n");
553 return E_HVD_EX_RET_INVALID_PARAMETER;
554 }
555
556 if ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32CodeBufAddr & 0x7FF) != 0)
557 {
558 HVD_EX_MSG_ERR("Init: Error HVD code address(0x%lx) must 2048 byte alignment\n",
559 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32CodeBufAddr);
560 return E_HVD_EX_RET_INVALID_PARAMETER;
561 }
562 }
563
564 u32Tmp0 = pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK;
565 u32Tmp1 = pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_INPUT_MASK;
566
567 if (u32Tmp0 != HVD_INIT_MAIN_LIVE_STREAM)
568 {
569 if (u32Tmp1 == HVD_INIT_INPUT_DRV)
570 {
571 // check if driver process buffer is in bitstream buffer.
572 MS_U32 tmpAddr = pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32DrvProcessBufAddr;
573
574 if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32DrvProcessBufAddr == 0)
575 {
576 HVD_EX_MSG_ERR("Init: Drv process buffer address should not be zero\n");
577 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].bNoDrvProccBuf = TRUE;
578 //return E_HVD_EX_RET_INVALID_PARAMETER;
579 }
580
581 if ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32BitstreamBufAddr > tmpAddr)
582 || (tmpAddr >
583 (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32BitstreamBufAddr +
584 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32BitstreamBufSize)))
585 {
586 HVD_EX_MSG_ERR
587 ("Init: The driver process buffer shall be located in the bitstream buffer under file mode(TS or MP4) and Drv input.\n");
588 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].bNoDrvProccBuf = TRUE;
589 //return E_HVD_EX_RET_INVALID_PARAMETER;
590 }
591
592 if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32DrvProcessBufSize
593 <
594 (HVD_BBU_ST_ADDR_IN_BITSTREAMBUF + (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_BBU_TBL_ENTRY_NUMB) << 3) +
595 8))
596 {
597 HVD_EX_MSG_ERR
598 ("Init: File mode(TS or MP4) and Drv input must set the process buffer size and must be larger than %lu Bytes:%ld\n",
599 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32DrvProcessBufSize,
600 (MS_U32) (HVD_BBU_ST_ADDR_IN_BITSTREAMBUF +
601 (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_BBU_TBL_ENTRY_NUMB) << 3) + 8));
602 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].bNoDrvProccBuf = TRUE;
603 //return E_HVD_EX_RET_OUTOF_MEMORY;
604 }
605
606 if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32DrvProcessBufSize > 1)
607 {
608 tmpAddr =
609 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32DrvProcessBufAddr +
610 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32DrvProcessBufSize - 1;
611 }
612 else
613 {
614 tmpAddr = pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32DrvProcessBufAddr;
615 }
616
617 if ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32BitstreamBufAddr > tmpAddr)
618 || (tmpAddr >
619 (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32BitstreamBufAddr +
620 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32BitstreamBufSize)))
621 {
622 HVD_EX_MSG_ERR
623 ("Init: The driver process buffer shall be located in the bitstream buffer under file mode(TS or PS) and Drv input.\n");
624 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].bNoDrvProccBuf = TRUE;
625 //return E_HVD_EX_RET_INVALID_PARAMETER;
626 }
627 }
628 else
629 {
630 // TODO: check if the TSP MIU sel is the same with the MIU lacation of process buffer.
631 }
632 }
633 break;
634 }
635 case E_HVD_CHECK_CMD_SEEK2PTS:
636 case E_HVD_CHECK_CMD_TRIGGER_DISP:
637 {
638 #if 0
639 if (MDrv_HVD_EX_GetPlayMode(E_HVD_EX_GMODE_IS_SYNC_ON))
640 {
641 HVD_EX_MSG_ERR("Cmd type:%d Sync Active: %lx\n", (MS_U16) eCmd,
642 (MS_S32) MDrv_HVD_EX_GetPlayMode(E_HVD_EX_GMODE_IS_SYNC_ON));
643 return E_HVD_EX_RET_ILLEGAL_ACCESS;
644 }
645 #endif
646 break;
647 }
648 default:
649 return E_HVD_EX_OK;
650 }
651
652 return E_HVD_EX_OK;
653 }
654
_HVD_EX_InitRegCPU(MS_U32 u32Id)655 static HVD_EX_Result _HVD_EX_InitRegCPU(MS_U32 u32Id)
656 {
657 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
658
659 // check MIU select
660 if (!(pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u8TurboInit & E_HVD_EX_TURBOINIT_CHECK))
661 {
662 HAL_HVD_EX_CheckMIUSel(pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_UTOPIA_ENVI);
663 }
664
665 return (HVD_EX_Result) HAL_HVD_EX_InitRegCPU(u32Id);
666 }
667
_HVD_EX_RstVariables(MS_U32 u32Id)668 static HVD_EX_Result _HVD_EX_RstVariables(MS_U32 u32Id)
669 {
670 //MS_BOOL bBitMIU1 = FALSE;
671 //MS_BOOL bCodeMIU1 = FALSE;
672 MS_U8 u8BitMiuSel;
673 MS_U32 u32BitStartOffset;
674 MS_U8 u8CodeMiuSel;
675 MS_U32 u32CodeStartOffset;
676 MS_U8 u8FrmMiuSel;
677 MS_U32 u32FrmStartOffset;
678 MS_U8 u8DrvProccMiuSel;
679 MS_U32 u32DrvProccStartOffset;
680 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
681 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
682
683 // Init control flg
684 pCtrl->u32CtrlMode = 0;
685
686 #if 1
687 _phy_to_miu_offset(u8CodeMiuSel, u32CodeStartOffset, pCtrl->MemMap.u32CodeBufAddr);
688 pCtrl->u8CodeMiuSel = u8CodeMiuSel;
689 _phy_to_miu_offset(u8BitMiuSel, u32BitStartOffset, pCtrl->MemMap.u32BitstreamBufAddr);
690 pCtrl->u8ESMiuSel = u8BitMiuSel;
691 _phy_to_miu_offset(u8FrmMiuSel, u32FrmStartOffset, pCtrl->MemMap.u32FrameBufAddr);
692 pCtrl->u8FrmMiuSel = u8FrmMiuSel;
693 _phy_to_miu_offset(u8DrvProccMiuSel, u32DrvProccStartOffset, pCtrl->MemMap.u32DrvProcessBufAddr);
694 pCtrl->u8DrvProccMiuSel = u8DrvProccMiuSel;
695 #else
696 if (pCtrl->MemMap.u32CodeBufAddr >= pCtrl->MemMap.u32MIU1BaseAddr)
697 {
698 pCtrl->u32CtrlMode |= HVD_CTRL_CODE_MIU_1;
699 bCodeMIU1 = TRUE;
700 }
701
702 if (pCtrl->MemMap.u32BitstreamBufAddr >= pCtrl->MemMap.u32MIU1BaseAddr)
703 {
704 pCtrl->u32CtrlMode |= HVD_CTRL_ES_MIU_1;
705 bBitMIU1 = TRUE;
706 }
707
708 if (pCtrl->MemMap.u32FrameBufAddr >= pCtrl->MemMap.u32MIU1BaseAddr)
709 {
710 pCtrl->u32CtrlMode |= HVD_CTRL_FRM_MIU_1;
711 }
712
713 if (pCtrl->MemMap.u32DrvProcessBufAddr >= pCtrl->MemMap.u32MIU1BaseAddr)
714 {
715 pCtrl->u32CtrlMode |= HVD_CTRL_DRVPROCC_MIU_1;
716 }
717 #endif
718
719 if (!pCtrl->bNoDrvProccBuf)
720 {
721 // init nal table buffer start address.
722 if ((pCtrl->InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK) == HVD_INIT_MAIN_FILE_RAW)
723 {
724 if (u8BitMiuSel != u8CodeMiuSel)
725 {
726 #if HVD_ENABLE_MVC
727 if( ((pCtrl->InitParams.u32ModeFlag & HVD_INIT_HW_MASK) == HVD_INIT_HW_MVC) &&
728 ((pCtrl->InitParams.u32ModeFlag & HVD_INIT_DUAL_ES_MASK) == HVD_INIT_DUAL_ES_ENABLE) &&
729 (pCtrl->MemMap.u32DrvProcessBufSize > (HVD_BBU_ST_ADDR_IN_BITSTREAMBUF + ((HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_BBU_TBL_ENTRY_NUMB)<<1 ) <<3) + 8) ))
730 {
731 pCtrl->u32BBUTblInBitstreamBufAddr = HVD_BBU_ST_ADDR_IN_BITSTREAMBUF;
732 if( (( pCtrl->u32BBUTblInBitstreamBufAddr + pCtrl->MemMap.u32DrvProcessBufAddr) % 8) != 0)
733 {
734 pCtrl->u32BBUTblInBitstreamBufAddr = pCtrl->u32BBUTblInBitstreamBufAddr + pCtrl->MemMap.u32DrvProcessBufAddr + 7;
735 pCtrl->u32BBUTblInBitstreamBufAddr -= (pCtrl->u32BBUTblInBitstreamBufAddr ) % 8;
736 pCtrl->u32BBUTblInBitstreamBufAddr -= pCtrl->MemMap.u32DrvProcessBufAddr;
737 HVD_EX_MSG_ERR("Nal table in bitstream buffer start address is not aligned. old:%lx new:%lx" , (MS_U32)HVD_BBU_ST_ADDR_IN_BITSTREAMBUF , pCtrl->u32BBUTblInBitstreamBufAddr );
738 }
739
740 /// Setting BBU for MVC dual bbu input
741 HVD_EX_Drv_Ctrl *pDrvCtrl_sub = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId+1]);
742 pDrvCtrl_sub->u32BBUTblInBitstreamBufAddr = HVD_BBU_ST_ADDR_IN_BITSTREAMBUF + (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_BBU_TBL_ENTRY_NUMB) << 3); //// need to check
743 if( (( pDrvCtrl_sub->u32BBUTblInBitstreamBufAddr + pDrvCtrl_sub->MemMap.u32DrvProcessBufAddr) % 8) != 0)
744 {
745 pDrvCtrl_sub->u32BBUTblInBitstreamBufAddr = pDrvCtrl_sub->u32BBUTblInBitstreamBufAddr + pDrvCtrl_sub->MemMap.u32DrvProcessBufAddr + 7;
746 pDrvCtrl_sub->u32BBUTblInBitstreamBufAddr -= (pDrvCtrl_sub->u32BBUTblInBitstreamBufAddr ) % 8;
747 pDrvCtrl_sub->u32BBUTblInBitstreamBufAddr -= pDrvCtrl_sub->MemMap.u32DrvProcessBufAddr;
748 HVD_EX_MSG_ERR("[MVC]: Nal table in bitstream buffer start address is not aligned. old:%lx new:%lx" , (MS_U32)HVD_BBU_ST_ADDR_IN_BITSTREAMBUF + (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_BBU_TBL_ENTRY_NUMB) << 3) , pCtrl->u32BBUTblInBitstreamBufAddr );
749 }
750
751 }
752 else
753 #endif
754 if (pCtrl->MemMap.u32DrvProcessBufSize >
755 (HVD_BBU_ST_ADDR_IN_BITSTREAMBUF + (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_BBU_TBL_ENTRY_NUMB) + 8)))
756 {
757 pCtrl->u32BBUTblInBitstreamBufAddr = HVD_BBU_ST_ADDR_IN_BITSTREAMBUF;
758
759 if (((pCtrl->u32BBUTblInBitstreamBufAddr + pCtrl->MemMap.u32DrvProcessBufAddr) % 8) != 0)
760 {
761 pCtrl->u32BBUTblInBitstreamBufAddr =
762 pCtrl->u32BBUTblInBitstreamBufAddr + pCtrl->MemMap.u32DrvProcessBufAddr + 7;
763 pCtrl->u32BBUTblInBitstreamBufAddr -= (pCtrl->u32BBUTblInBitstreamBufAddr) % 8;
764 pCtrl->u32BBUTblInBitstreamBufAddr -= pCtrl->MemMap.u32DrvProcessBufAddr;
765 HVD_EX_MSG_ERR
766 ("Nal table in bitstream buffer start address is not aligned. old:%lx new:%lx",
767 (MS_U32) HVD_BBU_ST_ADDR_IN_BITSTREAMBUF, pCtrl->u32BBUTblInBitstreamBufAddr);
768 }
769 }
770 else
771 {
772 HVD_EX_MSG_ERR
773 ("Driver process buffer size is not enough for driver input path. input:%lx required:%lx",
774 (MS_U32) pCtrl->MemMap.u32DrvProcessBufSize,
775 (HVD_BBU_ST_ADDR_IN_BITSTREAMBUF + (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_BBU_TBL_ENTRY_NUMB) << 3) +
776 8));
777 return E_HVD_EX_RET_OUTOF_MEMORY;
778 }
779 }
780 }
781
782 // init AVI NULL packet pattern && RM flush pattern
783 if ((pCtrl->InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK) == HVD_INIT_MAIN_FILE_RAW)
784 {
785 MS_U8 *pNULLPattern = NULL;
786 pCtrl->u32NULLPacketAddr = pCtrl->MemMap.u32DrvProcessBufAddr;
787 // TODO: use other non-cachable VA addr
788 //Use shared memory instead of f/w code buffer.
789 pNULLPattern = (MS_U8 *) HAL_HVD_EX_GetShmAddr(u32Id);
790 if(pNULLPattern == NULL)
791 {
792 HVD_EX_MSG_ERR("########## VDEC patch for Debug %s %d###########\n", __FUNCTION__, __LINE__);
793 return E_HVD_EX_FAIL;
794 }
795 memset((void *) pNULLPattern, 0, 12);
796
797 switch ((pCtrl->InitParams.u32ModeFlag & HVD_INIT_HW_MASK))
798 {
799 case HVD_INIT_HW_AVC:
800 case HVD_INIT_HW_AVS:
801 case HVD_INIT_HW_MVC:
802 #if SUPPORT_EVD
803 case HVD_INIT_HW_VP9: // MStar VP9 or G2 VP9
804 case HVD_INIT_HW_HEVC:
805 #endif
806 {
807 if (pCtrl->InitParams.u32ModeFlag & HVD_INIT_START_CODE_MASK)
808 {
809 // start code removed
810 pCtrl->u32NULLPacketSize = 8;
811
812 if (pCtrl->MemMap.u32DrvProcessBufSize < pCtrl->u32NULLPacketSize)
813 {
814 return E_HVD_EX_RET_OUTOF_MEMORY;
815 }
816
817 memset((void *) pNULLPattern, 0xAA, pCtrl->u32NULLPacketSize);
818 pNULLPattern[4] = 0X55;
819 }
820 else // start code remained
821 {
822 pCtrl->u32NULLPacketSize = 12;
823
824 if (pCtrl->MemMap.u32DrvProcessBufSize < pCtrl->u32NULLPacketSize)
825 {
826 return E_HVD_EX_RET_OUTOF_MEMORY;
827 }
828
829 memset((void *) pNULLPattern, 0xAA, pCtrl->u32NULLPacketSize);
830
831 pNULLPattern[0] = 0;
832 pNULLPattern[1] = 0;
833 pNULLPattern[2] = 1;
834 pNULLPattern[3] = 0xFF;
835 pNULLPattern[8] = 0X55;
836 }
837
838 //if (bBitMIU1 != bCodeMIU1)
839 if(u8BitMiuSel != u8CodeMiuSel)
840 {
841 #if HVD_ENABLE_BDMA_2_BITSTREAMBUF
842 HAL_HVD_EX_FlushMemory();
843 HVD_dmacpy(pCtrl->MemMap.u32DrvProcessBufAddr, pCtrl->MemMap.u32CodeBufAddr,
844 pCtrl->u32NULLPacketSize);
845 #else
846 HVD_memcpy((void *) (pCtrl->MemMap.u32DrvProcessBufVAddr), pNULLPattern,
847 pCtrl->u32NULLPacketSize);
848 HAL_HVD_EX_FlushMemory();
849 #endif
850 }
851 else
852 {
853 HVD_memcpy((void *) (pCtrl->MemMap.u32DrvProcessBufVAddr), pNULLPattern,
854 pCtrl->u32NULLPacketSize);
855 HAL_HVD_EX_FlushMemory();
856 }
857
858 break;
859 }
860 case HVD_INIT_HW_RM:
861 {
862 // RM has no NULL packet
863 pCtrl->u32NULLPacketSize = 0;
864 pCtrl->u32NULLPacketAddr = 0;
865 #if HVD_ENABLE_RV_FEATURE
866 pCtrl->u32RV_FlushPacketAddr = pCtrl->MemMap.u32DrvProcessBufAddr;
867 pCtrl->u32RV_FlushPacketSize = 8;
868
869 if (pCtrl->MemMap.u32DrvProcessBufSize < pCtrl->u32RV_FlushPacketSize)
870 {
871 return E_HVD_EX_RET_OUTOF_MEMORY;
872 }
873 memset((void *) pNULLPattern, 0xFF, pCtrl->u32RV_FlushPacketSize);
874 {
875 #if HVD_ENABLE_BDMA_2_BITSTREAMBUF
876 HAL_HVD_EX_FlushMemory();
877 HVD_dmacpy(pCtrl->MemMap.u32DrvProcessBufAddr, pCtrl->MemMap.u32CodeBufAddr,
878 pCtrl->u32RV_FlushPacketSize);
879 #else
880 HVD_memcpy((void *) (pCtrl->MemMap.u32DrvProcessBufVAddr), pNULLPattern,
881 pCtrl->u32RV_FlushPacketSize);
882 HAL_HVD_EX_FlushMemory();
883 #endif
884 }
885 #endif
886 break;
887 }
888 default:
889 pCtrl->u32NULLPacketSize = 0;
890 pCtrl->u32NULLPacketAddr = 0;
891 break;
892 }
893 }
894 else
895 {
896 pCtrl->u32NULLPacketSize = 0;
897 pCtrl->u32NULLPacketAddr = 0;
898 }
899 }
900
901 // reset other driver control variables
902 pCtrl->u32StepDecodeCnt = 0;
903 pCtrl->u32LastESRptr = 0;
904 pCtrl->u32BBUPacketCnt = 0;
905 pCtrl->u32BBUWptr_Fired = 0;
906 pCtrl->u32LastErrCode = 0;
907 pCtrl->bIsDispInfoChg = 0;
908
909 memset((void *) &(pCtrl->LastNal), 0, sizeof(HVD_Nal_Entry));
910 memset((void *) &(pCtrl->LivingStatus), 0, sizeof(HVD_Alive_Status));
911
912 #if HVD_ENABLE_MVC
913 if((pCtrl->InitParams.u32ModeFlag & HVD_INIT_HW_MASK) == HVD_INIT_HW_MVC)
914 {
915 /// TODO: MVC want to used 2nd HVDCtrl data.
916 //u8DrvId = _HVD_EX_GetDrvId(u32Id);
917 //pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId + 1]);
918 HVD_EX_Drv_Ctrl *pDrvCtrl_sub = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId+1]);
919
920 pDrvCtrl_sub->u32StepDecodeCnt = 0;
921 pDrvCtrl_sub->u32LastESRptr = 0;
922 pDrvCtrl_sub->u32BBUPacketCnt = 0;
923 pDrvCtrl_sub->u32BBUWptr_Fired = 0;
924 pDrvCtrl_sub->u32LastErrCode = 0;
925 pDrvCtrl_sub->bIsDispInfoChg = 0;
926
927 memset((void *) &(pDrvCtrl_sub->LastNal), 0, sizeof(HVD_Nal_Entry));
928
929 pDrvCtrl_sub->bNoDrvProccBuf = pCtrl->bNoDrvProccBuf;
930 pDrvCtrl_sub->bAutoRmLastZeroByte = pCtrl->bAutoRmLastZeroByte;
931 pDrvCtrl_sub->bCannotAccessMIU256 = pCtrl->bCannotAccessMIU256;
932 pDrvCtrl_sub->u32CmdTimeout = pCtrl->u32CmdTimeout;
933 pDrvCtrl_sub->u32CtrlMode = pCtrl->u32CtrlMode;
934 pDrvCtrl_sub->u32DummyWriteBuf = pCtrl->u32DummyWriteBuf;
935 pDrvCtrl_sub->u32NULLPacketSize = pCtrl->u32NULLPacketSize;
936 pDrvCtrl_sub->u32NULLPacketAddr = pCtrl->u32NULLPacketAddr;
937 }
938 #endif
939 // Init HAL variables
940 return (HVD_EX_Result) HAL_HVD_EX_InitVariables(u32Id);
941 }
942
943 //-----------------------------------------------------------------------------
944 /// @brief \b Function \b Name: _HVD_EX_SetSyncMode()
945 /// @brief \b Function \b Description: specify the way to sync video time stamp and STC.
946 /// @param -eMode \b IN : sync type
947 /// @param -u32Arg \b IN : only work under (eMode == E_HVD_EX_SYNC_ATS) , video delay toward Audio time stamp. It's minimun value is 0, and maximun value is 4500 ( unit:ms)
948 /// @return -The result of command set sync type
949 //-----------------------------------------------------------------------------
_HVD_EX_SetSyncMode(MS_U32 u32Id,HVD_Sync_Tbl_Type eMode)950 static HVD_EX_Result _HVD_EX_SetSyncMode(MS_U32 u32Id, HVD_Sync_Tbl_Type eMode)
951 {
952 HVD_EX_Result eRet = E_HVD_EX_OK;
953 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
954
955 _DRV_HVD_EX_Entry(u8DrvId);
956
957 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SYNC_TYPE, eMode);
958
959 _DRV_HVD_EX_RET(u8DrvId, eRet);
960 }
961
_HVD_EX_InitFW_AVC(MS_U32 u32Id)962 static HVD_EX_Result _HVD_EX_InitFW_AVC(MS_U32 u32Id)
963 {
964 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
965 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
966 MS_U32 u32InitMode = pCtrl->InitParams.u32ModeFlag;
967
968 // common settings
969 if (!(pCtrl->InitParams.u8TurboInit & E_HVD_EX_TURBOINIT_DISPLAY))
970 {
971 _HVD_EX_SetSyncMode(u32Id, (HVD_Sync_Tbl_Type) pCtrl->InitParams.u8SyncType);
972
973 if (pCtrl->InitParams.u8MinFrmGap)
974 {
975 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_MIN_FRAME_GAP, pCtrl->InitParams.u8MinFrmGap);
976 }
977
978 if (pCtrl->InitParams.u32MaxDecTick)
979 {
980 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_MAX_DEC_TICK, pCtrl->InitParams.u32MaxDecTick);
981 }
982
983 if (pCtrl->InitParams.u16Pitch)
984 {
985 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_PITCH, pCtrl->InitParams.u16Pitch);
986 }
987
988 if (pCtrl->InitParams.bSyncEachFrm)
989 {
990 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SYNC_EACH_FRM, TRUE);
991 }
992
993 if (pCtrl->InitParams.bFastDisplay)
994 {
995 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_FAST_DISP, TRUE);
996 }
997
998 if (pCtrl->InitParams.bDynamicScaling)
999 {
1000 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DYNAMIC_SCALE, TRUE);
1001 }
1002
1003 if (pCtrl->InitParams.bUserData)
1004 {
1005 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DPO_CC, TRUE);
1006 }
1007 }
1008
1009 if (pCtrl->InitParams.u8TimeUnit)
1010 {
1011 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_TIME_UNIT_TYPE, pCtrl->InitParams.u8TimeUnit);
1012 }
1013
1014 // specific settings
1015 switch (u32InitMode & HVD_INIT_MAIN_MASK)
1016 {
1017 case HVD_INIT_MAIN_FILE_RAW:
1018 {
1019 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DIS_VDEAD, TRUE);
1020 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_IGNORE_ERR_REF, TRUE);
1021 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_FORCE_RESET_HW, TRUE);
1022
1023 if (!(pCtrl->InitParams.u8TurboInit & E_HVD_EX_TURBOINIT_DISPLAY))
1024 {
1025 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_REPEAT_LAST_FIELD, TRUE);
1026 }
1027
1028 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_PARSER_BYPASS, TRUE);
1029 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_GET_MORE_FRM_BUF, TRUE);
1030
1031 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DYNAMIC_SCALE_RESV_N_BUFFER, TRUE);
1032 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_CTRL_SPEED_IN_DISP_ONLY, TRUE);
1033 break;
1034 }
1035 case HVD_INIT_MAIN_FILE_TS:
1036 {
1037 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DIS_VDEAD, TRUE);
1038 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_IGNORE_ERR_REF, TRUE);
1039 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_FORCE_RESET_HW, TRUE);
1040
1041 if (!(pCtrl->InitParams.u8TurboInit & E_HVD_EX_TURBOINIT_DISPLAY))
1042 {
1043 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_REPEAT_LAST_FIELD, TRUE);
1044 }
1045
1046 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_ES_FULL_STOP, TRUE);
1047 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_AVOID_PTS_TBL_OVERFLOW, TRUE);
1048
1049 if((u32InitMode & HVD_INIT_HW_MASK) == HVD_INIT_HW_MVC)
1050 {
1051 HAL_HVD_EX_SpareBandwidth(u32Id); //// For MVC
1052 }
1053 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DYNAMIC_SCALE_RESV_N_BUFFER, TRUE);
1054 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_CTRL_SPEED_IN_DISP_ONLY, TRUE);
1055 break;
1056 }
1057 case HVD_INIT_MAIN_LIVE_STREAM:
1058 {
1059 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_IGNORE_ERR_REF, TRUE);
1060 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_FORCE_RESET_HW, TRUE);
1061
1062 if (pCtrl->InitParams.u8TimeUnit)
1063 {
1064 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SYNC_VIDEO_DELAY, (MS_U32) HVD_DTV_VIDEO_DELAY);
1065 }
1066 else
1067 {
1068 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SYNC_VIDEO_DELAY, (MS_U32) HVD_DTV_VIDEO_DELAY * 90);
1069 }
1070
1071 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_ES_FULL_STOP, TRUE);
1072
1073 break;
1074 }
1075 default:
1076 break;
1077 }
1078
1079 return E_HVD_EX_OK;
1080 }
1081
_HVD_EX_InitFW_RM(MS_U32 u32Id)1082 static HVD_EX_Result _HVD_EX_InitFW_RM(MS_U32 u32Id)
1083 {
1084 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
1085 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
1086 MS_U32 u32InitMode = pCtrl->InitParams.u32ModeFlag;
1087
1088 // common settings
1089 if (!(pCtrl->InitParams.u8TurboInit & E_HVD_EX_TURBOINIT_DISPLAY))
1090 {
1091 _HVD_EX_SetSyncMode(u32Id, (HVD_Sync_Tbl_Type) pCtrl->InitParams.u8SyncType);
1092
1093 if (pCtrl->InitParams.u16Pitch)
1094 {
1095 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_PITCH, pCtrl->InitParams.u16Pitch);
1096 }
1097
1098 if (pCtrl->InitParams.bSyncEachFrm)
1099 {
1100 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SYNC_EACH_FRM, TRUE);
1101 }
1102
1103 if (pCtrl->InitParams.bFastDisplay)
1104 {
1105 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_FAST_DISP, TRUE);
1106 }
1107
1108 if (pCtrl->InitParams.bDynamicScaling)
1109 {
1110 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DYNAMIC_SCALE, TRUE);
1111 }
1112 }
1113
1114 if (pCtrl->InitParams.u8TimeUnit)
1115 {
1116 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_TIME_UNIT_TYPE, pCtrl->InitParams.u8TimeUnit);
1117 }
1118 // specific settings
1119 switch (u32InitMode & HVD_INIT_MAIN_MASK)
1120 {
1121 case HVD_INIT_MAIN_FILE_RAW:
1122 break;
1123 case HVD_INIT_MAIN_FILE_TS:
1124 case HVD_INIT_MAIN_LIVE_STREAM:
1125 default:
1126 break;
1127 }
1128
1129 // fix FFx4 display error
1130 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_FORCE_RESET_HW, TRUE);
1131
1132 return E_HVD_EX_OK;
1133 }
1134
_HVD_EX_CheckFWVersion(MS_U32 u32Id)1135 static HVD_EX_Result _HVD_EX_CheckFWVersion(MS_U32 u32Id)
1136 {
1137 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
1138 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
1139
1140 // check FW version ID
1141 if (!(pCtrl->InitParams.u8TurboInit & E_HVD_EX_TURBOINIT_CHECK))
1142 {
1143 if ((HVD_FW_IF_VERSION >> 16) != (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_IF_VERSION_ID) >> 16))
1144 {
1145 HVD_EX_MSG_ERR("fw interface and binary is not the same. fw ID: interface:%lx binary:%lx\n",
1146 (MS_U32) HVD_FW_IF_VERSION, HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_IF_VERSION_ID));
1147 return E_HVD_EX_FAIL;
1148 }
1149 }
1150
1151 return E_HVD_EX_OK;
1152 }
1153
_HVD_EX_InitFW(MS_U32 u32Id)1154 static HVD_EX_Result _HVD_EX_InitFW(MS_U32 u32Id)
1155 {
1156 HVD_EX_Result eRet = E_HVD_EX_OK;
1157 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
1158
1159 eRet = _HVD_EX_CheckFWVersion(u32Id);
1160
1161 if (eRet != E_HVD_EX_OK)
1162 {
1163 return eRet;
1164 }
1165
1166 switch (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_HW_MASK)
1167 {
1168 case HVD_INIT_HW_AVC:
1169 case HVD_INIT_HW_AVS:
1170 case HVD_INIT_HW_MVC:
1171 #if SUPPORT_EVD
1172 case HVD_INIT_HW_VP9: // MStar VP9 or G2 VP9
1173 case HVD_INIT_HW_HEVC:
1174 #endif
1175 eRet = _HVD_EX_InitFW_AVC(u32Id);
1176 break;
1177 case HVD_INIT_HW_RM:
1178 eRet = _HVD_EX_InitFW_RM(u32Id);
1179 break;
1180 default:
1181 break;
1182 }
1183
1184 return eRet;
1185 }
1186
_HVD_EX_IsAllBufferEmpty(MS_U32 u32Id)1187 static MS_BOOL _HVD_EX_IsAllBufferEmpty(MS_U32 u32Id)
1188 {
1189 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
1190 MS_U32 u32PlaybackType = pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK;
1191 MS_U32 u32FwIdleThreshold = 5000;
1192 MS_U32 u8DispCntThreshold = 0;
1193 if (u32PlaybackType == HVD_INIT_MAIN_FILE_RAW)
1194 {
1195 if (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_BBU_Q_NUMB) != 0)
1196 {
1197 return FALSE;
1198 }
1199 }
1200 else //if( u32PlaybackType == HVD_INIT_MAIN_FILE_TS ) TSP input
1201 {
1202 #if 0
1203 if (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_ES_READ_PTR) != HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_ES_WRITE_PTR))
1204 {
1205 return FALSE;
1206 }
1207 #endif
1208 }
1209 if(_DRV_HVD_Ctrl(u8DrvId, HVD_CTRL_DISP_OUTSIDE))
1210 {
1211 if ((HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DEC_Q_NUMB) == 0 && HAL_HVD_EX_DispFrameAllViewed(u32Id)) &&
1212 ((HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_VPU_IDLE_CNT) > u32FwIdleThreshold)||((HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_FLUSH_STATUS) == E_HVD_EX_FLUSH_DONE) )))
1213 {
1214 HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_FW_FLUSH_STATUS, (MS_U32)E_HVD_EX_FLUSH_NONE);
1215
1216 return TRUE;
1217 }
1218
1219 return FALSE;
1220 }
1221 //other Queues
1222 //LOGD("R: %d %d %d", HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DEC_Q_NUMB), HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DISP_Q_NUMB), HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_VPU_IDLE_CNT));
1223 if (( (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DEC_Q_NUMB) == 0) && (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DISP_Q_NUMB) == u8DispCntThreshold) ) &&
1224 ( (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_VPU_IDLE_CNT) > HVD_FW_IDLE_THRESHOLD) || ((HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_FLUSH_STATUS) == E_HVD_EX_FLUSH_DONE)) ))
1225 {
1226 //HVD_PRINT("Flush success, flush_status: %d !!!\n",HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_FLUSH_STATUS));
1227 HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_FW_FLUSH_STATUS, (MS_U32)E_HVD_EX_FLUSH_NONE);
1228
1229 return TRUE;
1230 }
1231 else
1232 {
1233 return FALSE;
1234 }
1235 }
1236
_HVD_EX_IsAllBufferEmpty_VP8(MS_U32 u32Id)1237 static MS_BOOL _HVD_EX_IsAllBufferEmpty_VP8(MS_U32 u32Id)
1238 {
1239 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
1240 MS_U32 u32PlaybackType = pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK;
1241 MS_U32 u32FwIdleThreshold = 5000;
1242 MS_U32 u8DispCntThreshold = 0;
1243
1244 if (u32PlaybackType == HVD_INIT_MAIN_FILE_RAW)
1245 {
1246 if (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_BBU_Q_NUMB) != 0)
1247 {
1248 return FALSE;
1249 }
1250 }
1251
1252 #if 0
1253 if(_DRV_HVD_Ctrl(u8DrvId, HVD_CTRL_DISP_OUTSIDE))
1254 {
1255 u32FwIdleThreshold = 5;
1256 }
1257 #endif
1258 if(_DRV_HVD_Ctrl(u8DrvId, HVD_CTRL_DISP_OUTSIDE))
1259 {
1260 if ((HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_ES_READ_PTR) == HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_ES_WRITE_PTR) && HAL_HVD_EX_DispFrameAllViewed(u32Id)) &&
1261 ((HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_VPU_IDLE_CNT) > u32FwIdleThreshold)||((HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_FLUSH_STATUS) == E_HVD_EX_FLUSH_DONE) )))
1262 {
1263 HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_FW_FLUSH_STATUS, (MS_U32)E_HVD_EX_FLUSH_NONE);
1264
1265 return TRUE;
1266 }
1267
1268 return FALSE;
1269 }
1270 // other Queues
1271 if (((HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DEC_Q_NUMB) == 0) && (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DISP_Q_NUMB) == u8DispCntThreshold)) &&
1272 ((HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_VPU_IDLE_CNT) > u32FwIdleThreshold) || (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_FLUSH_STATUS) == E_HVD_EX_FLUSH_DONE) ))
1273 {
1274 HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_FW_FLUSH_STATUS, (MS_U32)E_HVD_EX_FLUSH_NONE);
1275 return TRUE;
1276 }
1277 else
1278 {
1279 return FALSE;
1280 }
1281 }
1282
1283 #if defined(REDLION_LINUX_KERNEL_ENVI)
_HVD_EX_ISRHandler(void)1284 static MS_S32 _HVD_EX_ISRHandler(void)
1285 {
1286 if (gHVDISRCtrl.pfnISRCallBack != NULL)
1287 {
1288 gHVDISRCtrl.bInISR = TRUE;
1289 gHVDISRCtrl.u32ISRInfo = HAL_HVD_EX_GetData(E_HVD_GDATA_HVD_ISR_STATUS);
1290
1291 if (gHVDISRCtrl.u32ISRInfo)
1292 {
1293 HAL_HVD_EX_EnableISR(FALSE);
1294 gHVDISRCtrl.pfnISRCallBack();
1295 HAL_HVD_EX_EnableISR(TRUE);
1296 }
1297 }
1298 else
1299 {
1300 HVD_EX_MSG_DBG("ISR callback is NULL.\n");
1301 }
1302
1303 gHVDISRCtrl.bInISR = FALSE;
1304 HAL_HVD_EX_SetClearISR();
1305 if(TRUE == OSAL_HVD_ISR_Enable())//enable cpu interrupt mask
1306 {
1307 _bHVDDisableISRFlag = FALSE;
1308 }
1309 return 1;
1310 }
1311 #else
_HVD_EX_ISRHandler(void)1312 static void _HVD_EX_ISRHandler(void)
1313 {
1314 MS_U8 u8Idx;
1315 HVD_ISRCallBack pfnCb = NULL;
1316 MS_U8 hvd_index = 0;
1317 MS_U8 evd_index = 0;
1318 MS_BOOL hvd_exist = FALSE;
1319 MS_BOOL evd_exist = FALSE;
1320
1321
1322 //we can attach only one ISR, so we need to check the INT is from which decoder.
1323 for (u8Idx = 0; u8Idx < HVD_MAX_STREAMS; u8Idx++)
1324 {
1325 pfnCb = pHVDDrvContext->gHVDCtrl_EX[u8Idx].HVDISRCtrl.pfnISRCallBack;
1326
1327 if(pHVDDrvContext->gHVDCtrl_EX[u8Idx].HVDISRCtrl.bIsHvdIsr == TRUE)
1328 {
1329 hvd_exist = TRUE;
1330 hvd_index = u8Idx;
1331 }
1332 else
1333 {
1334 evd_exist = TRUE;
1335 evd_index = u8Idx;
1336 }
1337
1338 if (pfnCb)
1339 {
1340 pHVDDrvContext->gHVDCtrl_EX[u8Idx].HVDISRCtrl.bInISR = TRUE;
1341 pHVDDrvContext->gHVDCtrl_EX[u8Idx].HVDISRCtrl.u32ISRInfo =
1342 HAL_HVD_EX_GetData(pHVDDrvContext->gHVDCtrl_EX[u8Idx].u32Sid, E_HVD_GDATA_HVD_ISR_STATUS);
1343
1344 if (pHVDDrvContext->gHVDCtrl_EX[u8Idx].HVDISRCtrl.u32ISRInfo)
1345 {
1346 #if defined(CHIP_EINSTEIN) || defined(CHIP_EINSTEIN3) || defined(CHIP_NAPOLI) || defined(CHIP_MONACO) || defined(CHIP_MADISON) || defined(CHIP_MIAMI) || defined(CHIP_KERES) || defined(CHIP_KIRIN) || defined(CHIP_MUJI) || defined(CHIP_MUNICH) || defined(CHIP_CLIPPERS) || defined(CHIP_MONET)
1347 //make fake stream id to disable/enable ISR.(only for calling HAL_HVD_EX_EnableISR)
1348 MS_U32 u32tempIdx = 0;
1349 u32tempIdx |= (u8Idx << 8);
1350 HAL_HVD_EX_EnableISR(u32tempIdx, FALSE);
1351 pfnCb(pHVDDrvContext->gHVDCtrl_EX[u8Idx].u32Sid);
1352 HAL_HVD_EX_EnableISR(u32tempIdx, TRUE);
1353 #else
1354 HAL_HVD_EX_EnableISR(FALSE);
1355 pfnCb(pHVDDrvContext->gHVDCtrl_EX[u8Idx].u32Sid);
1356 HAL_HVD_EX_EnableISR(TRUE);
1357 #endif
1358 }
1359 }
1360 else
1361 {
1362 HVD_EX_MSG_DBG("ISR callback is NULL.\n");
1363 }
1364
1365 pHVDDrvContext->gHVDCtrl_EX[u8Idx].HVDISRCtrl.bInISR = FALSE;
1366 }
1367
1368 if(hvd_exist == TRUE)
1369 {
1370 #if defined(CHIP_EINSTEIN) || defined(CHIP_EINSTEIN3) || defined(CHIP_NAPOLI) || defined(CHIP_MONACO) || defined(CHIP_MADISON) || defined(CHIP_MIAMI) || defined(CHIP_KERES) || defined(CHIP_KIRIN) || defined(CHIP_MUJI) || defined(CHIP_MUNICH) || defined(CHIP_CLIPPERS) || defined(CHIP_MONET)
1371 HAL_HVD_EX_SetClearISR(hvd_index);
1372 #else
1373 HAL_HVD_EX_SetClearISR();
1374 #endif
1375 if(TRUE == OSAL_HVD_ISR_Enable(pHVDDrvContext->gHVDCtrl_EX[hvd_index].HVDISRCtrl.bIsHvdIsr))//enable cpu interrupt mask
1376 {
1377 pHVDDrvContext->bHVDDisableISRFlag = FALSE;
1378 }
1379 }
1380
1381 if(evd_exist == TRUE)
1382 {
1383 #if defined(CHIP_EINSTEIN) || defined(CHIP_EINSTEIN3) || defined(CHIP_NAPOLI) || defined(CHIP_MONACO) || defined(CHIP_MADISON) || defined(CHIP_MIAMI) || defined(CHIP_KERES) || defined(CHIP_KIRIN) || defined(CHIP_MUJI) || defined(CHIP_MUNICH) || defined(CHIP_CLIPPERS) || defined(CHIP_MONET)
1384 HAL_HVD_EX_SetClearISR(evd_index);
1385 #else
1386 HAL_HVD_EX_SetClearISR();
1387 #endif
1388 if(TRUE == OSAL_HVD_ISR_Enable(pHVDDrvContext->gHVDCtrl_EX[evd_index].HVDISRCtrl.bIsHvdIsr))//enable cpu interrupt mask
1389 {
1390 pHVDDrvContext->bEVDDisableISRFlag = FALSE;
1391 }
1392 }
1393 }
1394 #endif
1395
_HVD_EX_RecoverySettings(MS_U32 u32Id)1396 HVD_EX_Result _HVD_EX_RecoverySettings(MS_U32 u32Id)
1397 {
1398 // TODO: complete this function. and consider more cases. step decoder, display?
1399 HVD_EX_Result eRst = E_HVD_EX_OK;
1400 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
1401 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
1402
1403 switch (pCtrl->InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK)
1404 {
1405 case HVD_INIT_MAIN_LIVE_STREAM:
1406 {
1407 // temp solution
1408 // must before play().
1409 if ((pCtrl->Settings.DispInfoTH.u32FrmrateLowBound != 0) ||
1410 (pCtrl->Settings.DispInfoTH.u32FrmrateUpBound != 0) ||
1411 (pCtrl->Settings.DispInfoTH.u32MvopLowBound != 0) || (pCtrl->Settings.DispInfoTH.u32MvopUpBound != 0))
1412 {
1413 HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_DISP_INFO_TH, (MS_U32) (&pCtrl->Settings.DispInfoTH));
1414 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_UPDATE_DISP_THRESHOLD, 0);
1415 }
1416
1417 if (pCtrl->Settings.u32IsrEvent)
1418 {
1419 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_ISR_TYPE, pCtrl->Settings.u32IsrEvent);
1420 }
1421
1422 #if defined(CHIP_EINSTEIN) || defined(CHIP_EINSTEIN3) || defined(CHIP_NAPOLI) || defined(CHIP_MONACO) || defined(CHIP_MADISON) || defined(CHIP_MIAMI) || defined(CHIP_KERES) || defined(CHIP_KIRIN) || defined(CHIP_MUJI) || defined(CHIP_MUNICH) || defined(CHIP_CLIPPERS) || defined(CHIP_MONET)
1423 HAL_HVD_EX_EnableISR(u32Id, pCtrl->Settings.bEnISR);
1424 #else
1425 HAL_HVD_EX_EnableISR(pCtrl->Settings.bEnISR);
1426 #endif
1427 // play()
1428 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_PLAY, 0);
1429
1430 if (pCtrl->Settings.u8SkipMode)
1431 {
1432 if (E_HVD_EX_OK != (eRst = MDrv_HVD_EX_SetSkipDecMode(u32Id, (HVD_EX_SkipDecode) (pCtrl->Settings.u8SkipMode))))
1433 {
1434 HVD_EX_MSG_ERR("Set Skip Mode fail!!.\n");
1435 return eRst;
1436 }
1437 }
1438
1439 if (pCtrl->Settings.bIsShowErrFrm)
1440 {
1441 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DISP_ERR_FRM, TRUE);
1442 }
1443
1444 if (pCtrl->Settings.u8FrcMode)
1445 {
1446 if (E_HVD_EX_OK != (eRst = MDrv_HVD_EX_SetFrcMode(u8DrvId, (HVD_EX_FrmRateConvMode) (pCtrl->Settings.u8FrcMode))))
1447 {
1448 HVD_EX_MSG_ERR("Set Frc Mode fail!!.\n");
1449 return eRst;
1450 }
1451 }
1452
1453 if (pCtrl->Settings.bIsErrConceal)
1454 {
1455 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_ERR_CONCEAL, TRUE);
1456 }
1457
1458 if (pCtrl->Settings.bAutoFreeES)
1459 {
1460 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_AUTO_FREE_ES, TRUE);
1461 }
1462
1463 if (pCtrl->Settings.bDisDeblocking)
1464 {
1465 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DIS_DBF, TRUE);
1466 }
1467
1468 if (pCtrl->Settings.bDisQuarterPixel)
1469 {
1470 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DIS_QUART_PIXEL, TRUE);
1471 }
1472
1473 if (pCtrl->Settings.bIsSyncOn)
1474 {
1475 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SYNC_ACTIVE, TRUE);
1476 }
1477
1478 if (pCtrl->Settings.u32SyncTolerance)
1479 {
1480 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SYNC_TOLERANCE, pCtrl->Settings.u32SyncTolerance);
1481 }
1482
1483 if (pCtrl->Settings.u32SyncRepeatTH)
1484 {
1485 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SYNC_THRESHOLD, pCtrl->Settings.u32SyncRepeatTH);
1486 }
1487
1488 if (pCtrl->Settings.u32SyncVideoDelay)
1489 {
1490 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SYNC_VIDEO_DELAY, pCtrl->Settings.u32SyncVideoDelay);
1491 }
1492
1493 if (pCtrl->Settings.u32SyncFreeRunTH)
1494 {
1495 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_FREERUN_THRESHOLD, pCtrl->Settings.u32SyncFreeRunTH);
1496 }
1497
1498 if (E_HVD_BURST_CNT_DISABLE != (HVD_MIU_Burst_Cnt_Ctrl) pCtrl->Settings.u32MiuBurstLevel)
1499 {
1500 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_MIU_BURST_CNT, pCtrl->Settings.u32MiuBurstLevel);
1501 }
1502
1503 //HAL_HVD_EX_SetCmd(E_HVD_CMD_BLUE_SCREEN, FALSE);
1504 pCtrl->bStepDecoding = 0;
1505
1506 break;
1507 }
1508 case HVD_INIT_MAIN_FILE_RAW:
1509 default:
1510 pCtrl->bStepDecoding = 0;
1511 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_PLAY, 0);
1512 break;
1513 }
1514
1515 return eRst;
1516 }
1517
_HVD_EX_Rst(MS_U32 u32Id,MS_BOOL bErrHandle)1518 HVD_EX_Result _HVD_EX_Rst(MS_U32 u32Id, MS_BOOL bErrHandle)
1519 {
1520 HVD_EX_Result eRst = E_HVD_EX_RET_ILLEGAL_ACCESS;
1521 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
1522 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
1523
1524 if (bErrHandle == TRUE)
1525 {
1526 HVD_EX_MSG_ERR("HVD Not supported reset(TRUE) yet\n");
1527 return E_HVD_EX_RET_INVALID_PARAMETER;
1528 }
1529
1530 pHVDDrvContext->bHVDIsIniting[u8DrvId] = TRUE;
1531
1532 #if (defined(CHIP_EAGLE) || defined(CHIP_EMERALD) || defined(CHIP_EDISON) || defined(CHIP_AGATE) || defined(CHIP_NUGGET) || defined(CHIP_NIKON) || defined(CHIP_MUJI) || defined(CHIP_MONET))
1533 if ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_HW_MASK) == HVD_INIT_HW_RM)
1534 {
1535 HAL_HVD_EX_RM_PATCH(u32Id);
1536 }
1537 #endif
1538
1539 #if (defined(CHIP_NAPOLI))
1540 if ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_HW_MASK) == HVD_INIT_HW_RM)
1541 {
1542 if(!HAL_HVD_EX_Is_RM_Supported(u32Id))
1543 return E_HVD_EX_RET_UNSUPPORTED;
1544 }
1545 #endif
1546
1547
1548 #if defined(HIP_EINSTEIN) || defined(CHIP_EINSTEIN3) || defined(CHIP_NAPOLI) || defined(CHIP_MONACO) || defined(CHIP_MADISON) || defined(CHIP_MIAMI) || defined(CHIP_KERES) || defined(CHIP_KIRIN) || defined(CHIP_MUJI) || defined(CHIP_MUNICH) || defined(CHIP_CLIPPERS) || defined(CHIP_MONET)
1549 HAL_HVD_EX_EnableISR(u32Id, FALSE);
1550 #else
1551 HAL_HVD_EX_EnableISR(FALSE);
1552 #endif
1553
1554 #if HVD_ENABLE_TIME_MEASURE
1555 HVD_EX_MSG_MUST("HVD Time Measure:%d (%s %d) \n", HVD_GetSysTime_ms() - pHVDDrvContext->u32InitSysTimeBase[u8DrvId], __FUNCTION__, __LINE__);
1556 #endif
1557
1558 eRst = _HVD_EX_RstVariables(u32Id);
1559
1560 if (eRst != E_HVD_EX_OK)
1561 {
1562 goto DRV_HVD_Rst_Failed;
1563 }
1564
1565 #if HVD_ENABLE_TIME_MEASURE
1566 HVD_EX_MSG_MUST("HVD Time Measure:%d (%s %d) \n", HVD_GetSysTime_ms() - pHVDDrvContext->u32InitSysTimeBase[u8DrvId], __FUNCTION__, __LINE__);
1567 #endif
1568
1569 eRst = (HVD_EX_Result) HAL_HVD_EX_InitShareMem(u32Id);
1570
1571 if (E_HVD_EX_OK != eRst)
1572 {
1573 goto DRV_HVD_Rst_Failed;
1574 }
1575
1576 #if HVD_ENABLE_TIME_MEASURE
1577 HVD_EX_MSG_MUST("HVD Time Measure:%d (%s %d) \n", HVD_GetSysTime_ms() - pHVDDrvContext->u32InitSysTimeBase[u8DrvId], __FUNCTION__, __LINE__);
1578 #endif
1579
1580 eRst = _HVD_EX_InitRegCPU(u32Id);
1581
1582 if (eRst != E_HVD_EX_OK)
1583 {
1584 goto DRV_HVD_Rst_Failed;
1585 }
1586
1587 #if HVD_ENABLE_TIME_MEASURE
1588 HVD_EX_MSG_MUST("HVD Time Measure:%d (%s %d) \n", HVD_GetSysTime_ms() - pHVDDrvContext->u32InitSysTimeBase[u8DrvId], __FUNCTION__, __LINE__);
1589 #endif
1590
1591 eRst = _HVD_EX_InitFW(u32Id);
1592
1593 if (eRst != E_HVD_EX_OK)
1594 {
1595 goto DRV_HVD_Rst_Failed;
1596 }
1597
1598 eRst = E_HVD_EX_OK;
1599
1600 DRV_HVD_Rst_Failed:
1601 #if defined(CHIP_EINSTEIN) || defined(CHIP_EINSTEIN3) || defined(CHIP_NAPOLI) || defined(CHIP_MONACO) || defined(CHIP_MADISON) || defined(CHIP_MIAMI) || defined(CHIP_KERES) || defined(CHIP_KIRIN) || defined(CHIP_MUJI) || defined(CHIP_MUNICH) || defined(CHIP_CLIPPERS) || defined(CHIP_MONET)
1602 HAL_HVD_EX_EnableISR(u32Id, pCtrl->Settings.bEnISR);
1603 #else
1604 HAL_HVD_EX_EnableISR(pCtrl->Settings.bEnISR);
1605 #endif
1606 pHVDDrvContext->bHVDIsIniting[u8DrvId] = FALSE;
1607
1608 return eRst;
1609 }
1610
_HVD_EX_GetDrvId(MS_U32 u32Id)1611 static MS_U8 _HVD_EX_GetDrvId(MS_U32 u32Id)
1612 {
1613 return (0xFF & (u32Id >> 16));
1614 }
1615
_HVD_EX_GetDispInfo(MS_U32 u32Id,HVD_EX_DispInfo * pInfo,MS_BOOL bClearSeqChg)1616 static HVD_EX_Result _HVD_EX_GetDispInfo(MS_U32 u32Id, HVD_EX_DispInfo *pInfo, MS_BOOL bClearSeqChg)
1617 {
1618 MS_U32 u32Seqtimes = 10;
1619 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
1620 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
1621 MS_U32 u32DispInfoAddr = 0;
1622
1623 HVD_EX_MSG_TRACE();
1624 _DRV_HVD_Inited(u8DrvId,eRet);
1625
1626 if (!(pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32CtrlMode & HVD_CTRL_DISP_INFO_RDY))
1627 {
1628 if (MDrv_HVD_EX_CheckDispInfoRdy(u32Id) == E_HVD_EX_RET_NOTREADY)
1629 {
1630 return E_HVD_EX_RET_NOTREADY;
1631 }
1632 }
1633
1634 if (pInfo == NULL)
1635 {
1636 return E_HVD_EX_RET_INVALID_PARAMETER;
1637 }
1638
1639 _DRV_HVD_EX_Entry(u8DrvId);
1640
1641 if (TRUE == bClearSeqChg)
1642 {
1643 HVD_GETDISPINFO_START:
1644 HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_GET_DISP_INFO_START, 0);
1645 u32DispInfoAddr = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DISP_INFO_ADDR);
1646 if(u32DispInfoAddr == 0)
1647 {
1648 return E_HVD_EX_RET_NOTREADY;
1649 }
1650 HVD_memcpy((void *) pInfo, (void *) u32DispInfoAddr, sizeof(HVD_Display_Info));
1651 //Check if another SeqChg occurs
1652 if (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_IS_DISP_INFO_UNCOPYED))
1653 {
1654 u32Seqtimes--;
1655 if (u32Seqtimes > 0)
1656 {
1657 goto HVD_GETDISPINFO_START;
1658 }
1659 else
1660 {
1661 HVD_EX_MSG_ERR("GetDispInfo Timeout:%d\n",
1662 (MS_S16) HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_IS_DISP_INFO_UNCOPYED));
1663 _DRV_HVD_EX_RET(u8DrvId, E_HVD_EX_RET_TIMEOUT);
1664 }
1665 }
1666 }
1667 else
1668 {
1669 u32DispInfoAddr = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DISP_INFO_ADDR);
1670 if(u32DispInfoAddr == 0)
1671 {
1672 return E_HVD_EX_RET_NOTREADY;
1673 }
1674 HVD_memcpy((void *) pInfo, (void *)u32DispInfoAddr, sizeof(HVD_Display_Info));
1675 }
1676
1677 eRet = E_HVD_EX_OK;
1678
1679 if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].bIsDispInfoChg)
1680 {
1681 HVD_EX_MSG_DBG("u32FrameRate=%lu, u8Interlace=%x, u16HorSize=%u, u16VerSize=%u, \
1682 u16Crop R/L=%u/%u, u16Crop B/T=%u/%u, u8AspectRate=%u, u16SarWidth=%u \
1683 u16SarHeight=%u, u16Pitch=%u, u8ColourPrimaries=%u\n",
1684 pInfo->u32FrameRate,
1685 pInfo->u8Interlace,
1686 pInfo->u16HorSize,
1687 pInfo->u16VerSize,
1688 pInfo->u16CropRight, pInfo->u16CropLeft,
1689 pInfo->u16CropBottom, pInfo->u16CropTop,
1690 pInfo->u8AspectRate,
1691 pInfo->u16SarWidth,
1692 pInfo->u16SarHeight,
1693 pInfo->u16Pitch,
1694 pInfo->u8ColourPrimaries);
1695 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].bIsDispInfoChg = FALSE;
1696 }
1697
1698 _DRV_HVD_EX_RET(u8DrvId, eRet);
1699 }
1700
_HVD_EX_ReportLow32BitPTS(MS_U32 u32Id,MS_U32 u32PTS)1701 static MS_U32 _HVD_EX_ReportLow32BitPTS(MS_U32 u32Id, MS_U32 u32PTS)
1702 {
1703 MS_U32 u32RetPTS = u32PTS;
1704 MS_U32 u32UpperInMs = (HVD_U32_MAX/90);
1705 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
1706 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
1707
1708 if(u32RetPTS != HVD_U32_MAX)
1709 {
1710 if (pCtrl->InitParams.u8TimeUnit)
1711 {
1712 //unit: ms
1713 if (u32RetPTS > u32UpperInMs)
1714 {
1715 u32RetPTS = u32RetPTS - u32UpperInMs;
1716 }
1717 }
1718 else
1719 {
1720 //unit: 90KHz, bit 33 is not included in u32PTS, no need to handle
1721 }
1722 }
1723 return u32RetPTS;
1724 }
1725
_HVD_EX_Map2HVDErrCode(MS_U32 u32ErrCode)1726 static MS_U32 _HVD_EX_Map2HVDErrCode(MS_U32 u32ErrCode)
1727 {
1728
1729 MS_U32 u32Ret=E_HVD_EX_ERRCODE_GENERAL_BASE;
1730
1731
1732 switch (u32ErrCode)
1733 {
1734 case E_HVD_ERR_OUT_OF_SPEC:
1735 u32Ret = E_HVD_EX_ERRCODE_OUT_OF_SPEC;
1736 break;
1737 case E_HVD_ERR_UNKNOW_ERR:
1738 u32Ret = E_HVD_EX_ERRCODE_UNKNOW_ERR;
1739 break;
1740 case E_HVD_ERR_HW_BREAK_DOWN:
1741 u32Ret = E_HVD_EX_ERRCODE_HW_BREAK_DOWN;
1742 break;
1743 case E_HVD_ERR_HW_DEC_TIMEOUT:
1744 u32Ret = E_HVD_EX_ERRCODE_HW_DEC_TIMEOUT;
1745 break;
1746 case E_HVD_ERR_OUT_OF_MEMORY:
1747 u32Ret = E_HVD_EX_ERRCODE_OUT_OF_MEMORY;
1748 break;
1749 case E_HVD_ERR_UNKNOWN_CODEC:
1750 u32Ret = E_HVD_EX_ERRCODE_UNKNOWN_CODEC;
1751 break;
1752 case E_HVD_ERR_AVC_SPS_BROKEN:
1753 u32Ret = E_HVD_EX_ERRCODE_AVC_SPS_BROKEN;
1754 break;
1755 case E_HVD_ERR_AVC_SPS_NOT_IN_SPEC:
1756 u32Ret = E_HVD_EX_ERRCODE_AVC_SPS_NOT_IN_SPEC;
1757 break;
1758 case E_HVD_ERR_AVC_SPS_NOT_ENOUGH_FRM:
1759 u32Ret = E_HVD_EX_ERRCODE_AVC_SPS_NOT_ENOUGH_FRM;
1760 break;
1761 case E_HVD_ERR_AVC_PPS_BROKEN:
1762 u32Ret = E_HVD_EX_ERRCODE_AVC_PPS_BROKEN;
1763 break;
1764 case E_HVD_ERR_AVC_REF_LIST:
1765 u32Ret = E_HVD_EX_ERRCODE_AVC_REF_LIST;
1766 break;
1767 case E_HVD_ERR_AVC_NO_REF:
1768 u32Ret = E_HVD_EX_ERRCODE_AVC_NO_REF;
1769 break;
1770 case E_HVD_ERR_AVC_RES:
1771 u32Ret = E_HVD_EX_ERRCODE_AVC_RES;
1772 break;
1773 case E_HVD_ERR_AVS_RES:
1774 u32Ret = E_HVD_EX_ERRCODE_AVS_RES;
1775 break;
1776 case E_HVD_ERR_RM_PACKET_HEADER:
1777 u32Ret = E_HVD_EX_ERRCODE_RM_PACKET_HEADER;
1778 break;
1779 case E_HVD_ERR_RM_FRAME_HEADER:
1780 u32Ret = E_HVD_EX_ERRCODE_RM_FRAME_HEADER;
1781 break;
1782 case E_HVD_ERR_RM_SLICE_HEADER:
1783 u32Ret = E_HVD_EX_ERRCODE_RM_SLICE_HEADER;
1784 break;
1785 case E_HVD_ERR_RM_BYTE_CNT:
1786 u32Ret = E_HVD_EX_ERRCODE_RM_BYTE_CNT;
1787 break;
1788 case E_HVD_ERR_RM_DISP_TIMEOUT:
1789 u32Ret = E_HVD_EX_ERRCODE_RM_DISP_TIMEOUT;
1790 break;
1791 case E_HVD_ERR_RM_NO_REF:
1792 u32Ret = E_HVD_EX_ERRCODE_RM_NO_REF;
1793 break;
1794 case E_HVD_ERR_RM_RES:
1795 u32Ret = E_HVD_EX_ERRCODE_RM_RES;
1796 break;
1797 case E_HVD_ERR_RM_VLC:
1798 u32Ret = E_HVD_EX_ERRCODE_RM_VLC;
1799 break;
1800 case E_HVD_ERR_RM_SIZE_OUT_FB_LAYOUT:
1801 u32Ret = E_HVD_EX_ERRCODE_RM_SIZE_OUT_FB_LAYOUT;
1802 break;
1803 default:
1804 break;
1805 }
1806 return u32Ret;
1807 }
1808
_HVD_EX_Map2HVDESBufStatus(MS_U32 u32ESBufStatus)1809 static MS_U32 _HVD_EX_Map2HVDESBufStatus(MS_U32 u32ESBufStatus)
1810 {
1811
1812 MS_U32 u32Ret = E_HVD_EX_ES_BUF_STATUS_UNKNOWN;
1813
1814
1815 switch (u32ESBufStatus)
1816 {
1817 case E_HVD_ES_BUF_STATUS_UNDERFLOW:
1818 u32Ret = E_HVD_EX_ES_BUF_STATUS_UNDERFLOW;
1819 break;
1820 case E_HVD_ES_BUF_STATUS_OVERFLOW:
1821 u32Ret = E_HVD_EX_ES_BUF_STATUS_OVERFLOW;
1822 break;
1823 case E_HVD_ES_BUF_STATUS_NORMAL:
1824 u32Ret = E_HVD_EX_ES_BUF_STATUS_NORMAL;
1825 break;
1826 default:
1827 break;
1828 }
1829 return u32Ret;
1830 }
1831
1832 //-------------------------------------------------------------------------------------------------
1833 // Global Functions
1834 //-------------------------------------------------------------------------------------------------
1835
1836 //-----------------------------------------------------------------------------
1837 /// @brief \b Function \b Name: MDrv_HVD_SetOSRegBase()
1838 /// @brief \b Function \b Description: Set system register base
1839 /// @param -u32RegBaseAddr \b IN : system register base
1840 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetOSRegBase(MS_U32 u32RegBaseAddr)1841 void MDrv_HVD_EX_SetOSRegBase(MS_U32 u32RegBaseAddr)
1842 {
1843 HVD_EX_MSG_DBG("u32RiuBaseAddr=%lx\n", u32RegBaseAddr);
1844 HAL_HVD_EX_InitRegBase(u32RegBaseAddr);
1845 }
1846
MDrv_HVD_EX_SetCtrlsBase(MS_U32 u32Id)1847 void MDrv_HVD_EX_SetCtrlsBase(MS_U32 u32Id)
1848 {
1849 // for MJPEG, need to be modified later
1850 MS_U8 u8Offset = HAL_VPU_EX_GetTaskId(u32Id);
1851 UNUSED(u8Offset);
1852 // The Driver Ctrl base should be set with parameter [0]
1853 HAL_HVD_EX_SetDrvCtrlsBase(&(pHVDDrvContext->gHVDCtrl_EX[0]));
1854
1855 }
1856
MDrv_HVD_EX_MJPEG_InitSharemem(MS_U32 u32Id,MS_U32 u32CodeBufVAddr)1857 void MDrv_HVD_EX_MJPEG_InitSharemem(MS_U32 u32Id, MS_U32 u32CodeBufVAddr)
1858 {
1859 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
1860 HVD_EX_Drv_Ctrl *pCtrl1 = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
1861 memset((void *) pCtrl1, 0, sizeof(HVD_EX_Drv_Ctrl));
1862 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32CodeBufVAddr = u32CodeBufVAddr;
1863 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32CodeBufAddr = MS_VA2PA(u32CodeBufVAddr);
1864 pHVDDrvContext->bHVDIsInited[u8DrvId] = TRUE;
1865 HVD_Pre_Ctrl *pCtrl = &(pHVDDrvContext->gHVDPreCtrl[u8DrvId]);
1866
1867 memset((void *) pCtrl, 0, sizeof(HVD_Pre_Ctrl));
1868
1869 // PreSetControl
1870 HAL_HVD_EX_SetPreCtrlVariables(u32Id,(MS_U32)(&pHVDDrvContext->gHVDPreCtrl[u8DrvId]));
1871 HVD_EX_MSG_INF("u8DrvId=%d, PA:[0x%lx, 0x%lx], VA:[0x%lx, 0x%lx], [0x%lx]\n", u8DrvId,
1872 pHVDDrvContext->gHVDCtrl_EX[0].MemMap.u32CodeBufAddr,
1873 pHVDDrvContext->gHVDCtrl_EX[1].MemMap.u32CodeBufAddr,
1874 pHVDDrvContext->gHVDCtrl_EX[0].MemMap.u32CodeBufVAddr,
1875 pHVDDrvContext->gHVDCtrl_EX[1].MemMap.u32CodeBufVAddr,
1876 HAL_HVD_EX_GetShmAddr(u32Id));
1877
1878 HAL_HVD_EX_InitShareMem(u32Id);
1879
1880 }
1881
MDrv_HVD_EX_MJPEG_Exit(MS_U32 u32Id)1882 void MDrv_HVD_EX_MJPEG_Exit(MS_U32 u32Id)
1883 {
1884 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
1885 pHVDDrvContext->bHVDIsInited[u8DrvId] = FALSE;
1886 }
1887
MDrv_HVD_Init_Share_Mem(void)1888 HVD_EX_Result MDrv_HVD_Init_Share_Mem(void)
1889 {
1890 #if ((defined(MSOS_TYPE_LINUX) || defined(MSOS_TYPE_ECOS)) && (!defined(SUPPORT_X_MODEL_FEATURE)))
1891 MS_U32 u32ShmId;
1892 MS_VIRT u32Addr;
1893 MS_U32 u32BufSize;
1894
1895
1896 if (FALSE == MsOS_SHM_GetId( (MS_U8*)"Linux HVD driver",
1897 sizeof(HVD_Drv_CTX),
1898 &u32ShmId,
1899 &u32Addr,
1900 &u32BufSize,
1901 MSOS_SHM_QUERY))
1902 {
1903 if (FALSE == MsOS_SHM_GetId((MS_U8*)"Linux HVD driver",
1904 sizeof(HVD_Drv_CTX),
1905 &u32ShmId,
1906 &u32Addr,
1907 &u32BufSize,
1908 MSOS_SHM_CREATE))
1909 {
1910 HVD_EX_MSG_ERR("[%s]SHM allocation failed!!!use global structure instead!!!\n",__FUNCTION__);
1911 if(pHVDDrvContext == NULL)
1912 {
1913 pHVDDrvContext = &gHVDDrvContext;
1914 memset(pHVDDrvContext,0,sizeof(HVD_Drv_CTX));
1915 _HVD_EX_Context_Init();
1916 HVD_PRINT("[%s]Global structure init Success!!!\n",__FUNCTION__);
1917 }
1918 else
1919 {
1920 HVD_PRINT("[%s]Global structure exists!!!\n",__FUNCTION__);
1921 }
1922 //return E_HVD_EX_FAIL;
1923 }
1924 else
1925 {
1926 memset((MS_U8*)u32Addr,0,sizeof(HVD_Drv_CTX));
1927 pHVDDrvContext = (HVD_Drv_CTX*)u32Addr; // for one process
1928 _HVD_EX_Context_Init();
1929 }
1930 }
1931 else
1932 {
1933 pHVDDrvContext = (HVD_Drv_CTX*)u32Addr; // for another process
1934 }
1935 #else
1936 if(pHVDDrvContext == NULL)
1937 {
1938 pHVDDrvContext = &gHVDDrvContext;
1939 memset(pHVDDrvContext,0,sizeof(HVD_Drv_CTX));
1940 _HVD_EX_Context_Init();
1941 }
1942 #endif
1943
1944 if(HAL_HVD_EX_Init_Share_Mem() != TRUE)
1945 {
1946 return E_HVD_EX_FAIL;
1947 }
1948
1949 HAL_HVD_EX_SetDrvCtrlsBase(&(pHVDDrvContext->gHVDCtrl_EX[0]));
1950
1951 if(HAL_VPU_EX_Init_Share_Mem() != TRUE)
1952 {
1953 return E_HVD_EX_FAIL;
1954 }
1955
1956 return E_HVD_EX_OK;
1957 }
1958
1959 // Action
MDrv_HVD_EX_GetFreeStream(MS_U32 * pu32Id,HVD_EX_DRV_StreamType eStreamType)1960 HVD_EX_Result MDrv_HVD_EX_GetFreeStream(MS_U32 *pu32Id, HVD_EX_DRV_StreamType eStreamType)
1961 {
1962 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
1963 MS_U32 i = 0;
1964 MS_U32 u32VPUStreamId = 0;
1965 MS_U32 u32HVDStreamId = 0;
1966
1967 HVD_EX_MSG_TRACE();
1968
1969 //Get drvIdx
1970 switch (eStreamType)
1971 {
1972 case E_HVD_EX_DRV_MAIN_STREAM:
1973 i = 0;
1974 break;
1975 case E_HVD_EX_DRV_SUB_STREAM:
1976 i = 1;
1977 break;
1978 case E_HVD_EX_DRV_MVC_STREAM:
1979 i = 0;
1980 break;
1981 case E_HVD_EX_DRV_STREAM_NONE:
1982 default:
1983 i = HVD_MAX_STREAMS;
1984 break;
1985 }
1986
1987 if (i == HVD_MAX_STREAMS)
1988 {
1989 return E_HVD_EX_FAIL;
1990 }
1991
1992 if (E_HVD_EX_DRV_MAIN_STREAM == eStreamType)
1993 {
1994 u32VPUStreamId = (MS_U32) HAL_VPU_EX_GetFreeStream(E_HAL_VPU_MAIN_STREAM);
1995 u32HVDStreamId = (MS_U32) HAL_HVD_EX_GetFreeStream(E_HAL_HVD_MAIN_STREAM);
1996
1997 if (u32VPUStreamId && u32HVDStreamId)
1998 {
1999 *pu32Id = (i << 16 | u32HVDStreamId << 8 | u32VPUStreamId);
2000 eRet = E_HVD_EX_OK;
2001 }
2002 }
2003 else if (E_HVD_EX_DRV_SUB_STREAM == eStreamType)
2004 {
2005 u32VPUStreamId = (MS_U32) HAL_VPU_EX_GetFreeStream(E_HAL_VPU_SUB_STREAM);
2006 if(u32VPUStreamId == E_HAL_VPU_STREAM_NONE)
2007 {
2008 return E_HVD_EX_FAIL;
2009 }
2010 u32HVDStreamId = (MS_U32) HAL_HVD_EX_GetFreeStream(E_HAL_HVD_SUB_STREAM);
2011
2012 if (u32VPUStreamId && u32HVDStreamId)
2013 {
2014 *pu32Id = (i << 16 | u32HVDStreamId << 8 | u32VPUStreamId);
2015 eRet = E_HVD_EX_OK;
2016 }
2017 }
2018 #if HVD_ENABLE_MVC
2019 else if (E_HVD_EX_DRV_MVC_STREAM == eStreamType)
2020 {
2021 u32VPUStreamId = (MS_U32) HAL_VPU_EX_GetFreeStream(E_HAL_VPU_MVC_STREAM);
2022 u32HVDStreamId = (MS_U32) HAL_HVD_EX_GetFreeStream(E_HAL_HVD_MVC_STREAM);
2023
2024 if (u32VPUStreamId && u32HVDStreamId)
2025 {
2026 *pu32Id = (i << 16 | u32HVDStreamId << 8 | u32VPUStreamId);
2027 eRet = E_HVD_EX_OK;
2028 }
2029 }
2030 #endif
2031 else
2032 {
2033 HVD_PRINT("%s:%s:Stream type=%d is unexpected\n", __FILE__, __FUNCTION__, eStreamType);
2034 }
2035
2036 return eRet;
2037 }
2038
2039
2040
2041
2042
2043 extern MS_BOOL _MDrv_HVD_AUTH_IPCheck(MS_U32 u32CodecType);
2044 extern HVD_EX_Result _HVD_EX_Init_(MS_U32 u32Id);
2045
2046 //-----------------------------------------------------------------------------
2047 /// @brief \b Function \b Name: MDrv_HVD_EX_Init()
2048 /// @brief \b Function \b Description: HVD driver initialization
2049 /// @param -pStMemCfg \b IN : pointer to the memory config of HVD driver
2050 /// @param -pStInitSettings \b IN : Initialization of HVD driver
2051 /// @return -The result of initialization process
2052 //-----------------------------------------------------------------------------
MDrv_HVD_EX_Init(MS_U32 u32Id,HVD_EX_MemCfg * pStMemCfg,HVD_EX_InitSettings * pStInitSettings)2053 HVD_EX_Result MDrv_HVD_EX_Init(MS_U32 u32Id, HVD_EX_MemCfg *pStMemCfg, HVD_EX_InitSettings *pStInitSettings)
2054 {
2055 HVD_EX_Result eRet = E_HVD_EX_FAIL;
2056 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
2057 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
2058
2059 HVD_EX_MSG_TRACE();
2060
2061 #if HVD_ENABLE_TIME_MEASURE
2062 pHVDDrvContext->u32InitSysTimeBase[u8DrvId] = HVD_GetSysTime_ms();
2063 #endif
2064
2065 if ((pStMemCfg == NULL) || (pStInitSettings == NULL))
2066 {
2067 HVD_EX_MSG_ERR("Init params are invalid\n");
2068 return E_HVD_EX_RET_INVALID_PARAMETER;
2069 }
2070
2071 if(_MDrv_HVD_AUTH_IPCheck(pStInitSettings->u32ModeFlag) == FALSE)
2072 {
2073 HVD_EX_MSG_ERR("[%s]User using invaild key !!!\n",__FUNCTION__);
2074 return E_HVD_EX_RET_INVALID_PARAMETER;
2075 }
2076
2077 HAL_HVD_EX_SetDrvCtrlsBase(&(pHVDDrvContext->gHVDCtrl_EX[0]));
2078
2079 #if HVD_ENABLE_AUTO_SET_REG_BASE
2080 {
2081 MS_U32 u32NonPMBankSize = 0, u32RiuBaseAdd = 0;
2082
2083 if (!MDrv_MMIO_GetBASE(&u32RiuBaseAdd, &u32NonPMBankSize, MS_MODULE_HW))
2084 {
2085 HVD_EX_MSG_ERR("MMIO_GetBASE failure\n");
2086 return eRet;
2087 }
2088 else
2089 {
2090 HVD_EX_MSG_DBG("u32RiuBaseAdd=0x%lx\n", u32RiuBaseAdd);
2091 HAL_HVD_EX_InitRegBase(u32RiuBaseAdd);
2092 }
2093
2094 #if defined(CHIP_EINSTEIN) || defined(CHIP_EINSTEIN3) || defined(CHIP_NAPOLI) || defined(CHIP_MONACO) || defined(CHIP_MADISON) || defined(CHIP_MIAMI) || defined(CHIP_KERES) || defined(CHIP_KIRIN) || defined(CHIP_MUJI) || defined(CHIP_MUNICH) || defined(CHIP_CLIPPERS) || defined(CHIP_MONET)
2095 HAL_HVD_EX_SetHwRegBase(u32Id, pStInitSettings->u32ModeFlag); //HVD or EVD
2096 #endif
2097 }
2098 #endif
2099
2100 HVD_EX_MSG_DBG("system call type: Mutex:%d clock:%d delay:%d asm_sync:%d\n",
2101 HVD_ENABLE_MUTEX_PROTECT, HVD_SYSTEM_CLOCK_TYPE, HVD_SYSTEM_DELAY_MS_TYPE, HVD_MEMORY_BARRIER_TYPE);
2102
2103 if (u32UartCtrl & E_HVD_UART_CTRL_INFO)
2104 {
2105 MS_U32 u32delaytime = 5;
2106 MS_U32 u32FirstTime = HVD_GetSysTime_ms();
2107 MS_U32 u32SecondTime = 0;
2108
2109 HVD_Delay_ms(u32delaytime);
2110 u32SecondTime = HVD_GetSysTime_ms();
2111
2112 HVD_EX_MSG_DBG("MSOS API check: 1st:%lu 2nd:%lu delay:%lu dif:%lu\n",
2113 u32FirstTime, u32SecondTime, u32delaytime, u32SecondTime - u32FirstTime);
2114 }
2115
2116 #if HVD_ENABLE_TIME_MEASURE
2117 HVD_EX_MSG_MUST("HVD Time Measure:%d (%s %d) \n", HVD_GetSysTime_ms() - pHVDDrvContext->u32InitSysTimeBase[u8DrvId], __FUNCTION__, __LINE__);
2118 #endif
2119
2120 if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].bUsed)
2121 {
2122 HVD_EX_MSG_ERR("re-init HVD Driver\n");
2123
2124 #if HVD_ENABLE_REINIT_FAILED
2125 eRet = E_HVD_EX_RET_RE_INIT;
2126 return eRet;
2127 #endif
2128 }
2129
2130 // disable ISR first
2131 #if defined(CHIP_EINSTEIN) || defined(CHIP_EINSTEIN3) || defined(CHIP_NAPOLI) || defined(CHIP_MONACO) || defined(CHIP_MADISON) || defined(CHIP_MIAMI) || defined(CHIP_KERES) || defined(CHIP_KIRIN) || defined(CHIP_MUJI) || defined(CHIP_MUNICH) || defined(CHIP_CLIPPERS) || defined(CHIP_MONET)
2132 HAL_HVD_EX_EnableISR(u32Id, FALSE);
2133 #else
2134 HAL_HVD_EX_EnableISR(FALSE);
2135 #endif
2136 // For TEE
2137 _HVD_EX_SetShareInfoAddr(u32Id);
2138
2139 eRet = _HVD_EX_InitVariables(u32Id, pStMemCfg, (HVD_Init_Params *) pStInitSettings);
2140
2141 if (eRet != E_HVD_EX_OK)
2142 {
2143 return eRet;
2144 }
2145
2146 #if SUPPORT_EVD
2147 if ((pStInitSettings->u32ModeFlag & E_HVD_INIT_HW_MASK) == E_HVD_INIT_HW_HEVC ||
2148 (pStInitSettings->u32ModeFlag & E_HVD_INIT_HW_MASK) == E_HVD_INIT_HW_VP9)
2149 pCtrl->HVDISRCtrl.bIsHvdIsr = FALSE;
2150 else
2151 #endif
2152 pCtrl->HVDISRCtrl.bIsHvdIsr = TRUE;
2153 #if SUPPORT_G2VP9
2154 if ((pStInitSettings->u32ModeFlag & E_HVD_INIT_HW_MASK) == E_HVD_INIT_HW_VP9)
2155 pCtrl->HVDISRCtrl.bIsG2Vp9Isr = TRUE;
2156 else
2157 #endif
2158 pCtrl->HVDISRCtrl.bIsG2Vp9Isr = FALSE;
2159
2160 #if HVD_ENABLE_TIME_MEASURE
2161 HVD_EX_MSG_MUST("HVD Time Measure:%d (%s %d) \n", HVD_GetSysTime_ms() - pHVDDrvContext->u32InitSysTimeBase[u8DrvId], __FUNCTION__, __LINE__);
2162 #endif
2163
2164 _DRV_HVD_EX_Entry(u8DrvId);
2165
2166 eRet = _HVD_EX_Check_Cmd(u32Id, E_HVD_CHECK_CMD_INIT);
2167
2168 if (eRet != E_HVD_EX_OK)
2169 {
2170 _DRV_HVD_EX_RET(u8DrvId, eRet);
2171 }
2172
2173 #if HVD_ENABLE_TIME_MEASURE
2174 HVD_EX_MSG_MUST("HVD Time Measure:%d (%s %d) \n", HVD_GetSysTime_ms() - pHVDDrvContext->u32InitSysTimeBase[u8DrvId], __FUNCTION__, __LINE__);
2175 #endif
2176
2177
2178 eRet = _HVD_EX_Init_(u32Id);
2179
2180 if (eRet != E_HVD_EX_OK)
2181 {
2182 _DRV_HVD_EX_RET(u8DrvId, eRet);
2183 }
2184
2185 #if HVD_ENABLE_TIME_MEASURE
2186 HVD_EX_MSG_MUST("HVD Time Measure:%d (%s %d) \n", HVD_GetSysTime_ms() - pHVDDrvContext->u32InitSysTimeBase[u8DrvId], __FUNCTION__, __LINE__);
2187 #endif
2188
2189 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32DummyWriteBuf = MsOS_PA2KSEG1(pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32CodeBufAddr + HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_DUMMY_WRITE_ADDR));
2190 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32CtrlMode |= HVD_CTRL_INIT_FINISHED;
2191 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].bUsed = TRUE;
2192 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32Sid = u32Id;
2193 #if HVD_ENABLE_MVC
2194 if((pStInitSettings->u32ModeFlag & HVD_INIT_HW_MASK) == HVD_INIT_HW_MVC)
2195 {
2196 pHVDDrvContext->gHVDCtrl_EX[u8DrvId+1].u32CtrlMode |= HVD_CTRL_INIT_FINISHED;
2197 pHVDDrvContext->gHVDCtrl_EX[u8DrvId+1].bUsed = TRUE;
2198 pHVDDrvContext->gHVDCtrl_EX[u8DrvId+1].u32Sid = u32Id+0x00011000;
2199 pHVDDrvContext->bHVDIsInited[u8DrvId+1] = TRUE;
2200 }
2201 #endif /// HVD_ENABLE_MVC
2202 pHVDDrvContext->bHVDIsInited[u8DrvId] = TRUE;
2203 eRet = E_HVD_EX_OK;
2204
2205 HVD_EX_MSG_INF("driver Init successfully.\n");
2206
2207 _DRV_HVD_EX_RET(u8DrvId, eRet);
2208 }
2209
2210 //-----------------------------------------------------------------------------
2211 /// @brief \b Function \b Name: MDrv_HVD_EX_Rst()
2212 /// @brief \b Function \b Description: Reset HVD driver
2213 /// @param -bErrHandle \b IN : reset option HVD driver
2214 /// -FALSE(0): Reset HVD to clear mode.( do not recovery SPS)
2215 /// -TRUE(1): Reset HVD to clear mode, and recovery SPS.
2216 /// @return -The result of reset process
2217 //-----------------------------------------------------------------------------
MDrv_HVD_EX_Rst(MS_U32 u32Id,MS_BOOL bErrHandle)2218 HVD_EX_Result MDrv_HVD_EX_Rst(MS_U32 u32Id, MS_BOOL bErrHandle)
2219 {
2220 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
2221 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
2222
2223 HVD_EX_MSG_TRACE();
2224 _DRV_HVD_Inited(u8DrvId,eRet);
2225
2226 if (bErrHandle == TRUE)
2227 {
2228 HVD_EX_MSG_ERR("HVD Not supported reset(TRUE) yet\n");
2229 return E_HVD_EX_RET_INVALID_PARAMETER;
2230 }
2231
2232 if ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK) != HVD_INIT_MAIN_LIVE_STREAM)
2233 {
2234 HVD_EX_MSG_ERR("HVD rst() only support live stream mode\n");
2235 return E_HVD_EX_RET_INVALID_PARAMETER;
2236 }
2237
2238 //In this function we should delete task and then create task.
2239 HVD_EX_SetRstFlag(TRUE);
2240
2241 eRet = _HVD_EX_Rst(u32Id, bErrHandle);
2242
2243 if (eRet != E_HVD_EX_OK)
2244 {
2245 return (eRet);
2246 }
2247
2248 eRet = _HVD_EX_RecoverySettings(u32Id);
2249
2250 if (eRet != E_HVD_EX_OK)
2251 {
2252 return (eRet);
2253 }
2254
2255 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32CtrlMode |= HVD_CTRL_INIT_FINISHED;
2256 pHVDDrvContext->bHVDIsInited[u8DrvId] = TRUE;
2257
2258 return eRet;
2259 }
2260
2261 //-----------------------------------------------------------------------------
2262 /// @brief \b Function \b Name: MDrv_HVD_EX_Play()
2263 /// @brief \b Function \b Description: Play HVD
2264 /// @return -The result of command play
2265 //-----------------------------------------------------------------------------
MDrv_HVD_EX_Play(MS_U32 u32Id)2266 HVD_EX_Result MDrv_HVD_EX_Play(MS_U32 u32Id)
2267 {
2268 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
2269 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
2270
2271 HVD_EX_MSG_TRACE();
2272 _DRV_HVD_Inited(u8DrvId,eRet);
2273 _DRV_HVD_EX_Entry(u8DrvId);
2274
2275 #if HVD_ENABLE_CHECK_STATE_BEFORE_SET_CMD
2276 if (MDrv_HVD_EX_GetPlayState(u32Id) != E_HVD_EX_GSTATE_PLAY || pHVDDrvContext->gHVDCtrl_EX[u8DrvId].bStepDecoding)
2277 #endif
2278 {
2279 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_PLAY, 0);
2280
2281 if (eRet != E_HVD_EX_OK)
2282 {
2283 _DRV_HVD_EX_RET(u8DrvId, eRet);
2284 }
2285 }
2286
2287 // step display off
2288 eRet = (HVD_EX_Result) HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_TRIGGER_DISP, 0);
2289
2290 if (eRet == E_HVD_EX_OK)
2291 {
2292 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32CtrlMode &= ~HVD_CTRL_DISPLAY_CTRL;
2293 }
2294
2295 _DRV_HVD_EX_RET(u8DrvId, eRet);
2296 }
2297
2298 //-----------------------------------------------------------------------------
2299 /// @brief \b Function \b Name: MDrv_HVD_EX_Exit()
2300 /// @brief \b Function \b Description: Stop HVD and release resource.
2301 /// @return -The result of command stop
2302 //-----------------------------------------------------------------------------
MDrv_HVD_EX_Exit(MS_U32 u32Id)2303 HVD_EX_Result MDrv_HVD_EX_Exit(MS_U32 u32Id)
2304 {
2305 MS_U32 u32Timer = 0;
2306 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
2307 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
2308
2309 HVD_EX_MSG_TRACE();
2310 _DRV_HVD_Inited(u8DrvId,eRet);
2311 _DRV_HVD_Rsting(u8DrvId,eRet);
2312
2313 #if HVD_ENABLE_MVC
2314 if((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_HW_MASK) == HVD_INIT_HW_MVC)
2315 {
2316 pHVDDrvContext->bHVDIsInited[u8DrvId+1] = FALSE;
2317 }
2318 #endif /// HVD_ENABLE_MVC
2319
2320 do
2321 {
2322 u32Timer++;
2323
2324 if (u32Timer >= HVD_FW_EXIT_ACTION_TIMEOUT)
2325 {
2326 eRet = E_HVD_EX_RET_TIMEOUT;
2327 HVD_EX_MSG_ERR("exit time out~~~`\n");
2328 //return eRet;
2329 break;
2330 }
2331 else
2332 {
2333 HVD_Delay_ms(1);
2334 }
2335 } while (_DRV_HVD_Ctrl(u8DrvId, HVD_CTRL_PROCESSING));
2336
2337 // release ISR callback
2338 if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].HVDISRCtrl.bRegISR)
2339 {
2340 if (E_HVD_EX_OK != MDrv_HVD_EX_SetISREvent(u32Id, E_HVD_EX_ISR_NONE, NULL))
2341 {
2342 HVD_EX_MSG_ERR("MDrv_HVD_EX_Exit: dettach isr fail\n");
2343 }
2344 }
2345 pHVDDrvContext->bHVDIsInited[u8DrvId] = FALSE;
2346 // close HVD FW
2347 eRet = (HVD_EX_Result) HAL_HVD_EX_DeInit(u32Id);
2348
2349 if(eRet == E_HVD_EX_RET_TIMEOUT)
2350 {
2351 HVD_EX_MSG_ERR("force delete task ,cause cmd timeout \n");
2352 eRet = E_HVD_EX_OK;
2353 }
2354
2355 #if HVD_ENABLE_MVC
2356 if((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_HW_MASK) == HVD_INIT_HW_MVC)
2357 {
2358 memset((void *) &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId+1]), 0, sizeof(HVD_EX_Drv_Ctrl));
2359 }
2360 #endif /// HVD_ENABLE_MVC
2361
2362 // reset internal control variables
2363 memset((void *) &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]), 0, sizeof(HVD_EX_Drv_Ctrl));
2364 memset((void *) &(pHVDDrvContext->gHVDPreCtrl[u8DrvId]), 0, sizeof(HVD_Pre_Ctrl));
2365
2366 return eRet;
2367 }
2368
2369 //-----------------------------------------------------------------------------
2370 /// @brief \b Function \b Name: MDrv_HVD_EX_Pause()
2371 /// @brief \b Function \b Description: Pause HVD
2372 /// @return -The result of command pause
2373 //-----------------------------------------------------------------------------
MDrv_HVD_EX_Pause(MS_U32 u32Id)2374 HVD_EX_Result MDrv_HVD_EX_Pause(MS_U32 u32Id)
2375 {
2376 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
2377 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
2378
2379 HVD_EX_MSG_TRACE();
2380 _DRV_HVD_Inited(u8DrvId,eRet);
2381 _DRV_HVD_EX_Entry(u8DrvId);
2382
2383 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_PAUSE, 0);
2384
2385 if (eRet != E_HVD_EX_OK)
2386 {
2387 _DRV_HVD_EX_RET(u8DrvId, eRet);
2388 }
2389
2390 // step display off
2391 eRet = (HVD_EX_Result) HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_TRIGGER_DISP, 0);
2392
2393 if (eRet == E_HVD_EX_OK)
2394 {
2395 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32CtrlMode &= ~HVD_CTRL_DISPLAY_CTRL;
2396 }
2397
2398 _DRV_HVD_EX_RET(u8DrvId, eRet);
2399 }
2400
2401 //-----------------------------------------------------------------------------
2402 /// @brief \b Function \b Name: MDrv_HVD_EX_Flush()
2403 /// @brief \b Function \b Description: Flush queue and buffer
2404 /// @param -bShowLast \b IN : TRUE / FALSE
2405 /// -FALSE(0): show current displayed frame
2406 /// -TRUE(1): show last decoded frame
2407 /// @return -The result of command flush
2408 //-----------------------------------------------------------------------------
MDrv_HVD_EX_Flush(MS_U32 u32Id,MS_BOOL bShowLast)2409 HVD_EX_Result MDrv_HVD_EX_Flush(MS_U32 u32Id, MS_BOOL bShowLast)
2410 {
2411 MS_U32 u32Times = 0;
2412 MS_U32 u32FlushTime = 0;
2413 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
2414 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
2415 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
2416
2417 HVD_EX_MSG_TRACE();
2418 _DRV_HVD_Inited(u8DrvId,eRet);
2419 _DRV_HVD_EX_Entry(u8DrvId);
2420
2421 // pause first
2422 if (MDrv_HVD_EX_GetPlayState(u32Id) != E_HVD_EX_GSTATE_PAUSE)
2423 {
2424 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_PAUSE, 0);
2425
2426 if (eRet != E_HVD_EX_OK)
2427 {
2428 _DRV_HVD_EX_RET(u8DrvId, eRet);
2429 }
2430
2431 // check flush done
2432 while (1)
2433 {
2434 if (MDrv_HVD_EX_GetPlayState(u32Id) == E_HVD_EX_GSTATE_PAUSE)
2435 {
2436 break;
2437 }
2438
2439 u32Times++;
2440 HVD_Delay_ms(1);
2441
2442 if (u32Times > 100)
2443 {
2444 HVD_EX_MSG_INF("pause in flush() not finished.\n");
2445 break;
2446 }
2447 }
2448 }
2449
2450 // step display off
2451 eRet = (HVD_EX_Result) HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_TRIGGER_DISP, 0);
2452
2453 if (eRet == E_HVD_EX_OK)
2454 {
2455 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32CtrlMode &= ~HVD_CTRL_DISPLAY_CTRL;
2456 }
2457
2458 #if HVD_ENABLE_RV_FEATURE
2459 if ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_HW_MASK) == HVD_INIT_HW_RM)
2460 {
2461 if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].LastNal.bRVBrokenPacket)
2462 {
2463 HVD_BBU_Info bbuInfo = {0,0,0,0,0,0,0,0,0,0} ;
2464
2465 HVD_EX_MSG_INF("push dummy packet for broken by us packet\n");
2466
2467 bbuInfo.u32Length = bbuInfo.u32AllocLength = pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32RV_FlushPacketSize;
2468 bbuInfo.u32Staddr = pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32RV_FlushPacketAddr - pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32BitstreamBufAddr;
2469 bbuInfo.u32OriPktAddr = bbuInfo.u32Staddr;
2470 bbuInfo.bRVBrokenPacket = FALSE;
2471
2472 eRet = (HVD_EX_Result) HAL_HVD_EX_PushPacket(u32Id, (HVD_BBU_Info *) &bbuInfo);
2473 }
2474 }
2475 #endif
2476
2477 // fire all packet to FW
2478 if (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_BBU_WRITE_PTR_FIRED) != HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_BBU_WRITE_PTR))
2479 {
2480 HAL_HVD_EX_UpdateESWptr_Fire(u32Id);
2481 }
2482
2483 // send command
2484 HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_FW_FLUSH_STATUS, (MS_U32)E_HVD_EX_FLUSH_RUNNING);
2485 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_FLUSH, (MS_U32) bShowLast);
2486
2487 u32FlushTime = 0;
2488
2489 if (eRet != E_HVD_EX_OK)
2490 {
2491 _DRV_HVD_EX_RET(u8DrvId, eRet);
2492 }
2493
2494 // check flush done only for raw file mode
2495 if ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK) == HVD_INIT_MAIN_FILE_RAW)
2496 {
2497 while (1)
2498 {
2499 //_DRV_HVD_PushDummy();
2500 if ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_HW_MASK) == HVD_INIT_HW_VP8)
2501 {
2502 if (_HVD_EX_IsAllBufferEmpty_VP8(u32Id))
2503 {
2504 eRet = E_HVD_EX_OK;
2505 HVD_EX_MSG_INF("[Check Flush Done] flush queue empty\n");
2506 break;
2507 }
2508 }
2509 else
2510 {
2511 if (_HVD_EX_IsAllBufferEmpty(u32Id) && (u32FlushTime >= 50))
2512 {
2513 eRet = E_HVD_EX_OK;
2514 break;
2515 }
2516 }
2517 u32Times++;
2518 u32FlushTime++;
2519 HVD_Delay_ms(1);
2520 if (u32Times > 1000)
2521 {
2522 HVD_EX_MSG_ERR("Flush() timeout failed: BBU:%lu Dec:%lu Disp:%lu Idle:%lu ESr:%lx ESw:%lx\n",
2523 HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_BBU_Q_NUMB),
2524 HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DEC_Q_NUMB),
2525 HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DISP_Q_NUMB),
2526 HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_VPU_IDLE_CNT),
2527 HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_ES_READ_PTR), HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_ES_WRITE_PTR));
2528 eRet = E_HVD_EX_FAIL;
2529 break;
2530 }
2531 }
2532 // reset byte_cnt
2533 HAL_HVD_EX_RstPTSCtrlVariable(u32Id);
2534 }
2535 switch ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_HW_MASK))
2536 {
2537 case HVD_INIT_HW_VP8:
2538 //HVD_PRINT("[DRV1] BBU WRp = %x, RDp = %x\n",HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_BBU_WRITE_PTR),HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_BBU_READ_PTR));
2539 //HAL_HVD_EX_SetData(u32Id, E_HVD_GDATA_BBU_WRITE_PTR, HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_BBU_READ_PTR));
2540 //HVD_PRINT("[DRV2] BBU WRp = %x, RDp = %x\n",HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_BBU_WRITE_PTR),HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_BBU_READ_PTR));
2541 HAL_HVD_EX_UpdateESWptr_Fire(u32Id);
2542 break;
2543 default:
2544 break;
2545 }
2546
2547 HAL_HVD_EX_FlushRstShareMem(u32Id);
2548 pCtrl->u32FlushRstPtr = 1;
2549
2550 // MediaCodec need this to let scan mode to be normal.
2551 if (0) //bPlayback)
2552 {
2553 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_PLAY, 0);
2554
2555 if (eRet != E_HVD_EX_OK)
2556 {
2557 _DRV_HVD_EX_RET(u8DrvId, eRet);
2558 }
2559 }
2560
2561 _DRV_HVD_EX_RET(u8DrvId, eRet);
2562 }
2563
2564 //-----------------------------------------------------------------------------
2565 /// @brief \b Function \b Name: MDrv_HVD_EX_StepDisp()
2566 /// @brief \b Function \b Description: Trigger HVD to show one frame
2567 /// @return -The result of command trigger display
2568 //-----------------------------------------------------------------------------
MDrv_HVD_EX_StepDisp(MS_U32 u32Id)2569 HVD_EX_Result MDrv_HVD_EX_StepDisp(MS_U32 u32Id)
2570 {
2571 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
2572 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
2573
2574 HVD_EX_MSG_TRACE();
2575 _DRV_HVD_Inited(u8DrvId,eRet);
2576 _DRV_HVD_EX_Entry(u8DrvId);
2577
2578 // check command
2579 eRet = _HVD_EX_Check_Cmd(u8DrvId, E_HVD_CHECK_CMD_TRIGGER_DISP);
2580
2581 if (eRet != E_HVD_EX_OK)
2582 {
2583 _DRV_HVD_EX_RET(u8DrvId, eRet);
2584 }
2585
2586 // step display on
2587 if (_DRV_HVD_Ctrl(u8DrvId, HVD_CTRL_DISPLAY_CTRL))
2588 {
2589 if (MDrv_HVD_EX_IsFrameShowed(u32Id))
2590 {
2591 eRet = (HVD_EX_Result) HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_TRIGGER_DISP, 1);
2592 }
2593 else
2594 {
2595 HVD_EX_MSG_INF("Previous Step Display command is not finished\n");
2596 eRet = E_HVD_EX_OK;
2597 }
2598 }
2599 else
2600 {
2601 eRet = (HVD_EX_Result) HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_TRIGGER_DISP, 1);
2602
2603 if (eRet == E_HVD_EX_OK)
2604 {
2605 _DRV_HVD_SetCtrl(u8DrvId, HVD_CTRL_DISPLAY_CTRL);
2606 }
2607 }
2608 // enter play mode
2609 if (1) //HAL_HVD_EX_GetData(E_HVD_GDATA_FW_STATE) == E_HVD_FW_PAUSE )
2610 {
2611 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_PLAY, 0);
2612
2613 if (eRet != E_HVD_EX_OK)
2614 {
2615 _DRV_HVD_EX_RET(u8DrvId, eRet);
2616 }
2617 }
2618 _DRV_HVD_EX_RET(u8DrvId, eRet);
2619 }
2620
2621 //-----------------------------------------------------------------------------
2622 /// @brief \b Function \b Name: MDrv_HVD_EX_StepDecode()
2623 /// @brief \b Function \b Description: Step decode one frame
2624 //-----------------------------------------------------------------------------
MDrv_HVD_EX_StepDecode(MS_U32 u32Id)2625 HVD_EX_Result MDrv_HVD_EX_StepDecode(MS_U32 u32Id)
2626 {
2627 MS_U32 u32Times = 0;
2628 MS_U32 FWState = 0;
2629 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
2630 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
2631
2632 HVD_EX_MSG_TRACE();
2633 _DRV_HVD_Inited(u8DrvId,eRet);
2634 _DRV_HVD_EX_Entry(u8DrvId);
2635
2636 // check if step decoding
2637 if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].bStepDecoding)
2638 {
2639 if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32StepDecodeCnt == HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DECODE_CNT))
2640 {
2641 eRet = E_HVD_EX_RET_NOTREADY;
2642 _DRV_HVD_EX_RET(u8DrvId, eRet);
2643 }
2644 }
2645
2646 // Pause first
2647 FWState = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_STATE);
2648
2649 if (FWState != (MS_U32) E_HVD_FW_PAUSE)
2650 {
2651 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_PAUSE, 0);
2652
2653 if (eRet != E_HVD_EX_OK)
2654 {
2655 _DRV_HVD_EX_RET(u8DrvId, eRet);
2656 }
2657 while (FWState != ((MS_U32) E_HVD_FW_PAUSE) && u32Times <= 10000)
2658 {
2659 FWState = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_STATE);
2660 u32Times++;
2661 HVD_Delay_ms(1);
2662 }
2663 if (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_STATE) != E_HVD_FW_PAUSE)
2664 {
2665 eRet = E_HVD_EX_FAIL;
2666 _DRV_HVD_EX_RET(u8DrvId, eRet);
2667 }
2668 }
2669
2670 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].bStepDecoding = TRUE;
2671 // get decode cnt
2672 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32StepDecodeCnt = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DECODE_CNT);
2673 // step decode
2674 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_STEP_DECODE, 0);
2675
2676 _DRV_HVD_EX_RET(u8DrvId, eRet);
2677 }
2678
2679 // set command, action, status, input
2680 //-----------------------------------------------------------------------------
2681 /// @brief \b Function \b Name: MDrv_HVD_EX_PushQueue()
2682 /// @brief \b Function \b Description: push one entry into the decoding table(BBU table).
2683 /// @param -pInfo \b IN : Pointer to the information of input packet.
2684 /// @return -The result of command push queue
2685 //-----------------------------------------------------------------------------
MDrv_HVD_EX_PushQueue(MS_U32 u32Id,HVD_EX_PacketInfo * pInfo)2686 HVD_EX_Result MDrv_HVD_EX_PushQueue(MS_U32 u32Id, HVD_EX_PacketInfo *pInfo)
2687 {
2688 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
2689 MS_BOOL bNULLPacket = FALSE;
2690 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
2691 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
2692 HVD_BBU_Info bbuInfo;
2693
2694 //******** for 4kx2k stream ********//
2695 MS_U8 u8Part = 0;
2696 MS_BOOL bPartToBeSend[QUANTITY_AFTER_BROKEN_BY_US]={0};
2697 MS_U32 u32PartLen[QUANTITY_AFTER_BROKEN_BY_US]={0};
2698 MS_U32 u32PartAllocLen[QUANTITY_AFTER_BROKEN_BY_US]={0};
2699
2700 HVD_EX_MSG_TRACE();
2701 _DRV_HVD_Inited(u8DrvId,eRet);
2702 _DRV_HVD_EX_Entry(u8DrvId);
2703
2704 if (pInfo == NULL)
2705 {
2706 eRet = E_HVD_EX_RET_INVALID_PARAMETER;
2707 _DRV_HVD_EX_RET(u8DrvId, eRet);
2708 }
2709 else if ((pInfo->u32Length >= HVD_BBU_TAG_LIMITATION) && (pInfo->u32Length < MAX_QUANTITY))
2710 {
2711 HVD_EX_MSG_DBG("input packet size(0x%lx) larger than HW_bbu_tag_limit max packet size(0x%x), AllocLength(0x%lx); to play 4kx2k stream, break it by us \n",
2712 pInfo->u32Length, HVD_BBU_TAG_LIMITATION, pInfo->u32AllocLength);
2713
2714 bPartToBeSend[1] = TRUE;
2715 u32PartLen[1] = pInfo->u32Length - QUANTITY_LENGTH;
2716 u32PartAllocLen[1] = pInfo->u32AllocLength - QUANTITY_LENGTH;
2717
2718 pInfo->u32Length = QUANTITY_LENGTH;
2719 pInfo->u32AllocLength = QUANTITY_LENGTH;
2720 pInfo->u32Staddr |= HVD_RV_BROKEN_BY_US_MASK;
2721
2722 MS_U32 i;
2723 for(i=2; i< QUANTITY_AFTER_BROKEN_BY_US; i++)
2724 {
2725 if (u32PartLen[i-1] >= QUANTITY_LENGTH)
2726 {
2727 bPartToBeSend[i] = TRUE;
2728 u32PartLen[i] = u32PartLen[i-1] - QUANTITY_LENGTH;
2729 u32PartAllocLen[i] = u32PartAllocLen[i-1] - QUANTITY_LENGTH;
2730 u32PartLen[i-1] = QUANTITY_LENGTH;
2731 u32PartAllocLen[i-1] = QUANTITY_LENGTH;
2732 }
2733 else
2734 {
2735 break;
2736 }
2737 }
2738
2739 }
2740 else if (pInfo->u32Length >= MAX_QUANTITY)
2741 {
2742 HVD_EX_MSG_ERR("input packet size(0x%lx) larger than SW_defined_4kx2k max packet size(0x%x), AllocLength(0x%lx) \n",
2743 pInfo->u32Length, MAX_QUANTITY, pInfo->u32AllocLength);
2744 eRet = E_HVD_EX_RET_INVALID_PARAMETER;
2745 _DRV_HVD_EX_RET(u8DrvId, eRet);
2746 }
2747 else if ((pCtrl->InitParams.u32ModeFlag & HVD_INIT_INPUT_MASK) == HVD_INIT_INPUT_TSP)
2748 {
2749 HVD_EX_MSG_ERR("Init mode is TSP input and PushQueue() is not supported in TSP input\n");
2750 eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
2751 _DRV_HVD_EX_RET(u8DrvId, eRet);
2752 }
2753 /*
2754 else if (((pCtrl->InitParams.u32ModeFlag & HVD_INIT_HW_MASK) != HVD_INIT_HW_RM) &&
2755 (pInfo->u32Staddr >= pCtrl->MemMap.u32BitstreamBufSize))
2756 {
2757 eRet = E_HVD_EX_RET_INVALID_PARAMETER;
2758 _DRV_HVD_EX_RET(u8DrvId, eRet);
2759 }*/
2760
2761 bbuInfo.u32ID_H = pInfo->u32ID_H;
2762 bbuInfo.u32ID_L = pInfo->u32ID_L;
2763 bbuInfo.u32Length = pInfo->u32Length;
2764 bbuInfo.u32TimeStamp = pInfo->u32TimeStamp;
2765 bbuInfo.u32AllocLength = pInfo->u32AllocLength;
2766
2767 if (pInfo->u32Staddr & HVD_RV_BROKEN_BY_US_MASK)
2768 {
2769 bbuInfo.bRVBrokenPacket = TRUE;
2770 bbuInfo.u32OriPktAddr = pInfo->u32Staddr & (~HVD_RV_BROKEN_BY_US_MASK);
2771 bbuInfo.u32Staddr = pInfo->u32Staddr & (~HVD_RV_BROKEN_BY_US_MASK);
2772 }
2773 else
2774 {
2775 bbuInfo.bRVBrokenPacket = FALSE;
2776 bbuInfo.u32OriPktAddr = pInfo->u32Staddr;
2777 bbuInfo.u32Staddr = pInfo->u32Staddr;
2778 }
2779
2780
2781 if ( !bbuInfo.bRVBrokenPacket &&
2782 (pInfo->u32Staddr >= pCtrl->MemMap.u32BitstreamBufSize))
2783 {
2784 eRet = E_HVD_EX_RET_INVALID_PARAMETER;
2785 _DRV_HVD_EX_RET(u8DrvId, eRet);
2786 }
2787
2788
2789 bbuInfo.u32Staddr2 = pInfo->u32Staddr2;
2790 bbuInfo.u32Length2 = pInfo->u32Length2;
2791
2792 // invalid packet
2793 if ((bbuInfo.u32TimeStamp != HVD_U32_MAX) && (bbuInfo.u32Length == 0))
2794 {
2795 HVD_EX_MSG_INF("Invalid Packet(size:0x%lx PTS:0x%lx)\n ", bbuInfo.u32Length, bbuInfo.u32TimeStamp);
2796 eRet = E_HVD_EX_RET_INVALID_PARAMETER;
2797 _DRV_HVD_EX_RET(u8DrvId, eRet);
2798 }
2799 // AVI NULL packet
2800 #if HVD_ENABLE_AUTO_AVI_NULL_PACKET
2801 else if ((bbuInfo.u32TimeStamp == HVD_U32_MAX) && (bbuInfo.u32Length == 0))
2802 {
2803 if (pCtrl->bNoDrvProccBuf)
2804 {
2805 HVD_EX_MSG_INF
2806 ("AVI Null Packet(size:0x%lx PTS:0x%lx), but do not have enough driver process buffer(0x%lx)\n ",
2807 pInfo->u32Length, bbuInfo.u32TimeStamp, pCtrl->MemMap.u32DrvProcessBufSize);
2808 eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
2809 _DRV_HVD_EX_RET(u8DrvId, eRet);
2810 }
2811 else
2812 {
2813 bNULLPacket = TRUE;
2814 bbuInfo.u32Length = pCtrl->u32NULLPacketSize;
2815 bbuInfo.u32Staddr = pCtrl->u32NULLPacketAddr - pCtrl->MemMap.u32BitstreamBufAddr;
2816 }
2817 }
2818 #endif
2819
2820 // the else are all normal cases.
2821 if (MDrv_HVD_EX_GetBBUVacancy(u32Id) != 0)
2822 {
2823 MS_U32 u32ESRptr = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_ES_READ_PTR);
2824 MS_U32 u32ESWptr = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_ES_WRITE_PTR);
2825
2826 if ((u32ESRptr <= u32ESWptr) &&
2827 (pCtrl->MemMap.u32BitstreamBufSize < bbuInfo.u32Staddr + bbuInfo.u32Length))
2828 {
2829 HVD_EX_MSG_ERR("input packet (0x%lx 0x%lx 0x%lx) may cause bitstream buffer overflow (0x%lx 0x%lx) 0x%lx\n ",
2830 bbuInfo.u32Staddr, bbuInfo.u32Length, bbuInfo.u32Staddr + bbuInfo.u32Length,
2831 u32ESRptr, u32ESWptr, pCtrl->MemMap.u32BitstreamBufSize);
2832 }
2833
2834 if ((u32ESWptr < u32ESRptr) &&
2835 (u32ESWptr < bbuInfo.u32Staddr) &&
2836 (bbuInfo.u32Staddr < u32ESRptr) &&
2837 (u32ESRptr <= bbuInfo.u32Staddr + bbuInfo.u32Length))
2838 {
2839 HVD_EX_MSG_ERR("input packet (staddr=0x%lx, len=0x%lx) may overwrite undecoded data (rptr=0x%lx wptr=0x%lx)\n ",
2840 bbuInfo.u32Staddr, bbuInfo.u32Length, u32ESRptr, u32ESWptr);
2841 }
2842
2843 if (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_BBU_Q_NUMB) &&
2844 (!bNULLPacket) &&
2845 (pCtrl->MemMap.u32DrvProcessBufSize != 0) &&
2846 (pCtrl->MemMap.u32BitstreamBufAddr <= pCtrl->MemMap.u32DrvProcessBufAddr) &&
2847 (pCtrl->MemMap.u32DrvProcessBufAddr < (pCtrl->MemMap.u32BitstreamBufAddr + pCtrl->MemMap.u32BitstreamBufSize)))
2848 {
2849 MS_U32 u32Lower = pCtrl->MemMap.u32DrvProcessBufAddr - pCtrl->MemMap.u32BitstreamBufAddr;
2850 MS_U32 u32Upper = u32Lower + pCtrl->MemMap.u32DrvProcessBufSize;
2851
2852 if (((u32Lower <= bbuInfo.u32Staddr) && (bbuInfo.u32Staddr < u32Upper)) ||
2853 ((u32Lower <= (bbuInfo.u32Staddr + bbuInfo.u32Length)) && ((bbuInfo.u32Staddr + bbuInfo.u32Length) < u32Upper)) ||
2854 ((bbuInfo.u32Staddr < u32Lower) && (u32Upper <= (bbuInfo.u32Staddr + bbuInfo.u32Length))))
2855 {
2856 HVD_EX_MSG_ERR("input packet (0x%lx 0x%lx 0x%lx) is located in HVD driver process buffer(0x%lx 0x%lx)\n ",
2857 bbuInfo.u32Staddr, bbuInfo.u32Length, bbuInfo.u32Staddr + bbuInfo.u32Length,
2858 u32Lower, u32Upper);
2859 }
2860 }
2861
2862 //for debug
2863 #if 0
2864 {
2865 HVD_EX_MSG_INF("HVD : %lu (%lu %lu) ID:%lx input packet (%lx %lx %lx) (%lx %lx %lx) (%lu %lu %lu)\n ",
2866 pCtrl->u32BBUPacketCnt, MDrv_HVD_EX_GetDataErrCnt(u32Id), MDrv_HVD_EX_GetDecErrCnt(u32Id),
2867 bbuInfo.u32ID_L, bbuInfo.u32Staddr + bbuInfo.u32Length, bbuInfo.u32Length,
2868 bbuInfo.u32Staddr, u32ESRptr, pCtrl->MemMap.u32BitstreamBufSize, u32ESWptr,
2869 MDrv_HVD_EX_GetBBUVacancy(u32Id), HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_BBU_READ_PTR),
2870 HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_BBU_WRITE_PTR));
2871 }
2872 #endif
2873
2874 if ( (!bbuInfo.bRVBrokenPacket)&&
2875 ((pCtrl->InitParams.u32ModeFlag & HVD_INIT_HW_MASK) != HVD_INIT_HW_RM) &&
2876 ((pCtrl->InitParams.u32ModeFlag & HVD_INIT_HW_MASK) != HVD_INIT_HW_VP8) &&
2877 (pCtrl->bAutoRmLastZeroByte) &&
2878 ((!pCtrl->bCannotAccessMIU256) || ((pCtrl->bCannotAccessMIU256) && (pCtrl->MemMap.u32BitstreamBufAddr < pCtrl->MemMap.u32MIU1BaseAddr))))
2879 {
2880 if ((pCtrl->u8SecureMode == E_HVD_SECURE_MODE_NONE) && (!(pHVDDrvContext->bVPUIsSecureMode)))
2881 {
2882 MS_U32 ModifyCnt = 0;
2883 MS_U32 u32tmp = 0;
2884 MS_U8 *pByte = NULL;
2885 u32tmp = (bbuInfo.u32Staddr + bbuInfo.u32Length - 1);
2886 if (u32tmp >= pCtrl->MemMap.u32BitstreamBufSize)
2887 {
2888 u32tmp -= pCtrl->MemMap.u32BitstreamBufSize;
2889 }
2890 u32tmp += pCtrl->MemMap.u32BitstreamBufVAddr;
2891 pByte = (MS_U8 *) u32tmp;
2892
2893 if((bbuInfo.u32Length > 2)
2894 && ((*pByte == 0) && (*(pByte-1) == 0) && (*(pByte-2) == 0)))
2895 {
2896 //301385:
2897 //more then 2 zero bytes after valid bytes.
2898 //no need to remove pending zero bytes to prevent system busy
2899 //printf("no need to remove pending zero~~\n");
2900 }
2901 else
2902 {
2903 #if 1 //use if-condition instead of while-loop
2904 if(*pByte == 0)
2905 {
2906 ModifyCnt++;
2907 bbuInfo.u32Length--;
2908 pByte--;
2909
2910 if(bbuInfo.u32Length && (*pByte == 0))
2911 {
2912 ModifyCnt++;
2913 bbuInfo.u32Length--;
2914 }
2915 }
2916 #else
2917 while (1) //for( ModifyCnt=0 ; ModifyCnt<3;ModifyCnt++ )
2918 {
2919 if (bbuInfo.u32Length)
2920 {
2921 if (*pByte == 0)
2922 {
2923 /*
2924 if( ModifyCnt == 2 )
2925 {
2926 gHVDPacket.u32Length+=ModifyCnt;
2927 }
2928 else
2929 */
2930 {
2931 ModifyCnt++;
2932 bbuInfo.u32Length--;
2933 pByte--;
2934 }
2935 }
2936 else
2937 {
2938 break;
2939 }
2940 }
2941 else
2942 {
2943 break;
2944 }
2945 }
2946 #endif
2947 }
2948
2949 if (ModifyCnt != 0)
2950 {
2951 //HVD_MSG_INFO("HVD remove last zero byte:%lu\n" , ModifyCnt);
2952 }
2953
2954 if (bbuInfo.u32Length == 0)
2955 {
2956 HVD_EX_MSG_ERR("Packet with all zero bytes(staddr:0x%lx remove zero bytes:%lu)\n ",
2957 bbuInfo.u32Staddr, ModifyCnt);
2958 eRet = E_HVD_EX_OK;
2959 _DRV_HVD_EX_RET(u8DrvId, eRet);
2960 }
2961 }
2962 }
2963 /*
2964 {
2965 MS_U8 *pByte=NULL;
2966 pByte = (MS_U8 *)((gHVDCtrl.MemMap.u32BitstreamBufVAddr) + gHVDPacket.u32Staddr );
2967 HVD_MSG_INFO("HVD remove last zero byte:%02x%02x%02x%02x\n" ,
2968 *pByte , *(pByte+1) , *(pByte+2) , *(pByte+3) );
2969 }
2970 */
2971 eRet = (HVD_EX_Result) HAL_HVD_EX_PushPacket(u32Id, (HVD_BBU_Info *) &bbuInfo);
2972 pCtrl->u32FlushRstPtr = 0;
2973 }
2974 else
2975 {
2976 HVD_EX_MSG_DBG("Push queue full\n");
2977 eRet = E_HVD_EX_RET_QUEUE_FULL;
2978 }
2979
2980 for ( u8Part = 1; u8Part < QUANTITY_AFTER_BROKEN_BY_US; u8Part++)
2981 {
2982 if (bPartToBeSend[u8Part])
2983 {
2984 pInfo->u32Staddr &= (~HVD_RV_BROKEN_BY_US_MASK);
2985 pInfo->u32Staddr += QUANTITY_LENGTH;
2986
2987 bbuInfo.u32ID_H = pInfo->u32ID_H;
2988 bbuInfo.u32ID_L = pInfo->u32ID_L;
2989 bbuInfo.u32Length = u32PartLen[u8Part];
2990 bbuInfo.u32TimeStamp = pInfo->u32TimeStamp;
2991 bbuInfo.u32AllocLength = u32PartAllocLen[u8Part];
2992
2993 if (u8Part != (QUANTITY_AFTER_BROKEN_BY_US - 1))
2994 {
2995 if (bPartToBeSend[u8Part+1])
2996 {
2997 bbuInfo.bRVBrokenPacket = TRUE;
2998 }
2999 else
3000 {
3001 bbuInfo.bRVBrokenPacket = FALSE;
3002 }
3003 }
3004 else
3005 {
3006 bbuInfo.bRVBrokenPacket = FALSE;
3007 }
3008
3009 bbuInfo.u32OriPktAddr = pInfo->u32Staddr;
3010 bbuInfo.u32Staddr = pInfo->u32Staddr;
3011
3012 bbuInfo.u32Staddr2 = pInfo->u32Staddr2;
3013 bbuInfo.u32Length2 = pInfo->u32Length2;
3014
3015 //if (MDrv_HVD_EX_GetBBUVacancy(u32Id) != 0)
3016 {
3017 MS_U32 u32ESRptr = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_ES_READ_PTR);
3018 MS_U32 u32ESWptr = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_ES_WRITE_PTR);
3019
3020 if ((u32ESRptr <= u32ESWptr) &&
3021 (pCtrl->MemMap.u32BitstreamBufSize < bbuInfo.u32Staddr + bbuInfo.u32Length))
3022 {
3023 HVD_EX_MSG_ERR("input packet (0x%lx 0x%lx 0x%lx) may cause bitstream buffer overflow (0x%lx 0x%lx) 0x%lx\n ",
3024 bbuInfo.u32Staddr, bbuInfo.u32Length, bbuInfo.u32Staddr + bbuInfo.u32Length,
3025 u32ESRptr, u32ESWptr, pCtrl->MemMap.u32BitstreamBufSize);
3026 }
3027
3028 if ((u32ESWptr < u32ESRptr) &&
3029 (u32ESWptr < bbuInfo.u32Staddr) &&
3030 (bbuInfo.u32Staddr < u32ESRptr) &&
3031 (u32ESRptr <= bbuInfo.u32Staddr + bbuInfo.u32Length))
3032 {
3033 HVD_EX_MSG_ERR("input packet (staddr=0x%lx, len=0x%lx) may overwrite undecoded data (rptr=0x%lx wptr=0x%lx)\n ",
3034 bbuInfo.u32Staddr, bbuInfo.u32Length, u32ESRptr, u32ESWptr);
3035 }
3036
3037 if (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_BBU_Q_NUMB) &&
3038 (!bNULLPacket) &&
3039 (pCtrl->MemMap.u32DrvProcessBufSize != 0) &&
3040 (pCtrl->MemMap.u32BitstreamBufAddr <= pCtrl->MemMap.u32DrvProcessBufAddr) &&
3041 (pCtrl->MemMap.u32DrvProcessBufAddr < (pCtrl->MemMap.u32BitstreamBufAddr + pCtrl->MemMap.u32BitstreamBufSize)))
3042 {
3043 MS_U32 u32Lower = pCtrl->MemMap.u32DrvProcessBufAddr - pCtrl->MemMap.u32BitstreamBufAddr;
3044 MS_U32 u32Upper = u32Lower + pCtrl->MemMap.u32DrvProcessBufSize;
3045
3046 if (((u32Lower <= bbuInfo.u32Staddr) && (bbuInfo.u32Staddr < u32Upper)) ||
3047 ((u32Lower <= (bbuInfo.u32Staddr + bbuInfo.u32Length)) && ((bbuInfo.u32Staddr + bbuInfo.u32Length) < u32Upper)) ||
3048 ((bbuInfo.u32Staddr < u32Lower) && (u32Upper <= (bbuInfo.u32Staddr + bbuInfo.u32Length))))
3049 {
3050 HVD_EX_MSG_ERR("input packet (0x%lx 0x%lx 0x%lx) is located in HVD driver process buffer(0x%lx 0x%lx)\n ",
3051 bbuInfo.u32Staddr, bbuInfo.u32Length, bbuInfo.u32Staddr + bbuInfo.u32Length,
3052 u32Lower, u32Upper);
3053 }
3054 }
3055
3056 //for debug
3057 #if 0
3058 {
3059 HVD_EX_MSG_INF("HVD : %lu (%lu %lu) ID:%lx input packet (%lx %lx %lx) (%lx %lx %lx) (%lu %lu %lu)\n ",
3060 pCtrl->u32BBUPacketCnt, MDrv_HVD_EX_GetDataErrCnt(u32Id), MDrv_HVD_EX_GetDecErrCnt(u32Id),
3061 bbuInfo.u32ID_L, bbuInfo.u32Staddr + bbuInfo.u32Length, bbuInfo.u32Length,
3062 bbuInfo.u32Staddr, u32ESRptr, pCtrl->MemMap.u32BitstreamBufSize, u32ESWptr,
3063 MDrv_HVD_EX_GetBBUVacancy(u32Id), HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_BBU_READ_PTR),
3064 HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_BBU_WRITE_PTR));
3065 }
3066 #endif
3067
3068 if (((pCtrl->InitParams.u32ModeFlag & HVD_INIT_HW_MASK) != HVD_INIT_HW_RM) &&
3069 ((pCtrl->InitParams.u32ModeFlag & HVD_INIT_HW_MASK) != HVD_INIT_HW_VP8) &&
3070 (pCtrl->bAutoRmLastZeroByte) &&
3071 ((!pCtrl->bCannotAccessMIU256) || ((pCtrl->bCannotAccessMIU256) && (pCtrl->MemMap.u32BitstreamBufAddr < pCtrl->MemMap.u32MIU1BaseAddr))))
3072 {
3073 MS_U32 ModifyCnt = 0;
3074 while (1) //for( ModifyCnt=0 ; ModifyCnt<3;ModifyCnt++ )
3075 {
3076 if (bbuInfo.u32Length)
3077 {
3078 MS_U8 *pByte = NULL;
3079 MS_U32 u32tmp = 0;
3080 u32tmp = (bbuInfo.u32Staddr + bbuInfo.u32Length - 1);
3081 if (u32tmp >= pCtrl->MemMap.u32BitstreamBufSize)
3082 {
3083 u32tmp -= pCtrl->MemMap.u32BitstreamBufSize;
3084 }
3085 u32tmp += pCtrl->MemMap.u32BitstreamBufVAddr;
3086 pByte = (MS_U8 *) u32tmp;
3087 if (*pByte == 0)
3088 {
3089 /*
3090 if( ModifyCnt == 2 )
3091 {
3092 gHVDPacket.u32Length+=ModifyCnt;
3093 }
3094 else
3095 */
3096 {
3097 ModifyCnt++;
3098 bbuInfo.u32Length--;
3099 }
3100 }
3101 else
3102 {
3103 break;
3104 }
3105 }
3106 else
3107 {
3108 break;
3109 }
3110 }
3111 if (ModifyCnt != 0)
3112 {
3113 //HVD_MSG_INFO("HVD remove last zero byte:%lu\n" , ModifyCnt);
3114 }
3115 if (bbuInfo.u32Length == 0)
3116 {
3117 HVD_EX_MSG_ERR("Packet with all zero bytes(staddr:0x%lx remove zero bytes:%lu)\n ",
3118 bbuInfo.u32Staddr, ModifyCnt);
3119 eRet = E_HVD_EX_OK;
3120 _DRV_HVD_EX_RET(u8DrvId, eRet);
3121 }
3122 }
3123 /*
3124 {
3125 MS_U8 *pByte=NULL;
3126 pByte = (MS_U8 *)((gHVDCtrl.MemMap.u32BitstreamBufVAddr) + gHVDPacket.u32Staddr );
3127 HVD_MSG_INFO("HVD remove last zero byte:%02x%02x%02x%02x\n" ,
3128 *pByte , *(pByte+1) , *(pByte+2) , *(pByte+3) );
3129 }
3130 */
3131 eRet = (HVD_EX_Result) HAL_HVD_EX_PushPacket(u32Id, (HVD_BBU_Info *) &bbuInfo);
3132 }
3133 }
3134 }
3135
3136 _DRV_HVD_EX_RET(u8DrvId, eRet);
3137 }
3138
3139 //-----------------------------------------------------------------------------
3140 /// @brief \b Function \b Name: MDrv_HVD_EX_PushQueue_Fire()
3141 /// @brief \b Function \b Description: fire all waiting entry into the decoding table(BBU table).
3142 /// @return -The result of command push queue fire
3143 //-----------------------------------------------------------------------------
MDrv_HVD_EX_PushQueue_Fire(MS_U32 u32Id)3144 HVD_EX_Result MDrv_HVD_EX_PushQueue_Fire(MS_U32 u32Id)
3145 {
3146 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
3147 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
3148
3149 HVD_EX_MSG_TRACE();
3150 _DRV_HVD_Inited(u8DrvId,eRet);
3151 _DRV_HVD_EX_Entry(u8DrvId);
3152
3153 HAL_HVD_EX_UpdateESWptr_Fire(u32Id);
3154
3155 eRet = E_HVD_EX_OK;
3156 _DRV_HVD_EX_RET(u8DrvId, eRet);
3157 }
3158
3159 //-----------------------------------------------------------------------------
3160 /// @brief \b Function \b Name: MDrv_HVD_EX_DecodeIFrame()
3161 /// @brief \b Function \b Description: Decode I frame only under driver input path.
3162 /// @param -u32SrcSt \b IN : The physical address if user has input packet.
3163 /// @param -u32SrcSize \b IN : The packet size if user has input packet.
3164 /// @return -The result of command decode I frame.
3165 //-----------------------------------------------------------------------------
MDrv_HVD_EX_DecodeIFrame(MS_U32 u32Id,MS_PHYADDR u32SrcSt,MS_U32 u32SrcSize)3166 HVD_EX_Result MDrv_HVD_EX_DecodeIFrame(MS_U32 u32Id, MS_PHYADDR u32SrcSt, MS_U32 u32SrcSize)
3167 {
3168 MS_U32 timer = 300;
3169 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
3170 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
3171
3172 HVD_EX_MSG_TRACE();
3173 _DRV_HVD_Inited(u8DrvId,eRet);
3174 _DRV_HVD_EX_Entry(u8DrvId);
3175
3176 eRet = MDrv_HVD_EX_Pause(u32Id);
3177
3178 if (eRet != E_HVD_EX_OK)
3179 {
3180 _DRV_HVD_EX_RET(u8DrvId, eRet);
3181 }
3182
3183 // skip decode I
3184 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SKIP_DEC, E_HVD_EX_SKIP_DECODE_I);
3185
3186 if (eRet != E_HVD_EX_OK)
3187 {
3188 _DRV_HVD_EX_RET(u8DrvId, eRet);
3189 }
3190
3191 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DISP_I_DIRECT, TRUE);
3192
3193 if (eRet != E_HVD_EX_OK)
3194 {
3195 _DRV_HVD_EX_RET(u8DrvId, eRet);
3196 }
3197 eRet = MDrv_HVD_EX_StepDecode(u32Id);
3198 if (eRet != E_HVD_EX_OK)
3199 {
3200 _DRV_HVD_EX_RET(u8DrvId, eRet);
3201 }
3202
3203 if (E_HVD_INIT_INPUT_DRV == (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & E_HVD_INIT_INPUT_MASK))
3204 {
3205 HVD_EX_PacketInfo packet = {0,0,0,0,0,0,0,0};
3206
3207 if (u32SrcSize == 0)
3208 {
3209 eRet = E_HVD_EX_RET_INVALID_PARAMETER;
3210 HVD_EX_MSG_ERR("decode I frame input packet size is zero\n");
3211 _DRV_HVD_EX_RET(u8DrvId, eRet);
3212 }
3213
3214 packet.u32Staddr = u32SrcSt - pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32BitstreamBufAddr;
3215 packet.u32Length = u32SrcSize;
3216
3217 if ((packet.u32Staddr + packet.u32Length) > pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32BitstreamBufSize)
3218 {
3219 eRet = E_HVD_EX_RET_INVALID_PARAMETER;
3220 HVD_EX_MSG_ERR
3221 ("decode I frame memory overflow, the packet end address is over ES buffer end address\n");
3222 _DRV_HVD_EX_RET(u8DrvId, eRet);
3223 }
3224 packet.u32TimeStamp = 0xFFFFFFFF;
3225 packet.u32ID_L = 0;
3226 packet.u32ID_H = 0;
3227 eRet = MDrv_HVD_EX_PushQueue(u32Id, &packet);
3228 if (E_HVD_EX_OK != eRet)
3229 {
3230 HVD_EX_MSG_ERR("decode I frame push queue fail %x\n", eRet);
3231 _DRV_HVD_EX_RET(u8DrvId, eRet);
3232 }
3233
3234 HAL_HVD_EX_UpdateESWptr_Fire(u32Id);
3235 }
3236 while (timer)
3237 {
3238 HVD_Delay_ms(1);
3239 if (MDrv_HVD_EX_IsStepDecodeDone(u32Id))
3240 {
3241 break;
3242 }
3243 timer--;
3244 }
3245 if (timer == 0)
3246 {
3247 eRet = E_HVD_EX_FAIL;
3248 HVD_EX_MSG_ERR("decode I frame time out, not enough data\n");
3249 _DRV_HVD_EX_RET(u8DrvId, eRet);
3250 }
3251 eRet = E_HVD_EX_OK;
3252 _DRV_HVD_EX_RET(u8DrvId, eRet);
3253 }
3254
3255 //-----------------------------------------------------------------------------
3256 /// @brief \b Function \b Name: MDrv_HVD_EX_SetDataEnd()
3257 /// @brief \b Function \b Description: Upper layer set this to inform driver that there are no more data will be pushed.
3258 /// @param -bEnd \b IN : Enable/ Disable
3259 /// -FALSE(0): normal status( default )
3260 /// -TRUE(1): ending status
3261 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetDataEnd(MS_U32 u32Id,MS_BOOL bEnd)3262 HVD_EX_Result MDrv_HVD_EX_SetDataEnd(MS_U32 u32Id, MS_BOOL bEnd)
3263 {
3264 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
3265 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
3266
3267 HVD_EX_MSG_TRACE();
3268 _DRV_HVD_Inited(u8DrvId,eRet);
3269 _DRV_HVD_EX_Entry(u8DrvId);
3270
3271 if (bEnd)
3272 {
3273 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32CtrlMode |= HVD_CTRL_DATA_END;
3274 }
3275 else
3276 {
3277 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32CtrlMode &= ~HVD_CTRL_DATA_END;
3278 }
3279
3280 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_PLAYBACK_FINISH, bEnd);
3281
3282 _DRV_HVD_EX_RET(u8DrvId, eRet);
3283 }
3284
3285 //-----------------------------------------------------------------------------
3286 /// @brief \b Function \b Name: MDrv_HVD_EX_SetDispErrFrm()
3287 /// @brief \b Function \b Description: Enable/ Disable to decode and show error(broken) frames
3288 /// @param -bEnable \b IN : Enable/ Disable
3289 /// -FALSE(0): hide error frames
3290 /// -TRUE(1): show error frames
3291 /// @return -The result of command set display error frames
3292 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetDispErrFrm(MS_U32 u32Id,MS_BOOL bEnable)3293 HVD_EX_Result MDrv_HVD_EX_SetDispErrFrm(MS_U32 u32Id, MS_BOOL bEnable)
3294 {
3295 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
3296 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
3297
3298 HVD_EX_MSG_TRACE();
3299 _DRV_HVD_Inited(u8DrvId,eRet);
3300 _DRV_HVD_EX_Entry(u8DrvId);
3301
3302 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DISP_ERR_FRM, bEnable);
3303 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].Settings.bIsShowErrFrm = bEnable;
3304
3305 _DRV_HVD_EX_RET(u8DrvId, eRet);
3306 }
3307
3308 //-----------------------------------------------------------------------------
3309 /// @brief \b Function \b Name: MDrv_HVD_EX_SetDispRepeatField()
3310 /// @brief \b Function \b Description: Enable/ Disable to show last field when FW needs to show repeated field
3311 /// @param -bEnable \b IN : Enable/ Disable
3312 /// -FALSE(0): disable this mode
3313 /// -TRUE(1): enable this mode
3314 /// @return -The result of command set display repeated field
3315 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetDispRepeatField(MS_U32 u32Id,MS_BOOL bEnable)3316 HVD_EX_Result MDrv_HVD_EX_SetDispRepeatField(MS_U32 u32Id, MS_BOOL bEnable)
3317 {
3318 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
3319 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
3320
3321 HVD_EX_MSG_TRACE();
3322 _DRV_HVD_Inited(u8DrvId,eRet);
3323 _DRV_HVD_EX_Entry(u8DrvId);
3324
3325 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_REPEAT_LAST_FIELD, bEnable);
3326
3327 _DRV_HVD_EX_RET(u8DrvId, eRet);
3328 }
3329
3330 //-----------------------------------------------------------------------------
3331 /// @brief \b Function \b Name: MDrv_HVD_EX_SetSkipDecMode()
3332 /// @brief \b Function \b Description: set the decoding frame type.
3333 /// @param -eDecType \b IN : decoding frame type
3334 /// @return -The result of command set skip decode mode
3335 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetSkipDecMode(MS_U32 u32Id,HVD_EX_SkipDecode eDecType)3336 HVD_EX_Result MDrv_HVD_EX_SetSkipDecMode(MS_U32 u32Id, HVD_EX_SkipDecode eDecType)
3337 {
3338 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
3339 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
3340
3341 HVD_EX_MSG_TRACE();
3342 _DRV_HVD_Inited(u8DrvId,eRet);
3343 _DRV_HVD_EX_Entry(u8DrvId);
3344
3345 #if HVD_ENABLE_CHECK_STATE_BEFORE_SET_CMD
3346 if ((HVD_EX_SkipDecode) HAL_HVD_EX_GetData(E_HVD_GDATA_SKIP_MODE) != eDecType)
3347 #endif
3348 {
3349 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SKIP_DEC, eDecType);
3350
3351 if (eRet != E_HVD_EX_OK)
3352 {
3353 _DRV_HVD_EX_RET(u8DrvId, eRet);
3354 }
3355
3356 if (eDecType == E_HVD_EX_SKIP_DECODE_I)
3357 {
3358 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DISP_I_DIRECT, TRUE);
3359 }
3360 else
3361 {
3362 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DISP_I_DIRECT, FALSE);
3363 }
3364 }
3365
3366 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].Settings.u8SkipMode = (MS_U8) eDecType;
3367
3368 _DRV_HVD_EX_RET(u8DrvId, eRet);
3369 }
3370
3371 //-----------------------------------------------------------------------------
3372 /// @brief \b Function \b Name: MDrv_HVD_EX_SetDispSpeed()
3373 /// @brief \b Function \b Description: specify the display speed type.
3374 /// @param -eSpeed \b IN : display speed type
3375 /// @return -The result of command set display speed type
3376 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetDispSpeed(MS_U32 u32Id,HVD_EX_DispSpeed eSpeed)3377 HVD_EX_Result MDrv_HVD_EX_SetDispSpeed(MS_U32 u32Id, HVD_EX_DispSpeed eSpeed)
3378 {
3379 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
3380 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
3381
3382 HVD_EX_MSG_TRACE();
3383 _DRV_HVD_Inited(u8DrvId,eRet);
3384 _DRV_HVD_EX_Entry(u8DrvId);
3385
3386 HVD_EX_MSG_DBG("%d\n", (MS_S16) eSpeed);
3387
3388 #if HVD_ENABLE_CHECK_STATE_BEFORE_SET_CMD
3389 if (HAL_HVD_EX_GetData(E_HVD_GDATA_DISPLAY_DURATION) != eSpeed)
3390 #endif
3391 {
3392 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DISP_SPEED, eSpeed);
3393 }
3394 #if HVD_ENABLE_WAIT_CMD_FINISHED
3395 if (eRet == E_HVD_EX_OK)
3396 {
3397 MS_U32 timer = HVD_DRV_CMD_WAIT_FINISH_TIMEOUT;
3398 while (timer)
3399 {
3400 if (HAL_HVD_EX_GetData(E_HVD_GDATA_DISPLAY_DURATION) == eSpeed)
3401 {
3402 break;
3403 }
3404 HVD_Delay_ms(1);
3405 timer--;
3406 }
3407 }
3408 #endif
3409 _DRV_HVD_EX_RET(u8DrvId, eRet);
3410 }
3411
3412 //-----------------------------------------------------------------------------
3413 /// @brief \b Function \b Name: MDrv_HVD_EX_SetSyncActive()
3414 /// @brief \b Function \b Description: Enable/disable the sync of video time stamp and STC.
3415 /// @param -bEnable \b IN : Enable/ Disable
3416 /// -FALSE(0): Disable sync mode
3417 /// -TRUE(1): Enable sync mode
3418 /// @return -The result of command set sync active
3419 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetSyncActive(MS_U32 u32Id,MS_BOOL bEnable)3420 HVD_EX_Result MDrv_HVD_EX_SetSyncActive(MS_U32 u32Id, MS_BOOL bEnable)
3421 {
3422 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
3423 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
3424
3425 HVD_EX_MSG_TRACE();
3426 _DRV_HVD_Inited(u8DrvId,eRet);
3427 _DRV_HVD_EX_Entry(u8DrvId);
3428
3429 #if HVD_ENABLE_CHECK_STATE_BEFORE_SET_CMD
3430 if (HAL_HVD_EX_GetData(E_HVD_GDATA_IS_SYNC_ON) != bEnable)
3431 #endif
3432 {
3433 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SYNC_ACTIVE, bEnable);
3434 }
3435 #if HVD_ENABLE_WAIT_CMD_FINISHED
3436 if (eRet == E_HVD_EX_OK)
3437 {
3438 MS_U32 timer = HVD_DRV_CMD_WAIT_FINISH_TIMEOUT;
3439 while (timer)
3440 {
3441 if (HAL_HVD_EX_GetData(E_HVD_GDATA_IS_SYNC_ON) == bEnable)
3442 {
3443 break;
3444 }
3445 HVD_Delay_ms(1);
3446 timer--;
3447 }
3448 }
3449 #endif
3450 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].Settings.bIsSyncOn = bEnable;
3451
3452 _DRV_HVD_EX_RET(u8DrvId, eRet);
3453 }
3454
3455 //-----------------------------------------------------------------------------
3456 /// @brief \b Function \b Name: MDrv_HVD_EX_SetDropMode()
3457 /// @brief \b Function \b Description: specify the way to drop decoded frames.
3458 /// @param -eMode \b IN : Drop display type.
3459 /// @param -u32Arg \b IN : The argument of eMode
3460 /// -( eMode == E_HVD_DROP_DISPLAY_AUTO) , Enable: (u32Arg = TRUE); Disable: (u32Arg = FALSE)
3461 /// -( eMode == E_HVD_EX_DROP_DISPLAY_ONCE) , u32Arg = not zero
3462 /// @return -The result of command set display speed type
3463 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetDropMode(MS_U32 u32Id,HVD_EX_DropDisp eMode,MS_U32 u32Arg)3464 HVD_EX_Result MDrv_HVD_EX_SetDropMode(MS_U32 u32Id, HVD_EX_DropDisp eMode, MS_U32 u32Arg)
3465 {
3466 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
3467 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
3468
3469 HVD_EX_MSG_TRACE();
3470 _DRV_HVD_Inited(u8DrvId,eRet);
3471 _DRV_HVD_EX_Entry(u8DrvId);
3472
3473 if (eMode == E_HVD_EX_DROP_DISPLAY_AUTO)
3474 {
3475 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DROP_DISP_AUTO, u32Arg);
3476 }
3477 else if (eMode == E_HVD_EX_DROP_DISPLAY_ONCE)
3478 {
3479 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DROP_DISP_ONCE, u32Arg);
3480 }
3481 else
3482 {
3483 eRet = E_HVD_EX_RET_INVALID_PARAMETER;
3484 }
3485
3486 _DRV_HVD_EX_RET(u8DrvId, eRet);
3487 }
3488
3489 //-----------------------------------------------------------------------------
3490 /// @brief \b Function \b Name: MDrv_HVD_EX_RstPTS()
3491 /// @brief \b Function \b Description: Reset HVD sync table
3492 /// @param -u32PTS \b IN : PTS base
3493 /// @return -The result of command reset PTS
3494 //-----------------------------------------------------------------------------
MDrv_HVD_EX_RstPTS(MS_U32 u32Id,MS_U32 u32PTS)3495 HVD_EX_Result MDrv_HVD_EX_RstPTS(MS_U32 u32Id, MS_U32 u32PTS)
3496 {
3497 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
3498 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
3499
3500 HVD_EX_MSG_TRACE();
3501 _DRV_HVD_Inited(u8DrvId,eRet);
3502 _DRV_HVD_EX_Entry(u8DrvId);
3503
3504 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_RESET_PTS, u32PTS);
3505
3506 _DRV_HVD_EX_RET(u8DrvId, eRet);
3507 }
3508
3509 //-----------------------------------------------------------------------------
3510 /// @brief \b Function \b Name: MDrv_HVD_EX_SetFrcMode()
3511 /// @brief \b Function \b Description: set the frame rate convert mode.
3512 /// @param -eMode \b IN : mode type
3513 /// @return -The result of command set frame rate convert mode
3514 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetFrcMode(MS_U32 u32Id,HVD_EX_FrmRateConvMode eMode)3515 HVD_EX_Result MDrv_HVD_EX_SetFrcMode(MS_U32 u32Id, HVD_EX_FrmRateConvMode eMode)
3516 {
3517 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
3518 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
3519
3520 HVD_EX_MSG_TRACE();
3521 _DRV_HVD_Inited(u8DrvId,eRet);
3522 _DRV_HVD_EX_Entry(u8DrvId);
3523
3524 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_FRC_MODE, eMode);
3525
3526 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].Settings.u8FrcMode = (MS_U8) eMode;
3527
3528 _DRV_HVD_EX_RET(u8DrvId, eRet);
3529 }
3530
3531 //-----------------------------------------------------------------------------
3532 /// @brief \b Function \b Name: MDrv_HVD_EX_SetSyncTolerance()
3533 /// @brief \b Function \b Description: Set the tolerance of FW reporting sync reach.
3534 /// @param -u32Arg \b IN : tolerance.
3535 /// @return -The result of command set sync tolerance
3536 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetSyncTolerance(MS_U32 u32Id,MS_U32 u32Arg)3537 HVD_EX_Result MDrv_HVD_EX_SetSyncTolerance(MS_U32 u32Id, MS_U32 u32Arg)
3538 {
3539 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
3540 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
3541
3542 HVD_EX_MSG_TRACE();
3543 _DRV_HVD_Inited(u8DrvId,eRet);
3544 _DRV_HVD_EX_Entry(u8DrvId);
3545
3546 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SYNC_TOLERANCE, u32Arg);
3547
3548 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].Settings.u32SyncTolerance = u32Arg;
3549
3550 _DRV_HVD_EX_RET(u8DrvId, eRet);
3551 }
3552
3553 //-----------------------------------------------------------------------------
3554 /// @brief \b Function \b Name: MDrv_HVD_EX_SetSyncVideoDelay()
3555 /// @brief \b Function \b Description: Set the video delay from STC when sync mode active.
3556 /// @param -u32Arg \b IN : The video delay. unit:ms
3557 /// @return -The result of command set sync video delay
3558 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetSyncVideoDelay(MS_U32 u32Id,MS_U32 u32Arg)3559 HVD_EX_Result MDrv_HVD_EX_SetSyncVideoDelay(MS_U32 u32Id, MS_U32 u32Arg)
3560 {
3561 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
3562 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
3563
3564 HVD_EX_MSG_TRACE();
3565 _DRV_HVD_Inited(u8DrvId,eRet);
3566 _DRV_HVD_EX_Entry(u8DrvId);
3567
3568 if ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK) == HVD_INIT_MAIN_LIVE_STREAM)
3569 {
3570 if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u8TimeUnit)
3571 {
3572 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SYNC_VIDEO_DELAY, (MS_U32) (u32Arg + HVD_DTV_VIDEO_DELAY));
3573 }
3574 else
3575 {
3576 eRet =
3577 (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SYNC_VIDEO_DELAY, u32Arg + ((MS_U32) HVD_DTV_VIDEO_DELAY * 90));
3578 }
3579 }
3580 else
3581 {
3582 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SYNC_VIDEO_DELAY, u32Arg);
3583 }
3584
3585 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].Settings.u32SyncVideoDelay = u32Arg;
3586
3587 _DRV_HVD_EX_RET(u8DrvId, eRet);
3588 }
3589
3590 //-----------------------------------------------------------------------------
3591 /// @brief \b Function \b Name: MDrv_HVD_EX_SetSyncFreeRunTH()
3592 /// @brief \b Function \b Description: Set the tolerance of FW reporting sync reach.
3593 /// @param -u32Arg \b IN : theashold.
3594 /// - 0 : use FW default value
3595 /// - 0xFFFFFFFF : never free run, FW always do sync action.
3596 /// @return -The result of command set sync tolerance
3597 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetSyncFreeRunTH(MS_U32 u32Id,MS_U32 u32Arg)3598 HVD_EX_Result MDrv_HVD_EX_SetSyncFreeRunTH(MS_U32 u32Id, MS_U32 u32Arg)
3599 {
3600 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
3601 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
3602
3603 HVD_EX_MSG_TRACE();
3604 _DRV_HVD_Inited(u8DrvId,eRet);
3605 _DRV_HVD_EX_Entry(u8DrvId);
3606
3607 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_FREERUN_THRESHOLD, u32Arg);
3608
3609 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].Settings.u32SyncFreeRunTH = u32Arg;
3610
3611 _DRV_HVD_EX_RET(u8DrvId, eRet);
3612 }
3613
3614 //-----------------------------------------------------------------------------
3615 /// @brief \b Function \b Name: MDrv_HVD_EX_SetSyncRepeatTH()
3616 /// @brief \b Function \b Description: Set the repeat threashold under sync mode.
3617 /// @param -u32Arg \b IN : repeat times. 0x01 ~ 0xFF
3618 /// 0xff - repeat current frame until STC catch up PTS.
3619 /// @return -The result of command set sync repeat threashold
3620 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetSyncRepeatTH(MS_U32 u32Id,MS_U32 u32Arg)3621 HVD_EX_Result MDrv_HVD_EX_SetSyncRepeatTH(MS_U32 u32Id, MS_U32 u32Arg)
3622 {
3623 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
3624 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
3625
3626 HVD_EX_MSG_TRACE();
3627 _DRV_HVD_Inited(u8DrvId,eRet);
3628 _DRV_HVD_EX_Entry(u8DrvId);
3629
3630 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SYNC_THRESHOLD, u32Arg);
3631
3632 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].Settings.u32SyncRepeatTH = u32Arg;
3633
3634 _DRV_HVD_EX_RET(u8DrvId, eRet);
3635 }
3636
3637 //-----------------------------------------------------------------------------
3638 /// @brief \b Function \b Name: MDrv_HVD_EX_SetErrConceal()
3639 /// @brief \b Function \b Description: Enable/Disable error concealment.
3640 /// @param -bEnable \b IN : Enable/Disable
3641 /// -FALSE(0): Disable error concealment.
3642 /// -TRUE(1): Enable error concealment.
3643 /// @return -The result of command set sync tolerance
3644 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetErrConceal(MS_U32 u32Id,MS_BOOL bEnable)3645 HVD_EX_Result MDrv_HVD_EX_SetErrConceal(MS_U32 u32Id, MS_BOOL bEnable)
3646 {
3647 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
3648 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
3649
3650 HVD_EX_MSG_TRACE();
3651 _DRV_HVD_Inited(u8DrvId,eRet);
3652 _DRV_HVD_EX_Entry(u8DrvId);
3653
3654 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_ERR_CONCEAL, bEnable);
3655
3656 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].Settings.bIsErrConceal = bEnable;
3657
3658 _DRV_HVD_EX_RET(u8DrvId, eRet);
3659 }
3660
3661 //-----------------------------------------------------------------------------
3662 /// @brief \b Function \b Name: MDrv_HVD_EX_SetDbgLevel()
3663 /// @brief \b Function \b Description: Set debug level
3664 /// @param -elevel \b IN : debug level
3665 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetDbgLevel(HVD_EX_UartLevel eLevel)3666 void MDrv_HVD_EX_SetDbgLevel(HVD_EX_UartLevel eLevel)
3667 {
3668 VPU_EX_UartLevel eVpuLevel = E_VPU_EX_UART_LEVEL_NONE;
3669
3670 switch (eLevel)
3671 {
3672 case E_HVD_EX_UART_LEVEL_ERR:
3673 {
3674 u32UartCtrl = E_HVD_UART_CTRL_ERR;
3675 eVpuLevel = E_VPU_EX_UART_LEVEL_ERR;
3676 break;
3677 }
3678 case E_HVD_EX_UART_LEVEL_INFO:
3679 {
3680 u32UartCtrl = E_HVD_UART_CTRL_INFO | E_HVD_UART_CTRL_ERR;
3681 eVpuLevel = E_VPU_EX_UART_LEVEL_INFO;
3682 break;
3683 }
3684 case E_HVD_EX_UART_LEVEL_DBG:
3685 {
3686 u32UartCtrl = E_HVD_UART_CTRL_DBG | E_HVD_UART_CTRL_ERR | E_HVD_UART_CTRL_INFO;
3687 eVpuLevel = E_VPU_EX_UART_LEVEL_DBG;
3688 break;
3689 }
3690 case E_HVD_EX_UART_LEVEL_TRACE:
3691 {
3692 u32UartCtrl = E_HVD_UART_CTRL_TRACE | E_HVD_UART_CTRL_ERR | E_HVD_UART_CTRL_INFO | E_HVD_UART_CTRL_DBG;
3693 eVpuLevel = E_VPU_EX_UART_LEVEL_TRACE;
3694 break;
3695 }
3696 case E_HVD_EX_UART_LEVEL_FW:
3697 {
3698 u32UartCtrl = E_HVD_UART_CTRL_DISABLE;
3699
3700 HAL_HVD_EX_UartSwitch2FW(TRUE);
3701 break;
3702 }
3703 default:
3704 {
3705 u32UartCtrl = E_HVD_UART_CTRL_DISABLE;
3706 eVpuLevel = E_VPU_EX_UART_LEVEL_ERR;
3707 break;
3708 }
3709 }
3710 HAL_VPU_EX_SetDbgLevel(eVpuLevel);
3711 }
3712
3713 //-----------------------------------------------------------------------------
3714 /// @brief \b Function \b Name: MDrv_HVD_EX_SeekToPTS()
3715 /// @brief \b Function \b Description: Let FW decode to the input PTS by using full decoding speed. If FW reaches (equal to or larger than) input PTS, FW will pause automatically. This function can not work under MDrv_HVD_EX_SetSyncActive(TRUE).
3716 /// @param -u32PTS \b IN : specific PTS.
3717 /// -0: disable this mode. FW will go back to previous status (play or pause).
3718 /// -any not zero: enable this mode
3719 /// @return -The result of command seek to specific PTS.
3720 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SeekToPTS(MS_U32 u32Id,MS_U32 u32PTS)3721 HVD_EX_Result MDrv_HVD_EX_SeekToPTS(MS_U32 u32Id, MS_U32 u32PTS)
3722 {
3723 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
3724 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
3725
3726 HVD_EX_MSG_TRACE();
3727 _DRV_HVD_Inited(u8DrvId,eRet);
3728 _DRV_HVD_EX_Entry(u8DrvId);
3729
3730 eRet = _HVD_EX_Check_Cmd(u8DrvId, E_HVD_CHECK_CMD_SEEK2PTS);
3731
3732 if (eRet != E_HVD_EX_OK)
3733 {
3734 _DRV_HVD_EX_RET(u8DrvId, eRet);
3735 }
3736
3737 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_JUMP_TO_PTS, u32PTS);
3738
3739 _DRV_HVD_EX_RET(u8DrvId, eRet);
3740 }
3741
3742 //-----------------------------------------------------------------------------
3743 /// @brief \b Function \b Name: MDrv_HVD_EX_SkipToPTS()
3744 /// @brief \b Function \b Description: Let FW skip to the input PTS by using full decoding speed and start decode again after input PTS.
3745 /// @param -u32PTS \b IN : specific PTS.
3746 /// -0: disable this mode. FW will go back to previous status (play or pause).
3747 /// -any not zero: enable this mode
3748 /// @return -The result of command seek to specific PTS.
3749 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SkipToPTS(MS_U32 u32Id,MS_U32 u32PTS)3750 HVD_EX_Result MDrv_HVD_EX_SkipToPTS(MS_U32 u32Id, MS_U32 u32PTS)
3751 {
3752 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
3753 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
3754
3755 HVD_EX_MSG_TRACE();
3756 _DRV_HVD_Inited(u8DrvId,eRet);
3757 _DRV_HVD_EX_Entry(u8DrvId);
3758
3759 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SKIP_TO_PTS, u32PTS);
3760
3761 _DRV_HVD_EX_RET(u8DrvId, eRet);
3762 }
3763
3764 //-----------------------------------------------------------------------------
3765 /// @brief \b Function \b Name: MDrv_HVD_EX_SetFreezeImg()
3766 /// @brief \b Function \b Description: Let FW stop updating frames when vsync, but decoding process is still going.
3767 /// @param -bEnable \b IN : Enable/Disable
3768 /// -FALSE(0): Disable freeze image.
3769 /// -TRUE(1): Enable freeze image.
3770 /// @return -The result of command freeze image.
3771 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetFreezeImg(MS_U32 u32Id,MS_BOOL bEnable)3772 HVD_EX_Result MDrv_HVD_EX_SetFreezeImg(MS_U32 u32Id, MS_BOOL bEnable)
3773 {
3774 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
3775 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
3776
3777 HVD_EX_MSG_TRACE();
3778 _DRV_HVD_Inited(u8DrvId,eRet);
3779 _DRV_HVD_EX_Entry(u8DrvId);
3780
3781 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_FREEZE_IMG, bEnable);
3782
3783 _DRV_HVD_EX_RET(u8DrvId, eRet);
3784 }
3785
3786 //-----------------------------------------------------------------------------
3787 /// @brief \b Function \b Name: MDrv_HVD_EX_SetBlueScreen()
3788 /// @brief \b Function \b Description: Let FW stop updating frames when vsync and keep blue screen , but decoding process is still going.
3789 /// @param -bEnable \b IN : Enable/Disable
3790 /// -FALSE(0): Disable blue screen.
3791 /// -TRUE(1): Enable blue screen.
3792 /// @return -The result of command set blue screen.
3793 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetBlueScreen(MS_U32 u32Id,MS_BOOL bEnable)3794 HVD_EX_Result MDrv_HVD_EX_SetBlueScreen(MS_U32 u32Id, MS_BOOL bEnable)
3795 {
3796 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
3797 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
3798
3799 HVD_EX_MSG_TRACE();
3800 _DRV_HVD_Inited(u8DrvId,eRet);
3801 _DRV_HVD_EX_Entry(u8DrvId);
3802
3803 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_BLUE_SCREEN, bEnable);
3804
3805 _DRV_HVD_EX_RET(u8DrvId, eRet);
3806 }
3807
3808 //-----------------------------------------------------------------------------
3809 /// @brief \b Function \b Name: MDrv_HVD_EX_SetDispOneField()
3810 /// @brief \b Function \b Description: Let FW only show one field(top field only).
3811 /// @param -bEnable \b IN : Enable/Disable
3812 /// -FALSE(0): Disable display one field.
3813 /// -TRUE(1): Enable display one field.
3814 /// @return -The result of command display one field.
3815 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetDispOneField(MS_U32 u32Id,MS_BOOL bEnable)3816 HVD_EX_Result MDrv_HVD_EX_SetDispOneField(MS_U32 u32Id, MS_BOOL bEnable)
3817 {
3818 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
3819 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
3820
3821 HVD_EX_MSG_TRACE();
3822 _DRV_HVD_Inited(u8DrvId,eRet);
3823 _DRV_HVD_EX_Entry(u8DrvId);
3824
3825 if (bEnable)
3826 {
3827 // force to show top field only.
3828 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DISP_ONE_FIELD, E_HVD_FIELD_CTRL_TOP);
3829 }
3830 else
3831 {
3832 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DISP_ONE_FIELD, E_HVD_FIELD_CTRL_OFF);
3833 }
3834
3835 _DRV_HVD_EX_RET(u8DrvId, eRet);
3836 }
3837
3838 //-----------------------------------------------------------------------------
3839 /// @brief \b Function \b Name: MDrv_HVD_EX_SetISREvent()
3840 /// @brief \b Function \b Description: Set the ISR event type sended by HVD fw.
3841 /// @param -u32Event \b IN : event types
3842 /// @param -fnISRHandler \b IN : function pointer to a interrupt handler.
3843 /// @return -The result of command set ISR event.
3844 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetISREvent(MS_U32 u32Id,MS_U32 u32Event,HVD_InterruptCb fnISRHandler)3845 HVD_EX_Result MDrv_HVD_EX_SetISREvent(MS_U32 u32Id, MS_U32 u32Event, HVD_InterruptCb fnISRHandler)
3846 {
3847 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
3848 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
3849 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
3850
3851 HVD_EX_MSG_TRACE();
3852 _DRV_HVD_Inited(u8DrvId,eRet);
3853 _DRV_HVD_EX_Entry(u8DrvId);
3854
3855 if (u32Event == E_HVD_EX_ISR_NONE)
3856 {
3857 pCtrl->Settings.bEnISR = FALSE;
3858 ////OSAL_HVD_ISR_Disable();
3859 // Fix the ISR imbalance of Enable and Disable
3860 if(pCtrl->HVDISRCtrl.bIsHvdIsr == TRUE) // hvd case
3861 {
3862 if((pHVDDrvContext->bHVDDisableISRFlag != TRUE) && (FALSE == pHVDDrvContext->gHVDCtrl_EX[1-u8DrvId].bUsed))
3863 {
3864 #if defined(CHIP_EINSTEIN) || defined(CHIP_EINSTEIN3) || defined(CHIP_NAPOLI) || defined(CHIP_MONACO) || defined(CHIP_MADISON) || defined(CHIP_MIAMI) || defined(CHIP_KERES) || defined(CHIP_KIRIN) || defined(CHIP_MUJI) || defined(CHIP_MUNICH) || defined(CHIP_CLIPPERS) || defined(CHIP_MONET)
3865 HAL_HVD_EX_EnableISR(u32Id, FALSE);
3866 #else
3867 HAL_HVD_EX_EnableISR(FALSE);
3868 #endif
3869 pHVDDrvContext->bHVDDisableISRFlag = OSAL_HVD_ISR_Disable(TRUE);
3870 if(pHVDDrvContext->bHVDDisableISRFlag == FALSE)
3871 {
3872 HVD_EX_MSG_ERR("%s Disable Interrupt Fail\n", __FUNCTION__);
3873 }
3874 //OSAL_HVD_ISR_Detach();
3875 #if !defined(SUPPORT_X_MODEL_HVD_FEATURE) && !defined(DISABLE_ISR_DETACH)
3876 if(TRUE == pHVDDrvContext->bHVDIsIsrAttached)
3877 {
3878 OSAL_HVD_ISR_Detach(pCtrl->HVDISRCtrl.bIsHvdIsr);
3879 pHVDDrvContext->bHVDIsIsrAttached = FALSE;
3880 }
3881 #endif
3882 }
3883 }
3884 else // evd case
3885 {
3886 if((pHVDDrvContext->bEVDDisableISRFlag != TRUE) && (FALSE == pHVDDrvContext->gHVDCtrl_EX[1-u8DrvId].bUsed))
3887 {
3888 #if defined(CHIP_EINSTEIN) || defined(CHIP_EINSTEIN3) || defined(CHIP_NAPOLI) || defined(CHIP_MONACO) || defined(CHIP_MADISON) || defined(CHIP_MIAMI) || defined(CHIP_KERES) || defined(CHIP_KIRIN) || defined(CHIP_MUJI) || defined(CHIP_MUNICH) || defined(CHIP_CLIPPERS) || defined(CHIP_MONET)
3889 HAL_HVD_EX_EnableISR(u32Id, FALSE);
3890 #else
3891 HAL_HVD_EX_EnableISR(FALSE);
3892 #endif
3893 pHVDDrvContext->bEVDDisableISRFlag = OSAL_HVD_ISR_Disable(FALSE);
3894 if(pHVDDrvContext->bEVDDisableISRFlag == FALSE)
3895 {
3896 HVD_EX_MSG_ERR("%s Disable Interrupt Fail\n", __FUNCTION__);
3897 }
3898 //OSAL_HVD_ISR_Detach();
3899 #if !defined(SUPPORT_X_MODEL_HVD_FEATURE) && !defined(DISABLE_ISR_DETACH)
3900 if(TRUE == pHVDDrvContext->bEVDIsIsrAttached)
3901 {
3902 OSAL_HVD_ISR_Detach(pCtrl->HVDISRCtrl.bIsHvdIsr);
3903 pHVDDrvContext->bEVDIsIsrAttached = FALSE;
3904 }
3905 #endif
3906 }
3907 }
3908 pCtrl->HVDISRCtrl.bRegISR = FALSE;
3909 pCtrl->HVDISRCtrl.pfnISRCallBack = NULL;
3910 pCtrl->Settings.u32IsrEvent = (MS_U32) E_HVD_EX_ISR_NONE;
3911 eRet = E_HVD_EX_OK;
3912 }
3913 else
3914 {
3915 if (fnISRHandler != NULL)
3916 {
3917 #if 1 //If ISR handler has been registerred, we only need to reset event flag.
3918 if (pCtrl->HVDISRCtrl.bRegISR)
3919 {
3920 pCtrl->HVDISRCtrl.pfnISRCallBack = (HVD_ISRCallBack) fnISRHandler;
3921 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_ISR_TYPE, u32Event);
3922
3923 if (eRet != E_HVD_EX_OK)
3924 {
3925 _DRV_HVD_EX_RET(u8DrvId, eRet);
3926 }
3927
3928 pCtrl->Settings.u32IsrEvent = u32Event;
3929 eRet = E_HVD_EX_OK;
3930 }
3931 else
3932 {
3933 pCtrl->HVDISRCtrl.pfnISRCallBack = (HVD_ISRCallBack) fnISRHandler;
3934 //OSAL_HVD_ISR_Attach((void *) _HVD_EX_ISRHandler);
3935 //OSAL_HVD_ISR_Enable();
3936 if (TRUE == pCtrl->HVDISRCtrl.bIsHvdIsr)
3937 {
3938 if (FALSE == pHVDDrvContext->bHVDIsIsrAttached)
3939 {
3940 if (OSAL_HVD_ISR_Attach(pCtrl->HVDISRCtrl.bIsHvdIsr, (void*)_HVD_EX_ISRHandler) != TRUE)
3941 {
3942 HVD_EX_MSG_ERR("fail to attach HVD_IsrProc!\n");
3943 return E_HVD_EX_FAIL;
3944 }
3945 HVD_PRINT("attach ISR number:%d\n", HVD_ISR_VECTOR);
3946 pHVDDrvContext->bHVDIsIsrAttached = TRUE;
3947 }
3948 }
3949 #if SUPPORT_EVD
3950 else //evd
3951 {
3952 if (FALSE == pHVDDrvContext->bEVDIsIsrAttached)
3953 {
3954 if (OSAL_HVD_ISR_Attach(pCtrl->HVDISRCtrl.bIsHvdIsr, (void*)_HVD_EX_ISRHandler) != TRUE)
3955 {
3956 HVD_EX_MSG_ERR("fail to attach HVD_IsrProc!\n");
3957 return E_HVD_EX_FAIL;
3958 }
3959 #if SUPPORT_G2VP9
3960 if (pCtrl->HVDISRCtrl.bIsG2Vp9Isr)
3961 {
3962 HVD_PRINT("attach ISR number:%d\n", -1/*VP9_ISR_VECTOR*/);
3963 }
3964 else
3965 #endif
3966 {
3967 HVD_PRINT("attach ISR number:%d\n", EVD_ISR_VECTOR);
3968 }
3969 pHVDDrvContext->bEVDIsIsrAttached = TRUE;
3970 }
3971 }
3972 #endif
3973
3974 if (OSAL_HVD_ISR_Enable(pCtrl->HVDISRCtrl.bIsHvdIsr) != TRUE)
3975 {
3976 HVD_EX_MSG_ERR("fail to OSAL_HVD_IntEnable!\n");
3977 return E_HVD_EX_FAIL;
3978 }
3979
3980 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_ISR_TYPE, u32Event);
3981
3982 if (eRet != E_HVD_EX_OK)
3983 {
3984 _DRV_HVD_EX_RET(u8DrvId, eRet);
3985 }
3986
3987 pCtrl->Settings.u32IsrEvent = u32Event;
3988 pCtrl->Settings.bEnISR = TRUE;
3989 #if defined(CHIP_EINSTEIN) || defined(CHIP_EINSTEIN3) || defined(CHIP_NAPOLI) || defined(CHIP_MONACO) || defined(CHIP_MADISON) || defined(CHIP_MIAMI) || defined(CHIP_KERES) || defined(CHIP_KIRIN) || defined(CHIP_MUJI) || defined(CHIP_MUNICH) || defined(CHIP_CLIPPERS) || defined(CHIP_MONET)
3990 HAL_HVD_EX_EnableISR(u32Id, TRUE);
3991 #else
3992 HAL_HVD_EX_EnableISR(TRUE);
3993 #endif
3994 pCtrl->HVDISRCtrl.bRegISR = TRUE;
3995 eRet = E_HVD_EX_OK;
3996 }
3997 #else
3998
3999 HAL_HVD_EX_EnableISR(FALSE);
4000
4001 if (pCtrl->HVDISRCtrl.bRegISR)
4002 {
4003 OSAL_HVD_ISR_Detach();
4004 pCtrl->HVDISRCtrl.bRegISR = FALSE;
4005 }
4006
4007 pCtrl->HVDISRCtrl.pfnISRCallBack = (HVD_ISRCallBack) fnISRHandler;
4008 OSAL_HVD_ISR_Attach((void *) _HVD_EX_ISRHandler);
4009 OSAL_HVD_ISR_Enable();
4010
4011 HVD_EX_MSG_INF("attach ISR number:%d\n", HVD_ISR_VECTOR);
4012 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_ISR_TYPE, u32Event);
4013 pCtrl->Settings.u32IsrEvent = u32Event;
4014
4015 if (eRet != E_HVD_EX_OK)
4016 {
4017 _DRV_HVD_EX_RET(u8DrvId, eRet);
4018 }
4019
4020 HAL_HVD_EX_EnableISR(TRUE);
4021 pCtrl->HVDISRCtrl.bRegISR = TRUE;
4022 eRet = E_HVD_EX_OK;
4023 #endif
4024 }
4025 else
4026 {
4027 HVD_EX_MSG_ERR("SetISREvent with NULL pointer. ISR type:%lu\n", u32Event);
4028 eRet = E_HVD_EX_RET_INVALID_PARAMETER;
4029 }
4030 }
4031
4032 _DRV_HVD_EX_RET(u8DrvId, eRet);
4033 }
4034
4035 //-----------------------------------------------------------------------------
4036 /// @brief \b Function \b Name: MDrv_HVD_EX_SetEnableISR()
4037 /// @brief \b Function \b Description: Enable/Disable HVD interrupt.
4038 /// @param -bEnable \b IN : Enable/Disable
4039 /// -FALSE(0): Disable interrupt.
4040 /// -TRUE(1): Enable interrupt.
4041 /// @return -The result of command set enable ISR.
4042 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetEnableISR(MS_U32 u32Id,MS_BOOL bEnable)4043 MS_BOOL MDrv_HVD_EX_SetEnableISR(MS_U32 u32Id, MS_BOOL bEnable)
4044 {
4045 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4046
4047 HVD_EX_MSG_TRACE();
4048 _DRV_HVD_Inited(u8DrvId,FALSE);
4049
4050 #if defined(CHIP_EINSTEIN) || defined(CHIP_EINSTEIN3) || defined(CHIP_NAPOLI) || defined(CHIP_MONACO) || defined(CHIP_MADISON) || defined(CHIP_MIAMI) || defined(CHIP_KERES) || defined(CHIP_KIRIN) || defined(CHIP_MUJI) || defined(CHIP_MUNICH) || defined(CHIP_CLIPPERS) || defined(CHIP_MONET)
4051 HAL_HVD_EX_EnableISR(u32Id, bEnable);
4052 #else
4053 HAL_HVD_EX_EnableISR(bEnable);
4054 #endif
4055 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].Settings.bEnISR = bEnable;
4056
4057 return TRUE;
4058 }
4059
4060 //-----------------------------------------------------------------------------
4061 /// @brief \b Function \b Name: MDrv_HVD_EX_SetForceISR()
4062 /// @brief \b Function \b Description: test the HVD interrupt function. Force FW send one interrupt.
4063 /// @param -bEnable \b IN : Enable/Disable
4064 /// -FALSE(0): Clear force interrupt status from HK.
4065 /// -TRUE(1): force one interrupt from HK.
4066 /// @return -The result of command set force ISR.
4067 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetForceISR(MS_U32 u32Id,MS_BOOL bEnable)4068 MS_BOOL MDrv_HVD_EX_SetForceISR(MS_U32 u32Id, MS_BOOL bEnable)
4069 {
4070 HVD_EX_MSG_TRACE();
4071 //_DRV_HVD_Inited(FALSE);
4072 #if defined(CHIP_EINSTEIN) || defined(CHIP_EINSTEIN3) || defined(CHIP_NAPOLI) || defined(CHIP_MONACO) || defined(CHIP_MADISON) || defined(CHIP_MIAMI) || defined(CHIP_KERES) || defined(CHIP_KIRIN) || defined(CHIP_MUJI) || defined(CHIP_MUNICH) || defined(CHIP_CLIPPERS) || defined(CHIP_MONET)
4073 HAL_HVD_EX_SetForceISR(u32Id, bEnable);
4074 #else
4075 UNUSED(u32Id);
4076 HAL_HVD_EX_SetForceISR(bEnable);
4077 #endif
4078 return TRUE;
4079 }
4080
4081 //-----------------------------------------------------------------------------
4082 /// @brief \b Function \b Name: MDrv_HVD_EX_SetMVOPDone()
4083 /// @brief \b Function \b Description: tell FW MVOP is ready for futher decode.
4084 /// @return -The result of command.
4085 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetMVOPDone(MS_U32 u32Id)4086 MS_BOOL MDrv_HVD_EX_SetMVOPDone(MS_U32 u32Id)
4087 {
4088 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
4089 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4090 HVD_EX_MSG_TRACE();
4091 _DRV_HVD_Inited(u8DrvId,FALSE);
4092
4093 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_BLUE_SCREEN, FALSE);
4094
4095 if (E_HVD_EX_OK == eRet)
4096 {
4097 return TRUE;
4098 }
4099 else
4100 {
4101 return FALSE;
4102 }
4103 }
4104
4105 //-----------------------------------------------------------------------------
4106 /// @brief \b Function \b Name: MDrv_HVD_EX_SetVirtualBox()
4107 /// @brief \b Function \b Description: Set DS width and Height to F/W
4108 /// @param -u16Width \b IN : frame width
4109 /// @param -u16Height \b IN : frame height
4110 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetVirtualBox(MS_U32 u32Id,MS_U16 u16Width,MS_U16 u16Height)4111 HVD_EX_Result MDrv_HVD_EX_SetVirtualBox(MS_U32 u32Id, MS_U16 u16Width, MS_U16 u16Height)
4112 {
4113 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
4114 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4115
4116 HVD_EX_MSG_TRACE();
4117 _DRV_HVD_Inited(u8DrvId,eRet);
4118 _DRV_HVD_EX_Entry(u8DrvId);
4119
4120 HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_VIRTUAL_BOX_WIDTH, u16Width);
4121 HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_VIRTUAL_BOX_HEIGHT, u16Height);
4122
4123 eRet = E_HVD_EX_OK;
4124 _DRV_HVD_EX_RET(u8DrvId, eRet);
4125 }
4126
4127 //-----------------------------------------------------------------------------
4128 /// @brief \b Function \b Name: MDrv_HVD_EX_SetDynScalingParam()
4129 /// @brief \b Function \b Description: Pass scalar parameters to decoder
4130 /// @return -The result of command.
4131 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetDynScalingParam(MS_U32 u32Id,void * pStAddr,MS_U32 u32Size)4132 HVD_EX_Result MDrv_HVD_EX_SetDynScalingParam(MS_U32 u32Id, void *pStAddr, MS_U32 u32Size)
4133 {
4134 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
4135 MS_U32 addr = 0;
4136 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4137
4138 HVD_EX_MSG_TRACE();
4139 _DRV_HVD_Inited(u8DrvId,eRet);
4140 _DRV_HVD_EX_Entry(u8DrvId);
4141
4142 if ((pStAddr == NULL) || (u32Size == 0))
4143 {
4144 eRet = E_HVD_EX_RET_INVALID_PARAMETER;
4145 _DRV_HVD_Inited(u8DrvId,eRet);
4146 }
4147 else
4148 {
4149 // 1. copy data input data array
4150 addr = MDrv_HVD_EX_GetDynamicScalingInfo(u32Id, E_HVD_EX_DS_INFO_ADDR);
4151
4152 if(addr == 0x0)
4153 {
4154 eRet = E_HVD_EX_FAIL;
4155 _DRV_HVD_EX_RET(u8DrvId, eRet);
4156 }
4157
4158 HVD_memcpy(MS_PA2KSEG1(addr), pStAddr, u32Size);
4159
4160 // 2. while till FW finish it.
4161 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SCALER_INFO_NOTIFY, ((MS_U8 *)pStAddr)[0]);
4162 }
4163
4164 _DRV_HVD_EX_RET(u8DrvId, eRet);
4165 }
4166
4167 //-----------------------------------------------------------------------------
4168 /// @brief \b Function \b Name: MDrv_HVD_EX_SetDispInfoTH()
4169 /// @brief \b Function \b Description: Set the upper and lower limitation of a valid SPS.
4170 /// @param -DispInfoTH \b IN : tolerance.
4171 /// @return -The result of command set display inforation threshold
4172 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetDispInfoTH(MS_U32 u32Id,HVD_EX_DispInfoThreshold * DispInfoTH)4173 HVD_EX_Result MDrv_HVD_EX_SetDispInfoTH(MS_U32 u32Id, HVD_EX_DispInfoThreshold *DispInfoTH)
4174 {
4175 HVD_Disp_Info_TH DispInfoTHTmp;
4176 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
4177 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4178
4179 HVD_EX_MSG_TRACE();
4180 _DRV_HVD_Inited(u8DrvId,eRet);
4181 _DRV_HVD_EX_Entry(u8DrvId);
4182
4183 if (DispInfoTH == NULL)
4184 {
4185 _DRV_HVD_EX_RET(u8DrvId, eRet);
4186 }
4187
4188 DispInfoTHTmp.u32FrmrateLowBound = DispInfoTH->u32FrmrateLowBound;
4189 DispInfoTHTmp.u32FrmrateUpBound = DispInfoTH->u32FrmrateUpBound;
4190 DispInfoTHTmp.u32MvopLowBound = DispInfoTH->u32MvopLowBound;
4191 DispInfoTHTmp.u32MvopUpBound = DispInfoTH->u32MvopUpBound;
4192
4193 HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_DISP_INFO_TH, (MS_U32) (&DispInfoTHTmp));
4194
4195 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_UPDATE_DISP_THRESHOLD, 0);
4196
4197 HVD_memcpy((void *) &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId].Settings.DispInfoTH), (void *) (DispInfoTH), sizeof(HVD_EX_DispInfoThreshold));
4198
4199 _DRV_HVD_EX_RET(u8DrvId, eRet);
4200 }
4201
4202 //-----------------------------------------------------------------------------
4203 /// @brief \b Function \b Name: MDrv_HVD_EX_SetIgnoreErrRef()
4204 /// @brief \b Function \b Description: Turn on / off ignore error reference.
4205 /// @param -b bFastDisplay \b IN : Enable/ Disable
4206 /// -FALSE(0): handle error reference
4207 /// -TRUE(1): ignore error reference
4208 /// @return -The result of command set ignore error reference
4209 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetIgnoreErrRef(MS_U32 u32Id,MS_BOOL bIgnore)4210 HVD_EX_Result MDrv_HVD_EX_SetIgnoreErrRef(MS_U32 u32Id, MS_BOOL bIgnore)
4211 {
4212 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
4213 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4214
4215 HVD_EX_MSG_TRACE();
4216 _DRV_HVD_Inited(u8DrvId,eRet);
4217 _DRV_HVD_EX_Entry(u8DrvId);
4218
4219 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_IGNORE_ERR_REF, bIgnore);
4220
4221 _DRV_HVD_EX_RET(u8DrvId, eRet);
4222 }
4223
4224 //-----------------------------------------------------------------------------
4225 /// @brief \b Function \b Name: MDrv_HVD_EX_ForceFollowDTVSpec()
4226 /// @brief \b Function \b Description: Turn on / off Force follow DTV Spec
4227 /// @param -b bEnable \b IN : Enable/ Disable
4228 /// -FALSE(0): Disable
4229 /// -TRUE(1): Enable
4230 /// @return -The result of command set force follow DTV spec
4231 //-----------------------------------------------------------------------------
MDrv_HVD_EX_ForceFollowDTVSpec(MS_U32 u32Id,MS_BOOL bEnable)4232 HVD_EX_Result MDrv_HVD_EX_ForceFollowDTVSpec(MS_U32 u32Id, MS_BOOL bEnable)
4233 {
4234 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
4235 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4236
4237 HVD_EX_MSG_TRACE();
4238 _DRV_HVD_Inited(u8DrvId,eRet);
4239 _DRV_HVD_EX_Entry(u8DrvId);
4240
4241 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_FORCE_DTV_SPEC, bEnable);
4242
4243 _DRV_HVD_EX_RET(u8DrvId, eRet);
4244 }
4245
4246 //-----------------------------------------------------------------------------
4247 /// @brief \b Function \b Name: MDrv_HVD_EX_SetFastDisplay()
4248 /// @brief \b Function \b Description: Turn on / off fast display.
4249 /// @param -b bFastDisplay \b IN : Enable/ Disable
4250 /// -FALSE(0): normal display
4251 /// -TRUE(1): fast display
4252 /// @return -The result of command set fast display
4253 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetFastDisplay(MS_U32 u32Id,MS_BOOL bFastDisplay)4254 HVD_EX_Result MDrv_HVD_EX_SetFastDisplay(MS_U32 u32Id, MS_BOOL bFastDisplay)
4255 {
4256 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
4257 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4258
4259 HVD_EX_MSG_TRACE();
4260 _DRV_HVD_Inited(u8DrvId,eRet);
4261 _DRV_HVD_EX_Entry(u8DrvId);
4262
4263 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_FAST_DISP, bFastDisplay);
4264
4265 _DRV_HVD_EX_RET(u8DrvId, eRet);
4266 }
4267
4268 //-----------------------------------------------------------------------------
4269 /// @brief \b Function \b Name: MDrv_HVD_EX_DispOutsideMode()
4270 /// @brief \b Function \b Description: Turn on / off Disp control method which handle by app side
4271 /// @param -b bEnable \b IN : Enable/ Disable
4272 /// -FALSE(0): Disable
4273 /// -TRUE(1): Enable
4274 /// @return -
4275 //-----------------------------------------------------------------------------
MDrv_HVD_EX_DispOutsideMode(MS_U32 u32Id,MS_BOOL bEnable)4276 HVD_EX_Result MDrv_HVD_EX_DispOutsideMode(MS_U32 u32Id, MS_BOOL bEnable)
4277 {
4278 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
4279 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4280
4281 HVD_EX_MSG_TRACE();
4282 _DRV_HVD_Inited(u8DrvId,eRet);
4283 _DRV_HVD_EX_Entry(u8DrvId);
4284 _DRV_HVD_SetCtrl(u8DrvId, HVD_CTRL_DISP_OUTSIDE);
4285 //change to open max setting ,wait f/w release new fwHVD_if
4286 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_ENABLE_DISP_OUTSIDE, bEnable);
4287
4288 _DRV_HVD_EX_RET(u8DrvId, eRet);
4289 }
4290 // check status
4291
4292 //-----------------------------------------------------------------------------
4293 /// @brief \b Function \b Name: MDrv_HVD_EX_IsISROccured()
4294 /// @brief \b Function \b Description: Check if the ISR is occured or not.
4295 /// @return - Is occured or not
4296 /// @retval -FALSE(0): interrupt is not occured.
4297 /// @retval -TRUE(1): interrupt has been occured.
4298 //-----------------------------------------------------------------------------
MDrv_HVD_EX_IsISROccured(MS_U32 u32Id)4299 MS_BOOL MDrv_HVD_EX_IsISROccured(MS_U32 u32Id)
4300 {
4301 HVD_EX_MSG_TRACE();
4302 //_DRV_HVD_Inited(FALSE);
4303 #if defined(CHIP_EINSTEIN) || defined(CHIP_EINSTEIN3) || defined(CHIP_NAPOLI) || defined(CHIP_MONACO) || defined(CHIP_MADISON) || defined(CHIP_MIAMI) || defined(CHIP_KERES) || defined(CHIP_KIRIN) || defined(CHIP_MUJI) || defined(CHIP_MUNICH) || defined(CHIP_CLIPPERS) || defined(CHIP_MONET)
4304 return HAL_HVD_EX_IsISROccured(u32Id);
4305 #else
4306 UNUSED(u32Id);
4307 return HAL_HVD_EX_IsISROccured();
4308 #endif
4309 }
4310
4311 //-----------------------------------------------------------------------------
4312 /// @brief \b Function \b Name: MDrv_HVD_EX_IsDispFinish()
4313 /// @brief \b Function \b Description: Check this file mode display is finish or not. only work after MDrv_HVD_EX_SetDataEnd(TRUE)
4314 /// @return - Is finish or not
4315 /// @retval -FALSE(0): Not finish or Not in file mode playback
4316 /// @retval -TRUE(1): Display Finished.
4317 //-----------------------------------------------------------------------------
MDrv_HVD_EX_IsDispFinish(MS_U32 u32Id)4318 MS_BOOL MDrv_HVD_EX_IsDispFinish(MS_U32 u32Id)
4319 {
4320 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4321 HVD_EX_MSG_TRACE();
4322 _DRV_HVD_Inited(u8DrvId,FALSE);
4323
4324 if ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK) == HVD_INIT_MAIN_LIVE_STREAM)
4325 {
4326 return FALSE;
4327 }
4328
4329 if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32CtrlMode & HVD_CTRL_DATA_END)
4330 {
4331 if ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_HW_MASK) == HVD_INIT_HW_VP8)
4332 {
4333 if (_HVD_EX_IsAllBufferEmpty_VP8(u32Id))
4334 {
4335 return TRUE;
4336 }
4337 else
4338 {
4339 return FALSE;
4340 }
4341 }
4342 else
4343 {
4344 if (_HVD_EX_IsAllBufferEmpty(u32Id))
4345 {
4346 return TRUE;
4347 }
4348 else
4349 {
4350 //_DRV_HVD_PushDummy();
4351 return FALSE;
4352 }
4353 }
4354 }
4355 else
4356 {
4357 return FALSE;
4358 }
4359 }
4360
4361 //-----------------------------------------------------------------------------
4362 /// @brief \b Function \b Name: MDrv_HVD_EX_IsFrameShowed()
4363 /// @brief \b Function \b Description: Is HVD Frame showed after TriggerDisp(TRUE) or first frame showed
4364 /// @return - Is frame showed or not
4365 /// @retval -FALSE(0): New Framed showed
4366 /// @retval -TRUE(1): Not showed
4367 //-----------------------------------------------------------------------------
MDrv_HVD_EX_IsFrameShowed(MS_U32 u32Id)4368 MS_BOOL MDrv_HVD_EX_IsFrameShowed(MS_U32 u32Id)
4369 {
4370 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4371
4372 HVD_EX_MSG_TRACE();
4373 _DRV_HVD_Inited(u8DrvId,FALSE);
4374
4375 if (!HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_IS_1ST_FRM_RDY))
4376 {
4377 // 1st frame not ready or AV sync not ready
4378 return FALSE;
4379 }
4380 else
4381 {
4382 // 1st frame showed or AV sync ready
4383 if (_DRV_HVD_Ctrl(u8DrvId, HVD_CTRL_DISPLAY_CTRL))
4384 {
4385 // control display
4386 return (MS_BOOL) HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_IS_FRAME_SHOWED);
4387 }
4388 else
4389 {
4390 // cotrol decode
4391 return TRUE;
4392 }
4393 }
4394 }
4395
4396 //-----------------------------------------------------------------------------
4397 /// @brief \b Function \b Name: MDrv_HVD_EX_IsStepDecodeDone()
4398 /// @brief \b Function \b Description: Is HVD step decode done after step decode command.
4399 /// @return - TRUE/FALSE
4400 /// @retval -FALSE(0): decoding, or user did not send corresponding step decode command.
4401 /// @retval -TRUE(1): decode done
4402 //-----------------------------------------------------------------------------
MDrv_HVD_EX_IsStepDecodeDone(MS_U32 u32Id)4403 MS_BOOL MDrv_HVD_EX_IsStepDecodeDone(MS_U32 u32Id)
4404 {
4405 MS_BOOL bRet = FALSE;
4406 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4407
4408 HVD_EX_MSG_TRACE();
4409 _DRV_HVD_Inited(u8DrvId,FALSE);
4410
4411 if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].bStepDecoding)
4412 {
4413 if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32StepDecodeCnt !=
4414 HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DECODE_CNT))
4415 {
4416 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32StepDecodeCnt = 0;
4417 bRet = TRUE;
4418 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].bStepDecoding = FALSE;
4419 }
4420 }
4421
4422 return bRet;
4423 }
4424
4425 //-----------------------------------------------------------------------------
4426 /// @brief \b Function \b Name: MDrv_HVD_EX_CheckDispInfoRdy()
4427 /// @brief \b Function \b Description: check display info ready and correct or not
4428 /// @return -The result of command check display infor ready or not
4429 //-----------------------------------------------------------------------------
MDrv_HVD_EX_CheckDispInfoRdy(MS_U32 u32Id)4430 HVD_EX_Result MDrv_HVD_EX_CheckDispInfoRdy(MS_U32 u32Id)
4431 {
4432 MS_U32 u32ErrCode = 0;
4433 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
4434 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4435
4436 HVD_EX_MSG_TRACE();
4437 _DRV_HVD_Inited(u8DrvId,eRet);
4438
4439 if (!(pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32CtrlMode & HVD_CTRL_DISP_INFO_RDY))
4440 {
4441 if (!HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_IS_DISP_INFO_CHANGE))
4442 {
4443 return E_HVD_EX_RET_NOTREADY;
4444 }
4445 else
4446 {
4447 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].bIsDispInfoChg = TRUE;
4448 _DRV_HVD_SetCtrl(u8DrvId, HVD_CTRL_DISP_INFO_RDY);
4449 }
4450 }
4451
4452 // check if FW report error
4453 u32ErrCode = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_ERROR_CODE);
4454
4455 if (u32ErrCode != 0)
4456 {
4457 if (u32ErrCode == E_HVD_ERR_OUT_OF_MEMORY)
4458 {
4459 HVD_EX_MSG_ERR
4460 ("FW error that Out of Memory:%lx. Allocated frame buffer size is smaller than required.\n",
4461 u32ErrCode);
4462 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].bIsDispInfoChg = FALSE;
4463 return E_HVD_EX_RET_OUTOF_MEMORY;
4464 }
4465 }
4466
4467 return E_HVD_EX_OK;
4468 }
4469
4470 //-----------------------------------------------------------------------------
4471 /// @brief \b Function \b Name: MDrv_HVD_EX_IsDispInfoChg()
4472 /// @brief \b Function \b Description: check display info is changed or not
4473 /// @return - TRUE / FALSE
4474 /// @retval -FALSE(0): not changed
4475 /// @retval -TRUE(1): changed
4476 //-----------------------------------------------------------------------------
MDrv_HVD_EX_IsDispInfoChg(MS_U32 u32Id)4477 MS_BOOL MDrv_HVD_EX_IsDispInfoChg(MS_U32 u32Id)
4478 {
4479 MS_BOOL bRet = FALSE;
4480 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4481
4482 HVD_EX_MSG_TRACE();
4483 _DRV_HVD_Inited(u8DrvId,FALSE);
4484
4485 bRet = (MS_BOOL) HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_IS_DISP_INFO_CHANGE);
4486
4487 if (bRet)
4488 {
4489 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].bIsDispInfoChg = TRUE;
4490 _DRV_HVD_SetCtrl(u8DrvId, HVD_CTRL_DISP_INFO_RDY);
4491 }
4492 #if 0 // debug use
4493 {
4494 static MS_U32 u32DecodeCnt = 0;
4495 static MS_U32 u32IdleCnt = 0;
4496 MS_U32 tmp = 0;
4497 tmp = MDrv_HVD_EX_GetDecodeCnt(u32Id);
4498
4499 if (u32DecodeCnt != tmp)
4500 {
4501 HVD_PRINT("%lu decode cnt:%lx PTS:%lx\n", (MS_U32) bRet, tmp, MDrv_HVD_EX_GetPTS(u32Id));
4502 u32DecodeCnt = tmp;
4503 }
4504 else
4505 {
4506 u32IdleCnt++;
4507 }
4508 if (u32IdleCnt > 1000)
4509 {
4510 HVD_PRINT("HVD: seems IDLE: %lu decode cnt:%lx PTS:%lx\n", (MS_U32) bRet, tmp, MDrv_HVD_EX_GetPTS(u32Id));
4511 u32IdleCnt = 0;
4512 }
4513 }
4514 #endif
4515 return bRet;
4516 }
4517
4518 //-----------------------------------------------------------------------------
4519 /// @brief \b Function \b Name: MDrv_HVD_EX_IsIdle()
4520 /// @brief \b Function \b Description: check decoder is idle or not
4521 /// @return - TRUE / FALSE
4522 /// @retval -FALSE(0): decoder is not idle
4523 /// @retval -TRUE(1): decoder is idle
4524 //-----------------------------------------------------------------------------
MDrv_HVD_EX_IsIdle(MS_U32 u32Id)4525 MS_BOOL MDrv_HVD_EX_IsIdle(MS_U32 u32Id)
4526 {
4527 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4528 HVD_EX_MSG_TRACE();
4529 _DRV_HVD_Inited(u8DrvId,FALSE);
4530
4531 if (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_VPU_IDLE_CNT) > HVD_FW_IDLE_THRESHOLD)
4532 {
4533 return TRUE;
4534 }
4535 else
4536 {
4537 return FALSE;
4538 }
4539 }
4540
4541 //-----------------------------------------------------------------------------
4542 /// @brief \b Function \b Name: MDrv_HVD_EX_IsSyncStart()
4543 /// @brief \b Function \b Description: check decoder starts to do sync action(drop or repeat) or not.
4544 /// @return - TRUE / FALSE
4545 /// @retval -FALSE(0): decoder is not doing sync action
4546 /// @retval -TRUE(1): decoder is doing sync action
4547 //-----------------------------------------------------------------------------
MDrv_HVD_EX_IsSyncStart(MS_U32 u32Id)4548 MS_BOOL MDrv_HVD_EX_IsSyncStart(MS_U32 u32Id)
4549 {
4550 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4551 HVD_EX_MSG_TRACE();
4552 _DRV_HVD_Inited(u8DrvId,FALSE);
4553
4554 if ((MS_BOOL) MDrv_HVD_EX_GetPlayMode(u32Id, E_HVD_EX_GMODE_IS_SYNC_ON) == FALSE)
4555 {
4556 return FALSE;
4557 }
4558 if (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_IS_SYNC_START))
4559 {
4560 return TRUE;
4561 }
4562 else
4563 {
4564 return FALSE;
4565 }
4566 }
4567
4568 //-----------------------------------------------------------------------------
4569 /// @brief \b Function \b Name: MDrv_HVD_EX_IsSyncReach()
4570 /// @brief \b Function \b Description: The distance of Video time stamp and STC is closed enough.
4571 /// @return - TRUE / FALSE
4572 /// @retval -FALSE(0): The distance is not shorter than sync tolerance.
4573 /// @retval -TRUE(1): The distance is shorter than sync tolerance.
4574 //-----------------------------------------------------------------------------
MDrv_HVD_EX_IsSyncReach(MS_U32 u32Id)4575 MS_BOOL MDrv_HVD_EX_IsSyncReach(MS_U32 u32Id)
4576 {
4577 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4578 HVD_EX_MSG_TRACE();
4579 _DRV_HVD_Inited(u8DrvId,FALSE);
4580
4581 if ((MS_BOOL) MDrv_HVD_EX_GetPlayMode(u32Id, E_HVD_EX_GMODE_IS_SYNC_ON) == FALSE)
4582 {
4583 return FALSE;
4584 }
4585
4586 if (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_IS_SYNC_REACH))
4587 {
4588 return TRUE;
4589 }
4590 else
4591 {
4592 return FALSE;
4593 }
4594 }
4595
4596 //-----------------------------------------------------------------------------
4597 /// @brief \b Function \b Name: MDrv_HVD_EX_IsLowDelay()
4598 /// @brief \b Function \b Description: check if current stream has low delay flag in SPS.
4599 /// @return - TRUE / FALSE
4600 /// @retval -FALSE(0): Low delay flag not found.
4601 /// @retval -TRUE(1): Low delay flag found.
4602 //-----------------------------------------------------------------------------
MDrv_HVD_EX_IsLowDelay(MS_U32 u32Id)4603 MS_BOOL MDrv_HVD_EX_IsLowDelay(MS_U32 u32Id)
4604 {
4605 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4606 HVD_EX_MSG_TRACE();
4607 _DRV_HVD_Inited(u8DrvId,FALSE);
4608
4609 if (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_AVC_LOW_DELAY))
4610 {
4611 return TRUE;
4612 }
4613 else
4614 {
4615 return FALSE;
4616 }
4617 }
4618
4619 //-----------------------------------------------------------------------------
4620 /// @brief \b Function \b Name: MDrv_HVD_EX_IsIFrmFound()
4621 /// @brief \b Function \b Description: check if I frame found after Init() or flush().
4622 /// @return - TRUE / FALSE
4623 /// @retval -FALSE(0): I frame is not found.
4624 /// @retval -TRUE(1): I frame has been found.
4625 //-----------------------------------------------------------------------------
MDrv_HVD_EX_IsIFrmFound(MS_U32 u32Id)4626 MS_BOOL MDrv_HVD_EX_IsIFrmFound(MS_U32 u32Id)
4627 {
4628 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4629 HVD_EX_MSG_TRACE();
4630 _DRV_HVD_Inited(u8DrvId,FALSE);
4631
4632 if (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_IS_I_FRM_FOUND))
4633 {
4634 return TRUE;
4635 }
4636 else
4637 {
4638 return FALSE;
4639 }
4640 }
4641
4642 //-----------------------------------------------------------------------------
4643 /// @brief \b Function \b Name: MDrv_HVD_EX_Is1stFrmRdy()
4644 /// @brief \b Function \b Description: check if first frame showed on screen after Init() or flush().
4645 /// @return - TRUE / FALSE
4646 /// @retval -FALSE(0): First frame is not showed.
4647 /// @retval -TRUE(1): First frame is showed.
4648 //-----------------------------------------------------------------------------
MDrv_HVD_EX_Is1stFrmRdy(MS_U32 u32Id)4649 MS_BOOL MDrv_HVD_EX_Is1stFrmRdy(MS_U32 u32Id)
4650 {
4651 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4652 HVD_EX_MSG_TRACE();
4653 _DRV_HVD_Inited(u8DrvId,FALSE);
4654
4655 if (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_IS_1ST_FRM_RDY))
4656 {
4657 return TRUE;
4658 }
4659 else
4660 {
4661 return FALSE;
4662 }
4663 }
4664
4665 //-----------------------------------------------------------------------------
4666 /// @brief \b Function \b Name: MDrv_HVD_EX_IsAllBufferEmpty()
4667 /// @brief \b Function \b Description: check if all of the buffers(display, decoded, BBU, bitstream) are empty.
4668 /// @return - TRUE / FALSE
4669 /// @retval -FALSE(0): Not Empty.
4670 /// @retval -TRUE(1): Empty.
4671 //-----------------------------------------------------------------------------
MDrv_HVD_EX_IsAllBufferEmpty(MS_U32 u32Id)4672 MS_BOOL MDrv_HVD_EX_IsAllBufferEmpty(MS_U32 u32Id)
4673 {
4674 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4675 //HVD_MSG_TRACE();
4676 _DRV_HVD_Inited(u8DrvId,FALSE);
4677
4678 if (_HVD_EX_IsAllBufferEmpty(u32Id))
4679 {
4680 return TRUE;
4681 }
4682 else
4683 {
4684 return FALSE;
4685 }
4686 #if 0
4687 if (u32Times > 200)
4688 {
4689 HVD_EX_MSG_INF("Flush() timeout failed:BBU:%lu Dec:%lu Disp:%lu Idle:%lu ESr:%lx ESw:%lx \n",
4690 HAL_HVD_EX_GetData(E_HVD_GDATA_BBU_Q_NUMB),
4691 HAL_HVD_EX_GetData(E_HVD_GDATA_DEC_Q_NUMB),
4692 HAL_HVD_EX_GetData(E_HVD_GDATA_DISP_Q_NUMB),
4693 HAL_HVD_EX_GetData(E_HVD_GDATA_VPU_IDLE_CNT),
4694 HAL_HVD_EX_GetData(E_HVD_GDATA_ES_READ_PTR), HAL_HVD_EX_GetData(E_HVD_GDATA_ES_WRITE_PTR));
4695 eRet = E_HVD_EX_FAIL;
4696 break;
4697 }
4698 return TRUE;
4699 #endif
4700 }
4701
4702 // get infomation
4703
4704 //-----------------------------------------------------------------------------
4705 /// @brief \b Function \b Name: MDrv_HVD_EX_GetBBUVacancy()
4706 /// @brief \b Function \b Description: get the vacancy of BBU queue.
4707 /// @return - TRUE / FALSE
4708 /// @retval -0: queue is full.
4709 /// @retval -not zero: queue is not full.
4710 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetBBUVacancy(MS_U32 u32Id)4711 MS_U32 MDrv_HVD_EX_GetBBUVacancy(MS_U32 u32Id)
4712 {
4713 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4714 MS_U32 u32BBUQnumb = 0;
4715 MS_U32 u32BBUTotal = 0;
4716 MS_U32 u32PTSQnumb = 0;
4717 MS_U32 u32PTSTotal = 0;
4718
4719 HVD_EX_MSG_TRACE();
4720 _DRV_HVD_Inited(u8DrvId,FALSE);
4721
4722 u32BBUTotal = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_BBU_TOTAL_TBL_ENTRY);
4723 u32BBUQnumb = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_BBU_Q_NUMB);
4724
4725 if (u32BBUTotal < u32BBUQnumb)
4726 {
4727 HVD_EX_MSG_ERR("Total BBUs(%lx) is less than the current(%lx)\n", u32BBUTotal, u32BBUQnumb);
4728 u32BBUQnumb = 0;
4729 }
4730 else
4731 {
4732 u32BBUQnumb = u32BBUTotal - u32BBUQnumb;
4733
4734 if (u32BBUQnumb < MIN_BBU_VACANCY_FOR_4K2K)
4735 {
4736 HVD_EX_MSG_DBG("BBU Vacancy(%lx) is less than MIN_BBU_VACANCY_FOR_4K2K(%x)\n", u32BBUQnumb, MIN_BBU_VACANCY_FOR_4K2K);
4737 u32BBUQnumb = 0;
4738 }
4739 }
4740
4741 #if HVD_ENABLE_MVC
4742 if ( u32BBUQnumb &&
4743 ( (HAL_HVD_EX_CheckMVCID(u32Id) == FALSE) ||
4744 ((HAL_HVD_EX_CheckMVCID(u32Id) == TRUE) && (E_VDEC_EX_MAIN_VIEW == HAL_HVD_EX_GetView(u32Id))) )
4745 )
4746 #else
4747 if (u32BBUQnumb)
4748 #endif
4749 {
4750 u32PTSTotal = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_PTS_TOTAL_ENTRY_NUMB) - 1; // add -1 for full case
4751 u32PTSQnumb = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_PTS_Q_NUMB);
4752
4753 if (u32PTSTotal <= u32PTSQnumb)
4754 {
4755 HVD_EX_MSG_DBG
4756 ("Warn: GetBBUVacancy has error that total PTS Q number(%lx) is smaller than current PTS Q number(%lx)\n",
4757 u32PTSTotal, u32PTSQnumb);
4758 u32BBUQnumb = 0;
4759 }
4760 }
4761
4762 return u32BBUQnumb;
4763 }
4764
4765 //-----------------------------------------------------------------------------
4766 /// @brief \b Function \b Name: MDrv_HVD_EX_GetDispInfo()
4767 /// @brief \b Function \b Description: Get video display information
4768 /// @param -pinfo \b OUT : pointer to video display information.
4769 /// @return -The result of command get display information
4770 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetDispInfo(MS_U32 u32Id,HVD_EX_DispInfo * pInfo)4771 HVD_EX_Result MDrv_HVD_EX_GetDispInfo(MS_U32 u32Id, HVD_EX_DispInfo *pInfo)
4772 {
4773 HVD_EX_Result eRet = E_HVD_EX_FAIL;
4774 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4775
4776 eRet = _HVD_EX_GetDispInfo(u32Id, pInfo, TRUE);
4777 if (E_HVD_EX_OK == eRet)
4778 {
4779 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
4780 pCtrl->bFrmRateSupported = HAL_HVD_EX_GetFrmRateIsSupported(u32Id, pInfo->u16HorSize, pInfo->u16VerSize, pInfo->u32FrameRate);
4781 HVD_EX_MSG_DBG("bFrmRateSupported[0x%x]=%x\n", u8DrvId, pCtrl->bFrmRateSupported);
4782 }
4783
4784 #if HVD_ENABLE_RV_FEATURE
4785 if (HVD_INIT_HW_RM == (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_HW_MASK))
4786 {
4787 //RM is always displayed by 60 frames per sec.
4788 pInfo->u32FrameRate = 60000;
4789 HVD_EX_MSG_DBG("rm force set 60fps\n");
4790 }
4791 #endif
4792
4793 return eRet;
4794 }
4795
4796 //-----------------------------------------------------------------------------
4797 /// @brief \b Function \b Name: MDrv_HVD_EX_GetPtsStcDiff()
4798 /// @brief \b Function \b Description: Get the difference of PTS and STC
4799 /// @return - PTS
4800 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetPtsStcDiff(MS_U32 u32Id)4801 MS_S64 MDrv_HVD_EX_GetPtsStcDiff(MS_U32 u32Id)
4802 {
4803 MS_S64 s64PTS = 0;
4804 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4805 _DRV_HVD_Inited(u8DrvId,FALSE);
4806
4807 s64PTS = HAL_HVD_EX_GetData_EX(u32Id, E_HVD_GDATA_PTS_STC_DIFF);
4808
4809 return s64PTS;
4810 }
4811
4812 //-----------------------------------------------------------------------------
4813 /// @brief \b Function \b Name: MDrv_HVD_EX_GetPTS()
4814 /// @brief \b Function \b Description: get the pts of current displayed video frame. unit: ms
4815 /// @return - PTS
4816 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetPTS(MS_U32 u32Id)4817 MS_U32 MDrv_HVD_EX_GetPTS(MS_U32 u32Id)
4818 {
4819 MS_U32 u32PTS = 0;
4820 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4821 _DRV_HVD_Inited(u8DrvId,FALSE);
4822
4823 u32PTS = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_PTS);
4824
4825 u32PTS = _HVD_EX_ReportLow32BitPTS(u32Id, u32PTS);
4826
4827 return u32PTS;
4828 }
4829
4830 //-----------------------------------------------------------------------------
4831 /// @brief \b Function \b Name: MDrv_HVD_EX_GetPTS()
4832 /// @brief \b Function \b Description: get the 33 bits pts of current displayed video frame. unit: ms
4833 /// @return - PTS
4834 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetU64PTS(MS_U32 u32Id)4835 MS_U64 MDrv_HVD_EX_GetU64PTS(MS_U32 u32Id)
4836 {
4837 MS_U64 u64PTS = 0;
4838 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4839 _DRV_HVD_Inited(u8DrvId,FALSE);
4840
4841 u64PTS = *((MS_U64*)(HAL_HVD_EX_GetData(u32Id,E_HVD_GDATA_U64PTS)));
4842
4843 return u64PTS;
4844 }
4845
4846
4847 //-----------------------------------------------------------------------------
4848 /// @brief \b Function \b Name: MDrv_HVD_EX_GetNextPTS()
4849 /// @brief \b Function \b Description: get the pts of next displayed video frame. unit: ms
4850 /// @return - PTS
4851 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetNextPTS(MS_U32 u32Id)4852 MS_U32 MDrv_HVD_EX_GetNextPTS(MS_U32 u32Id)
4853 {
4854 MS_U32 u32PTS = 0;
4855 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4856 _DRV_HVD_Inited(u8DrvId,FALSE);
4857
4858 u32PTS = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_NEXT_PTS);
4859
4860 u32PTS = _HVD_EX_ReportLow32BitPTS(u32Id, u32PTS);
4861
4862 return u32PTS;
4863 }
4864
4865 //-----------------------------------------------------------------------------
4866 /// @brief \b Function \b Name: MDrv_HVD_EX_GetNextDispQPtr()
4867 /// @brief \b Function \b Description: get the pointer of next displayed video frame.
4868 /// @return - Pointer in the display queue
4869 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetNextDispQPtr(MS_U32 u32Id)4870 MS_U32 MDrv_HVD_EX_GetNextDispQPtr(MS_U32 u32Id)
4871 {
4872 MS_U32 u32Ptr = 0;
4873 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4874 _DRV_HVD_Inited(u8DrvId,FALSE);
4875
4876 //HVD_PRINT("GetNextDispQPtr DqNum=%ld, DqPtr=%ld\n", HAL_HVD_EX_GetData(E_HVD_GDATA_DISP_Q_NUMB), HAL_HVD_EX_GetData(E_HVD_GDATA_DISP_Q_PTR));
4877 //if (HAL_HVD_EX_GetData(E_HVD_GDATA_DISP_Q_NUMB) != 0)
4878 {
4879 u32Ptr = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DISP_Q_PTR);
4880 }
4881
4882 return u32Ptr;
4883 }
4884
4885 //-----------------------------------------------------------------------------
4886 /// @brief \b Function \b Name: MDrv_HVD_EX_GetDataErrCnt()
4887 /// @brief \b Function \b Description: get accumulated data Error Count
4888 /// @return -data error count
4889 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetDataErrCnt(MS_U32 u32Id)4890 MS_U32 MDrv_HVD_EX_GetDataErrCnt(MS_U32 u32Id)
4891 {
4892 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4893 _DRV_HVD_Inited(u8DrvId,FALSE);
4894
4895 return HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DATA_ERROR_CNT);
4896 }
4897
4898 //-----------------------------------------------------------------------------
4899 /// @brief \b Function \b Name: MDrv_HVD_EX_GetDecErrCnt()
4900 /// @brief \b Function \b Description: get accumulated decode Error Count
4901 /// @return -decode error count
4902 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetDecErrCnt(MS_U32 u32Id)4903 MS_U32 MDrv_HVD_EX_GetDecErrCnt(MS_U32 u32Id)
4904 {
4905 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4906 _DRV_HVD_Inited(u8DrvId,FALSE);
4907
4908 return HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DEC_ERROR_CNT);
4909 }
4910
4911 //-----------------------------------------------------------------------------
4912 /// @brief \b Function \b Name: MDrv_HVD_EX_GetESWritePtr()
4913 /// @brief \b Function \b Description: Get Elementary Stream buffer write point
4914 /// @return - ES buffer write point offset from bitstream buffer base
4915 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetESWritePtr(MS_U32 u32Id)4916 MS_U32 MDrv_HVD_EX_GetESWritePtr(MS_U32 u32Id)
4917 {
4918 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4919 _DRV_HVD_Inited(u8DrvId,FALSE);
4920
4921 return HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_ES_WRITE_PTR);
4922 }
4923
4924 //-----------------------------------------------------------------------------
4925 /// @brief \b Function \b Name: MDrv_HVD_EX_GetESReadPtr()
4926 /// @brief \b Function \b Description: Get Elementary Stream buffer read point
4927 /// @return - ES buffer read point offset from bitstream buffer base
4928 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetESReadPtr(MS_U32 u32Id)4929 MS_U32 MDrv_HVD_EX_GetESReadPtr(MS_U32 u32Id)
4930 {
4931 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4932 _DRV_HVD_Inited(u8DrvId,FALSE);
4933
4934 return HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_ES_READ_PTR);
4935 }
4936
4937 //-----------------------------------------------------------------------------
4938 /// @brief \b Function \b Name: MDrv_HVD_GetESLevel()
4939 /// @brief \b Function \b Description: Get Elementary Stream buffer level
4940 /// @return - ES buffer level (ES data size in bitstream buffer)
4941 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetESQuantity(MS_U32 u32Id)4942 MS_U32 MDrv_HVD_EX_GetESQuantity(MS_U32 u32Id)
4943 {
4944 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4945 _DRV_HVD_Inited(u8DrvId,FALSE);
4946
4947 return HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_ES_QUANTITY);
4948 }
4949
4950 #define FATAL_ERROR(x) ((x)==E_HVD_RETURN_OUTOF_MEMORY)
4951
4952 //-----------------------------------------------------------------------------
4953 /// @brief \b Function \b Name: MDrv_HVD_EX_GetErrCode()
4954 /// @brief \b Function \b Description: get error code
4955 /// @return - error code number
4956 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetErrCode(MS_U32 u32Id)4957 MS_U32 MDrv_HVD_EX_GetErrCode(MS_U32 u32Id)
4958 {
4959 // TODO: define driver error code for upper layer
4960 MS_U32 u32Ret = 0;
4961 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4962
4963 _DRV_HVD_Inited(u8DrvId,FALSE);
4964
4965 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_ERROR_CODE);
4966
4967 u32Ret = _HVD_EX_Map2HVDErrCode(u32Ret);
4968
4969 #ifdef SUPPORT_X_MODEL_FEATURE //We using the common compile option to handle X model
4970 if (!FATAL_ERROR(u32Ret))
4971 #else
4972 if (u32Ret)
4973 #endif
4974 {
4975 HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_ERROR_CODE, 0);
4976 }
4977
4978 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32LastErrCode = u32Ret;
4979
4980 return u32Ret;
4981 }
4982
4983 //-----------------------------------------------------------------------------
4984 /// @brief \b Function \b Name: MDrv_HVD_EX_GetPlayMode()
4985 /// @brief \b Function \b Description: Get current play mode status.
4986 /// @param -eMode \b IN : Mode type.
4987 /// @return - mode status
4988 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetPlayMode(MS_U32 u32Id,HVD_EX_GetModeStatus eMode)4989 MS_U32 MDrv_HVD_EX_GetPlayMode(MS_U32 u32Id, HVD_EX_GetModeStatus eMode)
4990 {
4991 MS_U32 u32Ret = 0;
4992 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
4993
4994 HVD_EX_MSG_TRACE();
4995 _DRV_HVD_Inited(u8DrvId,FALSE);
4996
4997 switch (eMode)
4998 {
4999 case E_HVD_EX_GMODE_IS_SHOW_ERR_FRM:
5000 case E_HVD_EX_GMODE_IS_REPEAT_LAST_FIELD:
5001 case E_HVD_EX_GMODE_IS_ERR_CONCEAL:
5002 case E_HVD_EX_GMODE_IS_SYNC_ON:
5003 case E_HVD_EX_GMODE_IS_PLAYBACK_FINISH:
5004 case E_HVD_EX_GMODE_SYNC_MODE:
5005 case E_HVD_EX_GMODE_SKIP_MODE:
5006 case E_HVD_EX_GMODE_DROP_MODE:
5007 case E_HVD_EX_GMODE_DISPLAY_SPEED:
5008 case E_HVD_EX_GMODE_FRC_MODE:
5009 // TODO: add isr type here
5010 case E_HVD_EX_GMODE_ISR_TYPE:
5011 u32Ret = HAL_HVD_EX_GetData(u32Id, (HVD_GetData) ((MS_U32) eMode + (MS_U32) E_HVD_GDATA_IS_SHOW_ERR_FRM));
5012 break;
5013 case E_HVD_EX_GMODE_IS_STEP_DISPLAY:
5014 u32Ret = _DRV_HVD_Ctrl(u8DrvId, HVD_CTRL_DISPLAY_CTRL);
5015 break;
5016 case E_HVD_EX_GMODE_STREAM_TYPE:
5017 u32Ret = pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & E_HVD_INIT_MAIN_MASK;
5018 break;
5019 default:
5020 break;
5021 }
5022
5023 return u32Ret;
5024 }
5025
5026 //-----------------------------------------------------------------------------
5027 /// @brief \b Function \b Name: MDrv_HVD_EX_GetPlayState()
5028 /// @brief \b Function \b Description: get current play state
5029 /// @return - play state
5030 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetPlayState(MS_U32 u32Id)5031 HVD_EX_GetPlayState MDrv_HVD_EX_GetPlayState(MS_U32 u32Id)
5032 {
5033 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5034 MS_U32 u32FWstate = 0;
5035 HVD_EX_GetPlayState eRet = E_HVD_EX_GSTATE_INIT;
5036
5037 HVD_EX_MSG_TRACE();
5038 _DRV_HVD_Inited(u8DrvId,eRet);
5039
5040 u32FWstate = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_STATE);
5041 u32FWstate &= E_HVD_FW_STATE_MASK;
5042
5043 switch (u32FWstate)
5044 {
5045 case E_HVD_FW_INIT:
5046 eRet = E_HVD_EX_GSTATE_INIT;
5047 break;
5048 case E_HVD_FW_PLAY:
5049 eRet = E_HVD_EX_GSTATE_PLAY;
5050 break;
5051 case E_HVD_FW_PAUSE:
5052 eRet = E_HVD_EX_GSTATE_PAUSE;
5053 break;
5054 case E_HVD_FW_STOP:
5055 eRet = E_HVD_EX_GSTATE_STOP;
5056 break;
5057 default:
5058 break;
5059 }
5060 return eRet;
5061 }
5062
5063 //-----------------------------------------------------------------------------
5064 /// @brief \b Function \b Name: MDrv_HVD_EX_GetDecodeCnt()
5065 /// @brief \b Function \b Description: get accumulated decoded frame Count
5066 /// @return - decoded frame Count
5067 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetDecodeCnt(MS_U32 u32Id)5068 MS_U32 MDrv_HVD_EX_GetDecodeCnt(MS_U32 u32Id)
5069 {
5070 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5071 _DRV_HVD_Inited(u8DrvId,FALSE);
5072
5073 return HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DECODE_CNT);
5074 }
5075
5076 //-----------------------------------------------------------------------------
5077 /// @brief \b Function \b Name: MDrv_HVD_EX_GetActiveFormat()
5078 /// @brief \b Function \b Description: Get current AFD ID
5079 /// @return - AFD ID, 0xFF:invalid value
5080 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetActiveFormat(MS_U32 u32Id)5081 MS_U8 MDrv_HVD_EX_GetActiveFormat(MS_U32 u32Id)
5082 {
5083 HVD_Display_Info *pDispInfo = NULL;
5084 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5085
5086 HVD_EX_MSG_TRACE();
5087
5088 _DRV_HVD_Inited(u8DrvId,~0);
5089
5090 if (!(pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32CtrlMode & HVD_CTRL_DISP_INFO_RDY))
5091 {
5092 return 0;
5093 }
5094
5095 pDispInfo = (HVD_Display_Info *) HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DISP_INFO_ADDR);
5096
5097 if (pDispInfo != NULL)
5098 {
5099 return pDispInfo->u8AFD;
5100 }
5101 else
5102 {
5103 return ~0;
5104 }
5105 }
5106
5107 //-----------------------------------------------------------------------------
5108 /// @brief \b Function \b Name: MDrv_HVD_EX_GetInfo()
5109 /// @brief \b Function \b Description: Get information of HVD driver.
5110 /// @return - driver information
5111 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetInfo(void)5112 const HVD_EX_DrvInfo *MDrv_HVD_EX_GetInfo(void)
5113 {
5114 DrvInfo.bAVC = MDrv_HVD_EX_GetCaps(E_HVD_EX_AVC);
5115 DrvInfo.bAVS = MDrv_HVD_EX_GetCaps(E_HVD_EX_AVS);
5116 DrvInfo.bRM = MDrv_HVD_EX_GetCaps(E_HVD_EX_RM);
5117 DrvInfo.FWversion = HVD_FW_VERSION;
5118 return &DrvInfo;
5119 }
5120
5121 //-----------------------------------------------------------------------------
5122 /// @brief \b Function \b Name: MDrv_HVD_EX_GetLibVer()
5123 /// @brief \b Function \b Description: Get verion ID of HVD library.
5124 /// @param -pVerString \b OUT : pointer to HVD driver version ID.
5125 /// @return - driver library verion ID
5126 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetLibVer(const MSIF_Version ** ppVersion)5127 HVD_EX_Result MDrv_HVD_EX_GetLibVer(const MSIF_Version ** ppVersion)
5128 {
5129 if (!ppVersion)
5130 {
5131 return E_HVD_EX_FAIL;
5132 }
5133
5134 *ppVersion = &_drv_hvd_version;
5135 return E_HVD_EX_OK;
5136 }
5137
5138 //-----------------------------------------------------------------------------
5139 /// @brief \b Function \b Name: MDrv_HVD_EX_GetStatus()
5140 /// @brief \b Function \b Description: Get status of HVD driver
5141 /// @param -pstatus \b OUT : driver status
5142 /// @return - TRUE / FALSE
5143 /// @retval -FALSE(0): Low delay flag not found.
5144 /// @retval -TRUE(1): Low delay flag found.
5145 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetStatus(MS_U32 u32Id,HVD_EX_DrvStatus * pstatus)5146 MS_BOOL MDrv_HVD_EX_GetStatus(MS_U32 u32Id, HVD_EX_DrvStatus *pstatus)
5147 {
5148 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5149
5150 if (pstatus == NULL)
5151 {
5152 return FALSE;
5153 }
5154
5155 pstatus->bInit = pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32CtrlMode & HVD_CTRL_INIT_FINISHED;
5156 pstatus->bBusy = pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32CtrlMode & HVD_CTRL_PROCESSING;
5157
5158 return TRUE;
5159 }
5160
5161 //-----------------------------------------------------------------------------
5162 /// @brief \b Function \b Name: MDrv_HVD_EX_GetFrmInfo()
5163 /// @brief \b Function \b Description: Get current displayed or decoded frame information of HVD driver
5164 /// @param -eType \b IN : Type of frame information
5165 /// @param -pInfo \b OUT : frame information
5166 /// @return -The result of command get frame information
5167 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetFrmInfo(MS_U32 u32Id,HVD_EX_GetFrmInfoType eType,HVD_EX_FrameInfo * pInfo)5168 HVD_EX_Result MDrv_HVD_EX_GetFrmInfo(MS_U32 u32Id, HVD_EX_GetFrmInfoType eType, HVD_EX_FrameInfo * pInfo)
5169 {
5170 HVD_Frm_Information *pFrmInfo = NULL;
5171 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5172
5173 HVD_EX_MSG_TRACE();
5174 _DRV_HVD_Inited(u8DrvId,E_HVD_EX_FAIL);
5175
5176 if (pInfo == NULL)
5177 {
5178 return E_HVD_EX_FAIL;
5179 }
5180
5181 if (eType == E_HVD_EX_GFRMINFO_DISPLAY)
5182 {
5183 pFrmInfo = (HVD_Frm_Information *) HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DISP_FRM_INFO);
5184 }
5185 else if (eType == E_HVD_EX_GFRMINFO_DECODE)
5186 {
5187 pFrmInfo = (HVD_Frm_Information *) HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DEC_FRM_INFO);
5188 }
5189 else if (eType == E_HVD_EX_GFRMINFO_NEXT_DISPLAY)
5190 {
5191 pFrmInfo = (HVD_Frm_Information *) HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_NEXT_DISP_FRM_INFO);
5192 }
5193 #if HVD_ENABLE_MVC
5194 else if (eType == E_HVD_EX_GFRMINFO_DISPLAY_SUB)
5195 {
5196 pFrmInfo = (HVD_Frm_Information *) HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DISP_FRM_INFO_SUB);
5197 }
5198 else if (eType == E_HVD_EX_GFRMINFO_DECODE_SUB)
5199 {
5200 pFrmInfo = (HVD_Frm_Information *) HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DEC_FRM_INFO_SUB);
5201 }
5202 #endif ///HVD_ENABLE_MVC
5203 else if (eType == E_HVD_EX_GFRMINFO_LAST_DISPLAY)
5204 {
5205 pFrmInfo = (HVD_Frm_Information *) pHVDDrvContext->gHVDCtrl_EX[u8DrvId].pLastFrmInfo;
5206 }
5207
5208 if (pFrmInfo != NULL)
5209 {
5210 pInfo->u32LumaAddr = (MS_PHYADDR) (pFrmInfo->u32LumaAddr);
5211 pInfo->u32ChromaAddr = (MS_PHYADDR) (pFrmInfo->u32ChromaAddr);
5212
5213 if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u8FrmMiuSel == E_CHIP_MIU_1/*u32CtrlMode & HVD_CTRL_FRM_MIU_1*/)
5214 {
5215 pInfo->u32LumaAddr += pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32MIU1BaseAddr;
5216 pInfo->u32ChromaAddr += pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32MIU1BaseAddr;
5217 }
5218 else if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u8FrmMiuSel == E_CHIP_MIU_2)
5219 {
5220 pInfo->u32LumaAddr += pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32MIU2BaseAddr;
5221 pInfo->u32ChromaAddr += pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32MIU2BaseAddr;
5222 }
5223
5224 pInfo->u32TimeStamp = pFrmInfo->u32TimeStamp;
5225 pInfo->u32ID_L = pFrmInfo->u32ID_L;
5226 pInfo->u32ID_H = pFrmInfo->u32ID_H;
5227 pInfo->u32PrivateData = pFrmInfo->u32PrivateData; //[STB]only for AVC
5228 pInfo->u16Pitch = pFrmInfo->u16Pitch;
5229 pInfo->u16Height = pFrmInfo->u16Height;
5230 pInfo->u16Width = pFrmInfo->u16Width;
5231 pInfo->eFrmType = (HVD_EX_FrmType) (pFrmInfo->u8FrmType);
5232 pInfo->eFieldType = (HVD_EX_FieldType) (pFrmInfo->u8FieldType);
5233
5234 pInfo->u32LumaAddr_2bit = (MS_PHYADDR) (pFrmInfo->u32LumaAddr_2bit);
5235 pInfo->u32ChromaAddr_2bit = (MS_PHYADDR) (pFrmInfo->u32ChromaAddr_2bit);
5236
5237 if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u8FrmMiuSel == E_CHIP_MIU_1/*u32CtrlMode & HVD_CTRL_FRM_MIU_1*/)
5238 {
5239 pInfo->u32LumaAddr_2bit += pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32MIU1BaseAddr;
5240 pInfo->u32ChromaAddr_2bit += pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32MIU1BaseAddr;
5241 }
5242 else if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u8FrmMiuSel == E_CHIP_MIU_2)
5243 {
5244 pInfo->u32LumaAddr_2bit += pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32MIU2BaseAddr;
5245 pInfo->u32ChromaAddr_2bit += pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32MIU2BaseAddr;
5246 }
5247
5248 pInfo->u16Pitch_2bit = pFrmInfo->u16Pitch_2bit;
5249 pInfo->u8LumaBitdepth = pFrmInfo->u8LumaBitdepth;
5250 pInfo->u8ChromaBitdepth = pFrmInfo->u8ChromaBitdepth;
5251
5252 if ((pInfo->u16Pitch == 0) && (pInfo->u16Width == 0) && (pInfo->u16Height == 0))
5253 {
5254 return E_HVD_EX_FAIL;
5255 }
5256
5257 if (eType == E_HVD_EX_GFRMINFO_NEXT_DISPLAY)
5258 {
5259 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].pLastFrmInfo = pFrmInfo;
5260 }
5261 }
5262 else
5263 {
5264 return E_HVD_EX_FAIL;
5265 }
5266
5267 return E_HVD_EX_OK;
5268 }
5269
5270 //-----------------------------------------------------------------------------
5271 /// @brief \b Function \b Name: MDrv_HVD_EX_GetISRInfo()
5272 /// @brief \b Function \b Description: Get information of HVD driver interrupt
5273 /// @param -eType \b OUT : ISR information
5274 /// @return -the result of get ISR information
5275 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetISRInfo(MS_U32 u32Id,MS_U32 * eType)5276 MS_BOOL MDrv_HVD_EX_GetISRInfo(MS_U32 u32Id, MS_U32 *eType)
5277 {
5278 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5279
5280 _DRV_HVD_Inited(u8DrvId,FALSE);
5281
5282 if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].HVDISRCtrl.bInISR)
5283 {
5284 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].HVDISRCtrl.u32ISRInfo |= HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_HVD_ISR_STATUS);
5285 *eType = pHVDDrvContext->gHVDCtrl_EX[u8DrvId].HVDISRCtrl.u32ISRInfo;
5286 }
5287 else
5288 {
5289 *eType = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_HVD_ISR_STATUS);
5290 }
5291
5292 HVD_EX_MSG_DBG("ISR=0x%lx\n", *eType);
5293
5294 return TRUE;
5295 }
5296
5297 //-----------------------------------------------------------------------------
5298 /// @brief \b Function \b Name: MDrv_HVD_EX_CalLumaSum()
5299 /// @brief \b Function \b Description: Get the sum of luma data in a frame.
5300 /// @param -eType \b IN : Type of frame information
5301 /// @return -the sum
5302 /// @retval -0xFFFFFFFF: error occer.
5303 /// @retval -not zero: the sum.
5304 //-----------------------------------------------------------------------------
MDrv_HVD_EX_CalLumaSum(MS_U32 u32Id,HVD_EX_GetFrmInfoType eType)5305 MS_U32 MDrv_HVD_EX_CalLumaSum(MS_U32 u32Id, HVD_EX_GetFrmInfoType eType)
5306 {
5307 HVD_Frm_Information *pFrmInfo = NULL;
5308 MS_U32 u32Ret = HVD_U32_MAX;
5309 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5310
5311 HVD_EX_MSG_TRACE();
5312 _DRV_HVD_Inited(u8DrvId,u32Ret);
5313
5314 if (eType == E_HVD_EX_GFRMINFO_DISPLAY)
5315 {
5316 pFrmInfo = (HVD_Frm_Information *) HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DISP_FRM_INFO);
5317 }
5318 else if (eType == E_HVD_EX_GFRMINFO_DECODE)
5319 {
5320 pFrmInfo = (HVD_Frm_Information *) HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DEC_FRM_INFO);
5321 }
5322
5323 if (pFrmInfo != NULL)
5324 {
5325 MS_U32 u32tmp = 0;
5326 MS_U32 u32PitchCnt = 0;
5327 MS_U32 u32HeightCnt = 0;
5328 volatile MS_U8 *pLumaData = NULL;
5329 // PA2VA
5330 u32tmp = pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32FrameBufAddr;
5331
5332 if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u8FrmMiuSel == E_CHIP_MIU_1/*u32CtrlMode & HVD_CTRL_FRM_MIU_1*/)
5333 {
5334 u32tmp -= pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32MIU1BaseAddr;
5335 }
5336 else if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u8FrmMiuSel == E_CHIP_MIU_2)
5337 {
5338 u32tmp -= pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32MIU2BaseAddr;
5339 }
5340
5341 pLumaData = (volatile MS_U8 *) (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32FrameBufVAddr + (pFrmInfo->u32LumaAddr - u32tmp));
5342
5343 for (u32HeightCnt = 0; u32HeightCnt < pFrmInfo->u16Height; u32HeightCnt++)
5344 {
5345 for (u32PitchCnt = 0; u32PitchCnt < pFrmInfo->u16Pitch; u32PitchCnt++)
5346 {
5347 if (u32PitchCnt < pFrmInfo->u16Pitch)
5348 {
5349 u32Ret += (MS_U32) (*pLumaData);
5350 }
5351 pLumaData++;
5352 }
5353 }
5354 }
5355
5356 return u32Ret;
5357 }
5358
5359 //-----------------------------------------------------------------------------
5360 /// @brief \b Function \b Name: MDrv_HVD_EX_GetUserData_Wptr()
5361 /// @brief \b Function \b Description: Get write pointer of user data.
5362 /// @return -the information of write pointer of user data.
5363 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetUserData_Wptr(MS_U32 u32Id)5364 MS_U32 MDrv_HVD_EX_GetUserData_Wptr(MS_U32 u32Id)
5365 {
5366 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5367 MS_U32 u32Ret = 0;
5368
5369 HVD_EX_MSG_TRACE();
5370 _DRV_HVD_Inited(u8DrvId,FALSE);
5371
5372 u32Ret = (MS_U32) HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_USERDATA_WPTR);
5373
5374 return u32Ret;
5375 }
5376
5377 //-----------------------------------------------------------------------------
5378 /// @brief \b Function \b Name: MDrv_HVD_EX_GetUserData_Packet()
5379 /// @brief \b Function \b Description: Get information of user data packet.
5380 /// @param -u32Idx \b IN : the pointer of required user data packet( valid range is 0 ~ 11 )
5381 /// @param -u32Size \b OUT : the size of required user data packet
5382 /// @return -the offset of user data packet form code buffer start address
5383 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetUserData_Packet(MS_U32 u32Id,MS_U32 u32Idx,MS_U32 * u32Size)5384 MS_U32 MDrv_HVD_EX_GetUserData_Packet(MS_U32 u32Id, MS_U32 u32Idx, MS_U32 *u32Size)
5385 {
5386 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5387 MS_U32 u32Ret = 0;
5388 MS_U32 tmp = 0;
5389 MS_U8 *pIdx = NULL;
5390
5391 HVD_EX_MSG_TRACE();
5392 _DRV_HVD_Inited(u8DrvId,FALSE);
5393
5394 *u32Size = 0;
5395 tmp = (MS_U32) HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_USERDATA_IDX_TBL_SIZE);
5396
5397 if (u32Idx >= tmp)
5398 {
5399 HVD_EX_MSG_ERR("input user data index(%lu) is larger than max index(%lu)\n", u32Idx, tmp);
5400 return 0;
5401 }
5402 tmp = (MS_U32) HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_USERDATA_IDX_TBL_ADDR);
5403 if (tmp == 0)
5404 {
5405 HVD_EX_MSG_INF("HVD FW ERR: user data packet idx tbl base addr(%lx) is zero\n", tmp);
5406 return 0;
5407 }
5408 pIdx = (MS_U8 *) (tmp + u32Idx);
5409 tmp = (MS_U32) HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_USERDATA_PACKET_TBL_SIZE);
5410 if ((*pIdx) >= tmp)
5411 {
5412 HVD_EX_MSG_INF("HVD FW ERR: user data packet tbl ptr(%lu) is larger than max size(%lu)\n", (MS_U32) (*pIdx), tmp);
5413 return 0;
5414 }
5415 tmp = (MS_U32) HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_USERDATA_PACKET_TBL_ADDR);
5416 if (tmp == 0)
5417 {
5418 HVD_EX_MSG_INF("HVD FW ERR: user data packet packet tbl base offset(%lx) is zero\n", tmp);
5419 return 0;
5420 }
5421 u32Ret = tmp;
5422 tmp = (MS_U32) HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_USERDATA_PACKET_SIZE);
5423 if (tmp == 0)
5424 {
5425 HVD_EX_MSG_INF("HVD FW ERR: user data packet packet size(%lu) is zero\n", tmp);
5426 return 0;
5427 }
5428 *u32Size = tmp;
5429 u32Ret += (MS_U32) (*pIdx) * tmp;
5430 return u32Ret;
5431 }
5432
5433 // VDEC Interal control
5434 //-----------------------------------------------------------------------------
5435 /// @brief \b Function \b Name: MDrv_HVD_EX_GenPattern()
5436 /// @brief \b Function \b Description: Generate spcific pattern to support some special function.
5437 /// @param -eType \b IN : the virtual address of spcific pattern
5438 /// @param -u32VAddr \b IN : the virtual address of spcific pattern
5439 /// @param -u32Size \b IN, OUT :
5440 /// IN: the input array size.
5441 /// OUT: the used array size.
5442 /// @return -The result of command generate spcific pattern
5443 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GenPattern(MS_U32 u32Id,HVD_EX_PatternType eType,MS_U32 u32VAddr,MS_U32 * pu32Size)5444 HVD_EX_Result MDrv_HVD_EX_GenPattern(MS_U32 u32Id, HVD_EX_PatternType eType, MS_U32 u32VAddr, MS_U32 * pu32Size)
5445 {
5446 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
5447 MS_U8 *pDummyData = NULL;
5448 MS_U32 u32MinPatternSize = 0;
5449 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5450
5451 HVD_EX_MSG_TRACE();
5452 _DRV_HVD_Inited(u8DrvId,eRet);
5453 _DRV_HVD_EX_Entry(u8DrvId);
5454
5455 if (eType == E_HVD_EX_PATTERN_FLUSH) // flush pattern
5456 {
5457 // Driver input need not to push flush pattern
5458 if ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK) == HVD_INIT_MAIN_FILE_RAW)
5459 {
5460 *pu32Size = 0;
5461 eRet = E_HVD_EX_OK;
5462 _DRV_HVD_EX_RET(u8DrvId, eRet);
5463 }
5464
5465 // TSP input process
5466 if (u32VAddr == 0)
5467 {
5468 *pu32Size = 8 + 144;
5469 HVD_EX_MSG_ERR("Flush Pattern address shall not be zero\n");
5470 eRet = E_HVD_EX_RET_INVALID_PARAMETER;
5471 _DRV_HVD_EX_RET(u8DrvId, eRet);
5472 }
5473
5474 switch ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_HW_MASK))
5475 {
5476 case HVD_INIT_HW_AVC:
5477 case HVD_INIT_HW_MVC:
5478 case HVD_INIT_HW_VP8:
5479 case HVD_INIT_HW_AVS:
5480 #if SUPPORT_EVD
5481 case HVD_INIT_HW_VP9:
5482 case HVD_INIT_HW_HEVC:
5483 #endif
5484 {
5485 u32MinPatternSize = 8 + 144;
5486 break;
5487 }
5488 case HVD_INIT_HW_RM:
5489 default:
5490 u32MinPatternSize = 0;
5491 break;
5492 }
5493
5494 if (*pu32Size < u32MinPatternSize)
5495 {
5496 HVD_EX_MSG_ERR("Flush Pattern must have at least %lu bytes, input:%lu\n", u32MinPatternSize,
5497 (MS_U32) (*pu32Size));
5498 *pu32Size = u32MinPatternSize;
5499 eRet = E_HVD_EX_RET_OUTOF_MEMORY;
5500 _DRV_HVD_EX_RET(u8DrvId, eRet);
5501 }
5502
5503 *pu32Size = u32MinPatternSize;
5504 pDummyData = (MS_U8 *) u32VAddr;
5505
5506 memset((void *) pDummyData, 0, *pu32Size);
5507
5508 switch ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_HW_MASK))
5509 {
5510 case HVD_INIT_HW_AVC:
5511 case HVD_INIT_HW_MVC:
5512 case HVD_INIT_HW_VP8:
5513 #if SUPPORT_EVD
5514 case HVD_INIT_HW_VP9:
5515 case HVD_INIT_HW_HEVC:
5516 #endif
5517 {
5518 pDummyData[0] = 0;
5519 pDummyData[1] = 0;
5520 pDummyData[2] = 1;
5521 pDummyData[3] = 0xFF;
5522 pDummyData[4] = 0xAA;
5523 pDummyData[5] = 0x55;
5524 pDummyData[6] = 0xAA;
5525 pDummyData[7] = 0x55;
5526
5527 break;
5528 }
5529 case HVD_INIT_HW_AVS:
5530 {
5531 pDummyData[0] = 0;
5532 pDummyData[1] = 0;
5533 pDummyData[2] = 1;
5534 pDummyData[3] = 0xB4;
5535 pDummyData[4] = 0xAA;
5536 pDummyData[5] = 0x55;
5537 pDummyData[6] = 0xAA;
5538 pDummyData[7] = 0x55;
5539
5540 break;
5541 }
5542 case HVD_INIT_HW_RM:
5543 default:
5544 break;
5545 }
5546 }
5547 else if (eType == E_HVD_EX_PATTERN_FILEEND) // dummy pattern
5548 {
5549 // Driver input need not to push dummy pattern
5550 if ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK) == HVD_INIT_MAIN_FILE_RAW)
5551 {
5552 *pu32Size = 0;
5553 eRet = E_HVD_EX_OK;
5554 _DRV_HVD_EX_RET(u8DrvId, eRet);
5555 }
5556
5557 // TSP input process
5558 if (u32VAddr == 0)
5559 {
5560 *pu32Size = 8 + 144;
5561 HVD_EX_MSG_ERR("Dummy Pattern address shall not be zero\n");
5562 eRet = E_HVD_EX_RET_INVALID_PARAMETER;
5563 _DRV_HVD_EX_RET(u8DrvId, eRet);
5564 }
5565
5566 switch ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_HW_MASK))
5567 {
5568 case HVD_INIT_HW_AVC:
5569 case HVD_INIT_HW_MVC:
5570 case HVD_INIT_HW_VP8:
5571 case HVD_INIT_HW_AVS:
5572 #if SUPPORT_EVD
5573 case HVD_INIT_HW_VP9:
5574 case HVD_INIT_HW_HEVC:
5575 #endif
5576 u32MinPatternSize = 8 + 144;
5577 break;
5578 case HVD_INIT_HW_RM:
5579 default:
5580 u32MinPatternSize = 0;
5581 break;
5582 }
5583
5584 if (*pu32Size < u32MinPatternSize)
5585 {
5586 HVD_EX_MSG_ERR("Dummy Pattern must have at least %lu bytes, input:%lu\n", u32MinPatternSize,
5587 (MS_U32) (*pu32Size));
5588 *pu32Size = u32MinPatternSize;
5589 eRet = E_HVD_EX_RET_OUTOF_MEMORY;
5590 _DRV_HVD_EX_RET(u8DrvId, eRet);
5591 }
5592
5593 pDummyData = (MS_U8 *) u32VAddr;
5594
5595 memset((void *) pDummyData, 0, *pu32Size);
5596
5597 switch ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_HW_MASK))
5598 {
5599 case HVD_INIT_HW_AVC:
5600 case HVD_INIT_HW_MVC:
5601 case HVD_INIT_HW_VP8:
5602 #if SUPPORT_EVD
5603 case HVD_INIT_HW_VP9:
5604 case HVD_INIT_HW_HEVC:
5605 #endif
5606 {
5607 pDummyData[0] = 0;
5608 pDummyData[1] = 0;
5609 pDummyData[2] = 1;
5610 pDummyData[3] = 0xFF;
5611 pDummyData[4] = 0xFF;
5612 pDummyData[5] = 0xFF;
5613 pDummyData[6] = 0xFF;
5614 pDummyData[7] = 0xFF;
5615
5616 break;
5617 }
5618 case HVD_INIT_HW_AVS:
5619 {
5620 pDummyData[0] = 0;
5621 pDummyData[1] = 0;
5622 pDummyData[2] = 1;
5623 pDummyData[3] = 0xB4;
5624 pDummyData[4] = 0xAA;
5625 pDummyData[5] = 0x66;
5626 pDummyData[6] = 0xAA;
5627 pDummyData[7] = 0x66;
5628
5629 break;
5630 }
5631 case HVD_INIT_HW_RM:
5632 default:
5633 *pu32Size = u32MinPatternSize;
5634 break;
5635 }
5636 }
5637
5638 eRet = E_HVD_EX_OK;
5639
5640 _DRV_HVD_EX_RET(u8DrvId, eRet);
5641 }
5642
5643 //-----------------------------------------------------------------------------
5644 /// @brief \b Function \b Name: MDrv_HVD_EX_GetPatternInfo()
5645 /// @brief \b Function \b Description: Get driver specific data information
5646 /// @param -eType \b IN : the type of specific data information
5647 /// @return -the information of choosed type
5648 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetPatternInfo(MS_U32 u32Id,HVD_EX_PatternInfo eType)5649 MS_U32 MDrv_HVD_EX_GetPatternInfo(MS_U32 u32Id, HVD_EX_PatternInfo eType)
5650 {
5651 MS_U32 eRet = 0;
5652 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5653
5654 HVD_EX_MSG_TRACE();
5655 _DRV_HVD_Inited(u8DrvId,FALSE);
5656
5657 switch (eType)
5658 {
5659 case E_HVD_EX_FLUSH_PATTERN_SIZE:
5660 {
5661 if ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK) == HVD_INIT_MAIN_FILE_RAW)
5662 {
5663 eRet = 0;
5664 }
5665 else if ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK) == HVD_INIT_MAIN_FILE_TS)
5666 {
5667 eRet = 8 + 144;
5668 }
5669 break;
5670 }
5671 case E_HVD_EX_DUMMY_HW_FIFO:
5672 {
5673 if ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK) == HVD_INIT_MAIN_FILE_RAW)
5674 {
5675 eRet = 0;
5676 }
5677 else if ((pHVDDrvContext->gHVDCtrl_EX[u8DrvId].InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK) == HVD_INIT_MAIN_FILE_TS)
5678 {
5679 eRet = (MS_U32) HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_MAX_DUMMY_FIFO);
5680 }
5681 break;
5682 }
5683 default:
5684 break;
5685 }
5686
5687 return eRet;
5688 }
5689
5690
MDrv_HVD_EX_GetDSBufMiuSelect(MS_U32 u32Id)5691 MS_U8 MDrv_HVD_EX_GetDSBufMiuSelect(MS_U32 u32Id)
5692 {
5693 MS_U8 u8MiuSel;
5694 MS_U32 u32StartOffset;
5695 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5696
5697
5698 if(pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u8SettingMode & HVD_DRV_MODE_EXTERNAL_DS_BUFFER)
5699 {
5700 _phy_to_miu_offset(u8MiuSel, u32StartOffset, pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32ExternalDSbuf);
5701 }
5702 else
5703 {
5704 _phy_to_miu_offset(u8MiuSel, u32StartOffset, pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32CodeBufAddr);
5705 }
5706 return u8MiuSel;
5707 }
5708
5709
5710
5711 //-----------------------------------------------------------------------------
5712 /// @brief \b Function \b Name: MDrv_HVD_EX_GetDynamicScalingInfo()
5713 /// @brief \b Function \b Description: Get information of Dynamic Scaling
5714 /// @param -eType \b IN : the type of specific information
5715 /// @return -the information of choosed type
5716 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetDynamicScalingInfo(MS_U32 u32Id,HVD_EX_DynamicScalingInfo eType)5717 MS_U32 MDrv_HVD_EX_GetDynamicScalingInfo(MS_U32 u32Id, HVD_EX_DynamicScalingInfo eType)
5718 {
5719 MS_U32 u32Ret = 0;
5720 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5721 MS_U8 u8MiuSel;
5722 MS_U32 u32StartOffset;
5723
5724 HVD_EX_MSG_TRACE();
5725 _DRV_HVD_Inited(u8DrvId,FALSE);
5726
5727 switch (eType)
5728 {
5729 case E_HVD_EX_DS_BUF_MIUSEL:
5730 if(pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u8SettingMode & HVD_DRV_MODE_EXTERNAL_DS_BUFFER)
5731 {
5732 if(pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32ExternalDSbuf >= pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32MIU1BaseAddr)
5733 {
5734 u32Ret = TRUE;
5735 }
5736 else
5737 {
5738 u32Ret = FALSE;
5739 }
5740
5741 _phy_to_miu_offset(u8MiuSel, u32StartOffset, pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32ExternalDSbuf);
5742
5743 if(u8MiuSel >= E_CHIP_MIU_2)
5744 {
5745
5746 HVD_EX_MSG_ERR("u8MiuSel is %d !!, but return type is only Boolean. Please use MDrv_HVD_EX_GetDSBufMiuSelect() to get right miu select of DS buffer!\n",u8MiuSel);
5747 }
5748 }
5749 else
5750 {
5751 if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32CodeBufAddr >= pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32MIU1BaseAddr)
5752 {
5753 u32Ret = TRUE;
5754 }
5755 else
5756 {
5757 u32Ret = FALSE;
5758 }
5759
5760 _phy_to_miu_offset(u8MiuSel, u32StartOffset, pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32CodeBufAddr);
5761
5762 if(u8MiuSel >= E_CHIP_MIU_2)
5763 {
5764
5765 HVD_EX_MSG_ERR("u8MiuSel is %d !!, but return type is only Boolean. Please use MDrv_HVD_EX_GetDSBufMiuSelect() to get right miu select of DS buffer!\n",u8MiuSel);
5766 }
5767 }
5768 break;
5769 case E_HVD_EX_DS_BUF_ADDR:
5770 if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u8SettingMode & HVD_DRV_MODE_EXTERNAL_DS_BUFFER)
5771 {
5772 u32Ret = pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32ExternalDSbuf;
5773 ///printf("[EDS] E_HVD_EX_DS_BUF_ADDR 0x%lx.\n",u32Ret);
5774 }
5775 else
5776 {
5777 u32Ret = pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32CodeBufAddr + HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_DS_BUF_ADDR);
5778
5779 ///printf("[DS] DS_BUF_ADDR 0x%lx \n", u32Ret);
5780 ///printf("[EDS] E_HVD_EX_DS_BUF_ADDR Old.\n");
5781 }
5782 break;
5783 case E_HVD_EX_DS_BUF_SIZE:
5784 u32Ret = (MS_U32) HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_DS_BUF_SIZE);
5785 break;
5786 case E_HVD_EX_DS_VECTOR_DEPTH:
5787 u32Ret = (MS_U32) HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_DS_VECTOR_DEPTH);
5788 break;
5789 case E_HVD_EX_DS_INFO_ADDR:
5790 if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u8SettingMode & HVD_DRV_MODE_EXTERNAL_DS_BUFFER)
5791 {
5792 u32Ret = pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32ExternalDSbuf + HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_DS_BUF_SIZE);//0xC00;
5793 ///printf("[EDS] E_HVD_EX_DS_INFO_ADDR 0x%lx.\n",u32Ret);
5794 }
5795 else
5796 {
5797 u32Ret = pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32CodeBufAddr + HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_DS_INFO_ADDR);
5798
5799 ///printf("[DS] DS_INFO_ADDR 0x%lx \n", u32Ret);
5800 }
5801 break;
5802 case E_HVD_EX_DS_IS_ENABLED:
5803 u32Ret = (MS_U32) HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_DS_IS_ENABLED);
5804 break;
5805 default:
5806 break;
5807 }
5808 return u32Ret;
5809 }
5810
5811 //-----------------------------------------------------------------------------
5812 /// @brief \b Function \b Name: MDrv_HVD_EX_GetData()
5813 /// @brief \b Function \b Description: Get target data from HVD driver
5814 /// @param -eType \b IN : the type of the target data
5815 /// @return -the value of the target data
5816 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetData(MS_U32 u32Id,HVD_EX_GDataType eType)5817 MS_U32 MDrv_HVD_EX_GetData(MS_U32 u32Id, HVD_EX_GDataType eType)
5818 {
5819 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
5820 MS_U32 u32Ret = 0;
5821
5822 _DRV_HVD_Inited(u8DrvId,FALSE);
5823
5824 switch (eType)
5825 {
5826 case E_HVD_EX_GDATA_TYPE_DISP_CNT:
5827 {
5828 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DISP_CNT);
5829 break;
5830 }
5831 case E_HVD_EX_GDATA_TYPE_SKIP_CNT:
5832 {
5833 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_SKIP_CNT);
5834 break;
5835 }
5836 case E_HVD_EX_GDATA_TYPE_DROP_CNT:
5837 {
5838 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DROP_CNT);
5839 break;
5840 }
5841 case E_HVD_EX_GDATA_TYPE_IDLE_CNT:
5842 {
5843 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_VPU_IDLE_CNT);
5844 break;
5845 }
5846 case E_HVD_EX_GDATA_TYPE_VSYNC_CNT:
5847 {
5848 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_VSYNC_CNT);
5849 break;
5850 }
5851 case E_HVD_EX_GDATA_TYPE_MAIN_LOOP_CNT:
5852 {
5853 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_MAIN_LOOP_CNT);
5854 break;
5855 }
5856 case E_HVD_EX_GDATA_TYPE_AVC_LEVEL_IDC:
5857 {
5858 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_AVC_LEVEL_IDC);
5859 break;
5860 }
5861 case E_HVD_EX_GDATA_TYPE_DISP_Q_SIZE:
5862 {
5863 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DISP_Q_NUMB);
5864 break;
5865 }
5866 case E_HVD_EX_GDATA_TYPE_ES_LEVEL:
5867 {
5868 u32Ret = (MS_U32) (HVD_EX_ESLevel) HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_ES_LEVEL);
5869 break;
5870 }
5871 case E_HVD_EX_GDATA_TYPE_AVC_VUI_DISP_INFO:
5872 {
5873 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_AVC_VUI_DISP_INFO);
5874 break;
5875 }
5876 case E_HVD_EX_GDATA_TYPE_DISP_STC:
5877 {
5878 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DISP_STC);
5879 break;
5880 }
5881 case E_HVD_EX_GDATA_TYPE_USERDATA_IDX_TBL_SIZE:
5882 {
5883 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_USERDATA_IDX_TBL_SIZE);
5884 break;
5885 }
5886 case E_HVD_EX_GDATA_TYPE_USERDATA_PACKET_SIZE:
5887 {
5888 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_USERDATA_PACKET_SIZE);
5889 break;
5890 }
5891 case E_HVD_EX_GDATA_TYPE_REAL_FRAMERATE:
5892 {
5893 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_REAL_FRAMERATE);
5894 break;
5895 }
5896 case E_HVD_EX_GDATA_TYPE_IS_ORI_INTERLACE_MODE:
5897 {
5898 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_IS_ORI_INTERLACE_MODE);
5899 break;
5900 }
5901 case E_HVD_EX_GDATA_TYPE_FRAME_MBS_ONLY_FLAG:
5902 {
5903 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_TYPE_FRAME_MBS_ONLY_FLAG);
5904 break;
5905 }
5906 case E_HVD_EX_GDATA_TYPE_IS_LEAST_DISPQ_SIZE:
5907 {
5908 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_TYPE_IS_LEAST_DISPQ_SIZE);
5909 break;
5910 }
5911 case E_HVD_EX_GDATA_TYPE_FIELD_PIC_FLAG:
5912 {
5913 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FIELD_PIC_FLAG);
5914 break;
5915 }
5916 case E_HVD_EX_GDATA_TYPE_FW_CODEC_TYPE:
5917 {
5918 //u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_CODEC_TYPE);
5919 switch(HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_CODEC_TYPE))
5920 {
5921 case E_HVD_Codec_AVC:
5922 {
5923 u32Ret = E_HVD_EX_AVC;
5924 break;
5925 }
5926 case E_HVD_Codec_AVS:
5927 {
5928 u32Ret = E_HVD_EX_AVS;
5929 break;
5930 }
5931 case E_HVD_Codec_RM:
5932 {
5933 u32Ret = E_HVD_EX_RM;
5934 break;
5935 }
5936 case E_HVD_Codec_MVC:
5937 {
5938 u32Ret = E_HVD_EX_MVC;
5939 break;
5940 }
5941 case E_HVD_Codec_VP8:
5942 {
5943 u32Ret = E_HVD_EX_VP8;
5944 break;
5945 }
5946 case E_HVD_Codec_MJPEG:
5947 {
5948 u32Ret = E_HVD_EX_NONE;
5949 break;
5950 }
5951 case E_HVD_Codec_HEVC:
5952 {
5953 u32Ret = E_HVD_EX_HEVC;
5954 break;
5955 }
5956 case E_HVD_EX_VP9:
5957 {
5958 u32Ret = E_HVD_EX_VP9;
5959 break;
5960 }
5961 default:
5962 {
5963 u32Ret = E_HVD_EX_NONE;
5964 break;
5965 }
5966 }
5967 break;
5968 }
5969 case E_HVD_EX_GDATA_TYPE_FRC_MODE:
5970 {
5971 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FRC_MODE);
5972 break;
5973 }
5974 case E_HVD_EX_GDATA_TYPE_VSYNC_BRIDGE_ADDR:
5975 {
5976 u32Ret = pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32CodeBufAddr + HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_VSYNC_BRIDGE_ADDR);
5977 break;
5978 }
5979 case E_HVD_EX_GDATA_TYPE_FW_STATUS_FLAG:
5980 {
5981 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_STATUS_FLAG);
5982 break;
5983 }
5984 case E_HVD_EX_GDATA_TYPE_HVD_HW_MAX_PIXEL:
5985 {
5986 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_HVD_HW_MAX_PIXEL);
5987 break;
5988 }
5989 default:
5990 break;
5991 }
5992
5993 return u32Ret;
5994 }
5995
5996 //-----------------------------------------------------------------------------
5997 /// @brief \b Function \b Name: MDrv_HVD_EX_GetMem_Dbg()
5998 /// @brief \b Function \b Description: Get any data from any memory address
5999 /// @param -u32Addr \b IN : the memory address of the target data
6000 /// @return -the value of the memory
6001 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetMem_Dbg(MS_U32 u32Id,MS_VIRT u32Addr)6002 MS_U32 MDrv_HVD_EX_GetMem_Dbg(MS_U32 u32Id, MS_VIRT u32Addr)
6003 {
6004 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
6005 MS_U32 u32Ret = 0;
6006
6007 HVD_EX_MSG_TRACE();
6008 _DRV_HVD_Inited(u8DrvId,u32Ret);
6009
6010 switch (u32Addr)
6011 {
6012 case 1:
6013 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_BBU_READ_PTR);
6014 break;
6015 case 2:
6016 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_VPU_PC_CNT);
6017 break;
6018 case 3:
6019 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_BBU_WRITE_PTR);
6020 break;
6021 default:
6022 break;
6023 }
6024
6025 return u32Ret;
6026 }
6027
6028 //-----------------------------------------------------------------------------
6029 /// @brief \b Function \b Name: MDrv_HVD_EX_DbgDumpStatus()
6030 /// @brief \b Function \b Description: Dump specific information to standard output.
6031 /// @param -eFlag \b IN : the type of information.
6032 //-----------------------------------------------------------------------------
MDrv_HVD_EX_DbgDumpStatus(MS_U32 u32Id,HVD_EX_DumpStatus eFlag)6033 void MDrv_HVD_EX_DbgDumpStatus(MS_U32 u32Id, HVD_EX_DumpStatus eFlag)
6034 {
6035 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
6036
6037 if (!(pHVDDrvContext->bHVDIsInited[u8DrvId]))
6038 {
6039 return;
6040 }
6041
6042 if (eFlag & E_HVD_EX_DUMP_STATUS_FW)
6043 {
6044 HAL_HVD_EX_Dump_FW_Status(u32Id);
6045 }
6046
6047 if (eFlag & E_HVD_EX_DUMP_STATUS_HW)
6048 {
6049 HAL_HVD_EX_Dump_HW_Status(HVD_U32_MAX);
6050 }
6051 }
6052
6053 //-----------------------------------------------------------------------------
6054 /// @brief \b Function \b Name: MDrv_HVD_EX_SetMem_Dbg()
6055 /// @brief \b Function \b Description: set any data into any memory address
6056 /// @param -u32Addr \b IN : the memory address of the target destination
6057 /// @param -u32Arg \b IN : the value of input content
6058 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetMem_Dbg(MS_U32 u32Id,MS_VIRT u32Addr,MS_U32 u32Arg)6059 void MDrv_HVD_EX_SetMem_Dbg(MS_U32 u32Id, MS_VIRT u32Addr, MS_U32 u32Arg)
6060 {
6061 HVD_EX_MSG_TRACE();
6062 HAL_HVD_EX_SetData_Dbg(u32Addr, u32Arg);
6063 }
6064
6065 //-----------------------------------------------------------------------------
6066 /// @brief \b Function \b Name: MDrv_HVD_SetData_Dbg()
6067 /// @brief \b Function \b Description: set any FW debug command
6068 /// @param -u32Cmd \b IN : specify the FW command ID.
6069 /// @param -u32Arg \b IN : specify the argument of FW command.
6070 /// @return -the result of debug command
6071 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetCmd_Dbg(MS_U32 u32Id,MS_U32 u32Cmd,MS_U32 u32Arg)6072 HVD_EX_Result MDrv_HVD_EX_SetCmd_Dbg(MS_U32 u32Id, MS_U32 u32Cmd, MS_U32 u32Arg)
6073 {
6074 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
6075 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
6076
6077 HVD_EX_MSG_TRACE();
6078 _DRV_HVD_Inited(u8DrvId,eRet);
6079 _DRV_HVD_EX_Entry(u8DrvId);
6080
6081 // todo: consider more...
6082 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, (HVD_User_Cmd) u32Cmd, u32Arg);
6083
6084 _DRV_HVD_EX_RET(u8DrvId, eRet);
6085 }
6086
6087 //-----------------------------------------------------------------------------
6088 /// @brief \b Function \b Name: MDrv_HVD_EX_Set_Err_Tolerance()
6089 /// @brief \b Function \b Description: set display error tolerance
6090 /// @param -u32Arg \b IN : //[15:8]+[7:0] = (err_tolerance(0%~100%)+enable or disable)
6091 /// @return -the result of set err tolerance
6092 //-----------------------------------------------------------------------------
MDrv_HVD_EX_Set_Err_Tolerance(MS_U32 u32Id,MS_U32 u32Arg)6093 HVD_EX_Result MDrv_HVD_EX_Set_Err_Tolerance(MS_U32 u32Id, MS_U32 u32Arg)
6094 {
6095 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
6096 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
6097 HVD_EX_MSG_TRACE();
6098 _DRV_HVD_Inited(u8DrvId,eRet);
6099 _DRV_HVD_EX_Entry(u8DrvId);
6100
6101 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SET_DISP_ERROR_TOLERANCE, u32Arg);
6102
6103 _DRV_HVD_EX_RET(u8DrvId, eRet);
6104
6105 }
6106
6107 //-----------------------------------------------------------------------------
6108 /// @brief \b Function \b Name: MDrv_HVD_EX_SetSettings_Pro()
6109 /// @brief \b Function \b Description: set any FW debug command
6110 /// @param -eType \b IN : specify the type of setting.
6111 /// @param -u32Arg \b IN : specify the argument of the setting.
6112 /// @return -the result of set professional settings.
6113 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetSettings_Pro(MS_U32 u32Id,HVD_EX_SSettingsType eType,MS_U32 u32Arg)6114 HVD_EX_Result MDrv_HVD_EX_SetSettings_Pro(MS_U32 u32Id, HVD_EX_SSettingsType eType, MS_U32 u32Arg)
6115 {
6116 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
6117 HVD_User_Cmd eCmd = E_HVD_CMD_INVALID_CMD;
6118 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
6119
6120 HVD_EX_MSG_TRACE();
6121 _DRV_HVD_Inited(u8DrvId,eRet);
6122 _DRV_HVD_EX_Entry(u8DrvId);
6123
6124 switch (eType)
6125 {
6126 case E_HVD_EX_SSET_TIME_UNIT:
6127 eCmd = E_HVD_CMD_TIME_UNIT_TYPE;
6128 break;
6129 case E_HVD_EX_SSET_PITCH:
6130 eCmd = E_HVD_CMD_PITCH;
6131 break;
6132 case E_HVD_EX_SSET_SYNC_EACH_FRM:
6133 eCmd = E_HVD_CMD_SYNC_EACH_FRM;
6134 break;
6135 case E_HVD_EX_SSET_MAX_DEC_TICK:
6136 eCmd = E_HVD_CMD_MAX_DEC_TICK;
6137 break;
6138 case E_HVD_EX_SSET_AUTO_FREE_ES:
6139 eCmd = E_HVD_CMD_AUTO_FREE_ES;
6140 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].Settings.bAutoFreeES = u32Arg;
6141 break;
6142 case E_HVD_EX_SSET_MIN_FRAME_GAP:
6143 eCmd = E_HVD_CMD_MIN_FRAME_GAP;
6144 break;
6145 case E_HVD_EX_SSET_DISABLE_DEBLOCKING:
6146 eCmd = E_HVD_CMD_DIS_DBF;
6147 if (u32Arg > 2)
6148 {
6149 u32Arg = 1;
6150 }
6151 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].Settings.bDisDeblocking = u32Arg;
6152 break;
6153 case E_HVD_EX_SSET_DISABLE_QUARTER_PIXEL:
6154 eCmd = E_HVD_CMD_DIS_QUART_PIXEL;
6155 if (u32Arg > 2)
6156 {
6157 u32Arg = 1;
6158 }
6159 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].Settings.bDisQuarterPixel = u32Arg;
6160 break;
6161 case E_HVD_EX_SSET_MIU_BURST_CNT_LEVEL:
6162 {
6163 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].Settings.u32MiuBurstLevel = u32Arg;
6164 eCmd = E_HVD_CMD_MIU_BURST_CNT;
6165
6166 break;
6167 }
6168 default:
6169 break;
6170 }
6171
6172 if (eCmd != E_HVD_CMD_INVALID_CMD)
6173 {
6174 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, eCmd, u32Arg);
6175 }
6176 else
6177 {
6178 eRet = E_HVD_EX_RET_INVALID_PARAMETER;
6179 }
6180
6181 _DRV_HVD_EX_RET(u8DrvId, eRet);
6182 }
6183
6184 //-----------------------------------------------------------------------------
6185 /// @brief \b Function \b Name: MDrv_HVD_EX_GetCaps()
6186 /// @brief \b Function \b Description: check if HW support this format
6187 /// @param -u32Type \b IN : specify the format type
6188 /// @return - TRUE/ FALSE
6189 /// @retval -FALSE(0): not supported by HW
6190 /// @retval -TRUE(1): supported by HW
6191 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetCaps(HVD_EX_Codec u32Type)6192 MS_BOOL MDrv_HVD_EX_GetCaps(HVD_EX_Codec u32Type)
6193 {
6194 if(E_HVD_EX_HEVC == u32Type)
6195 #if SUPPORT_EVD
6196 return TRUE;
6197 #else
6198 return FALSE;
6199 #endif
6200 #if SUPPORT_G2VP9
6201 if(E_HVD_EX_VP9 == u32Type)
6202 return TRUE;
6203 #endif
6204
6205 #if ( HVD_HW_VERSION == HVD_HW_HVD)
6206 MS_U32 verID = HAL_HVD_EX_GetHWVersionID();
6207 verID = verID >> 12;
6208 switch (u32Type)
6209 {
6210 case E_HVD_EX_AVC:
6211 case E_HVD_EX_AVS:
6212 case E_HVD_EX_RM:
6213 case E_HVD_EX_MVC:
6214 if ((verID & BIT(u32Type)) == 0)
6215 {
6216 return FALSE;
6217 }
6218 break;
6219 case E_HVD_EX_VP8:
6220 #if !SUPPORT_G2VP9 && SUPPORT_EVD && defined(VDEC3)
6221 case E_HVD_EX_VP9: // Mstar VP9
6222 #endif
6223 return TRUE;
6224 default:
6225 return FALSE;
6226 }
6227 #else
6228 if (u32Type != E_HVD_EX_AVC)
6229 {
6230 return FALSE;
6231 }
6232 #endif
6233 return TRUE;
6234 }
6235
MDrv_HVD_LinkWeakSymbolPatch(void)6236 MS_BOOL MDrv_HVD_LinkWeakSymbolPatch(void)
6237 {
6238 return TRUE;
6239 }
6240
6241 //-----------------------------------------------------------------------------
6242 /// @brief \b Function \b Name: MDrv_HVD_EX_SetAutoRmLstZeroByte
6243 /// @brief \b Function \b Description: Turn on/off auto remove last zero byte
6244 /// @param -bOn \b IN : Turn on/off auto remove last zero byte
6245 /// @return -the result of turn on/off auto remove last zero byte
6246 ///\b NOTE: The default mode after initialization is On.
6247 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetAutoRmLstZeroByte(MS_U32 u32Id,MS_BOOL bOn)6248 HVD_EX_Result MDrv_HVD_EX_SetAutoRmLstZeroByte(MS_U32 u32Id, MS_BOOL bOn)
6249 {
6250 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
6251 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
6252
6253 HVD_EX_MSG_TRACE();
6254 _DRV_HVD_Inited(u8DrvId,eRet);
6255
6256 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].bAutoRmLastZeroByte = bOn;
6257
6258 return E_HVD_EX_OK;
6259 }
6260
6261 //-----------------------------------------------------------------------------
6262 /// @brief \b Function \b Name: MDrv_HVD_EX_IsAlive
6263 /// @brief \b Function \b Description:Check Whether HVD is alive or not(check cnt)
6264 /// @return -the result of HVD alive status(E_HVD_EX_OK/E_HVD_EX_RET_NOT_RUNNING)
6265 //-----------------------------------------------------------------------------
MDrv_HVD_EX_IsAlive(MS_U32 u32Id)6266 HVD_EX_Result MDrv_HVD_EX_IsAlive(MS_U32 u32Id)
6267 {
6268 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
6269
6270 HVD_EX_MSG_TRACE();
6271 _DRV_HVD_Inited(u8DrvId,E_HVD_EX_FAIL);
6272
6273 if (HAL_HVD_EX_IsAlive(u32Id))
6274 {
6275 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].LivingStatus.u32DecCnt = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_DECODE_CNT);
6276 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].LivingStatus.u32SkipCnt = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_SKIP_CNT);
6277 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].LivingStatus.u32IdleCnt = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_VPU_IDLE_CNT);
6278 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].LivingStatus.u32MainLoopCnt = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_MAIN_LOOP_CNT);
6279
6280 return E_HVD_EX_OK;
6281 }
6282 else
6283 {
6284 return E_HVD_EX_RET_NOT_RUNNING;
6285 }
6286 }
6287
6288 //-----------------------------------------------------------------------------
6289 /// @brief \b Function \b Name: MDrv_HVD_EX_SetBalanceBW
6290 /// @brief \b Function \b Description: bandwidth adjustment
6291 /// @param -qp_cnt \b IN : QP threshold for overtime counter
6292 /// @param -db_cnt \b IN : Deblocking threshod for overtime counter
6293 /// @param -upper \b IN : upper bound for overtime counter
6294 /// @return -the result of command E_HVD_CMD_BALANCE_BW
6295 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetBalanceBW(MS_U32 u32Id,MS_U8 u8QPCnt,MS_U8 u8DBCnt,MS_U8 u8Upper)6296 HVD_EX_Result MDrv_HVD_EX_SetBalanceBW(MS_U32 u32Id, MS_U8 u8QPCnt, MS_U8 u8DBCnt, MS_U8 u8Upper)
6297 {
6298 HVD_EX_Result eRet = E_HVD_EX_FAIL;
6299 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
6300
6301 HVD_EX_MSG_TRACE();
6302 _DRV_HVD_Inited(u8DrvId,eRet);
6303 _DRV_HVD_EX_Entry(u8DrvId);
6304
6305 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_BALANCE_BW, u8QPCnt | (u8DBCnt << 8) | (u8Upper << 16));
6306
6307 _DRV_HVD_EX_RET(u8DrvId, eRet);
6308 }
6309
6310 //-----------------------------------------------------------------------------
6311 /// @brief \b Function \b Name: MDrv_HVD_EX_SetFdMaskDelayCnt()
6312 /// @brief \b Function \b Description: Set fd mask muting count
6313 /// @param -u8DelayCnt \b IN : 0~0xFF, Fdmask delay count, arg >= 0xFF -> use default
6314 /// @return -The result of command setting fd_mask muting count
6315 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetFdMaskDelayCnt(MS_U32 u32Id,MS_U8 u8DelayCnt)6316 HVD_EX_Result MDrv_HVD_EX_SetFdMaskDelayCnt(MS_U32 u32Id, MS_U8 u8DelayCnt)
6317 {
6318 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
6319 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
6320
6321 HVD_EX_MSG_TRACE();
6322 _DRV_HVD_Inited(u8DrvId,eRet);
6323 _DRV_HVD_EX_Entry(u8DrvId);
6324
6325 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_FDMASK_DELAY_CNT, u8DelayCnt);
6326
6327 _DRV_HVD_EX_RET(u8DrvId, eRet);
6328 }
6329
6330 //-----------------------------------------------------------------------------
6331 /// @brief \b Function \b Name: MDrv_HVD_EX_SetOutputFRCMode()
6332 /// @brief \b Function \b Description: Set output frame rate convert mode.
6333 /// @param -u8FrameRate \b IN : output vsync count.
6334 /// @param -u8Interlace \b IN : output scan type: 0:progress, 1:interlace.
6335 /// @return -The result of command setting output FRC mode
6336 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetOutputFRCMode(MS_U32 u32Id,MS_U8 u8FrameRate,MS_U8 u8Interlace)6337 HVD_EX_Result MDrv_HVD_EX_SetOutputFRCMode(MS_U32 u32Id, MS_U8 u8FrameRate, MS_U8 u8Interlace)
6338 {
6339 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
6340 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
6341
6342 HVD_EX_MSG_TRACE();
6343 _DRV_HVD_Inited(u8DrvId,eRet);
6344 _DRV_HVD_EX_Entry(u8DrvId);
6345
6346 if ((u8Interlace != 0) && (u8Interlace != 1))
6347 {
6348 _DRV_HVD_EX_RET(u8DrvId, eRet);
6349 }
6350
6351 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_FRC_OUTPUT_FRAMERATE, u8FrameRate);
6352
6353 if (eRet != E_HVD_EX_OK)
6354 {
6355 _DRV_HVD_EX_RET(u8DrvId, eRet);
6356 }
6357
6358 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_FRC_OUTPUT_INTERLACE, u8Interlace);
6359
6360 _DRV_HVD_EX_RET(u8DrvId, eRet);
6361 }
6362
MDrv_HVD_EX_DispFrame(MS_U32 u32Id,MS_U32 u32FrmIdx)6363 HVD_EX_Result MDrv_HVD_EX_DispFrame(MS_U32 u32Id, MS_U32 u32FrmIdx)
6364 {
6365 HVD_EX_MSG_TRACE();
6366
6367 HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_DISPQ_STATUS_DISP, u32FrmIdx);
6368
6369 return E_HVD_EX_OK;
6370 }
6371
MDrv_HVD_EX_FreeFrame(MS_U32 u32Id,MS_U32 u32FrmIdx)6372 HVD_EX_Result MDrv_HVD_EX_FreeFrame(MS_U32 u32Id, MS_U32 u32FrmIdx)
6373 {
6374 HVD_EX_MSG_TRACE();
6375
6376 HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_DISPQ_STATUS_FREE, u32FrmIdx);
6377
6378 return E_HVD_EX_OK;
6379 }
6380
MDrv_HVD_EX_EnableDispQue(MS_U32 u32Id,MS_BOOL bEnable)6381 HVD_EX_Result MDrv_HVD_EX_EnableDispQue(MS_U32 u32Id, MS_BOOL bEnable)
6382 {
6383 HVD_EX_MSG_TRACE();
6384
6385 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_ENABLE_DISP_QUEUE, bEnable);
6386
6387 return E_HVD_EX_OK;
6388 }
6389
MDrv_HVD_EX_EnableVSizeAlign(MS_U32 u32Id,MS_BOOL bEnable)6390 HVD_EX_Result MDrv_HVD_EX_EnableVSizeAlign(MS_U32 u32Id, MS_BOOL bEnable)
6391 {
6392 HVD_EX_MSG_TRACE();
6393
6394 HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_FORCE_ALIGN_VSIZE, bEnable);
6395
6396 return E_HVD_EX_OK;
6397 }
6398
MDrv_HVD_EX_ShowDecodeOrder(MS_U32 u32Id,MS_BOOL bEnable)6399 HVD_EX_Result MDrv_HVD_EX_ShowDecodeOrder(MS_U32 u32Id, MS_BOOL bEnable)
6400 {
6401 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
6402 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
6403
6404 HVD_EX_MSG_TRACE();
6405 _DRV_HVD_Inited(u8DrvId,eRet);
6406 _DRV_HVD_EX_Entry(u8DrvId);
6407
6408 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SHOW_DECODE_ORDER, bEnable);
6409
6410 _DRV_HVD_EX_RET(u8DrvId, eRet);
6411 }
6412
6413 //-----------------------------------------------------------------------------
6414 /// @brief \b Function \b Name: MDrv_HVD_EX_Disp_Ignore_Crop()
6415 /// @brief \b Function \b Description: ingore corp info
6416 /// @param -bEnable \b IN : turn on / off.
6417 /// @return -The result of command setting fd_mask muting count
6418 //-----------------------------------------------------------------------------
MDrv_HVD_EX_Disp_Ignore_Crop(MS_U32 u32Id,MS_BOOL bEnable)6419 HVD_EX_Result MDrv_HVD_EX_Disp_Ignore_Crop(MS_U32 u32Id, MS_BOOL bEnable)
6420 {
6421 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
6422 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
6423
6424 HVD_EX_MSG_TRACE();
6425 _DRV_HVD_Inited(u8DrvId,eRet);
6426 _DRV_HVD_EX_Entry(u8DrvId);
6427
6428 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DISP_IGNORE_CROP, bEnable);
6429
6430 _DRV_HVD_EX_RET(u8DrvId, eRet);
6431 }
6432
MDrv_HVD_EX_SuspendDynamicScale(MS_U32 u32Id,MS_BOOL bEnable)6433 HVD_EX_Result MDrv_HVD_EX_SuspendDynamicScale(MS_U32 u32Id, MS_BOOL bEnable)
6434 {
6435 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
6436 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
6437 HVD_EX_MSG_TRACE();
6438 _DRV_HVD_Inited(u8DrvId,eRet);
6439 _DRV_HVD_EX_Entry(u8DrvId);
6440
6441 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SUSPEND_DYNAMIC_SCALE, bEnable);
6442
6443 _DRV_HVD_EX_RET(u8DrvId, eRet);
6444 }
6445
MDrv_HVD_EX_RmEnablePtsTbl(MS_U32 u32Id,MS_BOOL bEnable)6446 HVD_EX_Result MDrv_HVD_EX_RmEnablePtsTbl(MS_U32 u32Id, MS_BOOL bEnable)
6447 {
6448 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
6449 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
6450 HVD_EX_MSG_TRACE();
6451 _DRV_HVD_Inited(u8DrvId,eRet);
6452 _DRV_HVD_EX_Entry(u8DrvId);
6453
6454 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_RM_ENABLE_PTS_TBL, bEnable);
6455
6456 _DRV_HVD_EX_RET(u8DrvId, eRet);
6457 }
6458
6459
MDrv_HVD_EX_AutoExhaustESMode(MS_U32 u32Id,MS_U32 u32ESbound)6460 HVD_EX_Result MDrv_HVD_EX_AutoExhaustESMode(MS_U32 u32Id, MS_U32 u32ESbound)
6461 {
6462 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
6463 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
6464 HVD_EX_MSG_TRACE();
6465 _DRV_HVD_Inited(u8DrvId,eRet);
6466 _DRV_HVD_EX_Entry(u8DrvId);
6467
6468 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_AUTO_EXHAUST_ES_MODE, u32ESbound);
6469
6470 _DRV_HVD_EX_RET(u8DrvId, eRet);
6471 }
6472
6473
MDrv_HVD_EX_SetMinTspSize(MS_U32 u32Id,MS_U32 u32Size)6474 HVD_EX_Result MDrv_HVD_EX_SetMinTspSize(MS_U32 u32Id, MS_U32 u32Size)
6475 {
6476 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
6477 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
6478 HVD_EX_MSG_TRACE();
6479 _DRV_HVD_Inited(u8DrvId,eRet);
6480 _DRV_HVD_EX_Entry(u8DrvId);
6481
6482 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SET_MIN_TSP_DATA_SIZE, u32Size);
6483
6484 _DRV_HVD_EX_RET(u8DrvId, eRet);
6485 }
6486
6487 //------------------------------------------------------------------------------
6488 /// Set HVD FRC drop type.
6489 /// @param u8DropType \b IN : drop type. 0:drop frame, 1:drop field. default:0
6490 /// @return -E_HVD_EX_OK for success; E_HVD_EX_FAIL for failure.
6491 //------------------------------------------------------------------------------
MDrv_HVD_EX_SetFRCDropType(MS_U32 u32Id,MS_U8 u8DropType)6492 HVD_EX_Result MDrv_HVD_EX_SetFRCDropType(MS_U32 u32Id, MS_U8 u8DropType)
6493 {
6494 HVD_EX_Result eRet = E_HVD_EX_FAIL;
6495 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
6496
6497 HVD_EX_MSG_TRACE();
6498 _DRV_HVD_Inited(u8DrvId,eRet);
6499 _DRV_HVD_EX_Entry(u8DrvId);
6500
6501 if (u8DropType != 0 && u8DropType != 1)
6502 {
6503 eRet = E_HVD_EX_RET_INVALID_PARAMETER;
6504 _DRV_HVD_EX_RET(u8DrvId, eRet);
6505 }
6506
6507 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_FRC_DROP_MODE, u8DropType);
6508
6509 _DRV_HVD_EX_RET(u8DrvId, eRet);
6510 }
6511
6512 //-----------------------------------------------------------------------------
6513 /// @brief \b Function \b Name: MDrv_HVD_EX_GetDrvFwVer()
6514 /// @brief \b Function \b Description: Get driver's FW version
6515 /// @return - Driver's FW version
6516 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetDrvFwVer(void)6517 MS_U32 MDrv_HVD_EX_GetDrvFwVer(void)
6518 {
6519 return HVD_FW_VERSION;
6520 }
6521
6522 //-----------------------------------------------------------------------------
6523 /// @brief \b Function \b Name: MDrv_HVD_EX_GetFwVer()
6524 /// @brief \b Function \b Description: Get driver's FW version
6525 /// @return - FW version obtained by querying FW
6526 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetFwVer(MS_U32 u32Id)6527 MS_U32 MDrv_HVD_EX_GetFwVer(MS_U32 u32Id)
6528 {
6529 return HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_VERSION_ID);
6530 }
6531
MDrv_HVD_SetSingleDecodeMode(MS_BOOL bEnable)6532 MS_BOOL MDrv_HVD_SetSingleDecodeMode(MS_BOOL bEnable)
6533 {
6534 return HAL_VPU_EX_SetSingleDecodeMode(bEnable);
6535 }
6536
MDrv_HVD_SetDecodeMode(HVD_EX_DecModCfg * pstCfg)6537 MS_BOOL MDrv_HVD_SetDecodeMode(HVD_EX_DecModCfg *pstCfg)
6538 {
6539 return HAL_VPU_EX_SetDecodeMode((VPU_EX_DecModCfg*)pstCfg);
6540 }
6541
MDrv_HVD_EX_SetBurstMode(MS_U32 u32Id,MS_BOOL bBurst)6542 void MDrv_HVD_EX_SetBurstMode(MS_U32 u32Id, MS_BOOL bBurst)
6543 {
6544 HVD_Return eCtrlRet = E_HVD_RETURN_FAIL;
6545
6546 eCtrlRet = HAL_HVD_EX_SetCmd(u32Id, E_DUAL_BURST_MODE, bBurst);
6547 if (E_HVD_RETURN_SUCCESS != eCtrlRet)
6548 {
6549 HVD_EX_MSG_ERR("E_DUAL_BURST_MODE NG eCtrlRet=%x\n", eCtrlRet);
6550 }
6551 else
6552 {
6553 HVD_EX_MSG_DBG("MJPEG!!! Set burst mode =%d success!!!!\n", bBurst);
6554 }
6555 }
6556
6557 //------------------------------------------------------------------------------
6558 /// Force into interlace mode
6559 /// @param u8Mode \b IN : 0: Disable, 1: Enable
6560 /// @return -E_HVD_OK for success; E_HVD_FAIL for failure.
6561 //------------------------------------------------------------------------------
MDrv_HVD_EX_ForceInterlaceMode(MS_U32 u32Id,MS_U8 u8Mode)6562 HVD_EX_Result MDrv_HVD_EX_ForceInterlaceMode(MS_U32 u32Id, MS_U8 u8Mode)
6563 {
6564 HVD_EX_Result eRet = E_HVD_EX_FAIL;
6565 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
6566
6567 HVD_EX_MSG_TRACE();
6568 _DRV_HVD_Inited(u8DrvId,eRet);
6569 _DRV_HVD_EX_Entry(u8DrvId);
6570
6571 eRet = (HVD_EX_Result)HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_FORCE_INTERLACE, u8Mode);
6572
6573 _DRV_HVD_EX_RET(u8DrvId, eRet);
6574 }
6575
6576 //------------------------------------------------------------------------------
6577 /// Push Disp Q with Ref num
6578 /// @param u8Mode \b IN : 0: Disable, 1: Enable
6579 /// @return -E_HVD_OK for success; E_HVD_FAIL for failure.
6580 //------------------------------------------------------------------------------
MDrv_HVD_EX_PushDispQWithRefNum(MS_U32 u32Id,MS_U8 u8Mode)6581 HVD_EX_Result MDrv_HVD_EX_PushDispQWithRefNum(MS_U32 u32Id, MS_U8 u8Mode)
6582 {
6583 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
6584 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
6585
6586 HVD_EX_MSG_TRACE();
6587 _DRV_HVD_Inited(u8DrvId,eRet);
6588 _DRV_HVD_EX_Entry(u8DrvId);
6589
6590 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_PUSH_DISPQ_WITH_REF_NUM, u8Mode);
6591
6592 _DRV_HVD_EX_RET(u8DrvId, eRet);
6593 }
6594
6595 //------------------------------------------------------------------------------
6596 /// Ignore HW error - PIC_OVERRUN
6597 /// @param bEnable \b IN : 0: Disable, 1: Enable
6598 /// @return -E_HVD_EX_OK for success; E_HVD_EX_FAIL for failure.
6599 //------------------------------------------------------------------------------
MDrv_HVD_EX_IgnorePicOverrun(MS_U32 u32Id,MS_BOOL bEnable)6600 HVD_EX_Result MDrv_HVD_EX_IgnorePicOverrun(MS_U32 u32Id, MS_BOOL bEnable)
6601 {
6602 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
6603 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
6604
6605 HVD_EX_MSG_TRACE();
6606 _DRV_HVD_Inited(u8DrvId,eRet);
6607 _DRV_HVD_EX_Entry(u8DrvId);
6608
6609 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_IGNORE_PIC_OVERRUN, bEnable);
6610
6611 _DRV_HVD_EX_RET(u8DrvId, eRet);
6612 }
6613
6614 //------------------------------------------------------------------------------
6615 /// Control speed in displaying time only.
6616 /// @param bEnable \b IN : 0: Original, control in decoding and displaying time, 1: Enable,control speed in displaying time only
6617 /// @return -E_HVD_EX_OK for success; E_HVD_EX_FAIL for failure.
6618 //------------------------------------------------------------------------------
MDrv_HVD_EX_CtlSpeedInDispOnly(MS_U32 u32Id,MS_BOOL bEnable)6619 HVD_EX_Result MDrv_HVD_EX_CtlSpeedInDispOnly(MS_U32 u32Id, MS_BOOL bEnable)
6620 {
6621 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
6622 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
6623
6624 HVD_EX_MSG_TRACE();
6625 _DRV_HVD_Inited(u8DrvId,eRet);
6626 _DRV_HVD_EX_Entry(u8DrvId);
6627
6628 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_CTRL_SPEED_IN_DISP_ONLY, bEnable);
6629
6630 _DRV_HVD_EX_RET(u8DrvId, eRet);
6631 }
6632
6633 //------------------------------------------------------------------------------
6634 /// AVC support reference number over max DPB size when frame buffer is enough.
6635 /// @param bEnable \b IN : 0: Disable, 1: Enable
6636 /// @return -E_HVD_EX_OK for success; E_HVD_EX_FAIL for failure.
6637 //------------------------------------------------------------------------------
MDrv_HVD_EX_AVCSupportRefNumOverMaxDBPSize(MS_U32 u32Id,MS_BOOL bEnable)6638 HVD_EX_Result MDrv_HVD_EX_AVCSupportRefNumOverMaxDBPSize(MS_U32 u32Id, MS_BOOL bEnable)
6639 {
6640 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
6641 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
6642
6643 HVD_EX_MSG_TRACE();
6644 _DRV_HVD_Inited(u8DrvId,eRet);
6645 _DRV_HVD_EX_Entry(u8DrvId);
6646
6647 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_AVC_SUPPORT_REF_NUM_OVER_MAX_DPB_SIZE, bEnable);
6648
6649 _DRV_HVD_EX_RET(u8DrvId, eRet);
6650 }
6651
MDrv_HVD_EX_ReturnInvalidAFD(MS_U32 u32Id,MS_BOOL bEnable)6652 HVD_EX_Result MDrv_HVD_EX_ReturnInvalidAFD(MS_U32 u32Id, MS_BOOL bEnable)
6653 {
6654 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
6655 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
6656
6657 HVD_EX_MSG_TRACE();
6658 _DRV_HVD_Inited(u8DrvId,eRet);
6659 _DRV_HVD_EX_Entry(u8DrvId);
6660
6661 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_RETURN_INVALID_AFD, bEnable);
6662
6663 _DRV_HVD_EX_RET(u8DrvId, eRet);
6664 }
6665
6666
MDrv_HVD_EX_AVCForceBrokenByUs(MS_U32 u32Id,MS_BOOL bEnable)6667 HVD_EX_Result MDrv_HVD_EX_AVCForceBrokenByUs(MS_U32 u32Id, MS_BOOL bEnable)
6668 {
6669 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
6670 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
6671
6672 HVD_EX_MSG_TRACE();
6673 _DRV_HVD_Inited(u8DrvId,eRet);
6674 _DRV_HVD_EX_Entry(u8DrvId);
6675
6676 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_AVC_FORCE_BROKEN_BY_US, bEnable);
6677
6678 _DRV_HVD_EX_RET(u8DrvId, eRet);
6679 }
6680
6681 //-----------------------------------------------------------------------------
6682 /// @brief \b Function \b Name: MDrv_HVD_EX_Support_AVC2MVC()
6683 /// @brief \b Function \b Description: Set Support AVC to MVC
6684 /// @param -bEnable \b IN : turn on / off.
6685 /// @return -The result of command setting fd_mask muting count
6686 //-----------------------------------------------------------------------------
MDrv_HVD_EX_Support_AVC2MVC(MS_U32 u32Id,MS_BOOL bEnable)6687 HVD_EX_Result MDrv_HVD_EX_Support_AVC2MVC(MS_U32 u32Id, MS_BOOL bEnable)
6688 {
6689 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
6690 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
6691
6692 HVD_EX_MSG_TRACE();
6693 _DRV_HVD_Inited(u8DrvId,eRet);
6694 _DRV_HVD_EX_Entry(u8DrvId);
6695
6696 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SUPPORT_AVC_TO_MVC, bEnable);
6697
6698 _DRV_HVD_EX_RET(u8DrvId, eRet);
6699 }
6700
6701 //-----------------------------------------------------------------------------
6702 /// @brief \b Function \b Name: MDrv_HVD_EX_3DLR_View_Exchange()
6703 /// @brief \b Function \b Description: view exchange
6704 /// @param -bEnable \b IN : turn on / off.
6705 /// @return -The result of command setting fd_mask muting count
6706 //-----------------------------------------------------------------------------
MDrv_HVD_EX_3DLR_View_Exchange(MS_U32 u32Id,MS_BOOL bEnable)6707 HVD_EX_Result MDrv_HVD_EX_3DLR_View_Exchange(MS_U32 u32Id, MS_BOOL bEnable)
6708 {
6709 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
6710 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
6711
6712 HVD_EX_MSG_TRACE();
6713 _DRV_HVD_Inited(u8DrvId,eRet);
6714 _DRV_HVD_EX_Entry(u8DrvId);
6715
6716 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_3DLR_VIEW_EXCHANGE, bEnable);
6717
6718 _DRV_HVD_EX_RET(u8DrvId, eRet);
6719 }
6720
6721 //-----------------------------------------------------------------------------
6722 /// @brief \b Function \b Name: MDrv_HVD_GetFrmRateIsSupported()
6723 /// @brief \b Function \b Description: Get if the framerate is supported
6724 /// @return -The result of supported or not.
6725 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetFrmRateIsSupported(MS_U32 u32Id)6726 MS_BOOL MDrv_HVD_EX_GetFrmRateIsSupported(MS_U32 u32Id)
6727 {
6728 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
6729 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
6730 MS_BOOL bRet = pCtrl->bFrmRateSupported;
6731
6732 return bRet;
6733 }
6734
6735
6736 //-----------------------------------------------------------------------------
6737 /// @brief \b Function \b Name: MDrv_HVD_EX_Enable_New_Slow_Motion()
6738 /// @brief \b Function \b Description: view exchange
6739 /// @param -bEnable \b IN : turn on / off.
6740 /// @return -The result of command setting fd_mask muting count
6741 //-----------------------------------------------------------------------------
MDrv_HVD_EX_Enable_New_Slow_Motion(MS_U32 u32Id,MS_BOOL bEnable)6742 HVD_EX_Result MDrv_HVD_EX_Enable_New_Slow_Motion(MS_U32 u32Id, MS_BOOL bEnable)
6743 {
6744 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
6745 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
6746
6747 HVD_EX_MSG_TRACE();
6748 _DRV_HVD_Inited(u8DrvId,eRet);
6749 _DRV_HVD_EX_Entry(u8DrvId);
6750
6751 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_ENABLE_NEW_SLOW_MOTION, bEnable);
6752
6753 _DRV_HVD_EX_RET(u8DrvId, eRet);
6754 }
6755
6756 //------------------------------------------------------------------------------
6757 /// Get SEI USER DATA Info
6758 /// @param pUsrInfo \b OUT : Get CC USER Data info
6759 /// @return -E_HVD_OK for success; E_HVD_FAIL for failure.
6760 //------------------------------------------------------------------------------
MDrv_HVD_EX_GetUserDataInfo(MS_U32 u32Id,HVD_EX_UserData_Info * pUsrInfo)6761 HVD_EX_Result MDrv_HVD_EX_GetUserDataInfo(MS_U32 u32Id,HVD_EX_UserData_Info* pUsrInfo)
6762 {
6763 HVD_EX_Result eRet = E_HVD_EX_FAIL;
6764 MS_U32 u32UserDataIdxSize = 0;
6765 MS_U32 u32UsrDataIdxWptr = 0xFFFFFFFF;
6766 MS_U32 u32UserDataSize = 0;
6767 MS_U32 u32UserDataAddr = 0;
6768 MS_U32 u32CodeVAddr = 0;
6769 DTV_BUF_type* pHVD_User_Data = NULL;
6770 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
6771 HVD_EX_MSG_TRACE();
6772 _DRV_HVD_Inited(u8DrvId,eRet);
6773 _DRV_HVD_EX_Entry(u8DrvId);
6774
6775 u32UserDataIdxSize = (MS_U32)HAL_HVD_EX_GetData(u32Id,E_HVD_GDATA_USERDATA_IDX_TBL_SIZE);
6776 u32UsrDataIdxWptr = MDrv_HVD_EX_GetUserData_Wptr(u32Id);
6777
6778 if (u32UsrDataIdxWptr != 0xFFFFFFFF)
6779 {
6780 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32UsrDataWr = u32UsrDataIdxWptr;
6781 }
6782
6783 if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32UsrDataRd == pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32UsrDataWr)
6784 { // User Data Buffer Empty
6785 _DRV_HVD_EX_RET(u8DrvId, eRet);
6786 }
6787
6788 u32CodeVAddr = pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32CodeBufVAddr;
6789 if(u32CodeVAddr == 0x0)
6790 {
6791 eRet = E_HVD_EX_FAIL;
6792 _DRV_HVD_EX_RET(u8DrvId, eRet);
6793 }
6794
6795 u32UserDataAddr = MDrv_HVD_EX_GetUserData_Packet(u32Id,pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32UsrDataRd, (MS_U32*)&u32UserDataSize );
6796 if(u32UserDataAddr == 0x0)
6797 {
6798 eRet = E_HVD_EX_FAIL;
6799 _DRV_HVD_EX_RET(u8DrvId, eRet);
6800 }
6801 u32UserDataAddr += u32CodeVAddr; // change to virtual address
6802
6803 pHVD_User_Data = (DTV_BUF_type*)u32UserDataAddr;
6804
6805 pUsrInfo->u16TmpRef = pHVD_User_Data->u16TempRefCnt;
6806 pUsrInfo->u8PicStruct = pHVD_User_Data->pic_struct;
6807 pUsrInfo->u8PicType = pHVD_User_Data->type;
6808 pUsrInfo->u32Pts = pHVD_User_Data->pts;
6809 pUsrInfo->u8ByteCnt = pHVD_User_Data->len;
6810 pUsrInfo->u32DataBuf = (MS_U32)pHVD_User_Data->buf;
6811
6812 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32UsrDataRd++;
6813
6814 if (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32UsrDataRd >= u32UserDataIdxSize)
6815 {
6816 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32UsrDataRd = 0;
6817 }
6818
6819 eRet = E_HVD_EX_OK;
6820
6821 _DRV_HVD_EX_RET(u8DrvId, eRet);
6822
6823 }
6824
6825 //------------------------------------------------------------------------------
6826 /// @brief \b Function \b Name: MDrv_HVD_GetUsrDataIsAvailable()
6827 /// @brief \b Function \b Description: Is there new user data info.
6828 /// @return - TRUE/ FALSE
6829 /// @retval -FALSE(0): no new user data info
6830 /// @retval -TRUE(1): has new user data info
6831 //------------------------------------------------------------------------------
MDrv_HVD_EX_GetUsrDataIsAvailable(MS_U32 u32Id)6832 MS_BOOL MDrv_HVD_EX_GetUsrDataIsAvailable(MS_U32 u32Id)
6833 {
6834
6835 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
6836 MS_BOOL bRet = FALSE;
6837 HVD_EX_MSG_TRACE();
6838 _DRV_HVD_EX_Entry(u8DrvId);
6839 MS_U32 u32UsrDataIdxWptr = 0xFFFFFFFF;
6840 u32UsrDataIdxWptr = MDrv_HVD_EX_GetUserData_Wptr(u32Id);
6841
6842 if (u32UsrDataIdxWptr != 0xFFFFFFFF)
6843 {
6844 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32UsrDataWr = u32UsrDataIdxWptr;
6845 }
6846
6847 bRet = (pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32UsrDataWr == pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u32UsrDataRd)?FALSE:TRUE;
6848 _DRV_HVD_EX_RET(u8DrvId, bRet);
6849 }
6850
6851 //------------------------------------------------------------------------------
6852 /// Set HVD DTV User Data Packet Mode
6853 /// @param u8UserDataMode \b IN : User Data Packet Mode. 0: DVB normal, 1: ATSC DirectTV. default:0
6854 /// @return -E_HVD_OK for success; E_HVD_FAIL for failure.
6855 //------------------------------------------------------------------------------
MDrv_HVD_EX_SetDTVUserDataMode(MS_U32 u32Id,MS_U8 u8UserDataMode)6856 HVD_EX_Result MDrv_HVD_EX_SetDTVUserDataMode(MS_U32 u32Id,MS_U8 u8UserDataMode)
6857 {
6858 HVD_EX_Result eRet = E_HVD_EX_FAIL;
6859 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
6860 HVD_EX_MSG_TRACE();
6861 _DRV_HVD_Inited(u8DrvId,eRet);
6862 _DRV_HVD_EX_Entry(u8DrvId);
6863
6864
6865 if (u8UserDataMode == 0)
6866 {
6867 // Noraml DVB USER DATA
6868 eRet = (HVD_EX_Result)HAL_HVD_EX_SetCmd(u32Id,E_HVD_CMD_SET_USERDATA_MODE, 0);
6869 }
6870 else if (u8UserDataMode == 1)
6871 {
6872 eRet = (HVD_EX_Result)HAL_HVD_EX_SetCmd(u32Id,E_HVD_CMD_SET_USERDATA_MODE, 1);
6873 }
6874 else if (u8UserDataMode == 2)
6875 {
6876 eRet = (HVD_EX_Result)HAL_HVD_EX_SetCmd(u32Id,E_HVD_CMD_SET_USERDATA_MODE, 2);
6877 }
6878 else if (u8UserDataMode == 3)
6879 {
6880 eRet = (HVD_EX_Result)HAL_HVD_EX_SetCmd(u32Id,E_HVD_CMD_SET_USERDATA_MODE, 3);
6881 }
6882 else if (u8UserDataMode == 7)
6883 {
6884 eRet = (HVD_EX_Result)HAL_HVD_EX_SetCmd(u32Id,E_HVD_CMD_SET_USERDATA_MODE, 7);
6885 }
6886 else
6887 {
6888 eRet = (HVD_EX_Result)HAL_HVD_EX_SetCmd(u32Id,E_HVD_CMD_SET_USERDATA_MODE, u8UserDataMode);
6889 HVD_PRINT("Debug Mode for set user data mode \n");
6890 }
6891
6892 _DRV_HVD_EX_RET(u8DrvId, eRet);
6893 }
6894
6895
6896 //-----------------------------------------------------------------------------
6897 /// @brief \b Function \b Name: MDrv_HVD_GetFrmPackingArrSEI()
6898 /// @brief \b Function \b Description: Get if the Frame packing arrangement SEI data
6899 /// @param -bEnable \b IN : The frame packing SEI struct
6900 /// @return -The result of got the info. or not.
6901 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetFrmPackingArrSEI(MS_U32 u32Id,HVD_EX_FrmPackingSEI * pFrmPacking)6902 HVD_EX_Result MDrv_HVD_EX_GetFrmPackingArrSEI(MS_U32 u32Id, HVD_EX_FrmPackingSEI *pFrmPacking)
6903 {
6904
6905 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
6906 MS_U32 u32FPAFrameAddr = 0 ;
6907 MS_U32 u32CodeVaddr = 0 ;
6908 HVD_Frame_packing_SEI *pFrmPackingSrc = NULL;
6909 MS_BOOL bIn = FALSE;
6910 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
6911
6912 HVD_EX_MSG_TRACE();
6913 _DRV_HVD_Inited(u8DrvId,eRet);
6914 _DRV_HVD_EX_Entry(u8DrvId);
6915
6916 u32CodeVaddr = MS_PA2KSEG1((MS_U32)(pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32CodeBufAddr));
6917 if(u32CodeVaddr == 0x0)
6918 {
6919 eRet = E_HVD_EX_FAIL;
6920 _DRV_HVD_EX_RET(u8DrvId, eRet);
6921 }
6922
6923 u32FPAFrameAddr = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FRM_PACKING_SEI_DATA);
6924
6925 //u32FPAFrameAddr = HAL_HVD_EX_GetData(u8DrvId,E_HVD_GDATA_FRM_PACKING_SEI_DATA);
6926 if(u32FPAFrameAddr == 0x0)
6927 {
6928 eRet = E_HVD_EX_FAIL;
6929 _DRV_HVD_EX_RET(u8DrvId, eRet);
6930 }
6931
6932 u32FPAFrameAddr = MS_PA2KSEG1((MS_U32)(pHVDDrvContext->gHVDCtrl_EX[u8DrvId].MemMap.u32CodeBufAddr+u32FPAFrameAddr)); // change to virtual address
6933
6934 pFrmPackingSrc = (HVD_Frame_packing_SEI *)u32FPAFrameAddr;
6935
6936 if(pFrmPacking != NULL)
6937 {
6938 if(pFrmPackingSrc->bvaild == TRUE)
6939 {
6940 bIn = TRUE;
6941 pFrmPacking->bvaild = pFrmPackingSrc->bvaild;
6942 pFrmPacking->bUsed = pFrmPackingSrc->bUsed;
6943 pFrmPacking->u8Frm_packing_arr_cnl_flag = pFrmPackingSrc->u8Frm_packing_arr_cnl_flag;
6944 pFrmPacking->u8Frm_packing_arr_type = pFrmPackingSrc->u8Frm_packing_arr_type;
6945 pFrmPacking->u8content_interpretation_type = pFrmPackingSrc->u8content_interpretation_type;
6946 pFrmPacking->u1Quincunx_sampling_flag = pFrmPackingSrc->u1Quincunx_sampling_flag;
6947 pFrmPacking->u1Spatial_flipping_flag = pFrmPackingSrc->u1Spatial_flipping_flag;
6948 pFrmPacking->u1Frame0_flipping_flag = pFrmPackingSrc->u1Frame0_flipping_flag;
6949 pFrmPacking->u1Field_views_flag = pFrmPackingSrc->u1Field_views_flag;
6950 pFrmPacking->u1Current_frame_is_frame0_flag = pFrmPackingSrc->u1Current_frame_is_frame0_flag;
6951 pFrmPacking->u1Frame0_self_contained_flag = pFrmPackingSrc->u1Frame0_self_contained_flag;
6952 pFrmPacking->u1Frame1_self_contained_flag = pFrmPackingSrc->u1Frame1_self_contained_flag;
6953 pFrmPacking->u4Frame0_grid_position_x = pFrmPackingSrc->u4Frame0_grid_position_x;
6954 pFrmPacking->u4Frame0_grid_position_y = pFrmPackingSrc->u4Frame0_grid_position_y;
6955 pFrmPacking->u4Frame1_grid_position_x = pFrmPackingSrc->u4Frame1_grid_position_x;
6956 pFrmPacking->u4Frame1_grid_position_y = pFrmPackingSrc->u4Frame1_grid_position_y;
6957 pFrmPacking->u16CropRight = pFrmPackingSrc->u16CropRight;
6958 pFrmPacking->u16CropLeft = pFrmPackingSrc->u16CropLeft;
6959 pFrmPacking->u16CropBottom = pFrmPackingSrc->u16CropBottom;
6960 pFrmPacking->u16CropTop = pFrmPackingSrc->u16CropTop;
6961
6962 if(pFrmPackingSrc->u8payload_len > 32)
6963 {
6964 pFrmPacking->u8payload_len = 32;
6965 }
6966 else
6967 {
6968 pFrmPacking->u8payload_len = pFrmPackingSrc->u8payload_len;
6969 }
6970
6971 pFrmPacking->u8WaitSPS = pFrmPackingSrc->u8WaitSPS;
6972 pFrmPacking->u32payload = (MS_U32)pFrmPackingSrc->u8payload;
6973
6974 eRet = E_HVD_EX_OK;
6975 }
6976 else
6977 {
6978 eRet = E_HVD_EX_FAIL;
6979 }
6980 HVD_EX_MSG_DBG("SEI status (%d): %d %d %d %d %d %d %d %d\n",bIn,
6981 pFrmPacking->bvaild,pFrmPacking->bUsed,pFrmPacking->u8Frm_packing_arr_cnl_flag,pFrmPacking->u8Frm_packing_arr_type,
6982 pFrmPacking->u16CropRight,pFrmPacking->u16CropLeft,pFrmPacking->u16CropBottom,pFrmPacking->u16CropTop);
6983 }
6984 else
6985 {
6986 eRet = E_HVD_EX_FAIL;
6987 }
6988 _DRV_HVD_EX_RET(u8DrvId, eRet);
6989 }
6990
6991 //-----------------------------------------------------------------------------
6992 /// @brief \b Function \b Name: MDrv_HVD_EX_DynamicScalingResvNBuffer()
6993 /// @brief \b Function \b Description: use N buffers for Dynamic Scaling
6994 /// @param -bEnable \b IN : turn on / off.
6995 /// @return -The result of command to enable/disable N buffer for DS
6996 //-----------------------------------------------------------------------------
MDrv_HVD_EX_DynamicScalingResvNBuffer(MS_U32 u32Id,MS_BOOL bEnable)6997 HVD_EX_Result MDrv_HVD_EX_DynamicScalingResvNBuffer(MS_U32 u32Id, MS_BOOL bEnable)
6998 {
6999 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
7000 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7001
7002 HVD_EX_MSG_TRACE();
7003 _DRV_HVD_Inited(u8DrvId,eRet);
7004 _DRV_HVD_EX_Entry(u8DrvId);
7005
7006 //HVD_PRINT("MDrv_HVD_EX_DynamicScalingResvNBuffer bEnable = %d\n", bEnable);
7007 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DYNAMIC_SCALE_RESV_N_BUFFER, bEnable);
7008
7009 _DRV_HVD_EX_RET(u8DrvId, eRet);
7010 }
7011
7012 //-----------------------------------------------------------------------------
7013 /// @brief \b Function \b Name: MDrv_HVD_EX_GetBBUQNum()
7014 /// @brief \b Function \b Description: Get BBU Q number
7015 /// @return - BBU Q number
7016 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetBBUQNum(MS_U32 u32Id)7017 MS_U32 MDrv_HVD_EX_GetBBUQNum(MS_U32 u32Id)
7018 {
7019 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7020 _DRV_HVD_Inited(u8DrvId,FALSE);
7021
7022 return HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_BBU_Q_NUMB);
7023 }
7024
7025 //-----------------------------------------------------------------------------
7026 /// @brief \b Function \b Name: MDrv_HVD_EX_GetDispFrmNum()
7027 /// @brief \b Function \b Description: Get Disp frame number
7028 /// @return - Disp frame number
7029 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetDispFrmNum(MS_U32 u32Id)7030 MS_U32 MDrv_HVD_EX_GetDispFrmNum(MS_U32 u32Id)
7031 {
7032 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7033 _DRV_HVD_Inited(u8DrvId,FALSE);
7034
7035 return HAL_HVD_EX_GetDispFrmNum(u32Id);
7036 }
7037
7038 //-----------------------------------------------------------------------------
7039 /// @brief \b Function \b Name: MDrv_HVD_EX_SetHVDClock()
7040 /// @brief \b Function \b Description: set hvd clock speed
7041 /// @return - The result of setting hvd clock speed
7042 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetHVDClockSpeed(HVD_EX_ClockSpeed eClockSpeed)7043 HVD_EX_Result MDrv_HVD_EX_SetHVDClockSpeed(HVD_EX_ClockSpeed eClockSpeed)
7044 {
7045 #if defined(CHIP_A3)
7046 HAL_HVD_EX_ClockSpeed eHVDClockSpeed = E_HVD_EX_CLOCK_SPEED_NONE;
7047 switch (eClockSpeed)
7048 {
7049 case E_HVD_EX_CLOCK_SPEED_HIGHEST:
7050 eHVDClockSpeed = E_HAL_HVD_EX_CLOCK_SPEED_HIGHEST;
7051 break;
7052 case E_HVD_EX_CLOCK_SPEED_HIGH:
7053 eHVDClockSpeed = E_HAL_HVD_EX_CLOCK_SPEED_HIGH;
7054 break;
7055 case E_HVD_EX_CLOCK_SPEED_MEDIUM:
7056 eHVDClockSpeed = E_HAL_HVD_EX_CLOCK_SPEED_MEDIUM;
7057 break;
7058 case E_HVD_EX_CLOCK_SPEED_LOW:
7059 eHVDClockSpeed = E_HAL_HVD_EX_CLOCK_SPEED_LOW;
7060 break;
7061 case E_HVD_EX_CLOCK_SPEED_LOWEST:
7062 eHVDClockSpeed = E_HAL_HVD_EX_CLOCK_SPEED_LOWEST;
7063 break;
7064 case E_HVD_EX_CLOCK_SPEED_DEFAULT:
7065 eHVDClockSpeed = E_HAL_HVD_EX_CLOCK_SPEED_DEFAULT;
7066 break;
7067 default:
7068 HVD_EX_MSG_ERR("hvd clock setting is wrong(%d)\n", eClockSpeed);
7069 return E_HVD_EX_FAIL;
7070 break;
7071 }
7072
7073 if(E_HVD_RETURN_SUCCESS != HAL_HVD_EX_SetClockSpeed(eHVDClockSpeed))
7074 {
7075 return E_HVD_EX_FAIL;
7076 }
7077
7078 return E_HVD_EX_OK;
7079 #else
7080 UNUSED(eClockSpeed);
7081 HVD_PRINT("This chip does not support hvd clock presetting~\n");
7082 return E_HVD_EX_RET_UNSUPPORTED;
7083 #endif
7084 }
7085
7086 //-----------------------------------------------------------------------------
7087 /// @brief \b Function \b Name: MDrv_HVD_EX_SetVPUClockSpeed()
7088 /// @brief \b Function \b Description: set vpu clock speed
7089 /// @return - The result of setting vpu clock speed
7090 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetVPUClockSpeed(HVD_EX_ClockSpeed eClockSpeed)7091 HVD_EX_Result MDrv_HVD_EX_SetVPUClockSpeed(HVD_EX_ClockSpeed eClockSpeed)
7092 {
7093 #if defined(CHIP_A3)
7094 HAL_VPU_EX_ClockSpeedType eVPUClockSpeed = E_HAL_VPU_EX_CLOCK_SPEED_NONE;
7095 switch (eClockSpeed)
7096 {
7097 case E_HVD_EX_CLOCK_SPEED_HIGHEST:
7098 eVPUClockSpeed = E_HAL_VPU_EX_CLOCK_SPEED_HIGHEST;
7099 break;
7100 case E_HVD_EX_CLOCK_SPEED_HIGH:
7101 eVPUClockSpeed = E_HAL_VPU_EX_CLOCK_SPEED_HIGH;
7102 break;
7103 case E_HVD_EX_CLOCK_SPEED_MEDIUM:
7104 eVPUClockSpeed = E_HAL_VPU_EX_CLOCK_SPEED_MEDIUM;
7105 break;
7106 case E_HVD_EX_CLOCK_SPEED_LOW:
7107 eVPUClockSpeed = E_HAL_VPU_EX_CLOCK_SPEED_LOW;
7108 break;
7109 case E_HVD_EX_CLOCK_SPEED_LOWEST:
7110 eVPUClockSpeed = E_HAL_VPU_EX_CLOCK_SPEED_LOWEST;
7111 break;
7112 case E_HVD_EX_CLOCK_SPEED_DEFAULT:
7113 eVPUClockSpeed = E_HAL_VPU_EX_CLOCK_SPEED_DEFAULT;
7114 break;
7115 default:
7116 HVD_EX_MSG_ERR("vpu clock setting is wrong(%d)\n", eVPUClockSpeed);
7117 return E_HVD_EX_FAIL;
7118 break;
7119 }
7120
7121 if(FALSE == HAL_VPU_EX_SetClockSpeedType(eVPUClockSpeed))
7122 {
7123 return E_HVD_EX_FAIL;
7124 }
7125
7126 return E_HVD_EX_OK;
7127 #else
7128 UNUSED(eClockSpeed);
7129 HVD_PRINT("This chip does not support vpu clock presetting~\n");
7130 return E_HVD_EX_RET_UNSUPPORTED;
7131 #endif
7132 }
7133
MDrv_HVD_EX_SetHVDColBBUMode(MS_U32 u32Id,MS_U8 bEnable)7134 HVD_EX_Result MDrv_HVD_EX_SetHVDColBBUMode(MS_U32 u32Id, MS_U8 bEnable)
7135 {
7136 #if (defined(CHIP_EDISON) || defined(CHIP_EINSTEIN) || defined(CHIP_EINSTEIN3)) || defined(CHIP_NAPOLI) || defined(CHIP_MONACO) || defined(CHIP_MUJI) || defined(CHIP_CLIPPERS) || defined(CHIP_MONET)
7137 if(E_HVD_RETURN_SUCCESS != HAL_HVD_EX_SetHVDColBBUMode(u32Id, bEnable))
7138 return E_HVD_EX_FAIL;
7139 #endif
7140 return E_HVD_EX_OK;
7141 }
7142
7143 //-----------------------------------------------------------------------------
7144 /// @brief \b Function \b Name: MDrv_HVD_EX_DSReportDispInfoChange()
7145 /// @brief \b Function \b Description: Setting report display info change info. when DS enabled.
7146 /// @param -bEnable \b IN : turn on / off.
7147 /// @return -The result of command to enable/disable Report display info change info.
7148 //-----------------------------------------------------------------------------
MDrv_HVD_EX_DSReportDispInfoChange(MS_U32 u32Id,MS_BOOL bEnable)7149 HVD_EX_Result MDrv_HVD_EX_DSReportDispInfoChange(MS_U32 u32Id, MS_BOOL bEnable)
7150 {
7151 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
7152 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7153
7154 HVD_EX_MSG_TRACE();
7155 _DRV_HVD_Inited(u8DrvId,eRet);
7156 _DRV_HVD_EX_Entry(u8DrvId);
7157
7158 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DS_RESET_XC_DISP_WIN, bEnable);
7159
7160 _DRV_HVD_EX_RET(u8DrvId, eRet);
7161
7162 }
7163
MDrv_HVD_EX_SetSecureMode(MS_U32 u32Id,MS_U32 u32SecureMode)7164 HVD_EX_Result MDrv_HVD_EX_SetSecureMode(MS_U32 u32Id, MS_U32 u32SecureMode)
7165 {
7166 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
7167 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7168
7169 HVD_EX_MSG_TRACE();
7170 _DRV_HVD_Inited(u8DrvId,eRet);
7171 _DRV_HVD_EX_Entry(u8DrvId);
7172
7173 pHVDDrvContext->gHVDCtrl_EX[u8DrvId].u8SecureMode = (MS_U8)u32SecureMode;
7174
7175 _DRV_HVD_EX_RET(u8DrvId, eRet);
7176 }
7177
7178
7179 //-----------------------------------------------------------------------------
7180 /// @brief \b Function \b Name: MDrv_HVD_EX_SupportRefNumOverMaxDpbSize()
7181 /// @brief \b Function \b Description: Support h264 FHD ref frame up to 6
7182 /// @param -bEnable \b IN : turn on / off.
7183 /// @return -The result of command to enable/disable support h264 FHD ref frame up to 6
7184 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SupportRefNumOverMaxDpbSize(MS_U32 u32Id,MS_BOOL bEnable)7185 HVD_EX_Result MDrv_HVD_EX_SupportRefNumOverMaxDpbSize(MS_U32 u32Id, MS_BOOL bEnable)
7186 {
7187 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
7188 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7189
7190 HVD_EX_MSG_TRACE();
7191 _DRV_HVD_Inited(u8DrvId,eRet);
7192 _DRV_HVD_EX_Entry(u8DrvId);
7193
7194 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_AVC_SUPPORT_REF_NUM_OVER_MAX_DPB_SIZE, bEnable);
7195
7196 _DRV_HVD_EX_RET(u8DrvId, eRet);
7197 }
7198
7199 //-----------------------------------------------------------------------------
7200 /// @brief \b Function \b Name: MDrv_HVD_EX_RVU_Setting_Mode()
7201 /// @brief \b Function \b Description: RVU settings
7202 /// @param -u32Param \u32 IN : 0: diable, 1: Drop B-frame and force IDR.
7203 /// @return -The result of command setting E_HVD_CMD_RVU_SETTING_MODE
7204 //-----------------------------------------------------------------------------
MDrv_HVD_EX_RVU_Setting_Mode(MS_U32 u32Id,MS_U32 u32Param)7205 HVD_EX_Result MDrv_HVD_EX_RVU_Setting_Mode(MS_U32 u32Id, MS_U32 u32Param)
7206 {
7207 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
7208 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7209
7210 HVD_EX_MSG_TRACE();
7211 _DRV_HVD_Inited(u8DrvId,eRet);
7212 _DRV_HVD_EX_Entry(u8DrvId);
7213
7214 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_RVU_SETTING_MODE, u32Param);
7215
7216 _DRV_HVD_EX_RET(u8DrvId, eRet);
7217 }
7218
7219
7220 //-----------------------------------------------------------------------------
7221 /// @brief \b Function \b Name: MDrv_HVD_EX_FramerateHandling()
7222 /// @brief \b Function \b Description: FramerateHandling
7223 /// @brief \b A.Case of (timing_info_present_flag == 1)
7224 /// @brief \b i.Use num_units_in_tick and time_scale
7225 /// @brief \b ii.framerate = time_scale / num_units_in_tick / 2
7226 /// @brief \b iii.If calculated framerate from ii.
7227 /// @brief \b iv.If there is no time_scale or num_units_in_tick, framerate should be 30fps as default vaule.
7228 /// @brief \b B.Case of timing_info_present_flag == 0
7229 /// @brief \b i.Use framerate from application
7230 /// @brief \b C.If there is no VUI information, use framerate from application
7231 /// @param -bu32FrameRate \b IN : framerate from application
7232 /// @return -The result of command for handling framerate
7233 //-----------------------------------------------------------------------------
MDrv_HVD_EX_FramerateHandling(MS_U32 u32Id,MS_U32 u32FrameRate)7234 HVD_EX_Result MDrv_HVD_EX_FramerateHandling(MS_U32 u32Id, MS_U32 u32FrameRate)
7235 {
7236 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
7237 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7238
7239 HVD_EX_MSG_TRACE();
7240 _DRV_HVD_Inited(u8DrvId,eRet);
7241 _DRV_HVD_EX_Entry(u8DrvId);
7242
7243 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_FRAMERATE_HANDLING, u32FrameRate);
7244
7245 _DRV_HVD_EX_RET(u8DrvId, eRet);
7246 }
7247
7248 //-----------------------------------------------------------------------------
7249 /// @brief \b Function \b Name: MDrv_HVD_EX_DualNonBlockMode()
7250 /// @brief \b Function \b Description: handle dual non blocking mode
7251 /// @param -bEnable \b IN : turn on / off.
7252 /// @return -The result of command setting E_HVD_CMD_DUAL_NON_BLOCK_MODE
7253 //-----------------------------------------------------------------------------
MDrv_HVD_EX_DualNonBlockMode(MS_U32 u32Id,MS_BOOL bEnable)7254 HVD_EX_Result MDrv_HVD_EX_DualNonBlockMode(MS_U32 u32Id, MS_BOOL bEnable)
7255 {
7256 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
7257 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7258
7259 HVD_EX_MSG_TRACE();
7260 _DRV_HVD_Inited(u8DrvId,eRet);
7261 _DRV_HVD_EX_Entry(u8DrvId);
7262
7263 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_DUAL_NON_BLOCK_MODE, bEnable);
7264
7265 _DRV_HVD_EX_RET(u8DrvId, eRet);
7266 }
7267
7268 //-----------------------------------------------------------------------------
7269 /// @brief \b Function \b Name: MDrv_HVD_EX_IgnorePicStructDisplay()
7270 /// @brief \b Function \b Description: Ignore Pic_struct when display progressive frame.
7271 /// @param -bEnable \b IN : turn on / off.
7272 /// @return -The result of command to enable/disable ignore Pic_struct when display progressive frame.
7273 //-----------------------------------------------------------------------------
MDrv_HVD_EX_IgnorePicStructDisplay(MS_U32 u32Id,MS_U32 param)7274 HVD_EX_Result MDrv_HVD_EX_IgnorePicStructDisplay(MS_U32 u32Id, MS_U32 param)
7275 {
7276 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
7277 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7278
7279 HVD_EX_MSG_TRACE();
7280 _DRV_HVD_Inited(u8DrvId,eRet);
7281 _DRV_HVD_EX_Entry(u8DrvId);
7282
7283 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_IGNORE_PIC_STRUCT_DISPLAY, param);
7284
7285 _DRV_HVD_EX_RET(u8DrvId, eRet);
7286 }
7287
7288 //-----------------------------------------------------------------------------
7289 /// @brief \b Function \b Name: MDrv_HVD_EX_InputPtsFreerunMode()
7290 /// @brief \b Function \b Description: video free run when the difference between input PTS and current STC is large than E_HVD_CMD_FREERUN_THRESHOLD + 1s.
7291 /// @param -bEnable \b IN : turn on / off.
7292 /// @return -The result of command to enable/disable video free run when the difference between input PTS and current STC is large than E_HVD_CMD_FREERUN_THRESHOLD + 1s.
7293 //-----------------------------------------------------------------------------
MDrv_HVD_EX_InputPtsFreerunMode(MS_U32 u32Id,MS_U32 param)7294 HVD_EX_Result MDrv_HVD_EX_InputPtsFreerunMode(MS_U32 u32Id, MS_U32 param)
7295 {
7296 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
7297 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7298
7299 HVD_EX_MSG_TRACE();
7300 _DRV_HVD_Inited(u8DrvId,eRet);
7301 _DRV_HVD_EX_Entry(u8DrvId);
7302
7303 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_INPUT_PTS_FREERUN_MODE, param);
7304
7305 _DRV_HVD_EX_RET(u8DrvId, eRet);
7306 }
7307
7308 //-----------------------------------------------------------------------------
7309 /// @brief \b Function \b Name: MDrv_HVD_EX_ErrConcealStartSlice1stMB()
7310 /// @brief \b Function \b Description: Error concealment from current slice first MB.(Need enable E_HVD_CMD_ERR_CONCEAL)
7311 /// @param -bEnable \b IN : turn on / off.
7312 /// @return -The result of command to enable/disable Error concealment from current slice first MB.(Need enable E_HVD_CMD_ERR_CONCEAL)
7313 //-----------------------------------------------------------------------------
MDrv_HVD_EX_ErrConcealStartSlice1stMB(MS_U32 u32Id,MS_U32 param)7314 HVD_EX_Result MDrv_HVD_EX_ErrConcealStartSlice1stMB(MS_U32 u32Id, MS_U32 param)
7315 {
7316 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
7317 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7318
7319 HVD_EX_MSG_TRACE();
7320 _DRV_HVD_Inited(u8DrvId,eRet);
7321 _DRV_HVD_EX_Entry(u8DrvId);
7322
7323 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_ERR_CONCEAL_SLICE_1ST_MB, param);
7324
7325 _DRV_HVD_EX_RET(u8DrvId, eRet);
7326 }
7327
7328
7329 //-----------------------------------------------------------------------------
7330 /// @brief \b Function \b Name: MDrv_HVD_EX_SetExternalDSBuffer()
7331 /// @brief \b Function \b Description: Set External DS buffer
7332 /// @param -bEnable \b IN : External DS buffer info.
7333 /// @return -The result of command to set external DS buffer.
7334 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetExternalDSBuffer(MS_U32 u32Id,HVD_EX_ExternalDSBuf * pExternalBuf)7335 HVD_EX_Result MDrv_HVD_EX_SetExternalDSBuffer(MS_U32 u32Id, HVD_EX_ExternalDSBuf *pExternalBuf)
7336 {
7337 #define SIZE_3K 0xC00
7338 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
7339 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7340 HVD_ShareMem *pShm = (HVD_ShareMem *) HAL_HVD_EX_GetShmAddr(u32Id);
7341 MS_BOOL bFWInMIU1 = FALSE;
7342 MS_BOOL bExternalInMIU1 = FALSE;
7343 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
7344 MS_VIRT u32DSBufAddr = pExternalBuf->u32DSBufAddr;
7345
7346 HVD_EX_MSG_TRACE();
7347 _DRV_HVD_Inited(u8DrvId,eRet);
7348 _DRV_HVD_EX_Entry(u8DrvId);
7349
7350 if((pShm == NULL) || (pCtrl == NULL) || (pExternalBuf->u32DSBufSize < SIZE_3K)) /// DS buffer size need more than 3K (0xC00)
7351 {
7352 return E_HVD_EX_FAIL;
7353 }
7354
7355 #if defined(CHIP_MONACO)
7356 if(VPU_FORCE_MIU_MODE == 1)
7357 {
7358 HVD_EX_MSG_ERR("this chip does not support set external DS buffer since VPU_FORCE_MIU_MODE == 1 !!\n");
7359 return E_HVD_EX_RET_UNSUPPORTED;
7360 }
7361 #endif
7362
7363 ///printf("[EDS] 0x%lx, 0x%lx.\n",pCtrl->MemMap.u32CodeBufAddr,pCtrl->MemMap.u32MIU1BaseAddr);
7364 if((pCtrl->MemMap.u32CodeBufAddr >= pCtrl->MemMap.u32MIU1BaseAddr) && (pCtrl->MemMap.u32MIU1BaseAddr != 0))
7365 {
7366 bFWInMIU1 = TRUE;
7367 }
7368
7369 if((pExternalBuf->u32DSBufAddr >= pCtrl->MemMap.u32MIU1BaseAddr) && (pCtrl->MemMap.u32MIU1BaseAddr != 0) )
7370 {
7371 bExternalInMIU1 = TRUE;
7372 u32DSBufAddr -= pCtrl->MemMap.u32MIU1BaseAddr;
7373 }
7374 //printf("[EDS] MIU %d, %d.\n",bFWInMIU1,bExternalInMIU1);
7375
7376 /// If FW and external buf is in the same MIU, the External buffer do nothing.
7377 if(bFWInMIU1 == bExternalInMIU1)
7378 {
7379 pShm->u32DSbufferAddr = u32DSBufAddr;
7380 }
7381 else
7382 {
7383 /// If FW and external buf is not in the same MIU, the External buffer add the VPU Miu base size
7384 pShm->u32DSbufferAddr = u32DSBufAddr + HAL_VPU_EX_MIU1BASE();
7385 }
7386 pShm->u32DSBuffSize = pExternalBuf->u32DSBufSize;
7387
7388 MsOS_FlushMemory();
7389 ///printf("[EDS] DS addr = 0x%lx, size = 0x%lx.\n",pShm->u32DSbufferAddr,pShm->u32DSBuffSize);
7390 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_EXTERNAL_DS_BUF, TRUE);
7391
7392 pCtrl->u8SettingMode |= HVD_DRV_MODE_EXTERNAL_DS_BUFFER;
7393 pCtrl->u32ExternalDSbuf = pExternalBuf->u32DSBufAddr;
7394
7395 _DRV_HVD_EX_RET(u8DrvId, eRet);
7396 }
7397
MDrv_HVD_EX_GetESBufferStatus(MS_U32 u32Id)7398 MS_U32 MDrv_HVD_EX_GetESBufferStatus(MS_U32 u32Id)
7399 {
7400 MS_U32 u32Ret = 0;
7401 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7402
7403 _DRV_HVD_Inited(u8DrvId,FALSE);
7404
7405 u32Ret = HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_FW_ES_BUF_STATUS);
7406 u32Ret = _HVD_EX_Map2HVDESBufStatus(u32Ret);
7407
7408 return u32Ret;
7409 }
7410
_HVD_EX_CC_Update_UserData_Wptr(MS_U32 u32Id)7411 static MS_U32 _HVD_EX_CC_Update_UserData_Wptr(MS_U32 u32Id)
7412 {
7413
7414 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7415 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
7416
7417 HVD_CC_Info *pCCInfo = &(pCtrl->CloseCaptionInfo);
7418 MS_U32 u32UsrDataIdxWptr = MDrv_HVD_EX_GetUserData_Wptr(u32Id);
7419
7420 if (u32UsrDataIdxWptr != 0xFFFFFFFF)
7421 pCCInfo->u32FWUsrDataWIdx = u32UsrDataIdxWptr;
7422
7423 return pCCInfo->u32FWUsrDataWIdx;
7424 }
7425
_HVD_EX_CC_Parse_AFD_data(MS_U8 ** pUserDataBuf)7426 static void _HVD_EX_CC_Parse_AFD_data(MS_U8 **pUserDataBuf)
7427 {
7428
7429 (*pUserDataBuf)++;
7430 (*pUserDataBuf)++;
7431
7432 }
7433
_HVD_EX_CC_Parse_BAR_data(MS_U8 ** pUserDataBuf)7434 static void _HVD_EX_CC_Parse_BAR_data(MS_U8 **pUserDataBuf)
7435 {
7436
7437 MS_BOOL bTopBarFlag, bBottomBarFlag, bLeftBarFlag, bRightBarlag;
7438
7439 bTopBarFlag = (((**pUserDataBuf) & 0x80) == 0x80); //u_f(1,"top_bar_flag");
7440 bBottomBarFlag = (((**pUserDataBuf) & 0x40) == 0x40); //u_f(1,"bottom_bar_flag");
7441 bLeftBarFlag = (((**pUserDataBuf) & 0x20) == 0x20); //u_f(1,"left_bar_flag");
7442 bRightBarlag = ((*((*pUserDataBuf)++) & 0x10) == 0x10); //u_f(1,"right_bar_flag"); u_f(4,"reserved");
7443
7444 if (bTopBarFlag)
7445 {
7446 *pUserDataBuf += 2;
7447 }
7448
7449 if (bBottomBarFlag)
7450 {
7451 *pUserDataBuf += 2;
7452 }
7453
7454 if (bLeftBarFlag)
7455 {
7456 *pUserDataBuf += 2;
7457 }
7458
7459 if (bRightBarlag)
7460 {
7461 *pUserDataBuf += 2;
7462 }
7463
7464 }
7465
_HVD_EX_CC_Parse_CC_data(MS_U32 u32Id,MS_U8 u8CCMode,MS_U8 ** pSrc,MS_U8 * pDst608,MS_U32 * pu32Dst608Len,MS_U8 * pDst708,MS_U32 * pu32Dst708Len,HVD_CC_608EnhanceInfo * pEhInfo608)7466 static void _HVD_EX_CC_Parse_CC_data(MS_U32 u32Id, MS_U8 u8CCMode,MS_U8 **pSrc, MS_U8 *pDst608, MS_U32 *pu32Dst608Len, MS_U8 *pDst708, MS_U32 *pu32Dst708Len, HVD_CC_608EnhanceInfo *pEhInfo608)
7467 {
7468 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7469 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
7470
7471 HVD_CC_Info *pCCInfo = &(pCtrl->CloseCaptionInfo);
7472
7473 MS_U32 i,j;
7474 MS_U32 u32CC_Count;
7475 MS_U8 u8CC_Code;
7476 MS_U8 u8CC_Type;
7477 MS_U8 u8CC_Data1, u8CC_Data2;
7478 MS_U32 u32Pad;
7479
7480
7481
7482 u8CC_Code = *((*pSrc)++); //u_f(8,"cc_data_flag cc_count");
7483
7484 u32CC_Count = u8CC_Code & 0x1F; // cc_count
7485 if (!(u8CC_Code & 0x40)) return; // process_cc_data_flag
7486
7487
7488
7489 (*pSrc)++; //u_f(8,"reserved 1");
7490
7491
7492
7493 for (i=0;i<u32CC_Count;i++)
7494 {
7495 MS_U8 u8Code;
7496
7497
7498 u8Code = *((*pSrc)++); // u_f(8,"cc_valid and cc_type");
7499
7500
7501 u8CC_Type = u8Code & 0x03;
7502
7503 u8CC_Data1 = *((*pSrc)++); // u_f(8,"cc_data_1");
7504 u8CC_Data2 = *((*pSrc)++); // u_f(8,"cc_data_2");
7505
7506 if (!(u8Code & 0x04)) continue; // cc_valid
7507
7508 //NTSC CC 608
7509 if ((u8CC_Type == 0) || (u8CC_Type == 1))
7510 {
7511 //g_DTV_CC.ntsc_cc_data[g_DTV_CC.NTSC_element++] = (cc_type << 16) | (cc_data2 << 8) | (cc_data1);
7512
7513 if(pCCInfo->b608InfoEnhance)
7514 {
7515 if( ( (*pu32Dst608Len) + 16) > MAX_608_CC_LEN)
7516 {
7517 HVD_EX_MSG_ERR("u32Dst608Len+16: %ld is larger than MAX_608_CC_LEN !! \n",((*pu32Dst608Len)+16));
7518 return;
7519 }
7520 }
7521 else
7522 {
7523 if( ( (*pu32Dst608Len) + 4) > MAX_608_CC_LEN)
7524 {
7525 HVD_EX_MSG_ERR("u32Dst608Len+4: %ld is larger than MAX_608_CC_LEN !! \n",((*pu32Dst608Len)+4));
7526 return;
7527 }
7528 }
7529
7530 pDst608[(*pu32Dst608Len)++] = u8CC_Data1;
7531 pDst608[(*pu32Dst608Len)++] = u8CC_Data2;
7532 pDst608[(*pu32Dst608Len)++] = u8CC_Type;
7533 pDst608[(*pu32Dst608Len)++] = 0;
7534
7535 if (pCCInfo->b608InfoEnhance)
7536 {
7537 // PTS searched_pts;
7538 //search_pts(pContext, &searched_pts);
7539 pDst608[(*pu32Dst608Len)++] = (pEhInfo608->u16TmpRef&0xff);
7540 pDst608[(*pu32Dst608Len)++] = ((pEhInfo608->u16TmpRef>>8)&0xff);
7541 pDst608[(*pu32Dst608Len)++] = (pEhInfo608->u16PicStruct&0xff);
7542 pDst608[(*pu32Dst608Len)++] = ((pEhInfo608->u16PicStruct>>8)&0xff);
7543 pDst608[(*pu32Dst608Len)++] = (pEhInfo608->u32Pts&0xff);
7544 pDst608[(*pu32Dst608Len)++] = ((pEhInfo608->u32Pts>>8)&0xff);
7545 pDst608[(*pu32Dst608Len)++] = ((pEhInfo608->u32Pts>>16)&0xff);
7546 pDst608[(*pu32Dst608Len)++] = ((pEhInfo608->u32Pts>>24)&0xff);
7547 pDst608[(*pu32Dst608Len)++] = pEhInfo608->u8UsrDataCnt;
7548
7549 // for enhance cc-608 data dump, 16bytes/pkt
7550 u32Pad = (*pu32Dst608Len) & 0xf; //align to 16 byte
7551 if(u32Pad) u32Pad = 16-u32Pad;
7552 for(j=0;j<u32Pad;j++)
7553 pDst608[(*pu32Dst608Len)++] = 0xff;
7554
7555 }
7556
7557
7558
7559
7560 }
7561 else // ATSC_CC 708
7562 {
7563 if( ( (*pu32Dst708Len) + 4) > MAX_708_CC_LEN)
7564 {
7565 HVD_EX_MSG_ERR(" u32Dst708Len+4: %ld is larger than MAX_708_CC_LEN !! \n",((*pu32Dst708Len)+4));
7566 return;
7567 }
7568 pDst708[(*pu32Dst708Len)++] = u8CC_Data1;
7569 pDst708[(*pu32Dst708Len)++] = u8CC_Data2;
7570 pDst708[(*pu32Dst708Len)++] = u8CC_Type;
7571 pDst708[(*pu32Dst708Len)++] = 0;
7572
7573 }
7574 //new DTV CC header
7575
7576 }
7577
7578
7579
7580 //padding cc608
7581
7582
7583 if(u8CCMode & (CC_NTSC1|CC_NTSC2))
7584 {
7585 if (pCCInfo->b608InfoEnhance==0)
7586 { // for original cc-608 data dump, 16bytes/pkt
7587
7588
7589 u32Pad = (*pu32Dst608Len) & 0x7;
7590 if(u32Pad) u32Pad = 8 - u32Pad;
7591
7592 if((u32Pad + (*pu32Dst608Len)) > MAX_608_CC_LEN)
7593 {
7594 HVD_EX_MSG_ERR("u32Dst608Len:%ld + u32Pad: %ld is larger than MAX_608_CC_LEN !! \n",(*pu32Dst608Len), u32Pad);
7595 return;
7596 }
7597 for(i=0;i<u32Pad;i++)
7598 pDst608[(*pu32Dst608Len)++] = 0xff;
7599 }
7600 }
7601
7602
7603 }
7604
7605
_HVD_EX_CC_Extract_CCdata(MS_U32 u32Id,MS_U8 * pDst608Buf,MS_U32 * pu32Dst608Len,MS_U8 * pDst708Buf,MS_U32 * pu32Dst708Len,DTV_BUF_type * pUserData)7606 static void _HVD_EX_CC_Extract_CCdata(MS_U32 u32Id, MS_U8 *pDst608Buf ,MS_U32 *pu32Dst608Len,MS_U8 *pDst708Buf ,MS_U32 *pu32Dst708Len, DTV_BUF_type* pUserData)
7607 {
7608
7609 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7610 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
7611 HVD_CC_Info *pCCInfo = &(pCtrl->CloseCaptionInfo);
7612
7613
7614
7615 MS_U8 * pUserDataStartBuf = &pUserData->buf[0];//&pSrcBuf[0];
7616 MS_U8 * pUserDataBuf;
7617
7618 pUserDataBuf = &pUserData->buf[0];
7619
7620
7621 HVD_CC_608EnhanceInfo stEhInfo608;
7622 stEhInfo608.u16TmpRef = pUserData->u16TempRefCnt;
7623 stEhInfo608.u16PicStruct = (MS_U16)pUserData->pic_struct;
7624 stEhInfo608.u32Pts = pUserData->pts;
7625 stEhInfo608.u8UsrDataCnt = 0;
7626
7627
7628 {
7629 MS_U32 dvb_code;
7630
7631 dvb_code = (*pUserDataBuf << 24) | (*(pUserDataBuf+1) << 16) | (*(pUserDataBuf+2) << 8) | *(pUserDataBuf+3); //(u_f(16,"provider_code") << 16) | u_f(16,"provider_code");
7632 pUserDataBuf += 4;
7633
7634 if (dvb_code == DTV_DTB1_CODE)
7635 {
7636 MS_U8 code;
7637
7638 code = *pUserDataBuf++; //u_f(8,"code");
7639
7640 if (code == DTV_CC_CODE)
7641 {
7642 _HVD_EX_CC_Parse_CC_data(u32Id, pCCInfo->u8ParsingStatus,&pUserDataBuf, pDst608Buf, pu32Dst608Len, pDst708Buf, pu32Dst708Len, &stEhInfo608);
7643 }
7644 else if (code == DTV_BAR_CODE)
7645 {
7646 _HVD_EX_CC_Parse_BAR_data(&pUserDataBuf);
7647 }
7648
7649 }
7650 else if (dvb_code == DTV_AFD_CODE)
7651 {
7652 _HVD_EX_CC_Parse_AFD_data(&pUserDataBuf);
7653 }
7654
7655 }
7656
7657
7658 if((pUserDataBuf - pUserDataStartBuf) > pUserData->len)
7659 HVD_EX_MSG_ERR("ERROR!!!! (pUserDataBuf - pUserDataStartBuf) > u32SrcLen\n");
7660
7661
7662 }
7663
7664
_HVD_EX_CC_RB_Have_Avail_Space(MS_U32 u32Id,MS_U8 u8CC608,MS_U32 u32QuerySize)7665 static MS_BOOL _HVD_EX_CC_RB_Have_Avail_Space(MS_U32 u32Id, MS_U8 u8CC608, MS_U32 u32QuerySize)
7666 {
7667 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7668 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
7669 HVD_CC_Info *pCCInfo = &(pCtrl->CloseCaptionInfo);
7670
7671 MS_U32 u32RingBufVacancy = pCCInfo->u32RingBufVacancy[u8CC608];
7672 MS_U32 u32AlignCCLen;
7673
7674 if ((u32QuerySize % HVD_CCRB_PACKET_LENGTH) != 0)
7675 {
7676 u32AlignCCLen = HVD_CCRB_PACKET_LENGTH * ((u32QuerySize / HVD_CCRB_PACKET_LENGTH)+1);
7677 }
7678 else
7679 {
7680 u32AlignCCLen = u32QuerySize;
7681 }
7682
7683
7684 if(u32RingBufVacancy >= u32AlignCCLen)
7685 return TRUE;
7686 else
7687 return FALSE;
7688
7689
7690 }
7691
_HVD_EX_CC_Copy_CCdata_To_RB(MS_U32 u32Id,MS_U8 u8CC608,MS_U8 * pSrcBuf,MS_U32 u32SrcLen)7692 static MS_BOOL _HVD_EX_CC_Copy_CCdata_To_RB(MS_U32 u32Id, MS_U8 u8CC608,MS_U8 *pSrcBuf, MS_U32 u32SrcLen)
7693 {
7694 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7695 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
7696 HVD_CC_Info *pCCInfo = &(pCtrl->CloseCaptionInfo);
7697
7698 MS_U32 u32RingBufRPAddr = pCCInfo->u32RingBufRPAddr[u8CC608];
7699 MS_U32 u32RingBufWPAddr = pCCInfo->u32RingBufWPAddr[u8CC608];
7700 MS_U32 u32AlignCCLen;
7701
7702
7703
7704 if(u32SrcLen == 0)
7705 return FALSE;
7706
7707
7708
7709 u32AlignCCLen = u32SrcLen;
7710
7711
7712 if(pCCInfo->u32RingBufVacancy[u8CC608] < u32AlignCCLen)
7713 {
7714 HVD_EX_MSG_ERR("overflow !!!, u32RingBufVacancy: %ld, u32AlignLen: %ld\n",pCCInfo->u32RingBufVacancy[u8CC608], u32AlignCCLen);
7715 return TRUE;
7716 }
7717
7718
7719 if(u32RingBufWPAddr >= u32RingBufRPAddr)
7720 {
7721 if( (u32RingBufWPAddr + u32AlignCCLen) <= (pCCInfo->u32RingBufStartPAddr[u8CC608] + pCCInfo->u32RingBufLen[u8CC608]))
7722 {
7723
7724 HVD_memcpy((void *)(HVD_PA2VA(u32RingBufWPAddr)), (void *)pSrcBuf, u32AlignCCLen);
7725
7726
7727 if((pCCInfo->u32RingBufWPAddr[u8CC608] + u32AlignCCLen) == (pCCInfo->u32RingBufStartPAddr[u8CC608] + pCCInfo->u32RingBufLen[u8CC608]))
7728 pCCInfo->u32RingBufWPAddr[u8CC608] = pCCInfo->u32RingBufStartPAddr[u8CC608];
7729 else
7730 pCCInfo->u32RingBufWPAddr[u8CC608] += u32AlignCCLen;
7731
7732 pCCInfo->u32RingBufVacancy[u8CC608] -= u32AlignCCLen;
7733
7734 }
7735 else
7736 {
7737 MS_U32 part1_len = (pCCInfo->u32RingBufStartPAddr[u8CC608] + pCCInfo->u32RingBufLen[u8CC608]) - u32RingBufWPAddr;
7738 MS_U32 part2_len = u32AlignCCLen - part1_len;
7739
7740
7741
7742
7743 {
7744
7745
7746 HVD_memcpy((void *)(HVD_PA2VA(u32RingBufWPAddr)),(void *)pSrcBuf, part1_len);
7747
7748 pCCInfo->u32RingBufWPAddr[u8CC608] = u32RingBufWPAddr = pCCInfo->u32RingBufStartPAddr[u8CC608];
7749
7750 HVD_memcpy((void *)(HVD_PA2VA(u32RingBufWPAddr)),(void *)(&pSrcBuf[part1_len]), part2_len);
7751
7752 pCCInfo->u32RingBufWPAddr[u8CC608] = u32RingBufWPAddr = pCCInfo->u32RingBufStartPAddr[u8CC608] + part2_len;
7753 pCCInfo->u32RingBufVacancy[u8CC608] -= u32AlignCCLen;
7754 }
7755
7756 }
7757
7758 }
7759 else
7760 {
7761
7762
7763 {
7764
7765 HVD_memcpy((void *)(HVD_PA2VA(u32RingBufWPAddr)), (void *)pSrcBuf, u32AlignCCLen);
7766 pCCInfo->u32RingBufWPAddr[u8CC608] += u32AlignCCLen;
7767 pCCInfo->u32RingBufVacancy[u8CC608] -= u32AlignCCLen;
7768 }
7769
7770
7771 }
7772
7773 return FALSE;
7774 }
7775
_HVD_EX_CC_Add_PaddingData_To_608(MS_U32 u32Id,MS_U8 * pSrcBuf,MS_U32 u32SrcLen)7776 static MS_BOOL _HVD_EX_CC_Add_PaddingData_To_608(MS_U32 u32Id, MS_U8 *pSrcBuf, MS_U32 u32SrcLen)
7777 {
7778
7779 MS_U32 u32AlignCCLen;
7780 MS_U32 i;
7781 MS_BOOL b608OverFlow;
7782
7783 if ((u32SrcLen % HVD_CCRB_PACKET_LENGTH) != 0)
7784 {
7785 u32AlignCCLen = HVD_CCRB_PACKET_LENGTH * ((u32SrcLen / HVD_CCRB_PACKET_LENGTH)+1);
7786 }
7787 else
7788 {
7789 u32AlignCCLen = u32SrcLen;
7790 }
7791
7792
7793
7794 if(u32AlignCCLen > MAX_608_CC_LEN)
7795 {
7796 HVD_EX_MSG_ERR("u32AlignCCLen:%ld > MAX_608_CC_LEN", u32AlignCCLen);
7797 return TRUE;
7798 }
7799
7800
7801
7802 for(i =0; i < (u32AlignCCLen-u32SrcLen);i++)
7803 pSrcBuf[u32SrcLen+i] = 0xff;// add padinng data
7804
7805 b608OverFlow =_HVD_EX_CC_Copy_CCdata_To_RB(u32Id, 1, &(pSrcBuf[0]), u32AlignCCLen);
7806 return b608OverFlow;
7807
7808 }
7809
_HVD_EX_CC_Add_PaddingData_To_708(MS_U32 u32Id,MS_U8 * pSrcBuf,MS_U32 u32SrcLen)7810 static MS_BOOL _HVD_EX_CC_Add_PaddingData_To_708(MS_U32 u32Id, MS_U8 *pSrcBuf, MS_U32 u32SrcLen)
7811 {
7812 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7813 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
7814 HVD_CC_Info *pCCInfo = &(pCtrl->CloseCaptionInfo);
7815
7816 MS_U32 *u32RingBufWAddr = (MS_U32 *)(HVD_PA2VA(pCCInfo->u32RingBufWPAddr[0]));
7817
7818 MS_U8 u8CC_Type, u8CC_Data1, u8CC_Data2,u8Temp;
7819 MS_U16 i,j,u16Pad,u16DataCount;
7820 MS_U8 *pAddr;
7821 MS_U8 u8CCPading[MAX_708_CC_LEN];
7822 MS_BOOL b708OverFlow = FALSE;
7823 u16DataCount = 0;
7824
7825 for(j=0;j<u32SrcLen;j+=4)
7826 {
7827 u8CC_Data1 = *pSrcBuf++;
7828 u8CC_Data2 = *pSrcBuf++;
7829 u8CC_Type = *pSrcBuf++;
7830 u8Temp = *pSrcBuf++;
7831
7832 if(u8CC_Type==3) //padd_out();
7833 {
7834 if( pCCInfo->u32PktLen708 > 0 )
7835 {
7836 u16Pad = pCCInfo->u32PktLen708;
7837 for (i=0;i<u16Pad;i++)
7838 u8CCPading[u16DataCount++] = 0xff;
7839 pCCInfo->u32PktLen708 = 0;
7840 #if 1
7841
7842 pAddr = (MS_U8 *)pCCInfo->u32PktHdrAddr708;
7843 if(pAddr)
7844 {
7845 u8Temp = *pAddr;
7846 u16Pad = (u8Temp&0x3f)<<1;
7847 if((i!=0)&&(u16Pad > i))
7848 {
7849 i = i>>1;
7850 u8Temp = u8Temp - i;
7851 *pAddr = (u8Temp&0xff);
7852 }
7853 }
7854 #endif
7855 }
7856
7857 u16Pad = (pCCInfo->u32RingBufWPAddr[0] + u16DataCount) & 7;
7858 if(u16Pad) u16Pad = HVD_CCRB_PACKET_LENGTH-u16Pad;
7859 for(i=0;i<u16Pad;i++)
7860 u8CCPading[u16DataCount++] = 0xff;
7861
7862
7863 b708OverFlow =_HVD_EX_CC_Copy_CCdata_To_RB(u32Id, 0, u8CCPading, u16DataCount);
7864 if(b708OverFlow)
7865 return TRUE;
7866 pCCInfo->u32PktLen708 = (u8CC_Data1 & 0x3f)*2;
7867 if(pCCInfo->u32PktLen708 == 0) pCCInfo->u32PktLen708 = 128;
7868 u16DataCount = 0;
7869
7870 pCCInfo->u32PktHdrAddr708 = (MS_U32)(u32RingBufWAddr);
7871 }
7872
7873 if(pCCInfo->u32PktLen708 > 0)
7874 {
7875 u8CCPading[u16DataCount++] = u8CC_Data1;
7876 u8CCPading[u16DataCount++] = u8CC_Data2;
7877 pCCInfo->u32PktLen708 = pCCInfo->u32PktLen708 - 2;
7878 }
7879 else
7880 {
7881 pCCInfo->u32PktLen708 = 0;
7882 }
7883 }
7884
7885 if(u16DataCount > 0)
7886 {
7887 if( pCCInfo->u32PktLen708 ==0 )
7888 {
7889 u16Pad = (pCCInfo->u32RingBufWPAddr[0] + u16DataCount) & 7;
7890 if(u16Pad) u16Pad = HVD_CCRB_PACKET_LENGTH-u16Pad;
7891 for(i=0;i<u16Pad;i++)
7892 u8CCPading[u16DataCount++] = 0xff;
7893
7894 }
7895
7896 b708OverFlow = _HVD_EX_CC_Copy_CCdata_To_RB(u32Id, 0, u8CCPading, u16DataCount);
7897 if(b708OverFlow)
7898 return TRUE;
7899 }
7900
7901 return FALSE;
7902
7903 }
7904
7905
7906 ///////////////////////////////////////////////////////////////////////////////
7907 /// Closed Caption Driver Initialization
7908 ///////////////////////////////////////////////////////////////////////////////
MDrv_HVD_EX_CC_Init(MS_U32 u32Id)7909 HVD_EX_Result MDrv_HVD_EX_CC_Init(MS_U32 u32Id)
7910 {
7911 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
7912 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7913 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
7914 HVD_CC_Info *pCCInfo = &(pCtrl->CloseCaptionInfo);
7915
7916
7917 HVD_EX_MSG_TRACE();
7918 _DRV_HVD_Inited(u8DrvId,eRet);
7919 _DRV_HVD_EX_Entry(u8DrvId);
7920
7921 pCCInfo->u8UserDataMode = (USER_DATA_MODE_DIRECTTV_CC|USER_DATA_MODE_ATSC_CC_RAW);
7922
7923 eRet = (HVD_EX_Result)HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SET_USERDATA_MODE, pCCInfo->u8UserDataMode);
7924
7925 if (pCCInfo->u8ParsingStatus == 0xff)
7926 pCCInfo->u8ParsingStatus = 0x00;
7927
7928 //eRet = E_HVD_OK;
7929 _DRV_HVD_EX_RET(u8DrvId, eRet);
7930 }
7931
7932 ///////////////////////////////////////////////////////////////////////////////
7933 /// Set Closed Caption config
7934 /// @param u8Operation \b IN Digital Closed Caption Type
7935 /// @param u16BufferSize \b IN buffer size of the given hardware parser
7936 /// @param u8CC608 \b IN
7937 /// - # TRUE for CC608 parser
7938 /// - # FALSE for CC708 parser
7939 ///////////////////////////////////////////////////////////////////////////////
MDrv_HVD_EX_CC_SetCfg(MS_U32 u32Id,MS_U8 u8Operation,MS_U16 u16BufferSize,MS_U8 u8CC608)7940 HVD_EX_Result MDrv_HVD_EX_CC_SetCfg(MS_U32 u32Id, MS_U8 u8Operation, MS_U16 u16BufferSize, MS_U8 u8CC608)
7941 {
7942
7943 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
7944 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7945 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
7946 HVD_CC_Info *pCCInfo = &(pCtrl->CloseCaptionInfo);
7947
7948 HVD_EX_MSG_TRACE();
7949 _DRV_HVD_Inited(u8DrvId,eRet);
7950 _DRV_HVD_EX_Entry(u8DrvId);
7951
7952
7953
7954 pCCInfo->u32RingBufLen[u8CC608] = pCCInfo->u32RingBufVacancy[u8CC608] = u16BufferSize;
7955 pCCInfo->u8ParsingStatus |= u8Operation;
7956 pCCInfo->u8ParsingStatus &= 0x07;
7957
7958 HVD_EX_MSG_DBG("u8Operation: %x, u16BufferSize:%x, u8CC608:%d\n",u8Operation, u16BufferSize,u8CC608);
7959
7960
7961 if (u8CC608==0x00)
7962 pCCInfo->b708Enable = TRUE;
7963
7964 eRet = E_HVD_EX_OK;
7965 _DRV_HVD_EX_RET(u8DrvId, eRet);
7966
7967 }
7968
7969
7970 ///////////////////////////////////////////////////////////////////////////////
7971 /// Set HVD Ring Buffer's Start Address
7972 /// @param u32StartAddress \b IN Ring Buffer's Address
7973 /// @param u8CC608 \b IN
7974 /// - # TRUE for CC608 parser
7975 /// - # FALSE for CC708 parser
7976 ///////////////////////////////////////////////////////////////////////////////
MDrv_HVD_EX_CC_Set_RB_StartAddr(MS_U32 u32Id,MS_U32 u32StartPAddress,MS_U8 u8CC608)7977 HVD_EX_Result MDrv_HVD_EX_CC_Set_RB_StartAddr(MS_U32 u32Id, MS_U32 u32StartPAddress, MS_U8 u8CC608)
7978 {
7979 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
7980 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
7981 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
7982 HVD_CC_Info *pCCInfo = &(pCtrl->CloseCaptionInfo);
7983
7984 MS_U8 u8MiuSel;
7985 MS_U32 u32StartOffset;
7986
7987 HVD_EX_MSG_TRACE();
7988 _DRV_HVD_Inited(u8DrvId,eRet);
7989 _DRV_HVD_EX_Entry(u8DrvId);
7990
7991 _phy_to_miu_offset(u8MiuSel,u32StartOffset,u32StartPAddress);
7992
7993 pCCInfo->u8BufMiuSel[u8CC608] = u8MiuSel;
7994 /*
7995 if ( (u32StartPAddress & pCtrl->MemMap.u32MIU1BaseAddr) == pCtrl->MemMap.u32MIU1BaseAddr)
7996 {
7997 pCCInfo->bBufMiu1[u8CC608] = TRUE;
7998 }
7999 else
8000 {
8001 pCCInfo->bBufMiu1[u8CC608] = FALSE;
8002 }*/
8003
8004
8005 HVD_EX_MSG_DBG("u32StartPAddress: 0x%lx ,u8CC608: 0x%x, pCCInfo->u8BufMiuSel[u8CC608]: %d, pCtrl->MemMap.u32MIU1BaseAddr: 0x%lx, pCtrl->MemMap.u32MIU2BaseAddr: 0x%lx\n",
8006 u32StartPAddress , u8CC608,pCCInfo->u8BufMiuSel[u8CC608], pCtrl->MemMap.u32MIU1BaseAddr, pCtrl->MemMap.u32MIU2BaseAddr);
8007
8008
8009 pCCInfo->u32RingBufStartPAddr[u8CC608] = pCCInfo->u32RingBufRPAddr[u8CC608] = pCCInfo->u32RingBufWPAddr[u8CC608] = u32StartPAddress;
8010 if(pCCInfo->u32RingBufLen[u8CC608] > 0)
8011 pCCInfo->u32RingBufVacancy[u8CC608] = pCCInfo->u32RingBufLen[u8CC608];
8012
8013
8014 _HVD_EX_CC_Update_UserData_Wptr(u32Id);
8015 pCCInfo->u32FWUsrDataRIdx = /*pCCInfo->u32FWUsrDataPrevWIdx =*/ pCCInfo->u32FWUsrDataWIdx;
8016
8017
8018 eRet = E_HVD_EX_OK;
8019 _DRV_HVD_EX_RET(u8DrvId, eRet);
8020
8021 }
8022
8023
8024 ///////////////////////////////////////////////////////////////////////////////
8025 /// Set HVD Ring Buffer's Read Address as Write Address
8026 /// @param u8CC608 \b IN
8027 /// - # TRUE for CC608 parser
8028 /// - # FALSE for CC708 parser
8029 ///////////////////////////////////////////////////////////////////////////////
MDrv_HVD_EX_CC_SyncRB_RdAddr2WrAddr(MS_U32 u32Id,MS_U8 u8CC608)8030 HVD_EX_Result MDrv_HVD_EX_CC_SyncRB_RdAddr2WrAddr(MS_U32 u32Id, MS_U8 u8CC608)
8031 {
8032 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
8033 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
8034 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
8035 HVD_CC_Info *pCCInfo = &(pCtrl->CloseCaptionInfo);
8036
8037
8038 pCCInfo->u32RingBufRPAddr[u8CC608] = pCCInfo->u32RingBufWPAddr[u8CC608];//u32ReadAddress;
8039 _HVD_EX_CC_Update_UserData_Wptr(u32Id);
8040 pCCInfo->u32FWUsrDataRIdx = pCCInfo->u32FWUsrDataWIdx;
8041 if(pCCInfo->u32RingBufLen[u8CC608] > 0)
8042 pCCInfo->u32RingBufVacancy[u8CC608] = pCCInfo->u32RingBufLen[u8CC608];
8043 eRet = E_HVD_EX_OK;
8044 _DRV_HVD_EX_RET(u8DrvId, eRet);
8045
8046 }
8047
8048 ///////////////////////////////////////////////////////////////////////////////
8049 /// Advance Read Address of HVD CC Ring Buffer by u32EachPacketSize
8050 /// @param u32EachPacketSize \b IN
8051 /// @param u8CC608 \b IN
8052 /// - # TRUE for CC608 parser
8053 /// - # FALSE for CC708 parser
8054 ///////////////////////////////////////////////////////////////////////////////
MDrv_HVD_EX_CC_Adv_RB_ReadAddr(MS_U32 u32Id,MS_U32 u32EachPacketSize,MS_U8 u8CC608)8055 HVD_EX_Result MDrv_HVD_EX_CC_Adv_RB_ReadAddr(MS_U32 u32Id, MS_U32 u32EachPacketSize, MS_U8 u8CC608)
8056 {
8057
8058 HVD_EX_Result eRet = E_HVD_EX_FAIL;
8059 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
8060 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
8061 HVD_CC_Info *pCCInfo = &(pCtrl->CloseCaptionInfo);
8062
8063 MS_U32 u32ParsedDataSize;
8064
8065 // Get the Parsed Data Size
8066 if ((u32EachPacketSize % HVD_CCRB_PACKET_LENGTH) != 0)
8067 {
8068 u32ParsedDataSize = HVD_CCRB_PACKET_LENGTH * ((u32EachPacketSize / HVD_CCRB_PACKET_LENGTH)+1); //HVD_CCRB_PACKET_LENGTH bytes alignment
8069 }
8070 else
8071 {
8072 u32ParsedDataSize = u32EachPacketSize;
8073 }
8074
8075 if(u32ParsedDataSize > (pCCInfo->u32RingBufLen[u8CC608] - pCCInfo->u32RingBufVacancy[u8CC608]))
8076 {
8077 HVD_EX_MSG_ERR("MDrv_HVD_CC_Adv_RB_ReadAddr fail!, no enough data!, vacancy: %ld, u32ParsedDataSize: %ld, u32RingBufLen:%ld, u32RingBufRPAddr: 0x%lx, u32RingBufWPAddr: 0x%lx\n",
8078 pCCInfo->u32RingBufVacancy[u8CC608], u32ParsedDataSize, pCCInfo->u32RingBufLen[u8CC608], pCCInfo->u32RingBufRPAddr[u8CC608],pCCInfo->u32RingBufWPAddr[u8CC608]);
8079 return E_HVD_EX_FAIL;
8080 }
8081
8082
8083 if ((pCCInfo->u32RingBufRPAddr[u8CC608] + u32ParsedDataSize) < (pCCInfo->u32RingBufStartPAddr[u8CC608] + pCCInfo->u32RingBufLen[u8CC608]))
8084 {
8085 pCCInfo->u32RingBufRPAddr[u8CC608] += u32ParsedDataSize;
8086 }
8087 else
8088 {
8089 pCCInfo->u32RingBufRPAddr[u8CC608] = (u32ParsedDataSize + pCCInfo->u32RingBufRPAddr[u8CC608] - pCCInfo->u32RingBufLen[u8CC608]);
8090 }
8091
8092 pCCInfo->u32RingBufVacancy[u8CC608] += u32ParsedDataSize ;
8093
8094 eRet = E_HVD_EX_OK;
8095 _DRV_HVD_EX_RET(u8DrvId, eRet);
8096
8097 }
8098
8099 ///////////////////////////////////////////////////////////////////////////////
8100 /// Stop HVD CC parsing
8101 /// @param u8CC608 \b IN
8102 /// - # TRUE for CC608 parser
8103 /// - # FALSE for CC708 parser
8104 ///////////////////////////////////////////////////////////////////////////////
MDrv_HVD_EX_CC_DisableParsing(MS_U32 u32Id,MS_U8 u8CC608)8105 HVD_EX_Result MDrv_HVD_EX_CC_DisableParsing(MS_U32 u32Id, MS_U8 u8CC608)
8106 {
8107
8108 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
8109 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
8110 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
8111 HVD_CC_Info *pCCInfo = &(pCtrl->CloseCaptionInfo);
8112
8113 if (u8CC608==0)
8114 {
8115 pCCInfo->u8ParsingStatus &= ~0x04;
8116 pCCInfo->b708Enable = FALSE;
8117 }
8118 else
8119 pCCInfo->u8ParsingStatus &= ~0x03;
8120
8121 pCCInfo->u8ParsingStatus &= 0x07;
8122
8123 eRet = E_HVD_EX_OK;
8124 _DRV_HVD_EX_RET(u8DrvId, eRet);
8125 }
8126
8127
MDrv_HVD_EX_CC_GetInfo(MS_U32 u32Id,MS_U32 selector,MS_U8 type,MS_U32 * p1,MS_U32 * p2)8128 HVD_EX_Result MDrv_HVD_EX_CC_GetInfo(MS_U32 u32Id, MS_U32 selector, MS_U8 type, MS_U32 *p1, MS_U32 *p2)
8129 {
8130
8131 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
8132 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
8133 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
8134 HVD_CC_Info *pCCInfo = &(pCtrl->CloseCaptionInfo);
8135
8136 // Functionality select
8137 switch (selector)
8138 {
8139 case HVD_EX_CC_SELECTOR_708_SW:
8140 *p1 = (MS_U32)pCCInfo->b708Enable;
8141 break;
8142
8143 #if defined( MSOS_TYPE_LINUX )
8144 case HVD_EX_CC_SELECTOR_RINGBUFFER:
8145 {
8146 MS_U32 u32PAddr;
8147 u32PAddr = pCCInfo->u32RingBufStartPAddr[type];
8148 *p1 = u32PAddr;
8149 *p2 = (MS_U32) pCCInfo->u32RingBufLen[type];
8150 }
8151 break;
8152 #endif
8153
8154 default:
8155 *p1 = *p2 = 0;
8156 break;
8157 }
8158 eRet = E_HVD_EX_OK;
8159 _DRV_HVD_EX_RET(u8DrvId, eRet);
8160 }
8161
8162
MDrv_HVD_EX_CC_IsHvdRstDone(MS_U32 u32Id,MS_U8 type)8163 MS_BOOL MDrv_HVD_EX_CC_IsHvdRstDone(MS_U32 u32Id, MS_U8 type)
8164 {
8165 MS_BOOL bRet = FALSE;
8166
8167 bRet = TRUE;
8168
8169 return bRet;
8170 }
8171
8172 ///////////////////////////////////////////////////////////////////////////////
8173 /// Get Overflow Status of HVD CC Ring Buffer
8174 /// @param u8CC608 \b IN
8175 /// - # TRUE for CC608 parser
8176 /// - # FALSE for CC708 parser
8177 /// Return value:: Overflow Status Flag
8178 ////////////////////////////////////////////////////////////////////////////////
MDrv_HVD_EX_CC_GetOverflowStatus(MS_U32 u32Id,MS_U8 u8CC608)8179 MS_U8 MDrv_HVD_EX_CC_GetOverflowStatus(MS_U32 u32Id, MS_U8 u8CC608)
8180 {
8181
8182 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
8183 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
8184 HVD_CC_Info *pCCInfo = &(pCtrl->CloseCaptionInfo);
8185
8186 MS_BOOL bOverFlow = pCCInfo->bOverFlow[u8CC608];
8187 pCCInfo->bOverFlow[u8CC608] = FALSE;
8188 return (bOverFlow);
8189 }
8190
8191
8192
8193
8194
8195 ///////////////////////////////////////////////////////////////////////////////
8196 /// Get Write Address of HVD CC Ring Buffer
8197 /// @param u8CC608 \b IN
8198 /// - # TRUE for CC608 parser
8199 /// - # FALSE for CC708 parser
8200 /// Return value:: Write Address
8201 ///////////////////////////////////////////////////////////////////////////////
MDrv_HVD_EX_CC_Get_RB_WriteAddr(MS_U32 u32Id,MS_U8 u8CC608)8202 MS_U32 MDrv_HVD_EX_CC_Get_RB_WriteAddr(MS_U32 u32Id, MS_U8 u8CC608)
8203 {
8204
8205 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
8206 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
8207 MS_U32 u32UserDataIdxSize = 0;
8208 MS_U32 u32UsrDataIdxWptr = 0xFFFFFFFF;
8209 MS_U32 u32UserDataSize = 0;
8210 MS_U32 u32UserDataAddr = 0;
8211 DTV_BUF_type* pHVD_User_Data = NULL;
8212
8213 HVD_CC_Info *pCCInfo = &(pCtrl->CloseCaptionInfo);
8214 MS_U32 u32FwParseCnt;
8215 MS_U32 u32PAddr;
8216
8217
8218 if ((pCCInfo->u8ParsingStatus == 0xff) || (pCCInfo->u8ParsingStatus == 0x00))
8219 {
8220
8221 u32PAddr = pCCInfo->u32RingBufWPAddr[u8CC608];
8222 /*
8223 if(!pCCInfo->bBufMiu1[u8CC608])
8224 u32PAddr = u32PAddr & (pCtrl->MemMap.u32MIU1BaseAddr - 1);
8225 */
8226 if(pCCInfo->u8BufMiuSel[u8CC608] == E_CHIP_MIU_0)
8227 u32PAddr = u32PAddr & (pCtrl->MemMap.u32MIU1BaseAddr - 1);
8228
8229
8230 return u32PAddr;
8231 }
8232
8233 u32UserDataIdxSize = (MS_U32)HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_USERDATA_IDX_TBL_SIZE);
8234
8235 u32UsrDataIdxWptr =_HVD_EX_CC_Update_UserData_Wptr(u32Id);
8236
8237
8238
8239 if (pCCInfo->u32FWUsrDataRIdx == u32UsrDataIdxWptr)
8240 {
8241 // User Data Buffer Empty
8242 HVD_EX_MSG_DBG("RIdx(%ld) == WIdx(%ld) , empty !!!\n", pCCInfo->u32FWUsrDataRIdx,u32UsrDataIdxWptr);
8243 u32PAddr = pCCInfo->u32RingBufWPAddr[u8CC608];
8244
8245 if(pCCInfo->u8BufMiuSel[u8CC608] == E_CHIP_MIU_0)
8246 u32PAddr = u32PAddr & (pCtrl->MemMap.u32MIU1BaseAddr - 1);
8247
8248 return u32PAddr;
8249
8250 }
8251 else if (u32UsrDataIdxWptr > pCCInfo->u32FWUsrDataRIdx)
8252 {
8253 u32FwParseCnt = u32UsrDataIdxWptr - pCCInfo->u32FWUsrDataRIdx;
8254 }
8255 else// pCCInfo->u32FWUsrDataWIdx < pCCInfo->u32FWUsrDataRIdx
8256 {
8257 u32FwParseCnt = u32UserDataIdxSize - (pCCInfo->u32FWUsrDataRIdx - u32UsrDataIdxWptr);
8258 }
8259
8260 HVD_EX_MSG_DBG("u32FwParseCnt(%ld) !!!, pCCInfo->u32RingBufWPAddr[%d]: 0x%lx\n", u32FwParseCnt, u8CC608,pCCInfo->u32RingBufWPAddr[u8CC608] );
8261
8262 MS_BOOL b608OverFlow = FALSE, b708OverFlow = FALSE;
8263 MS_U8 *pCC608buf = &(pCCInfo->u8CC608buf[0]);
8264 MS_U8 *pCC708buf = &(pCCInfo->u8CC708buf[0]);
8265 MS_U32 u32CC608Len = 0;
8266 MS_U32 u32CC708Len = 0;
8267
8268
8269
8270
8271 while(u32FwParseCnt)
8272 {
8273
8274
8275
8276 if( (!_HVD_EX_CC_RB_Have_Avail_Space(u32Id, 1, MAX_608_CC_LEN)) || (!_HVD_EX_CC_RB_Have_Avail_Space(u32Id, 0, MAX_708_CC_LEN)))
8277 {
8278 HVD_EX_MSG_DBG("not have available space!!!\n");
8279 break;
8280 }
8281 u32UserDataAddr = MDrv_HVD_EX_GetUserData_Packet(u32Id, pCCInfo->u32FWUsrDataRIdx, (MS_U32*)&u32UserDataSize);
8282 u32UserDataAddr += pCtrl->MemMap.u32CodeBufVAddr; // change to virtual address
8283
8284 pHVD_User_Data = (DTV_BUF_type*)u32UserDataAddr;
8285
8286 u32CC608Len = 0;
8287 u32CC708Len = 0;
8288
8289
8290
8291 _HVD_EX_CC_Extract_CCdata(u32Id, pCC608buf, &u32CC608Len,pCC708buf, &u32CC708Len, pHVD_User_Data);
8292
8293 if(u32CC608Len > 0)
8294 b608OverFlow =_HVD_EX_CC_Add_PaddingData_To_608(u32Id, &(pCCInfo->u8CC608buf[0]), u32CC608Len);
8295
8296
8297
8298
8299 if(u32CC708Len > 0)
8300 b708OverFlow = _HVD_EX_CC_Add_PaddingData_To_708(u32Id, &(pCCInfo->u8CC708buf[0]), u32CC708Len);
8301 //b708OverFlow =_HVD_CC_Copy_CCdata_To_RB(0, &CC708buf[0], u32CC708Len);
8302
8303
8304
8305
8306 if(b608OverFlow)
8307 {
8308 HVD_EX_MSG_ERR("##### Critical error!!!! b608OverFlow: %d!!!\n",b608OverFlow);
8309 pCCInfo->bOverFlow[1] = TRUE;
8310 }
8311
8312 if(b708OverFlow)
8313 {
8314 HVD_EX_MSG_ERR("##### Critical error!!!! b708OverFlow:%d !!!\n",b708OverFlow);
8315 pCCInfo->bOverFlow[0] = TRUE;
8316 }
8317
8318
8319
8320 pCCInfo->u32FWUsrDataRIdx++;
8321
8322 if (pCCInfo->u32FWUsrDataRIdx >= u32UserDataIdxSize)
8323 {
8324 pCCInfo->u32FWUsrDataRIdx = 0;
8325 }
8326
8327
8328 u32FwParseCnt--;
8329 }
8330
8331
8332 u32PAddr = pCCInfo->u32RingBufWPAddr[u8CC608];
8333 if(pCCInfo->u8BufMiuSel[u8CC608] == E_CHIP_MIU_0)
8334 u32PAddr = u32PAddr & (pCtrl->MemMap.u32MIU1BaseAddr - 1);
8335
8336 return u32PAddr;
8337
8338
8339
8340 }
8341
8342
8343 ///////////////////////////////////////////////////////////////////////////////
8344 /// Get Read Address of HVD CC Ring Buffer
8345 /// @param u8CC608 \b IN
8346 /// - # TRUE for CC608 parser
8347 /// - # FALSE for CC708 parser
8348 /// Return value:: Read Address
8349 ///////////////////////////////////////////////////////////////////////////////
MDrv_HVD_EX_CC_Get_RB_ReadAddr(MS_U32 u32Id,MS_U8 u8CC608)8350 MS_U32 MDrv_HVD_EX_CC_Get_RB_ReadAddr(MS_U32 u32Id, MS_U8 u8CC608)
8351 {
8352
8353 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
8354 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
8355 HVD_CC_Info *pCCInfo = &(pCtrl->CloseCaptionInfo);
8356
8357 MS_U32 u32PAddr = pCCInfo->u32RingBufRPAddr[u8CC608];
8358 if(pCCInfo->u8BufMiuSel[u8CC608] == E_CHIP_MIU_0)
8359 u32PAddr = u32PAddr & (pCtrl->MemMap.u32MIU1BaseAddr - 1);
8360
8361 return u32PAddr;
8362
8363 }
8364
8365 ///////////////////////////////////////////////////////////////////////////////
8366 /// Enhance CC info mode, only support cc608
8367 /// @param bEnable \b IN
8368 /// - # TRUE for enhance to dump the pts/tmp_ref info
8369 /// - # FALSE for original
8370 ///////////////////////////////////////////////////////////////////////////////
MDrv_HVD_EX_CC_InfoEnhanceMode(MS_U32 u32Id,MS_BOOL bEnable)8371 MS_BOOL MDrv_HVD_EX_CC_InfoEnhanceMode(MS_U32 u32Id, MS_BOOL bEnable)
8372 {
8373
8374 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
8375 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
8376 HVD_CC_Info *pCCInfo = &(pCtrl->CloseCaptionInfo);
8377
8378 pCCInfo->b608InfoEnhance = bEnable;
8379
8380 return TRUE;
8381 }
8382
8383
8384
8385
MDrv_HVD_EX_SetExternal_CC608_Buffer(MS_U32 u32Id,MS_U32 u32Addr,MS_U32 u32Len)8386 HVD_EX_Result MDrv_HVD_EX_SetExternal_CC608_Buffer(MS_U32 u32Id, MS_U32 u32Addr, MS_U32 u32Len)
8387 {
8388 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
8389 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
8390 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
8391 MS_U8 u8UserDataMode = (USER_DATA_MODE_DIRECTTV_CC|USER_DATA_MODE_ATSC_CC_RAW|USER_DATA_MODE_EXTERNAL_CC_BUFFER);
8392 MS_U32 u32CCinfo;
8393
8394 HVD_EX_MSG_TRACE();
8395 _DRV_HVD_Inited(u8DrvId,eRet);
8396 _DRV_HVD_EX_Entry(u8DrvId);
8397
8398 u32Addr <<= 10;// 1kbytes unit
8399 u32Len <<= 10; // 1kbytes unit
8400
8401 // Read Ptr (4 bytes), Write Ptr (4 bytes), Latch Bit (2 bytes), overflow (2 bytes), Miu Base Address (4 bytes)
8402 MS_U32 *u32ReadPtr = (MS_U32 *)(HVD_PA2VA(u32Addr));
8403 MS_U32 *u32WritePtr = (MS_U32 *)(HVD_PA2VA(u32Addr+4));
8404 MS_U32 *u32LatchOverflow = (MS_U32 *)(HVD_PA2VA(u32Addr+8));
8405 MS_U32 *u32FWBinaryAddr = (MS_U32 *)(HVD_PA2VA(u32Addr+12));
8406
8407 *u32ReadPtr = *u32WritePtr = u32Addr+EXT_608_CC_DATA_ALIGN;
8408 *u32LatchOverflow = 0;
8409
8410
8411 u32Addr -= pCtrl->MemMap.u32FWBinaryAddr;
8412 *u32FWBinaryAddr = pCtrl->MemMap.u32FWBinaryAddr;
8413
8414 u32CCinfo = ((u32Addr >> 10) << 8) & 0xffffff00; //arg[31:8] * 1kbytes
8415 u32CCinfo |= ((u32Len >> 10) & 0xff); //arg[7:0] *1kbytes
8416
8417 eRet = (HVD_EX_Result)HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SET_USERDATA_MODE, u8UserDataMode);
8418
8419 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_ENABLE_EXTERNAL_CC_608_BUF, u32CCinfo);
8420
8421 _DRV_HVD_EX_RET(u8DrvId, eRet);
8422
8423
8424 }
8425
MDrv_HVD_EX_SetExternal_CC708_Buffer(MS_U32 u32Id,MS_U32 u32Addr,MS_U32 u32Len)8426 HVD_EX_Result MDrv_HVD_EX_SetExternal_CC708_Buffer(MS_U32 u32Id, MS_U32 u32Addr, MS_U32 u32Len)
8427 {
8428
8429 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
8430 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
8431 HVD_EX_Drv_Ctrl *pCtrl = &(pHVDDrvContext->gHVDCtrl_EX[u8DrvId]);
8432 MS_U8 u8UserDataMode = (USER_DATA_MODE_DIRECTTV_CC|USER_DATA_MODE_ATSC_CC_RAW|USER_DATA_MODE_EXTERNAL_CC_BUFFER);
8433 MS_U32 u32CCinfo;
8434
8435 HVD_EX_MSG_TRACE();
8436 _DRV_HVD_Inited(u8DrvId,eRet);
8437 _DRV_HVD_EX_Entry(u8DrvId);
8438
8439 u32Addr <<= 10;// 1kbytes unit
8440 u32Len <<= 10; // 1kbytes unit
8441
8442 // Read Ptr (4 bytes), Write Ptr (4 bytes), Latch Bit (2 bytes), overflow (2 bytes), Miu Base Address (4 bytes)
8443 MS_U32 *u32ReadPtr = (MS_U32 *)(HVD_PA2VA(u32Addr));
8444 MS_U32 *u32WritePtr = (MS_U32 *)(HVD_PA2VA(u32Addr+4));
8445 MS_U32 *u32LatchOverflow = (MS_U32 *)(HVD_PA2VA(u32Addr+8));
8446 MS_U32 *u32FWBinaryAddr = (MS_U32 *)(HVD_PA2VA(u32Addr+12));
8447
8448
8449 MS_U32 i;
8450 MS_U8 *u8ResvAddr = (MS_U8 *)((HVD_PA2VA(u32Addr))+EXT_CC_INFO_LENGTH);
8451 for(i=0;i< (EXT_708_CC_DATA_ALIGN- EXT_CC_INFO_LENGTH) ;i++)
8452 {
8453 u8ResvAddr[i] = 0xff;
8454 }
8455
8456
8457
8458 *u32ReadPtr = *u32WritePtr = u32Addr+EXT_708_CC_DATA_ALIGN;
8459 *u32LatchOverflow = 0;
8460
8461 u32Addr -= pCtrl->MemMap.u32FWBinaryAddr;
8462 *u32FWBinaryAddr = pCtrl->MemMap.u32FWBinaryAddr;
8463
8464
8465 u32CCinfo = ((u32Addr >> 10) << 8) & 0xffffff00; //arg[31:8] * 1kbytes
8466 u32CCinfo |= ((u32Len >> 10) & 0xff); //arg[7:0] *1kbytes
8467
8468 eRet = (HVD_EX_Result)HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SET_USERDATA_MODE, u8UserDataMode);
8469
8470 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_ENABLE_EXTERNAL_CC_708_BUF, u32CCinfo);
8471
8472 _DRV_HVD_EX_RET(u8DrvId, eRet);
8473 }
8474
8475
8476 //-----------------------------------------------------------------------------
8477 /// @brief \b Function \b Name: MDrv_HVD_EX_ShowFirstFrameDirect()
8478 /// @brief \b Function \b Description: Push First Frame to Display Queue Directly
8479 /// @param -bEnable \b IN : Enable/Disable
8480 /// @return -E_HVD_EX_OK for success; E_HVD_EX_FAIL for failure.
8481 //-----------------------------------------------------------------------------
MDrv_HVD_EX_ShowFirstFrameDirect(MS_U32 u32Id,MS_BOOL bEnable)8482 HVD_EX_Result MDrv_HVD_EX_ShowFirstFrameDirect(MS_U32 u32Id, MS_BOOL bEnable)
8483 {
8484 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
8485 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
8486
8487 HVD_EX_MSG_TRACE();
8488 _DRV_HVD_Inited(u8DrvId,eRet);
8489 _DRV_HVD_EX_Entry(u8DrvId);
8490
8491 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SHOW_FIRST_FRAME_DIRECT, bEnable);
8492
8493 _DRV_HVD_EX_RET(u8DrvId, eRet);
8494 }
8495
8496 //-----------------------------------------------------------------------------
8497 /// @brief \b Function \b Name: MDrv_HVD_EX_AVCResizeDosDispPendBuf()
8498 /// @brief \b Function \b Description: Resize disp pending buffer size for display outside mode(dos),
8499 /// @param -u32Size \b IN : size of display pending buffer
8500 /// @return -E_HVD_EX_OK for success; E_HVD_EX_FAIL for failure.
8501 //-----------------------------------------------------------------------------
MDrv_HVD_EX_AVCResizeDosDispPendBuf(MS_U32 u32Id,MS_U32 u32Size)8502 HVD_EX_Result MDrv_HVD_EX_AVCResizeDosDispPendBuf(MS_U32 u32Id, MS_U32 u32Size)
8503 {
8504 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
8505 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
8506
8507 HVD_EX_MSG_TRACE();
8508 _DRV_HVD_Inited(u8DrvId,eRet);
8509 _DRV_HVD_EX_Entry(u8DrvId);
8510
8511 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_AVC_RESIZE_DOS_DISP_PEND_BUF, u32Size);
8512
8513 _DRV_HVD_EX_RET(u8DrvId, eRet);
8514 }
8515 //-----------------------------------------------------------------------------
8516 /// @brief \b Function \b Name: MDrv_HVD_EX_SetDmxFrameRate()
8517 /// @brief \b Function \b Description: set the demuxer prefered frame rate.
8518 /// @param -eMode \b IN : mode type
8519 /// @return -The result is successful or not
8520 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetDmxFrameRate(MS_U32 u32Id,MS_U32 u32Value)8521 HVD_EX_Result MDrv_HVD_EX_SetDmxFrameRate(MS_U32 u32Id, MS_U32 u32Value)
8522 {
8523 return (HVD_EX_Result) HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_DMX_FRAMERATE, u32Value);
8524 }
8525
8526 //-----------------------------------------------------------------------------
8527 /// @brief \b Function \b Name: MDrv_HVD_EX_SetDmxFrameRateBase()
8528 /// @brief \b Function \b Description: set the demuxer prefered frame rate.
8529 /// @param -eMode \b IN : mode type
8530 /// @return -The result is successful or not
8531 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetDmxFrameRateBase(MS_U32 u32Id,MS_U32 u32Value)8532 HVD_EX_Result MDrv_HVD_EX_SetDmxFrameRateBase(MS_U32 u32Id, MS_U32 u32Value)
8533 {
8534 return (HVD_EX_Result) HAL_HVD_EX_SetData(u32Id, E_HVD_SDATA_DMX_FRAMERATEBASE, u32Value);
8535 }
8536
8537 //-----------------------------------------------------------------------------
8538 /// @brief \b Function \b Name: MDrv_HVD_EX_GetSupport2ndMVOPInterface()
8539 /// @brief \b Function \b Description: Get if support 2nd MVOP interface.
8540 /// @param : none
8541 /// @return -The result is true or false
8542 //-----------------------------------------------------------------------------
MDrv_HVD_EX_GetSupport2ndMVOPInterface(void)8543 MS_BOOL MDrv_HVD_EX_GetSupport2ndMVOPInterface(void)
8544 {
8545 return HAL_HVD_EX_GetSupport2ndMVOPInterface();
8546 }
8547
8548 //-----------------------------------------------------------------------------
8549 /// @brief \b Function \b Name: MDrv_HVD_EX_SetVPUSecureMode()
8550 /// @brief \b Function \b Description: Set secure mode for HVD Drv.
8551 /// @param : none
8552 /// @return -The result is true or false
8553 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetVPUSecureMode(MS_BOOL bEnable)8554 MS_BOOL MDrv_HVD_EX_SetVPUSecureMode(MS_BOOL bEnable)
8555 {
8556 pHVDDrvContext->bVPUIsSecureMode = bEnable;
8557 return TRUE;
8558 }
8559
MDrv_HVD_EX_OnePendingBufferMode(MS_U32 u32Id,MS_BOOL bEnable)8560 HVD_EX_Result MDrv_HVD_EX_OnePendingBufferMode(MS_U32 u32Id,MS_BOOL bEnable)
8561 {
8562 HVD_EX_Result eRet = E_HVD_EX_OK;
8563
8564 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
8565
8566 pHVDDrvContext->gHVDPreCtrl[u8DrvId].bOnePendingBuffer = bEnable;
8567 _DRV_HVD_EX_RET(u8DrvId, eRet);
8568 }
8569
MDrv_HVD_EX_TsInBbuMode(MS_U32 u32Id,MS_BOOL bDisable)8570 HVD_EX_Result MDrv_HVD_EX_TsInBbuMode(MS_U32 u32Id,MS_BOOL bDisable)
8571 {
8572 HVD_EX_Result eRet = E_HVD_EX_OK;
8573
8574 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
8575
8576 pHVDDrvContext->gHVDPreCtrl[u8DrvId].bDisableTspInBbuMode = bDisable;
8577 _DRV_HVD_EX_RET(u8DrvId, eRet);
8578 }
MDrv_HVD_EX_IapGnBufShareBWMode(MS_U32 u32Id,MS_BOOL bEnable,MS_U32 u32IapGnBufAddr,MS_U32 u32IapGnBufSize)8579 HVD_EX_Result MDrv_HVD_EX_IapGnBufShareBWMode(MS_U32 u32Id,MS_BOOL bEnable, MS_U32 u32IapGnBufAddr, MS_U32 u32IapGnBufSize)
8580 {
8581 HVD_EX_Result eRet = E_HVD_EX_OK;
8582
8583 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
8584
8585 pHVDDrvContext->gHVDPreCtrl[u8DrvId].stIapGnShBWMode.bEnable = bEnable;
8586 pHVDDrvContext->gHVDPreCtrl[u8DrvId].stIapGnShBWMode.u32IapGnBufAddr = u32IapGnBufAddr;
8587 pHVDDrvContext->gHVDPreCtrl[u8DrvId].stIapGnShBWMode.u32IapGnBufSize = u32IapGnBufSize;
8588 _DRV_HVD_EX_RET(u8DrvId, eRet);
8589 }
8590
8591 //-----------------------------------------------------------------------------
8592 /// @brief \b Function \b Name: MDrv_HVD_EX_SetPTSUsecMode()
8593 /// @brief \b Function \b Description: enable/disable PTS output by micro second level,
8594 /// @param -bEnable \b IN :enable/disable
8595 /// @return -E_HVD_EX_OK for success; E_HVD_EX_FAIL for failure.
8596 //-----------------------------------------------------------------------------
MDrv_HVD_EX_SetPTSUsecMode(MS_U32 u32Id,MS_BOOL bEnable)8597 HVD_EX_Result MDrv_HVD_EX_SetPTSUsecMode(MS_U32 u32Id, MS_BOOL bEnable)
8598 {
8599 HVD_EX_Result eRet = E_HVD_EX_OK;
8600 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
8601
8602 HVD_EX_MSG_TRACE();
8603 _DRV_HVD_Inited(u8DrvId,eRet);
8604 _DRV_HVD_EX_Entry(u8DrvId);
8605
8606 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_SET_PTS_US_MODE, bEnable);
8607
8608 _DRV_HVD_EX_RET(u8DrvId, eRet);
8609 }
8610
8611 //-----------------------------------------------------------------------------
8612 /// @brief \b Function \b Name: MDrv_HVD_EX_PVRTimeShiftSeamlessMode()
8613 /// @brief \b Function \b Description:
8614 /// @param -bEnable \b IN :
8615 /// @return -E_HVD_EX_OK for success; E_HVD_EX_FAIL for failure.
8616 //-----------------------------------------------------------------------------
MDrv_HVD_EX_PVRTimeShiftSeamlessMode(MS_U32 u32Id,MS_U8 u8Arg)8617 HVD_EX_Result MDrv_HVD_EX_PVRTimeShiftSeamlessMode(MS_U32 u32Id, MS_U8 u8Arg)
8618 {
8619 HVD_EX_Result eRet = E_HVD_EX_RET_ILLEGAL_ACCESS;
8620 MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
8621
8622 HVD_EX_MSG_TRACE();
8623 _DRV_HVD_Inited(u8DrvId,eRet);
8624 _DRV_HVD_EX_Entry(u8DrvId);
8625
8626 eRet = (HVD_EX_Result) HAL_HVD_EX_SetCmd(u32Id, E_HVD_CMD_PVR_SEAMLESS_TIMESHIFT, u8Arg);
8627
8628 if ((u8Arg == 1) || (u8Arg == 2)) //u8Arg=1 needs about 50ms, u8Arg=2 needs about 30ms
8629 {
8630 MS_U32 u32Status = (u8Arg==1)?(E_HVD_SEAMLESS_PAUSE_DECODE):(E_HVD_SEAMLESS_RESET_HW_DONE);
8631 MS_U32 u32Times = 0;
8632
8633 HVD_EX_MSG_DBG("TS Seamless. Arg=%d, polling status start at %ld \n", u8Arg, HVD_GetSysTime_ms());
8634
8635 while (1)
8636 {
8637 if (HAL_HVD_EX_GetData(u32Id, E_HVD_GDATA_TS_SEAMLESS_STATUS) & u32Status)
8638 {
8639 HVD_EX_MSG_DBG("TS Seamless status change done. Arg=%d. Status=0x%lx at %ld \n", u8Arg, u32Status, HVD_GetSysTime_ms());
8640 break;
8641 }
8642
8643 u32Times++;
8644 HVD_Delay_ms(1);
8645
8646 if (u32Times > 500)
8647 {
8648 HVD_EX_MSG_ERR("Timeout!!! TS Seamless status change is not finished. Arg=%d. Status=0x%lx at %ld \n", u8Arg, u32Status, HVD_GetSysTime_ms());
8649 eRet = E_HVD_EX_FAIL;
8650 break;
8651 }
8652 }
8653 }
8654
8655 _DRV_HVD_EX_RET(u8DrvId, eRet);
8656 }
MDrv_HVD_EX_BBU_Proc(MS_U32 u32Id)8657 void MDrv_HVD_EX_BBU_Proc(MS_U32 u32Id)
8658 {
8659 HAL_HVD_EX_BBU_Proc(u32Id);
8660 }
MDrv_HVD_EX_BBU_StopProc(MS_U32 u32Id)8661 void MDrv_HVD_EX_BBU_StopProc(MS_U32 u32Id)
8662 {
8663 HAL_HVD_EX_BBU_StopProc(u32Id);
8664 }
8665
MDrv_HVD_EX_CHIP_Capability(void * pHWCap)8666 MS_U8 MDrv_HVD_EX_CHIP_Capability(void* pHWCap)
8667 {
8668 return HAL_VPU_EX_CHIP_Capability(pHWCap);
8669 }
8670
8671 #else
MDrv_HVD_EX_LoadCodeInSecure(MS_U32 addr)8672 MS_BOOL MDrv_HVD_EX_LoadCodeInSecure(MS_U32 addr)
8673 {
8674 return HAL_VPU_EX_LoadCodeInSecure(addr);
8675 }
8676
MDrv_HVD_EX_SetLockDownRegister(void * param)8677 MS_BOOL MDrv_HVD_EX_SetLockDownRegister(void* param)
8678 {
8679 if(param == NULL)
8680 {
8681 return FALSE;
8682 }
8683 return HAL_VPU_EX_SetLockDownRegister(param);
8684 }
8685
8686 #endif
8687
8688
8689
8690
8691