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77 //<MStar Software>
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93 ////////////////////////////////////////////////////////////////////////////////
94
95 ///////////////////////////////////////////////////////////////////////////////////////////////////
96 ///
97 /// file drvHVD_sub.c
98 /// @brief SubHVD Driver Interface
99 /// @author MStar Semiconductor Inc.
100 ///////////////////////////////////////////////////////////////////////////////////////////////////
101 #if defined(SUPPORT_HVD_SUB)
102 //-------------------------------------------------------------------------------------------------
103 // Include Files
104 //-------------------------------------------------------------------------------------------------
105 // Common Definition
106 #include "drvHVD_Common.h"
107 #include "drvHVD.h"
108 #include "drvHVD_def.h"
109 #include "drvHVD_sub.h"
110 #include "drvHVD_sub_def.h"
111
112 #if defined(CHIP_T2)
113 #include "halSVD.h"
114 #include "regSVD.h"
115 #include "fwSVD_if.h"
116 #else
117 #include "halHVD.h"
118 #include "halHVD_sub.h"
119 #include "fwHVD_if.h"
120 #include "halVPU.h"
121 #endif
122
123 #if HVD_ENABLE_AUTO_SET_REG_BASE
124 #include "drvMMIO.h"
125 #endif
126
127 //-------------------------------------------------------------------------------------------------
128 // Driver Compiler Options
129 //-------------------------------------------------------------------------------------------------
130
131
132 //-------------------------------------------------------------------------------------------------
133 // Local Defines
134 //-------------------------------------------------------------------------------------------------
135 // Drv memory usage
136 #if defined(REDLION_LINUX_KERNEL_ENVI)
137 #define HVD_DTV_VIDEO_DELAY 0 // ms
138 #else
139 #define HVD_DTV_VIDEO_DELAY 0 // ms
140 #endif
141 #define HVD_FW_CMD_TIMEOUT_DEFAULT 100 // ms
142 #define HVD_FW_EXIT_ACTION_TIMEOUT 3500 // ms
143
144 #define HVD_CTRL_INIT_FINISHED BIT(0) // deflaut: 0
145 #define HVD_CTRL_PROCESSING BIT(1) // deflaut: 0
146 #define HVD_CTRL_DATA_END BIT(2) // deflaut: 0
147 #define HVD_CTRL_DISPLAY_CTRL BIT(3) // deflaut: 0
148 #define HVD_CTRL_DISP_INFO_RDY BIT(4) // deflaut: 0
149 #define HVD_CTRL_CODE_MIU_1 BIT(5) // deflaut: 0
150 #define HVD_CTRL_ES_MIU_1 BIT(6) // deflaut: 0
151 #define HVD_CTRL_FRM_MIU_1 BIT(7) // deflaut: 0
152 #define HVD_CTRL_DRVPROCC_MIU_1 BIT(8) // deflaut: 0
153
154 typedef enum
155 {
156 E_HVD_CHECK_CMD_NONE = 0, //decode -> decode_finish
157 E_HVD_CHECK_CMD_INIT,
158 E_HVD_CHECK_CMD_TRIGGER_DISP,
159 E_HVD_CHECK_CMD_SEEK2PTS,
160 E_HVD_CHECK_CMD_MAX,
161 } HVD_Check_Cmd;
162
163 #define HVD_MIU_PROTECT_HVD BIT(0)
164 #define HVD_MIU_PROTECT_MVD BIT(1)
165 #define HVD_MIU_PROTECT_VPU BIT(2)
166
167 #define _DRV_HVD_Entry() {gSubHVDCtrl.u32CtrlMode |= HVD_CTRL_PROCESSING;}
168 #define _DRV_HVD_Return(_ret) {gSubHVDCtrl.u32CtrlMode &= (~HVD_CTRL_PROCESSING); return (_ret);}
169
170 #define _DRV_HVD_Initedn() {if( !bHVDIsInited ){ return ; }}
171 #define _DRV_HVD_Inited(_ret) {if( !bHVDIsInited ){ return (_ret); }}
172 #define _DRV_HVD_Rsting(_ret) {if( bHVDIsIniting ){ return (_ret); }}
173 #define _DRV_HVD_Ctrl(x) ( gSubHVDCtrl.u32CtrlMode & (x) )
174 #define _DRV_HVD_SetCtrl(x) { gSubHVDCtrl.u32CtrlMode |= (x); }
175
176 //-------------------------------------------------------------------------------------------------
177 // Local Structurs
178 //-------------------------------------------------------------------------------------------------
179
180 //-------------------------------------------------------------------------------------------------
181 // Global Variables
182 //-------------------------------------------------------------------------------------------------
183 HVD_Drv_Ctrl gSubHVDCtrl;
184 MS_U32 u32SubUartCtrl=(E_HVD_UART_CTRL_ERR|E_HVD_UART_CTRL_MUST);
185 MS_U32 u32SubInitSysTimeBase=0;
186 //-------------------------------------------------------------------------------------------------
187 // Local Variables
188 //-------------------------------------------------------------------------------------------------
189 static HVD_DrvInfo DrvInfo;
190 static MS_BOOL bHVDIsInited=FALSE;
191 static MS_BOOL bHVDIsIniting=FALSE;
192 static HVD_ISR_Ctrl gHVDISRCtrl={ FALSE, FALSE, 0 , NULL };
193 static HVD_BBU_Info gHVDPacket={0,0,0,0,0,0, FALSE};
194 static unsigned char u8_4Lines[64];
195 //MS_U8 pu8HVD_DMAcpy_pool[20];
196
197 static HVD_Result _DRV_HVD_Sub_InitVariables(HVD_MemCfg *pStMemCfg, HVD_Init_Params *pStInitParams);
198 static HVD_Result _DRV_HVD_Sub_Check_Cmd(HVD_Check_Cmd etype);
199 static HVD_Result _DRV_HVD_Sub_InitFW_AVC(void);
200 static HVD_Result _DRV_HVD_Sub_Check_FW_Version(void);
201 static HVD_Result _DRV_HVD_Sub_InitFW(void);
202
203 //-------------------------------------------------------------------------------------------------
204 // Debug Functions
205 //-------------------------------------------------------------------------------------------------
206
207
208 //-------------------------------------------------------------------------------------------------
209 // Local Functions
210 //-------------------------------------------------------------------------------------------------
_HVD_Sub_Chip_Flush_Memory(void)211 void _HVD_Sub_Chip_Flush_Memory(void)
212 {
213 unsigned char *pu8;
214 volatile unsigned char tmp;
215
216 // Transfer the memory to noncache memory
217 // Flush the data from pipe and buffer in MIU
218 if( gSubHVDCtrl.u32DummyWriteBuf != 0 )
219 {
220 pu8 = ((unsigned char *)(((unsigned int)gSubHVDCtrl.u32DummyWriteBuf ) ));
221 #if 1
222 pu8[0] = pu8[16] = pu8[32] = pu8[48] = 1;
223 #else
224 // TODO: this patch is necessary for T3_nos_mips & simpleplayer.
225 {
226 MS_U32 cnt=0;
227 for (cnt = 0; cnt < 128; cnt++)
228 {
229 *pu8 = 1;
230 pu8++;
231 }
232 }
233 #endif
234 }
235 else
236 {
237 pu8 = ((unsigned char *)(((unsigned int)u8_4Lines) ));
238 pu8[0] = pu8[16] = pu8[32] = pu8[48] = 1;
239 }
240
241 // Flush the data in the EC bridge buffer
242 //mb();
243 HAL_MEMORY_BARRIER();
244
245 // final read
246 tmp = pu8[0] ;
247 tmp = pu8[16] ;
248 tmp = pu8[32] ;
249 tmp = pu8[48] ;
250 }
251
_HVD_Sub_Chip_Read_Memory(void)252 void _HVD_Sub_Chip_Read_Memory(void)
253 {
254 volatile unsigned char *pu8;
255 volatile unsigned int t;
256
257 // Transfer the memory to noncache memory
258 pu8 = (volatile unsigned char *)(((unsigned int)gSubHVDCtrl.MemMap.u32CodeBufVAddr));
259
260 t = pu8[0];
261 t = pu8[64];
262 }
263
_DRV_HVD_Sub_InitVariables(HVD_MemCfg * pStMemCfg,HVD_Init_Params * pStInitParams)264 static HVD_Result _DRV_HVD_Sub_InitVariables(HVD_MemCfg *pStMemCfg, HVD_Init_Params *pStInitParams)
265 {
266 HVD_memset((void *) &gSubHVDCtrl, 0, sizeof(HVD_Drv_Ctrl));
267
268 if (sizeof(HVD_Init_Params) == sizeof(HVD_Init_Settings))
269 {
270 HVD_memcpy((void *) &gSubHVDCtrl.InitParams,
271 pStInitParams,
272 sizeof(HVD_Init_Params));
273 }
274 else
275 {
276 HVD_SUB_MSG_ERR("HVD Err: HVD struct define is diff: HVD_Init_Params(%lu) vs HVD_Init_Settings(%lu)\n",
277 (MS_U32)sizeof(HVD_Init_Params),
278 (MS_U32)sizeof(HVD_Init_Settings));
279 return E_HVD_FAIL;
280 }
281
282 // fill memory
283 #if 0
284 HVD_memcpy( (void*)&gSubHVDCtrl.MemMap , pStMemCfg , sizeof(HVD_Mem_Map) );
285 #else
286 if (pStMemCfg->u32MIU1BaseAddr == 0)
287 {
288 #if HVD_ENABLE_MSOS_MIU1_BASE
289 gSubHVDCtrl.MemMap.u32MIU1BaseAddr= HAL_MIU1_BASE;
290 #else
291 gSubHVDCtrl.MemMap.u32MIU1BaseAddr= HVD_MIU1_BASE_ADDRESS;
292 #endif
293 }
294 else
295 {
296 gSubHVDCtrl.MemMap.u32MIU1BaseAddr = pStMemCfg->u32MIU1BaseAddr;
297 }
298
299 gSubHVDCtrl.MemMap.eFWSourceType = (HVD_FWInputSourceType) pStMemCfg->eFWSourceType;
300 gSubHVDCtrl.MemMap.u32FWBinaryVAddr = pStMemCfg->u32FWBinaryVAddr;
301 gSubHVDCtrl.MemMap.u32FWBinaryAddr = (MS_U32) pStMemCfg->u32FWBinaryAddr;
302 gSubHVDCtrl.MemMap.u32FWBinarySize = pStMemCfg->u32FWBinarySize;
303 gSubHVDCtrl.MemMap.u32VLCBinaryVAddr = pStMemCfg->u32VLCBinaryVAddr;
304 gSubHVDCtrl.MemMap.u32VLCBinaryAddr = (MS_U32) pStMemCfg->u32VLCBinaryAddr;
305 gSubHVDCtrl.MemMap.u32VLCBinarySize = pStMemCfg->u32VLCBinarySize;
306
307 gSubHVDCtrl.MemMap.u32CodeBufVAddr = pStMemCfg->u32CodeBufVAddr;
308 gSubHVDCtrl.MemMap.u32CodeBufAddr = (MS_U32) pStMemCfg->u32CodeBufAddr;
309 gSubHVDCtrl.MemMap.u32CodeBufSize = pStMemCfg->u32CodeBufSize;
310 gSubHVDCtrl.MemMap.u32FrameBufVAddr = pStMemCfg->u32FrameBufVAddr;
311 gSubHVDCtrl.MemMap.u32FrameBufAddr = (MS_U32) pStMemCfg->u32FrameBufAddr;
312 gSubHVDCtrl.MemMap.u32FrameBufSize = pStMemCfg->u32FrameBufSize;
313 gSubHVDCtrl.MemMap.u32BitstreamBufVAddr= pStMemCfg->u32BitstreamBufVAddr;
314 gSubHVDCtrl.MemMap.u32BitstreamBufAddr = (MS_U32) pStMemCfg->u32BitstreamBufAddr ;
315 gSubHVDCtrl.MemMap.u32BitstreamBufSize = pStMemCfg->u32BitstreamBufSize ;
316 gSubHVDCtrl.MemMap.u32DrvProcessBufVAddr = pStMemCfg->u32DrvProcessBufVAddr;
317 gSubHVDCtrl.MemMap.u32DrvProcessBufAddr = (MS_U32)pStMemCfg->u32DrvProcessBufAddr;
318 gSubHVDCtrl.MemMap.u32DrvProcessBufSize = pStMemCfg->u32DrvProcessBufSize;
319 #endif
320 // get non-cache address
321 #if 0
322 if( pStMemCfg->u32CPUNonCacheMask == 0 )
323 {
324 #if defined (__aeon__)
325 #if defined (CHIP_T2)
326 gSubHVDCtrl.u32CPUNonCacheMask=0x80000000;
327 #else
328 gSubHVDCtrl.u32CPUNonCacheMask=0xC0000000;
329 #endif
330 #else // MIPS
331 gSubHVDCtrl.u32CPUNonCacheMask=0xA0000000;
332 #endif
333 }
334 else
335 {
336 gSubHVDCtrl.u32CPUNonCacheMask = pStMemCfg->u32CPUNonCacheMask;
337 }
338 #if defined( MSOS_TYPE_LINUX) || defined(REDLION_LINUX_KERNEL_ENVI)
339 gSubHVDCtrl.u32CPUNonCacheMask=0;
340 #endif
341 // Virtual address to physical
342 #if 0
343 gSubHVDCtrl.MemMap.u32CodeBufAddr= HVD_VA2PA( pStMemCfg->u32CodeBufVAddr ) ;
344 gSubHVDCtrl.MemMap.u32FrameBufAddr= HVD_VA2PA( pStMemCfg->u32FrameBufVAddr ) ;
345 gSubHVDCtrl.MemMap.u32BitstreamBufAddr= HVD_VA2PA( pStMemCfg->u32BitstreamBufVAddr ) ;
346 gSubHVDCtrl.MemMap.u32DrvProcessBufAddr = HVD_VA2PA( pStMemCfg->u32DrvProcessBufVAddr ) ;
347 #endif
348 // remove non-cache
349 gSubHVDCtrl.MemMap.u32BitstreamBufAddr &= (~gSubHVDCtrl.u32CPUNonCacheMask);
350 gSubHVDCtrl.MemMap.u32CodeBufAddr &= (~gSubHVDCtrl.u32CPUNonCacheMask);
351 gSubHVDCtrl.MemMap.u32FrameBufAddr &= (~gSubHVDCtrl.u32CPUNonCacheMask);
352 gSubHVDCtrl.MemMap.u32DrvProcessBufAddr &= (~gSubHVDCtrl.u32CPUNonCacheMask);
353 #endif
354 HVD_SUB_MSG_INFO("HVD mmap: MIU1base:%lx FW(%d %lx %lx %lx)vlc(%lx %lx %lx) (Va,Pa,Siz)Co(%lx %lx %lx)Fr(%lx %lx %lx)Bit(%lx %lx %lx) Drv(%lx %lx %lx)\n",
355 gSubHVDCtrl.MemMap.u32MIU1BaseAddr,
356 gSubHVDCtrl.MemMap.eFWSourceType,
357 gSubHVDCtrl.MemMap.u32FWBinaryVAddr,
358 gSubHVDCtrl.MemMap.u32FWBinaryAddr,
359 gSubHVDCtrl.MemMap.u32FWBinarySize,
360 gSubHVDCtrl.MemMap.u32VLCBinaryVAddr,
361 gSubHVDCtrl.MemMap.u32VLCBinaryAddr,
362 gSubHVDCtrl.MemMap.u32VLCBinarySize,
363 pStMemCfg->u32CodeBufVAddr,
364 gSubHVDCtrl.MemMap.u32CodeBufAddr,
365 gSubHVDCtrl.MemMap.u32CodeBufSize,
366 pStMemCfg->u32FrameBufVAddr,
367 gSubHVDCtrl.MemMap.u32FrameBufAddr,
368 gSubHVDCtrl.MemMap.u32FrameBufSize,
369 pStMemCfg->u32BitstreamBufVAddr,
370 gSubHVDCtrl.MemMap.u32BitstreamBufAddr,
371 gSubHVDCtrl.MemMap.u32BitstreamBufSize,
372 pStMemCfg->u32DrvProcessBufVAddr,
373 gSubHVDCtrl.MemMap.u32DrvProcessBufAddr,
374 gSubHVDCtrl.MemMap.u32DrvProcessBufSize);
375
376 gSubHVDCtrl.InitParams.u16DecoderClock = HAL_HVD_Sub_GetCorretClock(pStInitParams->u16DecoderClock);
377 {
378 MS_U32 offset = HAL_HVD_Sub_GetData(E_HVD_GDATA_FW_DUMMY_WRITE_ADDR);
379
380 if (offset != 0)
381 {
382 gSubHVDCtrl.u32DummyWriteBuf = gSubHVDCtrl.MemMap.u32CodeBufVAddr + offset;
383 }
384 }
385
386 #if HVD_ENABLE_STOP_ACCESS_OVER_256
387 gSubHVDCtrl.bCannotAccessMIU256 = TRUE;
388 #endif
389
390 gSubHVDCtrl.bAutoRmLastZeroByte = TRUE;
391 gSubHVDCtrl.u32CmdTimeout = HVD_FW_CMD_TIMEOUT_DEFAULT;
392
393 if (pStInitParams->u8TurboInit & E_HVD_TURBOINIT_FW_RELOAD)
394 {
395 gSubHVDCtrl.bTurboFWMode = TRUE;
396 }
397
398 #if !(defined(CHIP_T2) || defined(CHIP_T7))
399 gSubHVDCtrl.Settings.u32MiuBurstLevel = (MS_U32)E_HVD_BURST_CNT_DISABLE;
400 #endif
401
402 return E_HVD_OK;
403 }
404
_DRV_HVD_Sub_Check_Cmd(HVD_Check_Cmd eCmd)405 static HVD_Result _DRV_HVD_Sub_Check_Cmd(HVD_Check_Cmd eCmd)
406 {
407 MS_U32 u32Tmp0 = 0;
408 MS_U32 u32Tmp1 = 0;
409
410 switch (eCmd)
411 {
412 case E_HVD_CHECK_CMD_INIT:
413 {
414 if (!(gSubHVDCtrl.InitParams.u8TurboInit & E_HVD_TURBOINIT_CHECK))
415 {
416 // Check mode
417 u32Tmp0 = gSubHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_HW_MASK;
418
419 if (!MDrv_HVD_Sub_GetCaps((HVD_Codec) u32Tmp0))
420 {
421 HVD_SUB_MSG_ERR("Check Cmd Err: Init: HW not support type:%d\n", eCmd);
422 return E_HVD_RET_UNSUPPORTED;
423 }
424
425 u32Tmp0 = gSubHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK;
426
427 if (u32Tmp0 == HVD_INIT_MAIN_LIVE_STREAM)
428 {
429 if ((gSubHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_INPUT_MASK) == HVD_INIT_INPUT_DRV)
430 {
431 HVD_SUB_MSG_ERR("Check Cmd Err: Init: Live stream mode can not use Drv input\n");
432 return E_HVD_RET_INVALID_PARAMETER;
433 }
434 if(!(gSubHVDCtrl.InitParams.u32ModeFlag & (HVD_INIT_UTOPIA_ENVI|HVD_INIT_DBG_FW)))
435 {
436 // need not to check this under debug mode
437 if ((gSubHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_START_CODE_MASK) == HVD_INIT_START_CODE_REMOVED)
438 {
439 HVD_SUB_MSG_ERR("Check Cmd Err: Init: Live stream mode must have start code\n");
440 return E_HVD_RET_INVALID_PARAMETER;
441 }
442 if (gSubHVDCtrl.InitParams.u8SyncType != E_HVD_SYNC_TBL_TYPE_NON)
443 {
444 HVD_SUB_MSG_ERR("Check Cmd Err: Init: Live stream mode can not use none ATS sync mode\n");
445 return E_HVD_RET_INVALID_PARAMETER;
446 }
447 }
448 }
449 else if ((u32Tmp0 == HVD_INIT_MAIN_FILE_RAW)
450 || (u32Tmp0 == HVD_INIT_MAIN_FILE_TS))
451 {
452 if (!(gSubHVDCtrl.InitParams.u32ModeFlag & (HVD_INIT_UTOPIA_ENVI | HVD_INIT_DBG_FW)))
453 {
454 if((gSubHVDCtrl.InitParams.u8SyncType != E_HVD_SYNC_TBL_TYPE_DTS)
455 && (gSubHVDCtrl.InitParams.u8SyncType != E_HVD_SYNC_TBL_TYPE_PTS)
456 && (gSubHVDCtrl.InitParams.u8SyncType != E_HVD_SYNC_TBL_TYPE_NON))
457 {
458 HVD_SUB_MSG_ERR("Check Cmd Err: Init: sync mode is not set. use default value:%d\n",
459 (MS_U16)E_HVD_SYNC_TBL_TYPE_PTS);
460 gSubHVDCtrl.InitParams.u8SyncType = E_HVD_SYNC_TBL_TYPE_PTS;
461 }
462 }
463 }
464 else if ((u32Tmp0 != HVD_INIT_MAIN_FILE_RAW)
465 && (u32Tmp0 != HVD_INIT_MAIN_FILE_TS))
466 {
467 HVD_SUB_MSG_ERR("Check Cmd Err: Init: main type can not be recognized:%ld\n", u32Tmp0);
468 return E_HVD_RET_INVALID_PARAMETER;
469 }
470
471 // check memory map
472 if (gSubHVDCtrl.MemMap.u32MIU1BaseAddr == 0)
473 {
474 HVD_SUB_MSG_ERR("Check Cmd Err: Init: MIU 1 Base addr should not be zero\n");
475 return E_HVD_RET_INVALID_PARAMETER;
476 }
477
478 if ((gSubHVDCtrl.MemMap.u32CodeBufAddr& 0x7FF) != 0)
479 {
480 HVD_SUB_MSG_ERR("Check Cmd Err: Init: Error HVD code address(0x%lx) must 2048 byte alignment\n",
481 gSubHVDCtrl.MemMap.u32CodeBufAddr);
482 return E_HVD_RET_INVALID_PARAMETER;
483 }
484 }
485
486 u32Tmp0 = gSubHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK;
487 u32Tmp1 = gSubHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_INPUT_MASK;
488
489 if (u32Tmp0 != HVD_INIT_MAIN_LIVE_STREAM)
490 {
491 if (u32Tmp1 == HVD_INIT_INPUT_DRV)
492 {
493 // check if driver process buffer is in bitstream buffer.
494 MS_U32 tmpAddr = gSubHVDCtrl.MemMap.u32DrvProcessBufAddr;
495 if (gSubHVDCtrl.MemMap.u32DrvProcessBufAddr == 0)
496 {
497 HVD_SUB_MSG_ERR("Check Cmd Err: Init: Drv process buffer address should not be zero\n");
498 gSubHVDCtrl.bNoDrvProccBuf = TRUE;
499 //return E_HVD_RET_INVALID_PARAMETER;
500 }
501 if ((gSubHVDCtrl.MemMap.u32BitstreamBufAddr > tmpAddr)
502 || (tmpAddr > (gSubHVDCtrl.MemMap.u32BitstreamBufAddr+gSubHVDCtrl.MemMap.u32BitstreamBufSize)))
503 {
504 HVD_SUB_MSG_ERR("Check Cmd Warn: Init: The driver process buffer shall be located in the bitstream buffer under file mode(TS or MP4) and Drv input.\n");
505 gSubHVDCtrl.bNoDrvProccBuf = TRUE;
506 //return E_HVD_RET_INVALID_PARAMETER;
507 }
508 if (gSubHVDCtrl.MemMap.u32DrvProcessBufSize
509 < (HVD_BBU_ST_ADDR_IN_BITSTREAMBUF + (HAL_HVD_Sub_GetData(E_HVD_GDATA_FW_BBU_TBL_ENTRY_NUMB)<<3) + 8))
510 {
511 HVD_SUB_MSG_ERR("Check Cmd Warn: Init: File mode(TS or MP4) and Drv input must set the process buffer size and must be larger than %lu Bytes:%ld\n",
512 gSubHVDCtrl.MemMap.u32DrvProcessBufSize,
513 (MS_U32)(HVD_BBU_ST_ADDR_IN_BITSTREAMBUF + (HAL_HVD_Sub_GetData(E_HVD_GDATA_FW_BBU_TBL_ENTRY_NUMB)<<3) + 8) );
514 gSubHVDCtrl.bNoDrvProccBuf = TRUE;
515 //return E_HVD_RET_OUTOF_MEMORY;
516 }
517 if (gSubHVDCtrl.MemMap.u32DrvProcessBufSize > 1)
518 {
519 tmpAddr = gSubHVDCtrl.MemMap.u32DrvProcessBufAddr + gSubHVDCtrl.MemMap.u32DrvProcessBufSize -1;
520 }
521 else
522 {
523 tmpAddr = gSubHVDCtrl.MemMap.u32DrvProcessBufAddr;
524 }
525 if ((gSubHVDCtrl.MemMap.u32BitstreamBufAddr > tmpAddr)
526 || (tmpAddr > (gSubHVDCtrl.MemMap.u32BitstreamBufAddr + gSubHVDCtrl.MemMap.u32BitstreamBufSize)))
527 {
528 HVD_SUB_MSG_ERR("Check Cmd Warn: Init: The driver process buffer shall be located in the bitstream buffer under file mode(TS or PS) and Drv input.\n");
529 gSubHVDCtrl.bNoDrvProccBuf = TRUE;
530 //return E_HVD_RET_INVALID_PARAMETER;
531 }
532 }
533 else
534 {
535 ;// TODO: check if the TSP MIU sel is the same with the MIU lacation of process buffer.
536 }
537 }
538 break;
539 }
540 case E_HVD_CHECK_CMD_SEEK2PTS:
541 case E_HVD_CHECK_CMD_TRIGGER_DISP:
542 #if 0
543 if( MDrv_HVD_GetPlayMode( E_HVD_GMODE_IS_SYNC_ON ) )
544 {
545 HVD_SUB_MSG_ERR("Check Cmd Err: Cmd type:%d Sync Active: %lx\n", (MS_U16)eCmd , (MS_S32)MDrv_HVD_GetPlayMode( E_HVD_GMODE_IS_SYNC_ON ) );
546 return E_HVD_RET_ILLEGAL_ACCESS;
547 }
548 #endif
549 break;
550 default:
551 return E_HVD_OK;
552 }
553 return E_HVD_OK;
554 }
555
_DRV_HVD_Sub_InitShareMem(void)556 HVD_Result _DRV_HVD_Sub_InitShareMem(void)
557 {
558 return (HVD_Result)HAL_HVD_Sub_InitShareMem();
559 }
560
_DRV_HVD_Sub_InitRegCPU(void)561 HVD_Result _DRV_HVD_Sub_InitRegCPU(void)
562 {
563 // check MIU select
564 if( !(gSubHVDCtrl.InitParams.u8TurboInit & E_HVD_TURBOINIT_CHECK) )
565 {
566 HAL_HVD_Sub_CheckMIUSel( gSubHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_UTOPIA_ENVI );
567 }
568 return (HVD_Result)HAL_HVD_Sub_InitRegCPU();
569 }
570
_DRV_HVD_Sub_RstVariables(void)571 HVD_Result _DRV_HVD_Sub_RstVariables(void)
572 {
573 MS_BOOL bBitMIU1 = FALSE;
574 MS_BOOL bCodeMIU1 = FALSE;
575 // Init control flg
576 gSubHVDCtrl.u32CtrlMode=0;
577 if( gSubHVDCtrl.MemMap.u32CodeBufAddr >= gSubHVDCtrl.MemMap.u32MIU1BaseAddr )
578 {
579 //gSubHVDCtrl.MemMap.u32CodeBufAddr-=gSubHVDCtrl.MemMap.u32MIU1BaseAddr;
580 //gSubHVDCtrl.MemMap.u32FrameBufAddr-=gSubHVDCtrl.MemMap.u32MIU1BaseAddr;
581 gSubHVDCtrl.u32CtrlMode |= HVD_CTRL_CODE_MIU_1;
582 bCodeMIU1=TRUE;
583 }
584 if( gSubHVDCtrl.MemMap.u32BitstreamBufAddr >= gSubHVDCtrl.MemMap.u32MIU1BaseAddr )
585 {
586 //gSubHVDCtrl.MemMap.u32BitstreamBufAddr-=gSubHVDCtrl.MemMap.u32MIU1BaseAddr;
587 gSubHVDCtrl.u32CtrlMode |= HVD_CTRL_ES_MIU_1;
588 bBitMIU1=TRUE;
589 }
590 if( gSubHVDCtrl.MemMap.u32FrameBufAddr>= gSubHVDCtrl.MemMap.u32MIU1BaseAddr )
591 {
592 //gSubHVDCtrl.MemMap.u32BitstreamBufAddr-=gSubHVDCtrl.MemMap.u32MIU1BaseAddr;
593 gSubHVDCtrl.u32CtrlMode |= HVD_CTRL_FRM_MIU_1;
594 }
595 if( gSubHVDCtrl.MemMap.u32DrvProcessBufAddr>= gSubHVDCtrl.MemMap.u32MIU1BaseAddr )
596 {
597 //gSubHVDCtrl.MemMap.u32BitstreamBufAddr-=gSubHVDCtrl.MemMap.u32MIU1BaseAddr;
598 gSubHVDCtrl.u32CtrlMode |= HVD_CTRL_DRVPROCC_MIU_1;
599 }
600
601 if(!gSubHVDCtrl.bNoDrvProccBuf)
602 {
603 // init nal table buffer start address.
604 if( ( gSubHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK) == HVD_INIT_MAIN_FILE_RAW )
605 {
606 if( bBitMIU1 != bCodeMIU1 )
607 {
608 if( gSubHVDCtrl.MemMap.u32DrvProcessBufSize>
609 ( HVD_BBU_ST_ADDR_IN_BITSTREAMBUF + (HAL_HVD_Sub_GetData(E_HVD_GDATA_FW_BBU_TBL_ENTRY_NUMB) <<3) + 8))
610 {
611 gSubHVDCtrl.u32BBUTblInBitstreamBufAddr = HVD_BBU_ST_ADDR_IN_BITSTREAMBUF;
612 if( (( gSubHVDCtrl.u32BBUTblInBitstreamBufAddr + gSubHVDCtrl.MemMap.u32DrvProcessBufAddr) % 8) != 0)
613 {
614 gSubHVDCtrl.u32BBUTblInBitstreamBufAddr = gSubHVDCtrl.u32BBUTblInBitstreamBufAddr + gSubHVDCtrl.MemMap.u32DrvProcessBufAddr + 7;
615 gSubHVDCtrl.u32BBUTblInBitstreamBufAddr -= (gSubHVDCtrl.u32BBUTblInBitstreamBufAddr ) % 8;
616 gSubHVDCtrl.u32BBUTblInBitstreamBufAddr -= gSubHVDCtrl.MemMap.u32DrvProcessBufAddr;
617 HVD_SUB_MSG_ERR( "HVD Err: Nal table in bitstream buffer start address is not aligned. old:%lx new:%lx" , (MS_U32)HVD_BBU_ST_ADDR_IN_BITSTREAMBUF , gSubHVDCtrl.u32BBUTblInBitstreamBufAddr );
618 }
619 }
620 else
621 {
622 HVD_SUB_MSG_ERR( "HVD Err: Driver process buffer size is not enough for driver input path. input:%lx required:%lx" , (MS_U32)gSubHVDCtrl.MemMap.u32DrvProcessBufSize , ( HVD_BBU_ST_ADDR_IN_BITSTREAMBUF + (HAL_HVD_Sub_GetData(E_HVD_GDATA_FW_BBU_TBL_ENTRY_NUMB) <<3) + 8) );
623 return E_HVD_RET_OUTOF_MEMORY;
624 }
625 }
626 }
627
628 // init AVI NULL packet pattern && RM flush pattern
629 if( ( gSubHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK) == HVD_INIT_MAIN_FILE_RAW )
630 {
631 MS_U8 *pNULLPattern=NULL;
632 gSubHVDCtrl.u32NULLPacketAddr = gSubHVDCtrl.MemMap.u32DrvProcessBufAddr;
633 //pNULLPattern=(MS_U8 *)(((MS_U32)pu8HVD_DMAcpy_pool) );
634 //HVD_memset( (void*)pNULLPattern, 0 , sizeof( pu8HVD_DMAcpy_pool ) );
635 // TODO: use other non-cachable VA addr
636 pNULLPattern=(MS_U8 *)(((MS_U32)gSubHVDCtrl.MemMap.u32CodeBufVAddr) );
637 HVD_memset( (void*)pNULLPattern, 0 , 12 );
638 switch( (gSubHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_HW_MASK) )
639 {
640 case HVD_INIT_HW_AVC:
641 case HVD_INIT_HW_AVS:
642 if( gSubHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_START_CODE_MASK )
643 { // start code removed
644 gSubHVDCtrl.u32NULLPacketSize = 8;
645 if( gSubHVDCtrl.MemMap.u32DrvProcessBufSize < gSubHVDCtrl.u32NULLPacketSize )
646 {
647 return E_HVD_RET_OUTOF_MEMORY;
648 }
649 HVD_memset( (void*)pNULLPattern, 0xAA , gSubHVDCtrl.u32NULLPacketSize);
650 pNULLPattern[4] = 0X55;
651 }
652 else // start code remained
653 {
654 gSubHVDCtrl.u32NULLPacketSize = 12;
655 if( gSubHVDCtrl.MemMap.u32DrvProcessBufSize < gSubHVDCtrl.u32NULLPacketSize )
656 {
657 return E_HVD_RET_OUTOF_MEMORY;
658 }
659 HVD_memset( (void*)pNULLPattern, 0xAA , gSubHVDCtrl.u32NULLPacketSize);
660 pNULLPattern[0] = 0;
661 pNULLPattern[1] = 0;
662 pNULLPattern[2] = 1;
663 pNULLPattern[3] = 0xFF;
664 pNULLPattern[8] = 0X55;
665 //pNULLPattern[gSubHVDCtrl.u32NULLPacketSize-1] = 0x80;
666 }
667
668 if( bBitMIU1 != bCodeMIU1 )
669 {
670 #if HVD_ENABLE_BDMA_2_BITSTREAMBUF
671 _HVD_Sub_Chip_Flush_Memory();
672 HVD_dmacpy(gSubHVDCtrl.MemMap.u32DrvProcessBufAddr, gSubHVDCtrl.MemMap.u32CodeBufAddr, gSubHVDCtrl.u32NULLPacketSize);
673 #else
674 HVD_memcpy((void*)(gSubHVDCtrl.MemMap.u32DrvProcessBufVAddr), pNULLPattern, gSubHVDCtrl.u32NULLPacketSize);
675 _HVD_Sub_Chip_Flush_Memory();
676 #endif
677 }
678 else
679 {
680 HVD_memcpy((void*)(gSubHVDCtrl.MemMap.u32DrvProcessBufVAddr), pNULLPattern, gSubHVDCtrl.u32NULLPacketSize);
681 _HVD_Sub_Chip_Flush_Memory();
682 }
683
684 break;
685
686 case HVD_INIT_HW_RM:
687 // RM has no NULL packet
688 gSubHVDCtrl.u32NULLPacketSize = 0;
689 gSubHVDCtrl.u32NULLPacketAddr =0;
690 #if HVD_ENABLE_RV_FEATURE
691 gSubHVDCtrl.u32RV_FlushPacketAddr = gSubHVDCtrl.MemMap.u32DrvProcessBufAddr;
692 gSubHVDCtrl.u32RV_FlushPacketSize = 8;
693 if( gSubHVDCtrl.MemMap.u32DrvProcessBufSize < gSubHVDCtrl.u32RV_FlushPacketSize )
694 {
695 return E_HVD_RET_OUTOF_MEMORY;
696 }
697 HVD_memset( (void*)pNULLPattern, 0xFF , gSubHVDCtrl.u32RV_FlushPacketSize);
698 {
699 #if HVD_ENABLE_BDMA_2_BITSTREAMBUF
700 _HVD_Sub_Chip_Flush_Memory();
701 HVD_dmacpy( gSubHVDCtrl.MemMap.u32DrvProcessBufAddr , gSubHVDCtrl.MemMap.u32CodeBufAddr , gSubHVDCtrl.u32RV_FlushPacketSize);
702 #else
703 HVD_memcpy((void*)(gSubHVDCtrl.MemMap.u32DrvProcessBufVAddr), pNULLPattern, gSubHVDCtrl.u32RV_FlushPacketSize);
704 _HVD_Sub_Chip_Flush_Memory();
705 #endif
706 }
707 #endif
708 break;
709
710
711 default:
712 gSubHVDCtrl.u32NULLPacketSize = 0;
713 gSubHVDCtrl.u32NULLPacketAddr =0;
714 break;
715 }
716 }
717 else
718 {
719 gSubHVDCtrl.u32NULLPacketSize = 0;
720 gSubHVDCtrl.u32NULLPacketAddr =0;
721 }
722 }
723
724 // reset other driver control variables
725 gSubHVDCtrl.u32StepDecodeCnt=0;
726 gSubHVDCtrl.u32LastESRptr=0;
727 gSubHVDCtrl.u32BBUPacketCnt=0;
728 gSubHVDCtrl.u32BBUWptr_Fired=0;
729 gSubHVDCtrl.u32LastErrCode=0;
730 gSubHVDCtrl.bIsDispInfoChg=0;
731 HVD_memset( (void*)&(gSubHVDCtrl.LastNal) , 0 , sizeof(HVD_Nal_Entry) );
732 HVD_memset( (void*)&(gSubHVDCtrl.LivingStatus) , 0 , sizeof(HVD_Alive_Status) );
733
734 // Init HAL variables
735 return (HVD_Result) HAL_HVD_Sub_InitVariables((MS_U32)(&gSubHVDCtrl));
736 }
737
738 //-----------------------------------------------------------------------------
739 /// @brief \b Function \b Name: _DRV_HVD_Sub_SetSyncMode()
740 /// @brief \b Function \b Description: specify the way to sync video time stamp and STC.
741 /// @param -eMode \b IN : sync type
742 /// @param -u32Arg \b IN : only work under ( eMode == E_HVD_SYNC_ATS) , video delay toward Audio time stamp. It's minimun value is 0, and maximun value is 4500 ( unit:ms)
743 /// @return -The result of command set sync type
744 //-----------------------------------------------------------------------------
_DRV_HVD_Sub_SetSyncMode(HVD_Sync_Tbl_Type eMode)745 HVD_Result _DRV_HVD_Sub_SetSyncMode( HVD_Sync_Tbl_Type eMode)
746 {
747 HVD_Result eRet = E_HVD_OK;
748 _DRV_HVD_Entry();
749 eRet= (HVD_Result)HAL_HVD_Sub_SetCmd(E_HVD_CMD_SYNC_TYPE, eMode);
750 _DRV_HVD_Return(eRet );
751 }
752
_DRV_HVD_Sub_InitFW_AVC(void)753 static HVD_Result _DRV_HVD_Sub_InitFW_AVC(void)
754 {
755 MS_U32 u32InitMode = gSubHVDCtrl.InitParams.u32ModeFlag;
756
757 // common settings
758 if (!(gSubHVDCtrl.InitParams.u8TurboInit & E_HVD_TURBOINIT_DISPLAY))
759 {
760 _DRV_HVD_Sub_SetSyncMode((HVD_Sync_Tbl_Type)gSubHVDCtrl.InitParams.u8SyncType);
761
762 if (gSubHVDCtrl.InitParams.u8MinFrmGap)
763 {
764 HAL_HVD_Sub_SetCmd(E_HVD_CMD_MIN_FRAME_GAP,
765 gSubHVDCtrl.InitParams.u8MinFrmGap);
766 }
767
768 if (gSubHVDCtrl.InitParams.u32MaxDecTick)
769 {
770 HAL_HVD_Sub_SetCmd(E_HVD_CMD_MAX_DEC_TICK,
771 gSubHVDCtrl.InitParams.u32MaxDecTick);
772 }
773
774 if (gSubHVDCtrl.InitParams.u16Pitch)
775 {
776 HAL_HVD_Sub_SetCmd(E_HVD_CMD_PITCH, gSubHVDCtrl.InitParams.u16Pitch);
777 }
778
779 if (gSubHVDCtrl.InitParams.bSyncEachFrm)
780 {
781 HAL_HVD_Sub_SetCmd(E_HVD_CMD_SYNC_EACH_FRM, TRUE);
782 }
783
784 if (gSubHVDCtrl.InitParams.bFastDisplay)
785 {
786 HAL_HVD_Sub_SetCmd(E_HVD_CMD_FAST_DISP, TRUE);
787 }
788
789 if (gSubHVDCtrl.InitParams.bDynamicScaling)
790 {
791 HAL_HVD_Sub_SetCmd(E_HVD_CMD_DYNAMIC_SCALE, TRUE);
792 }
793
794 if (gSubHVDCtrl.InitParams.bUserData)
795 {
796 HAL_HVD_Sub_SetCmd(E_HVD_CMD_DPO_CC, TRUE);
797 }
798 }
799
800 if (gSubHVDCtrl.InitParams.u8TimeUnit)
801 {
802 HAL_HVD_Sub_SetCmd(E_HVD_CMD_TIME_UNIT_TYPE,
803 gSubHVDCtrl.InitParams.u8TimeUnit);
804 }
805
806 // specific settings
807 switch (u32InitMode & HVD_INIT_MAIN_MASK)
808 {
809 case HVD_INIT_MAIN_FILE_RAW:
810 {
811 HAL_HVD_Sub_SetCmd(E_HVD_CMD_DIS_VDEAD, TRUE);
812 HAL_HVD_Sub_SetCmd(E_HVD_CMD_IGNORE_ERR_REF, TRUE);
813
814 if (!(gSubHVDCtrl.InitParams.u8TurboInit & E_HVD_TURBOINIT_DISPLAY))
815 {
816 HAL_HVD_Sub_SetCmd(E_HVD_CMD_REPEAT_LAST_FIELD, TRUE);
817 }
818
819 HAL_HVD_Sub_SetCmd(E_HVD_CMD_PARSER_BYPASS, TRUE);
820
821 //HAL_HVD_Sub_SetCmd( E_HVD_CMD_PITCH , 1952 );
822 // svd only
823 HAL_HVD_Sub_SetCmd(E_HVD_CMD_ES_FULL_STOP, TRUE);
824 HAL_HVD_Sub_SetCmd(E_HVD_CMD_BBU_RESIZE, 95);
825 //HAL_HVD_Sub_SetCmd( E_HVD_CMD_PLAY , 0);
826 break;
827 }
828 case HVD_INIT_MAIN_FILE_TS:
829 {
830 HAL_HVD_Sub_SetCmd(E_HVD_CMD_DIS_VDEAD, TRUE);
831 HAL_HVD_Sub_SetCmd(E_HVD_CMD_IGNORE_ERR_REF, TRUE);
832
833 if (!(gSubHVDCtrl.InitParams.u8TurboInit & E_HVD_TURBOINIT_DISPLAY))
834 {
835 HAL_HVD_Sub_SetCmd(E_HVD_CMD_REPEAT_LAST_FIELD, TRUE);
836 }
837 //HAL_HVD_Sub_SetCmd( E_HVD_CMD_PITCH , 1952 );
838 //HAL_HVD_Sub_SetCmd( E_HVD_CMD_SYNC_EACH_FRM , TRUE );
839 // svd ONLY
840 HAL_HVD_Sub_SetCmd(E_HVD_CMD_ES_FULL_STOP, TRUE);
841
842 //HAL_HVD_Sub_SetCmd( E_HVD_CMD_PLAY , 0);
843 break;
844 }
845 case HVD_INIT_MAIN_LIVE_STREAM:
846 {
847 HAL_HVD_Sub_SetCmd(E_HVD_CMD_FORCE_RESET_HW, TRUE);
848
849 if (gSubHVDCtrl.InitParams.u8TimeUnit)
850 {
851 HAL_HVD_Sub_SetCmd(E_HVD_CMD_SYNC_VIDEO_DELAY,
852 (MS_U32) HVD_DTV_VIDEO_DELAY);
853 }
854 else
855 {
856 HAL_HVD_Sub_SetCmd(E_HVD_CMD_SYNC_VIDEO_DELAY,
857 (MS_U32) HVD_DTV_VIDEO_DELAY*90);
858 }
859 //HAL_HVD_Sub_SetCmd( E_HVD_CMD_PITCH , 1984 );
860 //HAL_HVD_Sub_SetCmd( E_HVD_CMD_MAX_DEC_TICK , 6400000); //for GP only
861 break;
862 }
863 default:
864 break;
865 }
866
867 // svd only
868 //HAL_HVD_Sub_SetCmd( E_HVD_CMD_FRAME_BUF_RESIZE , (gSubHVDCtrl.MemMap.u32BitstreamBufSize+gSubHVDCtrl.MemMap.u32CodeBufSize+gSubHVDCtrl.MemMap.u32FrameBufSize) >>20);
869 return E_HVD_OK;
870 }
871
_DRV_HVD_Sub_InitFW_RM(void)872 HVD_Result _DRV_HVD_Sub_InitFW_RM(void)
873 {
874 MS_U32 u32InitMode = gSubHVDCtrl.InitParams.u32ModeFlag;
875
876 // common settings
877 if( !(gSubHVDCtrl.InitParams.u8TurboInit & E_HVD_TURBOINIT_DISPLAY) )
878 {
879 _DRV_HVD_Sub_SetSyncMode( (HVD_Sync_Tbl_Type)gSubHVDCtrl.InitParams.u8SyncType);
880 if( gSubHVDCtrl.InitParams.u16Pitch)
881 {
882 HAL_HVD_Sub_SetCmd( E_HVD_CMD_PITCH , gSubHVDCtrl.InitParams.u16Pitch);
883 }
884 if( gSubHVDCtrl.InitParams.bSyncEachFrm)
885 {
886 HAL_HVD_Sub_SetCmd( E_HVD_CMD_SYNC_EACH_FRM , TRUE);
887 }
888 if( gSubHVDCtrl.InitParams.bFastDisplay)
889 {
890 HAL_HVD_Sub_SetCmd( E_HVD_CMD_FAST_DISP , TRUE);
891 }
892 if( gSubHVDCtrl.InitParams.bDynamicScaling)
893 {
894 HAL_HVD_Sub_SetCmd( E_HVD_CMD_DYNAMIC_SCALE , TRUE);
895 }
896 }
897 if( gSubHVDCtrl.InitParams.u8TimeUnit)
898 {
899 HAL_HVD_Sub_SetCmd( E_HVD_CMD_TIME_UNIT_TYPE , gSubHVDCtrl.InitParams.u8TimeUnit);
900 }
901 // specific settings
902 switch( u32InitMode & HVD_INIT_MAIN_MASK )
903 {
904 case HVD_INIT_MAIN_FILE_RAW:
905 break;
906 case HVD_INIT_MAIN_FILE_TS:
907 case HVD_INIT_MAIN_LIVE_STREAM:
908 default:
909 break;
910 }
911
912 // svd only
913 //HAL_HVD_Sub_SetCmd( E_HVD_CMD_FRAME_BUF_RESIZE , (gSubHVDCtrl.MemMap.u32BitstreamBufSize+gSubHVDCtrl.MemMap.u32CodeBufSize+gSubHVDCtrl.MemMap.u32FrameBufSize) >>20);
914
915 // fix FFx4 display error
916 HAL_HVD_Sub_SetCmd( E_HVD_CMD_FORCE_RESET_HW , TRUE );
917
918 return E_HVD_OK;
919 }
920
_DRV_HVD_Sub_Check_FW_Version(void)921 static HVD_Result _DRV_HVD_Sub_Check_FW_Version(void)
922 {
923 // check FW version ID
924 if (!(gSubHVDCtrl.InitParams.u8TurboInit & E_HVD_TURBOINIT_CHECK))
925 {
926 #if (HVD_HW_VERSION == HVD_HW_SVD)
927 if (HVD_FW_VERSION != HAL_HVD_Sub_GetData(E_HVD_GDATA_FW_VERSION_ID))
928 {
929 HVD_SUB_MSG_ERR("HVD: fw interface and binary is not the same. fw ID: interface:%lx binary:%lx\n",
930 (MS_U32)HVD_FW_VERSION,
931 HAL_HVD_Sub_GetData(E_HVD_GDATA_FW_VERSION_ID));
932 return E_HVD_FAIL;
933 }
934 // check if release required
935 if (!(gSubHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_DBG_FW))
936 {
937 // check debug version
938 if ((HAL_HVD_Sub_GetData(E_HVD_GDATA_FW_VERSION_ID) & HVD_FW_VER_RELEASE_VERSION_MASK) < HVD_FW_VER_RELEASE_VERSION)
939 {
940 HVD_SUB_MSG_MUST("HVD: FW is not release verion: binary:%lx\n",
941 HAL_HVD_Sub_GetData(E_HVD_GDATA_FW_VERSION_ID));
942 //return E_HVD_FAIL;
943 }
944 }
945 #else
946
947 if( (HVD_FW_IF_VERSION>>16) != (HAL_HVD_Sub_GetData(E_HVD_GDATA_FW_IF_VERSION_ID)>>16) )
948 {
949 HVD_SUB_MSG_ERR("HVD: fw interface and binary is not the same. fw ID: interface:%lx binary:%lx\n",
950 (MS_U32)HVD_FW_IF_VERSION,
951 HAL_HVD_Sub_GetData(E_HVD_GDATA_FW_IF_VERSION_ID));
952 return E_HVD_FAIL;
953 }
954
955 // check if release required
956 if (!(gSubHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_DBG_FW))
957 {
958 // check debug version
959 if (!(HAL_HVD_Sub_GetData(E_HVD_GDATA_FW_VERSION_ID) & HVD_FW_VER_RELEASE_VERSION))
960 {
961 HVD_SUB_MSG_MUST("HVD: FW is not release verion: binary:%lx\n",
962 HAL_HVD_Sub_GetData(E_HVD_GDATA_FW_VERSION_ID));
963 //return E_HVD_FAIL;
964 }
965
966 if (HAL_HVD_Sub_GetData(E_HVD_GDATA_FW_VERSION_ID) & HVD_FW_VER_DUMP_DEBUG_MSG)
967 {
968 HVD_SUB_MSG_MUST("HVD: FW release verion, but it has debug message. binary:%lx\n",
969 HAL_HVD_Sub_GetData(E_HVD_GDATA_FW_VERSION_ID));
970 //return E_HVD_FAIL;
971 }
972 }
973 #endif
974 }
975 return E_HVD_OK;
976 }
977
_DRV_HVD_Sub_InitFW(void)978 static HVD_Result _DRV_HVD_Sub_InitFW(void)
979 {
980 HVD_Result eRet = E_HVD_OK;
981
982 eRet = _DRV_HVD_Sub_Check_FW_Version();
983 if (eRet != E_HVD_OK)
984 {
985 return eRet;
986 }
987
988 switch (gSubHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_HW_MASK)
989 {
990 case HVD_INIT_HW_AVC:
991 eRet = _DRV_HVD_Sub_InitFW_AVC();
992 break;
993 case HVD_INIT_HW_AVS:
994 eRet = _DRV_HVD_Sub_InitFW_AVC();
995 break;
996 case HVD_INIT_HW_RM:
997 eRet = _DRV_HVD_Sub_InitFW_RM();
998 break;
999 default:
1000 break;
1001 }
1002 return eRet;
1003 }
1004
_DRV_HVD_Sub_IsAllBufferEmpty(void)1005 MS_BOOL _DRV_HVD_Sub_IsAllBufferEmpty( void )
1006 {
1007 MS_U32 playbacktype = gSubHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK ;
1008 if( playbacktype == HVD_INIT_MAIN_FILE_RAW)
1009 {
1010 if(HAL_HVD_Sub_GetData(E_HVD_GDATA_BBU_Q_NUMB) != 0)
1011 {
1012 return FALSE;
1013 }
1014 }
1015 else //if( playbacktype == HVD_INIT_MAIN_FILE_TS ) TSP input
1016 {
1017 #if 0
1018 if( HAL_HVD_Sub_GetData( E_HVD_GDATA_ES_READ_PTR) != HAL_HVD_Sub_GetData( E_HVD_GDATA_ES_WRITE_PTR) )
1019 {
1020 return FALSE;
1021 }
1022 #endif
1023 }
1024 { // other Queues
1025 if( ( (HAL_HVD_Sub_GetData(E_HVD_GDATA_DEC_Q_NUMB) == 0) &&
1026 (HAL_HVD_Sub_GetData(E_HVD_GDATA_DISP_Q_NUMB) == 0) )
1027 && (HAL_HVD_Sub_GetData(E_HVD_GDATA_VPU_IDLE_CNT) > HVD_FW_IDLE_THRESHOLD) )
1028 {
1029 return TRUE;
1030 }
1031 else
1032 {
1033 return FALSE;
1034 }
1035 }
1036 }
1037
1038 #if defined(REDLION_LINUX_KERNEL_ENVI)
_DRV_HVD_Sub_ISRHandler(void)1039 MS_S32 _DRV_HVD_Sub_ISRHandler(void)
1040 #else
1041 void _DRV_HVD_Sub_ISRHandler(void)
1042 #endif
1043 {
1044 if( gHVDISRCtrl.pfnISRCallBack != NULL )
1045 {
1046 gHVDISRCtrl.bInISR = TRUE;
1047 gHVDISRCtrl.u32ISRInfo = HAL_HVD_Sub_GetData( E_HVD_GDATA_HVD_ISR_STATUS );
1048 if( gHVDISRCtrl.u32ISRInfo )
1049 {
1050 HAL_HVD_Sub_Enable_ISR(FALSE);
1051 gHVDISRCtrl.pfnISRCallBack();
1052 HAL_HVD_Sub_Enable_ISR(TRUE);
1053 }
1054 }
1055 else
1056 {
1057 HVD_SUB_MSG_ERR( "DRV HVD Err: ISR callback is NULL.\n" );
1058 }
1059 gHVDISRCtrl.bInISR = FALSE;
1060 HAL_HVD_Sub_SetClearISR();
1061 OSAL_HVD_ISR_Enable();
1062 #if defined(REDLION_LINUX_KERNEL_ENVI)
1063 return 1;
1064 #endif
1065 }
1066
1067
_DRV_HVD_Sub_RecoverySettings(void)1068 HVD_Result _DRV_HVD_Sub_RecoverySettings(void)
1069 {
1070 // TODO: complete this function. and consider more cases. step decoder, display?
1071 HVD_Result eRst=E_HVD_OK;
1072
1073 switch( gSubHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK )
1074 {
1075 case HVD_INIT_MAIN_LIVE_STREAM:
1076 // temp solution
1077 // must before play().
1078 if( (gSubHVDCtrl.Settings.DispInfoTH.u32FrmrateLowBound != 0 )||
1079 (gSubHVDCtrl.Settings.DispInfoTH.u32FrmrateUpBound != 0) ||
1080 (gSubHVDCtrl.Settings.DispInfoTH.u32MvopLowBound != 0) ||
1081 (gSubHVDCtrl.Settings.DispInfoTH.u32MvopUpBound != 0) )
1082 {
1083 HAL_HVD_Sub_SetData( E_HVD_SDATA_DISP_INFO_TH , (MS_U32)(&gSubHVDCtrl.Settings.DispInfoTH) );
1084 HAL_HVD_Sub_SetCmd(E_HVD_CMD_UPDATE_DISP_THRESHOLD, 0);
1085 }
1086 if( gSubHVDCtrl.Settings.u32IsrEvent )
1087 {
1088 HAL_HVD_Sub_SetCmd(E_HVD_CMD_ISR_TYPE, gSubHVDCtrl.Settings.u32IsrEvent);
1089 }
1090 HAL_HVD_Sub_Enable_ISR(gSubHVDCtrl.Settings.bEnISR);
1091 // play()
1092 HAL_HVD_Sub_SetCmd(E_HVD_CMD_PLAY, 0);
1093 if( gSubHVDCtrl.Settings.u8SkipMode )
1094 {
1095 if(E_HVD_OK != (eRst = MDrv_HVD_Sub_SetSkipDecMode((HVD_Skip_Decode)(gSubHVDCtrl.Settings.u8SkipMode))))
1096 {
1097 HVD_SUB_MSG_ERR( "_DRV_HVD_Sub_RecoverySettings : Set Skip Mode fail!!.\n" );
1098 return eRst;
1099 }
1100 }
1101 if( gSubHVDCtrl.Settings.bIsShowErrFrm )
1102 {
1103 HAL_HVD_Sub_SetCmd(E_HVD_CMD_DISP_ERR_FRM, TRUE);
1104 }
1105 if( gSubHVDCtrl.Settings.u8FrcMode )
1106 {
1107 if(E_HVD_OK != (eRst = MDrv_HVD_Sub_SetFrcMode((HVD_FrmRateConv_Mode)(gSubHVDCtrl.Settings.u8FrcMode))))
1108 {
1109 HVD_SUB_MSG_ERR( "_DRV_HVD_Sub_RecoverySettings : Set Frc Mode fail!!.\n" );
1110 return eRst;
1111 }
1112 }
1113 if( gSubHVDCtrl.Settings.bIsErrConceal )
1114 {
1115 HAL_HVD_Sub_SetCmd(E_HVD_CMD_ERR_CONCEAL, TRUE);
1116 }
1117 if( gSubHVDCtrl.Settings.bAutoFreeES )
1118 {
1119 HAL_HVD_Sub_SetCmd(E_HVD_CMD_AUTO_FREE_ES, TRUE);
1120 }
1121 if( gSubHVDCtrl.Settings.bDisDeblocking )
1122 {
1123 HAL_HVD_Sub_SetCmd(E_HVD_CMD_DIS_DBF, TRUE);
1124 }
1125 if( gSubHVDCtrl.Settings.bDisQuarterPixel )
1126 {
1127 HAL_HVD_Sub_SetCmd(E_HVD_CMD_DIS_QUART_PIXEL, TRUE);
1128 }
1129
1130 if( gSubHVDCtrl.Settings.bIsSyncOn )
1131 {
1132 HAL_HVD_Sub_SetCmd(E_HVD_CMD_SYNC_ACTIVE, TRUE);
1133 }
1134 if( gSubHVDCtrl.Settings.u32SyncTolerance )
1135 {
1136 HAL_HVD_Sub_SetCmd(E_HVD_CMD_SYNC_TOLERANCE, gSubHVDCtrl.Settings.u32SyncTolerance);
1137 }
1138 if( gSubHVDCtrl.Settings.u32SyncRepeatTH )
1139 {
1140 HAL_HVD_Sub_SetCmd(E_HVD_CMD_SYNC_THRESHOLD, gSubHVDCtrl.Settings.u32SyncRepeatTH);
1141 }
1142 if( gSubHVDCtrl.Settings.u32SyncVideoDelay )
1143 {
1144 HAL_HVD_Sub_SetCmd(E_HVD_CMD_SYNC_VIDEO_DELAY, gSubHVDCtrl.Settings.u32SyncVideoDelay);
1145 }
1146 if( gSubHVDCtrl.Settings.u32SyncFreeRunTH )
1147 {
1148 HAL_HVD_Sub_SetCmd(E_HVD_CMD_FREERUN_THRESHOLD, gSubHVDCtrl.Settings.u32SyncFreeRunTH);
1149 }
1150 #if !(defined(CHIP_T2) || defined(CHIP_T7))
1151 if( gSubHVDCtrl.Settings.u32MiuBurstLevel != 0xFFFFFFFF )
1152 {
1153 HAL_HVD_Sub_SetCmd(E_HVD_CMD_MIU_BURST_CNT, gSubHVDCtrl.Settings.u32MiuBurstLevel);
1154 }
1155 #endif
1156 //HAL_HVD_Sub_SetCmd(E_HVD_CMD_BLUE_SCREEN, FALSE);
1157 gSubHVDCtrl.bStepDecoding=0;
1158 break;
1159
1160 case HVD_INIT_MAIN_FILE_RAW:
1161 default:
1162 gSubHVDCtrl.bStepDecoding=0;
1163 HAL_HVD_Sub_SetCmd(E_HVD_CMD_PLAY, 0);
1164 break;
1165 }
1166 return eRst;
1167 }
1168
_DRV_HVD_Sub_Rst(MS_BOOL bErrHandle)1169 static HVD_Result _DRV_HVD_Sub_Rst(MS_BOOL bErrHandle)
1170 {
1171 HVD_Result eRst = E_HVD_RET_ILLEGAL_ACCESS;
1172
1173 if (bErrHandle == TRUE)
1174 {
1175 HVD_SUB_MSG_ERR("HVD Not supported reset(TRUE) yet\n");
1176 return E_HVD_RET_INVALID_PARAMETER;
1177 }
1178
1179 bHVDIsIniting = TRUE;
1180
1181 HAL_HVD_Sub_Enable_ISR(FALSE);
1182
1183 #if HVD_ENABLE_TIME_MEASURE
1184 HVD_SUB_MSG_MUST("HVD Time Measure:%d (%s %d) \n",
1185 HVD_GetSysTime_ms() - u32SubInitSysTimeBase,
1186 __FUNCTION__,
1187 __LINE__);
1188 #endif
1189
1190 eRst = _DRV_HVD_Sub_RstVariables();
1191
1192 if (eRst != E_HVD_OK)
1193 {
1194 goto DRV_HVD_Rst_Failed;
1195 }
1196
1197 #if HVD_ENABLE_TIME_MEASURE
1198 HVD_SUB_MSG_MUST("HVD Time Measure:%d (%s %d) \n",
1199 HVD_GetSysTime_ms() - u32SubInitSysTimeBase,
1200 __FUNCTION__,
1201 __LINE__);
1202 #endif
1203
1204 eRst = _DRV_HVD_Sub_InitShareMem();
1205
1206 if (eRst != E_HVD_OK)
1207 {
1208 goto DRV_HVD_Rst_Failed;
1209 }
1210
1211 #if HVD_ENABLE_TIME_MEASURE
1212 HVD_SUB_MSG_MUST("HVD Time Measure:%d (%s %d) \n",
1213 HVD_GetSysTime_ms() - u32SubInitSysTimeBase,
1214 __FUNCTION__,
1215 __LINE__);
1216 #endif
1217
1218 eRst = _DRV_HVD_Sub_InitRegCPU();
1219
1220 if (eRst != E_HVD_OK)
1221 {
1222 goto DRV_HVD_Rst_Failed;
1223 }
1224
1225 #if HVD_ENABLE_TIME_MEASURE
1226 HVD_SUB_MSG_MUST("HVD Time Measure:%d (%s %d) \n",
1227 HVD_GetSysTime_ms() - u32SubInitSysTimeBase,
1228 __FUNCTION__,
1229 __LINE__);
1230 #endif
1231
1232 eRst = _DRV_HVD_Sub_InitFW();
1233
1234 if (eRst != E_HVD_OK)
1235 {
1236 goto DRV_HVD_Rst_Failed;
1237 }
1238
1239 eRst = E_HVD_OK;
1240
1241 HAL_HVD_Sub_Enable_ISR(gSubHVDCtrl.Settings.bEnISR);
1242
1243 bHVDIsIniting = FALSE;
1244 return eRst;
1245
1246 DRV_HVD_Rst_Failed :
1247 HAL_HVD_Sub_Enable_ISR(gSubHVDCtrl.Settings.bEnISR);
1248 bHVDIsIniting = FALSE;
1249
1250 return eRst;
1251 }
1252 //-------------------------------------------------------------------------------------------------
1253 // Global Functions
1254 //-------------------------------------------------------------------------------------------------
1255
1256 // System
1257 //-----------------------------------------------------------------------------
1258 /// @brief \b Function \b Name: MDrv_HVD_Sub_PowerCtrl()
1259 /// @brief \b Function \b Description: Enable/Disable HVD HW clock
1260 /// @param -bEnable \b IN : Enable/Disable HVD HW clock
1261 /// -FALSE(0): Disable
1262 /// -TRUE(1): Enable
1263 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_PowerCtrl(MS_BOOL bEnable)1264 void MDrv_HVD_Sub_PowerCtrl( MS_BOOL bEnable )
1265 {
1266 HVD_SUB_MSG_TRACE();
1267 HAL_HVD_Sub_MVD_PowerCtrl( bEnable);
1268 HAL_HVD_Sub_PowerCtrl(bEnable);
1269 HAL_VPU_PowerCtrl(bEnable);
1270 }
1271
1272 //-----------------------------------------------------------------------------
1273 /// @brief \b Function \b Name: MDrv_HVD_Sub_SetOSRegBase()
1274 /// @brief \b Function \b Description: Set system register base
1275 /// @param -u32RegBaseAddr \b IN : system register base
1276 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_SetOSRegBase(MS_U32 u32RegBaseAddr)1277 void MDrv_HVD_Sub_SetOSRegBase( MS_U32 u32RegBaseAddr )
1278 {
1279 HAL_HVD_Sub_InitRegBase( u32RegBaseAddr );
1280 }
1281
1282 // Action
1283
1284 //-----------------------------------------------------------------------------
1285 /// @brief \b Function \b Name: MDrv_HVD_Sub_Init()
1286 /// @brief \b Function \b Description: HVD driver initialization
1287 /// @param -pStMemCfg \b IN : pointer to the memory config of HVD driver
1288 /// @param -pStInitSettings \b IN : Initialization of HVD driver
1289 /// @return -The result of initialization process
1290 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_Init(HVD_MemCfg * pStMemCfg,HVD_Init_Settings * pStInitSettings)1291 HVD_Result MDrv_HVD_Sub_Init(HVD_MemCfg *pStMemCfg, HVD_Init_Settings *pStInitSettings)
1292 {
1293 HVD_Result eRst = E_HVD_FAIL;
1294
1295 HVD_SUB_MSG_TRACE();
1296
1297 #if HVD_ENABLE_TIME_MEASURE
1298 u32SubInitSysTimeBase = HVD_GetSysTime_ms();
1299 #endif
1300
1301 if ((pStMemCfg == NULL) || (pStInitSettings == NULL))
1302 {
1303 HVD_SUB_MSG_ERR("HVD Err: Init params are invalid\n");
1304 return E_HVD_RET_INVALID_PARAMETER;
1305 }
1306
1307 #if HVD_ENABLE_AUTO_SET_REG_BASE
1308 {
1309 MS_U32 u32NonPMBankSize = 0, u32RiuBaseAdd = 0;
1310
1311 if (!MDrv_MMIO_GetBASE(&u32RiuBaseAdd, &u32NonPMBankSize, MS_MODULE_HW))
1312 {
1313 HVD_SUB_MSG_ERR("HVD Err: MMIO_GetBASE failure\n");
1314 return eRst;
1315 }
1316 else
1317 {
1318 HVD_SUB_MSG_INFO("HVD:1 u32RiuBaseAdd = %lx\n", u32RiuBaseAdd);
1319 HAL_HVD_Sub_InitRegBase(u32RiuBaseAdd);
1320 }
1321 }
1322 #endif
1323
1324 HVD_SUB_MSG_INFO("HVD: system call type: Mutex:%d clock:%d delay:%d asm_sync:%d\n",
1325 HVD_ENABLE_MUTEX_PROTECT,
1326 HVD_SYSTEM_CLOCK_TYPE,
1327 HVD_SYSTEM_DELAY_MS_TYPE,
1328 HVD_MEMORY_BARRIER_TYPE);
1329
1330 if (u32SubUartCtrl & E_HVD_UART_CTRL_INFO)
1331 {
1332 MS_U32 u32delaytime = 5;
1333 MS_U32 u32FirstTime = HVD_GetSysTime_ms();
1334 MS_U32 u32SecondTime= 0;
1335
1336 HVD_Delay_ms(u32delaytime);
1337 u32SecondTime = HVD_GetSysTime_ms();
1338
1339 HVD_SUB_MSG_INFO("HVD: MSOS API check: 1st:%lu 2nd:%lu delay:%lu dif:%lu\n",
1340 u32FirstTime,
1341 u32SecondTime,
1342 u32delaytime,
1343 u32SecondTime - u32FirstTime);
1344 }
1345
1346 #if HVD_ENABLE_TIME_MEASURE
1347 HVD_SUB_MSG_MUST("HVD Time Measure:%d (%s %d) \n",
1348 HVD_GetSysTime_ms() - u32SubInitSysTimeBase,
1349 __FUNCTION__,
1350 __LINE__);
1351 #endif
1352
1353 if (bHVDIsInited == TRUE)
1354 {
1355 HVD_SUB_MSG_ERR("HVD Warn: re-init HVD Driver\n");
1356
1357 #if HVD_ENABLE_REINIT_FAILED
1358 eRst = E_HVD_RET_RE_INIT;
1359 return eRst;
1360 #endif
1361 }
1362
1363 // disable ISR first
1364 HAL_HVD_Sub_Enable_ISR(FALSE);
1365
1366 eRst = _DRV_HVD_Sub_InitVariables(pStMemCfg,
1367 (HVD_Init_Params *) pStInitSettings);
1368
1369 if (eRst != E_HVD_OK)
1370 {
1371 return eRst;
1372 }
1373
1374 #if HVD_ENABLE_TIME_MEASURE
1375 HVD_SUB_MSG_MUST("HVD Time Measure:%d (%s %d) \n",
1376 HVD_GetSysTime_ms() - u32SubInitSysTimeBase,
1377 __FUNCTION__,
1378 __LINE__);
1379 #endif
1380
1381 _DRV_HVD_Entry();
1382
1383 eRst = _DRV_HVD_Sub_Check_Cmd(E_HVD_CHECK_CMD_INIT);
1384
1385 if (eRst != E_HVD_OK)
1386 {
1387 _DRV_HVD_Return(eRst);
1388 }
1389
1390 #if HVD_ENABLE_TIME_MEASURE
1391 HVD_SUB_MSG_MUST("HVD Time Measure:%d (%s %d) \n",
1392 HVD_GetSysTime_ms() - u32SubInitSysTimeBase,
1393 __FUNCTION__,
1394 __LINE__);
1395 #endif
1396
1397 eRst = _DRV_HVD_Sub_Rst(FALSE);
1398
1399 if (eRst != E_HVD_OK)
1400 {
1401 _DRV_HVD_Return(eRst);
1402 }
1403
1404 #if HVD_ENABLE_TIME_MEASURE
1405 HVD_SUB_MSG_MUST("HVD Time Measure:%d (%s %d) \n",
1406 HVD_GetSysTime_ms() - u32SubInitSysTimeBase,
1407 __FUNCTION__,
1408 __LINE__);
1409 #endif
1410
1411 gSubHVDCtrl.u32CtrlMode |= HVD_CTRL_INIT_FINISHED;
1412 bHVDIsInited = TRUE;
1413 eRst = E_HVD_OK;
1414
1415 HVD_SUB_MSG_INFO("HVD driver Init successfully.\n");
1416
1417 _DRV_HVD_Return(eRst);
1418 }
1419
1420 //-----------------------------------------------------------------------------
1421 /// @brief \b Function \b Name: MDrv_HVD_Sub_Rst()
1422 /// @brief \b Function \b Description: Reset HVD driver
1423 /// @param -bErrHandle \b IN : reset option HVD driver
1424 /// -FALSE(0): Reset HVD to clear mode.( do not recovery SPS)
1425 /// -TRUE(1): Reset HVD to clear mode, and recovery SPS.
1426 /// @return -The result of reset process
1427 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_Rst(MS_BOOL bErrHandle)1428 HVD_Result MDrv_HVD_Sub_Rst(MS_BOOL bErrHandle)
1429 {
1430 HVD_Result eRet=E_HVD_RET_ILLEGAL_ACCESS;
1431 HVD_SUB_MSG_TRACE();
1432 _DRV_HVD_Inited(eRet);
1433 if( bErrHandle == TRUE )
1434 {
1435 HVD_SUB_MSG_ERR( "HVD Not supported reset(TRUE) yet\n");
1436 return E_HVD_RET_INVALID_PARAMETER;
1437 }
1438 if( (gSubHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK) != HVD_INIT_MAIN_LIVE_STREAM)
1439 {
1440 HVD_SUB_MSG_ERR( "HVD rst() only support live stream mode\n");
1441 return E_HVD_RET_INVALID_PARAMETER;
1442 }
1443 eRet = _DRV_HVD_Sub_Rst(bErrHandle);
1444 if( eRet != E_HVD_OK )
1445 {
1446 return (eRet);
1447 }
1448 eRet = _DRV_HVD_Sub_RecoverySettings();
1449 if( eRet != E_HVD_OK )
1450 {
1451 return ( eRet);
1452 }
1453 gSubHVDCtrl.u32CtrlMode |= HVD_CTRL_INIT_FINISHED;
1454 bHVDIsInited=TRUE;
1455 return (eRet);
1456 }
1457
1458 //-----------------------------------------------------------------------------
1459 /// @brief \b Function \b Name: MDrv_HVD_Sub_Play()
1460 /// @brief \b Function \b Description: Play HVD
1461 /// @return -The result of command play
1462 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_Play(void)1463 HVD_Result MDrv_HVD_Sub_Play(void)
1464 {
1465 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
1466 HVD_SUB_MSG_TRACE();
1467
1468 _DRV_HVD_Inited(eRet);
1469
1470 _DRV_HVD_Entry();
1471
1472 #if HVD_ENABLE_CHECK_STATE_BEFORE_SET_CMD
1473 if( MDrv_HVD_Sub_GetPlayState() != E_HVD_GSTATE_PLAY || gSubHVDCtrl.bStepDecoding )
1474 #endif
1475 {
1476 eRet = (HVD_Result)HAL_HVD_Sub_SetCmd(E_HVD_CMD_PLAY, 0);
1477 if( eRet != E_HVD_OK )
1478 {
1479 _DRV_HVD_Return(eRet );
1480 }
1481 }
1482 // step display off
1483 eRet = (HVD_Result)HAL_HVD_Sub_SetData(E_HVD_SDATA_TRIGGER_DISP, 0);
1484 if( eRet == E_HVD_OK )
1485 {
1486 gSubHVDCtrl.u32CtrlMode &= ~HVD_CTRL_DISPLAY_CTRL;
1487 }
1488 _DRV_HVD_Return(eRet );
1489 }
1490
1491 //-----------------------------------------------------------------------------
1492 /// @brief \b Function \b Name: MDrv_HVD_Sub_Exit()
1493 /// @brief \b Function \b Description: Stop HVD and release resource.
1494 /// @return -The result of command stop
1495 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_Exit(void)1496 HVD_Result MDrv_HVD_Sub_Exit(void)
1497 {
1498 MS_U32 u32Timer=0;
1499 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
1500 HVD_SUB_MSG_TRACE();
1501 _DRV_HVD_Inited(eRet);
1502 _DRV_HVD_Rsting(eRet);
1503 bHVDIsInited=FALSE;
1504 do
1505 {
1506 u32Timer++;
1507 if(u32Timer>=HVD_FW_EXIT_ACTION_TIMEOUT)
1508 {
1509 eRet = E_HVD_RET_TIMEOUT;
1510 return eRet;
1511 }
1512 else
1513 {
1514 HVD_Delay_ms(1);
1515 }
1516 }while(_DRV_HVD_Ctrl(HVD_CTRL_PROCESSING));
1517 // release ISR callback
1518 HAL_HVD_Sub_Enable_ISR(FALSE);
1519 OSAL_HVD_ISR_Disable();
1520 if( gHVDISRCtrl.bRegISR )
1521 {
1522 OSAL_HVD_ISR_Detach();
1523 }
1524 // close HVD FW
1525 eRet = (HVD_Result)HAL_HVD_Sub_DeInit();
1526 // reset internal control variables
1527 HVD_memset( (void*)&gSubHVDCtrl , 0 , sizeof(HVD_Drv_Ctrl) );
1528 HVD_memset( (void*)&gHVDISRCtrl , 0 , sizeof(HVD_ISR_Ctrl) );
1529 // TODO: check it is really stop
1530 //_DRV_HVD_Return(eRet );
1531 return eRet;
1532 }
1533
1534 //-----------------------------------------------------------------------------
1535 /// @brief \b Function \b Name: MDrv_HVD_Sub_Pause()
1536 /// @brief \b Function \b Description: Pause HVD
1537 /// @return -The result of command pause
1538 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_Pause(void)1539 HVD_Result MDrv_HVD_Sub_Pause(void)
1540 {
1541 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
1542 HVD_SUB_MSG_TRACE();
1543 _DRV_HVD_Inited(eRet);
1544 _DRV_HVD_Entry();
1545 eRet = (HVD_Result)HAL_HVD_Sub_SetCmd(E_HVD_CMD_PAUSE, 0);
1546 if( eRet != E_HVD_OK)
1547 {
1548 _DRV_HVD_Return(eRet );
1549 }
1550 // step display off
1551 eRet = (HVD_Result)HAL_HVD_Sub_SetData(E_HVD_SDATA_TRIGGER_DISP, 0);
1552 if( eRet == E_HVD_OK )
1553 {
1554 gSubHVDCtrl.u32CtrlMode &=~HVD_CTRL_DISPLAY_CTRL;
1555 }
1556 _DRV_HVD_Return(eRet);
1557 }
1558
1559 //-----------------------------------------------------------------------------
1560 /// @brief \b Function \b Name: MDrv_HVD_Sub_Flush()
1561 /// @brief \b Function \b Description: Flush queue and buffer
1562 /// @param -bShowLast \b IN : TRUE / FALSE
1563 /// -FALSE(0): show current displayed frame
1564 /// -TRUE(1): show last decoded frame
1565 /// @return -The result of command flush
1566 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_Flush(MS_BOOL bShowLast)1567 HVD_Result MDrv_HVD_Sub_Flush(MS_BOOL bShowLast)
1568 {
1569 MS_U32 u32Times = 0;
1570 MS_BOOL bPlayback=FALSE;
1571 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
1572 HVD_SUB_MSG_TRACE();
1573 _DRV_HVD_Inited(eRet);
1574 _DRV_HVD_Entry();
1575
1576 // pause first
1577 if( MDrv_HVD_Sub_GetPlayState() != E_HVD_GSTATE_PAUSE )
1578 {
1579 bPlayback = TRUE;
1580 eRet = (HVD_Result)HAL_HVD_Sub_SetCmd(E_HVD_CMD_PAUSE, 0);
1581 if( eRet != E_HVD_OK)
1582 {
1583 _DRV_HVD_Return(eRet );
1584 }
1585 // check flush done
1586 while( 1 )
1587 {
1588 if( MDrv_HVD_Sub_GetPlayState() == E_HVD_GSTATE_PAUSE )
1589 {
1590 break;
1591 }
1592 u32Times++;
1593 HVD_Delay_ms(1);
1594 if( u32Times > 100 )
1595 {
1596 HVD_SUB_MSG_INFO("HVD info: pause in flush() not finished.\n");
1597 break;
1598 }
1599 }
1600 }
1601 // step display off
1602 eRet = (HVD_Result)HAL_HVD_Sub_SetData(E_HVD_SDATA_TRIGGER_DISP, 0);
1603 if( eRet == E_HVD_OK )
1604 {
1605 gSubHVDCtrl.u32CtrlMode &=~HVD_CTRL_DISPLAY_CTRL;
1606 }
1607
1608 #if HVD_ENABLE_RV_FEATURE
1609 if( (gSubHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_HW_MASK) == HVD_INIT_HW_RM )
1610 {
1611 if ( gSubHVDCtrl.LastNal.bRVBrokenPacket )
1612 {
1613 HVD_SUB_MSG_INFO("HVD Info: push dummy packet for broken by us packet\n");
1614 gHVDPacket.u32Length=gSubHVDCtrl.u32RV_FlushPacketSize;
1615 gHVDPacket.u32Staddr=gSubHVDCtrl.u32RV_FlushPacketAddr-gSubHVDCtrl.MemMap.u32BitstreamBufAddr;
1616 gHVDPacket.u32OriPktAddr=gHVDPacket.u32Staddr;
1617 gHVDPacket.bRVBrokenPacket = FALSE;
1618 eRet=( HVD_Result )HAL_HVD_Sub_PushPacket( (HVD_BBU_Info*)&gHVDPacket );
1619 }
1620 }
1621 #endif
1622
1623 // fire all packet to FW
1624 if( HAL_HVD_Sub_GetData( E_HVD_GDATA_BBU_WRITE_PTR_FIRED ) != HAL_HVD_Sub_GetData(E_HVD_GDATA_BBU_WRITE_PTR) )
1625 {
1626 HAL_HVD_Sub_UpdateESWptr_Fire();
1627 }
1628 // send command
1629 eRet = (HVD_Result)HAL_HVD_Sub_SetCmd(E_HVD_CMD_FLUSH, (MS_U32)bShowLast);
1630 if( eRet != E_HVD_OK)
1631 {
1632 _DRV_HVD_Return(eRet );
1633 }
1634 // check flush done only for raw file mode
1635 if( (gSubHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK) == HVD_INIT_MAIN_FILE_RAW )
1636 {
1637 while( 1 )
1638 {
1639 //_DRV_HVD_PushDummy();
1640 if( _DRV_HVD_Sub_IsAllBufferEmpty() )
1641 {
1642 eRet = E_HVD_OK;
1643 break;
1644 }
1645 u32Times++;
1646 HVD_Delay_ms(1);
1647 if ( u32Times > 200 )
1648 {
1649 HVD_SUB_MSG_ERR("HVD Err: Flush() timeout failed: BBU:%lu Dec:%lu Disp:%lu Idle:%lu ESr:%lx ESw:%lx\n" ,
1650 HAL_HVD_Sub_GetData(E_HVD_GDATA_BBU_Q_NUMB),
1651 HAL_HVD_Sub_GetData(E_HVD_GDATA_DEC_Q_NUMB),
1652 HAL_HVD_Sub_GetData(E_HVD_GDATA_DISP_Q_NUMB),
1653 HAL_HVD_Sub_GetData(E_HVD_GDATA_VPU_IDLE_CNT),
1654 HAL_HVD_Sub_GetData(E_HVD_GDATA_ES_READ_PTR),
1655 HAL_HVD_Sub_GetData(E_HVD_GDATA_ES_WRITE_PTR) );
1656 eRet = E_HVD_FAIL;
1657 break;
1658 }
1659 }
1660 // reset byte_cnt
1661 HAL_HVD_Sub_RstPTSCtrlVariable();
1662 }
1663 HAL_HVD_Sub_FlushRstShareMem();
1664
1665 // MediaCodec need this to let scan mode to be normal.
1666 if( 0)//bPlayback )
1667 {
1668 eRet = (HVD_Result)HAL_HVD_Sub_SetCmd(E_HVD_CMD_PLAY, 0);
1669 if( eRet != E_HVD_OK )
1670 {
1671 _DRV_HVD_Return(eRet );
1672 }
1673 }
1674 _DRV_HVD_Return(eRet );
1675 }
1676
1677 //-----------------------------------------------------------------------------
1678 /// @brief \b Function \b Name: MDrv_HVD_Sub_StepDisp()
1679 /// @brief \b Function \b Description: Trigger HVD to show one frame
1680 /// @return -The result of command trigger display
1681 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_StepDisp(void)1682 HVD_Result MDrv_HVD_Sub_StepDisp(void)
1683 {
1684 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
1685 HVD_SUB_MSG_TRACE();
1686 _DRV_HVD_Inited(eRet);
1687 _DRV_HVD_Entry();
1688 // check command
1689 eRet=_DRV_HVD_Sub_Check_Cmd( E_HVD_CHECK_CMD_TRIGGER_DISP );
1690 if( eRet != E_HVD_OK )
1691 {
1692 _DRV_HVD_Return(eRet );
1693 }
1694
1695 // step display on
1696 if( _DRV_HVD_Ctrl(HVD_CTRL_DISPLAY_CTRL) )
1697 {
1698 if( MDrv_HVD_Sub_IsFrameShowed() )
1699 {
1700 eRet = (HVD_Result)HAL_HVD_Sub_SetData(E_HVD_SDATA_TRIGGER_DISP, 1);
1701 }
1702 else
1703 {
1704 HVD_SUB_MSG_INFO("HVD Warn: Previous Step Display command is not finished\n");
1705 eRet =E_HVD_OK;
1706 }
1707 }
1708 else
1709 {
1710 eRet = (HVD_Result)HAL_HVD_Sub_SetData(E_HVD_SDATA_TRIGGER_DISP, 1);
1711 if( eRet == E_HVD_OK )
1712 {
1713 _DRV_HVD_SetCtrl(HVD_CTRL_DISPLAY_CTRL);
1714 }
1715 }
1716 // enter play mode
1717 if( 1)//HAL_HVD_GetData(E_HVD_GDATA_FW_STATE) == E_HVD_FW_PAUSE )
1718 {
1719 eRet = (HVD_Result)HAL_HVD_Sub_SetCmd(E_HVD_CMD_PLAY, 0);
1720 if( eRet != E_HVD_OK)
1721 {
1722 _DRV_HVD_Return(eRet );
1723 }
1724 }
1725 _DRV_HVD_Return(eRet );
1726 }
1727
1728 //-----------------------------------------------------------------------------
1729 /// @brief \b Function \b Name: MDrv_HVD_Sub_StepDecode()
1730 /// @brief \b Function \b Description: Step decode one frame
1731 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_StepDecode(void)1732 HVD_Result MDrv_HVD_Sub_StepDecode(void)
1733 {
1734 MS_U32 u32Times=0;
1735 MS_U32 FWState=0;
1736 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
1737 HVD_SUB_MSG_TRACE();
1738 _DRV_HVD_Inited(eRet);
1739 _DRV_HVD_Entry();
1740 // check if step decoding
1741 if( gSubHVDCtrl.bStepDecoding)
1742 {
1743 if( gSubHVDCtrl.u32StepDecodeCnt == HAL_HVD_Sub_GetData(E_HVD_GDATA_DECODE_CNT) )
1744 {
1745 eRet = E_HVD_RET_NOTREADY;
1746 _DRV_HVD_Return(eRet );
1747 }
1748 }
1749 // Pause first
1750 FWState = HAL_HVD_Sub_GetData(E_HVD_GDATA_FW_STATE);
1751 if( FWState != (MS_U32)E_HVD_FW_PAUSE )
1752 {
1753 eRet = (HVD_Result)HAL_HVD_Sub_SetCmd(E_HVD_CMD_PAUSE, 0);
1754 if( eRet != E_HVD_OK)
1755 {
1756 _DRV_HVD_Return(eRet );
1757 }
1758 while( FWState != ((MS_U32)E_HVD_FW_PAUSE)
1759 && u32Times <= 10000)
1760 {
1761 FWState = HAL_HVD_Sub_GetData(E_HVD_GDATA_FW_STATE);
1762 u32Times++;
1763 HVD_Delay_ms(1);
1764 }
1765 if( HAL_HVD_Sub_GetData(E_HVD_GDATA_FW_STATE) != E_HVD_FW_PAUSE )
1766 {
1767 eRet = E_HVD_FAIL;
1768 _DRV_HVD_Return(eRet );
1769 }
1770 }
1771 gSubHVDCtrl.bStepDecoding=TRUE;
1772 // get decode cnt
1773 gSubHVDCtrl.u32StepDecodeCnt = HAL_HVD_Sub_GetData(E_HVD_GDATA_DECODE_CNT);
1774 // step decode
1775 eRet = (HVD_Result)HAL_HVD_Sub_SetCmd(E_HVD_CMD_STEP_DECODE, 0);
1776 _DRV_HVD_Return(eRet );
1777 }
1778
1779 // set command, action, status, input
1780 //-----------------------------------------------------------------------------
1781 /// @brief \b Function \b Name: MDrv_HVD_Sub_PushQueue()
1782 /// @brief \b Function \b Description: push one entry into the decoding table(BBU table).
1783 /// @param -pInfo \b IN : Pointer to the information of input packet.
1784 /// @return -The result of command push queue
1785 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_PushQueue(HVD_Packet_Info * pInfo)1786 HVD_Result MDrv_HVD_Sub_PushQueue(HVD_Packet_Info* pInfo)
1787 {
1788 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
1789 MS_BOOL bNULLPacket=FALSE;
1790 HVD_SUB_MSG_TRACE();
1791 _DRV_HVD_Inited(eRet);
1792 _DRV_HVD_Entry();
1793
1794 if( pInfo ==NULL )
1795 {
1796 eRet=E_HVD_RET_INVALID_PARAMETER;
1797 _DRV_HVD_Return(eRet );
1798 }
1799 else if( pInfo->u32Length >= 0x200000) // HW bbu tag limitation
1800 {
1801 HVD_SUB_MSG_ERR( "HVD Err: input packet size(0x%lx) larger than max packet size(0x%lx)\n " , pInfo->u32Length , 0x200000UL );
1802 eRet=E_HVD_RET_INVALID_PARAMETER;
1803 _DRV_HVD_Return(eRet );
1804 }
1805 else if( (gSubHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_INPUT_MASK) == HVD_INIT_INPUT_TSP )
1806 {
1807 HVD_SUB_MSG_ERR( "HVD Err: Init mode is TSP input and PushQueue() is not supported in TSP input." );
1808 eRet=E_HVD_RET_ILLEGAL_ACCESS;
1809 _DRV_HVD_Return(eRet );
1810 }
1811 else if( ((gSubHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_HW_MASK) != HVD_INIT_HW_RM) &&
1812 (pInfo->u32Staddr >= gSubHVDCtrl.MemMap.u32BitstreamBufSize) )
1813 {
1814 eRet=E_HVD_RET_INVALID_PARAMETER;
1815 _DRV_HVD_Return(eRet );
1816 }
1817
1818 //HVD_memcpy((void*)(&gHVDPacket), (void*)pInfo, sizeof(HVD_Packet_Info));
1819 gHVDPacket.u32ID_H=pInfo->u32ID_H;
1820 gHVDPacket.u32ID_L=pInfo->u32ID_L;
1821 gHVDPacket.u32Length=pInfo->u32Length;
1822 gHVDPacket.u32TimeStamp=pInfo->u32TimeStamp;
1823 if( pInfo->u32Staddr & HVD_RV_BROKEN_BY_US_MASK )
1824 {
1825 gHVDPacket.bRVBrokenPacket= TRUE;
1826 gHVDPacket.u32OriPktAddr=pInfo->u32Staddr & (~HVD_RV_BROKEN_BY_US_MASK);
1827 gHVDPacket.u32Staddr=pInfo->u32Staddr& (~HVD_RV_BROKEN_BY_US_MASK);
1828 }
1829 else
1830 {
1831 gHVDPacket.bRVBrokenPacket= FALSE;
1832 gHVDPacket.u32OriPktAddr=pInfo->u32Staddr;
1833 gHVDPacket.u32Staddr=pInfo->u32Staddr;
1834 }
1835
1836 // invalid packet
1837 if( (gHVDPacket.u32TimeStamp != HVD_U32_MAX) && (gHVDPacket.u32Length==0))
1838 {
1839 HVD_SUB_MSG_INFO( "HVD Err: Invalid Packet(size:0x%lx PTS:0x%lx)\n " , gHVDPacket.u32Length , gHVDPacket.u32TimeStamp );
1840 eRet=E_HVD_RET_INVALID_PARAMETER;
1841 _DRV_HVD_Return(eRet );
1842 }
1843 // AVI NULL packet
1844 #if HVD_ENABLE_AUTO_AVI_NULL_PACKET
1845 else if((gHVDPacket.u32TimeStamp == HVD_U32_MAX) && (gHVDPacket.u32Length==0))
1846 {
1847 if( gSubHVDCtrl.bNoDrvProccBuf)
1848 {
1849 HVD_SUB_MSG_INFO( "HVD Err: AVI Null Packet(size:0x%lx PTS:0x%lx), but do not have enough driver process buffer(0x%lx)\n " , pInfo->u32Length , gHVDPacket.u32TimeStamp , gSubHVDCtrl.MemMap.u32DrvProcessBufSize);
1850 eRet=E_HVD_RET_ILLEGAL_ACCESS;
1851 _DRV_HVD_Return(eRet );
1852 }
1853 else
1854 {
1855 bNULLPacket=TRUE;
1856 gHVDPacket.u32Length = gSubHVDCtrl.u32NULLPacketSize;
1857 gHVDPacket.u32Staddr= gSubHVDCtrl.u32NULLPacketAddr - gSubHVDCtrl.MemMap.u32BitstreamBufAddr;
1858 }
1859 }
1860 #endif
1861 // the else are all normal cases.
1862 if( MDrv_HVD_Sub_GetBBUVacancy() != 0)
1863 {
1864 {
1865 MS_U32 u32ESRptr=HAL_HVD_Sub_GetData(E_HVD_GDATA_ES_READ_PTR );
1866 MS_U32 u32ESWptr=HAL_HVD_Sub_GetData(E_HVD_GDATA_ES_WRITE_PTR);
1867 if( ( u32ESWptr >= u32ESRptr ) &&
1868 ( gHVDPacket.u32Staddr + gHVDPacket.u32Length >= gSubHVDCtrl.MemMap.u32BitstreamBufSize ) )
1869 {
1870 HVD_SUB_MSG_ERR( "HVD Warn: input packet (%lx %lx %lx) may cause bitstream buffer overflow(%lx %lx) %lx\n " , gHVDPacket.u32Staddr , gHVDPacket.u32Length , gHVDPacket.u32Staddr+gHVDPacket.u32Length , u32ESRptr ,u32ESWptr , gSubHVDCtrl.MemMap.u32BitstreamBufSize );
1871 }
1872 if( ( u32ESWptr < u32ESRptr ) &&
1873 ( gHVDPacket.u32Staddr + gHVDPacket.u32Length >= u32ESRptr ) )
1874 {
1875 HVD_SUB_MSG_ERR( "HVD Warn: input packet (%lx %lx %lx) may overwrite undecoded data(%lx %lx)\n " , gHVDPacket.u32Staddr , gHVDPacket.u32Length , gHVDPacket.u32Staddr+gHVDPacket.u32Length , u32ESRptr ,u32ESWptr );
1876 }
1877 if( HAL_HVD_Sub_GetData(E_HVD_GDATA_BBU_Q_NUMB) && (!bNULLPacket) &&
1878 (gSubHVDCtrl.MemMap.u32DrvProcessBufSize != 0) &&
1879 ( gSubHVDCtrl.MemMap.u32BitstreamBufAddr<= gSubHVDCtrl.MemMap.u32DrvProcessBufAddr ) &&
1880 ( gSubHVDCtrl.MemMap.u32DrvProcessBufAddr < (gSubHVDCtrl.MemMap.u32BitstreamBufAddr + gSubHVDCtrl.MemMap.u32BitstreamBufSize)) )
1881 {
1882 MS_U32 u32Lower = gSubHVDCtrl.MemMap.u32DrvProcessBufAddr - gSubHVDCtrl.MemMap.u32BitstreamBufAddr;
1883 MS_U32 u32Upper = u32Lower+gSubHVDCtrl.MemMap.u32DrvProcessBufSize;
1884 if( ( (u32Lower <= gHVDPacket.u32Staddr) && (gHVDPacket.u32Staddr < u32Upper)) ||
1885 ( (u32Lower <= (gHVDPacket.u32Staddr + gHVDPacket.u32Length) ) && ( (gHVDPacket.u32Staddr+gHVDPacket.u32Length) < u32Upper)) ||
1886 ( (gHVDPacket.u32Staddr < u32Lower) && (u32Upper<=(gHVDPacket.u32Staddr+gHVDPacket.u32Length)) ) )
1887 {
1888 HVD_SUB_MSG_ERR( "HVD Warn: input packet (%lx %lx %lx) is located in HVD driver process buffer(%lx %lx)\n " , gHVDPacket.u32Staddr , gHVDPacket.u32Length , gHVDPacket.u32Staddr+gHVDPacket.u32Length , u32Lower ,u32Upper );
1889 }
1890 }
1891 //for debug
1892 if( 0)
1893 {
1894 HVD_SUB_MSG_INFO( "HVD : %lu (%lu %lu) ID:%lx input packet (%lx %lx %lx) (%lx %lx %lx) (%lu %lu %lu)\n " ,
1895 gSubHVDCtrl.u32BBUPacketCnt , MDrv_HVD_Sub_GetDataErrCnt() , MDrv_HVD_Sub_GetDecErrCnt(),
1896 gHVDPacket.u32ID_L , gHVDPacket.u32Staddr+gHVDPacket.u32Length , gHVDPacket.u32Length, gHVDPacket.u32Staddr,
1897 u32ESRptr, gSubHVDCtrl.MemMap.u32BitstreamBufSize ,u32ESWptr ,
1898 MDrv_HVD_Sub_GetBBUVacancy() ,HAL_HVD_Sub_GetData(E_HVD_GDATA_BBU_READ_PTR) ,HAL_HVD_Sub_GetData(E_HVD_GDATA_BBU_WRITE_PTR) );
1899 }
1900 }
1901 #if !(defined(UDMA_FPGA_ENVI))
1902 if( ((gSubHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_HW_MASK) != HVD_INIT_HW_RM)
1903 && (gSubHVDCtrl.bAutoRmLastZeroByte == TRUE)
1904 && ( (!gSubHVDCtrl.bCannotAccessMIU256) ||
1905 (( gSubHVDCtrl.bCannotAccessMIU256 ) && ( gSubHVDCtrl.MemMap.u32BitstreamBufAddr < gSubHVDCtrl.MemMap.u32MIU1BaseAddr))) )
1906 {
1907 MS_U32 ModifyCnt=0;
1908 while(1)//for( ModifyCnt=0 ; ModifyCnt<3;ModifyCnt++ )
1909 {
1910 if( gHVDPacket.u32Length )
1911 {
1912 MS_U8 *pByte=NULL;
1913 MS_U32 u32tmp=0;
1914 u32tmp = ( gHVDPacket.u32Staddr + gHVDPacket.u32Length-1);
1915 if( u32tmp >= gSubHVDCtrl.MemMap.u32BitstreamBufSize )
1916 {
1917 u32tmp-=gSubHVDCtrl.MemMap.u32BitstreamBufSize;
1918 }
1919 u32tmp+=gSubHVDCtrl.MemMap.u32BitstreamBufVAddr;
1920 pByte = (MS_U8 *)u32tmp;
1921 if( *pByte == 0 )
1922 {
1923 /*
1924 if( ModifyCnt == 2 )
1925 {
1926 gHVDPacket.u32Length+=ModifyCnt;
1927 }
1928 else
1929 */
1930 {
1931 ModifyCnt++;
1932 gHVDPacket.u32Length--;
1933 }
1934 }
1935 else
1936 {
1937 break;
1938 }
1939 }
1940 }
1941 if( ModifyCnt != 0)
1942 {
1943 //HVD_SUB_MSG_INFO("HVD remove last zero byte:%lu\n" , ModifyCnt);
1944 }
1945 if( gHVDPacket.u32Length == 0 )
1946 {
1947 HVD_SUB_MSG_ERR( "HVD Warn: Packet with all zero bytes(staddr:0x%lx remove zero bytes:%lu)\n " , gHVDPacket.u32Staddr , ModifyCnt);
1948 eRet=E_HVD_OK;
1949 _DRV_HVD_Return(eRet );
1950 }
1951 }
1952 #endif
1953 /*
1954 {
1955 MS_U8 *pByte=NULL;
1956 pByte = (MS_U8 *)((gSubHVDCtrl.MemMap.u32BitstreamBufVAddr) + gHVDPacket.u32Staddr );
1957 HVD_SUB_MSG_INFO("HVD remove last zero byte:%02x%02x%02x%02x\n" ,
1958 *pByte , *(pByte+1) , *(pByte+2) , *(pByte+3) );
1959 }
1960 */
1961 eRet=( HVD_Result )HAL_HVD_Sub_PushPacket( (HVD_BBU_Info*)&gHVDPacket );
1962
1963 }
1964 else
1965 {
1966 HVD_SUB_MSG_DEG("Push queue full\n");
1967 eRet=E_HVD_RET_QUEUE_FULL;
1968 }
1969 _DRV_HVD_Return(eRet );
1970 }
1971
1972 //-----------------------------------------------------------------------------
1973 /// @brief \b Function \b Name: MDrv_HVD_Sub_PushQueue_Fire()
1974 /// @brief \b Function \b Description: fire all waiting entry into the decoding table(BBU table).
1975 /// @return -The result of command push queue fire
1976 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_PushQueue_Fire(void)1977 HVD_Result MDrv_HVD_Sub_PushQueue_Fire(void)
1978 {
1979 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
1980 HVD_SUB_MSG_TRACE();
1981 _DRV_HVD_Inited(eRet);
1982 _DRV_HVD_Entry();
1983 HAL_HVD_Sub_UpdateESWptr_Fire();
1984 eRet= E_HVD_OK;
1985 _DRV_HVD_Return( eRet);
1986 }
1987
1988 //-----------------------------------------------------------------------------
1989 /// @brief \b Function \b Name: MDrv_HVD_Sub_DecodeIFrame()
1990 /// @brief \b Function \b Description: Decode I frame only under driver input path.
1991 /// @param -u32SrcSt \b IN : The physical address if user has input packet.
1992 /// @param -u32SrcSize \b IN : The packet size if user has input packet.
1993 /// @return -The result of command decode I frame.
1994 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_DecodeIFrame(MS_PHYADDR u32SrcSt,MS_U32 u32SrcSize)1995 HVD_Result MDrv_HVD_Sub_DecodeIFrame(MS_PHYADDR u32SrcSt , MS_U32 u32SrcSize)
1996 {
1997 MS_U32 timer = 300;
1998 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
1999 HVD_SUB_MSG_TRACE();
2000 _DRV_HVD_Inited(eRet);
2001 _DRV_HVD_Entry();
2002
2003 eRet= MDrv_HVD_Sub_Pause();
2004 if( eRet != E_HVD_OK)
2005 {
2006 _DRV_HVD_Return(eRet );
2007 }
2008 // skip decode I
2009 eRet= (HVD_Result)HAL_HVD_Sub_SetCmd(E_HVD_CMD_SKIP_DEC, E_HVD_SKIP_DECODE_I);
2010 if( eRet != E_HVD_OK )
2011 {
2012 _DRV_HVD_Return(eRet );
2013 }
2014 eRet = (HVD_Result)HAL_HVD_Sub_SetCmd(E_HVD_CMD_DISP_I_DIRECT, TRUE);
2015 if( eRet != E_HVD_OK )
2016 {
2017 _DRV_HVD_Return(eRet );
2018 }
2019 eRet = MDrv_HVD_Sub_StepDecode();
2020 if( eRet != E_HVD_OK)
2021 {
2022 _DRV_HVD_Return(eRet );
2023 }
2024 if( E_HVD_INIT_INPUT_DRV == (gSubHVDCtrl.InitParams.u32ModeFlag & E_HVD_INIT_INPUT_MASK) )
2025 {
2026 HVD_Packet_Info packet;
2027 if( u32SrcSize ==0 )
2028 {
2029 eRet = E_HVD_RET_INVALID_PARAMETER;
2030 HVD_SUB_MSG_ERR( "HVD err: decode I frame input packet size is zero\n" );
2031 _DRV_HVD_Return(eRet );
2032 }
2033 packet.u32Staddr = u32SrcSt - gSubHVDCtrl.MemMap.u32BitstreamBufAddr ;
2034 packet.u32Length = u32SrcSize;
2035 if( ( packet.u32Staddr + packet.u32Length ) > gSubHVDCtrl.MemMap.u32BitstreamBufSize )
2036 {
2037 eRet = E_HVD_RET_INVALID_PARAMETER;
2038 HVD_SUB_MSG_ERR( "HVD err: decode I frame memory overflow, the packet end address is over ES buffer end address\n" );
2039 _DRV_HVD_Return(eRet );
2040 }
2041 packet.u32TimeStamp = 0xFFFFFFFF;
2042 packet.u32ID_L=0;
2043 packet.u32ID_H=0;
2044 MDrv_HVD_Sub_PushQueue( &packet );
2045 HAL_HVD_Sub_UpdateESWptr_Fire();
2046 }
2047 while( timer )
2048 {
2049 HVD_Delay_ms(1);
2050 if( MDrv_HVD_Sub_IsStepDecodeDone() )
2051 {
2052 break;
2053 }
2054 timer--;
2055 }
2056 if( timer ==0)
2057 {
2058 eRet= E_HVD_FAIL;
2059 HVD_SUB_MSG_ERR( "HVD err: decode I frame time out, not enough data\n" );
2060 _DRV_HVD_Return( eRet);
2061 }
2062 eRet= E_HVD_OK;
2063 _DRV_HVD_Return( eRet);
2064 }
2065
2066 //-----------------------------------------------------------------------------
2067 /// @brief \b Function \b Name: MDrv_HVD_Sub_SetDataEnd()
2068 /// @brief \b Function \b Description: Upper layer set this to inform driver that there are no more data will be pushed.
2069 /// @param -bEnd \b IN : Enable/ Disable
2070 /// -FALSE(0): normal status( default )
2071 /// -TRUE(1): ending status
2072 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_SetDataEnd(MS_BOOL bEnd)2073 HVD_Result MDrv_HVD_Sub_SetDataEnd( MS_BOOL bEnd )
2074 {
2075 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
2076 HVD_SUB_MSG_TRACE();
2077 _DRV_HVD_Inited(eRet);
2078 _DRV_HVD_Entry();
2079 if( bEnd )
2080 {
2081 gSubHVDCtrl.u32CtrlMode|= HVD_CTRL_DATA_END;
2082 }
2083 else
2084 {
2085 gSubHVDCtrl.u32CtrlMode&=~ HVD_CTRL_DATA_END;
2086 }
2087 //_DRV_HVD_PushDummy_Rst();
2088 eRet = (HVD_Result)HAL_HVD_Sub_SetCmd(E_HVD_CMD_PLAYBACK_FINISH, bEnd);
2089 _DRV_HVD_Return( eRet);
2090 }
2091
2092
2093 //-----------------------------------------------------------------------------
2094 /// @brief \b Function \b Name: MDrv_HVD_Sub_SetDispErrFrm()
2095 /// @brief \b Function \b Description: Enable/ Disable to decode and show error(broken) frames
2096 /// @param -bEnable \b IN : Enable/ Disable
2097 /// -FALSE(0): hide error frames
2098 /// -TRUE(1): show error frames
2099 /// @return -The result of command set display error frames
2100 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_SetDispErrFrm(MS_BOOL bEnable)2101 HVD_Result MDrv_HVD_Sub_SetDispErrFrm(MS_BOOL bEnable)
2102 {
2103 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
2104 HVD_SUB_MSG_TRACE();
2105 _DRV_HVD_Inited(eRet);
2106 _DRV_HVD_Entry();
2107 eRet = (HVD_Result)HAL_HVD_Sub_SetCmd(E_HVD_CMD_DISP_ERR_FRM, bEnable);
2108 gSubHVDCtrl.Settings.bIsShowErrFrm=bEnable;
2109 _DRV_HVD_Return(eRet );
2110 }
2111
2112 //-----------------------------------------------------------------------------
2113 /// @brief \b Function \b Name: MDrv_HVD_Sub_SetDispRepeatField()
2114 /// @brief \b Function \b Description: Enable/ Disable to show last field when FW needs to show repeated field
2115 /// @param -bEnable \b IN : Enable/ Disable
2116 /// -FALSE(0): disable this mode
2117 /// -TRUE(1): enable this mode
2118 /// @return -The result of command set display repeated field
2119 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_SetDispRepeatField(MS_BOOL bEnable)2120 HVD_Result MDrv_HVD_Sub_SetDispRepeatField(MS_BOOL bEnable)
2121 {
2122 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
2123 HVD_SUB_MSG_TRACE();
2124 _DRV_HVD_Inited(eRet);
2125 _DRV_HVD_Entry();
2126 eRet = (HVD_Result)HAL_HVD_Sub_SetCmd(E_HVD_CMD_REPEAT_LAST_FIELD, bEnable);
2127 _DRV_HVD_Return(eRet );
2128 }
2129
2130 //-----------------------------------------------------------------------------
2131 /// @brief \b Function \b Name: MDrv_HVD_Sub_SetSkipDecMode()
2132 /// @brief \b Function \b Description: set the decoding frame type.
2133 /// @param -eDecType \b IN : decoding frame type
2134 /// @return -The result of command set skip decode mode
2135 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_SetSkipDecMode(HVD_Skip_Decode eDecType)2136 HVD_Result MDrv_HVD_Sub_SetSkipDecMode(HVD_Skip_Decode eDecType)
2137 {
2138 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
2139 HVD_SUB_MSG_TRACE();
2140 _DRV_HVD_Inited(eRet);
2141 _DRV_HVD_Entry();
2142 #if HVD_ENABLE_CHECK_STATE_BEFORE_SET_CMD
2143 if( (HVD_Skip_Decode)HAL_HVD_Sub_GetData( E_HVD_GDATA_SKIP_MODE ) != eDecType )
2144 #endif
2145 {
2146 eRet= (HVD_Result)HAL_HVD_Sub_SetCmd(E_HVD_CMD_SKIP_DEC, eDecType);
2147 if( eRet != E_HVD_OK )
2148 {
2149 _DRV_HVD_Return(eRet );
2150 }
2151 if( eDecType == E_HVD_SKIP_DECODE_I )
2152 {
2153 eRet = (HVD_Result)HAL_HVD_Sub_SetCmd(E_HVD_CMD_DISP_I_DIRECT, TRUE);
2154 }
2155 else
2156 {
2157 eRet = (HVD_Result)HAL_HVD_Sub_SetCmd(E_HVD_CMD_DISP_I_DIRECT, FALSE);
2158 }
2159 }
2160 gSubHVDCtrl.Settings.u8SkipMode=(MS_U8)eDecType;
2161 _DRV_HVD_Return(eRet );
2162 }
2163
2164 //-----------------------------------------------------------------------------
2165 /// @brief \b Function \b Name: MDrv_HVD_Sub_SetDispSpeed()
2166 /// @brief \b Function \b Description: specify the display speed type.
2167 /// @param -eSpeed \b IN : display speed type
2168 /// @return -The result of command set display speed type
2169 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_SetDispSpeed(HVD_Drv_Disp_Speed eSpeed)2170 HVD_Result MDrv_HVD_Sub_SetDispSpeed(HVD_Drv_Disp_Speed eSpeed)
2171 {
2172 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
2173 HVD_SUB_MSG_TRACE();
2174 _DRV_HVD_Inited(eRet);
2175 _DRV_HVD_Entry();
2176 HVD_SUB_MSG_DEG(" MDrv_HVD_SetDispSpeed:%d\n " , (MS_S16)eSpeed);
2177 #if HVD_ENABLE_CHECK_STATE_BEFORE_SET_CMD
2178 if( HAL_HVD_Sub_GetData( E_HVD_GDATA_DISPLAY_DURATION ) != eSpeed )
2179 #endif
2180 {
2181 eRet = (HVD_Result)HAL_HVD_Sub_SetCmd(E_HVD_CMD_DISP_SPEED, eSpeed);
2182 }
2183 #if HVD_ENABLE_WAIT_CMD_FINISHED
2184 if( eRet == E_HVD_OK )
2185 {
2186 MS_U32 timer = HVD_DRV_CMD_WAIT_FINISH_TIMEOUT;
2187 while( timer )
2188 {
2189 if( HAL_HVD_Sub_GetData( E_HVD_GDATA_DISPLAY_DURATION ) == eSpeed )
2190 {
2191 break;
2192 }
2193 HVD_Delay_ms(1);
2194 timer--;
2195 }
2196 }
2197 #endif
2198 _DRV_HVD_Return(eRet );
2199 }
2200
2201 //-----------------------------------------------------------------------------
2202 /// @brief \b Function \b Name: MDrv_HVD_Sub_SetSyncActive()
2203 /// @brief \b Function \b Description: Enable/disable the sync of video time stamp and STC.
2204 /// @param -bEnable \b IN : Enable/ Disable
2205 /// -FALSE(0): Disable sync mode
2206 /// -TRUE(1): Enable sync mode
2207 /// @return -The result of command set sync active
2208 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_SetSyncActive(MS_BOOL bEnable)2209 HVD_Result MDrv_HVD_Sub_SetSyncActive( MS_BOOL bEnable)
2210 {
2211 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
2212 HVD_SUB_MSG_TRACE();
2213 _DRV_HVD_Inited(eRet);
2214 _DRV_HVD_Entry();
2215 #if HVD_ENABLE_CHECK_STATE_BEFORE_SET_CMD
2216 if( HAL_HVD_Sub_GetData( E_HVD_GDATA_IS_SYNC_ON ) != bEnable )
2217 #endif
2218 {
2219 eRet= (HVD_Result)HAL_HVD_Sub_SetCmd(E_HVD_CMD_SYNC_ACTIVE, bEnable);
2220 }
2221 #if HVD_ENABLE_WAIT_CMD_FINISHED
2222 if( eRet == E_HVD_OK )
2223 {
2224 MS_U32 timer = HVD_DRV_CMD_WAIT_FINISH_TIMEOUT;
2225 while( timer )
2226 {
2227 if( HAL_HVD_Sub_GetData( E_HVD_GDATA_IS_SYNC_ON ) == bEnable )
2228 {
2229 break;
2230 }
2231 HVD_Delay_ms(1);
2232 timer--;
2233 }
2234 }
2235 #endif
2236 gSubHVDCtrl.Settings.bIsSyncOn=bEnable;
2237 _DRV_HVD_Return(eRet );
2238 }
2239
2240 //-----------------------------------------------------------------------------
2241 /// @brief \b Function \b Name: MDrv_HVD_Sub_SetDropMode()
2242 /// @brief \b Function \b Description: specify the way to drop decoded frames.
2243 /// @param -eMode \b IN : Drop display type.
2244 /// @param -u32Arg \b IN : The argument of eMode
2245 /// -( eMode == E_HVD_DROP_DISPLAY_AUTO) , Enable: (u32Arg = TRUE); Disable: (u32Arg = FALSE)
2246 /// -( eMode == E_HVD_DROP_DISPLAY_ONCE) , u32Arg = not zero
2247 /// @return -The result of command set display speed type
2248 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_SetDropMode(HVD_Drop_Disp eMode,MS_U32 u32Arg)2249 HVD_Result MDrv_HVD_Sub_SetDropMode( HVD_Drop_Disp eMode , MS_U32 u32Arg)
2250 {
2251 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
2252 HVD_SUB_MSG_TRACE();
2253 _DRV_HVD_Inited(eRet);
2254 _DRV_HVD_Entry();
2255
2256 if( eMode == E_HVD_DROP_DISPLAY_AUTO )
2257 {
2258 eRet= (HVD_Result)HAL_HVD_Sub_SetCmd(E_HVD_CMD_DROP_DISP_AUTO, u32Arg);
2259 }
2260 else if( eMode == E_HVD_DROP_DISPLAY_ONCE )
2261 {
2262 eRet= (HVD_Result)HAL_HVD_Sub_SetCmd(E_HVD_CMD_DROP_DISP_ONCE, u32Arg);
2263 }
2264 else
2265 {
2266 eRet= E_HVD_RET_INVALID_PARAMETER;
2267 }
2268 _DRV_HVD_Return(eRet );
2269 }
2270
2271 //-----------------------------------------------------------------------------
2272 /// @brief \b Function \b Name: MDrv_HVD_Sub_RstPTS()
2273 /// @brief \b Function \b Description: Reset HVD sync table
2274 /// @param -u32PTS \b IN : PTS base
2275 /// @return -The result of command reset PTS
2276 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_RstPTS(MS_U32 u32PTS)2277 HVD_Result MDrv_HVD_Sub_RstPTS(MS_U32 u32PTS)
2278 {
2279 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
2280 HVD_SUB_MSG_TRACE();
2281 _DRV_HVD_Inited(eRet);
2282 _DRV_HVD_Entry();
2283 eRet = (HVD_Result)HAL_HVD_Sub_SetCmd(E_HVD_CMD_RESET_PTS, u32PTS);
2284 _DRV_HVD_Return(eRet );
2285 }
2286
2287 //-----------------------------------------------------------------------------
2288 /// @brief \b Function \b Name: MDrv_HVD_Sub_SetFrcMode()
2289 /// @brief \b Function \b Description: set the frame rate convert mode.
2290 /// @param -eMode \b IN : mode type
2291 /// @return -The result of command set frame rate convert mode
2292 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_SetFrcMode(HVD_FrmRateConv_Mode eMode)2293 HVD_Result MDrv_HVD_Sub_SetFrcMode(HVD_FrmRateConv_Mode eMode )
2294 {
2295 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
2296 HVD_SUB_MSG_TRACE();
2297 _DRV_HVD_Inited(eRet);
2298 _DRV_HVD_Entry();
2299 eRet = (HVD_Result)HAL_HVD_Sub_SetCmd(E_HVD_CMD_FRC_MODE, eMode);
2300 gSubHVDCtrl.Settings.u8FrcMode=(MS_U8)eMode;
2301 _DRV_HVD_Return(eRet );
2302 }
2303
2304 //-----------------------------------------------------------------------------
2305 /// @brief \b Function \b Name: MDrv_HVD_Sub_SetSyncTolerance()
2306 /// @brief \b Function \b Description: Set the tolerance of FW reporting sync reach.
2307 /// @param -u32Arg \b IN : tolerance.
2308 /// @return -The result of command set sync tolerance
2309 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_SetSyncTolerance(MS_U32 u32Arg)2310 HVD_Result MDrv_HVD_Sub_SetSyncTolerance(MS_U32 u32Arg )
2311 {
2312 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
2313 HVD_SUB_MSG_TRACE();
2314 _DRV_HVD_Inited(eRet);
2315 _DRV_HVD_Entry();
2316 eRet = (HVD_Result)HAL_HVD_Sub_SetCmd(E_HVD_CMD_SYNC_TOLERANCE, u32Arg);
2317 gSubHVDCtrl.Settings.u32SyncTolerance=u32Arg;
2318 _DRV_HVD_Return(eRet );
2319 }
2320
2321 //-----------------------------------------------------------------------------
2322 /// @brief \b Function \b Name: MDrv_HVD_Sub_SetSyncVideoDelay()
2323 /// @brief \b Function \b Description: Set the video delay from STC when sync mode active.
2324 /// @param -u32Arg \b IN : The video delay. unit:ms
2325 /// @return -The result of command set sync video delay
2326 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_SetSyncVideoDelay(MS_U32 u32Arg)2327 HVD_Result MDrv_HVD_Sub_SetSyncVideoDelay( MS_U32 u32Arg)
2328 {
2329 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
2330 HVD_SUB_MSG_TRACE();
2331 _DRV_HVD_Inited(eRet);
2332 _DRV_HVD_Entry();
2333 if( (gSubHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK) ==
2334 HVD_INIT_MAIN_LIVE_STREAM )
2335 {
2336 if( gSubHVDCtrl.InitParams.u8TimeUnit )
2337 {
2338 eRet= (HVD_Result)HAL_HVD_Sub_SetCmd(E_HVD_CMD_SYNC_VIDEO_DELAY, (MS_U32)(u32Arg+HVD_DTV_VIDEO_DELAY) );
2339 }
2340 else
2341 {
2342 eRet= (HVD_Result)HAL_HVD_Sub_SetCmd(E_HVD_CMD_SYNC_VIDEO_DELAY, u32Arg+((MS_U32)HVD_DTV_VIDEO_DELAY*90) );
2343 }
2344 }
2345 else
2346 {
2347 eRet= (HVD_Result)HAL_HVD_Sub_SetCmd(E_HVD_CMD_SYNC_VIDEO_DELAY, u32Arg);
2348 }
2349 gSubHVDCtrl.Settings.u32SyncVideoDelay=u32Arg;
2350 _DRV_HVD_Return(eRet );
2351 }
2352
2353 //-----------------------------------------------------------------------------
2354 /// @brief \b Function \b Name: MDrv_HVD_Sub_SetSyncFreeRunTH()
2355 /// @brief \b Function \b Description: Set the tolerance of FW reporting sync reach.
2356 /// @param -u32Arg \b IN : theashold.
2357 /// - 0 : use FW default value
2358 /// - 0xFFFFFFFF : never free run, FW always do sync action.
2359 /// @return -The result of command set sync tolerance
2360 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_SetSyncFreeRunTH(MS_U32 u32Arg)2361 HVD_Result MDrv_HVD_Sub_SetSyncFreeRunTH(MS_U32 u32Arg )
2362 {
2363 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
2364 HVD_SUB_MSG_TRACE();
2365 _DRV_HVD_Inited(eRet);
2366 _DRV_HVD_Entry();
2367 eRet = (HVD_Result)HAL_HVD_Sub_SetCmd(E_HVD_CMD_FREERUN_THRESHOLD, u32Arg);
2368 gSubHVDCtrl.Settings.u32SyncFreeRunTH=u32Arg;
2369 _DRV_HVD_Return(eRet );
2370 }
2371
2372 //-----------------------------------------------------------------------------
2373 /// @brief \b Function \b Name: MDrv_HVD_Sub_SetSyncRepeatTH()
2374 /// @brief \b Function \b Description: Set the repeat threashold under sync mode.
2375 /// @param -u32Arg \b IN : repeat times. 0x01 ~ 0xFF
2376 /// 0xff - repeat current frame until STC catch up PTS.
2377 /// @return -The result of command set sync repeat threashold
2378 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_SetSyncRepeatTH(MS_U32 u32Arg)2379 HVD_Result MDrv_HVD_Sub_SetSyncRepeatTH( MS_U32 u32Arg)
2380 {
2381 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
2382 HVD_SUB_MSG_TRACE();
2383 _DRV_HVD_Inited(eRet);
2384 _DRV_HVD_Entry();
2385 eRet= (HVD_Result)HAL_HVD_Sub_SetCmd(E_HVD_CMD_SYNC_THRESHOLD, u32Arg);
2386 gSubHVDCtrl.Settings.u32SyncRepeatTH=u32Arg;
2387 _DRV_HVD_Return(eRet );
2388 }
2389
2390 //-----------------------------------------------------------------------------
2391 /// @brief \b Function \b Name: MDrv_HVD_Sub_SetErrConceal()
2392 /// @brief \b Function \b Description: Enable/Disable error concealment.
2393 /// @param -bEnable \b IN : Enable/Disable
2394 /// -FALSE(0): Disable error concealment.
2395 /// -TRUE(1): Enable error concealment.
2396 /// @return -The result of command set sync tolerance
2397 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_SetErrConceal(MS_BOOL bEnable)2398 HVD_Result MDrv_HVD_Sub_SetErrConceal(MS_BOOL bEnable )
2399 {
2400 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
2401 HVD_SUB_MSG_TRACE();
2402 _DRV_HVD_Inited(eRet);
2403 _DRV_HVD_Entry();
2404 eRet = (HVD_Result)HAL_HVD_Sub_SetCmd(E_HVD_CMD_ERR_CONCEAL, bEnable);
2405 gSubHVDCtrl.Settings.bIsErrConceal=bEnable;
2406 _DRV_HVD_Return(eRet );
2407 }
2408
2409 //-----------------------------------------------------------------------------
2410 /// @brief \b Function \b Name: MDrv_HVD_Sub_SetDbgLevel()
2411 /// @brief \b Function \b Description: Set debug level
2412 /// @param -elevel \b IN : debug level
2413 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_SetDbgLevel(HVD_Uart_Level elevel)2414 void MDrv_HVD_Sub_SetDbgLevel( HVD_Uart_Level elevel )
2415 {
2416 if( elevel == E_HVD_UART_LEVEL_FW )
2417 {
2418 HAL_HVD_Sub_UartSwitch2FW(TRUE);
2419 }
2420 #if 0
2421 else
2422 {
2423 HAL_HVD_Sub_UartSwitch2FW(FALSE);
2424 }
2425 #endif
2426 switch( elevel )
2427 {
2428 case E_HVD_UART_LEVEL_ERR:
2429 u32SubUartCtrl =E_HVD_UART_CTRL_ERR;
2430 break;
2431 case E_HVD_UART_LEVEL_INFO:
2432 u32SubUartCtrl =E_HVD_UART_CTRL_INFO|E_HVD_UART_CTRL_ERR;
2433 break;
2434 case E_HVD_UART_LEVEL_DBG:
2435 u32SubUartCtrl =E_HVD_UART_CTRL_DBG|E_HVD_UART_CTRL_ERR|E_HVD_UART_CTRL_INFO;
2436 break;
2437 case E_HVD_UART_LEVEL_TRACE:
2438 u32SubUartCtrl =E_HVD_UART_CTRL_TRACE|E_HVD_UART_CTRL_ERR|E_HVD_UART_CTRL_INFO|E_HVD_UART_CTRL_DBG;
2439 break;
2440 case E_HVD_UART_LEVEL_FW:
2441 //u32SubUartCtrl =E_HVD_UART_CTRL_FW|E_HVD_UART_CTRL_ERR|E_HVD_UART_CTRL_INFO|E_HVD_UART_CTRL_DBG|E_HVD_UART_CTRL_TRACE;
2442 //break;
2443 case E_HVD_UART_LEVEL_NONE:
2444 default:
2445 u32SubUartCtrl=E_HVD_UART_CTRL_DISABLE;
2446 break;
2447 }
2448 }
2449
2450 //-----------------------------------------------------------------------------
2451 /// @brief \b Function \b Name: MDrv_HVD_Sub_SeekToPTS()
2452 /// @brief \b Function \b Description: Let FW decode to the input PTS by using full decoding speed. If FW reaches (equal to or larger than) input PTS, FW will pause automatically. This function can not work under MDrv_HVD_SetSyncActive(TRUE).
2453 /// @param -u32PTS \b IN : specific PTS.
2454 /// -0: disable this mode. FW will go back to previous status (play or pause).
2455 /// -any not zero: enable this mode
2456 /// @return -The result of command seek to specific PTS.
2457 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_SeekToPTS(MS_U32 u32PTS)2458 HVD_Result MDrv_HVD_Sub_SeekToPTS(MS_U32 u32PTS )
2459 {
2460 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
2461 HVD_SUB_MSG_TRACE();
2462 _DRV_HVD_Inited(eRet);
2463 _DRV_HVD_Entry();
2464 eRet=_DRV_HVD_Sub_Check_Cmd( E_HVD_CHECK_CMD_SEEK2PTS );
2465 if( eRet != E_HVD_OK )
2466 {
2467 _DRV_HVD_Return(eRet );
2468 }
2469 eRet = (HVD_Result)HAL_HVD_Sub_SetCmd(E_HVD_CMD_JUMP_TO_PTS, u32PTS);
2470 _DRV_HVD_Return(eRet );
2471 }
2472
2473 //-----------------------------------------------------------------------------
2474 /// @brief \b Function \b Name: MDrv_HVD_Sub_SkipToPTS()
2475 /// @brief \b Function \b Description: Let FW skip to the input PTS by using full decoding speed and start decode again after input PTS.
2476 /// @param -u32PTS \b IN : specific PTS.
2477 /// -0: disable this mode. FW will go back to previous status (play or pause).
2478 /// -any not zero: enable this mode
2479 /// @return -The result of command seek to specific PTS.
2480 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_SkipToPTS(MS_U32 u32PTS)2481 HVD_Result MDrv_HVD_Sub_SkipToPTS(MS_U32 u32PTS )
2482 {
2483 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
2484 HVD_SUB_MSG_TRACE();
2485 _DRV_HVD_Inited(eRet);
2486 _DRV_HVD_Entry();
2487 eRet = (HVD_Result)HAL_HVD_Sub_SetCmd(E_HVD_CMD_SKIP_TO_PTS, u32PTS);
2488 _DRV_HVD_Return(eRet );
2489 }
2490
2491 //-----------------------------------------------------------------------------
2492 /// @brief \b Function \b Name: MDrv_HVD_Sub_SetFreezeImg()
2493 /// @brief \b Function \b Description: Let FW stop updating frames when vsync, but decoding process is still going.
2494 /// @param -bEnable \b IN : Enable/Disable
2495 /// -FALSE(0): Disable freeze image.
2496 /// -TRUE(1): Enable freeze image.
2497 /// @return -The result of command freeze image.
2498 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_SetFreezeImg(MS_BOOL bEnable)2499 HVD_Result MDrv_HVD_Sub_SetFreezeImg(MS_BOOL bEnable )
2500 {
2501 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
2502 HVD_SUB_MSG_TRACE();
2503 _DRV_HVD_Inited(eRet);
2504 _DRV_HVD_Entry();
2505 eRet = (HVD_Result)HAL_HVD_Sub_SetCmd(E_HVD_CMD_FREEZE_IMG, bEnable);
2506 _DRV_HVD_Return(eRet );
2507 }
2508
2509 //-----------------------------------------------------------------------------
2510 /// @brief \b Function \b Name: MDrv_HVD_Sub_SetBlueScreen()
2511 /// @brief \b Function \b Description: Let FW stop updating frames when vsync and keep blue screen , but decoding process is still going.
2512 /// @param -bEnable \b IN : Enable/Disable
2513 /// -FALSE(0): Disable blue screen.
2514 /// -TRUE(1): Enable blue screen.
2515 /// @return -The result of command set blue screen.
2516 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_SetBlueScreen(MS_BOOL bEnable)2517 HVD_Result MDrv_HVD_Sub_SetBlueScreen(MS_BOOL bEnable )
2518 {
2519 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
2520 HVD_SUB_MSG_TRACE();
2521 _DRV_HVD_Inited(eRet);
2522 _DRV_HVD_Entry();
2523 eRet = (HVD_Result)HAL_HVD_Sub_SetCmd(E_HVD_CMD_BLUE_SCREEN, bEnable);
2524 _DRV_HVD_Return(eRet );
2525 }
2526
2527 //-----------------------------------------------------------------------------
2528 /// @brief \b Function \b Name: MDrv_HVD_Sub_SetDispOneField()
2529 /// @brief \b Function \b Description: Let FW only show one field(top field only).
2530 /// @param -bEnable \b IN : Enable/Disable
2531 /// -FALSE(0): Disable display one field.
2532 /// -TRUE(1): Enable display one field.
2533 /// @return -The result of command display one field.
2534 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_SetDispOneField(MS_BOOL bEnable)2535 HVD_Result MDrv_HVD_Sub_SetDispOneField(MS_BOOL bEnable )
2536 {
2537 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
2538 HVD_SUB_MSG_TRACE();
2539 _DRV_HVD_Inited(eRet);
2540 _DRV_HVD_Entry();
2541 if( bEnable )
2542 { // force to show top field only.
2543 eRet = (HVD_Result)HAL_HVD_Sub_SetCmd(E_HVD_CMD_DISP_ONE_FIELD, E_HVD_FIELD_CTRL_TOP);
2544 }
2545 else
2546 {
2547 eRet = (HVD_Result)HAL_HVD_Sub_SetCmd(E_HVD_CMD_DISP_ONE_FIELD, E_HVD_FIELD_CTRL_OFF);
2548 }
2549 _DRV_HVD_Return(eRet );
2550 }
2551
2552 //-----------------------------------------------------------------------------
2553 /// @brief \b Function \b Name: MDrv_HVD_Sub_SetISREvent()
2554 /// @brief \b Function \b Description: Set the ISR event type sended by HVD fw.
2555 /// @param -u32Event \b IN : event types
2556 /// @param -fnISRHandler \b IN : function pointer to a interrupt handler.
2557 /// @return -The result of command set ISR event.
2558 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_SetISREvent(MS_U32 u32Event,HVD_InterruptCb fnISRHandler)2559 HVD_Result MDrv_HVD_Sub_SetISREvent(MS_U32 u32Event, HVD_InterruptCb fnISRHandler)
2560 {
2561 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
2562 HVD_SUB_MSG_TRACE();
2563 _DRV_HVD_Inited(eRet);
2564 _DRV_HVD_Entry();
2565 if( u32Event == E_HVD_ISR_NONE )
2566 {
2567 gSubHVDCtrl.Settings.bEnISR = FALSE;
2568 HAL_HVD_Sub_Enable_ISR(FALSE);
2569 OSAL_HVD_ISR_Disable();
2570 OSAL_HVD_ISR_Detach();
2571 gHVDISRCtrl.bRegISR = FALSE;
2572 gHVDISRCtrl.pfnISRCallBack = NULL;
2573 gSubHVDCtrl.Settings.u32IsrEvent = (MS_U32)E_HVD_ISR_NONE;
2574 eRet = E_HVD_OK;
2575 }
2576 else
2577 {
2578 if(fnISRHandler != NULL)
2579 {
2580 #if 1 //If ISR handler has been registerred, we only need to reset event flag.
2581 if( gHVDISRCtrl.bRegISR )
2582 {
2583 gHVDISRCtrl.pfnISRCallBack = (HVD_ISRCallBack)fnISRHandler;
2584 eRet = (HVD_Result)HAL_HVD_Sub_SetCmd(E_HVD_CMD_ISR_TYPE, u32Event);
2585 if( eRet != E_HVD_OK)
2586 {
2587 _DRV_HVD_Return(eRet);
2588 }
2589 gSubHVDCtrl.Settings.u32IsrEvent = u32Event;
2590 eRet = E_HVD_OK;
2591 }
2592 else
2593 {
2594 gHVDISRCtrl.pfnISRCallBack = (HVD_ISRCallBack)fnISRHandler;
2595 OSAL_HVD_ISR_Attach( (void*)_DRV_HVD_Sub_ISRHandler );
2596 OSAL_HVD_ISR_Enable();
2597 HVD_MSG_INFO("attach ISR number:%d\n" , HVD_ISR_VECTOR);
2598 eRet = (HVD_Result)HAL_HVD_Sub_SetCmd(E_HVD_CMD_ISR_TYPE, u32Event);
2599 if(eRet != E_HVD_OK)
2600 {
2601 _DRV_HVD_Return(eRet );
2602 }
2603 gSubHVDCtrl.Settings.u32IsrEvent = u32Event;
2604 gSubHVDCtrl.Settings.bEnISR = TRUE;
2605 HAL_HVD_Sub_Enable_ISR(TRUE);
2606 gHVDISRCtrl.bRegISR=TRUE;
2607 eRet = E_HVD_OK;
2608 }
2609 #else
2610 HAL_HVD_Sub_Enable_ISR(FALSE);
2611 if( gHVDISRCtrl.bRegISR )
2612 {
2613 OSAL_HVD_ISR_Detach();
2614 gHVDISRCtrl.bRegISR=FALSE;
2615 }
2616 gHVDISRCtrl.pfnISRCallBack = (HVD_ISRCallBack)fnISRHandler;
2617 OSAL_HVD_ISR_Attach( (void*)_DRV_HVD_Sub_ISRHandler );
2618 OSAL_HVD_ISR_Enable();
2619 /*
2620 {
2621 MS_U32 i=0;
2622 for( i=0;i<68;i++ )
2623 {
2624 MsOS_AttachInterrupt( i , (void*)_DRV_HVD_Sub_ISRHandler );//(InterruptCb)fnISRHandler );
2625 MsOS_EnableInterrupt(i);
2626 }
2627 }
2628 */
2629 HVD_SUB_MSG_INFO("attach ISR number:%d\n" , HVD_ISR_VECTOR);
2630 eRet = (HVD_Result)HAL_HVD_Sub_SetCmd(E_HVD_CMD_ISR_TYPE, u32Event);
2631 gSubHVDCtrl.Settings.u32IsrEvent = u32Event;
2632 if( eRet != E_HVD_OK)
2633 {
2634 _DRV_HVD_Return(eRet );
2635 }
2636 HAL_HVD_Sub_Enable_ISR(TRUE);
2637 gHVDISRCtrl.bRegISR=TRUE;
2638 eRet = E_HVD_OK;
2639 #endif
2640 }
2641 else
2642 {
2643 HVD_SUB_MSG_ERR( "HVD DrvErr: SetISREvent with NULL pointer. ISR type:%lu\n", u32Event);
2644 eRet = E_HVD_RET_INVALID_PARAMETER;
2645 }
2646 }
2647 _DRV_HVD_Return(eRet);
2648 }
2649
2650 //-----------------------------------------------------------------------------
2651 /// @brief \b Function \b Name: MDrv_HVD_Sub_SetEnableISR()
2652 /// @brief \b Function \b Description: Enable/Disable HVD interrupt.
2653 /// @param -bEnable \b IN : Enable/Disable
2654 /// -FALSE(0): Disable interrupt.
2655 /// -TRUE(1): Enable interrupt.
2656 /// @return -The result of command set enable ISR.
2657 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_SetEnableISR(MS_BOOL bEnable)2658 MS_BOOL MDrv_HVD_Sub_SetEnableISR(MS_BOOL bEnable)
2659 {
2660 HVD_SUB_MSG_TRACE();
2661 _DRV_HVD_Inited(FALSE);
2662 HAL_HVD_Sub_Enable_ISR(bEnable);
2663 gSubHVDCtrl.Settings.bEnISR=bEnable;
2664 return TRUE;
2665 }
2666
2667 //-----------------------------------------------------------------------------
2668 /// @brief \b Function \b Name: MDrv_HVD_Sub_SetForceISR()
2669 /// @brief \b Function \b Description: test the HVD interrupt function. Force FW send one interrupt.
2670 /// @param -bEnable \b IN : Enable/Disable
2671 /// -FALSE(0): Clear force interrupt status from HK.
2672 /// -TRUE(1): force one interrupt from HK.
2673 /// @return -The result of command set force ISR.
2674 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_SetForceISR(MS_BOOL bEnable)2675 MS_BOOL MDrv_HVD_Sub_SetForceISR(MS_BOOL bEnable)
2676 {
2677 HVD_SUB_MSG_TRACE();
2678 _DRV_HVD_Inited(FALSE);
2679 HAL_HVD_Sub_SetForceISR( bEnable);
2680 return TRUE;
2681 }
2682
2683 //-----------------------------------------------------------------------------
2684 /// @brief \b Function \b Name: MDrv_HVD_Sub_SetMVOPDone()
2685 /// @brief \b Function \b Description: tell FW MVOP is ready for futher decode.
2686 /// @return -The result of command.
2687 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_SetMVOPDone(void)2688 MS_BOOL MDrv_HVD_Sub_SetMVOPDone(void)
2689 {
2690 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
2691 HVD_SUB_MSG_TRACE();
2692 _DRV_HVD_Inited(FALSE);
2693 //_DRV_HVD_Entry();
2694 eRet = (HVD_Result)HAL_HVD_Sub_SetCmd(E_HVD_CMD_BLUE_SCREEN, FALSE);
2695 return TRUE;
2696 }
2697
2698 //-----------------------------------------------------------------------------
2699 /// @brief \b Function \b Name: MDrv_HVD_Sub_SetVirtualBox()
2700 /// @brief \b Function \b Description: Set DS width and Height to F/W
2701 /// @param -u16Width \b IN : frame width
2702 /// @param -u16Height \b IN : frame height
2703 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_SetVirtualBox(MS_U16 u16Width,MS_U16 u16Height)2704 HVD_Result MDrv_HVD_Sub_SetVirtualBox(MS_U16 u16Width, MS_U16 u16Height)
2705 {
2706 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
2707 HVD_SUB_MSG_TRACE();
2708 _DRV_HVD_Inited(eRet);
2709 _DRV_HVD_Entry();
2710 HAL_HVD_Sub_SetData(E_HVD_SDATA_VIRTUAL_BOX_WIDTH, u16Width);
2711 HAL_HVD_Sub_SetData(E_HVD_SDATA_VIRTUAL_BOX_HEIGHT, u16Height);
2712 eRet = E_HVD_OK;
2713 _DRV_HVD_Return(eRet );
2714 }
2715
2716 //-----------------------------------------------------------------------------
2717 /// @brief \b Function \b Name: MDrv_HVD_Sub_SetDynScalingParam()
2718 /// @brief \b Function \b Description: Pass scalar parameters to decoder
2719 /// @return -The result of command.
2720 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_SetDynScalingParam(void * pStAddr,MS_U32 u32Size)2721 HVD_Result MDrv_HVD_Sub_SetDynScalingParam( void *pStAddr , MS_U32 u32Size )
2722 {
2723 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
2724 MS_U32 addr = 0;
2725
2726 HVD_SUB_MSG_TRACE();
2727 _DRV_HVD_Inited(eRet);
2728 _DRV_HVD_Entry();
2729 if( (pStAddr == NULL ) || (u32Size==0) )
2730 {
2731 eRet = E_HVD_RET_INVALID_PARAMETER;
2732 _DRV_HVD_Inited(eRet);
2733 }
2734 else
2735 {
2736 // 1. copy data input data array
2737 addr = MDrv_HVD_Sub_GetDynamicScalingInfo(E_HVD_DS_INFO_ADDR);
2738 HVD_memcpy(addr, pStAddr, u32Size);
2739
2740 // 2. while till FW finish it.
2741 eRet = (HVD_Result)HAL_HVD_Sub_SetCmd(E_HVD_CMD_SCALER_INFO_NOTIFY, 0);
2742 }
2743 _DRV_HVD_Return(eRet );
2744 }
2745
2746 //-----------------------------------------------------------------------------
2747 /// @brief \b Function \b Name: MDrv_HVD_Sub_SetDispInfoTH()
2748 /// @brief \b Function \b Description: Set the upper and lower limitation of a valid SPS.
2749 /// @param -DispInfoTH \b IN : tolerance.
2750 /// @return -The result of command set display inforation threshold
2751 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_SetDispInfoTH(HVD_Disp_Info_Threshold * DispInfoTH)2752 HVD_Result MDrv_HVD_Sub_SetDispInfoTH(HVD_Disp_Info_Threshold* DispInfoTH )
2753 {
2754 HVD_Disp_Info_TH DispInfoTHTmp;
2755 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
2756
2757 HVD_SUB_MSG_TRACE();
2758 _DRV_HVD_Inited(eRet);
2759 _DRV_HVD_Entry();
2760 if( DispInfoTH ==NULL)
2761 {
2762 _DRV_HVD_Return(eRet);
2763 }
2764 DispInfoTHTmp.u32FrmrateLowBound=DispInfoTH->u32FrmrateLowBound;
2765 DispInfoTHTmp.u32FrmrateUpBound=DispInfoTH->u32FrmrateUpBound;
2766 DispInfoTHTmp.u32MvopLowBound=DispInfoTH->u32MvopLowBound;
2767 DispInfoTHTmp.u32MvopUpBound=DispInfoTH->u32MvopUpBound;
2768 HAL_HVD_Sub_SetData( E_HVD_SDATA_DISP_INFO_TH , (MS_U32)(&DispInfoTHTmp) );
2769 eRet = (HVD_Result)HAL_HVD_Sub_SetCmd(E_HVD_CMD_UPDATE_DISP_THRESHOLD, 0);
2770 HVD_memcpy((void*)&(gSubHVDCtrl.Settings.DispInfoTH), (void*)(DispInfoTH), sizeof(HVD_Disp_Info_Threshold) );
2771 _DRV_HVD_Return(eRet );
2772 }
2773
2774 // check status
2775
2776 //-----------------------------------------------------------------------------
2777 /// @brief \b Function \b Name: MDrv_HVD_Sub_IsISROccured()
2778 /// @brief \b Function \b Description: Check if the ISR is occured or not.
2779 /// @return - Is occured or not
2780 /// @retval -FALSE(0): interrupt is not occured.
2781 /// @retval -TRUE(1): interrupt has been occured.
2782 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_IsISROccured(void)2783 MS_BOOL MDrv_HVD_Sub_IsISROccured(void)
2784 {
2785 HVD_SUB_MSG_TRACE();
2786 _DRV_HVD_Inited(FALSE);
2787 return HAL_HVD_Sub_IsISROccured();
2788 }
2789
2790 //-----------------------------------------------------------------------------
2791 /// @brief \b Function \b Name: MDrv_HVD_Sub_IsDispFinish()
2792 /// @brief \b Function \b Description: Check this file mode display is finish or not. only work after MDrv_HVD_SetDataEnd(TRUE)
2793 /// @return - Is finish or not
2794 /// @retval -FALSE(0): Not finish or Not in file mode playback
2795 /// @retval -TRUE(1): Display Finished.
2796 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_IsDispFinish(void)2797 MS_BOOL MDrv_HVD_Sub_IsDispFinish(void)
2798 {
2799 HVD_SUB_MSG_TRACE();
2800 _DRV_HVD_Inited(FALSE);
2801
2802 if( (gSubHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK) == HVD_INIT_MAIN_LIVE_STREAM)
2803 {
2804 return FALSE;
2805 }
2806
2807 if( gSubHVDCtrl.u32CtrlMode & HVD_CTRL_DATA_END)
2808 {
2809 if( _DRV_HVD_Sub_IsAllBufferEmpty() )
2810 {
2811 return TRUE;
2812 }
2813 else
2814 {
2815 //_DRV_HVD_PushDummy();
2816 return FALSE;
2817 }
2818 }
2819 else
2820 {
2821 return FALSE;
2822 }
2823 }
2824
2825 //-----------------------------------------------------------------------------
2826 /// @brief \b Function \b Name: MDrv_HVD_Sub_IsFrameShowed()
2827 /// @brief \b Function \b Description: Is HVD Frame showed after TriggerDisp(TRUE) or first frame showed
2828 /// @return - Is frame showed or not
2829 /// @retval -FALSE(0): New Framed showed
2830 /// @retval -TRUE(1): Not showed
2831 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_IsFrameShowed(void)2832 MS_BOOL MDrv_HVD_Sub_IsFrameShowed(void)
2833 {
2834 HVD_SUB_MSG_TRACE();
2835 _DRV_HVD_Inited(FALSE);
2836
2837 if( !HAL_HVD_Sub_GetData(E_HVD_GDATA_IS_1ST_FRM_RDY) )
2838 {// 1st frame not ready or AV sync not ready
2839 return FALSE;
2840 }
2841 else
2842 {// 1st frame showed or AV sync ready
2843 if( _DRV_HVD_Ctrl( HVD_CTRL_DISPLAY_CTRL))
2844 { // control display
2845 return (MS_BOOL)HAL_HVD_Sub_GetData(E_HVD_GDATA_IS_FRAME_SHOWED);
2846 }
2847 else
2848 { // cotrol decode
2849 return TRUE;
2850 }
2851 }
2852 }
2853
2854 //-----------------------------------------------------------------------------
2855 /// @brief \b Function \b Name: MDrv_HVD_Sub_IsStepDecodeDone()
2856 /// @brief \b Function \b Description: Is HVD step decode done after step decode command.
2857 /// @return - TRUE/FALSE
2858 /// @retval -FALSE(0): decoding, or user did not send corresponding step decode command.
2859 /// @retval -TRUE(1): decode done
2860 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_IsStepDecodeDone(void)2861 MS_BOOL MDrv_HVD_Sub_IsStepDecodeDone(void)
2862 {
2863 MS_BOOL bRet=FALSE;
2864 HVD_SUB_MSG_TRACE();
2865 _DRV_HVD_Inited(FALSE);
2866
2867 if( gSubHVDCtrl.bStepDecoding)
2868 {
2869 if( gSubHVDCtrl.u32StepDecodeCnt != HAL_HVD_Sub_GetData(E_HVD_GDATA_DECODE_CNT) )
2870 {
2871 gSubHVDCtrl.u32StepDecodeCnt = 0;
2872 bRet= TRUE;
2873 gSubHVDCtrl.bStepDecoding=FALSE;
2874 }
2875 }
2876 return bRet;
2877 }
2878
2879 //-----------------------------------------------------------------------------
2880 /// @brief \b Function \b Name: MDrv_HVD_Sub_CheckDispInfoRdy()
2881 /// @brief \b Function \b Description: check display info ready and correct or not
2882 /// @return -The result of command check display infor ready or not
2883 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_CheckDispInfoRdy(void)2884 HVD_Result MDrv_HVD_Sub_CheckDispInfoRdy(void)
2885 {
2886 MS_U32 u32ErrCode=0;
2887 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
2888 HVD_SUB_MSG_TRACE();
2889 _DRV_HVD_Inited(eRet);
2890
2891 if( !( gSubHVDCtrl.u32CtrlMode & HVD_CTRL_DISP_INFO_RDY) )
2892 {
2893 if( !HAL_HVD_Sub_GetData(E_HVD_GDATA_IS_DISP_INFO_CHANGE) )
2894 {
2895 return E_HVD_RET_NOTREADY;
2896 }
2897 else
2898 {
2899 gSubHVDCtrl.bIsDispInfoChg=TRUE;
2900 _DRV_HVD_SetCtrl(HVD_CTRL_DISP_INFO_RDY);
2901 }
2902 }
2903 // check if FW report error
2904 u32ErrCode = HAL_HVD_Sub_GetData(E_HVD_GDATA_ERROR_CODE);
2905 if( u32ErrCode != 0 )
2906 {
2907 if( u32ErrCode == E_HVD_ERR_OUT_OF_MEMORY)
2908 {
2909 HVD_SUB_MSG_ERR("HVD Err: FW error that Out of Memory:%lx. Allocated frame buffer size is smaller than required.\n" , u32ErrCode );
2910 gSubHVDCtrl.bIsDispInfoChg=FALSE;
2911 return E_HVD_RET_OUTOF_MEMORY;
2912 }
2913 }
2914 //>> move to FW
2915 #if 0
2916 if( (gSubHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_HW_MASK) == HVD_INIT_HW_AVC )
2917 {
2918 MS_U32 u32MaxFS = 0, u32FS = 0;
2919 MS_U8 u8LevelIdc = HAL_HVD_GetData(E_HVD_GDATA_AVC_LEVEL_IDC);
2920 MS_U32 u32Width, u32Height;
2921 HVD_Display_Info *pDispInfo = (HVD_Display_Info *)HAL_HVD_Sub_GetData(E_HVD_GDATA_DISP_INFO_ADDR);
2922 u32Height = pDispInfo->u16VerSize;
2923 u32Width = pDispInfo->u16VerSize;
2924 u32FS = (u32Width / 16) * (u32Height / 16);
2925
2926 switch(u8LevelIdc)
2927 {
2928 case 10:
2929 u32MaxFS = 99;
2930 break;
2931 case 11:
2932 case 12:
2933 case 13:
2934 case 20:
2935 u32MaxFS = 396;
2936 break;
2937 case 21:
2938 u32MaxFS = 792;
2939 break;
2940 case 22:
2941 case 30:
2942 u32MaxFS = 1620;
2943 break;
2944 case 31:
2945 u32MaxFS = 3600;
2946 break;
2947 case 32:
2948 u32MaxFS = 5120;
2949 break;
2950 case 40:
2951 case 41:
2952 u32MaxFS = 8192;
2953 break;
2954 case 42:
2955 u32MaxFS = 8704;
2956 break;
2957 case 50:
2958 u32MaxFS = 22080;
2959 break;
2960 case 51:
2961 u32MaxFS = 36864;
2962 break;
2963 default:
2964 u32MaxFS = 0xFFFFFFFF;
2965 break;
2966 }
2967
2968 if(u32FS > u32MaxFS)
2969 {
2970 HVD_SUB_MSG_DEG("HVD Err : SPS over spec,level = %d u32FS = %lu u32MaxFS = %lu\n", u8LevelIdc , u32FS, u32MaxFS);
2971 gSubHVDCtrl.bIsDispInfoChg=FALSE;
2972 return E_HVD_RET_UNSUPPORTED;
2973 }
2974 }
2975 #endif
2976 return E_HVD_OK;
2977 }
2978
2979 //-----------------------------------------------------------------------------
2980 /// @brief \b Function \b Name: MDrv_HVD_Sub_IsDispInfoChg()
2981 /// @brief \b Function \b Description: check display info is changed or not
2982 /// @return - TRUE / FALSE
2983 /// @retval -FALSE(0): not changed
2984 /// @retval -TRUE(1): changed
2985 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_IsDispInfoChg(void)2986 MS_BOOL MDrv_HVD_Sub_IsDispInfoChg(void)
2987 {
2988 MS_BOOL bRet=FALSE;
2989 HVD_SUB_MSG_TRACE();
2990 _DRV_HVD_Inited(FALSE);
2991
2992 bRet = (MS_BOOL)HAL_HVD_Sub_GetData(E_HVD_GDATA_IS_DISP_INFO_CHANGE);
2993 if( bRet )
2994 {
2995 gSubHVDCtrl.bIsDispInfoChg = TRUE;
2996 _DRV_HVD_SetCtrl(HVD_CTRL_DISP_INFO_RDY);
2997 }
2998 #if 0 // debug use
2999 {
3000 static MS_U32 u32DecodeCnt=0;
3001 static MS_U32 u32IdleCnt=0;
3002 MS_U32 tmp =0 ;
3003 tmp = MDrv_HVD_Sub_GetDecodeCnt();
3004 if( u32DecodeCnt != tmp )
3005 {
3006 printf( "%lu decode cnt:%lx PTS:%lx\n" , (MS_U32)bRet ,tmp , MDrv_HVD_GetPTS() );
3007 u32DecodeCnt =tmp;
3008 }
3009 else
3010 {
3011 u32IdleCnt++;
3012 }
3013 if( u32IdleCnt > 1000)
3014 {
3015 printf( "HVD: seems IDLE: %lu decode cnt:%lx PTS:%lx\n" , (MS_U32)bRet ,tmp , MDrv_HVD_Sub_GetPTS() );
3016 u32IdleCnt=0;
3017 }
3018 }
3019 #endif
3020 return bRet;
3021 }
3022
3023 //-----------------------------------------------------------------------------
3024 /// @brief \b Function \b Name: MDrv_HVD_Sub_IsIdle()
3025 /// @brief \b Function \b Description: check decoder is idle or not
3026 /// @return - TRUE / FALSE
3027 /// @retval -FALSE(0): decoder is not idle
3028 /// @retval -TRUE(1): decoder is idle
3029 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_IsIdle(void)3030 MS_BOOL MDrv_HVD_Sub_IsIdle(void)
3031 {
3032 HVD_SUB_MSG_TRACE();
3033 _DRV_HVD_Inited(FALSE);
3034
3035 if( HAL_HVD_Sub_GetData(E_HVD_GDATA_VPU_IDLE_CNT) > HVD_FW_IDLE_THRESHOLD )
3036 {
3037 return TRUE;
3038 }
3039 else
3040 {
3041 return FALSE;
3042 }
3043 }
3044
3045 //-----------------------------------------------------------------------------
3046 /// @brief \b Function \b Name: MDrv_HVD_Sub_IsSyncStart()
3047 /// @brief \b Function \b Description: check decoder starts to do sync action(drop or repeat) or not.
3048 /// @return - TRUE / FALSE
3049 /// @retval -FALSE(0): decoder is not doing sync action
3050 /// @retval -TRUE(1): decoder is doing sync action
3051 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_IsSyncStart(void)3052 MS_BOOL MDrv_HVD_Sub_IsSyncStart(void)
3053 {
3054 HVD_SUB_MSG_TRACE();
3055 _DRV_HVD_Inited(FALSE);
3056
3057 if( (MS_BOOL)MDrv_HVD_Sub_GetPlayMode(E_HVD_GMODE_IS_SYNC_ON) == FALSE)
3058 {
3059 return FALSE;
3060 }
3061 if( HAL_HVD_Sub_GetData(E_HVD_GDATA_IS_SYNC_START) )
3062 {
3063 return TRUE;
3064 }
3065 else
3066 {
3067 return FALSE;
3068 }
3069 }
3070
3071 //-----------------------------------------------------------------------------
3072 /// @brief \b Function \b Name: MDrv_HVD_Sub_IsSyncReach()
3073 /// @brief \b Function \b Description: The distance of Video time stamp and STC is closed enough.
3074 /// @return - TRUE / FALSE
3075 /// @retval -FALSE(0): The distance is not shorter than sync tolerance.
3076 /// @retval -TRUE(1): The distance is shorter than sync tolerance.
3077 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_IsSyncReach(void)3078 MS_BOOL MDrv_HVD_Sub_IsSyncReach(void)
3079 {
3080 HVD_SUB_MSG_TRACE();
3081 _DRV_HVD_Inited(FALSE);
3082
3083 if( (MS_BOOL)MDrv_HVD_Sub_GetPlayMode(E_HVD_GMODE_IS_SYNC_ON) == FALSE)
3084 {
3085 return FALSE;
3086 }
3087
3088 if( HAL_HVD_Sub_GetData(E_HVD_GDATA_IS_SYNC_REACH) )
3089 {
3090 return TRUE;
3091 }
3092 else
3093 {
3094 return FALSE;
3095 }
3096 }
3097
3098 //-----------------------------------------------------------------------------
3099 /// @brief \b Function \b Name: MDrv_HVD_Sub_IsLowDelay()
3100 /// @brief \b Function \b Description: check if current stream has low delay flag in SPS.
3101 /// @return - TRUE / FALSE
3102 /// @retval -FALSE(0): Low delay flag not found.
3103 /// @retval -TRUE(1): Low delay flag found.
3104 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_IsLowDelay(void)3105 MS_BOOL MDrv_HVD_Sub_IsLowDelay(void)
3106 {
3107 HVD_SUB_MSG_TRACE();
3108 _DRV_HVD_Inited(FALSE);
3109
3110 if( HAL_HVD_Sub_GetData(E_HVD_GDATA_AVC_LOW_DELAY) )
3111 {
3112 return TRUE;
3113 }
3114 else
3115 {
3116 return FALSE;
3117 }
3118 }
3119
3120 //-----------------------------------------------------------------------------
3121 /// @brief \b Function \b Name: MDrv_HVD_Sub_IsIFrmFound()
3122 /// @brief \b Function \b Description: check if I frame found after Init() or flush().
3123 /// @return - TRUE / FALSE
3124 /// @retval -FALSE(0): I frame is not found.
3125 /// @retval -TRUE(1): I frame has been found.
3126 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_IsIFrmFound(void)3127 MS_BOOL MDrv_HVD_Sub_IsIFrmFound(void)
3128 {
3129 HVD_SUB_MSG_TRACE();
3130 _DRV_HVD_Inited(FALSE);
3131
3132 if( HAL_HVD_Sub_GetData(E_HVD_GDATA_IS_I_FRM_FOUND) )
3133 {
3134 return TRUE;
3135 }
3136 else
3137 {
3138 return FALSE;
3139 }
3140 }
3141
3142 //-----------------------------------------------------------------------------
3143 /// @brief \b Function \b Name: MDrv_HVD_Sub_Is1stFrmRdy()
3144 /// @brief \b Function \b Description: check if first frame showed on screen after Init() or flush().
3145 /// @return - TRUE / FALSE
3146 /// @retval -FALSE(0): First frame is not showed.
3147 /// @retval -TRUE(1): First frame is showed.
3148 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_Is1stFrmRdy(void)3149 MS_BOOL MDrv_HVD_Sub_Is1stFrmRdy(void)
3150 {
3151 HVD_SUB_MSG_TRACE();
3152 _DRV_HVD_Inited(FALSE);
3153
3154 if( HAL_HVD_Sub_GetData(E_HVD_GDATA_IS_1ST_FRM_RDY) )
3155 {
3156 return TRUE;
3157 }
3158 else
3159 {
3160 return FALSE;
3161 }
3162 }
3163
3164 //-----------------------------------------------------------------------------
3165 /// @brief \b Function \b Name: MDrv_HVD_Sub_IsAllBufferEmpty()
3166 /// @brief \b Function \b Description: check if all of the buffers(display, decoded, BBU, bitstream) are empty.
3167 /// @return - TRUE / FALSE
3168 /// @retval -FALSE(0): Not Empty.
3169 /// @retval -TRUE(1): Empty.
3170 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_IsAllBufferEmpty(void)3171 MS_BOOL MDrv_HVD_Sub_IsAllBufferEmpty(void)
3172 {
3173 //HVD_SUB_MSG_TRACE();
3174 _DRV_HVD_Inited(FALSE);
3175
3176 if( _DRV_HVD_Sub_IsAllBufferEmpty() )
3177 {
3178 return TRUE;
3179 }
3180 else
3181 {
3182 return FALSE;
3183 }
3184 #if 0
3185 if( u32Times > 200 )
3186 {
3187 HVD_SUB_MSG_INFO("HVD Info: Flush() timeout failed:BBU:%lu Dec:%lu Disp:%lu Idle:%lu ESr:%lx ESw:%lx \n" ,
3188 HAL_HVD_Sub_GetData(E_HVD_GDATA_BBU_Q_NUMB) ,
3189 HAL_HVD_Sub_GetData(E_HVD_GDATA_DEC_Q_NUMB),
3190 HAL_HVD_Sub_GetData(E_HVD_GDATA_DISP_Q_NUMB),
3191 HAL_HVD_Sub_GetData(E_HVD_GDATA_VPU_IDLE_CNT),
3192 HAL_HVD_Sub_GetData( E_HVD_GDATA_ES_READ_PTR),
3193 HAL_HVD_Sub_GetData( E_HVD_GDATA_ES_WRITE_PTR) );
3194 eRet = E_HVD_FAIL;
3195 break;
3196 }
3197 return TRUE;
3198 #endif
3199 }
3200
3201 // get infomation
3202
3203 //-----------------------------------------------------------------------------
3204 /// @brief \b Function \b Name: MDrv_HVD_Sub_GetBBUVacancy()
3205 /// @brief \b Function \b Description: get the vacancy of BBU queue.
3206 /// @return - TRUE / FALSE
3207 /// @retval -0: queue is full.
3208 /// @retval -not zero: queue is not full.
3209 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_GetBBUVacancy(void)3210 MS_U32 MDrv_HVD_Sub_GetBBUVacancy(void)
3211 {
3212 MS_U32 u32BBUQnumb=0;
3213 MS_U32 u32BBUTotal=0;
3214 MS_U32 u32PTSQnumb=0;
3215 HVD_SUB_MSG_TRACE();
3216 _DRV_HVD_Inited(FALSE);
3217 u32BBUTotal = HAL_HVD_Sub_GetData(E_HVD_GDATA_FW_BBU_TOTAL_TBL_ENTRY);
3218 u32BBUQnumb = HAL_HVD_Sub_GetData(E_HVD_GDATA_BBU_Q_NUMB);
3219 if( u32BBUTotal <= u32BBUQnumb )
3220 {
3221 //HVD_SUB_MSG_ERR("HVD err: GetBBUVacancy has error that total number(%lx) is smaller than current number(%lx)\n" , u32BBUTotal, u32BBUQnumb);
3222 u32BBUQnumb=0;
3223 }
3224 else
3225 {
3226 u32BBUQnumb = u32BBUTotal - u32BBUQnumb;
3227 }
3228 if( u32BBUQnumb )
3229 {
3230 u32BBUTotal=HAL_HVD_Sub_GetData(E_HVD_GDATA_FW_PTS_TOTAL_ENTRY_NUMB) - 1; // add -1 for full case
3231 u32PTSQnumb=HAL_HVD_Sub_GetData(E_HVD_GDATA_PTS_Q_NUMB);
3232 if( u32BBUTotal <= u32PTSQnumb )
3233 {
3234 HVD_SUB_MSG_DEG("HVD Warn: GetBBUVacancy has error that total PTS Q number(%lx) is smaller than current PTS Q number(%lx)\n" , u32BBUTotal, u32PTSQnumb);
3235 u32BBUQnumb=0;
3236 }
3237 }
3238 return u32BBUQnumb;
3239 }
3240
3241 //-----------------------------------------------------------------------------
3242 /// @brief \b Function \b Name: MDrv_HVD_Sub_GetDispInfo()
3243 /// @brief \b Function \b Description: Get video display information
3244 /// @param -pinfo \b OUT : pointer to video display information.
3245 /// @return -The result of command get display information
3246 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_GetDispInfo(HVD_Disp_Info * pinfo)3247 HVD_Result MDrv_HVD_Sub_GetDispInfo( HVD_Disp_Info *pinfo )
3248 {
3249 MS_U32 u32Seqtimes=10;
3250 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
3251 HVD_SUB_MSG_TRACE();
3252 _DRV_HVD_Inited(eRet);
3253
3254 if( !(gSubHVDCtrl.u32CtrlMode & HVD_CTRL_DISP_INFO_RDY))
3255 {
3256 if( MDrv_HVD_Sub_CheckDispInfoRdy() == E_HVD_RET_NOTREADY )
3257 {
3258 return E_HVD_RET_NOTREADY;
3259 }
3260 }
3261 if( pinfo == NULL )
3262 {
3263 return E_HVD_RET_INVALID_PARAMETER;
3264 }
3265
3266 _DRV_HVD_Entry();
3267
3268 HVD_GETDISPINFO_START:
3269 HAL_HVD_Sub_SetData(E_HVD_SDATA_GET_DISP_INFO_START, 0);
3270 HVD_memcpy((void*)pinfo, (void*)HAL_HVD_Sub_GetData(E_HVD_GDATA_DISP_INFO_ADDR) , sizeof(HVD_Display_Info));
3271 if( HAL_HVD_Sub_GetData(E_HVD_GDATA_IS_DISP_INFO_UNCOPYED) )
3272 {
3273 u32Seqtimes--;
3274 if( u32Seqtimes > 0)
3275 {
3276 goto HVD_GETDISPINFO_START;
3277 }
3278 else
3279 {
3280 HVD_SUB_MSG_ERR("HVD Err: GetDispInfo Timeout:%d\n" , (MS_S16)HAL_HVD_Sub_GetData(E_HVD_GDATA_IS_DISP_INFO_UNCOPYED) );
3281 _DRV_HVD_Return( E_HVD_RET_TIMEOUT);
3282 }
3283 }
3284
3285 #if HVD_ENABLE_RV_FEATURE
3286 if(HVD_INIT_HW_RM == (gSubHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_HW_MASK))
3287 {//RM is always displayed by 60 frames per sec.
3288 pinfo->u32FrameRate = 60000;
3289 }
3290 #endif
3291
3292 if( gSubHVDCtrl.bIsDispInfoChg )
3293 {
3294 HVD_SUB_MSG_DEG("pinfo->u32FrameRate = %lu\n", pinfo->u32FrameRate);
3295 HVD_SUB_MSG_DEG("pinfo->u8Interlace = %x \n", (MS_S16)pinfo->u8Interlace);
3296 HVD_SUB_MSG_DEG("pinfo->u16HorSize = %u \n", pinfo->u16HorSize);
3297 HVD_SUB_MSG_DEG("pinfo->u16VerSize = %u \n", pinfo->u16VerSize);
3298 HVD_SUB_MSG_DEG("pinfo->u16Crop R/L = %u, %u \n", pinfo->u16CropRight, pinfo->u16CropLeft);
3299 HVD_SUB_MSG_DEG("pinfo->u16Crop B/T = %u, %u \n", pinfo->u16CropBottom, pinfo->u16CropTop);
3300 HVD_SUB_MSG_DEG("pinfo->u8AspectRate = %u \n", (MS_S16)pinfo->u8AspectRate);
3301 HVD_SUB_MSG_DEG("pinfo->u16SarWidth = %u \n", pinfo->u16SarWidth);
3302 HVD_SUB_MSG_DEG("pinfo->u16SarHeight = %u \n", pinfo->u16SarHeight);
3303 HVD_SUB_MSG_DEG("pinfo->u16Pitch = %u \n", pinfo->u16Pitch);
3304 HVD_SUB_MSG_DEG("pinfo->u8ColourPrimaries = %u \n", pinfo->u8ColourPrimaries);
3305 gSubHVDCtrl.bIsDispInfoChg=FALSE;
3306 }
3307
3308 _DRV_HVD_Return( E_HVD_OK);
3309 }
3310
3311 //-----------------------------------------------------------------------------
3312 /// @brief \b Function \b Name: MDrv_HVD_Sub_GetPTS()
3313 /// @brief \b Function \b Description: get the pts of current displayed video frame. unit: ms
3314 /// @return - PTS
3315 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_GetPTS(void)3316 MS_U32 MDrv_HVD_Sub_GetPTS(void)
3317 {
3318 MS_U32 u32PTS = 0;
3319 _DRV_HVD_Inited(FALSE);
3320 u32PTS = HAL_HVD_Sub_GetData(E_HVD_GDATA_PTS);
3321 return u32PTS;
3322 }
3323
3324 //-----------------------------------------------------------------------------
3325 /// @brief \b Function \b Name: MDrv_HVD_Sub_GetNextPTS()
3326 /// @brief \b Function \b Description: get the pts of next displayed video frame. unit: ms
3327 /// @return - PTS
3328 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_GetNextPTS(void)3329 MS_U32 MDrv_HVD_Sub_GetNextPTS(void)
3330 {
3331 MS_U32 u32PTS = 0;
3332 _DRV_HVD_Inited(FALSE);
3333 u32PTS = HAL_HVD_Sub_GetData(E_HVD_GDATA_NEXT_PTS);
3334 return u32PTS;
3335 }
3336
3337 //-----------------------------------------------------------------------------
3338 /// @brief \b Function \b Name: MDrv_HVD_Sub_GetDataErrCnt()
3339 /// @brief \b Function \b Description: get accumulated data Error Count
3340 /// @return -data error count
3341 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_GetDataErrCnt(void)3342 MS_U32 MDrv_HVD_Sub_GetDataErrCnt(void)
3343 {
3344 _DRV_HVD_Inited(FALSE);
3345 return HAL_HVD_Sub_GetData(E_HVD_GDATA_DATA_ERROR_CNT);
3346 }
3347
3348 //-----------------------------------------------------------------------------
3349 /// @brief \b Function \b Name: MDrv_HVD_Sub_GetDecErrCnt()
3350 /// @brief \b Function \b Description: get accumulated decode Error Count
3351 /// @return -decode error count
3352 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_GetDecErrCnt(void)3353 MS_U32 MDrv_HVD_Sub_GetDecErrCnt(void)
3354 {
3355 _DRV_HVD_Inited(FALSE);
3356 return HAL_HVD_Sub_GetData(E_HVD_GDATA_DEC_ERROR_CNT);
3357 }
3358
3359 //-----------------------------------------------------------------------------
3360 /// @brief \b Function \b Name: MDrv_HVD_Sub_GetESWritePtr()
3361 /// @brief \b Function \b Description: Get Elementary Stream buffer write point
3362 /// @return - ES buffer write point offset from bitstream buffer base
3363 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_GetESWritePtr(void)3364 MS_U32 MDrv_HVD_Sub_GetESWritePtr(void)
3365 {
3366 _DRV_HVD_Inited(FALSE);
3367 return HAL_HVD_Sub_GetData(E_HVD_GDATA_ES_WRITE_PTR);
3368 }
3369
3370 //-----------------------------------------------------------------------------
3371 /// @brief \b Function \b Name: MDrv_HVD_GetESReadPtr()
3372 /// @brief \b Function \b Description: Get Elementary Stream buffer read point
3373 /// @return - ES buffer read point offset from bitstream buffer base
3374 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_GetESReadPtr(void)3375 MS_U32 MDrv_HVD_Sub_GetESReadPtr(void)
3376 {
3377 _DRV_HVD_Inited(FALSE);
3378 return HAL_HVD_Sub_GetData(E_HVD_GDATA_ES_READ_PTR);
3379 }
3380
3381 //-----------------------------------------------------------------------------
3382 /// @brief \b Function \b Name: MDrv_HVD_Sub_GetErrCode()
3383 /// @brief \b Function \b Description: get error code
3384 /// @return - error code number
3385 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_GetErrCode(void)3386 MS_U32 MDrv_HVD_Sub_GetErrCode(void)
3387 {
3388 // TODO: define driver error code for upper layer
3389 MS_U32 u32Ret=0;
3390 _DRV_HVD_Inited(FALSE);
3391 u32Ret = HAL_HVD_Sub_GetData(E_HVD_GDATA_ERROR_CODE);
3392 HAL_HVD_Sub_SetData(E_HVD_SDATA_ERROR_CODE , 0);
3393 gSubHVDCtrl.u32LastErrCode = u32Ret;
3394 return u32Ret;
3395 }
3396
3397 //-----------------------------------------------------------------------------
3398 /// @brief \b Function \b Name: MDrv_HVD_Sub_GetPlayMode()
3399 /// @brief \b Function \b Description: Get current play mode status.
3400 /// @param -eMode \b IN : Mode type.
3401 /// @return - mode status
3402 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_GetPlayMode(HVD_Get_Mode_Status eMode)3403 MS_U32 MDrv_HVD_Sub_GetPlayMode(HVD_Get_Mode_Status eMode)
3404 {
3405 MS_U32 u32Ret=0;
3406 HVD_SUB_MSG_TRACE();
3407 _DRV_HVD_Inited(FALSE);
3408 switch( eMode )
3409 {
3410 case E_HVD_GMODE_IS_SHOW_ERR_FRM:
3411 case E_HVD_GMODE_IS_REPEAT_LAST_FIELD:
3412 case E_HVD_GMODE_IS_ERR_CONCEAL:
3413 case E_HVD_GMODE_IS_SYNC_ON:
3414 case E_HVD_GMODE_IS_PLAYBACK_FINISH:
3415 case E_HVD_GMODE_SYNC_MODE:
3416 case E_HVD_GMODE_SKIP_MODE:
3417 case E_HVD_GMODE_DROP_MODE:
3418 case E_HVD_GMODE_DISPLAY_SPEED:
3419 case E_HVD_GMODE_FRC_MODE:
3420 // TODO: add isr type here
3421 case E_HVD_GMODE_ISR_TYPE:
3422 u32Ret=HAL_HVD_Sub_GetData( (HVD_GetData)((MS_U32)eMode+ (MS_U32)E_HVD_GDATA_IS_SHOW_ERR_FRM));
3423 break;
3424 case E_HVD_GMODE_IS_STEP_DISPLAY:
3425 u32Ret = _DRV_HVD_Ctrl(HVD_CTRL_DISPLAY_CTRL);
3426 break;
3427 case E_HVD_GMODE_STREAM_TYPE:
3428 u32Ret = gSubHVDCtrl.InitParams.u32ModeFlag & E_HVD_INIT_MAIN_MASK;
3429 break;
3430 default:
3431 break;
3432 }
3433 return u32Ret;
3434 }
3435
3436 //-----------------------------------------------------------------------------
3437 /// @brief \b Function \b Name: MDrv_HVD_Sub_GetPlayState()
3438 /// @brief \b Function \b Description: get current play state
3439 /// @return - play state
3440 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_GetPlayState(void)3441 HVD_Get_Play_State MDrv_HVD_Sub_GetPlayState(void)
3442 {
3443 MS_U32 u32FWstate=0;
3444 HVD_Get_Play_State eRet=E_HVD_GSTATE_INIT;
3445 HVD_SUB_MSG_TRACE();
3446 _DRV_HVD_Inited(eRet);
3447 u32FWstate=HAL_HVD_Sub_GetData(E_HVD_GDATA_FW_STATE);
3448 u32FWstate &= E_HVD_FW_STATE_MASK;
3449 switch( u32FWstate )
3450 {
3451 case E_HVD_FW_INIT:
3452 eRet = E_HVD_GSTATE_INIT;
3453 break;
3454 case E_HVD_FW_PLAY:
3455 eRet = E_HVD_GSTATE_PLAY;
3456 break;
3457 case E_HVD_FW_PAUSE:
3458 eRet = E_HVD_GSTATE_PAUSE;
3459 break;
3460 case E_HVD_FW_STOP:
3461 eRet = E_HVD_GSTATE_STOP;
3462 break;
3463 }
3464 return eRet;
3465 }
3466
3467 //-----------------------------------------------------------------------------
3468 /// @brief \b Function \b Name: MDrv_HVD_Sub_GetDecodeCnt()
3469 /// @brief \b Function \b Description: get accumulated decoded frame Count
3470 /// @return - decoded frame Count
3471 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_GetDecodeCnt(void)3472 MS_U32 MDrv_HVD_Sub_GetDecodeCnt(void)
3473 {
3474 //HVD_SUB_MSG_TRACE();
3475 _DRV_HVD_Inited(FALSE);
3476 return HAL_HVD_Sub_GetData(E_HVD_GDATA_DECODE_CNT);
3477 }
3478
3479 //-----------------------------------------------------------------------------
3480 /// @brief \b Function \b Name: MDrv_HVD_Sub_GetActiveFormat()
3481 /// @brief \b Function \b Description: Get current AFD ID
3482 /// @return - AFD ID, 0xFF:invalid value
3483 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_GetActiveFormat(void)3484 MS_U8 MDrv_HVD_Sub_GetActiveFormat(void)
3485 {
3486 HVD_Display_Info *pDispInfo = NULL;
3487
3488 HVD_SUB_MSG_TRACE();
3489
3490 _DRV_HVD_Inited(~0);
3491
3492 if (!(gSubHVDCtrl.u32CtrlMode & HVD_CTRL_DISP_INFO_RDY))
3493 {
3494 return 0;
3495 }
3496
3497 pDispInfo = (HVD_Display_Info *) HAL_HVD_Sub_GetData(E_HVD_GDATA_DISP_INFO_ADDR);
3498
3499 if (pDispInfo != NULL)
3500 {
3501 return pDispInfo->u8AFD;
3502 }
3503 else
3504 {
3505 return ~0;
3506 }
3507 }
3508
3509 //-----------------------------------------------------------------------------
3510 /// @brief \b Function \b Name: MDrv_HVD_Sub_GetInfo()
3511 /// @brief \b Function \b Description: Get information of HVD driver.
3512 /// @return - driver information
3513 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_GetInfo(void)3514 const HVD_DrvInfo* MDrv_HVD_Sub_GetInfo( void )
3515 {
3516 DrvInfo.bAVC=MDrv_HVD_Sub_GetCaps( E_HVD_AVC);
3517 DrvInfo.bAVS=MDrv_HVD_Sub_GetCaps( E_HVD_AVS);
3518 DrvInfo.bRM=MDrv_HVD_Sub_GetCaps( E_HVD_RM);
3519 DrvInfo.FWversion=HVD_FW_VERSION;
3520 return (&DrvInfo);
3521 }
3522
3523 //-----------------------------------------------------------------------------
3524 /// @brief \b Function \b Name: MDrv_HVD_Sub_GetStatus()
3525 /// @brief \b Function \b Description: Get status of HVD driver
3526 /// @param -pstatus \b OUT : driver status
3527 /// @return - TRUE / FALSE
3528 /// @retval -FALSE(0): Low delay flag not found.
3529 /// @retval -TRUE(1): Low delay flag found.
3530 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_GetStatus(HVD_DrvStatus * pstatus)3531 MS_BOOL MDrv_HVD_Sub_GetStatus( HVD_DrvStatus *pstatus)
3532 {
3533 if( pstatus == NULL )
3534 {
3535 return FALSE;
3536 }
3537 pstatus->bInit = gSubHVDCtrl.u32CtrlMode&HVD_CTRL_INIT_FINISHED;
3538 pstatus->bBusy = gSubHVDCtrl.u32CtrlMode&HVD_CTRL_PROCESSING;
3539 return TRUE;
3540 }
3541
3542 //-----------------------------------------------------------------------------
3543 /// @brief \b Function \b Name: MDrv_HVD_Sub_GetFrmInfo()
3544 /// @brief \b Function \b Description: Get current displayed or decoded frame information of HVD driver
3545 /// @param -eType \b IN : Type of frame information
3546 /// @param -pInfo \b OUT : frame information
3547 /// @return -The result of command get frame information
3548 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_GetFrmInfo(HVD_Get_Frm_Info_Type eType,HVD_Frame_Info * pInfo)3549 HVD_Result MDrv_HVD_Sub_GetFrmInfo( HVD_Get_Frm_Info_Type eType , HVD_Frame_Info *pInfo)
3550 {
3551 HVD_Frm_Information *pFrmInfo =NULL;
3552 HVD_SUB_MSG_TRACE();
3553 _DRV_HVD_Inited(E_HVD_FAIL);
3554 if( pInfo == NULL )
3555 {
3556 return E_HVD_FAIL;
3557 }
3558 if( eType == E_HVD_GFRMINFO_DISPLAY )
3559 {
3560 pFrmInfo =(HVD_Frm_Information *)HAL_HVD_Sub_GetData(E_HVD_GDATA_DISP_FRM_INFO);
3561 }
3562 else if( eType == E_HVD_GFRMINFO_DECODE )
3563 {
3564 pFrmInfo =(HVD_Frm_Information *)HAL_HVD_Sub_GetData(E_HVD_GDATA_DEC_FRM_INFO);
3565 }
3566
3567 if( pFrmInfo != NULL )
3568 {
3569 pInfo->u32LumaAddr = (MS_PHYADDR)(pFrmInfo->u32LumaAddr);
3570 pInfo->u32ChromaAddr = (MS_PHYADDR)(pFrmInfo->u32ChromaAddr);
3571 if( gSubHVDCtrl.u32CtrlMode & HVD_CTRL_FRM_MIU_1 )
3572 {
3573 pInfo->u32LumaAddr+=gSubHVDCtrl.MemMap.u32MIU1BaseAddr;
3574 pInfo->u32ChromaAddr+=gSubHVDCtrl.MemMap.u32MIU1BaseAddr;
3575 }
3576 pInfo->u32TimeStamp= pFrmInfo->u32TimeStamp;
3577 pInfo->u32ID_L= pFrmInfo->u32ID_L;
3578 pInfo->u32ID_H= pFrmInfo->u32ID_H;
3579 pInfo->u16Pitch = pFrmInfo->u16Pitch;
3580 pInfo->u16Height = pFrmInfo->u16Height;
3581 pInfo->u16Width = pFrmInfo->u16Width;
3582 pInfo->eFrmType= (HVD_Frm_Type)(pFrmInfo->u8FrmType);
3583 pInfo->eFieldType=(HVD_FieldType)(pFrmInfo->u8FieldType);
3584 if( (pInfo->u16Pitch ==0) && (pInfo->u16Width == 0) && (pInfo->u16Height ==0) )
3585 {
3586 return E_HVD_FAIL;
3587 }
3588 }
3589 else
3590 {
3591 return E_HVD_FAIL;
3592 }
3593 return E_HVD_OK;
3594 }
3595
3596 //-----------------------------------------------------------------------------
3597 /// @brief \b Function \b Name: MDrv_HVD_Sub_GetISRInfo()
3598 /// @brief \b Function \b Description: Get information of HVD driver interrupt
3599 /// @param -eType \b OUT : ISR information
3600 /// @return -the result of get ISR information
3601 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_GetISRInfo(MS_U32 * eType)3602 MS_BOOL MDrv_HVD_Sub_GetISRInfo(MS_U32* eType)
3603 {
3604 HVD_SUB_MSG_TRACE();
3605 _DRV_HVD_Inited(FALSE);
3606
3607 if(TRUE == gHVDISRCtrl.bInISR)
3608 {
3609 gHVDISRCtrl.u32ISRInfo |= HAL_HVD_Sub_GetData( E_HVD_GDATA_HVD_ISR_STATUS );
3610 *eType = gHVDISRCtrl.u32ISRInfo;
3611 }
3612 else
3613 {
3614 *eType = HAL_HVD_Sub_GetData( E_HVD_GDATA_HVD_ISR_STATUS );
3615 }
3616 return TRUE;
3617 }
3618
3619 //-----------------------------------------------------------------------------
3620 /// @brief \b Function \b Name: MDrv_HVD_Sub_CalLumaSum()
3621 /// @brief \b Function \b Description: Get the sum of luma data in a frame.
3622 /// @param -eType \b IN : Type of frame information
3623 /// @return -the sum
3624 /// @retval -0xFFFFFFFF: error occer.
3625 /// @retval -not zero: the sum.
3626 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_CalLumaSum(HVD_Get_Frm_Info_Type eType)3627 MS_U32 MDrv_HVD_Sub_CalLumaSum( HVD_Get_Frm_Info_Type eType )
3628 {
3629 HVD_Frm_Information *pFrmInfo =NULL;
3630 MS_U32 u32Ret=HVD_U32_MAX;
3631 HVD_SUB_MSG_TRACE();
3632 _DRV_HVD_Inited(u32Ret);
3633 if( eType == E_HVD_GFRMINFO_DISPLAY )
3634 {
3635 pFrmInfo =(HVD_Frm_Information *)HAL_HVD_Sub_GetData(E_HVD_GDATA_DISP_FRM_INFO);
3636 }
3637 else if( eType == E_HVD_GFRMINFO_DECODE )
3638 {
3639 pFrmInfo =(HVD_Frm_Information *)HAL_HVD_Sub_GetData(E_HVD_GDATA_DEC_FRM_INFO);
3640 }
3641
3642 if( pFrmInfo != NULL )
3643 {
3644 MS_U32 u32tmp=0;
3645 MS_U32 u32PitchCnt=0;
3646 MS_U32 u32HeightCnt=0;
3647 volatile MS_U8* pLumaData=NULL;
3648 // PA2VA
3649 u32tmp = gSubHVDCtrl.MemMap.u32FrameBufAddr;
3650 if( gSubHVDCtrl.u32CtrlMode & HVD_CTRL_FRM_MIU_1 )
3651 {
3652 u32tmp -=gSubHVDCtrl.MemMap.u32MIU1BaseAddr;
3653 }
3654 pLumaData = (volatile MS_U8*)(gSubHVDCtrl.MemMap.u32FrameBufVAddr+(pFrmInfo->u32LumaAddr -u32tmp) );
3655 for( u32HeightCnt=0 ; u32HeightCnt < pFrmInfo->u16Height ; u32HeightCnt++ )
3656 {
3657 for( u32PitchCnt =0 ; u32PitchCnt < pFrmInfo->u16Pitch ;u32PitchCnt++ )
3658 {
3659 if( u32PitchCnt < pFrmInfo->u16Pitch )
3660 {
3661 u32Ret+=(MS_U32)(*pLumaData);
3662 }
3663 pLumaData++;
3664 }
3665 }
3666 }
3667 return u32Ret;
3668 }
3669
3670 //-----------------------------------------------------------------------------
3671 /// @brief \b Function \b Name: MDrv_HVD_Sub_GetUserData_Wptr()
3672 /// @brief \b Function \b Description: Get write pointer of user data.
3673 /// @return -the information of write pointer of user data.
3674 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_GetUserData_Wptr(void)3675 MS_U32 MDrv_HVD_Sub_GetUserData_Wptr( void )
3676 {
3677 MS_U32 u32Ret=0;
3678 HVD_SUB_MSG_TRACE();
3679 _DRV_HVD_Inited(FALSE);
3680 u32Ret = (MS_U32)HAL_HVD_Sub_GetData(E_HVD_GDATA_USERDATA_WPTR);
3681 return u32Ret;
3682 }
3683
3684 //-----------------------------------------------------------------------------
3685 /// @brief \b Function \b Name: MDrv_HVD_Sub_GetUserData_Packet()
3686 /// @brief \b Function \b Description: Get information of user data packet.
3687 /// @param -u32Idx \b IN : the pointer of required user data packet( valid range is 0 ~ 11 )
3688 /// @param -u32Size \b OUT : the size of required user data packet
3689 /// @return -the offset of user data packet form code buffer start address
3690 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_GetUserData_Packet(MS_U32 u32Idx,MS_U32 * u32Size)3691 MS_U32 MDrv_HVD_Sub_GetUserData_Packet( MS_U32 u32Idx , MS_U32* u32Size )
3692 {
3693 MS_U32 u32Ret=0;
3694 MS_U32 tmp=0;
3695 MS_U8* pIdx=NULL;
3696 HVD_SUB_MSG_TRACE();
3697 _DRV_HVD_Inited(FALSE);
3698 *u32Size=0;
3699 tmp = (MS_U32)HAL_HVD_Sub_GetData(E_HVD_GDATA_USERDATA_IDX_TBL_SIZE);
3700 if( u32Idx >= tmp )
3701 {
3702 HVD_SUB_MSG_ERR("HVD ERR: input user data index(%lu) is larger than max index(%lu)\n" , u32Idx , tmp );
3703 return 0;
3704 }
3705 tmp = (MS_U32)HAL_HVD_Sub_GetData(E_HVD_GDATA_USERDATA_IDX_TBL_ADDR);
3706 if( tmp == 0 )
3707 {
3708 HVD_SUB_MSG_INFO("HVD FW ERR: user data packet idx tbl base addr(%lx) is zero\n" , tmp );
3709 return 0;
3710 }
3711 pIdx = (MS_U8*)(tmp + u32Idx);
3712 tmp = (MS_U32)HAL_HVD_Sub_GetData(E_HVD_GDATA_USERDATA_PACKET_TBL_SIZE);
3713 if( (*pIdx) >= tmp )
3714 {
3715 HVD_SUB_MSG_INFO("HVD FW ERR: user data packet tbl ptr(%lu) is larger than max size(%lu)\n" , (MS_U32)(*pIdx) , tmp );
3716 return 0;
3717 }
3718 tmp = (MS_U32)HAL_HVD_Sub_GetData(E_HVD_GDATA_USERDATA_PACKET_TBL_ADDR);
3719 if( tmp == 0 )
3720 {
3721 HVD_SUB_MSG_INFO("HVD FW ERR: user data packet packet tbl base offset(%lx) is zero\n" , tmp );
3722 return 0;
3723 }
3724 u32Ret= tmp ;//+ gSubHVDCtrl.MemMap.u32CodeBufAddr;
3725 tmp = (MS_U32)HAL_HVD_Sub_GetData(E_HVD_GDATA_USERDATA_PACKET_SIZE);
3726 if( tmp == 0 )
3727 {
3728 HVD_SUB_MSG_INFO("HVD FW ERR: user data packet packet size(%lu) is zero\n" , tmp );
3729 return 0;
3730 }
3731 *u32Size=tmp;
3732 u32Ret += (MS_U32)(*pIdx) * tmp;
3733 return u32Ret;
3734 }
3735
3736 // VDEC Interal control
3737 //-----------------------------------------------------------------------------
3738 /// @brief \b Function \b Name: MDrv_HVD_Sub_GenPattern()
3739 /// @brief \b Function \b Description: Generate spcific pattern to support some special function.
3740 /// @param -eType \b IN : the virtual address of spcific pattern
3741 /// @param -u32VAddr \b IN : the virtual address of spcific pattern
3742 /// @param -u32Size \b IN, OUT :
3743 /// IN: the input array size.
3744 /// OUT: the used array size.
3745 /// @return -The result of command generate spcific pattern
3746 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_GenPattern(HVD_PatternType eType,MS_U32 u32VAddr,MS_U32 * u32Size)3747 HVD_Result MDrv_HVD_Sub_GenPattern( HVD_PatternType eType , MS_U32 u32VAddr , MS_U32* u32Size )
3748 {
3749 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
3750 MS_U8* pDummyData = NULL;
3751 MS_U32 u32MinPatternSize=0;
3752
3753 HVD_SUB_MSG_TRACE();
3754 _DRV_HVD_Inited(eRet);
3755 _DRV_HVD_Entry();
3756
3757 #if defined(CHIP_T2)
3758
3759 {// dummy pattern
3760 // Driver input need not to push dummy pattern
3761 if( (gSubHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK) == HVD_INIT_MAIN_FILE_RAW )
3762 {
3763 *u32Size = 0;
3764 eRet = E_HVD_OK;
3765 _DRV_HVD_Return(eRet );
3766 }
3767
3768 // TSP input process
3769 if( u32VAddr == 0)
3770 {
3771 *u32Size = 6;
3772 HVD_SUB_MSG_ERR("HVD ERR: Dummy Pattern address shall not be zero\n" );
3773 eRet = E_HVD_RET_INVALID_PARAMETER;
3774 _DRV_HVD_Return(eRet );
3775 }
3776 switch( (gSubHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_HW_MASK) )
3777 {
3778 case HVD_INIT_HW_AVC:
3779 u32MinPatternSize =6;
3780 break;
3781 case HVD_INIT_HW_AVS:
3782 case HVD_INIT_HW_RM:
3783 default:
3784 u32MinPatternSize = 0;
3785 break;
3786 }
3787 if( *u32Size < u32MinPatternSize )
3788 {
3789 HVD_SUB_MSG_ERR("HVD ERR: Dummy Pattern must have at least %lu bytes, input:%lu\n" , u32MinPatternSize , (MS_U32)(*u32Size) );
3790 *u32Size = u32MinPatternSize;
3791 eRet = E_HVD_RET_OUTOF_MEMORY;
3792 _DRV_HVD_Return(eRet );
3793 }
3794
3795 pDummyData = (MS_U8*)(u32VAddr);
3796 HVD_memset( (void*)pDummyData, 0xff , *u32Size);
3797
3798 switch( (gSubHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_HW_MASK) )
3799 {
3800 case HVD_INIT_HW_AVC:
3801 pDummyData[0] = 0;
3802 pDummyData[1] = 0;
3803 pDummyData[2] = 1;
3804 pDummyData[3] = 0xFF;
3805 pDummyData[*u32Size-1] = 0x80;
3806 break;
3807 case HVD_INIT_HW_AVS:
3808 case HVD_INIT_HW_RM:
3809 default:
3810 *u32Size = u32MinPatternSize;
3811 break;
3812 }
3813 }
3814
3815 #else // HVD chip set
3816 if( eType == E_HVD_PATTERN_FLUSH )
3817 {// flush pattern
3818 // Driver input need not to push flush pattern
3819 if( (gSubHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK) == HVD_INIT_MAIN_FILE_RAW )
3820 {
3821 *u32Size = 0;
3822 eRet = E_HVD_OK;
3823 _DRV_HVD_Return(eRet );
3824 }
3825
3826 // TSP input process
3827 if( u32VAddr == 0)
3828 {
3829 *u32Size = 8+144;
3830 HVD_SUB_MSG_ERR("HVD ERR: Flush Pattern address shall not be zero\n" );
3831 eRet = E_HVD_RET_INVALID_PARAMETER;
3832 _DRV_HVD_Return(eRet );
3833 }
3834 switch( (gSubHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_HW_MASK) )
3835 {
3836 case HVD_INIT_HW_AVC:
3837 u32MinPatternSize =8+144;
3838 break;
3839 case HVD_INIT_HW_AVS:
3840 u32MinPatternSize=8+144;
3841 break;
3842 case HVD_INIT_HW_RM:
3843 default:
3844 u32MinPatternSize = 0;
3845 break;
3846 }
3847 if( *u32Size < u32MinPatternSize )
3848 {
3849 HVD_SUB_MSG_ERR("HVD ERR: Flush Pattern must have at least %lu bytes, input:%lu\n" , u32MinPatternSize , (MS_U32)(*u32Size) );
3850 *u32Size = u32MinPatternSize;
3851 eRet = E_HVD_RET_OUTOF_MEMORY;
3852 _DRV_HVD_Return(eRet );
3853 }
3854 *u32Size = u32MinPatternSize;
3855
3856 pDummyData = (MS_U8*)(u32VAddr);
3857 HVD_memset( (void*)pDummyData, 0x0 , *u32Size);
3858
3859 switch( (gSubHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_HW_MASK) )
3860 {
3861 case HVD_INIT_HW_AVC:
3862 pDummyData[0] = 0;
3863 pDummyData[1] = 0;
3864 pDummyData[2] = 1;
3865 pDummyData[3] = 0xFF;
3866 pDummyData[4] = 0xAA;
3867 pDummyData[5] = 0x55;
3868 pDummyData[6] = 0xAA;
3869 pDummyData[7] = 0x55;
3870 break;
3871 case HVD_INIT_HW_AVS:
3872 pDummyData[0] = 0;
3873 pDummyData[1] = 0;
3874 pDummyData[2] = 1;
3875 pDummyData[3] = 0xB4;
3876 pDummyData[4] = 0xAA;
3877 pDummyData[5] = 0x55;
3878 pDummyData[6] = 0xAA;
3879 pDummyData[7] = 0x55;
3880 break;
3881 case HVD_INIT_HW_RM:
3882 default:
3883 break;
3884 }
3885
3886 }
3887 else if( eType == E_HVD_PATTERN_FILEEND )
3888 {// dummy pattern
3889 // Driver input need not to push dummy pattern
3890 if( (gSubHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK) == HVD_INIT_MAIN_FILE_RAW )
3891 {
3892 *u32Size = 0;
3893 eRet = E_HVD_OK;
3894 _DRV_HVD_Return(eRet );
3895 }
3896
3897 // TSP input process
3898 if( u32VAddr == 0)
3899 {
3900 *u32Size = 8+144;
3901 HVD_SUB_MSG_ERR("HVD ERR: Dummy Pattern address shall not be zero\n" );
3902 eRet = E_HVD_RET_INVALID_PARAMETER;
3903 _DRV_HVD_Return(eRet );
3904 }
3905 switch( (gSubHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_HW_MASK) )
3906 {
3907 case HVD_INIT_HW_AVC:
3908 u32MinPatternSize =8+144;
3909 break;
3910 case HVD_INIT_HW_AVS:
3911 u32MinPatternSize=8+144;
3912 break;
3913 case HVD_INIT_HW_RM:
3914 default:
3915 u32MinPatternSize = 0;
3916 break;
3917 }
3918 if( *u32Size < u32MinPatternSize )
3919 {
3920 HVD_SUB_MSG_ERR("HVD ERR: Dummy Pattern must have at least %lu bytes, input:%lu\n" , u32MinPatternSize , (MS_U32)(*u32Size) );
3921 *u32Size = u32MinPatternSize;
3922 eRet = E_HVD_RET_OUTOF_MEMORY;
3923 _DRV_HVD_Return(eRet );
3924 }
3925
3926 pDummyData = (MS_U8*)(u32VAddr);
3927
3928 HVD_memset( (void*)pDummyData, 0x0 , *u32Size);
3929
3930 switch( (gSubHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_HW_MASK) )
3931 {
3932 case HVD_INIT_HW_AVC:
3933 pDummyData[0] = 0;
3934 pDummyData[1] = 0;
3935 pDummyData[2] = 1;
3936 pDummyData[3] = 0xFF;
3937 pDummyData[4] = 0xFF;
3938 pDummyData[5] = 0xFF;
3939 pDummyData[6] = 0xFF;
3940 pDummyData[7] = 0xFF;
3941 break;
3942 case HVD_INIT_HW_AVS:
3943 pDummyData[0] = 0;
3944 pDummyData[1] = 0;
3945 pDummyData[2] = 1;
3946 pDummyData[3] = 0xB4;
3947 pDummyData[4] = 0xAA;
3948 pDummyData[5] = 0x66;
3949 pDummyData[6] = 0xAA;
3950 pDummyData[7] = 0x66;
3951 break;
3952 case HVD_INIT_HW_RM:
3953 default:
3954 *u32Size = u32MinPatternSize;
3955 break;
3956 }
3957 }
3958 #endif
3959 eRet = E_HVD_OK;
3960 _DRV_HVD_Return( eRet);
3961 }
3962
3963 //-----------------------------------------------------------------------------
3964 /// @brief \b Function \b Name: MDrv_HVD_Sub_GetPatternInfo()
3965 /// @brief \b Function \b Description: Get driver specific data information
3966 /// @param -eType \b IN : the type of specific data information
3967 /// @return -the information of choosed type
3968 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_GetPatternInfo(HVD_Pattern_Info eType)3969 MS_U32 MDrv_HVD_Sub_GetPatternInfo( HVD_Pattern_Info eType )
3970 {
3971 MS_U32 eRet=0;
3972 HVD_SUB_MSG_TRACE();
3973 _DRV_HVD_Inited(FALSE);
3974 switch( eType )
3975 {
3976 case E_HVD_FLUSH_PATTERN_SIZE:
3977 if( (gSubHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK) == HVD_INIT_MAIN_FILE_RAW )
3978 {
3979 eRet =0;
3980 }
3981 else if( (gSubHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK) == HVD_INIT_MAIN_FILE_TS)
3982 {
3983 #if defined(CHIP_T2)
3984 eRet =(MS_U32)HAL_HVD_Sub_GetData(E_HVD_GDATA_FW_MAX_DUMMY_FIFO);
3985 #else
3986 eRet =8+144;
3987 #endif
3988 }
3989 break;
3990
3991 case E_HVD_DUMMY_HW_FIFO:
3992 if( (gSubHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK) == HVD_INIT_MAIN_FILE_RAW )
3993 {
3994 eRet =0;
3995 }
3996 else if( (gSubHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK) == HVD_INIT_MAIN_FILE_TS)
3997 {
3998 eRet =(MS_U32)HAL_HVD_Sub_GetData(E_HVD_GDATA_FW_MAX_DUMMY_FIFO);
3999 }
4000 break;
4001 }
4002 return eRet;
4003 }
4004
4005 //-----------------------------------------------------------------------------
4006 /// @brief \b Function \b Name: MDrv_HVD_Sub_GetDynamicScalingInfo()
4007 /// @brief \b Function \b Description: Get information of Dynamic Scaling
4008 /// @param -eType \b IN : the type of specific information
4009 /// @return -the information of choosed type
4010 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_GetDynamicScalingInfo(HVD_DynamicScaling_Info eType)4011 MS_U32 MDrv_HVD_Sub_GetDynamicScalingInfo( HVD_DynamicScaling_Info eType )
4012 {
4013 MS_U32 u32Ret=0;
4014 HVD_SUB_MSG_TRACE();
4015 _DRV_HVD_Inited(FALSE);
4016 switch( eType )
4017 {
4018 case E_HVD_DS_BUF_MIUSEL:
4019 if( gSubHVDCtrl.MemMap.u32CodeBufAddr >= gSubHVDCtrl.MemMap.u32MIU1BaseAddr )
4020 {
4021 u32Ret=TRUE;
4022 }
4023 else
4024 {
4025 u32Ret=FALSE;
4026 }
4027 break;
4028 case E_HVD_DS_BUF_ADDR:
4029 u32Ret=(MS_U32)HAL_HVD_Sub_GetData(E_HVD_GDATA_FW_DS_BUF_ADDR);
4030 u32Ret+=gSubHVDCtrl.MemMap.u32CodeBufAddr;
4031 break;
4032 case E_HVD_DS_BUF_SIZE:
4033 u32Ret=(MS_U32)HAL_HVD_Sub_GetData(E_HVD_GDATA_FW_DS_BUF_SIZE);
4034 break;
4035 case E_HVD_DS_VECTOR_DEPTH:
4036 u32Ret=(MS_U32)HAL_HVD_Sub_GetData(E_HVD_GDATA_FW_DS_VECTOR_DEPTH);
4037 break;
4038 case E_HVD_DS_INFO_ADDR:
4039 u32Ret=(MS_U32)HAL_HVD_Sub_GetData(E_HVD_GDATA_FW_DS_INFO_ADDR);
4040 u32Ret+=gSubHVDCtrl.MemMap.u32CodeBufAddr;
4041 break;
4042 }
4043 return u32Ret;
4044 }
4045
4046 #if 0
4047 //-----------------------------------------------------------------------------
4048 /// @brief \b Enum \b Name: HVD_DynamicScaling_Info
4049 /// @brief \b Enum \b Description: The information type of dynamic scaling.
4050 //-----------------------------------------------------------------------------
4051 typedef enum
4052 {
4053 E_HVD_DS_CAPABILITY, ///< the capability of dynamic sacling. Ret: TRUE /FALSE
4054 E_HVD_DS_BUF_ADDR, ///< the buffer start physcial address.
4055 E_HVD_DS_BUF_SIZE, ///< the buffer size.
4056 E_HVD_DS_VECTOR_DEPTH, ///< the depth of scaling vector.
4057 } HVD_DynamicScaling_Info;
4058
4059
4060 //-----------------------------------------------------------------------------
4061 /// @brief \b Function \b Name: MDrv_HVD_GetDynamicScalingInfo()
4062 /// @brief \b Function \b Description: Get driver information of dynamic scaling
4063 /// @param -eType \b IN : the type of specific dynamic scaling information
4064 /// @return -the information of choosed type
4065 //-----------------------------------------------------------------------------
4066 MS_U32 MDrv_HVD_GetDynamicScalingInfo( HVD_DynamicScaling_Info eType )
4067 {
4068 MS_U32 u32Ret=0;
4069 HVD_SUB_MSG_TRACE();
4070 _DRV_HVD_Inited(FALSE);
4071
4072 switch( eType )
4073 {
4074 case E_HVD_DS_CAPABILITY:
4075 HAL_HVD_Sub_GetData( E_HVD_GDATA_DS_CAPABILITY );
4076 break;
4077 case E_HVD_DS_BUF_ADDR:
4078 HAL_HVD_Sub_GetData( E_HVD_GDATA_DS_BUF_ADDR );
4079 break;
4080 case E_HVD_DS_BUF_SIZE:
4081 HAL_HVD_Sub_GetData( E_HVD_GDATA_DS_BUF_SIZE );
4082 break;
4083 case E_HVD_DS_VECTOR_DEPTH:
4084 HAL_HVD_Sub_GetData( E_HVD_GDATA_DS_VECTOR_DEPTH );
4085 break;
4086 default:
4087 break;
4088 }
4089 return u32Ret;
4090 }
4091 #endif
4092 // debug
4093
4094 //-----------------------------------------------------------------------------
4095 /// @brief \b Function \b Name: MDrv_HVD_Sub_GetData()
4096 /// @brief \b Function \b Description: Get target data from HVD driver
4097 /// @param -eType \b IN : the type of the target data
4098 /// @return -the value of the target data
4099 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_GetData(HVD_GData_Type eType)4100 MS_U32 MDrv_HVD_Sub_GetData(HVD_GData_Type eType)
4101 {
4102 MS_U32 u32Ret=0;
4103 HVD_SUB_MSG_TRACE();
4104 _DRV_HVD_Inited(FALSE);
4105 switch( eType )
4106 {
4107 case E_HVD_GDATA_TYPE_DISP_CNT:
4108 u32Ret = HAL_HVD_Sub_GetData( E_HVD_GDATA_DISP_CNT );
4109 break;
4110 case E_HVD_GDATA_TYPE_SKIP_CNT:
4111 u32Ret = HAL_HVD_Sub_GetData( E_HVD_GDATA_SKIP_CNT );
4112 break;
4113 case E_HVD_GDATA_TYPE_DROP_CNT:
4114 u32Ret = HAL_HVD_Sub_GetData( E_HVD_GDATA_DROP_CNT );
4115 break;
4116 case E_HVD_GDATA_TYPE_IDLE_CNT:
4117 u32Ret = HAL_HVD_Sub_GetData( E_HVD_GDATA_VPU_IDLE_CNT );
4118 break;
4119 case E_HVD_GDATA_TYPE_VSYNC_CNT:
4120 u32Ret = HAL_HVD_Sub_GetData( E_HVD_GDATA_VSYNC_CNT );
4121 break;
4122 case E_HVD_GDATA_TYPE_MAIN_LOOP_CNT:
4123 u32Ret = HAL_HVD_Sub_GetData( E_HVD_GDATA_MAIN_LOOP_CNT );
4124 break;
4125 case E_HVD_GDATA_TYPE_AVC_LEVEL_IDC:
4126 u32Ret = HAL_HVD_Sub_GetData( E_HVD_GDATA_AVC_LEVEL_IDC );
4127 break;
4128 case E_HVD_GDATA_TYPE_DISP_Q_SIZE:
4129 u32Ret = HAL_HVD_Sub_GetData( E_HVD_GDATA_DISP_Q_NUMB );
4130 break;
4131 case E_HVD_GDATA_TYPE_ES_LEVEL:
4132 u32Ret = (MS_U32)(HVD_ES_Level)HAL_HVD_Sub_GetData( E_HVD_GDATA_ES_LEVEL );
4133 break;
4134 case E_HVD_GDATA_TYPE_AVC_VUI_DISP_INFO:
4135 u32Ret = HAL_HVD_Sub_GetData( E_HVD_GDATA_AVC_VUI_DISP_INFO );
4136 break;
4137 case E_HVD_GDATA_TYPE_DISP_STC:
4138 u32Ret = HAL_HVD_Sub_GetData( E_HVD_GDATA_DISP_STC );
4139 break;
4140 case E_HVD_GDATA_TYPE_USERDATA_IDX_TBL_SIZE:
4141 u32Ret = HAL_HVD_Sub_GetData(E_HVD_GDATA_USERDATA_IDX_TBL_SIZE);
4142 break;
4143 case E_HVD_GDATA_TYPE_USERDATA_PACKET_SIZE:
4144 u32Ret = HAL_HVD_Sub_GetData(E_HVD_GDATA_USERDATA_PACKET_SIZE);
4145 break;
4146
4147 default:
4148 break;
4149
4150 }
4151 return u32Ret;
4152 }
4153
4154 //-----------------------------------------------------------------------------
4155 /// @brief \b Function \b Name: MDrv_HVD_Sub_GetMem_Dbg()
4156 /// @brief \b Function \b Description: Get any data from any memory address
4157 /// @param -u32Addr \b IN : the memory address of the target data
4158 /// @return -the value of the memory
4159 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_GetMem_Dbg(MS_U32 u32Addr)4160 MS_U32 MDrv_HVD_Sub_GetMem_Dbg(MS_U32 u32Addr)
4161 {
4162 MS_U32 u32Ret=0;
4163 HVD_SUB_MSG_TRACE();
4164 _DRV_HVD_Inited(u32Ret);
4165 switch(u32Addr)
4166 {
4167 case 1:
4168 u32Ret = HAL_HVD_Sub_GetData( E_HVD_GDATA_BBU_READ_PTR );
4169 break;
4170 case 2:
4171 u32Ret = HAL_HVD_Sub_GetData( E_HVD_GDATA_VPU_PC_CNT );
4172 break;
4173 case 3:
4174 u32Ret = HAL_HVD_Sub_GetData( E_HVD_GDATA_BBU_WRITE_PTR );
4175 break;
4176 }
4177 return u32Ret;
4178 // break;
4179 // return HAL_HVD_GetData_Dbg(u32Addr);
4180 }
4181
4182 //-----------------------------------------------------------------------------
4183 /// @brief \b Function \b Name: MDrv_HVD_Sub_DbgDumpStatus()
4184 /// @brief \b Function \b Description: Dump specific information to standard output.
4185 /// @param -eFlag \b IN : the type of information.
4186 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_DbgDumpStatus(HVD_DumpStatus eFlag)4187 void MDrv_HVD_Sub_DbgDumpStatus(HVD_DumpStatus eFlag)
4188 {
4189 _DRV_HVD_Initedn();
4190 if( eFlag & E_HVD_DUMP_STATUS_DRV )
4191 {
4192 ;
4193 }
4194 if( eFlag & E_HVD_DUMP_STATUS_FW )
4195 {
4196 HAL_HVD_Sub_Dump_FW_Status();
4197 }
4198 if( eFlag & E_HVD_DUMP_STATUS_HW )
4199 {
4200 HAL_HVD_Sub_Dump_HW_Status(HVD_U32_MAX);
4201 }
4202 }
4203
4204 //-----------------------------------------------------------------------------
4205 /// @brief \b Function \b Name: MDrv_HVD_Sub_SetMem_Dbg()
4206 /// @brief \b Function \b Description: set any data into any memory address
4207 /// @param -u32Addr \b IN : the memory address of the target destination
4208 /// @param -u32Arg \b IN : the value of input content
4209 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_SetMem_Dbg(MS_U32 u32Addr,MS_U32 u32Arg)4210 void MDrv_HVD_Sub_SetMem_Dbg(MS_U32 u32Addr , MS_U32 u32Arg)
4211 {
4212 HVD_SUB_MSG_TRACE();
4213 HAL_HVD_Sub_SetData_Dbg(u32Addr ,u32Arg );
4214 }
4215
4216 //-----------------------------------------------------------------------------
4217 /// @brief \b Function \b Name: MDrv_HVD_Sub_SetCmd_Dbg()
4218 /// @brief \b Function \b Description: set any FW debug command
4219 /// @param -u32Cmd \b IN : specify the FW command ID.
4220 /// @param -u32Arg \b IN : specify the argument of FW command.
4221 /// @return -the result of debug command
4222 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_SetCmd_Dbg(MS_U32 u32Cmd,MS_U32 u32Arg)4223 HVD_Result MDrv_HVD_Sub_SetCmd_Dbg( MS_U32 u32Cmd , MS_U32 u32Arg)
4224 {
4225 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
4226 HVD_SUB_MSG_TRACE();
4227 _DRV_HVD_Inited(eRet);
4228 _DRV_HVD_Entry();
4229 eRet = (HVD_Result)HAL_HVD_Sub_SetCmd((HVD_User_Cmd)u32Cmd , u32Arg);
4230 _DRV_HVD_Return(eRet );
4231 }
4232
4233 //-----------------------------------------------------------------------------
4234 /// @brief \b Function \b Name: MDrv_HVD_Sub_SetSettings_Pro()
4235 /// @brief \b Function \b Description: set any FW debug command
4236 /// @param -eType \b IN : specify the type of setting.
4237 /// @param -u32Arg \b IN : specify the argument of the setting.
4238 /// @return -the result of set professional settings.
4239 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_SetSettings_Pro(HVD_SSettings_Type eType,MS_U32 u32Arg)4240 HVD_Result MDrv_HVD_Sub_SetSettings_Pro( HVD_SSettings_Type eType , MS_U32 u32Arg)
4241 {
4242 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
4243 HVD_User_Cmd eCmd = E_HVD_CMD_INVALID_CMD;
4244 HVD_SUB_MSG_TRACE();
4245 _DRV_HVD_Inited(eRet);
4246 _DRV_HVD_Entry();
4247 switch( eType )
4248 {
4249 case E_HVD_SSET_TIME_UNIT:
4250 eCmd = E_HVD_CMD_TIME_UNIT_TYPE;
4251 break;
4252 case E_HVD_SSET_PITCH:
4253 eCmd = E_HVD_CMD_PITCH;
4254 break;
4255 case E_HVD_SSET_SYNC_EACH_FRM:
4256 eCmd = E_HVD_CMD_SYNC_EACH_FRM;
4257 break;
4258 case E_HVD_SSET_MAX_DEC_TICK:
4259 eCmd = E_HVD_CMD_MAX_DEC_TICK;
4260 break;
4261 case E_HVD_SSET_AUTO_FREE_ES:
4262 eCmd = E_HVD_CMD_AUTO_FREE_ES;
4263 gSubHVDCtrl.Settings.bAutoFreeES=u32Arg;
4264 break;
4265 case E_HVD_SSET_MIN_FRAME_GAP:
4266 eCmd = E_HVD_CMD_MIN_FRAME_GAP;
4267 break;
4268 case E_HVD_SSET_DISABLE_DEBLOCKING:
4269 eCmd = E_HVD_CMD_DIS_DBF;
4270 if( u32Arg > 2 )
4271 {
4272 u32Arg =1;
4273 }
4274 gSubHVDCtrl.Settings.bDisDeblocking=u32Arg;
4275 break;
4276 case E_HVD_SSET_DISABLE_QUARTER_PIXEL:
4277 eCmd = E_HVD_CMD_DIS_QUART_PIXEL;
4278 if( u32Arg > 2 )
4279 {
4280 u32Arg =1;
4281 }
4282 gSubHVDCtrl.Settings.bDisQuarterPixel=u32Arg;
4283 break;
4284 case E_HVD_SSET_MIU_BURST_CNT_LEVEL:
4285 #if !(defined(CHIP_T2) || defined(CHIP_T7))
4286 gSubHVDCtrl.Settings.u32MiuBurstLevel=u32Arg;
4287 eCmd = E_HVD_CMD_MIU_BURST_CNT;
4288 #else
4289 eCmd = E_HVD_CMD_INVALID_CMD;
4290 #endif
4291 break;
4292 default:
4293 break;
4294 }
4295 if( eCmd != E_HVD_CMD_INVALID_CMD)
4296 {
4297 eRet = (HVD_Result)HAL_HVD_Sub_SetCmd(eCmd , u32Arg);
4298 }
4299 else
4300 {
4301 eRet = E_HVD_RET_INVALID_PARAMETER;
4302 }
4303 _DRV_HVD_Return(eRet );
4304 }
4305
4306 #if 1
4307
4308 //-----------------------------------------------------------------------------
4309 /// @brief \b Function \b Name: MDrv_HVD_Sub_GetCaps()
4310 /// @brief \b Function \b Description: check if HW support this format
4311 /// @param -u32Type \b IN : specify the format type
4312 /// @return - TRUE/ FALSE
4313 /// @retval -FALSE(0): not supported by HW
4314 /// @retval -TRUE(1): supported by HW
4315 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_GetCaps(HVD_Codec u32Type)4316 MS_BOOL MDrv_HVD_Sub_GetCaps( HVD_Codec u32Type)
4317 {
4318 MS_U32 verID=HAL_HVD_Sub_Get_HWVersionID();
4319 verID = verID;
4320 u32Type = u32Type;
4321 //AVCH264DBG(printf("HVD rev id: 0x%x \n\n", verID );
4322 #if ( HVD_HW_VERSION == HVD_HW_HVD)
4323 verID=verID >> 12;
4324 switch( u32Type )
4325 {
4326 case E_HVD_AVC:
4327 case E_HVD_AVS:
4328 case E_HVD_RM:
4329 if( (verID & BIT(u32Type)) == 0 )
4330 {
4331 return FALSE;
4332 }
4333 break;
4334 default:
4335 return FALSE;
4336 }
4337 #else
4338 if( u32Type != E_HVD_AVC )
4339 {
4340 return FALSE;
4341 }
4342 #endif
4343 return TRUE;
4344 }
4345 #endif
4346
4347 #if 0 //need check for hvd sub
4348 MS_BOOL MDrv_HVD_LinkWeakSymbolPatch(void)
4349 {
4350 return TRUE;
4351 }
4352 #endif
4353
4354 //-----------------------------------------------------------------------------
4355 /// @brief \b Function \b Name: MDrv_HVD_Sub_SetAutoRmLstZeroByte
4356 /// @brief \b Function \b Description: Turn on/off auto remove last zero byte
4357 /// @param -bOn \b IN : Turn on/off auto remove last zero byte
4358 /// @return -the result of turn on/off auto remove last zero byte
4359 ///\b NOTE: The default mode after initialization is On.
4360 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_SetAutoRmLstZeroByte(MS_BOOL bOn)4361 HVD_Result MDrv_HVD_Sub_SetAutoRmLstZeroByte(MS_BOOL bOn)
4362 {
4363 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
4364 HVD_SUB_MSG_TRACE();
4365 _DRV_HVD_Inited(eRet);
4366 gSubHVDCtrl.bAutoRmLastZeroByte = bOn;
4367 return E_HVD_OK;
4368 }
4369
4370 //-----------------------------------------------------------------------------
4371 /// @brief \b Function \b Name: MDrv_HVD_Sub_IsAlive
4372 /// @brief \b Function \b Description:Check Whether HVD is alive or not(check cnt)
4373 /// @return -the result of HVD alive status(E_HVD_OK/E_HVD_RET_NOT_RUNNING)
4374 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_IsAlive(void)4375 HVD_Result MDrv_HVD_Sub_IsAlive(void)
4376 {
4377 _DRV_HVD_Inited(E_HVD_FAIL);
4378 #if defined(CHIP_T2)
4379 return E_HVD_OK;
4380 #else
4381 if((gSubHVDCtrl.LivingStatus.u32DecCnt == HAL_HVD_Sub_GetData(E_HVD_GDATA_DECODE_CNT))
4382 && (gSubHVDCtrl.LivingStatus.u32SkipCnt == HAL_HVD_Sub_GetData(E_HVD_GDATA_SKIP_CNT))
4383 && (gSubHVDCtrl.LivingStatus.u32IdleCnt == HAL_HVD_Sub_GetData(E_HVD_GDATA_VPU_IDLE_CNT))
4384 && (gSubHVDCtrl.LivingStatus.u32MainLoopCnt == HAL_HVD_Sub_GetData(E_HVD_GDATA_MAIN_LOOP_CNT)))
4385 {
4386 return E_HVD_RET_NOT_RUNNING;
4387 }
4388 else
4389 {
4390 gSubHVDCtrl.LivingStatus.u32DecCnt = HAL_HVD_Sub_GetData(E_HVD_GDATA_DECODE_CNT);
4391 gSubHVDCtrl.LivingStatus.u32SkipCnt = HAL_HVD_Sub_GetData(E_HVD_GDATA_SKIP_CNT);
4392 gSubHVDCtrl.LivingStatus.u32IdleCnt = HAL_HVD_Sub_GetData(E_HVD_GDATA_VPU_IDLE_CNT);
4393 gSubHVDCtrl.LivingStatus.u32MainLoopCnt = HAL_HVD_Sub_GetData(E_HVD_GDATA_MAIN_LOOP_CNT);
4394 }
4395 return E_HVD_OK;
4396 #endif
4397 }
4398
4399 //-----------------------------------------------------------------------------
4400 /// @brief \b Function \b Name: MDrv_HVD_Sub_SetBalanceBW
4401 /// @brief \b Function \b Description: bandwidth adjustment
4402 /// @param -qp_cnt \b IN : QP threshold for overtime counter
4403 /// @param -db_cnt \b IN : Deblocking threshod for overtime counter
4404 /// @param -upper \b IN : upper bound for overtime counter
4405 /// @return -the result of command E_HVD_CMD_BALANCE_BW
4406 //-----------------------------------------------------------------------------
MDrv_HVD_Sub_SetBalanceBW(MS_U8 qp_cnt,MS_U8 db_cnt,MS_U8 upper)4407 HVD_Result MDrv_HVD_Sub_SetBalanceBW(MS_U8 qp_cnt, MS_U8 db_cnt, MS_U8 upper)
4408 {
4409 HVD_Result eRst=E_HVD_FAIL;
4410 HVD_SUB_MSG_TRACE();
4411 _DRV_HVD_Inited(eRst);
4412 _DRV_HVD_Entry();
4413 eRst = (HVD_Result)HAL_HVD_Sub_SetCmd(E_HVD_CMD_BALANCE_BW, qp_cnt | (db_cnt << 8) | (upper << 16));
4414 _DRV_HVD_Return( eRst);
4415 }
4416 #endif //defined(SUPPORT_HVD_SUB)
4417
4418