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93 ////////////////////////////////////////////////////////////////////////////////
94
95 ///////////////////////////////////////////////////////////////////////////////////////////////////
96 ///
97 /// file drvHVD.c
98 /// @brief HVD Driver Interface
99 /// @author MStar Semiconductor Inc.
100 ///////////////////////////////////////////////////////////////////////////////////////////////////
101
102
103 //-------------------------------------------------------------------------------------------------
104 // Include Files
105 //-------------------------------------------------------------------------------------------------
106 // Common Definition
107 #include "drvHVD_Common.h"
108 #include "drvHVD.h"
109 #include "drvHVD_def.h"
110
111 #include "fwHVD_if.h"
112 #include "halHVD.h"
113 #include "halVPU.h"
114
115 #if HVD_ENABLE_AUTO_SET_REG_BASE
116 #include "drvMMIO.h"
117 #endif
118
119 //-------------------------------------------------------------------------------------------------
120 // Driver Compiler Options
121 //-------------------------------------------------------------------------------------------------
122
123 //-------------------------------------------------------------------------------------------------
124 // Local Defines
125 //-------------------------------------------------------------------------------------------------
126 // Drv memory usage
127 #if defined(REDLION_LINUX_KERNEL_ENVI)
128 #define HVD_DTV_VIDEO_DELAY 0 // ms
129 #else
130 #define HVD_DTV_VIDEO_DELAY 0 // ms
131 #endif
132 #define HVD_FW_CMD_TIMEOUT_DEFAULT 100 // ms
133 #define HVD_FW_EXIT_ACTION_TIMEOUT 3500 // ms
134
135 #define HVD_CTRL_INIT_FINISHED BIT(0) // deflaut: 0
136 #define HVD_CTRL_PROCESSING BIT(1) // deflaut: 0
137 #define HVD_CTRL_DATA_END BIT(2) // deflaut: 0
138 #define HVD_CTRL_DISPLAY_CTRL BIT(3) // deflaut: 0
139 #define HVD_CTRL_DISP_INFO_RDY BIT(4) // deflaut: 0
140 #define HVD_CTRL_CODE_MIU_1 BIT(5) // deflaut: 0
141 #define HVD_CTRL_ES_MIU_1 BIT(6) // deflaut: 0
142 #define HVD_CTRL_FRM_MIU_1 BIT(7) // deflaut: 0
143 #define HVD_CTRL_DRVPROCC_MIU_1 BIT(8) // deflaut: 0
144
145 typedef enum
146 {
147 E_HVD_CHECK_CMD_NONE = 0, //decode -> decode_finish
148 E_HVD_CHECK_CMD_INIT,
149 E_HVD_CHECK_CMD_TRIGGER_DISP,
150 E_HVD_CHECK_CMD_SEEK2PTS,
151 E_HVD_CHECK_CMD_MAX,
152 } HVD_Check_Cmd;
153
154 #define HVD_MIU_PROTECT_HVD BIT(0)
155 #define HVD_MIU_PROTECT_MVD BIT(1)
156 #define HVD_MIU_PROTECT_VPU BIT(2)
157
158 #define _DRV_HVD_Entry() \
159 do \
160 { \
161 gHVDCtrl.u32CtrlMode |= HVD_CTRL_PROCESSING; \
162 } while (0)
163
164 #define _DRV_HVD_Return(_ret_) \
165 do \
166 { \
167 gHVDCtrl.u32CtrlMode &= (~HVD_CTRL_PROCESSING); \
168 return (_ret_); \
169 } while (0)
170
171 #define _DRV_HVD_Inited(_ret_) \
172 do \
173 { \
174 if (!bHVDIsInited) \
175 { \
176 return _ret_; \
177 } \
178 } while (0)
179
180 #define _DRV_HVD_Rsting(_ret_) \
181 do \
182 { \
183 if (bHVDIsIniting) \
184 { \
185 return _ret_; \
186 } \
187 } while (0)
188
189 #define _DRV_HVD_Ctrl(x) ( gHVDCtrl.u32CtrlMode & (x) )
190
191 #define _DRV_HVD_SetCtrl(x) \
192 do \
193 { \
194 gHVDCtrl.u32CtrlMode |= (x); \
195 } while (0)
196
197 #ifndef UNUSED
198 #define UNUSED(x) (void)(x)
199 #endif
200
201 //-------------------------------------------------------------------------------------------------
202 // Local Structures
203 //-------------------------------------------------------------------------------------------------
204
205 //-------------------------------------------------------------------------------------------------
206 // Local Functions Prototype
207 //-------------------------------------------------------------------------------------------------
208 static HVD_Result _DRV_HVD_InitVariables(HVD_MemCfg *pStMemCfg, HVD_Init_Params *pStInitParams);
209 static HVD_Result _DRV_HVD_Check_Cmd(HVD_Check_Cmd eCmd);
210 static HVD_Result _DRV_HVD_InitShareMem(void);
211 static HVD_Result _DRV_HVD_InitRegCPU(void);
212 static HVD_Result _DRV_HVD_SetSyncMode(HVD_Sync_Tbl_Type eMode);
213 static HVD_Result _DRV_HVD_InitFW_AVC(void);
214 static HVD_Result _DRV_HVD_Check_FW_Version(void);
215 static HVD_Result _DRV_HVD_InitFW(void);
216 static MS_BOOL _DRV_HVD_IsAllBufferEmpty(void);
217 #if defined(REDLION_LINUX_KERNEL_ENVI)
218 static MS_S32 _DRV_HVD_ISRHandler(void);
219 #else
220 static void _DRV_HVD_ISRHandler(void);
221 #endif
222
223 //-------------------------------------------------------------------------------------------------
224 // Global Variables
225 //-------------------------------------------------------------------------------------------------
226 MS_U32 u32UartCtrl = (E_HVD_UART_CTRL_ERR | E_HVD_UART_CTRL_MUST);
227 MS_U32 u32InitSysTimeBase = 0;
228
229 //-------------------------------------------------------------------------------------------------
230 // Local Variables
231 //-------------------------------------------------------------------------------------------------
232 static MSIF_Version _drv_hvd_version = {
233 .DDI = { HVD_DRV_VERSION, },
234 };
235 static MS_BOOL bHVDIsInited;
236 static MS_BOOL bHVDIsIniting;
237 static HVD_DrvInfo DrvInfo;
238 static HVD_ISR_Ctrl gHVDISRCtrl;
239 static HVD_BBU_Info gHVDPacket;
240 static HVD_Drv_Ctrl gHVDCtrl;
241 static HVD_Pre_Ctrl gHVDPreCtrl = {0};
242
243 //-------------------------------------------------------------------------------------------------
244 // Debug Functions
245 //-------------------------------------------------------------------------------------------------
246
247
248 //-------------------------------------------------------------------------------------------------
249 // Local Functions
250 //-------------------------------------------------------------------------------------------------
_DRV_HVD_InitVariables(HVD_MemCfg * pStMemCfg,HVD_Init_Params * pStInitParams)251 static HVD_Result _DRV_HVD_InitVariables(HVD_MemCfg *pStMemCfg, HVD_Init_Params *pStInitParams)
252 {
253 // PreSetControl
254 HAL_HVD_SetPreCtrlVariables((MS_U32)(&gHVDPreCtrl));
255
256 HVD_memset((void *) &gHVDCtrl, 0, sizeof(HVD_Drv_Ctrl));
257
258 if (sizeof(HVD_Init_Params) == sizeof(HVD_Init_Settings))
259 {
260 HVD_memcpy((void *) &gHVDCtrl.InitParams,
261 pStInitParams,
262 sizeof(HVD_Init_Params));
263 }
264 else
265 {
266 HVD_MSG_ERR("HVD Err: HVD struct define is diff: HVD_Init_Params(%lu) vs HVD_Init_Settings(%lu)\n",
267 (MS_U32)sizeof(HVD_Init_Params),
268 (MS_U32)sizeof(HVD_Init_Settings));
269 return E_HVD_FAIL;
270 }
271
272 // fill memory
273 if (pStMemCfg->u32MIU1BaseAddr == 0)
274 {
275 #if HVD_ENABLE_MSOS_MIU1_BASE
276 gHVDCtrl.MemMap.u32MIU1BaseAddr = HAL_MIU1_BASE;
277 #else
278 gHVDCtrl.MemMap.u32MIU1BaseAddr = HVD_MIU1_BASE_ADDRESS;
279 #endif
280 }
281 else
282 {
283 gHVDCtrl.MemMap.u32MIU1BaseAddr = pStMemCfg->u32MIU1BaseAddr;
284 }
285
286 gHVDCtrl.MemMap.eFWSourceType = (HVD_FWInputSourceType) pStMemCfg->eFWSourceType;
287 gHVDCtrl.MemMap.u32FWBinaryVAddr = pStMemCfg->u32FWBinaryVAddr;
288 gHVDCtrl.MemMap.u32FWBinaryAddr = (MS_U32) pStMemCfg->u32FWBinaryAddr;
289 gHVDCtrl.MemMap.u32FWBinarySize = pStMemCfg->u32FWBinarySize;
290 gHVDCtrl.MemMap.u32VLCBinaryVAddr = pStMemCfg->u32VLCBinaryVAddr;
291 gHVDCtrl.MemMap.u32VLCBinaryAddr = (MS_U32) pStMemCfg->u32VLCBinaryAddr;
292 gHVDCtrl.MemMap.u32VLCBinarySize = pStMemCfg->u32VLCBinarySize;
293 gHVDCtrl.MemMap.u32CodeBufVAddr = pStMemCfg->u32CodeBufVAddr;
294 gHVDCtrl.MemMap.u32CodeBufAddr = (MS_U32) pStMemCfg->u32CodeBufAddr;
295 gHVDCtrl.MemMap.u32CodeBufSize = pStMemCfg->u32CodeBufSize;
296 gHVDCtrl.MemMap.u32FrameBufVAddr = pStMemCfg->u32FrameBufVAddr;
297 gHVDCtrl.MemMap.u32FrameBufAddr = (MS_U32) pStMemCfg->u32FrameBufAddr;
298 gHVDCtrl.MemMap.u32FrameBufSize = pStMemCfg->u32FrameBufSize;
299 gHVDCtrl.MemMap.u32BitstreamBufVAddr= pStMemCfg->u32BitstreamBufVAddr;
300 gHVDCtrl.MemMap.u32BitstreamBufAddr = (MS_U32) pStMemCfg->u32BitstreamBufAddr ;
301 gHVDCtrl.MemMap.u32BitstreamBufSize = pStMemCfg->u32BitstreamBufSize ;
302 gHVDCtrl.MemMap.u32DrvProcessBufVAddr = pStMemCfg->u32DrvProcessBufVAddr;
303 gHVDCtrl.MemMap.u32DrvProcessBufAddr = (MS_U32) pStMemCfg->u32DrvProcessBufAddr;
304 gHVDCtrl.MemMap.u32DrvProcessBufSize = pStMemCfg->u32DrvProcessBufSize;
305
306 HVD_MSG_INFO("HVD mmap: MIU1base:%lx FW(%d %lx %lx %lx)vlc(%lx %lx %lx) (Va,Pa,Siz)Co(%lx %lx %lx)Fr(%lx %lx %lx)Bit(%lx %lx %lx) Drv(%lx %lx %lx)\n",
307 gHVDCtrl.MemMap.u32MIU1BaseAddr,
308 gHVDCtrl.MemMap.eFWSourceType,
309 gHVDCtrl.MemMap.u32FWBinaryVAddr,
310 gHVDCtrl.MemMap.u32FWBinaryAddr,
311 gHVDCtrl.MemMap.u32FWBinarySize,
312 gHVDCtrl.MemMap.u32VLCBinaryVAddr,
313 gHVDCtrl.MemMap.u32VLCBinaryAddr,
314 gHVDCtrl.MemMap.u32VLCBinarySize,
315 pStMemCfg->u32CodeBufVAddr,
316 gHVDCtrl.MemMap.u32CodeBufAddr,
317 gHVDCtrl.MemMap.u32CodeBufSize,
318 pStMemCfg->u32FrameBufVAddr,
319 gHVDCtrl.MemMap.u32FrameBufAddr,
320 gHVDCtrl.MemMap.u32FrameBufSize,
321 pStMemCfg->u32BitstreamBufVAddr,
322 gHVDCtrl.MemMap.u32BitstreamBufAddr,
323 gHVDCtrl.MemMap.u32BitstreamBufSize,
324 pStMemCfg->u32DrvProcessBufVAddr,
325 gHVDCtrl.MemMap.u32DrvProcessBufAddr,
326 gHVDCtrl.MemMap.u32DrvProcessBufSize);
327
328 gHVDCtrl.InitParams.u16DecoderClock = HAL_HVD_GetCorretClock(pStInitParams->u16DecoderClock);
329 {
330 MS_U32 offset = HAL_HVD_GetData(E_HVD_GDATA_FW_DUMMY_WRITE_ADDR);
331
332 if (offset != 0)
333 {
334 gHVDCtrl.u32DummyWriteBuf = gHVDCtrl.MemMap.u32CodeBufVAddr + offset;
335 }
336 }
337
338
339 MS_U32 i;
340 gHVDCtrl.CloseCaptionInfo.u8ParsingStatus = 0xff;
341 gHVDCtrl.CloseCaptionInfo.bBufMiu1[0] = gHVDCtrl.CloseCaptionInfo.bBufMiu1[1] = FALSE;
342 gHVDCtrl.CloseCaptionInfo.b708Enable = FALSE;
343 gHVDCtrl.CloseCaptionInfo.u32FWUsrDataRIdx = gHVDCtrl.CloseCaptionInfo.u32FWUsrDataWIdx = 0;
344 gHVDCtrl.CloseCaptionInfo.u32PktLen708 = 0;
345 gHVDCtrl.CloseCaptionInfo.u32PktHdrAddr708 = 0;
346
347
348 for (i=0;i<2;i++)
349 {
350 gHVDCtrl.CloseCaptionInfo.u32RingBufStartPAddr[i] = 0;
351 gHVDCtrl.CloseCaptionInfo.u32RingBufLen[i] = 0;
352 gHVDCtrl.CloseCaptionInfo.u32RingBufVacancy[i] = 0;
353 gHVDCtrl.CloseCaptionInfo.u32RingBufRPAddr[i] = 0;
354 gHVDCtrl.CloseCaptionInfo.u32RingBufWPAddr[i] = 0;
355 gHVDCtrl.CloseCaptionInfo.bOverFlow[i] = FALSE;
356 }
357 gHVDCtrl.CloseCaptionInfo.b608InfoEnhance = FALSE;
358
359
360 #if HVD_ENABLE_STOP_ACCESS_OVER_256
361 gHVDCtrl.bCannotAccessMIU256 = TRUE;
362 #endif
363
364 gHVDCtrl.bAutoRmLastZeroByte = TRUE;
365 gHVDCtrl.u32CmdTimeout = HVD_FW_CMD_TIMEOUT_DEFAULT;
366
367 if (pStInitParams->u8TurboInit & E_HVD_TURBOINIT_FW_RELOAD)
368 {
369 gHVDCtrl.bTurboFWMode = TRUE;
370 }
371
372 HAL_HVD_SetMiuBurstLevel(E_HVD_BURST_CNT_DISABLE);
373
374 return E_HVD_OK;
375 }
376
_DRV_HVD_Check_Cmd(HVD_Check_Cmd eCmd)377 static HVD_Result _DRV_HVD_Check_Cmd(HVD_Check_Cmd eCmd)
378 {
379 MS_U32 u32Tmp0 = 0;
380 MS_U32 u32Tmp1 = 0;
381
382 switch (eCmd)
383 {
384 case E_HVD_CHECK_CMD_INIT:
385 {
386 if (!(gHVDCtrl.InitParams.u8TurboInit & E_HVD_TURBOINIT_CHECK))
387 {
388 // Check mode
389 u32Tmp0 = gHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_HW_MASK;
390
391 if (!MDrv_HVD_GetCaps((HVD_Codec) u32Tmp0))
392 {
393 HVD_MSG_ERR("Check Cmd Err: Init: HW not support type:%d\n", eCmd);
394 return E_HVD_RET_UNSUPPORTED;
395 }
396
397 u32Tmp0 = gHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK;
398
399 if (u32Tmp0 == HVD_INIT_MAIN_LIVE_STREAM)
400 {
401 if ((gHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_INPUT_MASK) == HVD_INIT_INPUT_DRV)
402 {
403 HVD_MSG_ERR("Check Cmd Err: Init: Live stream mode can not use Drv input\n");
404 return E_HVD_RET_INVALID_PARAMETER;
405 }
406 if(!(gHVDCtrl.InitParams.u32ModeFlag & (HVD_INIT_UTOPIA_ENVI | HVD_INIT_DBG_FW)))
407 {
408 // need not to check this under debug mode
409 if ((gHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_START_CODE_MASK) == HVD_INIT_START_CODE_REMOVED)
410 {
411 HVD_MSG_ERR("Check Cmd Err: Init: Live stream mode must have start code\n");
412 return E_HVD_RET_INVALID_PARAMETER;
413 }
414 if (gHVDCtrl.InitParams.u8SyncType != E_HVD_SYNC_TBL_TYPE_NON)
415 {
416 HVD_MSG_ERR("Check Cmd Err: Init: Live stream mode can not use none ATS sync mode\n");
417 return E_HVD_RET_INVALID_PARAMETER;
418 }
419 }
420 }
421 else if ((u32Tmp0 == HVD_INIT_MAIN_FILE_RAW)
422 || (u32Tmp0 == HVD_INIT_MAIN_FILE_TS))
423 {
424 if (!(gHVDCtrl.InitParams.u32ModeFlag & (HVD_INIT_UTOPIA_ENVI | HVD_INIT_DBG_FW)))
425 {
426 if((gHVDCtrl.InitParams.u8SyncType != E_HVD_SYNC_TBL_TYPE_DTS)
427 && (gHVDCtrl.InitParams.u8SyncType != E_HVD_SYNC_TBL_TYPE_STS)
428 && (gHVDCtrl.InitParams.u8SyncType != E_HVD_SYNC_TBL_TYPE_PTS)
429 && (gHVDCtrl.InitParams.u8SyncType != E_HVD_SYNC_TBL_TYPE_NON))
430 {
431 HVD_MSG_ERR("Check Cmd Err: Init: sync mode is not set. use default value:%d\n",
432 (MS_U16)E_HVD_SYNC_TBL_TYPE_PTS);
433 gHVDCtrl.InitParams.u8SyncType = E_HVD_SYNC_TBL_TYPE_PTS;
434 }
435 }
436 }
437 #if 0 //Fix coverity of u32Tmp0 compare
438 else if ((u32Tmp0 != HVD_INIT_MAIN_FILE_RAW)
439 && (u32Tmp0 != HVD_INIT_MAIN_FILE_TS))
440 #else
441 else
442 #endif
443 {
444 HVD_MSG_ERR("Check Cmd Err: Init: main type can not be recognized:%ld\n", u32Tmp0);
445 return E_HVD_RET_INVALID_PARAMETER;
446 }
447
448 // check memory map
449 if (gHVDCtrl.MemMap.u32MIU1BaseAddr == 0)
450 {
451 HVD_MSG_ERR("Check Cmd Err: Init: MIU 1 Base addr should not be zero\n");
452 return E_HVD_RET_INVALID_PARAMETER;
453 }
454
455 if ((gHVDCtrl.MemMap.u32CodeBufAddr & 0x7FF) != 0)
456 {
457 HVD_MSG_ERR("Check Cmd Err: Init: Error HVD code address(0x%lx) must 2048 byte alignment\n",
458 gHVDCtrl.MemMap.u32CodeBufAddr);
459 return E_HVD_RET_INVALID_PARAMETER;
460 }
461 }
462
463 u32Tmp0 = gHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK;
464 u32Tmp1 = gHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_INPUT_MASK;
465
466 if (u32Tmp0 != HVD_INIT_MAIN_LIVE_STREAM)
467 {
468 if (u32Tmp1 == HVD_INIT_INPUT_DRV)
469 {
470 // check if driver process buffer is in bitstream buffer.
471 MS_U32 tmpAddr = gHVDCtrl.MemMap.u32DrvProcessBufAddr;
472 if (gHVDCtrl.MemMap.u32DrvProcessBufAddr == 0)
473 {
474 HVD_MSG_ERR("Check Cmd Err: Init: Drv process buffer address should not be zero\n");
475 gHVDCtrl.bNoDrvProccBuf = TRUE;
476 //return E_HVD_RET_INVALID_PARAMETER;
477 }
478 if ((gHVDCtrl.MemMap.u32BitstreamBufAddr > tmpAddr)
479 || (tmpAddr > (gHVDCtrl.MemMap.u32BitstreamBufAddr+gHVDCtrl.MemMap.u32BitstreamBufSize)))
480 {
481 HVD_MSG_ERR("Check Cmd Warn: Init: The driver process buffer shall be located in the bitstream buffer under file mode(TS or MP4) and Drv input.\n");
482 gHVDCtrl.bNoDrvProccBuf = TRUE;
483 //return E_HVD_RET_INVALID_PARAMETER;
484 }
485 if (gHVDCtrl.MemMap.u32DrvProcessBufSize
486 < (HVD_BBU_ST_ADDR_IN_BITSTREAMBUF + (HAL_HVD_GetData(E_HVD_GDATA_FW_BBU_TBL_ENTRY_NUMB)<<3) + 8))
487 {
488 HVD_MSG_ERR("Check Cmd Warn: Init: File mode(TS or MP4) and Drv input must set the process buffer size and must be larger than %lu Bytes:%ld\n",
489 gHVDCtrl.MemMap.u32DrvProcessBufSize,
490 (MS_U32)(HVD_BBU_ST_ADDR_IN_BITSTREAMBUF + (HAL_HVD_GetData(E_HVD_GDATA_FW_BBU_TBL_ENTRY_NUMB)<<3) + 8) );
491 gHVDCtrl.bNoDrvProccBuf = TRUE;
492 //return E_HVD_RET_OUTOF_MEMORY;
493 }
494 if (gHVDCtrl.MemMap.u32DrvProcessBufSize > 1)
495 {
496 tmpAddr = gHVDCtrl.MemMap.u32DrvProcessBufAddr + gHVDCtrl.MemMap.u32DrvProcessBufSize - 1;
497 }
498 else
499 {
500 tmpAddr = gHVDCtrl.MemMap.u32DrvProcessBufAddr;
501 }
502 if ((gHVDCtrl.MemMap.u32BitstreamBufAddr > tmpAddr)
503 || (tmpAddr > (gHVDCtrl.MemMap.u32BitstreamBufAddr + gHVDCtrl.MemMap.u32BitstreamBufSize)))
504 {
505 HVD_MSG_ERR("Check Cmd Warn: Init: The driver process buffer shall be located in the bitstream buffer under file mode(TS or PS) and Drv input.\n");
506 gHVDCtrl.bNoDrvProccBuf = TRUE;
507 //return E_HVD_RET_INVALID_PARAMETER;
508 }
509 }
510 else
511 {
512 ;// TODO: check if the TSP MIU sel is the same with the MIU lacation of process buffer.
513 }
514 }
515 break;
516 }
517 case E_HVD_CHECK_CMD_SEEK2PTS:
518 case E_HVD_CHECK_CMD_TRIGGER_DISP:
519 #if 0
520 if( MDrv_HVD_GetPlayMode( E_HVD_GMODE_IS_SYNC_ON ) )
521 {
522 HVD_MSG_ERR("Check Cmd Err: Cmd type:%d Sync Active: %lx\n", (MS_U16)eCmd , (MS_S32)MDrv_HVD_GetPlayMode( E_HVD_GMODE_IS_SYNC_ON ) );
523 return E_HVD_RET_ILLEGAL_ACCESS;
524 }
525 #endif
526 break;
527 default:
528 return E_HVD_OK;
529 }
530 return E_HVD_OK;
531 }
532
_DRV_HVD_InitShareMem(void)533 static HVD_Result _DRV_HVD_InitShareMem(void)
534 {
535 return (HVD_Result) HAL_HVD_InitShareMem();
536 }
537
_DRV_HVD_GetFrmPckSEIStPtr(void)538 static HVD_Frame_packing_SEI * _DRV_HVD_GetFrmPckSEIStPtr(void)
539 {
540 MS_U32 u32FPAFrameAddr = 0;
541 u32FPAFrameAddr = HAL_HVD_GetData(E_HVD_GDATA_FRM_PACKING_SEI_DATA);
542 u32FPAFrameAddr += gHVDCtrl.MemMap.u32CodeBufVAddr; // change to virtual address
543 return (HVD_Frame_packing_SEI*)u32FPAFrameAddr;
544 }
545
_DRV_HVD_InitRegCPU(void)546 static HVD_Result _DRV_HVD_InitRegCPU(void)
547 {
548 // check MIU select
549 if (!(gHVDCtrl.InitParams.u8TurboInit & E_HVD_TURBOINIT_CHECK))
550 {
551 HAL_HVD_CheckMIUSel(gHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_UTOPIA_ENVI);
552 }
553
554 return (HVD_Result) HAL_HVD_InitRegCPU();
555 }
556
_DRV_HVD_RstVariables(void)557 HVD_Result _DRV_HVD_RstVariables(void)
558 {
559 MS_BOOL bBitMIU1 = FALSE;
560 MS_BOOL bCodeMIU1 = FALSE;
561 // Init control flg
562 gHVDCtrl.u32CtrlMode=0;
563 if( gHVDCtrl.MemMap.u32CodeBufAddr >= gHVDCtrl.MemMap.u32MIU1BaseAddr )
564 {
565 //gHVDCtrl.MemMap.u32CodeBufAddr-=gHVDCtrl.MemMap.u32MIU1BaseAddr;
566 //gHVDCtrl.MemMap.u32FrameBufAddr-=gHVDCtrl.MemMap.u32MIU1BaseAddr;
567 gHVDCtrl.u32CtrlMode |= HVD_CTRL_CODE_MIU_1;
568 bCodeMIU1=TRUE;
569 }
570 if( gHVDCtrl.MemMap.u32BitstreamBufAddr >= gHVDCtrl.MemMap.u32MIU1BaseAddr )
571 {
572 //gHVDCtrl.MemMap.u32BitstreamBufAddr-=gHVDCtrl.MemMap.u32MIU1BaseAddr;
573 gHVDCtrl.u32CtrlMode |= HVD_CTRL_ES_MIU_1;
574 bBitMIU1=TRUE;
575 }
576 if( gHVDCtrl.MemMap.u32FrameBufAddr>= gHVDCtrl.MemMap.u32MIU1BaseAddr )
577 {
578 //gHVDCtrl.MemMap.u32BitstreamBufAddr-=gHVDCtrl.MemMap.u32MIU1BaseAddr;
579 gHVDCtrl.u32CtrlMode |= HVD_CTRL_FRM_MIU_1;
580 }
581 if( gHVDCtrl.MemMap.u32DrvProcessBufAddr>= gHVDCtrl.MemMap.u32MIU1BaseAddr )
582 {
583 //gHVDCtrl.MemMap.u32BitstreamBufAddr-=gHVDCtrl.MemMap.u32MIU1BaseAddr;
584 gHVDCtrl.u32CtrlMode |= HVD_CTRL_DRVPROCC_MIU_1;
585 }
586
587 if(!gHVDCtrl.bNoDrvProccBuf)
588 {
589 // init nal table buffer start address.
590 if( ( gHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK) == HVD_INIT_MAIN_FILE_RAW )
591 {
592 if( bBitMIU1 != bCodeMIU1 )
593 {
594 if( gHVDCtrl.MemMap.u32DrvProcessBufSize>
595 ( HVD_BBU_ST_ADDR_IN_BITSTREAMBUF + (HAL_HVD_GetData(E_HVD_GDATA_FW_BBU_TBL_ENTRY_NUMB) <<3) + 8))
596 {
597 gHVDCtrl.u32BBUTblInBitstreamBufAddr = HVD_BBU_ST_ADDR_IN_BITSTREAMBUF;
598 if( (( gHVDCtrl.u32BBUTblInBitstreamBufAddr + gHVDCtrl.MemMap.u32DrvProcessBufAddr) % 8) != 0)
599 {
600 gHVDCtrl.u32BBUTblInBitstreamBufAddr = gHVDCtrl.u32BBUTblInBitstreamBufAddr + gHVDCtrl.MemMap.u32DrvProcessBufAddr + 7;
601 gHVDCtrl.u32BBUTblInBitstreamBufAddr -= (gHVDCtrl.u32BBUTblInBitstreamBufAddr ) % 8;
602 gHVDCtrl.u32BBUTblInBitstreamBufAddr -= gHVDCtrl.MemMap.u32DrvProcessBufAddr;
603 HVD_MSG_ERR( "HVD Err: Nal table in bitstream buffer start address is not aligned. old:%lx new:%lx" , (MS_U32)HVD_BBU_ST_ADDR_IN_BITSTREAMBUF , gHVDCtrl.u32BBUTblInBitstreamBufAddr );
604 }
605 }
606 else
607 {
608 HVD_MSG_ERR( "HVD Err: Driver process buffer size is not enough for driver input path. input:%lx required:%lx" , (MS_U32)gHVDCtrl.MemMap.u32DrvProcessBufSize , ( HVD_BBU_ST_ADDR_IN_BITSTREAMBUF + (HAL_HVD_GetData(E_HVD_GDATA_FW_BBU_TBL_ENTRY_NUMB) <<3) + 8) );
609 return E_HVD_RET_OUTOF_MEMORY;
610 }
611 }
612 }
613
614 // init AVI NULL packet pattern && RM flush pattern
615 if( ( gHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK) == HVD_INIT_MAIN_FILE_RAW )
616 {
617 MS_U8 *pNULLPattern=NULL;
618 gHVDCtrl.u32NULLPacketAddr = gHVDCtrl.MemMap.u32DrvProcessBufAddr;
619
620 // TODO: use other non-cachable VA addr
621 pNULLPattern=(MS_U8 *)(((MS_U32)gHVDCtrl.MemMap.u32CodeBufVAddr) );
622 HVD_memset( (void*)pNULLPattern, 0 , 12 );
623 switch( (gHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_HW_MASK) )
624 {
625 case HVD_INIT_HW_AVC:
626 case HVD_INIT_HW_AVS:
627 if( gHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_START_CODE_MASK )
628 { // start code removed
629 gHVDCtrl.u32NULLPacketSize = 8;
630 if( gHVDCtrl.MemMap.u32DrvProcessBufSize < gHVDCtrl.u32NULLPacketSize )
631 {
632 return E_HVD_RET_OUTOF_MEMORY;
633 }
634 HVD_memset( (void*)pNULLPattern, 0xAA , gHVDCtrl.u32NULLPacketSize);
635 pNULLPattern[4] = 0X55;
636 }
637 else // start code remained
638 {
639 gHVDCtrl.u32NULLPacketSize = 12;
640 if( gHVDCtrl.MemMap.u32DrvProcessBufSize < gHVDCtrl.u32NULLPacketSize )
641 {
642 return E_HVD_RET_OUTOF_MEMORY;
643 }
644 HVD_memset( (void*)pNULLPattern, 0xAA , gHVDCtrl.u32NULLPacketSize);
645 pNULLPattern[0] = 0;
646 pNULLPattern[1] = 0;
647 pNULLPattern[2] = 1;
648 pNULLPattern[3] = 0xFF;
649 pNULLPattern[8] = 0X55;
650 //pNULLPattern[gHVDCtrl.u32NULLPacketSize-1] = 0x80;
651 }
652
653 if( bBitMIU1 != bCodeMIU1 )
654 {
655 #if HVD_ENABLE_BDMA_2_BITSTREAMBUF
656 HAL_HVD_FlushMemory();
657 HVD_dmacpy( gHVDCtrl.MemMap.u32DrvProcessBufAddr , gHVDCtrl.MemMap.u32CodeBufAddr , gHVDCtrl.u32NULLPacketSize);
658 #else
659 HVD_memcpy((void*)(gHVDCtrl.MemMap.u32DrvProcessBufVAddr), pNULLPattern, gHVDCtrl.u32NULLPacketSize);
660 HAL_HVD_FlushMemory();
661 #endif
662 }
663 else
664 {
665 HVD_memcpy((void*)(gHVDCtrl.MemMap.u32DrvProcessBufVAddr), pNULLPattern, gHVDCtrl.u32NULLPacketSize);
666 HAL_HVD_FlushMemory();
667 }
668
669 break;
670 case HVD_INIT_HW_RM:
671 // RM has no NULL packet
672 gHVDCtrl.u32NULLPacketSize = 0;
673 gHVDCtrl.u32NULLPacketAddr =0;
674 #if HVD_ENABLE_RV_FEATURE
675 gHVDCtrl.u32RV_FlushPacketAddr = gHVDCtrl.MemMap.u32DrvProcessBufAddr;
676 gHVDCtrl.u32RV_FlushPacketSize = 8;
677 if( gHVDCtrl.MemMap.u32DrvProcessBufSize < gHVDCtrl.u32RV_FlushPacketSize )
678 {
679 return E_HVD_RET_OUTOF_MEMORY;
680 }
681 HVD_memset( (void*)pNULLPattern, 0xFF , gHVDCtrl.u32RV_FlushPacketSize);
682 {
683 #if HVD_ENABLE_BDMA_2_BITSTREAMBUF
684 HAL_HVD_FlushMemory();
685 HVD_dmacpy( gHVDCtrl.MemMap.u32DrvProcessBufAddr , gHVDCtrl.MemMap.u32CodeBufAddr , gHVDCtrl.u32RV_FlushPacketSize);
686 #else
687 HVD_memcpy((void*)(gHVDCtrl.MemMap.u32DrvProcessBufVAddr), pNULLPattern, gHVDCtrl.u32RV_FlushPacketSize);
688 HAL_HVD_FlushMemory();
689 #endif
690 }
691 #endif
692 break;
693
694
695 default:
696 gHVDCtrl.u32NULLPacketSize = 0;
697 gHVDCtrl.u32NULLPacketAddr =0;
698 break;
699 }
700 }
701 else
702 {
703 gHVDCtrl.u32NULLPacketSize = 0;
704 gHVDCtrl.u32NULLPacketAddr =0;
705 }
706 }
707
708 // reset other driver control variables
709 gHVDCtrl.u32StepDecodeCnt=0;
710 gHVDCtrl.u32LastESRptr=0;
711 gHVDCtrl.u32BBUPacketCnt=0;
712 gHVDCtrl.u32BBUWptr_Fired=0;
713 gHVDCtrl.u32LastErrCode=0;
714 gHVDCtrl.bIsDispInfoChg=0;
715 HVD_memset( (void*)&(gHVDCtrl.LastNal) , 0 , sizeof(HVD_Nal_Entry) );
716 HVD_memset( (void*)&(gHVDCtrl.LivingStatus) , 0 , sizeof(HVD_Alive_Status) );
717
718 // Init HAL variables
719 return (HVD_Result) HAL_HVD_InitVariables((MS_U32)(&gHVDCtrl));
720 }
721
722 //-----------------------------------------------------------------------------
723 /// @brief \b Function \b Name: _DRV_HVD_SetSyncMode()
724 /// @brief \b Function \b Description: specify the way to sync video time stamp and STC.
725 /// @param -eMode \b IN : sync type
726 /// @param -u32Arg \b IN : only work under ( eMode == E_HVD_SYNC_ATS) , video delay toward Audio time stamp. It's minimun value is 0, and maximun value is 4500 ( unit:ms)
727 /// @return -The result of command set sync type
728 //-----------------------------------------------------------------------------
_DRV_HVD_SetSyncMode(HVD_Sync_Tbl_Type eMode)729 static HVD_Result _DRV_HVD_SetSyncMode(HVD_Sync_Tbl_Type eMode)
730 {
731 HVD_Result eRet = E_HVD_OK;
732
733 _DRV_HVD_Entry();
734
735 eRet = (HVD_Result) HAL_HVD_SetCmd(E_HVD_CMD_SYNC_TYPE, eMode);
736
737 _DRV_HVD_Return(eRet);
738 }
739
_DRV_HVD_InitFW_AVC(void)740 static HVD_Result _DRV_HVD_InitFW_AVC(void)
741 {
742 MS_U32 u32InitMode = gHVDCtrl.InitParams.u32ModeFlag;
743
744 // common settings
745 if (!(gHVDCtrl.InitParams.u8TurboInit & E_HVD_TURBOINIT_DISPLAY))
746 {
747 _DRV_HVD_SetSyncMode((HVD_Sync_Tbl_Type) gHVDCtrl.InitParams.u8SyncType);
748
749 if (gHVDCtrl.InitParams.u8MinFrmGap)
750 {
751 HAL_HVD_SetCmd(E_HVD_CMD_MIN_FRAME_GAP,
752 gHVDCtrl.InitParams.u8MinFrmGap);
753 }
754
755 if (gHVDCtrl.InitParams.u32MaxDecTick)
756 {
757 HAL_HVD_SetCmd(E_HVD_CMD_MAX_DEC_TICK,
758 gHVDCtrl.InitParams.u32MaxDecTick);
759 }
760
761 if (gHVDCtrl.InitParams.u16Pitch)
762 {
763 HAL_HVD_SetCmd(E_HVD_CMD_PITCH, gHVDCtrl.InitParams.u16Pitch);
764 }
765
766 if (gHVDCtrl.InitParams.bSyncEachFrm)
767 {
768 HAL_HVD_SetCmd(E_HVD_CMD_SYNC_EACH_FRM, TRUE);
769 }
770
771 if (gHVDCtrl.InitParams.bFastDisplay)
772 {
773 HAL_HVD_SetCmd(E_HVD_CMD_FAST_DISP, TRUE);
774 }
775
776 if (gHVDCtrl.InitParams.bDynamicScaling)
777 {
778 HAL_HVD_SetCmd(E_HVD_CMD_DYNAMIC_SCALE, TRUE);
779 }
780
781 if (gHVDCtrl.InitParams.bUserData)
782 {
783 HAL_HVD_SetCmd(E_HVD_CMD_DPO_CC, TRUE);
784 }
785 }
786
787 if (gHVDCtrl.InitParams.u8TimeUnit)
788 {
789 HAL_HVD_SetCmd(E_HVD_CMD_TIME_UNIT_TYPE,
790 gHVDCtrl.InitParams.u8TimeUnit);
791 }
792
793 // specific settings
794 switch (u32InitMode & HVD_INIT_MAIN_MASK)
795 {
796 case HVD_INIT_MAIN_FILE_RAW:
797 {
798 HAL_HVD_SetCmd(E_HVD_CMD_DIS_VDEAD, TRUE);
799 HAL_HVD_SetCmd(E_HVD_CMD_IGNORE_ERR_REF, TRUE);
800 HAL_HVD_SetCmd(E_HVD_CMD_FORCE_RESET_HW, TRUE);
801
802 if (!(gHVDCtrl.InitParams.u8TurboInit & E_HVD_TURBOINIT_DISPLAY))
803 {
804 HAL_HVD_SetCmd(E_HVD_CMD_REPEAT_LAST_FIELD, TRUE);
805 }
806
807 HAL_HVD_SetCmd(E_HVD_CMD_PARSER_BYPASS, TRUE);
808
809 //HAL_HVD_SetCmd( E_HVD_CMD_PITCH , 1952 );
810 // svd only
811 HAL_HVD_SetCmd(E_HVD_CMD_ES_FULL_STOP, TRUE);
812 HAL_HVD_SetCmd(E_HVD_CMD_BBU_RESIZE, 95);
813 //HAL_HVD_SetCmd( E_HVD_CMD_PLAY , 0);
814 break;
815 }
816 case HVD_INIT_MAIN_FILE_TS:
817 {
818 HAL_HVD_SetCmd(E_HVD_CMD_DIS_VDEAD, TRUE);
819 HAL_HVD_SetCmd(E_HVD_CMD_IGNORE_ERR_REF, TRUE);
820 HAL_HVD_SetCmd(E_HVD_CMD_FORCE_RESET_HW, TRUE);
821
822 if (!(gHVDCtrl.InitParams.u8TurboInit & E_HVD_TURBOINIT_DISPLAY))
823 {
824 HAL_HVD_SetCmd(E_HVD_CMD_REPEAT_LAST_FIELD, TRUE);
825 }
826 //HAL_HVD_SetCmd( E_HVD_CMD_PITCH , 1952 );
827 //HAL_HVD_SetCmd( E_HVD_CMD_SYNC_EACH_FRM , TRUE );
828 // svd ONLY
829 HAL_HVD_SetCmd(E_HVD_CMD_ES_FULL_STOP, TRUE);
830 HAL_HVD_SetCmd(E_HVD_CMD_AVOID_PTS_TBL_OVERFLOW, TRUE);
831
832 //HAL_HVD_SetCmd( E_HVD_CMD_PLAY , 0);
833 break;
834 }
835 case HVD_INIT_MAIN_LIVE_STREAM:
836 {
837 HAL_HVD_SetCmd(E_HVD_CMD_IGNORE_ERR_REF, TRUE);
838 HAL_HVD_SetCmd(E_HVD_CMD_FORCE_RESET_HW, TRUE);
839
840 if (gHVDCtrl.InitParams.u8TimeUnit)
841 {
842 HAL_HVD_SetCmd(E_HVD_CMD_SYNC_VIDEO_DELAY,
843 (MS_U32) HVD_DTV_VIDEO_DELAY);
844 }
845 else
846 {
847 HAL_HVD_SetCmd(E_HVD_CMD_SYNC_VIDEO_DELAY,
848 (MS_U32) HVD_DTV_VIDEO_DELAY * 90);
849 }
850 //HAL_HVD_SetCmd( E_HVD_CMD_PITCH , 1984 );
851 //HAL_HVD_SetCmd( E_HVD_CMD_MAX_DEC_TICK , 6400000); //for GP only
852 break;
853 }
854 default:
855 break;
856 }
857
858 // svd only
859 //HAL_HVD_SetCmd( E_HVD_CMD_FRAME_BUF_RESIZE , (gHVDCtrl.MemMap.u32BitstreamBufSize+gHVDCtrl.MemMap.u32CodeBufSize+gHVDCtrl.MemMap.u32FrameBufSize) >>20);
860 return E_HVD_OK;
861 }
862
_DRV_HVD_InitFW_RM(void)863 HVD_Result _DRV_HVD_InitFW_RM(void)
864 {
865 MS_U32 u32InitMode = gHVDCtrl.InitParams.u32ModeFlag;
866
867 // common settings
868 if( !(gHVDCtrl.InitParams.u8TurboInit & E_HVD_TURBOINIT_DISPLAY) )
869 {
870 _DRV_HVD_SetSyncMode( (HVD_Sync_Tbl_Type)gHVDCtrl.InitParams.u8SyncType);
871 if( gHVDCtrl.InitParams.u16Pitch)
872 {
873 HAL_HVD_SetCmd( E_HVD_CMD_PITCH , gHVDCtrl.InitParams.u16Pitch);
874 }
875 if( gHVDCtrl.InitParams.bSyncEachFrm)
876 {
877 HAL_HVD_SetCmd( E_HVD_CMD_SYNC_EACH_FRM , TRUE);
878 }
879 if( gHVDCtrl.InitParams.bFastDisplay)
880 {
881 HAL_HVD_SetCmd( E_HVD_CMD_FAST_DISP , TRUE);
882 }
883 if( gHVDCtrl.InitParams.bDynamicScaling)
884 {
885 HAL_HVD_SetCmd( E_HVD_CMD_DYNAMIC_SCALE , TRUE);
886 }
887 }
888 if( gHVDCtrl.InitParams.u8TimeUnit)
889 {
890 HAL_HVD_SetCmd( E_HVD_CMD_TIME_UNIT_TYPE , gHVDCtrl.InitParams.u8TimeUnit);
891 }
892 // specific settings
893 switch( u32InitMode & HVD_INIT_MAIN_MASK )
894 {
895 case HVD_INIT_MAIN_FILE_RAW:
896 break;
897 case HVD_INIT_MAIN_FILE_TS:
898 case HVD_INIT_MAIN_LIVE_STREAM:
899 default:
900 break;
901 }
902
903 // svd only
904 //HAL_HVD_SetCmd( E_HVD_CMD_FRAME_BUF_RESIZE , (gHVDCtrl.MemMap.u32BitstreamBufSize+gHVDCtrl.MemMap.u32CodeBufSize+gHVDCtrl.MemMap.u32FrameBufSize) >>20);
905
906 // fix FFx4 display error
907 HAL_HVD_SetCmd( E_HVD_CMD_FORCE_RESET_HW , TRUE );
908
909 return E_HVD_OK;
910 }
911
_DRV_HVD_Check_FW_Version(void)912 static HVD_Result _DRV_HVD_Check_FW_Version(void)
913 {
914 // check FW version ID
915 if (!(gHVDCtrl.InitParams.u8TurboInit & E_HVD_TURBOINIT_CHECK))
916 {
917 #if (HVD_HW_VERSION == HVD_HW_SVD)
918 if (HVD_FW_VERSION != HAL_HVD_GetData(E_HVD_GDATA_FW_VERSION_ID))
919 {
920 HVD_MSG_ERR("HVD: fw interface and binary is not the same. fw ID: interface:%lx binary:%lx\n",
921 (MS_U32)HVD_FW_VERSION,
922 HAL_HVD_GetData(E_HVD_GDATA_FW_VERSION_ID));
923 return E_HVD_FAIL;
924 }
925 // check if release required
926 if (!(gHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_DBG_FW))
927 {
928 // check debug version
929 if ((HAL_HVD_GetData(E_HVD_GDATA_FW_VERSION_ID) & HVD_FW_VER_RELEASE_VERSION_MASK) < HVD_FW_VER_RELEASE_VERSION)
930 {
931 HVD_MSG_MUST("HVD: FW is not release verion: binary:%lx\n",
932 HAL_HVD_GetData(E_HVD_GDATA_FW_VERSION_ID));
933 //return E_HVD_FAIL;
934 }
935 }
936 #else
937
938 if( (HVD_FW_IF_VERSION>>16) != (HAL_HVD_GetData(E_HVD_GDATA_FW_IF_VERSION_ID)>>16) )
939 {
940 HVD_MSG_ERR("HVD: fw interface and binary is not the same. fw ID: interface:%lx binary:%lx\n",
941 (MS_U32)HVD_FW_IF_VERSION,
942 HAL_HVD_GetData(E_HVD_GDATA_FW_IF_VERSION_ID));
943 return E_HVD_FAIL;
944 }
945
946 // check if release required
947 if (!(gHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_DBG_FW))
948 {
949 // check debug version
950 if (!(HAL_HVD_GetData(E_HVD_GDATA_FW_VERSION_ID) & HVD_FW_VER_RELEASE_VERSION))
951 {
952 HVD_MSG_MUST("HVD: FW is not release verion: binary:%lx\n",
953 HAL_HVD_GetData(E_HVD_GDATA_FW_VERSION_ID));
954 //return E_HVD_FAIL;
955 }
956
957 if (HAL_HVD_GetData(E_HVD_GDATA_FW_VERSION_ID) & HVD_FW_VER_DUMP_DEBUG_MSG)
958 {
959 HVD_MSG_MUST("HVD: FW release verion, but it has debug message. binary:%lx\n",
960 HAL_HVD_GetData(E_HVD_GDATA_FW_VERSION_ID));
961 //return E_HVD_FAIL;
962 }
963 }
964 #endif
965 }
966 return E_HVD_OK;
967 }
968
_DRV_HVD_InitFW(void)969 static HVD_Result _DRV_HVD_InitFW(void)
970 {
971 HVD_Result eRet = E_HVD_OK;
972
973 eRet = _DRV_HVD_Check_FW_Version();
974
975 if (eRet != E_HVD_OK)
976 {
977 return eRet;
978 }
979
980 switch (gHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_HW_MASK)
981 {
982 case HVD_INIT_HW_AVC:
983 eRet = _DRV_HVD_InitFW_AVC();
984 break;
985 case HVD_INIT_HW_AVS:
986 eRet = _DRV_HVD_InitFW_AVC();
987 break;
988 case HVD_INIT_HW_RM:
989 eRet = _DRV_HVD_InitFW_RM();
990 break;
991 default:
992 break;
993 }
994
995 return eRet;
996 }
997
_DRV_HVD_IsAllBufferEmpty(void)998 static MS_BOOL _DRV_HVD_IsAllBufferEmpty(void)
999 {
1000 MS_U32 u32PlaybackType = gHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK;
1001
1002 if (u32PlaybackType == HVD_INIT_MAIN_FILE_RAW)
1003 {
1004 if (HAL_HVD_GetData(E_HVD_GDATA_BBU_Q_NUMB) != 0)
1005 {
1006 return FALSE;
1007 }
1008 }
1009 else //if( u32PlaybackType == HVD_INIT_MAIN_FILE_TS ) TSP input
1010 {
1011 #if 0
1012 if( HAL_HVD_GetData( E_HVD_GDATA_ES_READ_PTR) != HAL_HVD_GetData( E_HVD_GDATA_ES_WRITE_PTR) )
1013 {
1014 return FALSE;
1015 }
1016 #endif
1017 }
1018
1019 // other Queues
1020 if (((HAL_HVD_GetData(E_HVD_GDATA_DEC_Q_NUMB) == 0) && (HAL_HVD_GetData(E_HVD_GDATA_DISP_Q_NUMB) == 0)) &&
1021 (HAL_HVD_GetData(E_HVD_GDATA_VPU_IDLE_CNT) > HVD_FW_IDLE_THRESHOLD))
1022 {
1023 return TRUE;
1024 }
1025 else
1026 {
1027 return FALSE;
1028 }
1029 }
1030
1031 #if defined(REDLION_LINUX_KERNEL_ENVI)
_DRV_HVD_ISRHandler(void)1032 static MS_S32 _DRV_HVD_ISRHandler(void)
1033 {
1034 if (gHVDISRCtrl.pfnISRCallBack != NULL)
1035 {
1036 gHVDISRCtrl.bInISR = TRUE;
1037 gHVDISRCtrl.u32ISRInfo = HAL_HVD_GetData(E_HVD_GDATA_HVD_ISR_STATUS);
1038
1039 if (gHVDISRCtrl.u32ISRInfo)
1040 {
1041 HAL_HVD_EnableISR(FALSE);
1042 gHVDISRCtrl.pfnISRCallBack();
1043 HAL_HVD_EnableISR(TRUE);
1044 }
1045 }
1046 else
1047 {
1048 HVD_MSG_ERR( "DRV HVD Err: ISR callback is NULL.\n" );
1049 }
1050
1051 gHVDISRCtrl.bInISR = FALSE;
1052 HAL_HVD_SetClearISR();
1053 OSAL_HVD_ISR_Enable();
1054 OSAL_HVD_ISR_Complete();
1055
1056 return 1;
1057 }
1058 #else
_DRV_HVD_ISRHandler(void)1059 static void _DRV_HVD_ISRHandler(void)
1060 {
1061 if (gHVDISRCtrl.pfnISRCallBack != NULL)
1062 {
1063 gHVDISRCtrl.bInISR = TRUE;
1064 gHVDISRCtrl.u32ISRInfo = HAL_HVD_GetData(E_HVD_GDATA_HVD_ISR_STATUS);
1065
1066 if (gHVDISRCtrl.u32ISRInfo)
1067 {
1068 HAL_HVD_EnableISR(FALSE);
1069 gHVDISRCtrl.pfnISRCallBack();
1070 HAL_HVD_EnableISR(TRUE);
1071 }
1072 }
1073 else
1074 {
1075 HVD_MSG_ERR( "DRV HVD Err: ISR callback is NULL.\n" );
1076 }
1077
1078 gHVDISRCtrl.bInISR = FALSE;
1079 HAL_HVD_SetClearISR();
1080 OSAL_HVD_ISR_Enable();
1081 OSAL_HVD_ISR_Complete();
1082 }
1083 #endif
1084
_DRV_HVD_RecoverySettings(void)1085 HVD_Result _DRV_HVD_RecoverySettings(void)
1086 {
1087 // TODO: complete this function. and consider more cases. step decoder, display?
1088 HVD_Result eRst=E_HVD_OK;
1089
1090 switch( gHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK )
1091 {
1092 case HVD_INIT_MAIN_LIVE_STREAM:
1093 // temp solution
1094 // must before play().
1095 if( (gHVDCtrl.Settings.DispInfoTH.u32FrmrateLowBound != 0 )||
1096 (gHVDCtrl.Settings.DispInfoTH.u32FrmrateUpBound != 0) ||
1097 (gHVDCtrl.Settings.DispInfoTH.u32MvopLowBound != 0) ||
1098 (gHVDCtrl.Settings.DispInfoTH.u32MvopUpBound != 0) )
1099 {
1100 HAL_HVD_SetData( E_HVD_SDATA_DISP_INFO_TH , (MS_U32)(&gHVDCtrl.Settings.DispInfoTH) );
1101 HAL_HVD_SetCmd(E_HVD_CMD_UPDATE_DISP_THRESHOLD, 0);
1102 }
1103 if( gHVDCtrl.Settings.u32IsrEvent )
1104 {
1105 HAL_HVD_SetCmd(E_HVD_CMD_ISR_TYPE, gHVDCtrl.Settings.u32IsrEvent);
1106 }
1107 HAL_HVD_EnableISR(gHVDCtrl.Settings.bEnISR);
1108 // play()
1109 HAL_HVD_SetCmd(E_HVD_CMD_PLAY, 0);
1110 if( gHVDCtrl.Settings.u8SkipMode )
1111 {
1112 eRst = MDrv_HVD_SetSkipDecMode((HVD_Skip_Decode)(gHVDCtrl.Settings.u8SkipMode));
1113 if(E_HVD_OK != eRst)
1114 {
1115 HVD_MSG_ERR( "_DRV_HVD_RecoverySettings : Set Skip Mode fail!!.\n" );
1116 return eRst;
1117 }
1118 }
1119 if( gHVDCtrl.Settings.bIsShowErrFrm )
1120 {
1121 HAL_HVD_SetCmd(E_HVD_CMD_DISP_ERR_FRM, TRUE);
1122 }
1123 if( gHVDCtrl.Settings.u8FrcMode )
1124 {
1125 eRst = MDrv_HVD_SetFrcMode((HVD_FrmRateConv_Mode)(gHVDCtrl.Settings.u8FrcMode));
1126 if(E_HVD_OK != eRst)
1127 {
1128 HVD_MSG_ERR( "_DRV_HVD_RecoverySettings : Set Frc Mode fail!!.\n" );
1129 return eRst;
1130 }
1131 }
1132 if( gHVDCtrl.Settings.bIsErrConceal )
1133 {
1134 HAL_HVD_SetCmd(E_HVD_CMD_ERR_CONCEAL, TRUE);
1135 }
1136 if( gHVDCtrl.Settings.bAutoFreeES )
1137 {
1138 HAL_HVD_SetCmd(E_HVD_CMD_AUTO_FREE_ES, TRUE);
1139 }
1140 if( gHVDCtrl.Settings.bDisDeblocking )
1141 {
1142 HAL_HVD_SetCmd(E_HVD_CMD_DIS_DBF, TRUE);
1143 }
1144 if( gHVDCtrl.Settings.bDisQuarterPixel )
1145 {
1146 HAL_HVD_SetCmd(E_HVD_CMD_DIS_QUART_PIXEL, TRUE);
1147 }
1148
1149 if( gHVDCtrl.Settings.bIsSyncOn )
1150 {
1151 HAL_HVD_SetCmd(E_HVD_CMD_SYNC_ACTIVE, TRUE);
1152 }
1153 if( gHVDCtrl.Settings.u32SyncTolerance )
1154 {
1155 HAL_HVD_SetCmd(E_HVD_CMD_SYNC_TOLERANCE, gHVDCtrl.Settings.u32SyncTolerance);
1156 }
1157 if( gHVDCtrl.Settings.u32SyncRepeatTH )
1158 {
1159 HAL_HVD_SetCmd(E_HVD_CMD_SYNC_THRESHOLD, gHVDCtrl.Settings.u32SyncRepeatTH);
1160 }
1161 if( gHVDCtrl.Settings.u32SyncVideoDelay )
1162 {
1163 HAL_HVD_SetCmd(E_HVD_CMD_SYNC_VIDEO_DELAY, gHVDCtrl.Settings.u32SyncVideoDelay);
1164 }
1165 if( gHVDCtrl.Settings.u32SyncFreeRunTH )
1166 {
1167 HAL_HVD_SetCmd(E_HVD_CMD_FREERUN_THRESHOLD, gHVDCtrl.Settings.u32SyncFreeRunTH);
1168 }
1169
1170 if (E_HVD_BURST_CNT_DISABLE != (HVD_MIU_Burst_Cnt_Ctrl) gHVDCtrl.Settings.u32MiuBurstLevel)
1171 {
1172 HAL_HVD_SetCmd(E_HVD_CMD_MIU_BURST_CNT, gHVDCtrl.Settings.u32MiuBurstLevel);
1173 }
1174
1175 //HAL_HVD_SetCmd(E_HVD_CMD_BLUE_SCREEN, FALSE);
1176 gHVDCtrl.bStepDecoding = 0;
1177
1178 break;
1179
1180 case HVD_INIT_MAIN_FILE_RAW:
1181 default:
1182 gHVDCtrl.bStepDecoding=0;
1183 HAL_HVD_SetCmd(E_HVD_CMD_PLAY, 0);
1184 break;
1185 }
1186 return eRst;
1187 }
1188
_DRV_HVD_Rst(MS_BOOL bErrHandle)1189 static HVD_Result _DRV_HVD_Rst(MS_BOOL bErrHandle)
1190 {
1191 HVD_Result eRst = E_HVD_RET_ILLEGAL_ACCESS;
1192
1193 if (bErrHandle == TRUE)
1194 {
1195 HVD_MSG_ERR("HVD Not supported reset(TRUE) yet\n");
1196 return E_HVD_RET_INVALID_PARAMETER;
1197 }
1198
1199 bHVDIsIniting = TRUE;
1200
1201 #if (defined(CHIP_EDEN))
1202 if ((gHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_HW_MASK) == HVD_INIT_HW_RM)
1203 {
1204 HAL_HVD_RM_PATCH((MS_U32)(&gHVDCtrl));
1205 }
1206 #endif
1207
1208 HAL_HVD_EnableISR(FALSE);
1209
1210 #if HVD_ENABLE_TIME_MEASURE
1211 HVD_MSG_MUST("HVD Time Measure:%d (%s %d) \n",
1212 HVD_GetSysTime_ms() - u32InitSysTimeBase,
1213 __FUNCTION__,
1214 __LINE__);
1215 #endif
1216
1217 eRst = _DRV_HVD_RstVariables();
1218
1219 if (eRst != E_HVD_OK)
1220 {
1221 goto DRV_HVD_Rst_Failed;
1222 }
1223
1224 #if HVD_ENABLE_TIME_MEASURE
1225 HVD_MSG_MUST("HVD Time Measure:%d (%s %d) \n",
1226 HVD_GetSysTime_ms() - u32InitSysTimeBase,
1227 __FUNCTION__,
1228 __LINE__);
1229 #endif
1230
1231 eRst = _DRV_HVD_InitShareMem();
1232
1233 if (eRst != E_HVD_OK)
1234 {
1235 goto DRV_HVD_Rst_Failed;
1236 }
1237
1238 #if HVD_ENABLE_TIME_MEASURE
1239 HVD_MSG_MUST("HVD Time Measure:%d (%s %d) \n",
1240 HVD_GetSysTime_ms() - u32InitSysTimeBase,
1241 __FUNCTION__,
1242 __LINE__);
1243 #endif
1244
1245 eRst = _DRV_HVD_InitRegCPU();
1246
1247 if (eRst != E_HVD_OK)
1248 {
1249 goto DRV_HVD_Rst_Failed;
1250 }
1251
1252 #if HVD_ENABLE_TIME_MEASURE
1253 HVD_MSG_MUST("HVD Time Measure:%d (%s %d) \n",
1254 HVD_GetSysTime_ms() - u32InitSysTimeBase,
1255 __FUNCTION__,
1256 __LINE__);
1257 #endif
1258
1259 eRst = _DRV_HVD_InitFW();
1260
1261 if (eRst != E_HVD_OK)
1262 {
1263 goto DRV_HVD_Rst_Failed;
1264 }
1265
1266 eRst = E_HVD_OK;
1267
1268 HAL_HVD_EnableISR(gHVDCtrl.Settings.bEnISR);
1269
1270 bHVDIsIniting = FALSE;
1271 return eRst;
1272
1273 DRV_HVD_Rst_Failed :
1274 HAL_HVD_EnableISR(gHVDCtrl.Settings.bEnISR);
1275 bHVDIsIniting = FALSE;
1276
1277 return eRst;
1278 }
1279
_DRV_HVD_GetDispInfo(HVD_Disp_Info * pinfo,MS_BOOL bClearSeqChg)1280 static HVD_Result _DRV_HVD_GetDispInfo( HVD_Disp_Info *pinfo, MS_BOOL bClearSeqChg )
1281 {
1282 MS_U32 u32Seqtimes=10;
1283 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
1284 HVD_MSG_TRACE();
1285 _DRV_HVD_Inited(eRet);
1286
1287 if( !(gHVDCtrl.u32CtrlMode & HVD_CTRL_DISP_INFO_RDY))
1288 {
1289 if( MDrv_HVD_CheckDispInfoRdy() == E_HVD_RET_NOTREADY )
1290 {
1291 return E_HVD_RET_NOTREADY;
1292 }
1293 }
1294 if( pinfo == NULL )
1295 {
1296 return E_HVD_RET_INVALID_PARAMETER;
1297 }
1298
1299 _DRV_HVD_Entry();
1300
1301 HVD_GETDISPINFO_START:
1302 if (TRUE == bClearSeqChg)
1303 {
1304 HAL_HVD_SetData(E_HVD_SDATA_GET_DISP_INFO_START, 0);
1305 HVD_memcpy((void*)pinfo, (void*)HAL_HVD_GetData(E_HVD_GDATA_DISP_INFO_ADDR), sizeof(HVD_Display_Info));
1306 if (HAL_HVD_GetData(E_HVD_GDATA_IS_DISP_INFO_UNCOPYED))
1307 {
1308 u32Seqtimes--;
1309 if( u32Seqtimes > 0)
1310 {
1311 goto HVD_GETDISPINFO_START;
1312 }
1313 else
1314 {
1315 HVD_MSG_ERR("HVD Err: GetDispInfo Timeout:%d\n", (MS_S16)HAL_HVD_GetData(E_HVD_GDATA_IS_DISP_INFO_UNCOPYED));
1316 _DRV_HVD_Return(E_HVD_RET_TIMEOUT);
1317 }
1318 }
1319 }
1320 else //just report disp info, but not to clear the ready flag.
1321 {
1322 HVD_memcpy((void*)pinfo, (void*)HAL_HVD_GetData(E_HVD_GDATA_DISP_INFO_ADDR), sizeof(HVD_Display_Info));
1323 }
1324
1325 if ((TRUE == bClearSeqChg) && ( gHVDCtrl.bIsDispInfoChg ))
1326 {
1327 HVD_MSG_DEG("pinfo->u32FrameRate = %lu\n", pinfo->u32FrameRate);
1328 HVD_MSG_DEG("pinfo->u8Interlace = %x \n", (MS_S16)pinfo->u8Interlace);
1329 HVD_MSG_DEG("pinfo->u16HorSize = %u \n", pinfo->u16HorSize);
1330 HVD_MSG_DEG("pinfo->u16VerSize = %u \n", pinfo->u16VerSize);
1331 HVD_MSG_DEG("pinfo->u16Crop R/L = %u, %u \n", pinfo->u16CropRight, pinfo->u16CropLeft);
1332 HVD_MSG_DEG("pinfo->u16Crop B/T = %u, %u \n", pinfo->u16CropBottom, pinfo->u16CropTop);
1333 HVD_MSG_DEG("pinfo->u8AspectRate = %u \n", (MS_S16)pinfo->u8AspectRate);
1334 HVD_MSG_DEG("pinfo->u16SarWidth = %u \n", pinfo->u16SarWidth);
1335 HVD_MSG_DEG("pinfo->u16SarHeight = %u \n", pinfo->u16SarHeight);
1336 HVD_MSG_DEG("pinfo->u16Pitch = %u \n", pinfo->u16Pitch);
1337 HVD_MSG_DEG("pinfo->u8ColourPrimaries = %u \n", pinfo->u8ColourPrimaries);
1338 gHVDCtrl.bIsDispInfoChg=FALSE;
1339 }
1340
1341 _DRV_HVD_Return(E_HVD_OK);
1342 }
1343
1344
1345 //-------------------------------------------------------------------------------------------------
1346 // Global Functions
1347 //-------------------------------------------------------------------------------------------------
1348
1349 // System
1350 //-----------------------------------------------------------------------------
1351 /// @brief \b Function \b Name: MDrv_HVD_PowerCtrl()
1352 /// @brief \b Function \b Description: Enable/Disable HVD HW clock
1353 /// @param -bEnable \b IN : Enable/Disable HVD HW clock
1354 /// -FALSE(0): Disable
1355 /// -TRUE(1): Enable
1356 //-----------------------------------------------------------------------------
MDrv_HVD_PowerCtrl(MS_BOOL bEnable)1357 void MDrv_HVD_PowerCtrl( MS_BOOL bEnable )
1358 {
1359 HVD_MSG_TRACE();
1360 HAL_HVD_MVD_PowerCtrl( bEnable);
1361 HAL_HVD_PowerCtrl(bEnable);
1362 HAL_VPU_PowerCtrl(bEnable);
1363 }
1364
1365 //-----------------------------------------------------------------------------
1366 /// @brief \b Function \b Name: MDrv_HVD_SetOSRegBase()
1367 /// @brief \b Function \b Description: Set system register base
1368 /// @param -u32RegBaseAddr \b IN : system register base
1369 //-----------------------------------------------------------------------------
MDrv_HVD_SetOSRegBase(MS_U32 u32RegBaseAddr)1370 void MDrv_HVD_SetOSRegBase( MS_U32 u32RegBaseAddr )
1371 {
1372 HAL_HVD_InitRegBase( u32RegBaseAddr );
1373 }
1374
1375 // Action
1376
1377 //-----------------------------------------------------------------------------
1378 /// @brief \b Function \b Name: MDrv_HVD_Init()
1379 /// @brief \b Function \b Description: HVD driver initialization
1380 /// @param -pStMemCfg \b IN : pointer to the memory config of HVD driver
1381 /// @param -pStInitSettings \b IN : Initialization of HVD driver
1382 /// @return -The result of initialization process
1383 //-----------------------------------------------------------------------------
MDrv_HVD_Init(HVD_MemCfg * pStMemCfg,HVD_Init_Settings * pStInitSettings)1384 HVD_Result MDrv_HVD_Init(HVD_MemCfg *pStMemCfg, HVD_Init_Settings *pStInitSettings)
1385 {
1386 HVD_Result eRst = E_HVD_FAIL;
1387
1388 HVD_MSG_TRACE();
1389
1390 #if HVD_ENABLE_TIME_MEASURE
1391 u32InitSysTimeBase = HVD_GetSysTime_ms();
1392 #endif
1393
1394 if ((pStMemCfg == NULL) || (pStInitSettings == NULL))
1395 {
1396 HVD_MSG_ERR("HVD Err: Init params are invalid\n");
1397 return E_HVD_RET_INVALID_PARAMETER;
1398 }
1399
1400 #if HVD_ENABLE_AUTO_SET_REG_BASE
1401 {
1402 MS_U32 u32NonPMBankSize = 0, u32RiuBaseAdd = 0;
1403
1404 if (!MDrv_MMIO_GetBASE(&u32RiuBaseAdd, &u32NonPMBankSize, MS_MODULE_HW))
1405 {
1406 HVD_MSG_ERR("HVD Err: MMIO_GetBASE failure\n");
1407 return eRst;
1408 }
1409 else
1410 {
1411 HVD_MSG_INFO("HVD:1 u32RiuBaseAdd = %lx\n", u32RiuBaseAdd);
1412 HAL_HVD_InitRegBase(u32RiuBaseAdd);
1413 }
1414 }
1415 #endif
1416
1417 HVD_MSG_INFO("HVD: system call type: Mutex:%d clock:%d delay:%d asm_sync:%d\n",
1418 HVD_ENABLE_MUTEX_PROTECT,
1419 HVD_SYSTEM_CLOCK_TYPE,
1420 HVD_SYSTEM_DELAY_MS_TYPE,
1421 HVD_MEMORY_BARRIER_TYPE);
1422
1423 if (u32UartCtrl & E_HVD_UART_CTRL_INFO)
1424 {
1425 MS_U32 u32delaytime = 5;
1426 MS_U32 u32FirstTime = HVD_GetSysTime_ms();
1427 MS_U32 u32SecondTime= 0;
1428
1429 HVD_Delay_ms(u32delaytime);
1430 u32SecondTime = HVD_GetSysTime_ms();
1431
1432 HVD_MSG_INFO("HVD: MSOS API check: 1st:%lu 2nd:%lu delay:%lu dif:%lu\n",
1433 u32FirstTime,
1434 u32SecondTime,
1435 u32delaytime,
1436 u32SecondTime - u32FirstTime);
1437 }
1438
1439 #if HVD_ENABLE_TIME_MEASURE
1440 HVD_MSG_MUST("HVD Time Measure:%d (%s %d) \n",
1441 HVD_GetSysTime_ms() - u32InitSysTimeBase,
1442 __FUNCTION__,
1443 __LINE__);
1444 #endif
1445
1446 if (bHVDIsInited == TRUE)
1447 {
1448 HVD_MSG_ERR("HVD Warn: re-init HVD Driver\n");
1449
1450 #if HVD_ENABLE_REINIT_FAILED
1451 eRst = E_HVD_RET_RE_INIT;
1452 return eRst;
1453 #endif
1454 }
1455
1456 // disable ISR first
1457 HAL_HVD_EnableISR(FALSE);
1458
1459 eRst = _DRV_HVD_InitVariables(pStMemCfg,
1460 (HVD_Init_Params *) pStInitSettings);
1461
1462 if (eRst != E_HVD_OK)
1463 {
1464 return eRst;
1465 }
1466
1467 #if HVD_ENABLE_TIME_MEASURE
1468 HVD_MSG_MUST("HVD Time Measure:%d (%s %d) \n",
1469 HVD_GetSysTime_ms() - u32InitSysTimeBase,
1470 __FUNCTION__,
1471 __LINE__);
1472 #endif
1473
1474 _DRV_HVD_Entry();
1475
1476 eRst = _DRV_HVD_Check_Cmd(E_HVD_CHECK_CMD_INIT);
1477
1478 if (eRst != E_HVD_OK)
1479 {
1480 _DRV_HVD_Return(eRst);
1481 }
1482
1483 #if HVD_ENABLE_TIME_MEASURE
1484 HVD_MSG_MUST("HVD Time Measure:%d (%s %d) \n",
1485 HVD_GetSysTime_ms() - u32InitSysTimeBase,
1486 __FUNCTION__,
1487 __LINE__);
1488 #endif
1489
1490 eRst = _DRV_HVD_Rst(FALSE);
1491
1492 if (eRst != E_HVD_OK)
1493 {
1494 _DRV_HVD_Return(eRst);
1495 }
1496
1497 #if HVD_ENABLE_TIME_MEASURE
1498 HVD_MSG_MUST("HVD Time Measure:%d (%s %d) \n",
1499 HVD_GetSysTime_ms() - u32InitSysTimeBase,
1500 __FUNCTION__,
1501 __LINE__);
1502 #endif
1503
1504 gHVDCtrl.u32CtrlMode |= HVD_CTRL_INIT_FINISHED;
1505 bHVDIsInited = TRUE;
1506 eRst = E_HVD_OK;
1507
1508 HVD_MSG_INFO("HVD driver Init successfully.\n");
1509
1510 _DRV_HVD_Return(eRst);
1511 }
1512
1513 //-----------------------------------------------------------------------------
1514 /// @brief \b Function \b Name: MDrv_HVD_Rst()
1515 /// @brief \b Function \b Description: Reset HVD driver
1516 /// @param -bErrHandle \b IN : reset option HVD driver
1517 /// -FALSE(0): Reset HVD to clear mode.( do not recovery SPS)
1518 /// -TRUE(1): Reset HVD to clear mode, and recovery SPS.
1519 /// @return -The result of reset process
1520 //-----------------------------------------------------------------------------
MDrv_HVD_Rst(MS_BOOL bErrHandle)1521 HVD_Result MDrv_HVD_Rst(MS_BOOL bErrHandle)
1522 {
1523 HVD_Result eRet=E_HVD_RET_ILLEGAL_ACCESS;
1524 HVD_MSG_TRACE();
1525 _DRV_HVD_Inited(eRet);
1526 if( bErrHandle == TRUE )
1527 {
1528 HVD_MSG_ERR( "HVD Not supported reset(TRUE) yet\n");
1529 return E_HVD_RET_INVALID_PARAMETER;
1530 }
1531 if( (gHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK) != HVD_INIT_MAIN_LIVE_STREAM)
1532 {
1533 HVD_MSG_ERR( "HVD rst() only support live stream mode\n");
1534 return E_HVD_RET_INVALID_PARAMETER;
1535 }
1536 eRet = _DRV_HVD_Rst(bErrHandle);
1537 if( eRet != E_HVD_OK )
1538 {
1539 return (eRet);
1540 }
1541 eRet = _DRV_HVD_RecoverySettings();
1542 if( eRet != E_HVD_OK )
1543 {
1544 return (eRet);
1545 }
1546 gHVDCtrl.u32CtrlMode |= HVD_CTRL_INIT_FINISHED;
1547 bHVDIsInited=TRUE;
1548 return (eRet);
1549 }
1550
1551 //-----------------------------------------------------------------------------
1552 /// @brief \b Function \b Name: MDrv_HVD_Play()
1553 /// @brief \b Function \b Description: Play HVD
1554 /// @return -The result of command play
1555 //-----------------------------------------------------------------------------
MDrv_HVD_Play(void)1556 HVD_Result MDrv_HVD_Play(void)
1557 {
1558 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
1559 HVD_MSG_TRACE();
1560
1561 _DRV_HVD_Inited(eRet);
1562
1563 _DRV_HVD_Entry();
1564
1565 #if HVD_ENABLE_CHECK_STATE_BEFORE_SET_CMD
1566 if( MDrv_HVD_GetPlayState() != E_HVD_GSTATE_PLAY || gHVDCtrl.bStepDecoding )
1567 #endif
1568 {
1569 eRet = (HVD_Result)HAL_HVD_SetCmd(E_HVD_CMD_PLAY, 0);
1570 if( eRet != E_HVD_OK )
1571 {
1572 _DRV_HVD_Return(eRet );
1573 }
1574 }
1575 // step display off
1576 eRet = (HVD_Result)HAL_HVD_SetData(E_HVD_SDATA_TRIGGER_DISP, 0);
1577 if( eRet == E_HVD_OK )
1578 {
1579 gHVDCtrl.u32CtrlMode &= ~HVD_CTRL_DISPLAY_CTRL;
1580 }
1581 _DRV_HVD_Return(eRet );
1582 }
1583
1584 //-----------------------------------------------------------------------------
1585 /// @brief \b Function \b Name: MDrv_HVD_Exit()
1586 /// @brief \b Function \b Description: Stop HVD and release resource.
1587 /// @return -The result of command stop
1588 //-----------------------------------------------------------------------------
MDrv_HVD_Exit(void)1589 HVD_Result MDrv_HVD_Exit(void)
1590 {
1591 MS_U32 u32Timer=0;
1592 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
1593 HVD_MSG_TRACE();
1594 _DRV_HVD_Inited(eRet);
1595 _DRV_HVD_Rsting(eRet);
1596 bHVDIsInited=FALSE;
1597 do
1598 {
1599 u32Timer++;
1600 if(u32Timer>=HVD_FW_EXIT_ACTION_TIMEOUT)
1601 {
1602 eRet = E_HVD_RET_TIMEOUT;
1603 return eRet;
1604 }
1605 else
1606 {
1607 HVD_Delay_ms(1);
1608 }
1609 }while(_DRV_HVD_Ctrl(HVD_CTRL_PROCESSING));
1610 // release ISR callback
1611 HAL_HVD_EnableISR(FALSE);
1612 OSAL_HVD_ISR_Disable();
1613 if( gHVDISRCtrl.bRegISR )
1614 {
1615 OSAL_HVD_ISR_Detach();
1616 }
1617 // close HVD FW
1618 eRet = (HVD_Result)HAL_HVD_DeInit();
1619 // reset internal control variables
1620 HVD_memset( (void*)&gHVDPreCtrl , 0 , sizeof(HVD_Pre_Ctrl) );
1621 HVD_memset( (void*)&gHVDCtrl , 0 , sizeof(HVD_Drv_Ctrl) );
1622 HVD_memset( (void*)&gHVDISRCtrl , 0 , sizeof(HVD_ISR_Ctrl) );
1623 // TODO: check it is really stop
1624 //_DRV_HVD_Return(eRet );
1625 return eRet;
1626 }
1627
1628 //-----------------------------------------------------------------------------
1629 /// @brief \b Function \b Name: MDrv_HVD_Pause()
1630 /// @brief \b Function \b Description: Pause HVD
1631 /// @return -The result of command pause
1632 //-----------------------------------------------------------------------------
MDrv_HVD_Pause(void)1633 HVD_Result MDrv_HVD_Pause(void)
1634 {
1635 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
1636 HVD_MSG_TRACE();
1637 _DRV_HVD_Inited(eRet);
1638 _DRV_HVD_Entry();
1639 eRet = (HVD_Result)HAL_HVD_SetCmd(E_HVD_CMD_PAUSE, 0);
1640 if( eRet != E_HVD_OK)
1641 {
1642 _DRV_HVD_Return(eRet );
1643 }
1644 // step display off
1645 eRet = (HVD_Result)HAL_HVD_SetData(E_HVD_SDATA_TRIGGER_DISP, 0);
1646 if( eRet == E_HVD_OK )
1647 {
1648 gHVDCtrl.u32CtrlMode &=~HVD_CTRL_DISPLAY_CTRL;
1649 }
1650 _DRV_HVD_Return(eRet);
1651 }
1652
1653 //-----------------------------------------------------------------------------
1654 /// @brief \b Function \b Name: MDrv_HVD_Flush()
1655 /// @brief \b Function \b Description: Flush queue and buffer
1656 /// @param -bShowLast \b IN : TRUE / FALSE
1657 /// -FALSE(0): show current displayed frame
1658 /// -TRUE(1): show last decoded frame
1659 /// @return -The result of command flush
1660 //-----------------------------------------------------------------------------
MDrv_HVD_Flush(MS_BOOL bShowLast)1661 HVD_Result MDrv_HVD_Flush(MS_BOOL bShowLast)
1662 {
1663 MS_U32 u32Times = 0;
1664 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
1665 MS_U32 u32FlushTime = 0;
1666
1667 HVD_MSG_TRACE();
1668 _DRV_HVD_Inited(eRet);
1669 _DRV_HVD_Entry();
1670
1671 // pause first
1672 if (MDrv_HVD_GetPlayState() != E_HVD_GSTATE_PAUSE)
1673 {
1674 eRet = (HVD_Result) HAL_HVD_SetCmd(E_HVD_CMD_PAUSE, 0);
1675
1676 if (eRet != E_HVD_OK)
1677 {
1678 _DRV_HVD_Return(eRet);
1679 }
1680
1681 // check flush done
1682 while (1)
1683 {
1684 if (MDrv_HVD_GetPlayState() == E_HVD_GSTATE_PAUSE)
1685 {
1686 break;
1687 }
1688
1689 u32Times++;
1690 HVD_Delay_ms(1);
1691
1692 if (u32Times > 100)
1693 {
1694 HVD_MSG_INFO("HVD info: pause in flush() not finished.\n");
1695 break;
1696 }
1697 }
1698 }
1699
1700 // step display off
1701 eRet = (HVD_Result) HAL_HVD_SetData(E_HVD_SDATA_TRIGGER_DISP, 0);
1702
1703 if (eRet == E_HVD_OK)
1704 {
1705 gHVDCtrl.u32CtrlMode &= ~HVD_CTRL_DISPLAY_CTRL;
1706 }
1707
1708 #if HVD_ENABLE_RV_FEATURE
1709 if ((gHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_HW_MASK) == HVD_INIT_HW_RM)
1710 {
1711 if (gHVDCtrl.LastNal.bRVBrokenPacket)
1712 {
1713 HVD_MSG_INFO("HVD Info: push dummy packet for broken by us packet\n");
1714 gHVDPacket.u32Length = gHVDCtrl.u32RV_FlushPacketSize;
1715 gHVDPacket.u32Staddr = gHVDCtrl.u32RV_FlushPacketAddr - gHVDCtrl.MemMap.u32BitstreamBufAddr;
1716 gHVDPacket.u32OriPktAddr = gHVDPacket.u32Staddr;
1717 gHVDPacket.bRVBrokenPacket = FALSE;
1718
1719 eRet = (HVD_Result) HAL_HVD_PushPacket((HVD_BBU_Info *)&gHVDPacket);
1720 }
1721 }
1722 #endif
1723
1724 // fire all packet to FW
1725 if (HAL_HVD_GetData(E_HVD_GDATA_BBU_WRITE_PTR_FIRED) != HAL_HVD_GetData(E_HVD_GDATA_BBU_WRITE_PTR))
1726 {
1727 HAL_HVD_UpdateESWptr_Fire();
1728 }
1729
1730 // send command
1731 eRet = (HVD_Result) HAL_HVD_SetCmd(E_HVD_CMD_FLUSH, (MS_U32) bShowLast);
1732
1733 if (eRet != E_HVD_OK)
1734 {
1735 _DRV_HVD_Return(eRet);
1736 }
1737 u32FlushTime = 0;
1738
1739 // check flush done only for raw file mode
1740 if ((gHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK) == HVD_INIT_MAIN_FILE_RAW)
1741 {
1742 while (1)
1743 {
1744 //_DRV_HVD_PushDummy();
1745 if (_DRV_HVD_IsAllBufferEmpty() && (u32FlushTime >= 50))
1746 {
1747 eRet = E_HVD_OK;
1748 break;
1749 }
1750 u32Times++;
1751 u32FlushTime++;
1752 HVD_Delay_ms(1);
1753 if (u32Times > 200)
1754 {
1755 HVD_MSG_ERR("HVD Err: Flush() timeout failed: BBU:%lu Dec:%lu Disp:%lu Idle:%lu ESr:%lx ESw:%lx\n" ,
1756 HAL_HVD_GetData(E_HVD_GDATA_BBU_Q_NUMB),
1757 HAL_HVD_GetData(E_HVD_GDATA_DEC_Q_NUMB),
1758 HAL_HVD_GetData(E_HVD_GDATA_DISP_Q_NUMB),
1759 HAL_HVD_GetData(E_HVD_GDATA_VPU_IDLE_CNT),
1760 HAL_HVD_GetData(E_HVD_GDATA_ES_READ_PTR),
1761 HAL_HVD_GetData(E_HVD_GDATA_ES_WRITE_PTR));
1762 eRet = E_HVD_FAIL;
1763 break;
1764 }
1765 }
1766 // reset byte_cnt
1767 HAL_HVD_RstPTSCtrlVariable();
1768 }
1769
1770 HAL_HVD_FlushRstShareMem();
1771
1772 // MediaCodec need this to let scan mode to be normal.
1773 if (0) //bPlayback)
1774 {
1775 eRet = (HVD_Result) HAL_HVD_SetCmd(E_HVD_CMD_PLAY, 0);
1776
1777 if (eRet != E_HVD_OK)
1778 {
1779 _DRV_HVD_Return(eRet);
1780 }
1781 }
1782
1783 _DRV_HVD_Return(eRet);
1784 }
1785
1786 //-----------------------------------------------------------------------------
1787 /// @brief \b Function \b Name: MDrv_HVD_StepDisp()
1788 /// @brief \b Function \b Description: Trigger HVD to show one frame
1789 /// @return -The result of command trigger display
1790 //-----------------------------------------------------------------------------
MDrv_HVD_StepDisp(void)1791 HVD_Result MDrv_HVD_StepDisp(void)
1792 {
1793 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
1794 HVD_MSG_TRACE();
1795 _DRV_HVD_Inited(eRet);
1796 _DRV_HVD_Entry();
1797 // check command
1798 eRet=_DRV_HVD_Check_Cmd( E_HVD_CHECK_CMD_TRIGGER_DISP );
1799 if( eRet != E_HVD_OK )
1800 {
1801 _DRV_HVD_Return(eRet );
1802 }
1803
1804 // step display on
1805 if( _DRV_HVD_Ctrl(HVD_CTRL_DISPLAY_CTRL) )
1806 {
1807 if( MDrv_HVD_IsFrameShowed() )
1808 {
1809 eRet = (HVD_Result)HAL_HVD_SetData(E_HVD_SDATA_TRIGGER_DISP, 1);
1810 }
1811 else
1812 {
1813 HVD_MSG_INFO("HVD Warn: Previous Step Display command is not finished\n");
1814 eRet =E_HVD_OK;
1815 }
1816 }
1817 else
1818 {
1819 eRet = (HVD_Result)HAL_HVD_SetData(E_HVD_SDATA_TRIGGER_DISP, 1);
1820 if( eRet == E_HVD_OK )
1821 {
1822 _DRV_HVD_SetCtrl(HVD_CTRL_DISPLAY_CTRL);
1823 }
1824 }
1825 // enter play mode
1826 if( 1)//HAL_HVD_GetData(E_HVD_GDATA_FW_STATE) == E_HVD_FW_PAUSE )
1827 {
1828 eRet = (HVD_Result)HAL_HVD_SetCmd(E_HVD_CMD_PLAY, 0);
1829 if( eRet != E_HVD_OK)
1830 {
1831 _DRV_HVD_Return(eRet );
1832 }
1833 }
1834 _DRV_HVD_Return(eRet );
1835 }
1836
1837 //-----------------------------------------------------------------------------
1838 /// @brief \b Function \b Name: MDrv_HVD_StepDecode()
1839 /// @brief \b Function \b Description: Step decode one frame
1840 //-----------------------------------------------------------------------------
MDrv_HVD_StepDecode(void)1841 HVD_Result MDrv_HVD_StepDecode(void)
1842 {
1843 MS_U32 u32Times=0;
1844 MS_U32 FWState=0;
1845 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
1846 HVD_MSG_TRACE();
1847 _DRV_HVD_Inited(eRet);
1848 _DRV_HVD_Entry();
1849 // check if step decoding
1850 if( gHVDCtrl.bStepDecoding)
1851 {
1852 if( gHVDCtrl.u32StepDecodeCnt == HAL_HVD_GetData(E_HVD_GDATA_DECODE_CNT) )
1853 {
1854 eRet = E_HVD_RET_NOTREADY;
1855 _DRV_HVD_Return(eRet );
1856 }
1857 }
1858 // Pause first
1859 FWState = HAL_HVD_GetData(E_HVD_GDATA_FW_STATE);
1860 if( FWState != (MS_U32)E_HVD_FW_PAUSE )
1861 {
1862 eRet = (HVD_Result)HAL_HVD_SetCmd(E_HVD_CMD_PAUSE, 0);
1863 if( eRet != E_HVD_OK)
1864 {
1865 _DRV_HVD_Return(eRet );
1866 }
1867 while( FWState != ((MS_U32)E_HVD_FW_PAUSE)
1868 && u32Times <= 10000)
1869 {
1870 FWState = HAL_HVD_GetData(E_HVD_GDATA_FW_STATE);
1871 u32Times++;
1872 HVD_Delay_ms(1);
1873 }
1874 if( HAL_HVD_GetData(E_HVD_GDATA_FW_STATE) != E_HVD_FW_PAUSE )
1875 {
1876 eRet = E_HVD_FAIL;
1877 _DRV_HVD_Return(eRet );
1878 }
1879 }
1880 gHVDCtrl.bStepDecoding=TRUE;
1881 // get decode cnt
1882 gHVDCtrl.u32StepDecodeCnt = HAL_HVD_GetData(E_HVD_GDATA_DECODE_CNT);
1883 // step decode
1884 eRet = (HVD_Result)HAL_HVD_SetCmd(E_HVD_CMD_STEP_DECODE, 0);
1885 _DRV_HVD_Return(eRet );
1886 }
1887
1888 // set command, action, status, input
1889 //-----------------------------------------------------------------------------
1890 /// @brief \b Function \b Name: MDrv_HVD_PushQueue()
1891 /// @brief \b Function \b Description: push one entry into the decoding table(BBU table).
1892 /// @param -pInfo \b IN : Pointer to the information of input packet.
1893 /// @return -The result of command push queue
1894 //-----------------------------------------------------------------------------
MDrv_HVD_PushQueue(HVD_Packet_Info * pInfo)1895 HVD_Result MDrv_HVD_PushQueue(HVD_Packet_Info* pInfo)
1896 {
1897 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
1898 MS_BOOL bNULLPacket=FALSE;
1899 HVD_MSG_TRACE();
1900 _DRV_HVD_Inited(eRet);
1901 _DRV_HVD_Entry();
1902
1903 if( pInfo ==NULL )
1904 {
1905 eRet=E_HVD_RET_INVALID_PARAMETER;
1906 _DRV_HVD_Return(eRet );
1907 }
1908 else if( pInfo->u32Length >= 0x200000) // HW bbu tag limitation
1909 {
1910 HVD_MSG_ERR( "HVD Err: input packet size(0x%lx) larger than max packet size(0x%lx)\n " , pInfo->u32Length , 0x200000UL );
1911 eRet=E_HVD_RET_INVALID_PARAMETER;
1912 _DRV_HVD_Return(eRet );
1913 }
1914 else if( (gHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_INPUT_MASK) == HVD_INIT_INPUT_TSP )
1915 {
1916 HVD_MSG_ERR( "HVD Err: Init mode is TSP input and PushQueue() is not supported in TSP input." );
1917 eRet=E_HVD_RET_ILLEGAL_ACCESS;
1918 _DRV_HVD_Return(eRet );
1919 }
1920 else if( ((gHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_HW_MASK) != HVD_INIT_HW_RM) &&
1921 (pInfo->u32Staddr >= gHVDCtrl.MemMap.u32BitstreamBufSize) )
1922 {
1923 eRet=E_HVD_RET_INVALID_PARAMETER;
1924 _DRV_HVD_Return(eRet );
1925 }
1926
1927 //HVD_memcpy((void*)(&gHVDPacket), (void*)pInfo, sizeof(HVD_Packet_Info));
1928 gHVDPacket.u32ID_H=pInfo->u32ID_H;
1929 gHVDPacket.u32ID_L=pInfo->u32ID_L;
1930 gHVDPacket.u32Length=pInfo->u32Length;
1931 gHVDPacket.u32TimeStamp=pInfo->u32TimeStamp;
1932 if( pInfo->u32Staddr & HVD_RV_BROKEN_BY_US_MASK )
1933 {
1934 gHVDPacket.bRVBrokenPacket= TRUE;
1935 gHVDPacket.u32OriPktAddr=pInfo->u32Staddr & (~HVD_RV_BROKEN_BY_US_MASK);
1936 gHVDPacket.u32Staddr=pInfo->u32Staddr& (~HVD_RV_BROKEN_BY_US_MASK);
1937 }
1938 else
1939 {
1940 gHVDPacket.bRVBrokenPacket= FALSE;
1941 gHVDPacket.u32OriPktAddr=pInfo->u32Staddr;
1942 gHVDPacket.u32Staddr=pInfo->u32Staddr;
1943 }
1944
1945 // invalid packet
1946 if( (gHVDPacket.u32TimeStamp != HVD_U32_MAX) && (gHVDPacket.u32Length==0))
1947 {
1948 HVD_MSG_INFO( "HVD Err: Invalid Packet(size:0x%lx PTS:0x%lx)\n " , gHVDPacket.u32Length , gHVDPacket.u32TimeStamp );
1949 eRet=E_HVD_RET_INVALID_PARAMETER;
1950 _DRV_HVD_Return(eRet );
1951 }
1952 // AVI NULL packet
1953 #if HVD_ENABLE_AUTO_AVI_NULL_PACKET
1954 else if((gHVDPacket.u32TimeStamp == HVD_U32_MAX) && (gHVDPacket.u32Length==0))
1955 {
1956 if( gHVDCtrl.bNoDrvProccBuf)
1957 {
1958 HVD_MSG_INFO( "HVD Err: AVI Null Packet(size:0x%lx PTS:0x%lx), but do not have enough driver process buffer(0x%lx)\n " , pInfo->u32Length , gHVDPacket.u32TimeStamp , gHVDCtrl.MemMap.u32DrvProcessBufSize);
1959 eRet=E_HVD_RET_ILLEGAL_ACCESS;
1960 _DRV_HVD_Return(eRet );
1961 }
1962 else
1963 {
1964 bNULLPacket=TRUE;
1965 gHVDPacket.u32Length = gHVDCtrl.u32NULLPacketSize;
1966 gHVDPacket.u32Staddr= gHVDCtrl.u32NULLPacketAddr - gHVDCtrl.MemMap.u32BitstreamBufAddr;
1967 }
1968 }
1969 #endif
1970 // the else are all normal cases.
1971 if( MDrv_HVD_GetBBUVacancy() != 0)
1972 {
1973 {
1974 MS_U32 u32ESRptr=HAL_HVD_GetData(E_HVD_GDATA_ES_READ_PTR );
1975 MS_U32 u32ESWptr=HAL_HVD_GetData(E_HVD_GDATA_ES_WRITE_PTR);
1976 if( ( u32ESWptr >= u32ESRptr ) &&
1977 ( gHVDPacket.u32Staddr + gHVDPacket.u32Length >= gHVDCtrl.MemMap.u32BitstreamBufSize ) )
1978 {
1979 HVD_MSG_ERR( "HVD Warn: input packet (%lx %lx %lx) may cause bitstream buffer overflow(%lx %lx) %lx\n " , gHVDPacket.u32Staddr , gHVDPacket.u32Length , gHVDPacket.u32Staddr+gHVDPacket.u32Length , u32ESRptr ,u32ESWptr , gHVDCtrl.MemMap.u32BitstreamBufSize );
1980 }
1981 if( ( u32ESWptr < u32ESRptr ) &&
1982 ( gHVDPacket.u32Staddr + gHVDPacket.u32Length >= u32ESRptr ) )
1983 {
1984 HVD_MSG_ERR( "HVD Warn: input packet (%lx %lx %lx) may overwrite undecoded data(%lx %lx)\n " , gHVDPacket.u32Staddr , gHVDPacket.u32Length , gHVDPacket.u32Staddr+gHVDPacket.u32Length , u32ESRptr ,u32ESWptr );
1985 }
1986 if( HAL_HVD_GetData(E_HVD_GDATA_BBU_Q_NUMB) && (!bNULLPacket) &&
1987 (gHVDCtrl.MemMap.u32DrvProcessBufSize != 0) &&
1988 ( gHVDCtrl.MemMap.u32BitstreamBufAddr<= gHVDCtrl.MemMap.u32DrvProcessBufAddr ) &&
1989 ( gHVDCtrl.MemMap.u32DrvProcessBufAddr < (gHVDCtrl.MemMap.u32BitstreamBufAddr + gHVDCtrl.MemMap.u32BitstreamBufSize)) )
1990 {
1991 MS_U32 u32Lower = gHVDCtrl.MemMap.u32DrvProcessBufAddr - gHVDCtrl.MemMap.u32BitstreamBufAddr;
1992 MS_U32 u32Upper = u32Lower+gHVDCtrl.MemMap.u32DrvProcessBufSize;
1993 if( ( (u32Lower <= gHVDPacket.u32Staddr) && (gHVDPacket.u32Staddr < u32Upper)) ||
1994 ( (u32Lower <= (gHVDPacket.u32Staddr + gHVDPacket.u32Length) ) && ( (gHVDPacket.u32Staddr+gHVDPacket.u32Length) < u32Upper)) ||
1995 ( (gHVDPacket.u32Staddr < u32Lower) && (u32Upper<=(gHVDPacket.u32Staddr+gHVDPacket.u32Length)) ) )
1996 {
1997 HVD_MSG_ERR( "HVD Warn: input packet (%lx %lx %lx) is located in HVD driver process buffer(%lx %lx)\n " , gHVDPacket.u32Staddr , gHVDPacket.u32Length , gHVDPacket.u32Staddr+gHVDPacket.u32Length , u32Lower ,u32Upper );
1998 }
1999 }
2000 //for debug
2001 if( 0)
2002 {
2003 HVD_MSG_INFO( "HVD : %lu (%lu %lu) ID:%lx input packet (%lx %lx %lx) (%lx %lx %lx) (%lu %lu %lu)\n " ,
2004 gHVDCtrl.u32BBUPacketCnt , MDrv_HVD_GetDataErrCnt() , MDrv_HVD_GetDecErrCnt(),
2005 gHVDPacket.u32ID_L , gHVDPacket.u32Staddr+gHVDPacket.u32Length , gHVDPacket.u32Length ,gHVDPacket.u32Staddr ,
2006 u32ESRptr, gHVDCtrl.MemMap.u32BitstreamBufSize ,u32ESWptr ,
2007 MDrv_HVD_GetBBUVacancy() ,HAL_HVD_GetData(E_HVD_GDATA_BBU_READ_PTR) ,HAL_HVD_GetData(E_HVD_GDATA_BBU_WRITE_PTR) );
2008 }
2009 }
2010 #if !(defined(UDMA_FPGA_ENVI))
2011 if( ((gHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_HW_MASK) != HVD_INIT_HW_RM)
2012 && (gHVDCtrl.bAutoRmLastZeroByte == TRUE)
2013 && ( (!gHVDCtrl.bCannotAccessMIU256) ||
2014 (( gHVDCtrl.bCannotAccessMIU256 ) && ( gHVDCtrl.MemMap.u32BitstreamBufAddr < gHVDCtrl.MemMap.u32MIU1BaseAddr))) )
2015 {
2016 MS_U32 ModifyCnt=0;
2017 while(1)//for( ModifyCnt=0 ; ModifyCnt<3;ModifyCnt++ )
2018 {
2019 if( gHVDPacket.u32Length )
2020 {
2021 MS_U8 *pByte=NULL;
2022 MS_U32 u32tmp=0;
2023 u32tmp = ( gHVDPacket.u32Staddr + gHVDPacket.u32Length-1);
2024 if( u32tmp >= gHVDCtrl.MemMap.u32BitstreamBufSize )
2025 {
2026 u32tmp-=gHVDCtrl.MemMap.u32BitstreamBufSize;
2027 }
2028 u32tmp+=gHVDCtrl.MemMap.u32BitstreamBufVAddr;
2029 pByte = (MS_U8 *)u32tmp;
2030 if( *pByte == 0 )
2031 {
2032 /*
2033 if( ModifyCnt == 2 )
2034 {
2035 gHVDPacket.u32Length+=ModifyCnt;
2036 }
2037 else
2038 */
2039 {
2040 ModifyCnt++;
2041 gHVDPacket.u32Length--;
2042 }
2043 }
2044 else
2045 {
2046 break;
2047 }
2048 }
2049 }
2050 if( ModifyCnt != 0)
2051 {
2052 //HVD_MSG_INFO("HVD remove last zero byte:%lu\n" , ModifyCnt);
2053 }
2054 if( gHVDPacket.u32Length == 0 )
2055 {
2056 HVD_MSG_ERR( "HVD Warn: Packet with all zero bytes(staddr:0x%lx remove zero bytes:%lu)\n " , gHVDPacket.u32Staddr , ModifyCnt);
2057 eRet=E_HVD_OK;
2058 _DRV_HVD_Return(eRet );
2059 }
2060 }
2061 #endif
2062 /*
2063 {
2064 MS_U8 *pByte=NULL;
2065 pByte = (MS_U8 *)((gHVDCtrl.MemMap.u32BitstreamBufVAddr) + gHVDPacket.u32Staddr );
2066 HVD_MSG_INFO("HVD remove last zero byte:%02x%02x%02x%02x\n" ,
2067 *pByte , *(pByte+1) , *(pByte+2) , *(pByte+3) );
2068 }
2069 */
2070 eRet=( HVD_Result )HAL_HVD_PushPacket( (HVD_BBU_Info*)&gHVDPacket );
2071
2072 }
2073 else
2074 {
2075 HVD_MSG_DEG("Push queue full\n");
2076 eRet=E_HVD_RET_QUEUE_FULL;
2077 }
2078 _DRV_HVD_Return(eRet );
2079 }
2080
2081 //-----------------------------------------------------------------------------
2082 /// @brief \b Function \b Name: MDrv_HVD_PushQueue_Fire()
2083 /// @brief \b Function \b Description: fire all waiting entry into the decoding table(BBU table).
2084 /// @return -The result of command push queue fire
2085 //-----------------------------------------------------------------------------
MDrv_HVD_PushQueue_Fire(void)2086 HVD_Result MDrv_HVD_PushQueue_Fire(void)
2087 {
2088 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
2089 HVD_MSG_TRACE();
2090 _DRV_HVD_Inited(eRet);
2091 _DRV_HVD_Entry();
2092 HAL_HVD_UpdateESWptr_Fire();
2093 eRet= E_HVD_OK;
2094 _DRV_HVD_Return( eRet);
2095 }
2096
2097 //-----------------------------------------------------------------------------
2098 /// @brief \b Function \b Name: MDrv_HVD_DecodeIFrame()
2099 /// @brief \b Function \b Description: Decode I frame only under driver input path.
2100 /// @param -u32SrcSt \b IN : The physical address if user has input packet.
2101 /// @param -u32SrcSize \b IN : The packet size if user has input packet.
2102 /// @return -The result of command decode I frame.
2103 //-----------------------------------------------------------------------------
MDrv_HVD_DecodeIFrame(MS_PHYADDR u32SrcSt,MS_U32 u32SrcSize)2104 HVD_Result MDrv_HVD_DecodeIFrame(MS_PHYADDR u32SrcSt , MS_U32 u32SrcSize)
2105 {
2106 MS_U32 timer = 300;
2107 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
2108 HVD_MSG_TRACE();
2109 _DRV_HVD_Inited(eRet);
2110 _DRV_HVD_Entry();
2111
2112 eRet= MDrv_HVD_Pause();
2113 if( eRet != E_HVD_OK)
2114 {
2115 _DRV_HVD_Return(eRet );
2116 }
2117 // skip decode I
2118 eRet= (HVD_Result)HAL_HVD_SetCmd(E_HVD_CMD_SKIP_DEC, E_HVD_SKIP_DECODE_I);
2119 if( eRet != E_HVD_OK )
2120 {
2121 _DRV_HVD_Return(eRet );
2122 }
2123 eRet = (HVD_Result)HAL_HVD_SetCmd(E_HVD_CMD_DISP_I_DIRECT, TRUE);
2124 if( eRet != E_HVD_OK )
2125 {
2126 _DRV_HVD_Return(eRet );
2127 }
2128 eRet = MDrv_HVD_StepDecode();
2129 if( eRet != E_HVD_OK)
2130 {
2131 _DRV_HVD_Return(eRet );
2132 }
2133 if( E_HVD_INIT_INPUT_DRV == (gHVDCtrl.InitParams.u32ModeFlag & E_HVD_INIT_INPUT_MASK) )
2134 {
2135 HVD_Packet_Info packet;
2136 if( u32SrcSize ==0 )
2137 {
2138 eRet = E_HVD_RET_INVALID_PARAMETER;
2139 HVD_MSG_ERR( "HVD err: decode I frame input packet size is zero\n" );
2140 _DRV_HVD_Return(eRet );
2141 }
2142 packet.u32Staddr = u32SrcSt - gHVDCtrl.MemMap.u32BitstreamBufAddr ;
2143 packet.u32Length = u32SrcSize;
2144 if( ( packet.u32Staddr + packet.u32Length ) > gHVDCtrl.MemMap.u32BitstreamBufSize )
2145 {
2146 eRet = E_HVD_RET_INVALID_PARAMETER;
2147 HVD_MSG_ERR( "HVD err: decode I frame memory overflow, the packet end address is over ES buffer end address\n" );
2148 _DRV_HVD_Return(eRet );
2149 }
2150 packet.u32TimeStamp = 0xFFFFFFFF;
2151 packet.u32ID_L=0;
2152 packet.u32ID_H=0;
2153 MDrv_HVD_PushQueue( &packet );
2154 HAL_HVD_UpdateESWptr_Fire();
2155 }
2156 while( timer )
2157 {
2158 HVD_Delay_ms(1);
2159 if( MDrv_HVD_IsStepDecodeDone() )
2160 {
2161 break;
2162 }
2163 timer--;
2164 }
2165 if( timer ==0)
2166 {
2167 eRet= E_HVD_FAIL;
2168 HVD_MSG_ERR( "HVD err: decode I frame time out, not enough data\n" );
2169 _DRV_HVD_Return( eRet);
2170 }
2171 eRet= E_HVD_OK;
2172 _DRV_HVD_Return( eRet);
2173 }
2174
2175 //-----------------------------------------------------------------------------
2176 /// @brief \b Function \b Name: MDrv_HVD_SetDataEnd()
2177 /// @brief \b Function \b Description: Upper layer set this to inform driver that there are no more data will be pushed.
2178 /// @param -bEnd \b IN : Enable/ Disable
2179 /// -FALSE(0): normal status( default )
2180 /// -TRUE(1): ending status
2181 //-----------------------------------------------------------------------------
MDrv_HVD_SetDataEnd(MS_BOOL bEnd)2182 HVD_Result MDrv_HVD_SetDataEnd( MS_BOOL bEnd )
2183 {
2184 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
2185 HVD_MSG_TRACE();
2186 _DRV_HVD_Inited(eRet);
2187 _DRV_HVD_Entry();
2188 if( bEnd )
2189 {
2190 gHVDCtrl.u32CtrlMode|= HVD_CTRL_DATA_END;
2191 }
2192 else
2193 {
2194 gHVDCtrl.u32CtrlMode&=~ HVD_CTRL_DATA_END;
2195 }
2196 //_DRV_HVD_PushDummy_Rst();
2197 eRet = (HVD_Result)HAL_HVD_SetCmd(E_HVD_CMD_PLAYBACK_FINISH, bEnd);
2198 _DRV_HVD_Return( eRet);
2199 }
2200
2201
2202 //-----------------------------------------------------------------------------
2203 /// @brief \b Function \b Name: MDrv_HVD_SetDispErrFrm()
2204 /// @brief \b Function \b Description: Enable/ Disable to decode and show error(broken) frames
2205 /// @param -bEnable \b IN : Enable/ Disable
2206 /// -FALSE(0): hide error frames
2207 /// -TRUE(1): show error frames
2208 /// @return -The result of command set display error frames
2209 //-----------------------------------------------------------------------------
MDrv_HVD_SetDispErrFrm(MS_BOOL bEnable)2210 HVD_Result MDrv_HVD_SetDispErrFrm(MS_BOOL bEnable)
2211 {
2212 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
2213 HVD_MSG_TRACE();
2214 _DRV_HVD_Inited(eRet);
2215 _DRV_HVD_Entry();
2216 eRet = (HVD_Result)HAL_HVD_SetCmd(E_HVD_CMD_DISP_ERR_FRM, bEnable);
2217 gHVDCtrl.Settings.bIsShowErrFrm=bEnable;
2218 _DRV_HVD_Return(eRet );
2219 }
2220
2221 //-----------------------------------------------------------------------------
2222 /// @brief \b Function \b Name: MDrv_HVD_SetDispRepeatField()
2223 /// @brief \b Function \b Description: Enable/ Disable to show last field when FW needs to show repeated field
2224 /// @param -bEnable \b IN : Enable/ Disable
2225 /// -FALSE(0): disable this mode
2226 /// -TRUE(1): enable this mode
2227 /// @return -The result of command set display repeated field
2228 //-----------------------------------------------------------------------------
MDrv_HVD_SetDispRepeatField(MS_BOOL bEnable)2229 HVD_Result MDrv_HVD_SetDispRepeatField(MS_BOOL bEnable)
2230 {
2231 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
2232 HVD_MSG_TRACE();
2233 _DRV_HVD_Inited(eRet);
2234 _DRV_HVD_Entry();
2235 eRet = (HVD_Result)HAL_HVD_SetCmd(E_HVD_CMD_REPEAT_LAST_FIELD, bEnable);
2236 _DRV_HVD_Return(eRet );
2237 }
2238
2239 //-----------------------------------------------------------------------------
2240 /// @brief \b Function \b Name: MDrv_HVD_SetSkipDecMode()
2241 /// @brief \b Function \b Description: set the decoding frame type.
2242 /// @param -eDecType \b IN : decoding frame type
2243 /// @return -The result of command set skip decode mode
2244 //-----------------------------------------------------------------------------
MDrv_HVD_SetSkipDecMode(HVD_Skip_Decode eDecType)2245 HVD_Result MDrv_HVD_SetSkipDecMode(HVD_Skip_Decode eDecType)
2246 {
2247 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
2248 HVD_MSG_TRACE();
2249 _DRV_HVD_Inited(eRet);
2250 _DRV_HVD_Entry();
2251 #if HVD_ENABLE_CHECK_STATE_BEFORE_SET_CMD
2252 if( (HVD_Skip_Decode)HAL_HVD_GetData( E_HVD_GDATA_SKIP_MODE ) != eDecType )
2253 #endif
2254 {
2255 eRet= (HVD_Result)HAL_HVD_SetCmd(E_HVD_CMD_SKIP_DEC, eDecType);
2256 if( eRet != E_HVD_OK )
2257 {
2258 _DRV_HVD_Return(eRet );
2259 }
2260 if( eDecType == E_HVD_SKIP_DECODE_I )
2261 {
2262 eRet = (HVD_Result)HAL_HVD_SetCmd(E_HVD_CMD_DISP_I_DIRECT, TRUE);
2263 }
2264 else
2265 {
2266 eRet = (HVD_Result)HAL_HVD_SetCmd(E_HVD_CMD_DISP_I_DIRECT, FALSE);
2267 }
2268 }
2269 gHVDCtrl.Settings.u8SkipMode=(MS_U8)eDecType;
2270 _DRV_HVD_Return(eRet );
2271 }
2272
2273 //-----------------------------------------------------------------------------
2274 /// @brief \b Function \b Name: MDrv_HVD_SetDispSpeed()
2275 /// @brief \b Function \b Description: specify the display speed type.
2276 /// @param -eSpeed \b IN : display speed type
2277 /// @return -The result of command set display speed type
2278 //-----------------------------------------------------------------------------
MDrv_HVD_SetDispSpeed(HVD_Drv_Disp_Speed eSpeed)2279 HVD_Result MDrv_HVD_SetDispSpeed(HVD_Drv_Disp_Speed eSpeed)
2280 {
2281 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
2282 HVD_MSG_TRACE();
2283 _DRV_HVD_Inited(eRet);
2284 _DRV_HVD_Entry();
2285 HVD_MSG_DEG(" MDrv_HVD_SetDispSpeed:%d\n " , (MS_S16)eSpeed);
2286 #if HVD_ENABLE_CHECK_STATE_BEFORE_SET_CMD
2287 if( HAL_HVD_GetData( E_HVD_GDATA_DISPLAY_DURATION ) != eSpeed )
2288 #endif
2289 {
2290 eRet = (HVD_Result)HAL_HVD_SetCmd(E_HVD_CMD_DISP_SPEED, eSpeed);
2291 }
2292 #if HVD_ENABLE_WAIT_CMD_FINISHED
2293 if( eRet == E_HVD_OK )
2294 {
2295 MS_U32 timer = HVD_DRV_CMD_WAIT_FINISH_TIMEOUT;
2296 while( timer )
2297 {
2298 if( HAL_HVD_GetData( E_HVD_GDATA_DISPLAY_DURATION ) == eSpeed )
2299 {
2300 break;
2301 }
2302 HVD_Delay_ms(1);
2303 timer--;
2304 }
2305 }
2306 #endif
2307 _DRV_HVD_Return(eRet );
2308 }
2309
2310 //-----------------------------------------------------------------------------
2311 /// @brief \b Function \b Name: MDrv_HVD_SetSyncActive()
2312 /// @brief \b Function \b Description: Enable/disable the sync of video time stamp and STC.
2313 /// @param -bEnable \b IN : Enable/ Disable
2314 /// -FALSE(0): Disable sync mode
2315 /// -TRUE(1): Enable sync mode
2316 /// @return -The result of command set sync active
2317 //-----------------------------------------------------------------------------
MDrv_HVD_SetSyncActive(MS_BOOL bEnable)2318 HVD_Result MDrv_HVD_SetSyncActive( MS_BOOL bEnable)
2319 {
2320 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
2321 HVD_MSG_TRACE();
2322 _DRV_HVD_Inited(eRet);
2323 _DRV_HVD_Entry();
2324 #if HVD_ENABLE_CHECK_STATE_BEFORE_SET_CMD
2325 if( HAL_HVD_GetData( E_HVD_GDATA_IS_SYNC_ON ) != bEnable )
2326 #endif
2327 {
2328 eRet= (HVD_Result)HAL_HVD_SetCmd(E_HVD_CMD_SYNC_ACTIVE, bEnable);
2329 }
2330 #if HVD_ENABLE_WAIT_CMD_FINISHED
2331 if( eRet == E_HVD_OK )
2332 {
2333 MS_U32 timer = HVD_DRV_CMD_WAIT_FINISH_TIMEOUT;
2334 while( timer )
2335 {
2336 if( HAL_HVD_GetData( E_HVD_GDATA_IS_SYNC_ON ) == bEnable )
2337 {
2338 break;
2339 }
2340 HVD_Delay_ms(1);
2341 timer--;
2342 }
2343 }
2344 #endif
2345 gHVDCtrl.Settings.bIsSyncOn=bEnable;
2346 _DRV_HVD_Return(eRet );
2347 }
2348
2349 //-----------------------------------------------------------------------------
2350 /// @brief \b Function \b Name: MDrv_HVD_SetDropMode()
2351 /// @brief \b Function \b Description: specify the way to drop decoded frames.
2352 /// @param -eMode \b IN : Drop display type.
2353 /// @param -u32Arg \b IN : The argument of eMode
2354 /// -( eMode == E_HVD_DROP_DISPLAY_AUTO) , Enable: (u32Arg = TRUE); Disable: (u32Arg = FALSE)
2355 /// -( eMode == E_HVD_DROP_DISPLAY_ONCE) , u32Arg = not zero
2356 /// @return -The result of command set display speed type
2357 //-----------------------------------------------------------------------------
MDrv_HVD_SetDropMode(HVD_Drop_Disp eMode,MS_U32 u32Arg)2358 HVD_Result MDrv_HVD_SetDropMode( HVD_Drop_Disp eMode , MS_U32 u32Arg)
2359 {
2360 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
2361 HVD_MSG_TRACE();
2362 _DRV_HVD_Inited(eRet);
2363 _DRV_HVD_Entry();
2364
2365 if( eMode == E_HVD_DROP_DISPLAY_AUTO )
2366 {
2367 eRet= (HVD_Result)HAL_HVD_SetCmd(E_HVD_CMD_DROP_DISP_AUTO, u32Arg);
2368 }
2369 else if( eMode == E_HVD_DROP_DISPLAY_ONCE )
2370 {
2371 eRet= (HVD_Result)HAL_HVD_SetCmd(E_HVD_CMD_DROP_DISP_ONCE, u32Arg);
2372 }
2373 else
2374 {
2375 eRet= E_HVD_RET_INVALID_PARAMETER;
2376 }
2377 _DRV_HVD_Return(eRet );
2378 }
2379
2380 //-----------------------------------------------------------------------------
2381 /// @brief \b Function \b Name: MDrv_HVD_RstPTS()
2382 /// @brief \b Function \b Description: Reset HVD sync table
2383 /// @param -u32PTS \b IN : PTS base
2384 /// @return -The result of command reset PTS
2385 //-----------------------------------------------------------------------------
MDrv_HVD_RstPTS(MS_U32 u32PTS)2386 HVD_Result MDrv_HVD_RstPTS(MS_U32 u32PTS)
2387 {
2388 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
2389 HVD_MSG_TRACE();
2390 _DRV_HVD_Inited(eRet);
2391 _DRV_HVD_Entry();
2392 eRet = (HVD_Result)HAL_HVD_SetCmd(E_HVD_CMD_RESET_PTS, u32PTS);
2393 _DRV_HVD_Return(eRet );
2394 }
2395
2396 //-----------------------------------------------------------------------------
2397 /// @brief \b Function \b Name: MDrv_HVD_SetFrcMode()
2398 /// @brief \b Function \b Description: set the frame rate convert mode.
2399 /// @param -eMode \b IN : mode type
2400 /// @return -The result of command set frame rate convert mode
2401 //-----------------------------------------------------------------------------
MDrv_HVD_SetFrcMode(HVD_FrmRateConv_Mode eMode)2402 HVD_Result MDrv_HVD_SetFrcMode(HVD_FrmRateConv_Mode eMode )
2403 {
2404 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
2405 HVD_MSG_TRACE();
2406 _DRV_HVD_Inited(eRet);
2407 _DRV_HVD_Entry();
2408 eRet = (HVD_Result)HAL_HVD_SetCmd(E_HVD_CMD_FRC_MODE, eMode);
2409 gHVDCtrl.Settings.u8FrcMode=(MS_U8)eMode;
2410 _DRV_HVD_Return(eRet );
2411 }
2412
2413 //-----------------------------------------------------------------------------
2414 /// @brief \b Function \b Name: MDrv_HVD_SetSyncTolerance()
2415 /// @brief \b Function \b Description: Set the tolerance of FW reporting sync reach.
2416 /// @param -u32Arg \b IN : tolerance.
2417 /// @return -The result of command set sync tolerance
2418 //-----------------------------------------------------------------------------
MDrv_HVD_SetSyncTolerance(MS_U32 u32Arg)2419 HVD_Result MDrv_HVD_SetSyncTolerance(MS_U32 u32Arg )
2420 {
2421 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
2422 HVD_MSG_TRACE();
2423 _DRV_HVD_Inited(eRet);
2424 _DRV_HVD_Entry();
2425 eRet = (HVD_Result)HAL_HVD_SetCmd(E_HVD_CMD_SYNC_TOLERANCE, u32Arg);
2426 gHVDCtrl.Settings.u32SyncTolerance=u32Arg;
2427 _DRV_HVD_Return(eRet );
2428 }
2429
2430 //-----------------------------------------------------------------------------
2431 /// @brief \b Function \b Name: MDrv_HVD_SetSyncVideoDelay()
2432 /// @brief \b Function \b Description: Set the video delay from STC when sync mode active.
2433 /// @param -u32Arg \b IN : The video delay. unit:ms
2434 /// @return -The result of command set sync video delay
2435 //-----------------------------------------------------------------------------
MDrv_HVD_SetSyncVideoDelay(MS_U32 u32Arg)2436 HVD_Result MDrv_HVD_SetSyncVideoDelay( MS_U32 u32Arg)
2437 {
2438 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
2439 HVD_MSG_TRACE();
2440 _DRV_HVD_Inited(eRet);
2441 _DRV_HVD_Entry();
2442 if( (gHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK) ==
2443 HVD_INIT_MAIN_LIVE_STREAM )
2444 {
2445 if( gHVDCtrl.InitParams.u8TimeUnit )
2446 {
2447 eRet= (HVD_Result)HAL_HVD_SetCmd(E_HVD_CMD_SYNC_VIDEO_DELAY, (MS_U32)(u32Arg+HVD_DTV_VIDEO_DELAY) );
2448 }
2449 else
2450 {
2451 eRet= (HVD_Result)HAL_HVD_SetCmd(E_HVD_CMD_SYNC_VIDEO_DELAY, u32Arg+((MS_U32)HVD_DTV_VIDEO_DELAY*90) );
2452 }
2453 }
2454 else
2455 {
2456 eRet= (HVD_Result)HAL_HVD_SetCmd(E_HVD_CMD_SYNC_VIDEO_DELAY, u32Arg);
2457 }
2458 gHVDCtrl.Settings.u32SyncVideoDelay=u32Arg;
2459 _DRV_HVD_Return(eRet );
2460 }
2461
2462 //-----------------------------------------------------------------------------
2463 /// @brief \b Function \b Name: MDrv_HVD_SetSyncFreeRunTH()
2464 /// @brief \b Function \b Description: Set the tolerance of FW reporting sync reach.
2465 /// @param -u32Arg \b IN : theashold.
2466 /// - 0 : use FW default value
2467 /// - 0xFFFFFFFF : never free run, FW always do sync action.
2468 /// @return -The result of command set sync tolerance
2469 //-----------------------------------------------------------------------------
MDrv_HVD_SetSyncFreeRunTH(MS_U32 u32Arg)2470 HVD_Result MDrv_HVD_SetSyncFreeRunTH(MS_U32 u32Arg )
2471 {
2472 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
2473 HVD_MSG_TRACE();
2474 _DRV_HVD_Inited(eRet);
2475 _DRV_HVD_Entry();
2476 eRet = (HVD_Result)HAL_HVD_SetCmd(E_HVD_CMD_FREERUN_THRESHOLD, u32Arg);
2477 gHVDCtrl.Settings.u32SyncFreeRunTH=u32Arg;
2478 _DRV_HVD_Return(eRet );
2479 }
2480
2481 //-----------------------------------------------------------------------------
2482 /// @brief \b Function \b Name: MDrv_HVD_SetSyncRepeatTH()
2483 /// @brief \b Function \b Description: Set the repeat threashold under sync mode.
2484 /// @param -u32Arg \b IN : repeat times. 0x01 ~ 0xFF
2485 /// 0xff - repeat current frame until STC catch up PTS.
2486 /// @return -The result of command set sync repeat threashold
2487 //-----------------------------------------------------------------------------
MDrv_HVD_SetSyncRepeatTH(MS_U32 u32Arg)2488 HVD_Result MDrv_HVD_SetSyncRepeatTH( MS_U32 u32Arg)
2489 {
2490 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
2491 HVD_MSG_TRACE();
2492 _DRV_HVD_Inited(eRet);
2493 _DRV_HVD_Entry();
2494 eRet= (HVD_Result)HAL_HVD_SetCmd(E_HVD_CMD_SYNC_THRESHOLD, u32Arg);
2495 gHVDCtrl.Settings.u32SyncRepeatTH=u32Arg;
2496 _DRV_HVD_Return(eRet );
2497 }
2498
2499 //-----------------------------------------------------------------------------
2500 /// @brief \b Function \b Name: MDrv_HVD_SetErrConceal()
2501 /// @brief \b Function \b Description: Enable/Disable error concealment.
2502 /// @param -bEnable \b IN : Enable/Disable
2503 /// -FALSE(0): Disable error concealment.
2504 /// -TRUE(1): Enable error concealment.
2505 /// @return -The result of command set sync tolerance
2506 //-----------------------------------------------------------------------------
MDrv_HVD_SetErrConceal(MS_BOOL bEnable)2507 HVD_Result MDrv_HVD_SetErrConceal(MS_BOOL bEnable )
2508 {
2509 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
2510 HVD_MSG_TRACE();
2511 _DRV_HVD_Inited(eRet);
2512 _DRV_HVD_Entry();
2513 eRet = (HVD_Result)HAL_HVD_SetCmd(E_HVD_CMD_ERR_CONCEAL, bEnable);
2514 gHVDCtrl.Settings.bIsErrConceal=bEnable;
2515 _DRV_HVD_Return(eRet );
2516 }
2517
2518 //-----------------------------------------------------------------------------
2519 /// @brief \b Function \b Name: MDrv_HVD_SetDbgLevel()
2520 /// @brief \b Function \b Description: Set debug level
2521 /// @param -elevel \b IN : debug level
2522 //-----------------------------------------------------------------------------
MDrv_HVD_SetDbgLevel(HVD_Uart_Level elevel)2523 void MDrv_HVD_SetDbgLevel( HVD_Uart_Level elevel )
2524 {
2525 if( elevel == E_HVD_UART_LEVEL_FW )
2526 {
2527 HAL_HVD_UartSwitch2FW(TRUE);
2528 }
2529 #if 0
2530 else
2531 {
2532 HAL_HVD_UartSwitch2FW(FALSE);
2533 }
2534 #endif
2535 switch( elevel )
2536 {
2537 case E_HVD_UART_LEVEL_ERR:
2538 u32UartCtrl =E_HVD_UART_CTRL_ERR;
2539 break;
2540 case E_HVD_UART_LEVEL_INFO:
2541 u32UartCtrl =E_HVD_UART_CTRL_INFO|E_HVD_UART_CTRL_ERR;
2542 break;
2543 case E_HVD_UART_LEVEL_DBG:
2544 u32UartCtrl =E_HVD_UART_CTRL_DBG|E_HVD_UART_CTRL_ERR|E_HVD_UART_CTRL_INFO;
2545 break;
2546 case E_HVD_UART_LEVEL_TRACE:
2547 u32UartCtrl =E_HVD_UART_CTRL_TRACE|E_HVD_UART_CTRL_ERR|E_HVD_UART_CTRL_INFO|E_HVD_UART_CTRL_DBG;
2548 break;
2549 case E_HVD_UART_LEVEL_FW:
2550 //u32UartCtrl =E_HVD_UART_CTRL_FW|E_HVD_UART_CTRL_ERR|E_HVD_UART_CTRL_INFO|E_HVD_UART_CTRL_DBG|E_HVD_UART_CTRL_TRACE;
2551 //break;
2552 case E_HVD_UART_LEVEL_NONE:
2553 default:
2554 u32UartCtrl=E_HVD_UART_CTRL_DISABLE;
2555 break;
2556 }
2557 }
2558
2559 //-----------------------------------------------------------------------------
2560 /// @brief \b Function \b Name: MDrv_HVD_SeekToPTS()
2561 /// @brief \b Function \b Description: Let FW decode to the input PTS by using full decoding speed. If FW reaches (equal to or larger than) input PTS, FW will pause automatically. This function can not work under MDrv_HVD_SetSyncActive(TRUE).
2562 /// @param -u32PTS \b IN : specific PTS.
2563 /// -0: disable this mode. FW will go back to previous status (play or pause).
2564 /// -any not zero: enable this mode
2565 /// @return -The result of command seek to specific PTS.
2566 //-----------------------------------------------------------------------------
MDrv_HVD_SeekToPTS(MS_U32 u32PTS)2567 HVD_Result MDrv_HVD_SeekToPTS(MS_U32 u32PTS )
2568 {
2569 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
2570 HVD_MSG_TRACE();
2571 _DRV_HVD_Inited(eRet);
2572 _DRV_HVD_Entry();
2573 eRet=_DRV_HVD_Check_Cmd( E_HVD_CHECK_CMD_SEEK2PTS );
2574 if( eRet != E_HVD_OK )
2575 {
2576 _DRV_HVD_Return(eRet );
2577 }
2578 eRet = (HVD_Result)HAL_HVD_SetCmd(E_HVD_CMD_JUMP_TO_PTS, u32PTS);
2579 _DRV_HVD_Return(eRet );
2580 }
2581
2582 //-----------------------------------------------------------------------------
2583 /// @brief \b Function \b Name: MDrv_HVD_SkipToPTS()
2584 /// @brief \b Function \b Description: Let FW skip to the input PTS by using full decoding speed and start decode again after input PTS.
2585 /// @param -u32PTS \b IN : specific PTS.
2586 /// -0: disable this mode. FW will go back to previous status (play or pause).
2587 /// -any not zero: enable this mode
2588 /// @return -The result of command seek to specific PTS.
2589 //-----------------------------------------------------------------------------
MDrv_HVD_SkipToPTS(MS_U32 u32PTS)2590 HVD_Result MDrv_HVD_SkipToPTS(MS_U32 u32PTS )
2591 {
2592 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
2593 HVD_MSG_TRACE();
2594 _DRV_HVD_Inited(eRet);
2595 _DRV_HVD_Entry();
2596 eRet = (HVD_Result)HAL_HVD_SetCmd(E_HVD_CMD_SKIP_TO_PTS, u32PTS);
2597 _DRV_HVD_Return(eRet );
2598 }
2599
2600 //-----------------------------------------------------------------------------
2601 /// @brief \b Function \b Name: MDrv_HVD_SetFreezeImg()
2602 /// @brief \b Function \b Description: Let FW stop updating frames when vsync, but decoding process is still going.
2603 /// @param -bEnable \b IN : Enable/Disable
2604 /// -FALSE(0): Disable freeze image.
2605 /// -TRUE(1): Enable freeze image.
2606 /// @return -The result of command freeze image.
2607 //-----------------------------------------------------------------------------
MDrv_HVD_SetFreezeImg(MS_BOOL bEnable)2608 HVD_Result MDrv_HVD_SetFreezeImg(MS_BOOL bEnable )
2609 {
2610 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
2611 HVD_MSG_TRACE();
2612 _DRV_HVD_Inited(eRet);
2613 _DRV_HVD_Entry();
2614 eRet = (HVD_Result)HAL_HVD_SetCmd(E_HVD_CMD_FREEZE_IMG, bEnable);
2615 _DRV_HVD_Return(eRet );
2616 }
2617
2618 //-----------------------------------------------------------------------------
2619 /// @brief \b Function \b Name: MDrv_HVD_SetBlueScreen()
2620 /// @brief \b Function \b Description: Let FW stop updating frames when vsync and keep blue screen , but decoding process is still going.
2621 /// @param -bEnable \b IN : Enable/Disable
2622 /// -FALSE(0): Disable blue screen.
2623 /// -TRUE(1): Enable blue screen.
2624 /// @return -The result of command set blue screen.
2625 //-----------------------------------------------------------------------------
MDrv_HVD_SetBlueScreen(MS_BOOL bEnable)2626 HVD_Result MDrv_HVD_SetBlueScreen(MS_BOOL bEnable )
2627 {
2628 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
2629 HVD_MSG_TRACE();
2630 _DRV_HVD_Inited(eRet);
2631 _DRV_HVD_Entry();
2632 eRet = (HVD_Result)HAL_HVD_SetCmd(E_HVD_CMD_BLUE_SCREEN, bEnable);
2633 _DRV_HVD_Return(eRet );
2634 }
2635
2636 //-----------------------------------------------------------------------------
2637 /// @brief \b Function \b Name: MDrv_HVD_SetDispOneField()
2638 /// @brief \b Function \b Description: Let FW only show one field(top field only).
2639 /// @param -bEnable \b IN : Enable/Disable
2640 /// -FALSE(0): Disable display one field.
2641 /// -TRUE(1): Enable display one field.
2642 /// @return -The result of command display one field.
2643 //-----------------------------------------------------------------------------
MDrv_HVD_SetDispOneField(MS_BOOL bEnable)2644 HVD_Result MDrv_HVD_SetDispOneField(MS_BOOL bEnable )
2645 {
2646 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
2647 HVD_MSG_TRACE();
2648 _DRV_HVD_Inited(eRet);
2649 _DRV_HVD_Entry();
2650 if( bEnable )
2651 { // force to show top field only.
2652 eRet = (HVD_Result)HAL_HVD_SetCmd(E_HVD_CMD_DISP_ONE_FIELD, E_HVD_FIELD_CTRL_TOP);
2653 }
2654 else
2655 {
2656 eRet = (HVD_Result)HAL_HVD_SetCmd(E_HVD_CMD_DISP_ONE_FIELD, E_HVD_FIELD_CTRL_OFF);
2657 }
2658 _DRV_HVD_Return(eRet );
2659 }
2660
2661 //-----------------------------------------------------------------------------
2662 /// @brief \b Function \b Name: MDrv_HVD_SetISREvent()
2663 /// @brief \b Function \b Description: Set the ISR event type sended by HVD fw.
2664 /// @param -u32Event \b IN : event types
2665 /// @param -fnISRHandler \b IN : function pointer to a interrupt handler.
2666 /// @return -The result of command set ISR event.
2667 //-----------------------------------------------------------------------------
MDrv_HVD_SetISREvent(MS_U32 u32Event,HVD_InterruptCb fnISRHandler)2668 HVD_Result MDrv_HVD_SetISREvent(MS_U32 u32Event, HVD_InterruptCb fnISRHandler)
2669 {
2670 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
2671 HVD_MSG_TRACE();
2672 _DRV_HVD_Inited(eRet);
2673 _DRV_HVD_Entry();
2674 if( u32Event == E_HVD_ISR_NONE )
2675 {
2676 gHVDCtrl.Settings.bEnISR = FALSE;
2677 HAL_HVD_EnableISR(FALSE);
2678 OSAL_HVD_ISR_Disable();
2679 OSAL_HVD_ISR_Detach();
2680 gHVDISRCtrl.bRegISR = FALSE;
2681 gHVDISRCtrl.pfnISRCallBack = NULL;
2682 gHVDCtrl.Settings.u32IsrEvent = (MS_U32)E_HVD_ISR_NONE;
2683 eRet = E_HVD_OK;
2684 }
2685 else
2686 {
2687 if(fnISRHandler != NULL)
2688 {
2689 #if 1 //If ISR handler has been registerred, we only need to reset event flag.
2690 if( gHVDISRCtrl.bRegISR )
2691 {
2692 gHVDISRCtrl.pfnISRCallBack = (HVD_ISRCallBack)fnISRHandler;
2693 eRet = (HVD_Result)HAL_HVD_SetCmd(E_HVD_CMD_ISR_TYPE, u32Event);
2694 if( eRet != E_HVD_OK)
2695 {
2696 _DRV_HVD_Return(eRet);
2697 }
2698 gHVDCtrl.Settings.u32IsrEvent = u32Event;
2699 eRet = E_HVD_OK;
2700 }
2701 else
2702 {
2703 gHVDISRCtrl.pfnISRCallBack = (HVD_ISRCallBack)fnISRHandler;
2704 OSAL_HVD_ISR_Attach( (void*)_DRV_HVD_ISRHandler );
2705 OSAL_HVD_ISR_Enable();
2706 HVD_MSG_INFO("attach ISR number:%d\n" , HVD_ISR_VECTOR);
2707 eRet = (HVD_Result)HAL_HVD_SetCmd(E_HVD_CMD_ISR_TYPE, u32Event);
2708 if(eRet != E_HVD_OK)
2709 {
2710 _DRV_HVD_Return(eRet );
2711 }
2712 gHVDCtrl.Settings.u32IsrEvent = u32Event;
2713 gHVDCtrl.Settings.bEnISR = TRUE;
2714 HAL_HVD_EnableISR(TRUE);
2715 gHVDISRCtrl.bRegISR=TRUE;
2716 eRet = E_HVD_OK;
2717 }
2718 #else
2719 HAL_HVD_EnableISR(FALSE);
2720 if( gHVDISRCtrl.bRegISR )
2721 {
2722 OSAL_HVD_ISR_Detach();
2723 gHVDISRCtrl.bRegISR=FALSE;
2724 }
2725 gHVDISRCtrl.pfnISRCallBack = (HVD_ISRCallBack)fnISRHandler;
2726 OSAL_HVD_ISR_Attach( (void*)_DRV_HVD_ISRHandler );
2727 OSAL_HVD_ISR_Enable();
2728 /*
2729 {
2730 MS_U32 i=0;
2731 for( i=0;i<68;i++ )
2732 {
2733 MsOS_AttachInterrupt( i , (void*)_DRV_HVD_ISRHandler );//(InterruptCb)fnISRHandler );
2734 MsOS_EnableInterrupt(i);
2735 }
2736 }
2737 */
2738 HVD_MSG_INFO("attach ISR number:%d\n" , HVD_ISR_VECTOR);
2739 eRet = (HVD_Result)HAL_HVD_SetCmd(E_HVD_CMD_ISR_TYPE, u32Event);
2740 gHVDCtrl.Settings.u32IsrEvent = u32Event;
2741 if( eRet != E_HVD_OK)
2742 {
2743 _DRV_HVD_Return(eRet );
2744 }
2745 HAL_HVD_EnableISR(TRUE);
2746 gHVDISRCtrl.bRegISR=TRUE;
2747 eRet = E_HVD_OK;
2748 #endif
2749 }
2750 else
2751 {
2752 HVD_MSG_ERR( "HVD DrvErr: SetISREvent with NULL pointer. ISR type:%lu\n", u32Event);
2753 eRet = E_HVD_RET_INVALID_PARAMETER;
2754 }
2755 }
2756 _DRV_HVD_Return(eRet);
2757 }
2758
2759 //-----------------------------------------------------------------------------
2760 /// @brief \b Function \b Name: MDrv_HVD_SetEnableISR()
2761 /// @brief \b Function \b Description: Enable/Disable HVD interrupt.
2762 /// @param -bEnable \b IN : Enable/Disable
2763 /// -FALSE(0): Disable interrupt.
2764 /// -TRUE(1): Enable interrupt.
2765 /// @return -The result of command set enable ISR.
2766 //-----------------------------------------------------------------------------
MDrv_HVD_SetEnableISR(MS_BOOL bEnable)2767 MS_BOOL MDrv_HVD_SetEnableISR(MS_BOOL bEnable)
2768 {
2769 HVD_MSG_TRACE();
2770 _DRV_HVD_Inited(FALSE);
2771 HAL_HVD_EnableISR(bEnable);
2772 gHVDCtrl.Settings.bEnISR=bEnable;
2773 return TRUE;
2774 }
2775
2776 //-----------------------------------------------------------------------------
2777 /// @brief \b Function \b Name: MDrv_HVD_SetForceISR()
2778 /// @brief \b Function \b Description: test the HVD interrupt function. Force FW send one interrupt.
2779 /// @param -bEnable \b IN : Enable/Disable
2780 /// -FALSE(0): Clear force interrupt status from HK.
2781 /// -TRUE(1): force one interrupt from HK.
2782 /// @return -The result of command set force ISR.
2783 //-----------------------------------------------------------------------------
MDrv_HVD_SetForceISR(MS_BOOL bEnable)2784 MS_BOOL MDrv_HVD_SetForceISR(MS_BOOL bEnable)
2785 {
2786 HVD_MSG_TRACE();
2787 _DRV_HVD_Inited(FALSE);
2788 HAL_HVD_SetForceISR( bEnable);
2789 return TRUE;
2790 }
2791
2792 //-----------------------------------------------------------------------------
2793 /// @brief \b Function \b Name: MDrv_HVD_SetMVOPDone()
2794 /// @brief \b Function \b Description: tell FW MVOP is ready for futher decode.
2795 /// @return -The result of command.
2796 //-----------------------------------------------------------------------------
MDrv_HVD_SetMVOPDone(void)2797 MS_BOOL MDrv_HVD_SetMVOPDone(void)
2798 {
2799 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
2800
2801 HVD_MSG_TRACE();
2802 _DRV_HVD_Inited(FALSE);
2803
2804 eRet = (HVD_Result) HAL_HVD_SetCmd(E_HVD_CMD_BLUE_SCREEN, FALSE);
2805
2806 if (E_HVD_OK == eRet)
2807 {
2808 return TRUE;
2809 }
2810 else
2811 {
2812 return FALSE;
2813 }
2814 }
2815
2816 //-----------------------------------------------------------------------------
2817 /// @brief \b Function \b Name: MDrv_HVD_SetVirtualBox()
2818 /// @brief \b Function \b Description: Set DS width and Height to F/W
2819 /// @param -u16Width \b IN : frame width
2820 /// @param -u16Height \b IN : frame height
2821 //-----------------------------------------------------------------------------
MDrv_HVD_SetVirtualBox(MS_U16 u16Width,MS_U16 u16Height)2822 HVD_Result MDrv_HVD_SetVirtualBox(MS_U16 u16Width, MS_U16 u16Height)
2823 {
2824 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
2825 HVD_MSG_TRACE();
2826 _DRV_HVD_Inited(eRet);
2827 _DRV_HVD_Entry();
2828 HAL_HVD_SetData(E_HVD_SDATA_VIRTUAL_BOX_WIDTH, u16Width);
2829 HAL_HVD_SetData(E_HVD_SDATA_VIRTUAL_BOX_HEIGHT, u16Height);
2830 eRet = E_HVD_OK;
2831 _DRV_HVD_Return(eRet );
2832 }
2833
2834 //-----------------------------------------------------------------------------
2835 /// @brief \b Function \b Name: MDrv_HVD_SetDynScalingParam()
2836 /// @brief \b Function \b Description: Pass scalar parameters to decoder
2837 /// @return -The result of command.
2838 //-----------------------------------------------------------------------------
MDrv_HVD_SetDynScalingParam(void * pStAddr,MS_U32 u32Size)2839 HVD_Result MDrv_HVD_SetDynScalingParam( void *pStAddr , MS_U32 u32Size )
2840 {
2841 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
2842 MS_U32 addr = 0;
2843
2844 HVD_MSG_TRACE();
2845 _DRV_HVD_Inited(eRet);
2846 _DRV_HVD_Entry();
2847 if( (pStAddr == NULL ) || (u32Size==0) )
2848 {
2849 eRet = E_HVD_RET_INVALID_PARAMETER;
2850 _DRV_HVD_Inited(eRet);
2851 }
2852 else
2853 {
2854 // 1. copy data input data array
2855 addr = MDrv_HVD_GetDynamicScalingInfo(E_HVD_DS_INFO_ADDR);
2856 HVD_memcpy(MS_PA2KSEG1(addr), pStAddr, u32Size);
2857
2858 // 2. while till FW finish it.
2859 eRet = (HVD_Result)HAL_HVD_SetCmd(E_HVD_CMD_SCALER_INFO_NOTIFY, ((MS_U8 *)pStAddr)[0]);
2860 }
2861 _DRV_HVD_Return(eRet );
2862 }
2863
2864 //-----------------------------------------------------------------------------
2865 /// @brief \b Function \b Name: MDrv_HVD_SetDispInfoTH()
2866 /// @brief \b Function \b Description: Set the upper and lower limitation of a valid SPS.
2867 /// @param -DispInfoTH \b IN : tolerance.
2868 /// @return -The result of command set display inforation threshold
2869 //-----------------------------------------------------------------------------
MDrv_HVD_SetDispInfoTH(HVD_Disp_Info_Threshold * DispInfoTH)2870 HVD_Result MDrv_HVD_SetDispInfoTH(HVD_Disp_Info_Threshold* DispInfoTH )
2871 {
2872 HVD_Disp_Info_TH DispInfoTHTmp;
2873 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
2874
2875 HVD_MSG_TRACE();
2876 _DRV_HVD_Inited(eRet);
2877 _DRV_HVD_Entry();
2878 if( DispInfoTH ==NULL)
2879 {
2880 _DRV_HVD_Return(eRet);
2881 }
2882 DispInfoTHTmp.u32FrmrateLowBound=DispInfoTH->u32FrmrateLowBound;
2883 DispInfoTHTmp.u32FrmrateUpBound=DispInfoTH->u32FrmrateUpBound;
2884 DispInfoTHTmp.u32MvopLowBound=DispInfoTH->u32MvopLowBound;
2885 DispInfoTHTmp.u32MvopUpBound=DispInfoTH->u32MvopUpBound;
2886 HAL_HVD_SetData( E_HVD_SDATA_DISP_INFO_TH , (MS_U32)(&DispInfoTHTmp) );
2887 eRet = (HVD_Result)HAL_HVD_SetCmd(E_HVD_CMD_UPDATE_DISP_THRESHOLD, 0);
2888 HVD_memcpy((void*)&(gHVDCtrl.Settings.DispInfoTH), (void*)(DispInfoTH), sizeof(HVD_Disp_Info_Threshold) );
2889 _DRV_HVD_Return(eRet );
2890 }
2891
2892 //-----------------------------------------------------------------------------
2893 /// @brief \b Function \b Name: MDrv_HVD_SetIgnoreErrRef()
2894 /// @brief \b Function \b Description: Turn on / off ignore error reference.
2895 /// @param -b bFastDisplay \b IN : Enable/ Disable
2896 /// -FALSE(0): handle error reference
2897 /// -TRUE(1): ignore error reference
2898 /// @return -The result of command set ignore error reference
2899 //-----------------------------------------------------------------------------
MDrv_HVD_SetIgnoreErrRef(MS_BOOL bIgnore)2900 HVD_Result MDrv_HVD_SetIgnoreErrRef(MS_BOOL bIgnore)
2901 {
2902 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
2903 HVD_MSG_TRACE();
2904 _DRV_HVD_Inited(eRet);
2905 _DRV_HVD_Entry();
2906 eRet = (HVD_Result) HAL_HVD_SetCmd(E_HVD_CMD_IGNORE_ERR_REF, bIgnore);
2907 _DRV_HVD_Return(eRet);
2908 }
2909
2910 //-----------------------------------------------------------------------------
2911 /// @brief \b Function \b Name: MDrv_HVD_ForceFollowDTVSpec()
2912 /// @brief \b Function \b Description: Turn on / off Force follow DTV Spec
2913 /// @param -b bEnable \b IN : Enable/ Disable
2914 /// -FALSE(0): Disable
2915 /// -TRUE(1): Enable
2916 /// @return -The result of command set force follow DTV spec
2917 //-----------------------------------------------------------------------------
MDrv_HVD_ForceFollowDTVSpec(MS_BOOL bEnable)2918 HVD_Result MDrv_HVD_ForceFollowDTVSpec(MS_BOOL bEnable)
2919 {
2920 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
2921 HVD_MSG_TRACE();
2922 _DRV_HVD_Inited(eRet);
2923 _DRV_HVD_Entry();
2924 eRet = (HVD_Result) HAL_HVD_SetCmd(E_HVD_CMD_FORCE_DTV_SPEC, bEnable);
2925 _DRV_HVD_Return(eRet);
2926 }
2927
2928 //-----------------------------------------------------------------------------
2929 /// @brief \b Function \b Name: MDrv_HVD_SetFastDisplay()
2930 /// @brief \b Function \b Description: Turn on / off fast display.
2931 /// @param -b bFastDisplay \b IN : Enable/ Disable
2932 /// -FALSE(0): normal display
2933 /// -TRUE(1): fast display
2934 /// @return -The result of command set fast display
2935 //-----------------------------------------------------------------------------
MDrv_HVD_SetFastDisplay(MS_BOOL bFastDisplay)2936 HVD_Result MDrv_HVD_SetFastDisplay(MS_BOOL bFastDisplay)
2937 {
2938 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
2939 HVD_MSG_TRACE();
2940 _DRV_HVD_Inited(eRet);
2941 _DRV_HVD_Entry();
2942 eRet = (HVD_Result) HAL_HVD_SetCmd(E_HVD_CMD_FAST_DISP, bFastDisplay);
2943 _DRV_HVD_Return(eRet);
2944 }
2945 // check status
2946
2947 //-----------------------------------------------------------------------------
2948 /// @brief \b Function \b Name: MDrv_HVD_IsISROccured()
2949 /// @brief \b Function \b Description: Check if the ISR is occured or not.
2950 /// @return - Is occured or not
2951 /// @retval -FALSE(0): interrupt is not occured.
2952 /// @retval -TRUE(1): interrupt has been occured.
2953 //-----------------------------------------------------------------------------
MDrv_HVD_IsISROccured(void)2954 MS_BOOL MDrv_HVD_IsISROccured(void)
2955 {
2956 HVD_MSG_TRACE();
2957 _DRV_HVD_Inited(FALSE);
2958 return HAL_HVD_IsISROccured();
2959 }
2960
2961 //-----------------------------------------------------------------------------
2962 /// @brief \b Function \b Name: MDrv_HVD_IsDispFinish()
2963 /// @brief \b Function \b Description: Check this file mode display is finish or not. only work after MDrv_HVD_SetDataEnd(TRUE)
2964 /// @return - Is finish or not
2965 /// @retval -FALSE(0): Not finish or Not in file mode playback
2966 /// @retval -TRUE(1): Display Finished.
2967 //-----------------------------------------------------------------------------
MDrv_HVD_IsDispFinish(void)2968 MS_BOOL MDrv_HVD_IsDispFinish(void)
2969 {
2970 HVD_MSG_TRACE();
2971 _DRV_HVD_Inited(FALSE);
2972
2973 if( (gHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK) == HVD_INIT_MAIN_LIVE_STREAM)
2974 {
2975 return FALSE;
2976 }
2977
2978 if( gHVDCtrl.u32CtrlMode & HVD_CTRL_DATA_END)
2979 {
2980 if( _DRV_HVD_IsAllBufferEmpty() )
2981 {
2982 return TRUE;
2983 }
2984 else
2985 {
2986 //_DRV_HVD_PushDummy();
2987 return FALSE;
2988 }
2989 }
2990 else
2991 {
2992 return FALSE;
2993 }
2994 }
2995
2996 //-----------------------------------------------------------------------------
2997 /// @brief \b Function \b Name: MDrv_HVD_IsFrameShowed()
2998 /// @brief \b Function \b Description: Is HVD Frame showed after TriggerDisp(TRUE) or first frame showed
2999 /// @return - Is frame showed or not
3000 /// @retval -FALSE(0): New Framed showed
3001 /// @retval -TRUE(1): Not showed
3002 //-----------------------------------------------------------------------------
MDrv_HVD_IsFrameShowed(void)3003 MS_BOOL MDrv_HVD_IsFrameShowed(void)
3004 {
3005 HVD_MSG_TRACE();
3006 _DRV_HVD_Inited(FALSE);
3007
3008 if( !HAL_HVD_GetData(E_HVD_GDATA_IS_1ST_FRM_RDY) )
3009 {// 1st frame not ready or AV sync not ready
3010 return FALSE;
3011 }
3012 else
3013 {// 1st frame showed or AV sync ready
3014 if( _DRV_HVD_Ctrl( HVD_CTRL_DISPLAY_CTRL))
3015 { // control display
3016 return (MS_BOOL)HAL_HVD_GetData(E_HVD_GDATA_IS_FRAME_SHOWED);
3017 }
3018 else
3019 { // cotrol decode
3020 return TRUE;
3021 }
3022 }
3023 }
3024
3025 //-----------------------------------------------------------------------------
3026 /// @brief \b Function \b Name: MDrv_HVD_IsStepDecodeDone()
3027 /// @brief \b Function \b Description: Is HVD step decode done after step decode command.
3028 /// @return - TRUE/FALSE
3029 /// @retval -FALSE(0): decoding, or user did not send corresponding step decode command.
3030 /// @retval -TRUE(1): decode done
3031 //-----------------------------------------------------------------------------
MDrv_HVD_IsStepDecodeDone(void)3032 MS_BOOL MDrv_HVD_IsStepDecodeDone(void)
3033 {
3034 MS_BOOL bRet=FALSE;
3035 HVD_MSG_TRACE();
3036 _DRV_HVD_Inited(FALSE);
3037
3038 if( gHVDCtrl.bStepDecoding)
3039 {
3040 if( gHVDCtrl.u32StepDecodeCnt != HAL_HVD_GetData(E_HVD_GDATA_DECODE_CNT) )
3041 {
3042 gHVDCtrl.u32StepDecodeCnt = 0;
3043 bRet= TRUE;
3044 gHVDCtrl.bStepDecoding=FALSE;
3045 }
3046 }
3047 return bRet;
3048 }
3049
3050 //-----------------------------------------------------------------------------
3051 /// @brief \b Function \b Name: MDrv_HVD_CheckDispInfoRdy()
3052 /// @brief \b Function \b Description: check display info ready and correct or not
3053 /// @return -The result of command check display infor ready or not
3054 //-----------------------------------------------------------------------------
MDrv_HVD_CheckDispInfoRdy(void)3055 HVD_Result MDrv_HVD_CheckDispInfoRdy(void)
3056 {
3057 MS_U32 u32ErrCode=0;
3058 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
3059 HVD_MSG_TRACE();
3060 _DRV_HVD_Inited(eRet);
3061
3062 if( !( gHVDCtrl.u32CtrlMode & HVD_CTRL_DISP_INFO_RDY) )
3063 {
3064 if( !HAL_HVD_GetData(E_HVD_GDATA_IS_DISP_INFO_CHANGE) )
3065 {
3066 return E_HVD_RET_NOTREADY;
3067 }
3068 else
3069 {
3070 gHVDCtrl.bIsDispInfoChg=TRUE;
3071 _DRV_HVD_SetCtrl(HVD_CTRL_DISP_INFO_RDY);
3072 }
3073 }
3074 // check if FW report error
3075 u32ErrCode = HAL_HVD_GetData(E_HVD_GDATA_ERROR_CODE);
3076 if( u32ErrCode != 0 )
3077 {
3078 if( u32ErrCode == E_HVD_ERR_OUT_OF_MEMORY)
3079 {
3080 HVD_MSG_ERR("HVD Err: FW error that Out of Memory:%lx. Allocated frame buffer size is smaller than required.\n" , u32ErrCode );
3081 gHVDCtrl.bIsDispInfoChg=FALSE;
3082 return E_HVD_RET_OUTOF_MEMORY;
3083 }
3084 }
3085 //>> move to FW
3086 #if 0
3087 if( (gHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_HW_MASK) == HVD_INIT_HW_AVC )
3088 {
3089 MS_U32 u32MaxFS = 0, u32FS = 0;
3090 MS_U8 u8LevelIdc = HAL_HVD_GetData(E_HVD_GDATA_AVC_LEVEL_IDC);
3091 MS_U32 u32Width, u32Height;
3092 HVD_Display_Info *pDispInfo = (HVD_Display_Info *)HAL_HVD_GetData(E_HVD_GDATA_DISP_INFO_ADDR);
3093 u32Height = pDispInfo->u16VerSize;
3094 u32Width = pDispInfo->u16VerSize;
3095 u32FS = (u32Width / 16) * (u32Height / 16);
3096
3097 switch(u8LevelIdc)
3098 {
3099 case 10:
3100 u32MaxFS = 99;
3101 break;
3102 case 11:
3103 case 12:
3104 case 13:
3105 case 20:
3106 u32MaxFS = 396;
3107 break;
3108 case 21:
3109 u32MaxFS = 792;
3110 break;
3111 case 22:
3112 case 30:
3113 u32MaxFS = 1620;
3114 break;
3115 case 31:
3116 u32MaxFS = 3600;
3117 break;
3118 case 32:
3119 u32MaxFS = 5120;
3120 break;
3121 case 40:
3122 case 41:
3123 u32MaxFS = 8192;
3124 break;
3125 case 42:
3126 u32MaxFS = 8704;
3127 break;
3128 case 50:
3129 u32MaxFS = 22080;
3130 break;
3131 case 51:
3132 u32MaxFS = 36864;
3133 break;
3134 default:
3135 u32MaxFS = 0xFFFFFFFF;
3136 break;
3137 }
3138
3139 if(u32FS > u32MaxFS)
3140 {
3141 HVD_MSG_DEG("HVD Err : SPS over spec,level = %d u32FS = %lu u32MaxFS = %lu\n", u8LevelIdc , u32FS, u32MaxFS);
3142 gHVDCtrl.bIsDispInfoChg=FALSE;
3143 return E_HVD_RET_UNSUPPORTED;
3144 }
3145 }
3146 #endif
3147 return E_HVD_OK;
3148 }
3149
3150 //-----------------------------------------------------------------------------
3151 /// @brief \b Function \b Name: MDrv_HVD_IsDispInfoChg()
3152 /// @brief \b Function \b Description: check display info is changed or not
3153 /// @return - TRUE / FALSE
3154 /// @retval -FALSE(0): not changed
3155 /// @retval -TRUE(1): changed
3156 //-----------------------------------------------------------------------------
MDrv_HVD_IsDispInfoChg(void)3157 MS_BOOL MDrv_HVD_IsDispInfoChg(void)
3158 {
3159 MS_BOOL bRet=FALSE;
3160 HVD_MSG_TRACE();
3161 _DRV_HVD_Inited(FALSE);
3162
3163 bRet = (MS_BOOL)HAL_HVD_GetData(E_HVD_GDATA_IS_DISP_INFO_CHANGE);
3164 if( bRet )
3165 {
3166 gHVDCtrl.bIsDispInfoChg = TRUE;
3167 _DRV_HVD_SetCtrl(HVD_CTRL_DISP_INFO_RDY);
3168 }
3169 #if 0 // debug use
3170 {
3171 static MS_U32 u32DecodeCnt=0;
3172 static MS_U32 u32IdleCnt=0;
3173 MS_U32 tmp =0 ;
3174 tmp = MDrv_HVD_GetDecodeCnt();
3175 if( u32DecodeCnt != tmp )
3176 {
3177 printf( "%lu decode cnt:%lx PTS:%lx\n" , (MS_U32)bRet ,tmp , MDrv_HVD_GetPTS() );
3178 u32DecodeCnt =tmp;
3179 }
3180 else
3181 {
3182 u32IdleCnt++;
3183 }
3184 if( u32IdleCnt > 1000)
3185 {
3186 printf( "HVD: seems IDLE: %lu decode cnt:%lx PTS:%lx\n" , (MS_U32)bRet ,tmp , MDrv_HVD_GetPTS() );
3187 u32IdleCnt=0;
3188 }
3189 }
3190 #endif
3191 return bRet;
3192 }
3193
3194 //-----------------------------------------------------------------------------
3195 /// @brief \b Function \b Name: MDrv_HVD_IsIdle()
3196 /// @brief \b Function \b Description: check decoder is idle or not
3197 /// @return - TRUE / FALSE
3198 /// @retval -FALSE(0): decoder is not idle
3199 /// @retval -TRUE(1): decoder is idle
3200 //-----------------------------------------------------------------------------
MDrv_HVD_IsIdle(void)3201 MS_BOOL MDrv_HVD_IsIdle(void)
3202 {
3203 HVD_MSG_TRACE();
3204 _DRV_HVD_Inited(FALSE);
3205
3206 if( HAL_HVD_GetData(E_HVD_GDATA_VPU_IDLE_CNT) > HVD_FW_IDLE_THRESHOLD )
3207 {
3208 return TRUE;
3209 }
3210 else
3211 {
3212 return FALSE;
3213 }
3214 }
3215
3216 //-----------------------------------------------------------------------------
3217 /// @brief \b Function \b Name: MDrv_HVD_IsSyncStart()
3218 /// @brief \b Function \b Description: check decoder starts to do sync action(drop or repeat) or not.
3219 /// @return - TRUE / FALSE
3220 /// @retval -FALSE(0): decoder is not doing sync action
3221 /// @retval -TRUE(1): decoder is doing sync action
3222 //-----------------------------------------------------------------------------
MDrv_HVD_IsSyncStart(void)3223 MS_BOOL MDrv_HVD_IsSyncStart(void)
3224 {
3225 HVD_MSG_TRACE();
3226 _DRV_HVD_Inited(FALSE);
3227
3228 if( (MS_BOOL)MDrv_HVD_GetPlayMode(E_HVD_GMODE_IS_SYNC_ON) == FALSE)
3229 {
3230 return FALSE;
3231 }
3232 if( HAL_HVD_GetData(E_HVD_GDATA_IS_SYNC_START) )
3233 {
3234 return TRUE;
3235 }
3236 else
3237 {
3238 return FALSE;
3239 }
3240 }
3241
3242 //-----------------------------------------------------------------------------
3243 /// @brief \b Function \b Name: MDrv_HVD_IsSyncReach()
3244 /// @brief \b Function \b Description: The distance of Video time stamp and STC is closed enough.
3245 /// @return - TRUE / FALSE
3246 /// @retval -FALSE(0): The distance is not shorter than sync tolerance.
3247 /// @retval -TRUE(1): The distance is shorter than sync tolerance.
3248 //-----------------------------------------------------------------------------
MDrv_HVD_IsSyncReach(void)3249 MS_BOOL MDrv_HVD_IsSyncReach(void)
3250 {
3251 HVD_MSG_TRACE();
3252 _DRV_HVD_Inited(FALSE);
3253
3254 if( (MS_BOOL)MDrv_HVD_GetPlayMode(E_HVD_GMODE_IS_SYNC_ON) == FALSE)
3255 {
3256 return FALSE;
3257 }
3258
3259 if( HAL_HVD_GetData(E_HVD_GDATA_IS_SYNC_REACH) )
3260 {
3261 return TRUE;
3262 }
3263 else
3264 {
3265 return FALSE;
3266 }
3267 }
3268
3269 //-----------------------------------------------------------------------------
3270 /// @brief \b Function \b Name: MDrv_HVD_IsLowDelay()
3271 /// @brief \b Function \b Description: check if current stream has low delay flag in SPS.
3272 /// @return - TRUE / FALSE
3273 /// @retval -FALSE(0): Low delay flag not found.
3274 /// @retval -TRUE(1): Low delay flag found.
3275 //-----------------------------------------------------------------------------
MDrv_HVD_IsLowDelay(void)3276 MS_BOOL MDrv_HVD_IsLowDelay(void)
3277 {
3278 HVD_MSG_TRACE();
3279 _DRV_HVD_Inited(FALSE);
3280
3281 if( HAL_HVD_GetData(E_HVD_GDATA_AVC_LOW_DELAY) )
3282 {
3283 return TRUE;
3284 }
3285 else
3286 {
3287 return FALSE;
3288 }
3289 }
3290
3291 //-----------------------------------------------------------------------------
3292 /// @brief \b Function \b Name: MDrv_HVD_IsIFrmFound()
3293 /// @brief \b Function \b Description: check if I frame found after Init() or flush().
3294 /// @return - TRUE / FALSE
3295 /// @retval -FALSE(0): I frame is not found.
3296 /// @retval -TRUE(1): I frame has been found.
3297 //-----------------------------------------------------------------------------
MDrv_HVD_IsIFrmFound(void)3298 MS_BOOL MDrv_HVD_IsIFrmFound(void)
3299 {
3300 HVD_MSG_TRACE();
3301 _DRV_HVD_Inited(FALSE);
3302
3303 if( HAL_HVD_GetData(E_HVD_GDATA_IS_I_FRM_FOUND) )
3304 {
3305 return TRUE;
3306 }
3307 else
3308 {
3309 return FALSE;
3310 }
3311 }
3312
3313 //-----------------------------------------------------------------------------
3314 /// @brief \b Function \b Name: MDrv_HVD_Is1stFrmRdy()
3315 /// @brief \b Function \b Description: check if first frame showed on screen after Init() or flush().
3316 /// @return - TRUE / FALSE
3317 /// @retval -FALSE(0): First frame is not showed.
3318 /// @retval -TRUE(1): First frame is showed.
3319 //-----------------------------------------------------------------------------
MDrv_HVD_Is1stFrmRdy(void)3320 MS_BOOL MDrv_HVD_Is1stFrmRdy(void)
3321 {
3322 HVD_MSG_TRACE();
3323 _DRV_HVD_Inited(FALSE);
3324
3325 if( HAL_HVD_GetData(E_HVD_GDATA_IS_1ST_FRM_RDY) )
3326 {
3327 return TRUE;
3328 }
3329 else
3330 {
3331 return FALSE;
3332 }
3333 }
3334
3335 //-----------------------------------------------------------------------------
3336 /// @brief \b Function \b Name: MDrv_HVD_IsAllBufferEmpty()
3337 /// @brief \b Function \b Description: check if all of the buffers(display, decoded, BBU, bitstream) are empty.
3338 /// @return - TRUE / FALSE
3339 /// @retval -FALSE(0): Not Empty.
3340 /// @retval -TRUE(1): Empty.
3341 //-----------------------------------------------------------------------------
MDrv_HVD_IsAllBufferEmpty(void)3342 MS_BOOL MDrv_HVD_IsAllBufferEmpty(void)
3343 {
3344 //HVD_MSG_TRACE();
3345 _DRV_HVD_Inited(FALSE);
3346
3347 if( _DRV_HVD_IsAllBufferEmpty() )
3348 {
3349 return TRUE;
3350 }
3351 else
3352 {
3353 return FALSE;
3354 }
3355 #if 0
3356 if( u32Times > 200 )
3357 {
3358 HVD_MSG_INFO("HVD Info: Flush() timeout failed:BBU:%lu Dec:%lu Disp:%lu Idle:%lu ESr:%lx ESw:%lx \n" ,
3359 HAL_HVD_GetData(E_HVD_GDATA_BBU_Q_NUMB) ,
3360 HAL_HVD_GetData(E_HVD_GDATA_DEC_Q_NUMB),
3361 HAL_HVD_GetData(E_HVD_GDATA_DISP_Q_NUMB),
3362 HAL_HVD_GetData(E_HVD_GDATA_VPU_IDLE_CNT),
3363 HAL_HVD_GetData( E_HVD_GDATA_ES_READ_PTR),
3364 HAL_HVD_GetData( E_HVD_GDATA_ES_WRITE_PTR) );
3365 eRet = E_HVD_FAIL;
3366 break;
3367 }
3368 return TRUE;
3369 #endif
3370 }
3371
3372 // get infomation
3373
3374 //-----------------------------------------------------------------------------
3375 /// @brief \b Function \b Name: MDrv_HVD_GetBBUVacancy()
3376 /// @brief \b Function \b Description: get the vacancy of BBU queue.
3377 /// @return - TRUE / FALSE
3378 /// @retval -0: queue is full.
3379 /// @retval -not zero: queue is not full.
3380 //-----------------------------------------------------------------------------
MDrv_HVD_GetBBUVacancy(void)3381 MS_U32 MDrv_HVD_GetBBUVacancy(void)
3382 {
3383 MS_U32 u32BBUQnumb=0;
3384 MS_U32 u32BBUTotal=0;
3385 MS_U32 u32PTSQnumb=0;
3386 HVD_MSG_TRACE();
3387 _DRV_HVD_Inited(FALSE);
3388 u32BBUTotal = HAL_HVD_GetData(E_HVD_GDATA_FW_BBU_TOTAL_TBL_ENTRY);
3389 u32BBUQnumb = HAL_HVD_GetData(E_HVD_GDATA_BBU_Q_NUMB);
3390 if( u32BBUTotal <= u32BBUQnumb )
3391 {
3392 //HVD_MSG_ERR("HVD err: GetBBUVacancy has error that total number(%lx) is smaller than current number(%lx)\n" , u32BBUTotal, u32BBUQnumb);
3393 u32BBUQnumb=0;
3394 }
3395 else
3396 {
3397 u32BBUQnumb = u32BBUTotal - u32BBUQnumb;
3398 }
3399 if( u32BBUQnumb )
3400 {
3401 u32BBUTotal=HAL_HVD_GetData(E_HVD_GDATA_FW_PTS_TOTAL_ENTRY_NUMB) - 1; // add -1 for full case
3402 u32PTSQnumb=HAL_HVD_GetData(E_HVD_GDATA_PTS_Q_NUMB);
3403 if( u32BBUTotal <= u32PTSQnumb )
3404 {
3405 HVD_MSG_DEG("HVD Warn: GetBBUVacancy has error that total PTS Q number(%lx) is smaller than current PTS Q number(%lx)\n" , u32BBUTotal, u32PTSQnumb);
3406 u32BBUQnumb=0;
3407 }
3408 }
3409 return u32BBUQnumb;
3410 }
3411
3412 //-----------------------------------------------------------------------------
3413 /// @brief \b Function \b Name: MDrv_HVD_GetDispInfo()
3414 /// @brief \b Function \b Description: Get video display information
3415 /// @param -pinfo \b OUT : pointer to video display information.
3416 /// @return -The result of command get display information
3417 //-----------------------------------------------------------------------------
MDrv_HVD_GetDispInfo(HVD_Disp_Info * pinfo)3418 HVD_Result MDrv_HVD_GetDispInfo( HVD_Disp_Info *pinfo )
3419 {
3420 HVD_Result eRet = E_HVD_FAIL;
3421 eRet = _DRV_HVD_GetDispInfo(pinfo, TRUE);
3422
3423 #if HVD_ENABLE_RV_FEATURE
3424 if(E_HVD_OK == eRet)
3425 {
3426 if(HVD_INIT_HW_RM == (gHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_HW_MASK))
3427 { //RM is always displayed by 60 frames per sec.
3428 pinfo->u32FrameRate = 60000;
3429 HVD_MSG_DEG("rm force set 60fps\n");
3430 }
3431 }
3432 #endif
3433 return eRet;
3434 }
3435
3436 //-----------------------------------------------------------------------------
3437 /// @brief \b Function \b Name: MDrv_HVD_GetPtsStcDiff()
3438 /// @brief \b Function \b Description: Get the difference of PTS and STC
3439 /// @return - PTS
3440 //-----------------------------------------------------------------------------
MDrv_HVD_GetPtsStcDiff(void)3441 MS_S64 MDrv_HVD_GetPtsStcDiff(void)
3442 {
3443 MS_S64 s64PTS = 0;
3444
3445 _DRV_HVD_Inited(FALSE);
3446
3447 s64PTS = HAL_HVD_GetData_EX(E_HVD_GDATA_PTS_STC_DIFF);
3448
3449 return s64PTS;
3450 }
3451
3452 //-----------------------------------------------------------------------------
3453 /// @brief \b Function \b Name: MDrv_HVD_GetPTS()
3454 /// @brief \b Function \b Description: get the pts of current displayed video frame. unit: ms
3455 /// @return - PTS
3456 //-----------------------------------------------------------------------------
MDrv_HVD_GetPTS(void)3457 MS_U32 MDrv_HVD_GetPTS(void)
3458 {
3459 MS_U32 u32PTS = 0;
3460 _DRV_HVD_Inited(FALSE);
3461 u32PTS = HAL_HVD_GetData(E_HVD_GDATA_PTS);
3462 return u32PTS;
3463 }
3464
3465 //-----------------------------------------------------------------------------
3466 /// @brief \b Function \b Name: MDrv_HVD_GetNextPTS()
3467 /// @brief \b Function \b Description: get the pts of next displayed video frame. unit: ms
3468 /// @return - PTS
3469 //-----------------------------------------------------------------------------
MDrv_HVD_GetNextPTS(void)3470 MS_U32 MDrv_HVD_GetNextPTS(void)
3471 {
3472 MS_U32 u32PTS = 0;
3473 _DRV_HVD_Inited(FALSE);
3474 u32PTS = HAL_HVD_GetData(E_HVD_GDATA_NEXT_PTS);
3475 return u32PTS;
3476 }
3477
3478 //-----------------------------------------------------------------------------
3479 /// @brief \b Function \b Name: MDrv_HVD_GetNextDispQPtr()
3480 /// @brief \b Function \b Description: get the pointer of next displayed video frame.
3481 /// @return - Pointer in the display queue
3482 //-----------------------------------------------------------------------------
MDrv_HVD_GetNextDispQPtr(void)3483 MS_U32 MDrv_HVD_GetNextDispQPtr(void)
3484 {
3485 MS_U32 u32Ptr = 0;
3486 _DRV_HVD_Inited(FALSE);
3487 //printf("GetNextDispQPtr DqNum=%ld, DqPtr=%ld\n", HAL_HVD_GetData(E_HVD_GDATA_DISP_Q_NUMB), HAL_HVD_GetData(E_HVD_GDATA_DISP_Q_PTR));
3488 //if (HAL_HVD_GetData(E_HVD_GDATA_DISP_Q_NUMB) != 0)
3489 {
3490 u32Ptr = HAL_HVD_GetData(E_HVD_GDATA_DISP_Q_PTR);
3491 }
3492 return u32Ptr;
3493 }
3494
3495 //-----------------------------------------------------------------------------
3496 /// @brief \b Function \b Name: MDrv_HVD_GetDataErrCnt()
3497 /// @brief \b Function \b Description: get accumulated data Error Count
3498 /// @return -data error count
3499 //-----------------------------------------------------------------------------
MDrv_HVD_GetDataErrCnt(void)3500 MS_U32 MDrv_HVD_GetDataErrCnt(void)
3501 {
3502 _DRV_HVD_Inited(FALSE);
3503 return HAL_HVD_GetData(E_HVD_GDATA_DATA_ERROR_CNT);
3504 }
3505
3506 //-----------------------------------------------------------------------------
3507 /// @brief \b Function \b Name: MDrv_HVD_GetDecErrCnt()
3508 /// @brief \b Function \b Description: get accumulated decode Error Count
3509 /// @return -decode error count
3510 //-----------------------------------------------------------------------------
MDrv_HVD_GetDecErrCnt(void)3511 MS_U32 MDrv_HVD_GetDecErrCnt(void)
3512 {
3513 _DRV_HVD_Inited(FALSE);
3514 return HAL_HVD_GetData(E_HVD_GDATA_DEC_ERROR_CNT);
3515 }
3516
3517 //-----------------------------------------------------------------------------
3518 /// @brief \b Function \b Name: MDrv_HVD_GetESWritePtr()
3519 /// @brief \b Function \b Description: Get Elementary Stream buffer write point
3520 /// @return - ES buffer write point offset from bitstream buffer base
3521 //-----------------------------------------------------------------------------
MDrv_HVD_GetESWritePtr(void)3522 MS_U32 MDrv_HVD_GetESWritePtr(void)
3523 {
3524 _DRV_HVD_Inited(FALSE);
3525 return HAL_HVD_GetData(E_HVD_GDATA_ES_WRITE_PTR);
3526 }
3527
3528 //-----------------------------------------------------------------------------
3529 /// @brief \b Function \b Name: MDrv_HVD_GetESReadPtr()
3530 /// @brief \b Function \b Description: Get Elementary Stream buffer read point
3531 /// @return - ES buffer read point offset from bitstream buffer base
3532 //-----------------------------------------------------------------------------
MDrv_HVD_GetESReadPtr(void)3533 MS_U32 MDrv_HVD_GetESReadPtr(void)
3534 {
3535 _DRV_HVD_Inited(FALSE);
3536 return HAL_HVD_GetData(E_HVD_GDATA_ES_READ_PTR);
3537 }
3538 #define FATAL_ERROR(x) ((x)==E_HVD_RETURN_OUTOF_MEMORY)
3539 //-----------------------------------------------------------------------------
3540 /// @brief \b Function \b Name: MDrv_HVD_GetErrCode()
3541 /// @brief \b Function \b Description: get error code
3542 /// @return - error code number
3543 //-----------------------------------------------------------------------------
MDrv_HVD_GetErrCode(void)3544 MS_U32 MDrv_HVD_GetErrCode(void)
3545 {
3546 // TODO: define driver error code for upper layer
3547 MS_U32 u32Ret=0;
3548 _DRV_HVD_Inited(FALSE);
3549
3550 u32Ret = HAL_HVD_GetData(E_HVD_GDATA_ERROR_CODE);
3551 #if 1
3552 if (!FATAL_ERROR(u32Ret))
3553 {
3554 HAL_HVD_SetData(E_HVD_SDATA_ERROR_CODE , 0);
3555 }
3556 #endif
3557 gHVDCtrl.u32LastErrCode = u32Ret;
3558 return u32Ret;
3559 }
3560
3561 //-----------------------------------------------------------------------------
3562 /// @brief \b Function \b Name: MDrv_HVD_GetPlayMode()
3563 /// @brief \b Function \b Description: Get current play mode status.
3564 /// @param -eMode \b IN : Mode type.
3565 /// @return - mode status
3566 //-----------------------------------------------------------------------------
MDrv_HVD_GetPlayMode(HVD_Get_Mode_Status eMode)3567 MS_U32 MDrv_HVD_GetPlayMode(HVD_Get_Mode_Status eMode)
3568 {
3569 MS_U32 u32Ret=0;
3570 HVD_MSG_TRACE();
3571 _DRV_HVD_Inited(FALSE);
3572 switch( eMode )
3573 {
3574 case E_HVD_GMODE_IS_SHOW_ERR_FRM:
3575 case E_HVD_GMODE_IS_REPEAT_LAST_FIELD:
3576 case E_HVD_GMODE_IS_ERR_CONCEAL:
3577 case E_HVD_GMODE_IS_SYNC_ON:
3578 case E_HVD_GMODE_IS_PLAYBACK_FINISH:
3579 case E_HVD_GMODE_SYNC_MODE:
3580 case E_HVD_GMODE_SKIP_MODE:
3581 case E_HVD_GMODE_DROP_MODE:
3582 case E_HVD_GMODE_DISPLAY_SPEED:
3583 case E_HVD_GMODE_FRC_MODE:
3584 // TODO: add isr type here
3585 case E_HVD_GMODE_ISR_TYPE:
3586 u32Ret=HAL_HVD_GetData( (HVD_GetData)((MS_U32)eMode+ (MS_U32)E_HVD_GDATA_IS_SHOW_ERR_FRM));
3587 break;
3588 case E_HVD_GMODE_IS_STEP_DISPLAY:
3589 u32Ret = _DRV_HVD_Ctrl(HVD_CTRL_DISPLAY_CTRL);
3590 break;
3591 case E_HVD_GMODE_STREAM_TYPE:
3592 u32Ret = gHVDCtrl.InitParams.u32ModeFlag & E_HVD_INIT_MAIN_MASK;
3593 break;
3594 default:
3595 break;
3596 }
3597 return u32Ret;
3598 }
3599
3600 //-----------------------------------------------------------------------------
3601 /// @brief \b Function \b Name: MDrv_HVD_GetPlayState()
3602 /// @brief \b Function \b Description: get current play state
3603 /// @return - play state
3604 //-----------------------------------------------------------------------------
MDrv_HVD_GetPlayState(void)3605 HVD_Get_Play_State MDrv_HVD_GetPlayState(void)
3606 {
3607 MS_U32 u32FWstate=0;
3608 HVD_Get_Play_State eRet=E_HVD_GSTATE_INIT;
3609 HVD_MSG_TRACE();
3610 _DRV_HVD_Inited(eRet);
3611 u32FWstate=HAL_HVD_GetData(E_HVD_GDATA_FW_STATE);
3612 u32FWstate &= E_HVD_FW_STATE_MASK;
3613 switch( u32FWstate )
3614 {
3615 case E_HVD_FW_INIT:
3616 eRet = E_HVD_GSTATE_INIT;
3617 break;
3618 case E_HVD_FW_PLAY:
3619 eRet = E_HVD_GSTATE_PLAY;
3620 break;
3621 case E_HVD_FW_PAUSE:
3622 eRet = E_HVD_GSTATE_PAUSE;
3623 break;
3624 case E_HVD_FW_STOP:
3625 eRet = E_HVD_GSTATE_STOP;
3626 break;
3627 default:
3628 break;
3629 }
3630 return eRet;
3631 }
3632
3633 //-----------------------------------------------------------------------------
3634 /// @brief \b Function \b Name: MDrv_HVD_GetDecodeCnt()
3635 /// @brief \b Function \b Description: get accumulated decoded frame Count
3636 /// @return - decoded frame Count
3637 //-----------------------------------------------------------------------------
MDrv_HVD_GetDecodeCnt(void)3638 MS_U32 MDrv_HVD_GetDecodeCnt(void)
3639 {
3640 //HVD_MSG_TRACE();
3641 _DRV_HVD_Inited(FALSE);
3642 return HAL_HVD_GetData(E_HVD_GDATA_DECODE_CNT);
3643 }
3644
3645 //-----------------------------------------------------------------------------
3646 /// @brief \b Function \b Name: MDrv_HVD_GetActiveFormat()
3647 /// @brief \b Function \b Description: Get current AFD ID
3648 /// @return - AFD ID, 0xFF:invalid value
3649 //-----------------------------------------------------------------------------
MDrv_HVD_GetActiveFormat(void)3650 MS_U8 MDrv_HVD_GetActiveFormat(void)
3651 {
3652 HVD_Display_Info *pDispInfo = NULL;
3653
3654 HVD_MSG_TRACE();
3655
3656 _DRV_HVD_Inited(~0);
3657
3658 if (!(gHVDCtrl.u32CtrlMode & HVD_CTRL_DISP_INFO_RDY))
3659 {
3660 return 0;
3661 }
3662
3663 pDispInfo = (HVD_Display_Info *) HAL_HVD_GetData(E_HVD_GDATA_DISP_INFO_ADDR);
3664
3665 if (pDispInfo != NULL)
3666 {
3667 return pDispInfo->u8AFD;
3668 }
3669 else
3670 {
3671 return ~0;
3672 }
3673 }
3674
3675 //-----------------------------------------------------------------------------
3676 /// @brief \b Function \b Name: MDrv_HVD_GetInfo()
3677 /// @brief \b Function \b Description: Get information of HVD driver.
3678 /// @return - driver information
3679 //-----------------------------------------------------------------------------
MDrv_HVD_GetInfo(void)3680 const HVD_DrvInfo* MDrv_HVD_GetInfo( void )
3681 {
3682 DrvInfo.bAVC=MDrv_HVD_GetCaps( E_HVD_AVC);
3683 DrvInfo.bAVS=MDrv_HVD_GetCaps( E_HVD_AVS);
3684 DrvInfo.bRM=MDrv_HVD_GetCaps( E_HVD_RM);
3685 DrvInfo.FWversion=HVD_FW_VERSION;
3686 return (&DrvInfo);
3687 }
3688
3689 //-----------------------------------------------------------------------------
3690 /// @brief \b Function \b Name: MDrv_HVD_GetLibVer()
3691 /// @brief \b Function \b Description: Get verion ID of HVD library.
3692 /// @param -pVerString \b OUT : pointer to HVD driver version ID.
3693 /// @return - driver library verion ID
3694 //-----------------------------------------------------------------------------
MDrv_HVD_GetLibVer(const MSIF_Version ** ppVersion)3695 HVD_Result MDrv_HVD_GetLibVer(const MSIF_Version **ppVersion)
3696 {
3697 if (!ppVersion)
3698 {
3699 return E_HVD_FAIL;
3700 }
3701
3702 *ppVersion = &_drv_hvd_version;
3703 return E_HVD_OK;
3704 }
3705
3706 //-----------------------------------------------------------------------------
3707 /// @brief \b Function \b Name: MDrv_HVD_GetStatus()
3708 /// @brief \b Function \b Description: Get status of HVD driver
3709 /// @param -pstatus \b OUT : driver status
3710 /// @return - TRUE / FALSE
3711 /// @retval -FALSE(0): Low delay flag not found.
3712 /// @retval -TRUE(1): Low delay flag found.
3713 //-----------------------------------------------------------------------------
MDrv_HVD_GetStatus(HVD_DrvStatus * pstatus)3714 MS_BOOL MDrv_HVD_GetStatus( HVD_DrvStatus *pstatus)
3715 {
3716 if( pstatus == NULL )
3717 {
3718 return FALSE;
3719 }
3720 pstatus->bInit = gHVDCtrl.u32CtrlMode&HVD_CTRL_INIT_FINISHED;
3721 pstatus->bBusy = gHVDCtrl.u32CtrlMode&HVD_CTRL_PROCESSING;
3722 return TRUE;
3723 }
3724
3725 //-----------------------------------------------------------------------------
3726 /// @brief \b Function \b Name: MDrv_HVD_GetFrmInfo()
3727 /// @brief \b Function \b Description: Get current displayed or decoded frame information of HVD driver
3728 /// @param -eType \b IN : Type of frame information
3729 /// @param -pInfo \b OUT : frame information
3730 /// @return -The result of command get frame information
3731 //-----------------------------------------------------------------------------
MDrv_HVD_GetFrmInfo(HVD_Get_Frm_Info_Type eType,HVD_Frame_Info * pInfo)3732 HVD_Result MDrv_HVD_GetFrmInfo( HVD_Get_Frm_Info_Type eType , HVD_Frame_Info *pInfo)
3733 {
3734 HVD_Frm_Information *pFrmInfo =NULL;
3735 HVD_MSG_TRACE();
3736 _DRV_HVD_Inited(E_HVD_FAIL);
3737 if( pInfo == NULL )
3738 {
3739 return E_HVD_FAIL;
3740 }
3741 if( eType == E_HVD_GFRMINFO_DISPLAY )
3742 {
3743 pFrmInfo =(HVD_Frm_Information *)HAL_HVD_GetData(E_HVD_GDATA_DISP_FRM_INFO);
3744 }
3745 else if( eType == E_HVD_GFRMINFO_DECODE )
3746 {
3747 pFrmInfo =(HVD_Frm_Information *)HAL_HVD_GetData(E_HVD_GDATA_DEC_FRM_INFO);
3748 }
3749 else if( eType == E_HVD_GFRMINFO_NEXT_DISPLAY )
3750 {
3751 pFrmInfo =(HVD_Frm_Information *)HAL_HVD_GetData(E_HVD_GDATA_NEXT_DISP_FRM_INFO);
3752 }
3753
3754 if( pFrmInfo != NULL )
3755 {
3756 pInfo->u32LumaAddr = (MS_PHYADDR)(pFrmInfo->u32LumaAddr);
3757 pInfo->u32ChromaAddr = (MS_PHYADDR)(pFrmInfo->u32ChromaAddr);
3758 if( gHVDCtrl.u32CtrlMode & HVD_CTRL_FRM_MIU_1 )
3759 {
3760 pInfo->u32LumaAddr+=gHVDCtrl.MemMap.u32MIU1BaseAddr;
3761 pInfo->u32ChromaAddr+=gHVDCtrl.MemMap.u32MIU1BaseAddr;
3762 }
3763 pInfo->u32TimeStamp= pFrmInfo->u32TimeStamp;
3764 pInfo->u32ID_L= pFrmInfo->u32ID_L;
3765 pInfo->u32ID_H= pFrmInfo->u32ID_H;
3766 pInfo->u16Pitch = pFrmInfo->u16Pitch;
3767 pInfo->u16Height = pFrmInfo->u16Height;
3768 pInfo->u16Width = pFrmInfo->u16Width;
3769 pInfo->eFrmType= (HVD_Frm_Type)(pFrmInfo->u8FrmType);
3770 pInfo->eFieldType=(HVD_FieldType)(pFrmInfo->u8FieldType);
3771 if( (pInfo->u16Pitch ==0) && (pInfo->u16Width == 0) && (pInfo->u16Height ==0) )
3772 {
3773 return E_HVD_FAIL;
3774 }
3775 }
3776 else
3777 {
3778 return E_HVD_FAIL;
3779 }
3780 return E_HVD_OK;
3781 }
3782
3783 //-----------------------------------------------------------------------------
3784 /// @brief \b Function \b Name: MDrv_HVD_GetISRInfo()
3785 /// @brief \b Function \b Description: Get information of HVD driver interrupt
3786 /// @param -eType \b OUT : ISR information
3787 /// @return -the result of get ISR information
3788 //-----------------------------------------------------------------------------
MDrv_HVD_GetISRInfo(MS_U32 * eType)3789 MS_BOOL MDrv_HVD_GetISRInfo(MS_U32* eType)
3790 {
3791 HVD_MSG_TRACE();
3792 _DRV_HVD_Inited(FALSE);
3793
3794 if(TRUE == gHVDISRCtrl.bInISR)
3795 {
3796 gHVDISRCtrl.u32ISRInfo |= HAL_HVD_GetData( E_HVD_GDATA_HVD_ISR_STATUS );
3797 *eType = gHVDISRCtrl.u32ISRInfo;
3798 }
3799 else
3800 {
3801 *eType = HAL_HVD_GetData( E_HVD_GDATA_HVD_ISR_STATUS );
3802 }
3803 return TRUE;
3804 }
3805
3806 //-----------------------------------------------------------------------------
3807 /// @brief \b Function \b Name: MDrv_HVD_CalLumaSum()
3808 /// @brief \b Function \b Description: Get the sum of luma data in a frame.
3809 /// @param -eType \b IN : Type of frame information
3810 /// @return -the sum
3811 /// @retval -0xFFFFFFFF: error occer.
3812 /// @retval -not zero: the sum.
3813 //-----------------------------------------------------------------------------
MDrv_HVD_CalLumaSum(HVD_Get_Frm_Info_Type eType)3814 MS_U32 MDrv_HVD_CalLumaSum( HVD_Get_Frm_Info_Type eType )
3815 {
3816 HVD_Frm_Information *pFrmInfo =NULL;
3817 MS_U32 u32Ret=HVD_U32_MAX;
3818 HVD_MSG_TRACE();
3819 _DRV_HVD_Inited(u32Ret);
3820 if( eType == E_HVD_GFRMINFO_DISPLAY )
3821 {
3822 pFrmInfo =(HVD_Frm_Information *)HAL_HVD_GetData(E_HVD_GDATA_DISP_FRM_INFO);
3823 }
3824 else if( eType == E_HVD_GFRMINFO_DECODE )
3825 {
3826 pFrmInfo =(HVD_Frm_Information *)HAL_HVD_GetData(E_HVD_GDATA_DEC_FRM_INFO);
3827 }
3828
3829 if( pFrmInfo != NULL )
3830 {
3831 MS_U32 u32tmp=0;
3832 MS_U32 u32PitchCnt=0;
3833 MS_U32 u32HeightCnt=0;
3834 volatile MS_U8* pLumaData=NULL;
3835 // PA2VA
3836 u32tmp = gHVDCtrl.MemMap.u32FrameBufAddr;
3837 if( gHVDCtrl.u32CtrlMode & HVD_CTRL_FRM_MIU_1 )
3838 {
3839 u32tmp -=gHVDCtrl.MemMap.u32MIU1BaseAddr;
3840 }
3841 pLumaData = (volatile MS_U8*)(gHVDCtrl.MemMap.u32FrameBufVAddr+(pFrmInfo->u32LumaAddr -u32tmp) );
3842 for( u32HeightCnt=0 ; u32HeightCnt < pFrmInfo->u16Height ; u32HeightCnt++ )
3843 {
3844 for( u32PitchCnt =0 ; u32PitchCnt < pFrmInfo->u16Pitch ;u32PitchCnt++ )
3845 {
3846 if( u32PitchCnt < pFrmInfo->u16Pitch )
3847 {
3848 u32Ret+=(MS_U32)(*pLumaData);
3849 }
3850 pLumaData++;
3851 }
3852 }
3853 }
3854 return u32Ret;
3855 }
3856
3857 //-----------------------------------------------------------------------------
3858 /// @brief \b Function \b Name: MDrv_HVD_GetUserData_Wptr()
3859 /// @brief \b Function \b Description: Get write pointer of user data.
3860 /// @return -the information of write pointer of user data.
3861 //-----------------------------------------------------------------------------
MDrv_HVD_GetUserData_Wptr(void)3862 MS_U32 MDrv_HVD_GetUserData_Wptr( void )
3863 {
3864 MS_U32 u32Ret=0;
3865 HVD_MSG_TRACE();
3866 _DRV_HVD_Inited(FALSE);
3867 u32Ret = (MS_U32)HAL_HVD_GetData(E_HVD_GDATA_USERDATA_WPTR);
3868 return u32Ret;
3869 }
3870
3871 //-----------------------------------------------------------------------------
3872 /// @brief \b Function \b Name: MDrv_HVD_GetUserData_Packet()
3873 /// @brief \b Function \b Description: Get information of user data packet.
3874 /// @param -u32Idx \b IN : the pointer of required user data packet( valid range is 0 ~ 11 )
3875 /// @param -u32Size \b OUT : the size of required user data packet
3876 /// @return -the offset of user data packet form code buffer start address
3877 //-----------------------------------------------------------------------------
MDrv_HVD_GetUserData_Packet(MS_U32 u32Idx,MS_U32 * u32Size)3878 MS_U32 MDrv_HVD_GetUserData_Packet( MS_U32 u32Idx , MS_U32* u32Size )
3879 {
3880 MS_U32 u32Ret=0;
3881 MS_U32 tmp=0;
3882 MS_U8* pIdx=NULL;
3883 HVD_MSG_TRACE();
3884 _DRV_HVD_Inited(FALSE);
3885 *u32Size=0;
3886 tmp = (MS_U32)HAL_HVD_GetData(E_HVD_GDATA_USERDATA_IDX_TBL_SIZE);
3887 if( u32Idx >= tmp )
3888 {
3889 HVD_MSG_ERR("HVD ERR: input user data index(%lu) is larger than max index(%lu)\n" , u32Idx , tmp );
3890 return 0;
3891 }
3892 tmp = (MS_U32)HAL_HVD_GetData(E_HVD_GDATA_USERDATA_IDX_TBL_ADDR);
3893 if( tmp == 0 )
3894 {
3895 HVD_MSG_INFO("HVD FW ERR: user data packet idx tbl base addr(%lx) is zero\n" , tmp );
3896 return 0;
3897 }
3898 pIdx = (MS_U8*)(tmp + u32Idx);
3899 tmp = (MS_U32)HAL_HVD_GetData(E_HVD_GDATA_USERDATA_PACKET_TBL_SIZE);
3900 if( (*pIdx) >= tmp )
3901 {
3902 HVD_MSG_INFO("HVD FW ERR: user data packet tbl ptr(%lu) is larger than max size(%lu)\n" , (MS_U32)(*pIdx) , tmp );
3903 return 0;
3904 }
3905 tmp = (MS_U32)HAL_HVD_GetData(E_HVD_GDATA_USERDATA_PACKET_TBL_ADDR);
3906 if( tmp == 0 )
3907 {
3908 HVD_MSG_INFO("HVD FW ERR: user data packet packet tbl base offset(%lx) is zero\n" , tmp );
3909 return 0;
3910 }
3911 u32Ret= tmp ;//+ gHVDCtrl.MemMap.u32CodeBufAddr;
3912 tmp = (MS_U32)HAL_HVD_GetData(E_HVD_GDATA_USERDATA_PACKET_SIZE);
3913 if( tmp == 0 )
3914 {
3915 HVD_MSG_INFO("HVD FW ERR: user data packet packet size(%lu) is zero\n" , tmp );
3916 return 0;
3917 }
3918 *u32Size=tmp;
3919 u32Ret += (MS_U32)(*pIdx) * tmp;
3920 return u32Ret;
3921 }
3922
3923 // VDEC Interal control
3924 //-----------------------------------------------------------------------------
3925 /// @brief \b Function \b Name: MDrv_HVD_GenPattern()
3926 /// @brief \b Function \b Description: Generate spcific pattern to support some special function.
3927 /// @param -eType \b IN : the virtual address of spcific pattern
3928 /// @param -u32VAddr \b IN : the virtual address of spcific pattern
3929 /// @param -u32Size \b IN, OUT :
3930 /// IN: the input array size.
3931 /// OUT: the used array size.
3932 /// @return -The result of command generate spcific pattern
3933 //-----------------------------------------------------------------------------
MDrv_HVD_GenPattern(HVD_PatternType eType,MS_U32 u32VAddr,MS_U32 * pu32Size)3934 HVD_Result MDrv_HVD_GenPattern(HVD_PatternType eType, MS_U32 u32VAddr, MS_U32 *pu32Size)
3935 {
3936 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
3937 MS_U8 *pDummyData = NULL;
3938 MS_U32 u32MinPatternSize = 0;
3939
3940 HVD_MSG_TRACE();
3941 _DRV_HVD_Inited(eRet);
3942 _DRV_HVD_Entry();
3943
3944 if (eType == E_HVD_PATTERN_FLUSH) // flush pattern
3945 {
3946 // Driver input need not to push flush pattern
3947 if ((gHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK) == HVD_INIT_MAIN_FILE_RAW)
3948 {
3949 *pu32Size = 0;
3950 eRet = E_HVD_OK;
3951 _DRV_HVD_Return(eRet);
3952 }
3953
3954 // TSP input process
3955 if (u32VAddr == 0)
3956 {
3957 *pu32Size = 8 + 144;
3958 HVD_MSG_ERR("HVD ERR: Flush Pattern address shall not be zero\n" );
3959 eRet = E_HVD_RET_INVALID_PARAMETER;
3960 _DRV_HVD_Return(eRet);
3961 }
3962
3963 switch ((gHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_HW_MASK))
3964 {
3965 case HVD_INIT_HW_AVC:
3966 {
3967 u32MinPatternSize = 8 + 144;
3968 break;
3969 }
3970 case HVD_INIT_HW_AVS:
3971 {
3972 u32MinPatternSize = 8 + 144;
3973 break;
3974 }
3975 case HVD_INIT_HW_RM:
3976 default:
3977 u32MinPatternSize = 0;
3978 break;
3979 }
3980
3981 if (*pu32Size < u32MinPatternSize)
3982 {
3983 HVD_MSG_ERR("HVD ERR: Flush Pattern must have at least %lu bytes, input:%lu\n", u32MinPatternSize, (MS_U32) (*pu32Size));
3984 *pu32Size = u32MinPatternSize;
3985 eRet = E_HVD_RET_OUTOF_MEMORY;
3986 _DRV_HVD_Return(eRet);
3987 }
3988
3989 *pu32Size = u32MinPatternSize;
3990 pDummyData = (MS_U8 *) u32VAddr;
3991
3992 HVD_memset((void *) pDummyData, 0, *pu32Size);
3993
3994 switch ((gHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_HW_MASK))
3995 {
3996 case HVD_INIT_HW_AVC:
3997 {
3998 pDummyData[0] = 0;
3999 pDummyData[1] = 0;
4000 pDummyData[2] = 1;
4001 pDummyData[3] = 0xFF;
4002 pDummyData[4] = 0xAA;
4003 pDummyData[5] = 0x55;
4004 pDummyData[6] = 0xAA;
4005 pDummyData[7] = 0x55;
4006
4007 break;
4008 }
4009 case HVD_INIT_HW_AVS:
4010 {
4011 pDummyData[0] = 0;
4012 pDummyData[1] = 0;
4013 pDummyData[2] = 1;
4014 pDummyData[3] = 0xB4;
4015 pDummyData[4] = 0xAA;
4016 pDummyData[5] = 0x55;
4017 pDummyData[6] = 0xAA;
4018 pDummyData[7] = 0x55;
4019
4020 break;
4021 }
4022 case HVD_INIT_HW_RM:
4023 default:
4024 break;
4025 }
4026 }
4027 else if (eType == E_HVD_PATTERN_FILEEND) // dummy pattern
4028 {
4029 // Driver input need not to push dummy pattern
4030 if ((gHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK) == HVD_INIT_MAIN_FILE_RAW)
4031 {
4032 *pu32Size = 0;
4033 eRet = E_HVD_OK;
4034 _DRV_HVD_Return(eRet);
4035 }
4036
4037 // TSP input process
4038 if (u32VAddr == 0)
4039 {
4040 *pu32Size = 8 + 144;
4041 HVD_MSG_ERR("HVD ERR: Dummy Pattern address shall not be zero\n");
4042 eRet = E_HVD_RET_INVALID_PARAMETER;
4043 _DRV_HVD_Return(eRet);
4044 }
4045
4046 switch ((gHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_HW_MASK))
4047 {
4048 case HVD_INIT_HW_AVC:
4049 u32MinPatternSize = 8 + 144;
4050 break;
4051 case HVD_INIT_HW_AVS:
4052 u32MinPatternSize = 8 + 144;
4053 break;
4054 case HVD_INIT_HW_RM:
4055 default:
4056 u32MinPatternSize = 0;
4057 break;
4058 }
4059
4060 if (*pu32Size < u32MinPatternSize)
4061 {
4062 HVD_MSG_ERR("HVD ERR: Dummy Pattern must have at least %lu bytes, input:%lu\n" , u32MinPatternSize , (MS_U32)(*pu32Size) );
4063 *pu32Size = u32MinPatternSize;
4064 eRet = E_HVD_RET_OUTOF_MEMORY;
4065 _DRV_HVD_Return(eRet);
4066 }
4067
4068 pDummyData = (MS_U8 *) u32VAddr;
4069
4070 HVD_memset((void *) pDummyData, 0, *pu32Size);
4071
4072 switch ((gHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_HW_MASK))
4073 {
4074 case HVD_INIT_HW_AVC:
4075 {
4076 pDummyData[0] = 0;
4077 pDummyData[1] = 0;
4078 pDummyData[2] = 1;
4079 pDummyData[3] = 0xFF;
4080 pDummyData[4] = 0xFF;
4081 pDummyData[5] = 0xFF;
4082 pDummyData[6] = 0xFF;
4083 pDummyData[7] = 0xFF;
4084
4085 break;
4086 }
4087 case HVD_INIT_HW_AVS:
4088 {
4089 pDummyData[0] = 0;
4090 pDummyData[1] = 0;
4091 pDummyData[2] = 1;
4092 pDummyData[3] = 0xB4;
4093 pDummyData[4] = 0xAA;
4094 pDummyData[5] = 0x66;
4095 pDummyData[6] = 0xAA;
4096 pDummyData[7] = 0x66;
4097
4098 break;
4099 }
4100 case HVD_INIT_HW_RM:
4101 default:
4102 *pu32Size = u32MinPatternSize;
4103 break;
4104 }
4105 }
4106
4107 eRet = E_HVD_OK;
4108
4109 _DRV_HVD_Return(eRet);
4110 }
4111
4112 //-----------------------------------------------------------------------------
4113 /// @brief \b Function \b Name: MDrv_HVD_GetPatternInfo()
4114 /// @brief \b Function \b Description: Get driver specific data information
4115 /// @param -eType \b IN : the type of specific data information
4116 /// @return -the information of choosed type
4117 //-----------------------------------------------------------------------------
MDrv_HVD_GetPatternInfo(HVD_Pattern_Info eType)4118 MS_U32 MDrv_HVD_GetPatternInfo(HVD_Pattern_Info eType)
4119 {
4120 MS_U32 eRet = 0;
4121
4122 HVD_MSG_TRACE();
4123 _DRV_HVD_Inited(FALSE);
4124
4125 switch (eType)
4126 {
4127 case E_HVD_FLUSH_PATTERN_SIZE:
4128 {
4129 if ((gHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK) == HVD_INIT_MAIN_FILE_RAW )
4130 {
4131 eRet = 0;
4132 }
4133 else if ((gHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK) == HVD_INIT_MAIN_FILE_TS)
4134 {
4135 eRet = 8 + 144;
4136 }
4137 break;
4138 }
4139 case E_HVD_DUMMY_HW_FIFO:
4140 {
4141 if ((gHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK) == HVD_INIT_MAIN_FILE_RAW )
4142 {
4143 eRet = 0;
4144 }
4145 else if ((gHVDCtrl.InitParams.u32ModeFlag & HVD_INIT_MAIN_MASK) == HVD_INIT_MAIN_FILE_TS)
4146 {
4147 eRet = (MS_U32) HAL_HVD_GetData(E_HVD_GDATA_FW_MAX_DUMMY_FIFO);
4148 }
4149 break;
4150 }
4151 }
4152
4153 return eRet;
4154 }
4155
4156 //-----------------------------------------------------------------------------
4157 /// @brief \b Function \b Name: MDrv_HVD_GetDynamicScalingInfo()
4158 /// @brief \b Function \b Description: Get information of Dynamic Scaling
4159 /// @param -eType \b IN : the type of specific information
4160 /// @return -the information of choosed type
4161 //-----------------------------------------------------------------------------
MDrv_HVD_GetDynamicScalingInfo(HVD_DynamicScaling_Info eType)4162 MS_U32 MDrv_HVD_GetDynamicScalingInfo( HVD_DynamicScaling_Info eType )
4163 {
4164 MS_U32 u32Ret=0;
4165 HVD_MSG_TRACE();
4166 _DRV_HVD_Inited(FALSE);
4167 switch( eType )
4168 {
4169 case E_HVD_DS_BUF_MIUSEL:
4170 if( gHVDCtrl.MemMap.u32CodeBufAddr >= gHVDCtrl.MemMap.u32MIU1BaseAddr )
4171 {
4172 u32Ret=TRUE;
4173 }
4174 else
4175 {
4176 u32Ret=FALSE;
4177 }
4178 break;
4179 case E_HVD_DS_BUF_ADDR:
4180 u32Ret=(MS_U32)HAL_HVD_GetData(E_HVD_GDATA_FW_DS_BUF_ADDR);
4181 u32Ret+=gHVDCtrl.MemMap.u32CodeBufAddr;
4182 break;
4183 case E_HVD_DS_BUF_SIZE:
4184 u32Ret=(MS_U32)HAL_HVD_GetData(E_HVD_GDATA_FW_DS_BUF_SIZE);
4185 break;
4186 case E_HVD_DS_VECTOR_DEPTH:
4187 u32Ret=(MS_U32)HAL_HVD_GetData(E_HVD_GDATA_FW_DS_VECTOR_DEPTH);
4188 break;
4189 case E_HVD_DS_INFO_ADDR:
4190 u32Ret=(MS_U32)HAL_HVD_GetData(E_HVD_GDATA_FW_DS_INFO_ADDR);
4191 u32Ret+=gHVDCtrl.MemMap.u32CodeBufAddr;
4192 break;
4193 case E_HVD_DS_IS_ENABLED:
4194 u32Ret=(MS_U32)HAL_HVD_GetData(E_HVD_GDATA_FW_DS_IS_ENABLED);
4195 break;
4196 }
4197 return u32Ret;
4198 }
4199
4200 #if 0
4201 //-----------------------------------------------------------------------------
4202 /// @brief \b Enum \b Name: HVD_DynamicScaling_Info
4203 /// @brief \b Enum \b Description: The information type of dynamic scaling.
4204 //-----------------------------------------------------------------------------
4205 typedef enum
4206 {
4207 E_HVD_DS_CAPABILITY, ///< the capability of dynamic sacling. Ret: TRUE /FALSE
4208 E_HVD_DS_BUF_ADDR, ///< the buffer start physcial address.
4209 E_HVD_DS_BUF_SIZE, ///< the buffer size.
4210 E_HVD_DS_VECTOR_DEPTH, ///< the depth of scaling vector.
4211 } HVD_DynamicScaling_Info;
4212
4213
4214 //-----------------------------------------------------------------------------
4215 /// @brief \b Function \b Name: MDrv_HVD_GetDynamicScalingInfo()
4216 /// @brief \b Function \b Description: Get driver information of dynamic scaling
4217 /// @param -eType \b IN : the type of specific dynamic scaling information
4218 /// @return -the information of choosed type
4219 //-----------------------------------------------------------------------------
4220 MS_U32 MDrv_HVD_GetDynamicScalingInfo( HVD_DynamicScaling_Info eType )
4221 {
4222 MS_U32 u32Ret=0;
4223 HVD_MSG_TRACE();
4224 _DRV_HVD_Inited(FALSE);
4225
4226 switch( eType )
4227 {
4228 case E_HVD_DS_CAPABILITY:
4229 HAL_HVD_GetData( E_HVD_GDATA_DS_CAPABILITY );
4230 break;
4231 case E_HVD_DS_BUF_ADDR:
4232 HAL_HVD_GetData( E_HVD_GDATA_DS_BUF_ADDR );
4233 break;
4234 case E_HVD_DS_BUF_SIZE:
4235 HAL_HVD_GetData( E_HVD_GDATA_DS_BUF_SIZE );
4236 break;
4237 case E_HVD_DS_VECTOR_DEPTH:
4238 HAL_HVD_GetData( E_HVD_GDATA_DS_VECTOR_DEPTH );
4239 break;
4240 default:
4241 break;
4242 }
4243 return u32Ret;
4244 }
4245 #endif
4246 // debug
4247
4248 //-----------------------------------------------------------------------------
4249 /// @brief \b Function \b Name: MDrv_HVD_GetData()
4250 /// @brief \b Function \b Description: Get target data from HVD driver
4251 /// @param -eType \b IN : the type of the target data
4252 /// @return -the value of the target data
4253 //-----------------------------------------------------------------------------
MDrv_HVD_GetData(HVD_GData_Type eType)4254 MS_U32 MDrv_HVD_GetData(HVD_GData_Type eType)
4255 {
4256 MS_U32 u32Ret=0;
4257 HVD_MSG_TRACE();
4258 _DRV_HVD_Inited(FALSE);
4259 switch( eType )
4260 {
4261 case E_HVD_GDATA_TYPE_DISP_CNT:
4262 u32Ret = HAL_HVD_GetData( E_HVD_GDATA_DISP_CNT );
4263 break;
4264 case E_HVD_GDATA_TYPE_SKIP_CNT:
4265 u32Ret = HAL_HVD_GetData( E_HVD_GDATA_SKIP_CNT );
4266 break;
4267 case E_HVD_GDATA_TYPE_DROP_CNT:
4268 u32Ret = HAL_HVD_GetData( E_HVD_GDATA_DROP_CNT );
4269 break;
4270 case E_HVD_GDATA_TYPE_IDLE_CNT:
4271 u32Ret = HAL_HVD_GetData( E_HVD_GDATA_VPU_IDLE_CNT );
4272 break;
4273 case E_HVD_GDATA_TYPE_VSYNC_CNT:
4274 u32Ret = HAL_HVD_GetData( E_HVD_GDATA_VSYNC_CNT );
4275 break;
4276 case E_HVD_GDATA_TYPE_MAIN_LOOP_CNT:
4277 u32Ret = HAL_HVD_GetData( E_HVD_GDATA_MAIN_LOOP_CNT );
4278 break;
4279 case E_HVD_GDATA_TYPE_AVC_LEVEL_IDC:
4280 u32Ret = HAL_HVD_GetData( E_HVD_GDATA_AVC_LEVEL_IDC );
4281 break;
4282 case E_HVD_GDATA_TYPE_FB_USAGE_MEM:
4283 u32Ret = HAL_HVD_GetData( E_HVD_GDATA_FB_USAGE_MEM );
4284 break;
4285 case E_HVD_GDATA_TYPE_DISP_Q_SIZE:
4286 u32Ret = HAL_HVD_GetData( E_HVD_GDATA_DISP_Q_NUMB );
4287 break;
4288 case E_HVD_GDATA_TYPE_ES_LEVEL:
4289 u32Ret = (MS_U32)(HVD_ES_Level)HAL_HVD_GetData( E_HVD_GDATA_ES_LEVEL );
4290 break;
4291 case E_HVD_GDATA_TYPE_AVC_VUI_DISP_INFO:
4292 u32Ret = HAL_HVD_GetData( E_HVD_GDATA_AVC_VUI_DISP_INFO );
4293 break;
4294 case E_HVD_GDATA_TYPE_DISP_STC:
4295 u32Ret = HAL_HVD_GetData( E_HVD_GDATA_DISP_STC );
4296 break;
4297 case E_HVD_GDATA_TYPE_USERDATA_IDX_TBL_SIZE:
4298 u32Ret = HAL_HVD_GetData(E_HVD_GDATA_USERDATA_IDX_TBL_SIZE);
4299 break;
4300 case E_HVD_GDATA_TYPE_USERDATA_PACKET_SIZE:
4301 u32Ret = HAL_HVD_GetData(E_HVD_GDATA_USERDATA_PACKET_SIZE);
4302 break;
4303 case E_HVD_GDATA_TYPE_REAL_FRAMERATE:
4304 u32Ret = HAL_HVD_GetData(E_HVD_GDATA_REAL_FRAMERATE);
4305 break;
4306 case E_HVD_GDATA_TYPE_IS_ORI_INTERLACE_MODE:
4307 u32Ret = HAL_HVD_GetData(E_HVD_GDATA_IS_ORI_INTERLACE_MODE);
4308 break;
4309 case E_HVD_GDATA_TYPE_FRMPAC_ARRANGE_CNL_FLAG:
4310 {
4311 HVD_Frame_packing_SEI *pstFrmPckSEI = _DRV_HVD_GetFrmPckSEIStPtr();
4312 u32Ret=(MS_U32)pstFrmPckSEI->u8Frm_packing_arr_cnl_flag;
4313 break;
4314 }
4315 case E_HVD_GDATA_TYPE_FRMPAC_ARRANGE_TYPE:
4316 {
4317 HVD_Frame_packing_SEI *pstFrmPckSEI = _DRV_HVD_GetFrmPckSEIStPtr();
4318 u32Ret=(MS_U32)pstFrmPckSEI->u8Frm_packing_arr_type;
4319 break;
4320 }
4321 default:
4322 break;
4323
4324 }
4325 return u32Ret;
4326 }
4327
4328 //-----------------------------------------------------------------------------
4329 /// @brief \b Function \b Name: MDrv_HVD_GetMem_Dbg()
4330 /// @brief \b Function \b Description: Get any data from any memory address
4331 /// @param -u32Addr \b IN : the memory address of the target data
4332 /// @return -the value of the memory
4333 //-----------------------------------------------------------------------------
MDrv_HVD_GetMem_Dbg(MS_U32 u32Addr)4334 MS_U32 MDrv_HVD_GetMem_Dbg(MS_U32 u32Addr)
4335 {
4336 MS_U32 u32Ret=0;
4337 HVD_MSG_TRACE();
4338 _DRV_HVD_Inited(u32Ret);
4339 switch(u32Addr)
4340 {
4341 case 1:
4342 u32Ret = HAL_HVD_GetData( E_HVD_GDATA_BBU_READ_PTR );
4343 break;
4344 case 2:
4345 u32Ret = HAL_HVD_GetData( E_HVD_GDATA_VPU_PC_CNT );
4346 break;
4347 case 3:
4348 u32Ret = HAL_HVD_GetData( E_HVD_GDATA_BBU_WRITE_PTR );
4349 break;
4350 default:
4351 break;
4352 }
4353 return u32Ret;
4354 // break;
4355 // return HAL_HVD_GetData_Dbg(u32Addr);
4356 }
4357
4358 //-----------------------------------------------------------------------------
4359 /// @brief \b Function \b Name: MDrv_HVD_DbgDumpStatus()
4360 /// @brief \b Function \b Description: Dump specific information to standard output.
4361 /// @param -eFlag \b IN : the type of information.
4362 //-----------------------------------------------------------------------------
MDrv_HVD_DbgDumpStatus(HVD_DumpStatus eFlag)4363 void MDrv_HVD_DbgDumpStatus(HVD_DumpStatus eFlag)
4364 {
4365 if (!bHVDIsInited)
4366 {
4367 return;
4368 }
4369
4370 if( eFlag & E_HVD_DUMP_STATUS_DRV )
4371 {
4372 ;
4373 }
4374 if( eFlag & E_HVD_DUMP_STATUS_FW )
4375 {
4376 HAL_HVD_Dump_FW_Status();
4377 }
4378 if( eFlag & E_HVD_DUMP_STATUS_HW )
4379 {
4380 HAL_HVD_Dump_HW_Status(HVD_U32_MAX);
4381 }
4382 }
4383
4384 //-----------------------------------------------------------------------------
4385 /// @brief \b Function \b Name: MDrv_HVD_SetMem_Dbg()
4386 /// @brief \b Function \b Description: set any data into any memory address
4387 /// @param -u32Addr \b IN : the memory address of the target destination
4388 /// @param -u32Arg \b IN : the value of input content
4389 //-----------------------------------------------------------------------------
MDrv_HVD_SetMem_Dbg(MS_U32 u32Addr,MS_U32 u32Arg)4390 void MDrv_HVD_SetMem_Dbg(MS_U32 u32Addr , MS_U32 u32Arg)
4391 {
4392 HVD_MSG_TRACE();
4393 HAL_HVD_SetData_Dbg(u32Addr ,u32Arg );
4394 }
4395
4396 //-----------------------------------------------------------------------------
4397 /// @brief \b Function \b Name: MDrv_HVD_SetData_Dbg()
4398 /// @brief \b Function \b Description: set any FW debug command
4399 /// @param -u32Cmd \b IN : specify the FW command ID.
4400 /// @param -u32Arg \b IN : specify the argument of FW command.
4401 /// @return -the result of debug command
4402 //-----------------------------------------------------------------------------
MDrv_HVD_SetCmd_Dbg(MS_U32 u32Cmd,MS_U32 u32Arg)4403 HVD_Result MDrv_HVD_SetCmd_Dbg( MS_U32 u32Cmd , MS_U32 u32Arg)
4404 {
4405 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
4406 HVD_MSG_TRACE();
4407 _DRV_HVD_Inited(eRet);
4408 _DRV_HVD_Entry();
4409 eRet = (HVD_Result)HAL_HVD_SetCmd((HVD_User_Cmd)u32Cmd , u32Arg);
4410 _DRV_HVD_Return(eRet );
4411 }
4412
4413 //-----------------------------------------------------------------------------
4414 /// @brief \b Function \b Name: MDrv_HVD_SetSettings_Pro()
4415 /// @brief \b Function \b Description: set any FW debug command
4416 /// @param -eType \b IN : specify the type of setting.
4417 /// @param -u32Arg \b IN : specify the argument of the setting.
4418 /// @return -the result of set professional settings.
4419 //-----------------------------------------------------------------------------
MDrv_HVD_SetSettings_Pro(HVD_SSettings_Type eType,MS_U32 u32Arg)4420 HVD_Result MDrv_HVD_SetSettings_Pro( HVD_SSettings_Type eType , MS_U32 u32Arg)
4421 {
4422 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
4423 HVD_User_Cmd eCmd = E_HVD_CMD_INVALID_CMD;
4424 HVD_MSG_TRACE();
4425 _DRV_HVD_Inited(eRet);
4426 _DRV_HVD_Entry();
4427 switch( eType )
4428 {
4429 case E_HVD_SSET_TIME_UNIT:
4430 eCmd = E_HVD_CMD_TIME_UNIT_TYPE;
4431 break;
4432 case E_HVD_SSET_PITCH:
4433 eCmd = E_HVD_CMD_PITCH;
4434 break;
4435 case E_HVD_SSET_SYNC_EACH_FRM:
4436 eCmd = E_HVD_CMD_SYNC_EACH_FRM;
4437 break;
4438 case E_HVD_SSET_MAX_DEC_TICK:
4439 eCmd = E_HVD_CMD_MAX_DEC_TICK;
4440 break;
4441 case E_HVD_SSET_AUTO_FREE_ES:
4442 eCmd = E_HVD_CMD_AUTO_FREE_ES;
4443 gHVDCtrl.Settings.bAutoFreeES=u32Arg;
4444 break;
4445 case E_HVD_SSET_MIN_FRAME_GAP:
4446 eCmd = E_HVD_CMD_MIN_FRAME_GAP;
4447 break;
4448 case E_HVD_SSET_DISABLE_DEBLOCKING:
4449 eCmd = E_HVD_CMD_DIS_DBF;
4450 if( u32Arg > 2 )
4451 {
4452 u32Arg =1;
4453 }
4454 gHVDCtrl.Settings.bDisDeblocking=u32Arg;
4455 break;
4456 case E_HVD_SSET_DISABLE_QUARTER_PIXEL:
4457 eCmd = E_HVD_CMD_DIS_QUART_PIXEL;
4458 if( u32Arg > 2 )
4459 {
4460 u32Arg =1;
4461 }
4462 gHVDCtrl.Settings.bDisQuarterPixel=u32Arg;
4463 break;
4464 case E_HVD_SSET_MIU_BURST_CNT_LEVEL:
4465 {
4466 gHVDCtrl.Settings.u32MiuBurstLevel = u32Arg;
4467 eCmd = E_HVD_CMD_MIU_BURST_CNT;
4468
4469 break;
4470 }
4471 case E_HVD_SSET_DISABLE_ANTI_VDEAD:
4472 eCmd = E_HVD_CMD_DIS_VDEAD;
4473 break;
4474 case E_HVD_SSET_FLUSH_FRM_BUF:
4475 eCmd = E_HVD_CMD_FLUSH_FRM_BUF;
4476 break;
4477 default:
4478 break;
4479 }
4480
4481 if (eCmd != E_HVD_CMD_INVALID_CMD)
4482 {
4483 eRet = (HVD_Result) HAL_HVD_SetCmd(eCmd , u32Arg);
4484 }
4485 else
4486 {
4487 eRet = E_HVD_RET_INVALID_PARAMETER;
4488 }
4489
4490 _DRV_HVD_Return(eRet);
4491 }
4492
4493 //-----------------------------------------------------------------------------
4494 /// @brief \b Function \b Name: MDrv_HVD_GetCaps()
4495 /// @brief \b Function \b Description: check if HW support this format
4496 /// @param -u32Type \b IN : specify the format type
4497 /// @return - TRUE/ FALSE
4498 /// @retval -FALSE(0): not supported by HW
4499 /// @retval -TRUE(1): supported by HW
4500 //-----------------------------------------------------------------------------
MDrv_HVD_GetCaps(HVD_Codec u32Type)4501 MS_BOOL MDrv_HVD_GetCaps( HVD_Codec u32Type)
4502 {
4503 //AVCH264DBG(printf("HVD rev id: 0x%x \n\n", verID );
4504 #if ( HVD_HW_VERSION == HVD_HW_HVD)
4505 MS_U32 verID=HAL_HVD_Get_HWVersionID();
4506 verID=verID >> 12;
4507 switch( u32Type )
4508 {
4509 case E_HVD_AVC:
4510 case E_HVD_AVS:
4511 case E_HVD_RM:
4512 if( (verID & BIT(u32Type)) == 0 )
4513 {
4514 return FALSE;
4515 }
4516 break;
4517 default:
4518 return FALSE;
4519 }
4520 #else
4521 if( u32Type != E_HVD_AVC )
4522 {
4523 return FALSE;
4524 }
4525 #endif
4526 return TRUE;
4527 }
4528
MDrv_HVD_LinkWeakSymbolPatch(void)4529 MS_BOOL MDrv_HVD_LinkWeakSymbolPatch(void)
4530 {
4531 return TRUE;
4532 }
4533
4534 //-----------------------------------------------------------------------------
4535 /// @brief \b Function \b Name: MDrv_HVD_SetAutoRmLstZeroByte
4536 /// @brief \b Function \b Description: Turn on/off auto remove last zero byte
4537 /// @param -bOn \b IN : Turn on/off auto remove last zero byte
4538 /// @return -the result of turn on/off auto remove last zero byte
4539 ///\b NOTE: The default mode after initialization is On.
4540 //-----------------------------------------------------------------------------
MDrv_HVD_SetAutoRmLstZeroByte(MS_BOOL bOn)4541 HVD_Result MDrv_HVD_SetAutoRmLstZeroByte(MS_BOOL bOn)
4542 {
4543 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
4544 HVD_MSG_TRACE();
4545 _DRV_HVD_Inited(eRet);
4546 gHVDCtrl.bAutoRmLastZeroByte = bOn;
4547 return E_HVD_OK;
4548 }
4549
4550 //-----------------------------------------------------------------------------
4551 /// @brief \b Function \b Name: MDrv_HVD_IsAlive
4552 /// @brief \b Function \b Description:Check Whether HVD is alive or not(check cnt)
4553 /// @return -the result of HVD alive status(E_HVD_OK/E_HVD_RET_NOT_RUNNING)
4554 //-----------------------------------------------------------------------------
MDrv_HVD_IsAlive(void)4555 HVD_Result MDrv_HVD_IsAlive(void)
4556 {
4557 _DRV_HVD_Inited(E_HVD_FAIL);
4558
4559 if (HAL_HVD_IsAlive())
4560 {
4561 gHVDCtrl.LivingStatus.u32DecCnt = HAL_HVD_GetData(E_HVD_GDATA_DECODE_CNT);
4562 gHVDCtrl.LivingStatus.u32SkipCnt = HAL_HVD_GetData(E_HVD_GDATA_SKIP_CNT);
4563 gHVDCtrl.LivingStatus.u32IdleCnt = HAL_HVD_GetData(E_HVD_GDATA_VPU_IDLE_CNT);
4564 gHVDCtrl.LivingStatus.u32MainLoopCnt = HAL_HVD_GetData(E_HVD_GDATA_MAIN_LOOP_CNT);
4565
4566 return E_HVD_OK;
4567 }
4568 else
4569 {
4570 return E_HVD_RET_NOT_RUNNING;
4571 }
4572 }
4573
4574 //-----------------------------------------------------------------------------
4575 /// @brief \b Function \b Name: MDrv_HVD_SetBalanceBW
4576 /// @brief \b Function \b Description: bandwidth adjustment
4577 /// @param -qp_cnt \b IN : QP threshold for overtime counter
4578 /// @param -db_cnt \b IN : Deblocking threshod for overtime counter
4579 /// @param -upper \b IN : upper bound for overtime counter
4580 /// @return -the result of command E_HVD_CMD_BALANCE_BW
4581 //-----------------------------------------------------------------------------
MDrv_HVD_SetBalanceBW(MS_U8 qp_cnt,MS_U8 db_cnt,MS_U8 upper)4582 HVD_Result MDrv_HVD_SetBalanceBW(MS_U8 qp_cnt, MS_U8 db_cnt, MS_U8 upper)
4583 {
4584 HVD_Result eRst=E_HVD_FAIL;
4585 HVD_MSG_TRACE();
4586 _DRV_HVD_Inited(eRst);
4587 _DRV_HVD_Entry();
4588 eRst = (HVD_Result)HAL_HVD_SetCmd(E_HVD_CMD_BALANCE_BW, qp_cnt | (db_cnt << 8) | (upper << 16));
4589 _DRV_HVD_Return(eRst);
4590 }
4591
4592 //-----------------------------------------------------------------------------
4593 /// @brief \b Function \b Name: MDrv_HVD_SetFdMaskDelayCnt()
4594 /// @brief \b Function \b Description: Set fd mask muting count
4595 /// @param -u8DelayCnt \b IN : 0~0xFF, Fdmask delay count, arg >= 0xFF -> use default
4596 /// @return -The result of command setting fd_mask muting count
4597 //-----------------------------------------------------------------------------
MDrv_HVD_SetFdMaskDelayCnt(MS_U8 u8DelayCnt)4598 HVD_Result MDrv_HVD_SetFdMaskDelayCnt(MS_U8 u8DelayCnt)
4599 {
4600 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
4601
4602 HVD_MSG_TRACE();
4603
4604 _DRV_HVD_Inited(eRet);
4605
4606 _DRV_HVD_Entry();
4607
4608 eRet = (HVD_Result) HAL_HVD_SetCmd(E_HVD_CMD_FDMASK_DELAY_CNT, u8DelayCnt);
4609
4610 _DRV_HVD_Return(eRet);
4611 }
4612
4613 //-----------------------------------------------------------------------------
4614 /// @brief \b Function \b Name: MDrv_HVD_SetOutputFRCMode()
4615 /// @brief \b Function \b Description: Set output frame rate convert mode.
4616 /// @param -u8FrameRate \b IN : output vsync count.
4617 /// @param -u8Interlace \b IN : output scan type: 0:progress, 1:interlace.
4618 /// @return -The result of command setting output FRC mode
4619 //-----------------------------------------------------------------------------
MDrv_HVD_SetOutputFRCMode(MS_U8 u8FrameRate,MS_U8 u8Interlace)4620 HVD_Result MDrv_HVD_SetOutputFRCMode(MS_U8 u8FrameRate, MS_U8 u8Interlace)
4621 {
4622 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
4623
4624 HVD_MSG_TRACE();
4625
4626 _DRV_HVD_Inited(eRet);
4627 _DRV_HVD_Entry();
4628
4629 if ((u8Interlace != 0) && (u8Interlace != 1))
4630 {
4631 _DRV_HVD_Return(eRet);
4632 }
4633
4634 eRet = (HVD_Result) HAL_HVD_SetCmd(E_HVD_CMD_FRC_OUTPUT_FRAMERATE, u8FrameRate);
4635
4636 if (eRet != E_HVD_OK)
4637 {
4638 _DRV_HVD_Return(eRet);
4639 }
4640
4641 eRet = (HVD_Result) HAL_HVD_SetCmd(E_HVD_CMD_FRC_OUTPUT_INTERLACE, u8Interlace);
4642
4643 _DRV_HVD_Return(eRet);
4644 }
4645
MDrv_HVD_DispFrame(MS_U32 u32FrmIdx)4646 HVD_Result MDrv_HVD_DispFrame(MS_U32 u32FrmIdx)
4647 {
4648 HAL_HVD_SetData(E_HVD_SDATA_DISPQ_STATUS_DISP, u32FrmIdx);
4649
4650 return E_HVD_OK;
4651 }
4652
MDrv_HVD_FreeFrame(MS_U32 u32FrmIdx)4653 HVD_Result MDrv_HVD_FreeFrame(MS_U32 u32FrmIdx)
4654 {
4655 HAL_HVD_SetData(E_HVD_SDATA_DISPQ_STATUS_FREE, u32FrmIdx);
4656
4657 return E_HVD_OK;
4658 }
4659
MDrv_HVD_EnableDispQue(MS_BOOL bEnable)4660 HVD_Result MDrv_HVD_EnableDispQue(MS_BOOL bEnable)
4661 {
4662 HAL_HVD_SetCmd(E_HVD_CMD_ENABLE_DISP_QUEUE, bEnable);
4663
4664 return E_HVD_OK;
4665 }
4666
MDrv_HVD_EnableVSizeAlign(MS_BOOL bEnable)4667 HVD_Result MDrv_HVD_EnableVSizeAlign(MS_BOOL bEnable)
4668 {
4669 return E_HVD_FAIL;
4670 //HAL_HVD_SetCmd(E_HVD_CMD_FORCE_ALIGN_VSIZE, bEnable);
4671
4672 //return E_HVD_OK;
4673 }
4674
MDrv_HVD_Disp_Ignore_Crop(MS_BOOL bEnable)4675 HVD_Result MDrv_HVD_Disp_Ignore_Crop(MS_BOOL bEnable)
4676 {
4677 HVD_Result eRet = E_HVD_FAIL;
4678 _DRV_HVD_Inited(eRet);
4679 _DRV_HVD_Entry();
4680
4681 eRet = (HVD_Result) HAL_HVD_SetCmd(E_HVD_CMD_DISP_IGNORE_CROP, bEnable);
4682
4683 _DRV_HVD_Return(eRet);
4684 }
4685
4686 //------------------------------------------------------------------------------
4687 /// Set HVD FRC drop type.
4688 /// @param u8DropType \b IN : drop type. 0:drop frame, 1:drop field. default:0
4689 /// @return -E_HVD_OK for success; E_HVD_FAIL for failure.
4690 //------------------------------------------------------------------------------
MDrv_HVD_SetFRCDropType(MS_U8 u8DropType)4691 HVD_Result MDrv_HVD_SetFRCDropType(MS_U8 u8DropType)
4692 {
4693 HVD_Result eRet = E_HVD_FAIL;
4694 _DRV_HVD_Inited(eRet);
4695 _DRV_HVD_Entry();
4696
4697 if (u8DropType != 0 && u8DropType != 1)
4698 {
4699 eRet = E_HVD_RET_INVALID_PARAMETER;
4700 _DRV_HVD_Return(eRet);
4701 }
4702
4703 eRet = (HVD_Result)HAL_HVD_SetCmd(E_HVD_CMD_FRC_DROP_MODE, u8DropType);
4704
4705 _DRV_HVD_Return(eRet);
4706 }
4707
4708 //-----------------------------------------------------------------------------
4709 /// @brief \b Function \b Name: MDrv_HVD_GetDrvFwVer()
4710 /// @brief \b Function \b Description: Get driver's FW version
4711 /// @return - Driver's FW version, determined at compile time.
4712 //-----------------------------------------------------------------------------
MDrv_HVD_GetDrvFwVer(void)4713 MS_U32 MDrv_HVD_GetDrvFwVer(void)
4714 {
4715 return HVD_FW_VERSION;
4716 }
4717
4718 //-----------------------------------------------------------------------------
4719 /// @brief \b Function \b Name: MDrv_HVD_GetFwVer()
4720 /// @brief \b Function \b Description: Get driver's FW version
4721 /// @return - FW version obtained by querying FW
4722 //-----------------------------------------------------------------------------
MDrv_HVD_GetFwVer(void)4723 MS_U32 MDrv_HVD_GetFwVer(void)
4724 {
4725 return HAL_HVD_GetData(E_HVD_GDATA_FW_VERSION_ID);
4726 }
4727
4728 //------------------------------------------------------------------------------
4729 /// Get SEI USER DATA Info
4730 /// @param pUsrInfo \b OUT : Get CC USER Data info
4731 /// @return -E_HVD_OK for success; E_HVD_FAIL for failure.
4732 //------------------------------------------------------------------------------
MDrv_HVD_GetUserDataInfo(HVD_UserData_Info * pUsrInfo)4733 HVD_Result MDrv_HVD_GetUserDataInfo(HVD_UserData_Info* pUsrInfo)
4734 {
4735 HVD_Result eRet = E_HVD_FAIL;
4736 MS_U32 u32UserDataIdxSize = 0;
4737 MS_U32 u32UsrDataIdxWptr = 0xFFFFFFFF;
4738 MS_U32 u32UserDataSize = 0;
4739 MS_U32 u32UserDataAddr = 0;
4740 DTV_BUF_type* pHVD_User_Data = NULL;
4741
4742 _DRV_HVD_Inited(eRet);
4743 _DRV_HVD_Entry();
4744
4745 u32UserDataIdxSize = (MS_U32)HAL_HVD_GetData(E_HVD_GDATA_USERDATA_IDX_TBL_SIZE);
4746 u32UsrDataIdxWptr = MDrv_HVD_GetUserData_Wptr();
4747
4748 if (u32UsrDataIdxWptr != 0xFFFFFFFF)
4749 {
4750 gHVDCtrl.u32UsrDataWr = u32UsrDataIdxWptr;
4751 }
4752
4753 if (gHVDCtrl.u32UsrDataRd == gHVDCtrl.u32UsrDataWr)
4754 { // User Data Buffer Empty
4755 _DRV_HVD_Return(eRet);
4756 }
4757
4758 u32UserDataAddr = MDrv_HVD_GetUserData_Packet( gHVDCtrl.u32UsrDataRd, (MS_U32*)&u32UserDataSize );
4759 u32UserDataAddr += gHVDCtrl.MemMap.u32CodeBufVAddr; // change to virtual address
4760
4761 pHVD_User_Data = (DTV_BUF_type*)u32UserDataAddr;
4762
4763 pUsrInfo->u16TmpRef = pHVD_User_Data->u16TempRefCnt;
4764 pUsrInfo->u8PicStruct = pHVD_User_Data->pic_struct;
4765 pUsrInfo->u8PicType = pHVD_User_Data->type;
4766 pUsrInfo->u32Pts = pHVD_User_Data->pts;
4767 pUsrInfo->u8ByteCnt = pHVD_User_Data->len;
4768 pUsrInfo->u32DataBuf = (MS_U32)pHVD_User_Data->buf;
4769
4770 gHVDCtrl.u32UsrDataRd++;
4771
4772 if (gHVDCtrl.u32UsrDataRd >= u32UserDataIdxSize)
4773 {
4774 gHVDCtrl.u32UsrDataRd = 0;
4775 }
4776
4777 eRet = E_HVD_OK;
4778
4779 _DRV_HVD_Return(eRet);
4780 }
4781
4782 //------------------------------------------------------------------------------
4783 /// @brief \b Function \b Name: MDrv_HVD_GetUsrDataIsAvailable()
4784 /// @brief \b Function \b Description: Is there new user data info.
4785 /// @return - TRUE/ FALSE
4786 /// @retval -FALSE(0): no new user data info
4787 /// @retval -TRUE(1): has new user data info
4788 //------------------------------------------------------------------------------
MDrv_HVD_GetUsrDataIsAvailable(void)4789 MS_BOOL MDrv_HVD_GetUsrDataIsAvailable(void)
4790 {
4791 MS_U32 u32UsrDataIdxWptr = 0xFFFFFFFF;
4792 u32UsrDataIdxWptr = MDrv_HVD_GetUserData_Wptr();
4793
4794 if (u32UsrDataIdxWptr != 0xFFFFFFFF)
4795 {
4796 gHVDCtrl.u32UsrDataWr = u32UsrDataIdxWptr;
4797 }
4798
4799 return !(gHVDCtrl.u32UsrDataWr == gHVDCtrl.u32UsrDataRd);
4800 }
4801
4802 //------------------------------------------------------------------------------
4803 /// Set HVD DTV User Data Packet Mode
4804 /// @param u8UserDataMode \b IN : User Data Packet Mode. 0: DVB normal, 1: ATSC DirectTV. default:0
4805 /// @return -E_HVD_OK for success; E_HVD_FAIL for failure.
4806 //------------------------------------------------------------------------------
MDrv_HVD_SetDTVUserDataMode(MS_U8 u8UserDataMode)4807 HVD_Result MDrv_HVD_SetDTVUserDataMode(MS_U8 u8UserDataMode)
4808 {
4809 HVD_Result eRet = E_HVD_FAIL;
4810 _DRV_HVD_Inited(eRet);
4811 _DRV_HVD_Entry();
4812
4813 if (u8UserDataMode == 0)
4814 { // Noraml DVB USER DATA
4815 eRet = (HVD_Result)HAL_HVD_SetCmd(E_HVD_CMD_SET_USERDATA_MODE, 0);
4816 }
4817 else if (u8UserDataMode == 1)
4818 { //
4819 eRet = (HVD_Result)HAL_HVD_SetCmd(E_HVD_CMD_SET_USERDATA_MODE, 1);
4820 }
4821
4822 _DRV_HVD_Return(eRet);
4823 }
4824
4825 //------------------------------------------------------------------------------
4826 /// Force into interlace mode
4827 /// @param u8Mode \b IN : 0: Disable, 1: Enable
4828 /// @return -E_HVD_OK for success; E_HVD_FAIL for failure.
4829 //------------------------------------------------------------------------------
MDrv_HVD_ForceInterlaceMode(MS_U8 u8Mode)4830 HVD_Result MDrv_HVD_ForceInterlaceMode(MS_U8 u8Mode)
4831 {
4832 HVD_Result eRet = E_HVD_FAIL;
4833 _DRV_HVD_Inited(eRet);
4834 _DRV_HVD_Entry();
4835
4836 if (u8Mode == 0)
4837 { // Noraml DVB USER DATA
4838 eRet = (HVD_Result)HAL_HVD_SetCmd(E_HVD_CMD_FORCE_INTERLACE, 0);
4839 }
4840 else if (u8Mode == 1)
4841 { //
4842 eRet = (HVD_Result)HAL_HVD_SetCmd(E_HVD_CMD_FORCE_INTERLACE, 1);
4843 }
4844
4845 _DRV_HVD_Return(eRet);
4846 }
4847
4848 //------------------------------------------------------------------------------
4849 /// Show Decode Order
4850 /// @param u8Mode \b IN : 0: Disable, 1: Enable
4851 /// @return -E_HVD_OK for success; E_HVD_FAIL for failure.
4852 //------------------------------------------------------------------------------
MDrv_HVD_ShowDecodeOrder(MS_U8 u8Mode)4853 HVD_Result MDrv_HVD_ShowDecodeOrder(MS_U8 u8Mode)
4854 {
4855 HVD_Result eRet = E_HVD_FAIL;
4856 _DRV_HVD_Inited(eRet);
4857 _DRV_HVD_Entry();
4858
4859 if (u8Mode == 0)
4860 { // Display Order
4861 eRet = (HVD_Result)HAL_HVD_SetCmd(E_HVD_CMD_SHOW_DECODE_ORDER, 0);
4862 }
4863 else if (u8Mode == 1)
4864 { // Decode Order
4865 eRet = (HVD_Result)HAL_HVD_SetCmd(E_HVD_CMD_SHOW_DECODE_ORDER, 1);
4866 }
4867
4868 _DRV_HVD_Return(eRet);
4869 }
4870
4871 //-----------------------------------------------------------------------------
4872 /// @brief \b Function \b Name: MDrv_HVD_GetFrmRateIsSupported()
4873 /// @brief \b Function \b Description: Get if the framerate is supported
4874 /// @return -The result of supported or not.
4875 //-----------------------------------------------------------------------------
MDrv_HVD_GetFrmRateIsSupported(void)4876 MS_BOOL MDrv_HVD_GetFrmRateIsSupported(void)
4877 {
4878 HVD_Disp_Info stInfo;
4879 if (E_HVD_OK != _DRV_HVD_GetDispInfo(&stInfo, FALSE))
4880 {
4881 return FALSE;
4882 }
4883 return HAL_HVD_GetFrmRateIsSupported(stInfo.u16HorSize, stInfo.u16VerSize, stInfo.u32FrameRate);
4884 }
4885
4886
4887 //-----------------------------------------------------------------------------
4888 /// @brief \b Function \b Name: MDrv_HVD_GetFrmPackingArrSEI()
4889 /// @brief \b Function \b Description: Get if the Frame packing arrangement SEI data
4890 /// @param -bEnable \b IN : The frame packing SEI struct
4891 /// @return -The result of got the info. or not.
4892 //-----------------------------------------------------------------------------
MDrv_HVD_GetFrmPackingArrSEI(HVD_FrmPackingSEI * pFrmPacking)4893 HVD_Result MDrv_HVD_GetFrmPackingArrSEI(HVD_FrmPackingSEI *pFrmPacking)
4894 {
4895
4896 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
4897 MS_U32 u32FPAFrameAddr = 0 ;
4898 HVD_Frame_packing_SEI *pFrmPackingSrc = NULL;
4899
4900 _DRV_HVD_Inited(E_HVD_FAIL);
4901 u32FPAFrameAddr = HAL_HVD_GetData(E_HVD_GDATA_FRM_PACKING_SEI_DATA);
4902 u32FPAFrameAddr += gHVDCtrl.MemMap.u32CodeBufVAddr; // change to virtual address
4903 pFrmPackingSrc = (HVD_Frame_packing_SEI *)u32FPAFrameAddr;
4904 if((pFrmPacking != NULL) && (pFrmPackingSrc->bvaild == TRUE))
4905 {
4906 pFrmPacking->u8Frm_packing_arr_cnl_flag = pFrmPackingSrc->u8Frm_packing_arr_cnl_flag;
4907 pFrmPacking->u8Frm_packing_arr_type = pFrmPackingSrc->u8Frm_packing_arr_type;
4908 pFrmPacking->u8content_interpretation_type = pFrmPackingSrc->u8content_interpretation_type;
4909
4910 pFrmPacking->u1Quincunx_sampling_flag = pFrmPackingSrc->u1Quincunx_sampling_flag;
4911
4912 pFrmPacking->u1Spatial_flipping_flag = pFrmPackingSrc->u1Spatial_flipping_flag;
4913 pFrmPacking->u1Frame0_flipping_flag = pFrmPackingSrc->u1Frame0_flipping_flag;
4914 pFrmPacking->u1Field_views_flag = pFrmPackingSrc->u1Field_views_flag;
4915 pFrmPacking->u1Current_frame_is_frame0_flag = pFrmPackingSrc->u1Current_frame_is_frame0_flag;
4916
4917 pFrmPacking->u1Frame0_self_contained_flag = pFrmPackingSrc->u1Frame0_self_contained_flag;
4918 pFrmPacking->u1Frame1_self_contained_flag = pFrmPackingSrc->u1Frame1_self_contained_flag;
4919 pFrmPacking->u4Frame0_grid_position_x = pFrmPackingSrc->u4Frame0_grid_position_x;
4920 pFrmPacking->u4Frame0_grid_position_y = pFrmPackingSrc->u4Frame0_grid_position_y;
4921
4922 pFrmPacking->u4Frame1_grid_position_x = pFrmPackingSrc->u4Frame1_grid_position_x;
4923 pFrmPacking->u4Frame1_grid_position_y = pFrmPackingSrc->u4Frame1_grid_position_y;
4924
4925 eRet = E_HVD_OK;
4926 }
4927 else
4928 {
4929 eRet = E_HVD_FAIL;
4930 }
4931 return eRet;
4932
4933 }
4934
4935 //-----------------------------------------------------------------------------
4936 /// @brief \b Function \b Name: MDrv_HVD_SetHVDClockSpeed()
4937 /// @brief \b Function \b Description: set hvd clock speed
4938 /// @return - The result of setting hvd clock speed
4939 //-----------------------------------------------------------------------------
MDrv_HVD_SetHVDClockSpeed(HVD_ClockSpeed eClockSpeed)4940 HVD_Result MDrv_HVD_SetHVDClockSpeed(HVD_ClockSpeed eClockSpeed)
4941 {
4942 #if defined(CHIP_A3) || defined(CHIP_K1)|| defined(CHIP_KELTIC) || defined(CHIP_KAPPA)
4943 HAL_HVD_ClockSpeed eHVDClockSpeed = E_HAL_HVD_CLOCK_SPEED_NONE;
4944 switch (eClockSpeed)
4945 {
4946 case E_HVD_CLOCK_SPEED_HIGHEST:
4947 eHVDClockSpeed = E_HAL_HVD_CLOCK_SPEED_HIGHEST;
4948 break;
4949 case E_HVD_CLOCK_SPEED_HIGH:
4950 eHVDClockSpeed = E_HAL_HVD_CLOCK_SPEED_HIGH;
4951 break;
4952 case E_HVD_CLOCK_SPEED_MEDIUM:
4953 eHVDClockSpeed = E_HAL_HVD_CLOCK_SPEED_MEDIUM;
4954 break;
4955 case E_HVD_CLOCK_SPEED_LOW:
4956 eHVDClockSpeed = E_HAL_HVD_CLOCK_SPEED_LOW;
4957 break;
4958 case E_HVD_CLOCK_SPEED_LOWEST:
4959 eHVDClockSpeed = E_HAL_HVD_CLOCK_SPEED_LOWEST;
4960 break;
4961 case E_HVD_CLOCK_SPEED_DEFAULT:
4962 eHVDClockSpeed = E_HAL_HVD_CLOCK_SPEED_DEFAULT;
4963 break;
4964 default:
4965 HVD_MSG_ERR("hvd clock setting is wrong(%d)\n", eClockSpeed);
4966 return E_HVD_FAIL;
4967 break;
4968 }
4969
4970 if(E_HVD_RETURN_SUCCESS != HAL_HVD_SetClockSpeed(eHVDClockSpeed))
4971 {
4972 return E_HVD_FAIL;
4973 }
4974 return E_HVD_OK;
4975 #else
4976 UNUSED(eClockSpeed);
4977 printf("This chip does not support hvd clock presetting~\n");
4978 return E_HVD_RET_UNSUPPORTED;
4979 #endif
4980 }
4981
4982 //-----------------------------------------------------------------------------
4983 /// @brief \b Function \b Name: MDrv_HVD_SetVPUClockSpeed()
4984 /// @brief \b Function \b Description: set vpu clock speed
4985 /// @return - The result of setting vpu clock speed
4986 //-----------------------------------------------------------------------------
MDrv_HVD_SetVPUClockSpeed(HVD_ClockSpeed eClockSpeed)4987 HVD_Result MDrv_HVD_SetVPUClockSpeed(HVD_ClockSpeed eClockSpeed)
4988 {
4989 #if defined(CHIP_A3) || defined(CHIP_K1)|| defined(CHIP_KELTIC)
4990 HAL_VPU_ClockSpeedType eVPUClockSpeed = E_HAL_VPU_CLOCK_SPEED_NONE;
4991 switch (eClockSpeed)
4992 {
4993 case E_HVD_CLOCK_SPEED_HIGHEST:
4994 eVPUClockSpeed = E_HAL_VPU_CLOCK_SPEED_HIGHEST;
4995 break;
4996 case E_HVD_CLOCK_SPEED_HIGH:
4997 eVPUClockSpeed = E_HAL_VPU_CLOCK_SPEED_HIGH;
4998 break;
4999 case E_HVD_CLOCK_SPEED_MEDIUM:
5000 eVPUClockSpeed = E_HAL_VPU_CLOCK_SPEED_MEDIUM;
5001 break;
5002 case E_HVD_CLOCK_SPEED_LOW:
5003 eVPUClockSpeed = E_HAL_VPU_CLOCK_SPEED_LOW;
5004 break;
5005 case E_HVD_CLOCK_SPEED_LOWEST:
5006 eVPUClockSpeed = E_HAL_VPU_CLOCK_SPEED_LOWEST;
5007 break;
5008 case E_HVD_CLOCK_SPEED_DEFAULT:
5009 eVPUClockSpeed = E_HAL_VPU_CLOCK_SPEED_DEFAULT;
5010 break;
5011 default:
5012 HVD_MSG_ERR("vpu clock setting is wrong(%d)\n", eVPUClockSpeed);
5013 return E_HVD_RETURN_FAIL;
5014 break;
5015 }
5016
5017 if(FALSE == HAL_VPU_SetClockSpeedType(eVPUClockSpeed))
5018 {
5019 return E_HVD_FAIL;
5020 }
5021
5022 return E_HVD_OK;
5023 #else
5024 UNUSED(eClockSpeed);
5025 printf("This chip does not support vpu clock presetting~\n");
5026 return E_HVD_RET_UNSUPPORTED;
5027 #endif
5028 }
5029
5030
5031
5032
_HVD_CC_Update_UserData_Wptr(void)5033 static MS_U32 _HVD_CC_Update_UserData_Wptr(void)
5034 {
5035
5036
5037 HVD_CC_Info *pCCInfo = &(gHVDCtrl.CloseCaptionInfo);
5038 MS_U32 u32UsrDataIdxWptr = MDrv_HVD_GetUserData_Wptr();
5039
5040 if (u32UsrDataIdxWptr != 0xFFFFFFFF)
5041 pCCInfo->u32FWUsrDataWIdx = u32UsrDataIdxWptr;
5042
5043 return pCCInfo->u32FWUsrDataWIdx;
5044 }
5045
5046
_HVD_CC_Parse_AFD_data(MS_U8 ** pUserDataBuf)5047 static void _HVD_CC_Parse_AFD_data(MS_U8 **pUserDataBuf)
5048 {
5049 MS_BOOL bActiveFormatFlag;
5050 MS_U8 u8ActiveFormat;
5051
5052 bActiveFormatFlag = ((*((*pUserDataBuf)++) & 0x40) == 0x40);
5053 if (bActiveFormatFlag)
5054 {
5055 u8ActiveFormat = (**pUserDataBuf) & 0x0F;
5056 }
5057 (*pUserDataBuf)++;
5058
5059
5060 }
5061
_HVD_CC_Parse_BAR_data(MS_U8 ** pUserDataBuf)5062 static void _HVD_CC_Parse_BAR_data(MS_U8 **pUserDataBuf)
5063 {
5064
5065 MS_BOOL bTopBarFlag, bBottomBarFlag, bLeftBarFlag, bRightBarlag;
5066 MS_S16 s16RectTop, s16RectBottom, s16RectLeft, s16RectRight;
5067
5068 MS_U16 u16Val;
5069 bTopBarFlag = (((**pUserDataBuf) & 0x80) == 0x80); //u_f(1,"top_bar_flag");
5070 bBottomBarFlag = (((**pUserDataBuf) & 0x40) == 0x40); //u_f(1,"bottom_bar_flag");
5071 bLeftBarFlag = (((**pUserDataBuf) & 0x20) == 0x20); //u_f(1,"left_bar_flag");
5072 bRightBarlag = ((*((*pUserDataBuf)++) & 0x10) == 0x10); //u_f(1,"right_bar_flag"); u_f(4,"reserved");
5073
5074 if (bTopBarFlag)
5075 {
5076 u16Val = ((**pUserDataBuf) << 8) | (*((*pUserDataBuf)+1));
5077 s16RectTop = u16Val & 0x3FFF; //u_f(2,"marker_bits"); u_f(14,"line_number_end_of_top_bar");
5078 *pUserDataBuf += 2;
5079 }
5080 else
5081 s16RectTop = 0;
5082
5083 if (bBottomBarFlag)
5084 {
5085 u16Val = (**pUserDataBuf << 8) | (*(*pUserDataBuf+1)); //u_f(2,"marker_bits"); u_f(14,"line_number_end_of_bottom_bar");
5086 s16RectBottom = u16Val & 0x3FFF;
5087 *pUserDataBuf += 2;
5088 }
5089 else
5090 s16RectBottom = 0;
5091
5092 if (bLeftBarFlag)
5093 {
5094 u16Val = ((**pUserDataBuf) << 8) | (*(*pUserDataBuf+1)); //u_f(2,"marker_bits"); u_f(14,"line_number_end_of_left_bar");
5095 s16RectLeft = u16Val & 0x3FFF;
5096 *pUserDataBuf += 2;
5097 }
5098 else
5099 s16RectLeft = 0;
5100
5101 if (bRightBarlag)
5102 {
5103 u16Val = ((**pUserDataBuf) << 8) | (*(*pUserDataBuf+1)); //u_f(2,"marker_bits"); u_f(14,"line_number_end_of_right_bar");
5104 s16RectRight = u16Val & 0x3FFF;
5105 *pUserDataBuf += 2;
5106 }
5107 else
5108 s16RectRight = 0;
5109
5110 }
5111
5112
5113
_HVD_CC_Parse_CC_data(MS_U8 u8CCMode,MS_U8 ** pSrc,MS_U8 * pDst608,MS_U32 * pu32Dst608Len,MS_U8 * pDst708,MS_U32 * pu32Dst708Len,HVD_CC_608EnhanceInfo * pEhInfo608)5114 static void _HVD_CC_Parse_CC_data(MS_U8 u8CCMode,MS_U8 **pSrc, MS_U8 *pDst608, MS_U32 *pu32Dst608Len, MS_U8 *pDst708, MS_U32 *pu32Dst708Len, HVD_CC_608EnhanceInfo *pEhInfo608)
5115 {
5116
5117 HVD_CC_Info *pCCInfo = &(gHVDCtrl.CloseCaptionInfo);
5118
5119 MS_U32 i,j;
5120 MS_U32 u32CC_Count;
5121 MS_U8 u8CC_Code;
5122 MS_U8 u8CC_Type;
5123 MS_U8 u8CC_Data1, u8CC_Data2;
5124 MS_U32 u32Pad;
5125
5126
5127
5128 u8CC_Code = *((*pSrc)++); //u_f(8,"cc_data_flag cc_count");
5129
5130 u32CC_Count = u8CC_Code & 0x1F; // cc_count
5131 if (!(u8CC_Code & 0x40)) return; // process_cc_data_flag
5132
5133
5134
5135 (*pSrc)++; //u_f(8,"reserved 1");
5136
5137
5138
5139 for (i=0;i<u32CC_Count;i++)
5140 {
5141 MS_U8 u8Code;
5142
5143
5144 u8Code = *((*pSrc)++); // u_f(8,"cc_valid and cc_type");
5145
5146
5147 u8CC_Type = u8Code & 0x03;
5148
5149 u8CC_Data1 = *((*pSrc)++); // u_f(8,"cc_data_1");
5150 u8CC_Data2 = *((*pSrc)++); // u_f(8,"cc_data_2");
5151
5152 if (!(u8Code & 0x04)) continue; // cc_valid
5153
5154 //NTSC CC 608
5155 if ((u8CC_Type == 0) || (u8CC_Type == 1))
5156 {
5157 //g_DTV_CC.ntsc_cc_data[g_DTV_CC.NTSC_element++] = (cc_type << 16) | (cc_data2 << 8) | (cc_data1);
5158
5159 if(pCCInfo->b608InfoEnhance)
5160 {
5161 if( ( (*pu32Dst608Len) + 16) > MAX_608_CC_LEN)
5162 {
5163 HVD_MSG_ERR("u32Dst608Len+16: %ld is larger than MAX_608_CC_LEN !! \n",((*pu32Dst608Len)+16));
5164 return;
5165 }
5166 }
5167 else
5168 {
5169 if( ( (*pu32Dst608Len) + 4) > MAX_608_CC_LEN)
5170 {
5171 HVD_MSG_ERR("u32Dst608Len+4: %ld is larger than MAX_608_CC_LEN !! \n",((*pu32Dst608Len)+4));
5172 return;
5173 }
5174 }
5175
5176 pDst608[(*pu32Dst608Len)++] = u8CC_Data1;
5177 pDst608[(*pu32Dst608Len)++] = u8CC_Data2;
5178 pDst608[(*pu32Dst608Len)++] = u8CC_Type;
5179 pDst608[(*pu32Dst608Len)++] = 0;
5180
5181 if (pCCInfo->b608InfoEnhance)
5182 {
5183 // PTS searched_pts;
5184 //search_pts(pContext, &searched_pts);
5185 pDst608[(*pu32Dst608Len)++] = (pEhInfo608->u16TmpRef&0xff);
5186 pDst608[(*pu32Dst608Len)++] = ((pEhInfo608->u16TmpRef>>8)&0xff);
5187 pDst608[(*pu32Dst608Len)++] = (pEhInfo608->u16PicStruct&0xff);
5188 pDst608[(*pu32Dst608Len)++] = ((pEhInfo608->u16PicStruct>>8)&0xff);
5189 pDst608[(*pu32Dst608Len)++] = (pEhInfo608->u32Pts&0xff);
5190 pDst608[(*pu32Dst608Len)++] = ((pEhInfo608->u32Pts>>8)&0xff);
5191 pDst608[(*pu32Dst608Len)++] = ((pEhInfo608->u32Pts>>16)&0xff);
5192 pDst608[(*pu32Dst608Len)++] = ((pEhInfo608->u32Pts>>24)&0xff);
5193 pDst608[(*pu32Dst608Len)++] = pEhInfo608->u8UsrDataCnt;
5194
5195 // for enhance cc-608 data dump, 16bytes/pkt
5196 u32Pad = (*pu32Dst608Len) & 0xf; //align to 16 byte
5197 if(u32Pad) u32Pad = 16-u32Pad;
5198 for(j=0;j<u32Pad;j++)
5199 pDst608[(*pu32Dst608Len)++] = 0xff;
5200
5201 }
5202
5203
5204
5205
5206 }
5207 else // ATSC_CC 708
5208 {
5209 if( ( (*pu32Dst708Len) + 4) > MAX_708_CC_LEN)
5210 {
5211 HVD_MSG_ERR(" u32Dst708Len+4: %ld is larger than MAX_708_CC_LEN !! \n",((*pu32Dst708Len)+4));
5212 return;
5213 }
5214 pDst708[(*pu32Dst708Len)++] = u8CC_Data1;
5215 pDst708[(*pu32Dst708Len)++] = u8CC_Data2;
5216 pDst708[(*pu32Dst708Len)++] = u8CC_Type;
5217 pDst708[(*pu32Dst708Len)++] = 0;
5218
5219 }
5220 //new DTV CC header
5221
5222 }
5223
5224
5225
5226 //padding cc608
5227
5228
5229 if(u8CCMode & (CC_NTSC1|CC_NTSC2))
5230 {
5231 if (pCCInfo->b608InfoEnhance==0)
5232 { // for original cc-608 data dump, 16bytes/pkt
5233
5234
5235 u32Pad = (*pu32Dst608Len) & 0xf;
5236 if(u32Pad) u32Pad = 16 - u32Pad;
5237
5238 if((u32Pad + (*pu32Dst608Len)) > MAX_608_CC_LEN)
5239 {
5240 HVD_MSG_ERR("u32Dst608Len:%ld + u32Pad: %ld is larger than MAX_608_CC_LEN !! \n",(*pu32Dst608Len), u32Pad);
5241 return;
5242 }
5243 for(i=0;i<u32Pad;i++)
5244 pDst608[(*pu32Dst608Len)++] = 0xff;
5245 }
5246 }
5247
5248
5249 }
5250
5251
5252
_HVD_CC_Extract_CCdata(MS_U8 * pDst608Buf,MS_U32 * pu32Dst608Len,MS_U8 * pDst708Buf,MS_U32 * pu32Dst708Len,DTV_BUF_type * pUserData)5253 static void _HVD_CC_Extract_CCdata(MS_U8 *pDst608Buf ,MS_U32 *pu32Dst608Len,MS_U8 *pDst708Buf ,MS_U32 *pu32Dst708Len, DTV_BUF_type* pUserData)
5254 {
5255
5256
5257 HVD_CC_Info *pCCInfo = &(gHVDCtrl.CloseCaptionInfo);
5258
5259
5260
5261 MS_U8 * pUserDataStartBuf = &pUserData->buf[0];//&pSrcBuf[0];
5262 MS_U8 * pUserDataBuf;
5263
5264 //if(pCCInfo->u8UserDataMode == USER_DATA_MODE_DIRECTTV_CC)
5265 // pUserDataBuf = &pUserData->buf[0];
5266 //else
5267 pUserDataBuf = &pUserData->buf[6];
5268
5269
5270 HVD_CC_608EnhanceInfo stEhInfo608;
5271 stEhInfo608.u16TmpRef = pUserData->u16TempRefCnt;
5272 stEhInfo608.u16PicStruct = (MS_U16)pUserData->pic_struct;
5273 stEhInfo608.u32Pts = pUserData->pts;
5274 stEhInfo608.u8UsrDataCnt = 0;
5275
5276
5277
5278
5279 #if 0
5280 if(pCCInfo->u8UserDataMode == USER_DATA_MODE_DIRECTTV_CC)
5281 {
5282 MS_U32 dvb_code;
5283
5284 dvb_code = (*pUserDataBuf << 24) | (*(pUserDataBuf+1) << 16) | (*(pUserDataBuf+2) << 8) | *(pUserDataBuf+3); //(u_f(16,"provider_code") << 16) | u_f(16,"provider_code");
5285 pUserDataBuf += 4;
5286
5287 if (dvb_code == DTV_DTB1_CODE)
5288 {
5289 MS_U8 code;
5290
5291 code = *pUserDataBuf++; //u_f(8,"code");
5292
5293 if (code == DTV_CC_CODE)
5294 {
5295 _HVD_CC_Parse_CC_data(pCCInfo->u8ParsingStatus,&pUserDataBuf, pDst608Buf, u32Dst608Len, pDst708Buf, u32Dst708Len, &EhInfo608);
5296 }
5297 //#ifdef PAN_SCAN
5298 else if (code == DTV_BAR_CODE)
5299 {
5300 _HVD_CC_Parse_BAR_data(&pUserDataBuf);
5301 }
5302 //#endif
5303 }
5304 //#ifdef PAN_SCAN
5305 else if (dvb_code == DTV_AFD_CODE)
5306 {
5307 _HVD_CC_Parse_AFD_data(&pUserDataBuf);
5308 }
5309
5310
5311 }
5312 else
5313 #endif
5314
5315 {
5316 if (*pUserDataBuf++ == T35_DVB_COUNTRY_CODE)
5317 {
5318 MS_U16 itu_t_t35_provider_code;
5319
5320 itu_t_t35_provider_code = (*pUserDataBuf << 8) | (*(pUserDataBuf+1)); //u_f(16,"provider_code");
5321 pUserDataBuf += 2;
5322
5323 if (itu_t_t35_provider_code == T35_DVB_PROVIDER_CODE)
5324 {
5325 MS_U32 dvb_code;
5326
5327 dvb_code = (*pUserDataBuf << 24) | (*(pUserDataBuf+1) << 16) | (*(pUserDataBuf+2) << 8) | *(pUserDataBuf+3); //(u_f(16,"provider_code") << 16) | u_f(16,"provider_code");
5328 pUserDataBuf += 4;
5329
5330 if (dvb_code == DTV_DTB1_CODE)
5331 {
5332 MS_U8 code;
5333
5334 code = *pUserDataBuf++; //u_f(8,"code");
5335
5336 if (code == DTV_CC_CODE)
5337 {
5338 _HVD_CC_Parse_CC_data(pCCInfo->u8ParsingStatus,&pUserDataBuf, pDst608Buf, pu32Dst608Len, pDst708Buf, pu32Dst708Len, &stEhInfo608);
5339 }
5340 else if (code == DTV_BAR_CODE)
5341 {
5342 _HVD_CC_Parse_BAR_data(&pUserDataBuf);
5343 }
5344
5345 }
5346 else if (dvb_code == DTV_AFD_CODE)
5347 {
5348 _HVD_CC_Parse_AFD_data(&pUserDataBuf);
5349 }
5350
5351 }
5352 }
5353 }
5354
5355 if((pUserDataBuf - pUserDataStartBuf) > pUserData->len)
5356 HVD_MSG_ERR("ERROR!!!! (pUserDataBuf - pUserDataStartBuf) > u32SrcLen\n");
5357
5358
5359 }
5360
5361
5362
5363
_HVD_CC_RB_Have_Avail_Space(MS_U8 u8CC608,MS_U32 u32QuerySize)5364 static MS_BOOL _HVD_CC_RB_Have_Avail_Space(MS_U8 u8CC608, MS_U32 u32QuerySize)
5365 {
5366 HVD_CC_Info *pCCInfo = &(gHVDCtrl.CloseCaptionInfo);
5367 MS_U32 u32RingBufVacancy = pCCInfo->u32RingBufVacancy[u8CC608];
5368 MS_U32 u32AlignCCLen;
5369
5370 if ((u32QuerySize % HVD_CCRB_PACKET_LENGTH) != 0)
5371 {
5372 u32AlignCCLen = HVD_CCRB_PACKET_LENGTH * ((u32QuerySize / HVD_CCRB_PACKET_LENGTH)+1);
5373 }
5374 else
5375 {
5376 u32AlignCCLen = u32QuerySize;
5377 }
5378
5379
5380 if(u32RingBufVacancy >= u32AlignCCLen)
5381 return TRUE;
5382 else
5383 return FALSE;
5384
5385
5386 }
5387
5388
5389
_HVD_CC_Copy_CCdata_To_RB(MS_U8 u8CC608,MS_U8 * pSrcBuf,MS_U32 u32SrcLen)5390 static MS_BOOL _HVD_CC_Copy_CCdata_To_RB(MS_U8 u8CC608,MS_U8 *pSrcBuf, MS_U32 u32SrcLen)
5391 {
5392 HVD_CC_Info *pCCInfo = &(gHVDCtrl.CloseCaptionInfo);
5393
5394 MS_U32 u32RingBufRPAddr = pCCInfo->u32RingBufRPAddr[u8CC608];
5395 MS_U32 u32RingBufWPAddr = pCCInfo->u32RingBufWPAddr[u8CC608];
5396 MS_U32 u32AlignCCLen;
5397
5398
5399
5400 if(u32SrcLen == 0)
5401 return FALSE;
5402
5403
5404 if ((u32SrcLen % HVD_CCRB_PACKET_LENGTH) != 0)
5405 {
5406 u32AlignCCLen = HVD_CCRB_PACKET_LENGTH * ((u32SrcLen / HVD_CCRB_PACKET_LENGTH)+1);
5407 }
5408 else
5409 {
5410 u32AlignCCLen = u32SrcLen;
5411 }
5412
5413 if(pCCInfo->u32RingBufVacancy[u8CC608] < u32AlignCCLen)
5414 {
5415 HVD_MSG_ERR("overflow !!!, u32RingBufVacancy: %ld, u32AlignLen: %ld\n",pCCInfo->u32RingBufVacancy[u8CC608], u32AlignCCLen);
5416 return TRUE;
5417 }
5418
5419
5420 if(u32RingBufWPAddr >= u32RingBufRPAddr)
5421 {
5422 if( (u32RingBufWPAddr + u32AlignCCLen) <= (pCCInfo->u32RingBufStartPAddr[u8CC608] + pCCInfo->u32RingBufLen[u8CC608]))
5423 {
5424
5425 HVD_memcpy((void *)(HVD_PA2VA(u32RingBufWPAddr)), (void *)pSrcBuf, u32AlignCCLen);
5426
5427
5428 if((pCCInfo->u32RingBufWPAddr[u8CC608] + u32AlignCCLen) == (pCCInfo->u32RingBufStartPAddr[u8CC608] + pCCInfo->u32RingBufLen[u8CC608]))
5429 pCCInfo->u32RingBufWPAddr[u8CC608] = pCCInfo->u32RingBufStartPAddr[u8CC608];
5430 else
5431 pCCInfo->u32RingBufWPAddr[u8CC608] += u32AlignCCLen;
5432
5433 pCCInfo->u32RingBufVacancy[u8CC608] -= u32AlignCCLen;
5434
5435 }
5436 else
5437 {
5438 MS_U32 part1_len = (pCCInfo->u32RingBufStartPAddr[u8CC608] + pCCInfo->u32RingBufLen[u8CC608]) - u32RingBufWPAddr;
5439 MS_U32 part2_len = u32AlignCCLen - part1_len;
5440
5441
5442
5443
5444 {
5445
5446
5447 HVD_memcpy((void *)(HVD_PA2VA(u32RingBufWPAddr)),(void *)pSrcBuf, part1_len);
5448
5449 pCCInfo->u32RingBufWPAddr[u8CC608] = u32RingBufWPAddr = pCCInfo->u32RingBufStartPAddr[u8CC608];
5450
5451 HVD_memcpy((void *)(HVD_PA2VA(u32RingBufWPAddr)),(void *)(&pSrcBuf[part1_len]), part2_len);
5452
5453 pCCInfo->u32RingBufWPAddr[u8CC608] = u32RingBufWPAddr = pCCInfo->u32RingBufStartPAddr[u8CC608] + part2_len;
5454 pCCInfo->u32RingBufVacancy[u8CC608] -= u32AlignCCLen;
5455 }
5456
5457 }
5458
5459 }
5460 else
5461 {
5462
5463
5464 {
5465
5466 HVD_memcpy((void *)(HVD_PA2VA(u32RingBufWPAddr)), (void *)pSrcBuf, u32AlignCCLen);
5467 pCCInfo->u32RingBufWPAddr[u8CC608] += u32AlignCCLen;
5468 pCCInfo->u32RingBufVacancy[u8CC608] -= u32AlignCCLen;
5469 }
5470
5471
5472 }
5473
5474 return FALSE;
5475 }
5476
5477
_HVD_CC_Add_PaddingData_To_608(MS_U8 * pSrcBuf,MS_U32 u32SrcLen)5478 static MS_BOOL _HVD_CC_Add_PaddingData_To_608(MS_U8 *pSrcBuf, MS_U32 u32SrcLen)
5479 {
5480
5481 MS_U32 u32AlignCCLen;
5482 MS_U32 i;
5483 MS_BOOL b608OverFlow;
5484
5485 if ((u32SrcLen % HVD_CCRB_PACKET_LENGTH) != 0)
5486 {
5487 u32AlignCCLen = HVD_CCRB_PACKET_LENGTH * ((u32SrcLen / HVD_CCRB_PACKET_LENGTH)+1);
5488 }
5489 else
5490 {
5491 u32AlignCCLen = u32SrcLen;
5492 }
5493
5494
5495
5496 if(u32AlignCCLen > MAX_608_CC_LEN)
5497 {
5498 HVD_MSG_ERR("u32AlignCCLen:%ld > MAX_608_CC_LEN", u32AlignCCLen);
5499 return TRUE;
5500 }
5501
5502
5503
5504 for(i =0; i < (u32AlignCCLen-u32SrcLen);i++)
5505 pSrcBuf[u32SrcLen+i] = 0xff;// add padinng data
5506
5507 b608OverFlow =_HVD_CC_Copy_CCdata_To_RB(1, &(pSrcBuf[0]), u32AlignCCLen);
5508 return b608OverFlow;
5509
5510 }
5511
_HVD_CC_Add_PaddingData_To_708(MS_U8 * pSrcBuf,MS_U32 u32SrcLen)5512 static MS_BOOL _HVD_CC_Add_PaddingData_To_708(MS_U8 *pSrcBuf, MS_U32 u32SrcLen)
5513 {
5514 HVD_CC_Info *pCCInfo = &(gHVDCtrl.CloseCaptionInfo);
5515
5516 MS_U32 *u32RingBufWAddr = (MS_U32 *)(HVD_PA2VA(pCCInfo->u32RingBufWPAddr[0]));
5517
5518 MS_U8 u8CC_Type, u8CC_Data1, u8CC_Data2,u8Temp;
5519 MS_U16 i,j,u16Pad,u16DataCount;
5520 MS_U8 *pAddr;
5521 MS_U8 u8CCPading[MAX_708_CC_LEN];
5522 MS_BOOL b708OverFlow = FALSE;
5523 u16DataCount = 0;
5524
5525 for(j=0;j<u32SrcLen;j+=4)
5526 {
5527 u8CC_Data1 = *pSrcBuf++;
5528 u8CC_Data2 = *pSrcBuf++;
5529 u8CC_Type = *pSrcBuf++;
5530 u8Temp = *pSrcBuf++;
5531
5532 if(u8CC_Type==3) //padd_out();
5533 {
5534 if( pCCInfo->u32PktLen708 > 0 )
5535 {
5536 u16Pad = pCCInfo->u32PktLen708;
5537 for (i=0;i<u16Pad;i++)
5538 u8CCPading[u16DataCount++] = 0xff;
5539 pCCInfo->u32PktLen708 = 0;
5540 #if 1
5541
5542 pAddr = (MS_U8 *)pCCInfo->u32PktHdrAddr708;
5543 if(pAddr)
5544 {
5545 u8Temp = *pAddr;
5546 u16Pad = (u8Temp&0x3f)<<1;
5547 if((i!=0)&&(u16Pad > i))
5548 {
5549 i = i>>1;
5550 u8Temp = u8Temp - i;
5551 *pAddr = (u8Temp&0xff);
5552 }
5553 }
5554 #endif
5555 }
5556
5557 u16Pad = (pCCInfo->u32RingBufWPAddr[0] + u16DataCount) & 7;
5558 if(u16Pad) u16Pad = HVD_CCRB_PACKET_LENGTH-u16Pad;
5559 for(i=0;i<u16Pad;i++)
5560 u8CCPading[u16DataCount++] = 0xff;
5561
5562
5563 b708OverFlow =_HVD_CC_Copy_CCdata_To_RB(0, u8CCPading, u16DataCount);
5564 if(b708OverFlow)
5565 return TRUE;
5566 pCCInfo->u32PktLen708 = (u8CC_Data1 & 0x3f)*2;
5567 if(pCCInfo->u32PktLen708 == 0) pCCInfo->u32PktLen708 = 128;
5568 u16DataCount = 0;
5569
5570 pCCInfo->u32PktHdrAddr708 = (MS_U32)(u32RingBufWAddr);
5571 }
5572
5573 if(pCCInfo->u32PktLen708 > 0)
5574 {
5575 u8CCPading[u16DataCount++] = u8CC_Data1;
5576 u8CCPading[u16DataCount++] = u8CC_Data2;
5577 pCCInfo->u32PktLen708 = pCCInfo->u32PktLen708 - 2;
5578 }
5579 else
5580 {
5581 pCCInfo->u32PktLen708 = 0;
5582 }
5583 }
5584
5585 if(u16DataCount > 0)
5586 {
5587 if( pCCInfo->u32PktLen708 ==0 )
5588 {
5589 u16Pad = (pCCInfo->u32RingBufWPAddr[0] + u16DataCount) & 7;
5590 if(u16Pad) u16Pad = HVD_CCRB_PACKET_LENGTH-u16Pad;
5591 for(i=0;i<u16Pad;i++)
5592 u8CCPading[u16DataCount++] = 0xff;
5593
5594 }
5595
5596 b708OverFlow = _HVD_CC_Copy_CCdata_To_RB(0, u8CCPading, u16DataCount);
5597 if(b708OverFlow)
5598 return TRUE;
5599 }
5600
5601 return FALSE;
5602
5603 }
5604
5605
5606 ///////////////////////////////////////////////////////////////////////////////
5607 /// Closed Caption Driver Initialization
5608 ///////////////////////////////////////////////////////////////////////////////
MDrv_HVD_CC_Init(void)5609 HVD_Result MDrv_HVD_CC_Init(void)
5610 {
5611 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
5612 HVD_CC_Info *pCCInfo = &(gHVDCtrl.CloseCaptionInfo);
5613
5614
5615 HVD_MSG_TRACE();
5616 _DRV_HVD_Inited(eRet);
5617 _DRV_HVD_Entry();
5618
5619
5620 pCCInfo->u8UserDataMode = USER_DATA_MODE_DVB_NORMAL;
5621
5622 eRet = (HVD_Result)HAL_HVD_SetCmd(E_HVD_CMD_SET_USERDATA_MODE, pCCInfo->u8UserDataMode);
5623
5624 if (pCCInfo->u8ParsingStatus == 0xff)
5625 pCCInfo->u8ParsingStatus = 0x00;
5626
5627 //eRet = E_HVD_OK;
5628 _DRV_HVD_Return(eRet);
5629 }
5630
5631
5632 ///////////////////////////////////////////////////////////////////////////////
5633 /// Set Closed Caption config
5634 /// @param u8Operation \b IN Digital Closed Caption Type
5635 /// @param u16BufferSize \b IN buffer size of the given hardware parser
5636 /// @param u8CC608 \b IN
5637 /// - # TRUE for CC608 parser
5638 /// - # FALSE for CC708 parser
5639 ///////////////////////////////////////////////////////////////////////////////
MDrv_HVD_CC_SetCfg(MS_U8 u8Operation,MS_U16 u16BufferSize,MS_U8 u8CC608)5640 HVD_Result MDrv_HVD_CC_SetCfg(MS_U8 u8Operation, MS_U16 u16BufferSize, MS_U8 u8CC608)
5641 {
5642
5643 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
5644 HVD_CC_Info *pCCInfo = &(gHVDCtrl.CloseCaptionInfo);
5645
5646 HVD_MSG_TRACE();
5647 _DRV_HVD_Inited(eRet);
5648 _DRV_HVD_Entry();
5649
5650
5651
5652 pCCInfo->u32RingBufLen[u8CC608] = pCCInfo->u32RingBufVacancy[u8CC608] = u16BufferSize;
5653 pCCInfo->u8ParsingStatus |= u8Operation;
5654 pCCInfo->u8ParsingStatus &= 0x07;
5655
5656 HVD_MSG_DEG("u8Operation: %x, u16BufferSize:%x, u8CC608:%d\n",u8Operation, u16BufferSize,u8CC608);
5657
5658
5659 if (u8CC608==0x00)
5660 pCCInfo->b708Enable = TRUE;
5661
5662 eRet = E_HVD_OK;
5663 _DRV_HVD_Return(eRet);
5664
5665
5666
5667
5668
5669 }
5670
5671
5672 ///////////////////////////////////////////////////////////////////////////////
5673 /// Set HVD Ring Buffer's Start Address
5674 /// @param u32StartAddress \b IN Ring Buffer's Address
5675 /// @param u8CC608 \b IN
5676 /// - # TRUE for CC608 parser
5677 /// - # FALSE for CC708 parser
5678 ///////////////////////////////////////////////////////////////////////////////
MDrv_HVD_CC_Set_RB_StartAddr(MS_U32 u32StartPAddress,MS_U8 u8CC608)5679 HVD_Result MDrv_HVD_CC_Set_RB_StartAddr(MS_U32 u32StartPAddress, MS_U8 u8CC608)
5680 {
5681 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
5682 HVD_Drv_Ctrl *pCtrl = &gHVDCtrl;
5683 HVD_CC_Info *pCCInfo = &(gHVDCtrl.CloseCaptionInfo);
5684
5685
5686 HVD_MSG_TRACE();
5687 _DRV_HVD_Inited(eRet);
5688 _DRV_HVD_Entry();
5689
5690
5691
5692 if ( (u32StartPAddress & pCtrl->MemMap.u32MIU1BaseAddr) == pCtrl->MemMap.u32MIU1BaseAddr)
5693 {
5694 pCCInfo->bBufMiu1[u8CC608] = TRUE;
5695 }
5696 else
5697 {
5698 pCCInfo->bBufMiu1[u8CC608] = FALSE;
5699 }
5700 HVD_MSG_DEG("u32StartPAddress: 0x%lx ,u8CC608: 0x%x, pCCInfo->bBufMiu1[u8CC608]: %d, pCtrl->MemMap.u32MIU1BaseAddr: 0x%lx\n",
5701 u32StartPAddress , u8CC608,pCCInfo->bBufMiu1[u8CC608], pCtrl->MemMap.u32MIU1BaseAddr);
5702
5703
5704 pCCInfo->u32RingBufStartPAddr[u8CC608] = pCCInfo->u32RingBufRPAddr[u8CC608] = pCCInfo->u32RingBufWPAddr[u8CC608] = u32StartPAddress;
5705 if(pCCInfo->u32RingBufLen[u8CC608] > 0)
5706 pCCInfo->u32RingBufVacancy[u8CC608] = pCCInfo->u32RingBufLen[u8CC608];
5707
5708
5709 _HVD_CC_Update_UserData_Wptr();
5710 pCCInfo->u32FWUsrDataRIdx = /*pCCInfo->u32FWUsrDataPrevWIdx =*/ pCCInfo->u32FWUsrDataWIdx;
5711
5712
5713 eRet = E_HVD_OK;
5714
5715 _DRV_HVD_Return(eRet);
5716
5717
5718 }
5719
5720
5721 ///////////////////////////////////////////////////////////////////////////////
5722 /// Set HVD Ring Buffer's Read Address as Write Address
5723 /// @param u8CC608 \b IN
5724 /// - # TRUE for CC608 parser
5725 /// - # FALSE for CC708 parser
5726 ///////////////////////////////////////////////////////////////////////////////
MDrv_HVD_CC_SyncRB_RdAddr2WrAddr(MS_U8 u8CC608)5727 HVD_Result MDrv_HVD_CC_SyncRB_RdAddr2WrAddr(MS_U8 u8CC608)
5728 {
5729 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
5730
5731 HVD_CC_Info *pCCInfo = &(gHVDCtrl.CloseCaptionInfo);
5732
5733 pCCInfo->u32RingBufRPAddr[u8CC608] = pCCInfo->u32RingBufWPAddr[u8CC608];//u32ReadAddress;
5734 _HVD_CC_Update_UserData_Wptr();
5735 pCCInfo->u32FWUsrDataRIdx = pCCInfo->u32FWUsrDataWIdx;
5736 if(pCCInfo->u32RingBufLen[u8CC608] > 0)
5737 pCCInfo->u32RingBufVacancy[u8CC608] = pCCInfo->u32RingBufLen[u8CC608];
5738 eRet = E_HVD_OK;
5739 _DRV_HVD_Return(eRet);
5740
5741 }
5742
5743
5744 ///////////////////////////////////////////////////////////////////////////////
5745 /// Advance Read Address of HVD CC Ring Buffer by u32EachPacketSize
5746 /// @param u32EachPacketSize \b IN
5747 /// @param u8CC608 \b IN
5748 /// - # TRUE for CC608 parser
5749 /// - # FALSE for CC708 parser
5750 ///////////////////////////////////////////////////////////////////////////////
MDrv_HVD_CC_Adv_RB_ReadAddr(MS_U32 u32EachPacketSize,MS_U8 u8CC608)5751 HVD_Result MDrv_HVD_CC_Adv_RB_ReadAddr(MS_U32 u32EachPacketSize, MS_U8 u8CC608)
5752 {
5753 HVD_Result eRet = E_HVD_FAIL;
5754 HVD_CC_Info *pCCInfo = &(gHVDCtrl.CloseCaptionInfo);
5755 MS_U32 u32ParsedDataSize;
5756
5757 // Get the Parsed Data Size
5758 if ((u32EachPacketSize % HVD_CCRB_PACKET_LENGTH) != 0)
5759 {
5760 u32ParsedDataSize = HVD_CCRB_PACKET_LENGTH * ((u32EachPacketSize / HVD_CCRB_PACKET_LENGTH)+1); //HVD_CCRB_PACKET_LENGTH bytes alignment
5761 }
5762 else
5763 {
5764 u32ParsedDataSize = u32EachPacketSize;
5765 }
5766
5767 if(u32ParsedDataSize > (pCCInfo->u32RingBufLen[u8CC608] - pCCInfo->u32RingBufVacancy[u8CC608]))
5768 {
5769 HVD_MSG_ERR("MDrv_HVD_CC_Adv_RB_ReadAddr fail!, no enough data!, vacancy: %ld, u32ParsedDataSize: %ld, u32RingBufLen:%ld, u32RingBufRPAddr: 0x%lx, u32RingBufWPAddr: 0x%lx\n",
5770 pCCInfo->u32RingBufVacancy[u8CC608], u32ParsedDataSize, pCCInfo->u32RingBufLen[u8CC608], pCCInfo->u32RingBufRPAddr[u8CC608],pCCInfo->u32RingBufWPAddr[u8CC608]);
5771 return E_HVD_FAIL;
5772 }
5773
5774
5775 if ((pCCInfo->u32RingBufRPAddr[u8CC608] + u32ParsedDataSize) < (pCCInfo->u32RingBufStartPAddr[u8CC608] + pCCInfo->u32RingBufLen[u8CC608]))
5776 {
5777 pCCInfo->u32RingBufRPAddr[u8CC608] += u32ParsedDataSize;
5778 }
5779 else
5780 {
5781 pCCInfo->u32RingBufRPAddr[u8CC608] = (u32ParsedDataSize + pCCInfo->u32RingBufRPAddr[u8CC608] - pCCInfo->u32RingBufLen[u8CC608]);
5782 }
5783
5784 pCCInfo->u32RingBufVacancy[u8CC608] += u32ParsedDataSize ;
5785
5786 eRet = E_HVD_OK;
5787 _DRV_HVD_Return(eRet);
5788
5789 }
5790
5791 ///////////////////////////////////////////////////////////////////////////////
5792 /// Stop HVD CC parsing
5793 /// @param u8CC608 \b IN
5794 /// - # TRUE for CC608 parser
5795 /// - # FALSE for CC708 parser
5796 ///////////////////////////////////////////////////////////////////////////////
MDrv_HVD_CC_DisableParsing(MS_U8 u8CC608)5797 HVD_Result MDrv_HVD_CC_DisableParsing(MS_U8 u8CC608)
5798 {
5799
5800 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
5801 HVD_CC_Info *pCCInfo = &(gHVDCtrl.CloseCaptionInfo);
5802
5803 if (u8CC608==0)
5804 {
5805 pCCInfo->u8ParsingStatus &= ~0x04;
5806 pCCInfo->b708Enable = FALSE;
5807 }
5808 else
5809 pCCInfo->u8ParsingStatus &= ~0x03;
5810
5811 pCCInfo->u8ParsingStatus &= 0x07;
5812
5813 eRet = E_HVD_OK;
5814 _DRV_HVD_Return(eRet);
5815 }
5816
5817
MDrv_HVD_CC_GetInfo(MS_U32 selector,MS_U8 type,MS_U32 * p1,MS_U32 * p2)5818 HVD_Result MDrv_HVD_CC_GetInfo(MS_U32 selector, MS_U8 type, MS_U32 *p1, MS_U32 *p2)
5819 {
5820
5821 HVD_Result eRet = E_HVD_RET_ILLEGAL_ACCESS;
5822 HVD_CC_Info *pCCInfo = &(gHVDCtrl.CloseCaptionInfo);
5823
5824 // Functionality select
5825 switch (selector)
5826 {
5827 case HVD_CC_SELECTOR_708_SW:
5828 *p1 = (MS_U32)pCCInfo->b708Enable;
5829 break;
5830
5831 #if defined( MSOS_TYPE_LINUX )
5832 case HVD_CC_SELECTOR_RINGBUFFER:
5833 {
5834 MS_U32 u32PAddr;
5835 u32PAddr = pCCInfo->u32RingBufStartPAddr[type];
5836 *p1 = u32PAddr;
5837 *p2 = (MS_U32) pCCInfo->u32RingBufLen[type];
5838 }
5839 break;
5840 #endif
5841
5842 default:
5843 *p1 = *p2 = 0;
5844 break;
5845 }
5846 eRet = E_HVD_OK;
5847 _DRV_HVD_Return(eRet);
5848 }
5849
5850
MDrv_HVD_CC_IsHvdRstDone(MS_U8 type)5851 MS_BOOL MDrv_HVD_CC_IsHvdRstDone(MS_U8 type)
5852 {
5853 MS_BOOL bRet = FALSE;
5854
5855 bRet = TRUE;
5856
5857 return bRet;
5858 }
5859
5860 ///////////////////////////////////////////////////////////////////////////////
5861 /// Get Overflow Status of HVD CC Ring Buffer
5862 /// @param u8CC608 \b IN
5863 /// - # TRUE for CC608 parser
5864 /// - # FALSE for CC708 parser
5865 /// Return value:: Overflow Status Flag
5866 ////////////////////////////////////////////////////////////////////////////////
MDrv_HVD_CC_GetOverflowStatus(MS_U8 u8CC608)5867 MS_U8 MDrv_HVD_CC_GetOverflowStatus(MS_U8 u8CC608)
5868 {
5869
5870 HVD_CC_Info *pCCInfo = &(gHVDCtrl.CloseCaptionInfo);
5871 MS_BOOL bOverFlow = pCCInfo->bOverFlow[u8CC608];
5872 pCCInfo->bOverFlow[u8CC608] = FALSE;
5873 return (bOverFlow);
5874 }
5875
5876
5877
5878 ///////////////////////////////////////////////////////////////////////////////
5879 /// Get Write Address of HVD CC Ring Buffer
5880 /// @param u8CC608 \b IN
5881 /// - # TRUE for CC608 parser
5882 /// - # FALSE for CC708 parser
5883 /// Return value:: Write Address
5884 ///////////////////////////////////////////////////////////////////////////////
MDrv_HVD_CC_Get_RB_WriteAddr(MS_U8 u8CC608)5885 MS_U32 MDrv_HVD_CC_Get_RB_WriteAddr(MS_U8 u8CC608)
5886 {
5887
5888 HVD_Drv_Ctrl *pCtrl = &gHVDCtrl;
5889 MS_U32 u32UserDataIdxSize = 0;
5890 MS_U32 u32UsrDataIdxWptr = 0xFFFFFFFF;
5891 MS_U32 u32UserDataSize = 0;
5892 MS_U32 u32UserDataAddr = 0;
5893 DTV_BUF_type* pHVD_User_Data = NULL;
5894
5895 HVD_CC_Info *pCCInfo = &(gHVDCtrl.CloseCaptionInfo);
5896 MS_U32 u32FwParseCnt;
5897 MS_U32 u32PAddr;
5898
5899
5900 if ((pCCInfo->u8ParsingStatus == 0xff) || (pCCInfo->u8ParsingStatus == 0x00))
5901 {
5902
5903 u32PAddr = pCCInfo->u32RingBufWPAddr[u8CC608];
5904
5905 if(!pCCInfo->bBufMiu1[u8CC608])
5906 u32PAddr = u32PAddr & (pCtrl->MemMap.u32MIU1BaseAddr - 1);
5907
5908 return u32PAddr;
5909 }
5910
5911 u32UserDataIdxSize = (MS_U32)HAL_HVD_GetData(E_HVD_GDATA_USERDATA_IDX_TBL_SIZE);
5912
5913 u32UsrDataIdxWptr =_HVD_CC_Update_UserData_Wptr();
5914
5915
5916
5917 if (pCCInfo->u32FWUsrDataRIdx == pCCInfo->u32FWUsrDataWIdx)
5918 {
5919 // User Data Buffer Empty
5920 HVD_MSG_DEG("RIdx(%ld) == WIdx(%ld) , empty !!!\n", pCCInfo->u32FWUsrDataRIdx,pCCInfo->u32FWUsrDataWIdx);
5921 u32PAddr = pCCInfo->u32RingBufWPAddr[u8CC608];
5922
5923 if(!pCCInfo->bBufMiu1[u8CC608])
5924 u32PAddr = u32PAddr & (pCtrl->MemMap.u32MIU1BaseAddr - 1);
5925
5926 return u32PAddr;
5927
5928 }
5929 else if (pCCInfo->u32FWUsrDataWIdx > pCCInfo->u32FWUsrDataRIdx)
5930 {
5931 u32FwParseCnt = pCCInfo->u32FWUsrDataWIdx - pCCInfo->u32FWUsrDataRIdx;
5932 }
5933 else// pCCInfo->u32FWUsrDataWIdx < pCCInfo->u32FWUsrDataRIdx
5934 {
5935 u32FwParseCnt = u32UserDataIdxSize - (pCCInfo->u32FWUsrDataRIdx - pCCInfo->u32FWUsrDataWIdx);
5936 }
5937
5938 HVD_MSG_DEG("u32FwParseCnt(%ld) !!!, pCCInfo->u32RingBufWPAddr[%d]: 0x%lx\n", u32FwParseCnt, u8CC608,pCCInfo->u32RingBufWPAddr[u8CC608] );
5939
5940 MS_BOOL b608OverFlow = FALSE, b708OverFlow = FALSE;
5941 MS_U8 *pCC608buf = &(pCCInfo->u8CC608buf[0]);
5942 MS_U8 *pCC708buf = &(pCCInfo->u8CC708buf[0]);
5943 MS_U32 u32CC608Len = 0;
5944 MS_U32 u32CC708Len = 0;
5945
5946
5947
5948
5949 while(u32FwParseCnt)
5950 {
5951
5952 if( (!_HVD_CC_RB_Have_Avail_Space(1, MAX_608_CC_LEN)) || (!_HVD_CC_RB_Have_Avail_Space(0, MAX_708_CC_LEN)))
5953 {
5954 HVD_MSG_DEG("not have available space!!!\n");
5955 break;
5956 }
5957 u32UserDataAddr = MDrv_HVD_GetUserData_Packet(pCCInfo->u32FWUsrDataRIdx, (MS_U32*)&u32UserDataSize);
5958 u32UserDataAddr += gHVDCtrl.MemMap.u32CodeBufVAddr; // change to virtual address
5959
5960 pHVD_User_Data = (DTV_BUF_type*)u32UserDataAddr;
5961
5962 u32CC608Len = 0;
5963 u32CC708Len = 0;
5964
5965
5966
5967 _HVD_CC_Extract_CCdata(pCC608buf, &u32CC608Len,pCC708buf, &u32CC708Len, pHVD_User_Data);
5968
5969 if(u32CC608Len > 0)
5970 b608OverFlow =_HVD_CC_Add_PaddingData_To_608(&(pCCInfo->u8CC608buf[0]), u32CC608Len);
5971
5972
5973
5974
5975 if(u32CC708Len > 0)
5976 b708OverFlow = _HVD_CC_Add_PaddingData_To_708(&(pCCInfo->u8CC708buf[0]), u32CC708Len);
5977 //b708OverFlow =_HVD_CC_Copy_CCdata_To_RB(0, &CC708buf[0], u32CC708Len);
5978
5979
5980
5981
5982 if(b608OverFlow)
5983 {
5984 HVD_MSG_ERR("##### Critical error!!!! b608OverFlow: %d!!!\n",b608OverFlow);
5985 pCCInfo->bOverFlow[1] = TRUE;
5986 }
5987
5988 if(b708OverFlow)
5989 {
5990 HVD_MSG_ERR("##### Critical error!!!! b708OverFlow:%d !!!\n",b708OverFlow);
5991 pCCInfo->bOverFlow[0] = TRUE;
5992 }
5993
5994
5995
5996 pCCInfo->u32FWUsrDataRIdx++;
5997
5998 if (pCCInfo->u32FWUsrDataRIdx >= u32UserDataIdxSize)
5999 {
6000 pCCInfo->u32FWUsrDataRIdx = 0;
6001 }
6002
6003
6004 u32FwParseCnt--;
6005 }
6006
6007
6008 u32PAddr = pCCInfo->u32RingBufWPAddr[u8CC608];
6009 if(!pCCInfo->bBufMiu1[u8CC608])
6010 u32PAddr = u32PAddr & (pCtrl->MemMap.u32MIU1BaseAddr - 1);
6011
6012 return u32PAddr;
6013
6014
6015
6016
6017 }
6018
6019 ///////////////////////////////////////////////////////////////////////////////
6020 /// Get Read Address of HVD CC Ring Buffer
6021 /// @param u8CC608 \b IN
6022 /// - # TRUE for CC608 parser
6023 /// - # FALSE for CC708 parser
6024 /// Return value:: Read Address
6025 ///////////////////////////////////////////////////////////////////////////////
MDrv_HVD_CC_Get_RB_ReadAddr(MS_U8 u8CC608)6026 MS_U32 MDrv_HVD_CC_Get_RB_ReadAddr(MS_U8 u8CC608)
6027 {
6028
6029 // MS_U8 u8DrvId = _HVD_EX_GetDrvId(u32Id);
6030 HVD_Drv_Ctrl *pCtrl = &gHVDCtrl;
6031 HVD_CC_Info *pCCInfo = &(gHVDCtrl.CloseCaptionInfo);
6032
6033 MS_U32 u32PAddr = pCCInfo->u32RingBufRPAddr[u8CC608];
6034 if(!pCCInfo->bBufMiu1[u8CC608])
6035 u32PAddr = u32PAddr & (pCtrl->MemMap.u32MIU1BaseAddr - 1);
6036
6037 return u32PAddr;
6038
6039 }
6040
6041 ///////////////////////////////////////////////////////////////////////////////
6042 /// Enhance CC info mode, only support cc608
6043 /// @param bEnable \b IN
6044 /// - # TRUE for enhance to dump the pts/tmp_ref info
6045 /// - # FALSE for original
6046 ///////////////////////////////////////////////////////////////////////////////
MDrv_HVD_CC_InfoEnhanceMode(MS_BOOL bEnable)6047 MS_BOOL MDrv_HVD_CC_InfoEnhanceMode(MS_BOOL bEnable)
6048 {
6049
6050 HVD_CC_Info *pCCInfo = &(gHVDCtrl.CloseCaptionInfo);
6051
6052 pCCInfo->b608InfoEnhance = bEnable;
6053
6054 return TRUE;
6055 }
6056
6057 //------------------------------------------------------------------------------
6058 /// Push Disp Q with Ref num
6059 /// @param u8Mode \b IN : 0: Disable, 1: Enable
6060 /// @return -E_HVD_OK for success; E_HVD_FAIL for failure.
6061 //------------------------------------------------------------------------------
MDrv_HVD_PushDispQWithRefNum(MS_BOOL bEnable)6062 HVD_Result MDrv_HVD_PushDispQWithRefNum(MS_BOOL bEnable)
6063 {
6064 HVD_Result eRet = E_HVD_FAIL;
6065 _DRV_HVD_Inited(eRet);
6066 _DRV_HVD_Entry();
6067
6068 eRet = (HVD_Result)HAL_HVD_SetCmd(E_HVD_CMD_PUSH_DISPQ_WITH_REF_NUM, bEnable);
6069
6070 _DRV_HVD_Return(eRet);
6071 }
6072
6073 //------------------------------------------------------------------------------
6074 /// Push First Frame to Display Queue Directly
6075 /// @param u8Mode \b IN : 0: Disable, 1: Enable
6076 /// @return -E_HVD_OK for success; E_HVD_FAIL for failure.
6077 //------------------------------------------------------------------------------
MDrv_HVD_ShowFirstFrameDirect(MS_BOOL bEnable)6078 HVD_Result MDrv_HVD_ShowFirstFrameDirect(MS_BOOL bEnable)
6079 {
6080 HVD_Result eRet = E_HVD_FAIL;
6081 _DRV_HVD_Inited(eRet);
6082 _DRV_HVD_Entry();
6083
6084 eRet = (HVD_Result)HAL_HVD_SetCmd(E_HVD_CMD_SHOW_FIRST_FRAME_DIRECT, bEnable);
6085
6086 _DRV_HVD_Return(eRet);
6087 }
6088
6089 //------------------------------------------------------------------------------
6090 /// PreSetControl: Use only one pending buffer instead of two
6091 /// @param bEnable \b IN : 0: Disable, 1: Enable
6092 /// @return -E_HVD_OK for success; E_HVD_FAIL for failure.
6093 //------------------------------------------------------------------------------
MDrv_HVD_OnePendingBufferMode(MS_BOOL bEnable)6094 HVD_Result MDrv_HVD_OnePendingBufferMode(MS_BOOL bEnable)
6095 {
6096 gHVDPreCtrl.bOnePendingBuffer = bEnable;
6097
6098 return E_HVD_OK;
6099 }
6100
6101 //------------------------------------------------------------------------------
6102 /// PreSetControl : Framerate Handling
6103 /// @param bEnable \b IN : 0: Disable, 1: Enable
6104 /// @param u32FrameRate \b IN : framerate used if the sequence did not have framerate info
6105 /// @return -E_HVD_OK for success; E_HVD_FAIL for failure.
6106 //------------------------------------------------------------------------------
MDrv_HVD_FrameRateHandling(MS_BOOL bEnable,MS_U32 u32FrameRate)6107 HVD_Result MDrv_HVD_FrameRateHandling(MS_BOOL bEnable, MS_U32 u32FrameRate)
6108 {
6109 gHVDPreCtrl.bFrameRateHandling = bEnable;
6110 gHVDPreCtrl.u32PreSetFrameRate = u32FrameRate;
6111
6112 return E_HVD_OK;
6113 }
6114
6115 //------------------------------------------------------------------------------
6116 /// Auto Exhaust ES Data
6117 /// @param u32ESbound \b IN : ES upper bound bits[31:16], ES lower bound bits[15:0]
6118 /// @return -E_HVD_OK for success; E_HVD_FAIL for failure.
6119 //------------------------------------------------------------------------------
MDrv_HVD_AutoExhaustESMode(MS_U32 u32ESbound)6120 HVD_Result MDrv_HVD_AutoExhaustESMode(MS_U32 u32ESbound)
6121 {
6122 HVD_Result eRet = E_HVD_FAIL;
6123 _DRV_HVD_Inited(eRet);
6124 _DRV_HVD_Entry();
6125
6126 eRet = (HVD_Result) HAL_HVD_SetCmd(E_HVD_CMD_AUTO_EXHAUST_ES_MODE, u32ESbound);
6127
6128 _DRV_HVD_Return(eRet);
6129 }
6130
6131 //------------------------------------------------------------------------------
6132 /// Set Min TSP Data Size
6133 /// @param u32Size \b IN : Min TSP Data Size
6134 /// @return -E_HVD_OK for success; E_HVD_FAIL for failure.
6135 //------------------------------------------------------------------------------
MDrv_HVD_SetMinTspDataSize(MS_U32 u32Size)6136 HVD_Result MDrv_HVD_SetMinTspDataSize(MS_U32 u32Size)
6137 {
6138 HVD_Result eRet = E_HVD_FAIL;
6139 _DRV_HVD_Inited(eRet);
6140 _DRV_HVD_Entry();
6141
6142 eRet = (HVD_Result) HAL_HVD_SetCmd(E_HVD_CMD_SET_MIN_TSP_DATA_SIZE, u32Size);
6143
6144 _DRV_HVD_Return(eRet);
6145 }
6146
6147 //------------------------------------------------------------------------------
6148 /// AVC support reference number over max DPB size when frame buffer is enough.
6149 /// @param bEnable \b IN : 0: Disable, 1: Enable
6150 /// @return -E_HVD_OK for success; E_HVD_FAIL for failure.
6151 //------------------------------------------------------------------------------
MDrv_HVD_AVCSupportRefNumOverMaxDBPSize(MS_BOOL bEnable)6152 HVD_Result MDrv_HVD_AVCSupportRefNumOverMaxDBPSize(MS_BOOL bEnable)
6153 {
6154 HVD_Result eRet = E_HVD_FAIL;
6155 _DRV_HVD_Inited(eRet);
6156 _DRV_HVD_Entry();
6157
6158 eRet = (HVD_Result) HAL_HVD_SetCmd(E_HVD_CMD_AVC_SUPPORT_REF_NUM_OVER_MAX_DPB_SIZE, bEnable);
6159
6160 _DRV_HVD_Return(eRet);
6161 }
6162
6163