xref: /utopia/UTPA2-700.0.x/modules/vdec_lite/hal/kano/mvd_lite/halMVD_EX.c (revision 53ee8cc121a030b8d368113ac3e966b4705770ef)
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94 
95 
96 //-------------------------------------------------------------------------------------------------
97 //  Include Files
98 //-------------------------------------------------------------------------------------------------
99 // Common Definition
100 #ifdef MSOS_TYPE_LINUX_KERNEL
101 #include <linux/string.h>
102 #else
103 #include <string.h>
104 #endif
105 
106 #include "MsCommon.h"
107 #include "drvMVD_EX.h"
108 #include "drvBDMA.h"
109 
110 // Internal Definition
111 #include "regMVD_EX.h"
112 #include "halMVD_EX.h"
113 #include "halVPU_EX.h"
114 #include "osalMVD_EX.h"
115 #include "mvd4_interface.h" //firmware header
116 #include "asmCPU.h"
117 #include "controller.h"
118 #include "MVD_EX_Common.h"
119 #include "halCHIP.h"
120 #include "drvCMAPool.h"
121 #if defined(MSOS_TYPE_LINUX)
122 #include "msos/linux/mdrv_cma_pool_st.h"
123 #endif
124 
125 #if (!defined(MSOS_TYPE_NUTTX) && !defined(MSOS_TYPE_OPTEE)) || defined(SUPPORT_X_MODEL_FEATURE)
126 
127 
128 #ifdef MSOS_TYPE_LINUX_KERNEL
129     #define VPRINTF printk
130 #elif defined(MSOS_TYPE_ECOS)
131     #define VPRINTF diag_printf
132 #else
133     #ifndef ANDROID
134         #define VPRINTF printf
135     #else
136         #include <sys/mman.h>
137         #include <cutils/ashmem.h>
138         #include <cutils/log.h>
139         #define VPRINTF ALOGD
140     #endif
141 #endif
142 
143 //-------------------------------------------------------------------------------------------------
144 //  Driver Compiler Options
145 //-------------------------------------------------------------------------------------------------
146 #define SLQ_NEW_PUSH       1
147 #define VIRTUAL_CMD_TIMEOUT 50
148 #ifdef VDEC3
149 #define v3_temp 1
150 #define v3_thinplayer 0
151 #else
152 #define v3_temp 0
153 #define v3_thinplayer 0
154 #endif
155 
156 //-------------------------------------------------------------------------------------------------
157 //  Local Defines
158 //-------------------------------------------------------------------------------------------------
159 #define MIU1_BASEADDR       pMVDHalContext->stMiuCfg.u32Miu1BaseAddr
160 #define _PA2Offset(x)       (((x)>=MIU1_BASEADDR)?(x-MIU1_BASEADDR):(x))
161 
162 #ifdef MSOS_TYPE_LINUX_KERNEL
163 #include <asm/div64.h>
164 #define _90K_TO_MS_U64(x)   ((x!=MVD_U64_MAX)?(do_div(x,90)):(x))  //90k counter ==> ms
165 #else
166 #define _90K_TO_MS_U64(x)   ((x!=MVD_U64_MAX)?(x/=90):(x))  //90k counter ==> ms
167 #endif
168 
169 #ifndef MS_ASSERT
170 #ifdef MS_DEBUG
171 #define MS_ASSERT(expr)     do {                                                        \
172                                 if(!(expr))                                             \
173                                 MVD_PRINT("MVD assert fail %s %d!\n", __FILE__, __LINE__); \
174                             } while(0)
175 #else
176 #define MS_ASSERT(expr)
177 #endif
178 #endif
179 
180 #ifndef UNUSED
181 #define UNUSED(x) (void)(x)
182 #endif
183 //constant
184 #define MVD_PollingTimes      0x40000UL
185 
186 #define MVD_DEBUGVERBAL(x)    if (_u8HalDbgLevel>3)  { (x); }
187 #define MVD_DEBUG_FWCMD(x)    if (_u8HalDbgLevel>2)  { (x); }
188 #define MVD_DEBUGINFO(x)      if (_u8HalDbgLevel>1)  { (x); }
189 #define MVD_DEBUGERROR(x)     if (_u8HalDbgLevel>0)  { (x); }
190 #define MVD_ERROR(x)          x
191 
192 #define RIU     ((unsigned short volatile *) (u32RiuBaseAdd))
193 #define RIU8    ((unsigned char  volatile *) (u32RiuBaseAdd))
194 
195 #define MVDCPU_ON_MIU1     ((HAL_MVD_RegReadByte(MIU0_SEL0_H) & BIT0) == BIT0)
196 #define MVDHW_ON_MIU1      ((HAL_MVD_RegReadByte(MIU0_SEL2_L) & BIT6) == BIT6)
197 
198 // MVD5
199 #define SLQ_TBL_ENTRY_LEN        0x7FFFFFFF //31-bit
200 
201 #define MVD_WIDTH_ALIGN_BYTE     16
202 #define MVD_WIDTH_ALIGN_MASK     (MVD_WIDTH_ALIGN_BYTE - 1)
203 #define MVD_WIDTH_ALIGN_BITS     4
204 
205 #define MVD_FBNUM_DEFAULT        4
206 #define MVD_FBNUM_MAX            5
207 #define MVD_FBNUM_MIN            MVD_FBNUM_DEFAULT
208 
209 #define MVD_DHD_FBSIZE           0x5FA000  //Framebuffer size minimum for Dual HD: (1920*2)*1088*1.5
210 #define MVD_HD_FBSIZE            0x2FD000  //Framebuffer size minimum for High Definition
211 #define MVD4_VC1_FBSIZE_HDMIN    0xEF1000  //5 * 1920 * 1088 * 1.5 = 14.95MB
212 #define MVD4_VC1_FBSIZE_HDMIN1   0xBF4000  //4 * 1920 * 1088 * 1.5 = 11.96MB
213 #define MVD4_VC1_FBSIZE_SDMIN    0x2F7600  //5 * 720 * 576 * 1.5 = 2.97MB
214 #define MVD4_MPEG_FBSIZE_HDMIN   0xBF4000  //4 * 1920 * 1088 * 1.5 = 11.96MB
215 #define MVD4_MPEG_FBSIZE_SDMIN   0x25F800  //4 * 720 * 576 * 1.5 = 2.38MB
216 
217 #define _IS_VC1(x) ((x==E_MVD_CODEC_VC1_ADV) || (x==E_MVD_CODEC_VC1_MAIN))
218 
219 #define SLQ_ENTRY_LEN               8   //8-byte per entry
220 
221 #define MVD_U32_MAX                 0xffffffffUL
222 #define MVD_U64_MAX                 0xffffffffffffffffULL
223 #define MVD_GENERAL_MAX                 ((size_t)(-1))
224 
225 #define MAX_ADD_28BIT               0x0fffffffUL
226 
227 #define SLQ_ADDR_LEN                SLQ_TBL_ENTRY_LEN   //Slq address length is the same as SlqTbl
228 
229 //Initial value for PTS table
230 #define _INIT_ADDR                  MVD_U32_MAX
231 #define _INIT_LEN                   0
232 #define _INIT_TIMESTAMP             MVD_U32_MAX
233 #define _INIT_ID                    MVD_U32_MAX
234 
235 #define _MS_TO_90K(x)   (x*90)  //ms ==> 90k counter
236 #define _90K_TO_MS(x)   ((x!=MVD_U32_MAX)?(x/90):(x))  //90k counter ==> ms
237 
238 #define MVD_DBG_STS(x)        {}
239 #define _SLQTBL_DUMP_PTS      FALSE//TRUE
240 #define _SLQTBL_DUMP_PUSHQ    FALSE//TRUE
241 #define _SLQTBL_DUMP_PKT      FALSE//TRUE
242 #define MVD_TURBO_INIT        FALSE//TRUE
243 
244 #define SLQ_ENTRY_MAX               1024
245 #define SLQ_ENTRY_LEN               8   //8-byte per entry
246 #define SLQ_TBL_SIZE                (SLQ_ENTRY_MAX * SLQ_ENTRY_LEN)
247 #define ES_TBL_SIZE                 (SLQ_ENTRY_MAX * 8) //8-byte per entry
248 
249 #define MVD_FW_SLQTBL_PTS_LEN       32
250 
251 #define SLQ_TBL_SAFERANGE              (40*SLQ_ENTRY_LEN)
252 //this should be smaller than FW's lookup range (current it's 16 entries)
253 
254 #define SLQTBL_CHECKVACANCY_WATERLEVEL (44*SLQ_ENTRY_LEN)
255 
256 
257 #define DIVX_PATTERN    0x63643030
258 #define FLV_PATTERN     0xffff0000
259 #define MPEG_PATTERN_0  0xC6010000 //this SC just for mpeg2/4
260 #if SLQ_NEW_PUSH
261 #define SLQ_PIC_START_FLAG 0x40000000
262 #define VC1_PATTERN     0x0D010000
263 #define RCV_PATTERN     0xFF00A55A
264 #endif
265 #define VC1_PATTERN_0   0xff010000
266 #define VC1_PATTERN_1   0x0000ffff
267 #define VC1_PATTERN_2   0xffffff01
268 #define VC1_PATTERN_3   0x0000ffee
269 
270 #define RCV_PATTERN_0   0x00000000
271 #define RCV_PATTERN_1   0xffffffff
272 #define RCV_PATTERN_2   0x00000000
273 #define RCV_PATTERN_3   0xeeeeeeee
274 
275 #define DUMMY_PATTERN   0xBE010000
276 #define DUMMY_SIZE      0x2000     //8K
277 
278 #define END_PATTERN_0   0xFF010000
279 #define END_PATTERN_1   0xDDCCBBAA
280 #define END_PATTERN_2   0xBBAAFFEE
281 #define END_PATTERN_3   0xFFEEDDCC
282 #define END_PATTERN_SIZE 256
283 
284 #define SKIP_PATTERN_0  0xc5010000
285 #define SKIP_PATTERN_1  0x270608ab
286 #define SKIP_PATTERN_SIZE 8
287 
288 #define CMD_TIMEOUT_MS  500
289 #define SKIP_DATA_TIMEOUT_MS 15
290 
291 //Length of internal buffers
292 #define MVD_FW_IAP_BUF_LEN                 (0x4000UL)   // 16k
293 #define MVD_FW_DP_BUF_LEN                  (0x80000UL)  //512k
294 #define MVD_FW_MV_BUF_LEN                  (0x48000UL)  //288K
295 //Alignment of HW buffers start address
296 #define MVD_FW_IAP_BUF_ALIGN               (0x4000UL)   // 16k
297 #define MVD_FW_DP_BUF_ALIGN                (0x8000UL)   // 32k
298 #define MVD_FW_MV_BUF_ALIGN                (0x8000UL)   // 32k
299 
300 //Three HW buffers are allocated after framebuffer, so we need to
301 //consider these buffers when checking the available framebuffer size/number.
302 #define MVD_HW_BUF_TOTAL_LEN               (MVD_FW_IAP_BUF_LEN + MVD_FW_DP_BUF_LEN + MVD_FW_MV_BUF_LEN) //u32HWBuffTotalSize
303 
304 #define MVD_FW_CODE_LEN                    (OFFSET_BASE)//refer to the define in mvd4_interface.h
305 #define MVD_FW_CODE_LEN_V00                (0x70000UL)  //length for old layout
306 #define MVD_FW_MPOOL_START_OFFSET          (0x90000UL)  //576K
307 #define MVD_FW_TASK_OFFSET                 (0x100000UL) //1M
308 
309 #define MVD3_FW_VOL_INFO_BUF_LEN            (0x1000UL)   //  4K
310 #define MVD3_FW_FRAME_INFO_BUF_LEN          (0x1000UL)   //  4K
311 #define MVD3_FW_DIVX_INFO_BUF_LEN           (0x1000UL)   //  4K
312 #define MVD3_FW_USER_DATA_BUF_LEN           (0x4000UL)   //  16K
313 #define MVD3_FW_USER_DATA_BUF_BACKUP_LEN    MVD3_FW_USER_DATA_BUF_LEN // 16K
314 #define MVD3_FW_SLQ_TAB_TMPBUF_LEN          (0x200UL)
315 #define MVD_FW_SLQTBL_PTS_BUF_LEN           (SLQ_ENTRY_MAX*MVD_FW_SLQTBL_PTS_LEN)
316 #define MVD_FW_DYN_SCALE_BUF_LEN            (0x1000UL)   //  4K
317 #define MVD_FW_SCALER_INFO_BUF_LEN          (0x100UL)    // 256bytes reserved
318 #define MVD_FW_DECFRM_INFO_BUF_LEN          (0x100UL)    // 256bytes reserved
319 #define MVD_FW_VBBU_TABLE_LEN               (0x2000UL)   // 8K
320 
321 #define MVD_FW_USER_DATA_HDR_LEN            (6)
322 #define MVD_FW_USER_DATA_PKT_LEN            (256)
323 #define MVD_FW_USER_DATA_EXT_HDR_LEN        (16)
324 #define FW_BUFF_ALIGN                       (0x1000)     //4k align
325 
326 #define SLQ_ENTRY_MAX               1024
327 #define MVD_FW_SLQTBL_PTS_LEN       32
328 #define MVD_NULLPKT_PTS             MVD_U32_MAX
329 
330 #define MVD_HW_MAX_PIXEL (1920*1088*61000ULL) //FullHD@60p
331 
332 
333 //Get the start address, and the next start address.
334 #define GET_FW_BUFFADD(cur, size, start)                    \
335         do {                                                \
336             start = cur;                                    \
337             cur += size;                                    \
338         } while(0)
339 
340 //Get the aligned start address, and the next start address.
341 #define GET_FW_BUFFADD_ALIGN(cur, align, size, alignStart)  \
342         do {                                                \
343             cur = (MemAlign(cur, align));                   \
344             GET_FW_BUFFADD(cur, size, alignStart);          \
345         } while(0)
346 
347 //Init command arguments
348 #define SETUP_CMDARG(x)     \
349             do {            \
350                 x.Arg0 = 0; \
351                 x.Arg1 = 0; \
352                 x.Arg2 = 0; \
353                 x.Arg3 = 0; \
354                 x.Arg4 = 0; \
355                 x.Arg5 = 0; \
356                } while(0)
357 
358 //Set command arguments
359 #define SET_CMDARG(cmd, u32val, u8Num)      \
360             do {                            \
361                 cmd.Arg0 = L_WORD(u32val);  \
362                 cmd.Arg1 = H_WORD(u32val);  \
363                 cmd.Arg2 = L_DWORD(u32val); \
364                 cmd.Arg3 = H_DWORD(u32val); \
365                 cmd.Arg4 = 0;               \
366                 cmd.Arg5 = u8Num;           \
367                } while(0)
368 
369 #define SET_CMD_RET_FALSE(_cmdVal, _pStcmdArg)                                  \
370     do {                                                                        \
371         if (HAL_MVD_MVDCommand(_cmdVal, (_pStcmdArg)) == FALSE)                 \
372         {                                                                       \
373             MVD_DEBUGERROR(MVD_PRINT("Command: 0x%x fail!!\r\n", _cmdVal));        \
374             return FALSE;                                                       \
375         }                                                                       \
376     } while(0)
377 
378 #define SET_CMD_RET_VOID(_cmdVal, _pStcmdArg)                                  \
379     do {                                                                        \
380         if (HAL_MVD_MVDCommand(_cmdVal, (_pStcmdArg)) == FALSE)                 \
381         {                                                                       \
382             MVD_DEBUGERROR(MVD_PRINT("Command: 0x%x fail!!\r\n", _cmdVal));        \
383             return;                                                       \
384         }                                                                       \
385     } while(0)
386 
387 #define HAL_MVD_InvalidBuffRetFalse(x)                                                              \
388     do {                                                                                            \
389         if ((x)==0)                                                                                 \
390         {                                                                                           \
391             MVD_DEBUGERROR(MVD_PRINT("%s(%d) error: NULL buffer address.\n", __FUNCTION__, __LINE__)); \
392             return FALSE;                                                                           \
393         }                                                                                           \
394     } while(0)
395 
396 #define _MVD_Memset(pDstAddr, u32value, u32Size)                                \
397     do {                                                                        \
398         MS_U32 x = 0;                                                           \
399         for (x = 0; x < (u32Size/4); x=x+4)                                     \
400         {                                                                       \
401             HAL_MVD_Memset4Byte(pDstAddr+x,u32value);                         \
402         }                                                                       \
403         HAL_MVD_CPU_Sync();                                 \
404         HAL_MVD_ReadMemory();                                      \
405     } while (0)
406 
407 #define _MVD_MemResetBit(pDstAddr, mask_num)                      \
408     do{                                                         \
409         *pDstAddr = (*pDstAddr) & (~(0x1<<mask_num));   \
410     }while(0)                                                   \
411 
412 
413 typedef enum
414 {
415     MVD_HKSLQ_GET_READPTR = 0,
416     MVD_HKSLQ_GET_WRITEPTR = 1,
417     MVD_HKSLQ_NONE = 2,
418 } MVD_HKSLQ_CMD;
419 
420 #if SLQ_NEW_PUSH
421 typedef struct _MVD_SLQ_STATUS
422 {
423     MS_BOOL bSlqPicStart;
424     MS_BOOL bSlqPicCollect;
425     MS_BOOL bSlqPicWaitNextStart;
426     MS_BOOL bSlqFireRdy;
427     MS_BOOL bSlqCtrlBit;
428     MS_BOOL bSlqEnLastFrameShow;
429     MS_VIRT u32SlqPatternAddr;
430     MS_U32 u32SlqPushLength;
431     MS_VIRT u32VaildWptrAddr;
432 } MVD_SLQ_STATUS;
433 #endif
434 
435 typedef struct _MVD_SLQ_TBL_ST
436 {
437     MS_VIRT u32StAdd;
438     MS_VIRT u32EndAdd;
439     MS_U32 u32EntryCntMax;
440 
441     MS_VIRT u32RdPtr;
442     MS_VIRT u32WrPtr;
443     MS_VIRT u32Empty;
444     MS_VIRT* pu32LastEntry;
445 } MVD_SLQ_TBL_ST;
446 
447 typedef struct _MVD_ALIVEInfo
448 {
449     MS_U32 u32decode_count;
450     MS_U32 u32searchbuf_count;
451     MS_U32 u32searchcode_count;
452     MS_U32 u32prebuf_count;
453     MS_U32 u32vfifobuf_count;
454     MS_U32 u32searchheader_count;
455     MS_U32 u32flashpattern_count;
456 } MVD_ALIVEInfo;
457 
458 
459 typedef struct _MVD_SLQ_ES_ST
460 {
461     MS_VIRT u32StAdd;
462     MS_VIRT u32EndAdd;
463 
464     MS_VIRT u32RdPtr;
465     MS_VIRT u32WrPtr;
466 } MVD_SLQ_ES_ST;
467 
468 typedef struct _MVD_FWBuff
469 {
470     MS_VIRT pu8MVDGetVolBufStart;
471     MS_VIRT u32VolAdd;
472     MS_VIRT pu8MVDGetFrameInfoBufStart;
473     MS_VIRT pu8MVDSetHeaderBufStart;
474     MS_VIRT u32UserDataBuf;
475     MS_VIRT u32MVDFWSLQTABTmpbufAdr;
476     MS_VIRT u32MVDFWPtsTblAddr;
477     MS_VIRT u32DynScalingAdd;
478     MS_VIRT u32ScalerInfoAdd;
479     MS_VIRT u32DecFrmInfoAdd;
480     MS_VIRT u32VBBUTableAdd;
481 } MVD_FWBuff;
482 
483 typedef enum _FW_BUFF_TYPE
484 {
485     FW_BUFF_VOLINFO,
486     FW_BUFF_FRMINFO,
487     FW_BUFF_HDR,
488     FW_BUFF_USRDATA,
489     FW_BUFF_SLQTBL,
490     FW_BUFF_FWSLQTAB,
491     FW_BUFF_PTSTBL,
492     FW_BUFF_DS,
493     FW_BUFF_XCINFO,
494     FW_BUFF_DECFRMINFO,
495 } FW_BUFF_TYPE;
496 
497 typedef struct _MVD_SLQTBLInfo
498 {
499     MS_U32 u32LastPts;      ///< record the last PTS to handle the repeat case
500     MS_U32 u32DummyPktCnt;  ///< accumulated dummy packet counter
501     MS_U32 u32SlqByteCnt;   ///< accumulated byte counter
502     MS_VIRT u32ESBuffEnd;    ///< miu offset of ES buffer end, used for report TS read/write ptr.
503     MS_VIRT u32FileEndPtr;   ///< write ptr of file-end
504     MS_VIRT u32PreEsRd;      ///< previous ES read ptr
505     MS_VIRT u32PreEsWr;      ///< previous ES write ptr
506     MS_BOOL bRdyToFireCmd;  ///< TRUE after FW is ready to update write pointer
507     MS_BOOL bSlqTblHasValidData; ///< TRUE if the write ptr is not updated
508     MS_BOOL bEnSlqTblHkCtrl;
509     BDMA_CpyType bdmaCpyType;
510     MVD_SLQ_STATUS* pSlqStatus;
511     MVD_SLQ_TBL_ST* pDrvSlqTbl;
512     MVD_SLQ_ES_ST*  pDrvEsTbl;
513     MVD_SLQ_ES_ST*  pDrvDivxTbl;
514 } MVD_SLQTBLInfo;
515 
516 //Only keep one record of MIU setting since there should be only one,
517 //even for multiple decoders.
518 typedef struct _MVDMiuCfg
519 {
520     MS_PHY u32Miu1BaseAddr;
521     MS_PHY u32Miu2BaseAddr;
522     MS_PHY u32Miu3BaseAddr;
523     MS_U8    u8FWMiuSel;
524     MS_U8    u8HWMiuSel;
525     MS_U8    u8FBMiuSel;
526 } MVDMiuCfg;
527 
528 typedef struct
529 {
530     MS_U64 u64PTS;
531     MS_U32 u32POC;
532     MS_U8 u8FrameType;
533 } MVD_PVR_Seamless_Info;
534 
535 typedef enum
536 {
537     E_MVD_DEC_0 = 0,
538     E_MVD_DEC_1,
539     E_MVD_DEC_MAX
540 } MVD_DecNum;
541 #ifdef VDEC3
542 #define MAX_DEC_NUM 16
543 #else
544 #define MAX_DEC_NUM E_MVD_DEC_MAX
545 #endif
546 
547 //-------------------------------------------------------------------------------------------------
548 //  Local Structures
549 //-------------------------------------------------------------------------------------------------
550 
551 
552 //-------------------------------------------------------------------------------------------------
553 //  Global Variables
554 //-------------------------------------------------------------------------------------------------
555 static MS_VIRT u32RiuBaseAdd = 0;
556 MS_U8 _u8HalDbgLevel = 0;
557 #ifdef VDEC3//#ifdef VDEC3
558 static MS_U32 u32SharememoryBase[MAX_DEC_NUM] ={MVD_U32_MAX,MVD_U32_MAX,MVD_U32_MAX,MVD_U32_MAX};
559 #else
560 static MS_U32 u32SharememoryBase[MAX_DEC_NUM] ={MVD_U32_MAX,MVD_U32_MAX};
561 #endif
562 static MS_U8 u8SHMMiuSel=0;
563 #if 0
564 static MVD_MEMCfg   stMemCfg[MAX_DEC_NUM];
565 static MVD_CtrlCfg  stCtrlCfg[MAX_DEC_NUM];
566 static MVD_FWCfg    stFwCfg[MAX_DEC_NUM];
567 
568 // For SLQ table link
569 static MVD_SLQTBLInfo stSlqTblInfo[MAX_DEC_NUM];
570 static MVD_SLQ_STATUS _SlqStatus[MAX_DEC_NUM];  //for SLQ_NEW_PUSH
571 static MVD_SLQ_TBL_ST _drvSlqTbl[MAX_DEC_NUM];
572 static MVD_SLQ_ES_ST _drvEsTbl[MAX_DEC_NUM];    //maintain to report ES read/write ptr
573 static MVD_SLQ_ES_ST _drvDivxTbl[MAX_DEC_NUM];  //header for divx311
574 static FW_DIVX_INFO gdivxInfo[MAX_DEC_NUM];
575 
576 MS_BOOL bSlqTblHKCtrl = FALSE;   //read/write pointer can be accessed by HK directly
577 static MS_BOOL bStopped = TRUE;
578 
579 static HAL_MVD_Stream _stMVDStream[MAX_DEC_NUM] = {
580     {E_HAL_MVD_MAIN_STREAM0, FALSE},
581     {E_HAL_MVD_SUB_STREAM0, FALSE},
582     //{E_HAL_MVD_SUB_STREAM1, FALSE},
583 };
584 static MVD_FWBuff stFWBuff[MAX_DEC_NUM];
585 #endif
586 
587 #define FRM_RATE_CODE_NUM 9
588 
589 typedef struct
590 {
591     MVD_MEMCfg    stMemCfg[MAX_DEC_NUM];
592     MVD_CtrlCfg    stCtrlCfg[MAX_DEC_NUM];
593     MVD_FWCfg    stFwCfg[MAX_DEC_NUM];
594 
595     // For SLQ table link
596     MVD_SLQTBLInfo stSlqTblInfo[MAX_DEC_NUM];
597     MVD_SLQ_STATUS _SlqStatus[MAX_DEC_NUM];    //for SLQ_NEW_PUSH
598     MVD_SLQ_TBL_ST _drvSlqTbl[MAX_DEC_NUM];
599     MVD_SLQ_ES_ST _drvEsTbl[MAX_DEC_NUM];    //maintain to report ES read/write ptr
600     MVD_SLQ_ES_ST _drvDivxTbl[MAX_DEC_NUM];    //header for divx311
601     FW_DIVX_INFO gdivxInfo[MAX_DEC_NUM];
602 
603     MS_BOOL bSlqTblHKCtrl[MAX_DEC_NUM];    //read/write pointer can be accessed by HK directly
604     MS_BOOL bStopped[MAX_DEC_NUM];
605 
606     HAL_MVD_Stream _stMVDStream[MAX_DEC_NUM];
607 
608     MVD_FWBuff stFWBuff[MAX_DEC_NUM];
609 
610     #if _SLQTBL_DUMP_PKT
611     MS_U32 u32SendTimes[MAX_DEC_NUM];//HAL_MVD_SLQTblSendPacket
612     #endif
613 
614     MS_U32 u32pqTimes[MAX_DEC_NUM];//HAL_MVD_PushQueue
615     MS_BOOL bSetSkip[MAX_DEC_NUM];//MVD_FlushTSQueue
616 
617     MS_U32 u32PreVdCnt[MAX_DEC_NUM];//HAL_MVD_DbgDump
618     MS_U32 u32PreErrCnt[MAX_DEC_NUM];
619     MS_BOOL b1stDump[MAX_DEC_NUM];
620     //pre_set
621     HAL_MVD_Pre_Ctrl gMVDPreCtrl[MAX_DEC_NUM];
622     MS_BOOL bAutoInsertDummyPattern[MAX_DEC_NUM];
623     MVDMiuCfg stMiuCfg;
624     MS_BOOL bDropOnePTS[MAX_DEC_NUM];
625     MVD_ALIVEInfo  aliveInfo[MAX_DEC_NUM];
626 
627     MS_U32 u32DmxFrameRate[MAX_DEC_NUM];
628     MS_U32 u32DmxFrameRateBase[MAX_DEC_NUM];
629     MS_BOOL bCMAUsed;
630 #if defined(SUPPORT_CMA)
631     struct CMA_Pool_Init_Param cmaInitParam; // support two MIU
632     struct CMA_Pool_Free_Param cmaFreeParam[MAX_DEC_NUM];
633     MS_BOOL bCMATwoMIU[MAX_DEC_NUM];
634 #endif
635     MS_BOOL bTrickPlay2xAVSync[MAX_DEC_NUM];
636 } MVD_Hal_CTX;
637 
638 //global variables
639 MVD_Hal_CTX* pMVDHalContext = NULL;
640 MVD_Hal_CTX gMVDHalContext;
641 const MS_U16 stFrameRateCode[FRM_RATE_CODE_NUM]=
642 {
643     NULL,23976,24000,25000,29976,30000,50000,59947,60000
644 };
645 
646 
647 #define GET_VOL_BUFFADD(idx)           pMVDHalContext->stFWBuff[(idx)].pu8MVDGetVolBufStart
648 #define GET_VOL_BUFFADD_NONCACHE(idx)  pMVDHalContext->stFWBuff[(idx)].u32VolAdd
649 #define GET_FRMINFO_BUFFADD(idx)       pMVDHalContext->stFWBuff[(idx)].pu8MVDGetFrameInfoBufStart
650 #define GET_HDR_BUFFADD(idx)           pMVDHalContext->stFWBuff[(idx)].pu8MVDSetHeaderBufStart
651 #define GET_USRDATA_BUFFADD(idx)       pMVDHalContext->stFWBuff[(idx)].u32UserDataBuf
652 #define GET_SLQ_BUFFADD(idx)           pMVDHalContext->stFWBuff[(idx)].u32MVDFWSLQTABTmpbufAdr
653 #define GET_PTSTBL_BUFFADD(idx)        pMVDHalContext->stFWBuff[(idx)].u32MVDFWPtsTblAddr
654 #define GET_DS_BUFFADD(idx)            pMVDHalContext->stFWBuff[(idx)].u32DynScalingAdd
655 #define GET_XCINFO_BUFFADD(idx)        pMVDHalContext->stFWBuff[(idx)].u32ScalerInfoAdd
656 #define GET_DECFRMINFO_BUFFADD(idx)    pMVDHalContext->stFWBuff[(idx)].u32DecFrmInfoAdd
657 #define GET_VBBUTABLEADD(idx)          pMVDHalContext->stFWBuff[(idx)].u32VBBUTableAdd
658 
659 
660 
661 //-------------------------------------------------------------------------------------------------
662 //  Local Variables
663 //-------------------------------------------------------------------------------------------------
664 
665 
666 //-------------------------------------------------------------------------------------------------
667 //  Debug Functions
668 //-------------------------------------------------------------------------------------------------
669 
670 
671 //-------------------------------------------------------------------------------------------------
672 //  Local Functions
673 //-------------------------------------------------------------------------------------------------
674 
HAL_MVD_Context_Init(void)675 static void HAL_MVD_Context_Init(void)
676 {
677 #ifdef VDEC3
678     MS_U8 i;
679 
680     for (i = 0; i < MAX_DEC_NUM; i++)
681     {
682         pMVDHalContext->bStopped[i] = TRUE;
683         pMVDHalContext->b1stDump[i] = TRUE;
684         pMVDHalContext->_stMVDStream[i].eStreamId = E_HAL_MVD_N_STREAM0 + i;
685     }
686 #else
687     pMVDHalContext->bStopped[0] = TRUE;
688     pMVDHalContext->bStopped[1] = TRUE;
689     pMVDHalContext->_stMVDStream[0].eStreamId = E_HAL_MVD_MAIN_STREAM0;
690     pMVDHalContext->_stMVDStream[1].eStreamId = E_HAL_MVD_SUB_STREAM0;
691 
692     pMVDHalContext->b1stDump[0] = TRUE;
693     pMVDHalContext->b1stDump[1] = TRUE;
694 #endif
695 }
696 
697 
698 
HAL_MVD_SetIsUsed(MS_U8 u8Idx,MS_BOOL bUsed)699 static void HAL_MVD_SetIsUsed(MS_U8 u8Idx, MS_BOOL bUsed)
700 {
701     pMVDHalContext->_stMVDStream[u8Idx].bUsed = bUsed;
702 }
703 
704 //Given the start address & the available size for the FW buffers,
705 //return the address of each buffers.
706 //Now only support u8Size==1, 2, 4
MVD_GetFWBuffData(MS_U8 u8Idx,FW_BUFF_TYPE eBuffType,MS_U16 u8Offset,MS_U8 u8Size)707 static MS_U32 MVD_GetFWBuffData(MS_U8 u8Idx, FW_BUFF_TYPE eBuffType, MS_U16 u8Offset, MS_U8 u8Size)
708 {
709     MS_U32 u32Val = 0;
710     MS_VIRT u32BufStart = NULL;
711     switch (eBuffType)
712     {
713         case FW_BUFF_VOLINFO:    u32BufStart = GET_VOL_BUFFADD(u8Idx);        break;
714         case FW_BUFF_FRMINFO:    u32BufStart = GET_FRMINFO_BUFFADD(u8Idx);    break;
715         case FW_BUFF_HDR:        u32BufStart = GET_HDR_BUFFADD(u8Idx);        break;
716         case FW_BUFF_USRDATA:    u32BufStart = GET_USRDATA_BUFFADD(u8Idx);    break;
717         case FW_BUFF_FWSLQTAB:   u32BufStart = GET_SLQ_BUFFADD(u8Idx);        break;
718         case FW_BUFF_PTSTBL:     u32BufStart = GET_PTSTBL_BUFFADD(u8Idx);     break;
719         case FW_BUFF_DS:         u32BufStart = GET_DS_BUFFADD(u8Idx);         break;
720         case FW_BUFF_XCINFO:     u32BufStart = GET_XCINFO_BUFFADD(u8Idx);     break;
721         case FW_BUFF_DECFRMINFO: u32BufStart = GET_DECFRMINFO_BUFFADD(u8Idx); break;
722         default:
723             break;
724     }
725     if (NULL == u32BufStart)
726     {
727         MVD_PRINT("%s err: u8Idx=0x%x, bufType=0x%x, offset=%d, size=%d\n",
728                __FUNCTION__, u8Idx, eBuffType, u8Offset, u8Size);
729         return 0;
730     }
731 
732     if (u8Size == sizeof(MS_U8))
733     {
734         u32Val = (MS_U32)HAL_MVD_MemReadByte(u32BufStart+u8Offset);
735     }
736     else if (u8Size == sizeof(MS_U32))
737     {
738         u32Val = HAL_MVD_MemRead4Byte(u32BufStart+u8Offset);
739     }
740     else if (u8Size == sizeof(MS_U16))
741     {
742         u32Val = HAL_MVD_MemRead2Byte(u32BufStart+u8Offset);
743     }
744 
745     MVD_DEBUGVERBAL(MVD_PRINT("%s: u32Val=%d for u8Idx=0x%x, bufType=0x%x, offset=%d, size=%d\n",
746                           __FUNCTION__, u32Val, u8Idx, eBuffType, u8Offset, u8Size));
747     return u32Val;
748 }
749 
750 #ifdef VDEC3
MVD_SetFWBuffData(MS_U8 u8Idx,FW_BUFF_TYPE eBuffType,MS_U8 u8Offset,MS_U8 u8Size,MS_U32 u32Value)751 static void MVD_SetFWBuffData(MS_U8 u8Idx, FW_BUFF_TYPE eBuffType, MS_U8 u8Offset, MS_U8 u8Size, MS_U32 u32Value)
752 {
753     MS_VIRT u32BufStart = NULL;
754 
755     switch (eBuffType)
756     {
757         case FW_BUFF_VOLINFO:    u32BufStart = GET_VOL_BUFFADD(u8Idx);        break;
758         case FW_BUFF_FRMINFO:    u32BufStart = GET_FRMINFO_BUFFADD(u8Idx);    break;
759         case FW_BUFF_HDR:        u32BufStart = GET_HDR_BUFFADD(u8Idx);        break;
760         case FW_BUFF_USRDATA:    u32BufStart = GET_USRDATA_BUFFADD(u8Idx);    break;
761         case FW_BUFF_FWSLQTAB:   u32BufStart = GET_SLQ_BUFFADD(u8Idx);        break;
762         case FW_BUFF_PTSTBL:     u32BufStart = GET_PTSTBL_BUFFADD(u8Idx);     break;
763         case FW_BUFF_DS:         u32BufStart = GET_DS_BUFFADD(u8Idx);         break;
764         case FW_BUFF_XCINFO:     u32BufStart = GET_XCINFO_BUFFADD(u8Idx);     break;
765         case FW_BUFF_DECFRMINFO: u32BufStart = GET_DECFRMINFO_BUFFADD(u8Idx); break;
766         default:
767             break;
768     }
769 
770     if (NULL == u32BufStart)
771     {
772         MVD_PRINT("%s err: u8Idx=0x%x, bufType=0x%x, offset=%d, size=%d, value=%d\n",
773                __FUNCTION__, (unsigned int)u8Idx,(unsigned int) eBuffType,(unsigned int) u8Offset,(unsigned int) u8Size,(unsigned int)u32Value);
774     }
775 
776     if (pMVDHalContext->stMiuCfg.u8HWMiuSel == MIU_SEL_1)
777     {
778         u32BufStart += HAL_MIU1_BASE;
779     }
780 /*    else if (pMVDHalContext->stMiuCfg.u8HWMiuSel == MIU_SEL_2)
781     {
782         u32BufStart += HAL_MIU2_BASE;
783     }*/
784 
785     if (u8Size == sizeof(MS_U8))
786     {
787         MS_U8* temp = (MS_U8*)MsOS_PA2KSEG1(u32BufStart+u8Offset);
788         *temp = (MS_U8)u32Value;
789     }
790     else if (u8Size == sizeof(MS_U32))
791     {
792         MS_U32* temp = (MS_U32*)MsOS_PA2KSEG1(u32BufStart+u8Offset);
793         *temp = (MS_U32)u32Value;
794     }
795     else if (u8Size == sizeof(MS_U16))
796     {
797         MS_U16* temp = (MS_U16*)MsOS_PA2KSEG1(u32BufStart+u8Offset);
798         *temp = (MS_U16)u32Value;
799     }
800 
801     MVD_DEBUGVERBAL(MVD_PRINT("%s: u8Idx=0x%x, bufType=0x%x, offset=%d, size=%d, value=%d\n",
802                           __FUNCTION__,  (unsigned int)u8Idx, (unsigned int)eBuffType, (unsigned int)u8Offset, (unsigned int)u8Size,(unsigned int)u32Value));
803 }
804 #endif
805 
806 
807 //-------------------------------------------------------------------------------------------------
808 //  Global Functions
809 //-------------------------------------------------------------------------------------------------
HAL_MVD_SetDbgLevel(MS_U8 level)810 void HAL_MVD_SetDbgLevel(MS_U8 level)
811 {
812     _u8HalDbgLevel = level;
813     return;
814 }
815 
816 
HAL_MVD_GetCaps(void)817 MS_U8 HAL_MVD_GetCaps(void)
818 {
819     MS_U8 caps = 0;
820 
821     caps |= (MVD_SUPPORT_MPEG2|MVD_SUPPORT_MPEG4|MVD_SUPPORT_VC1);
822     return caps;
823 }
824 
HAL_MVD_GetMaxPixel(MS_U32 u32Id)825 MS_U64 HAL_MVD_GetMaxPixel(MS_U32 u32Id)
826 {
827     return (MS_U64)MVD_HW_MAX_PIXEL/1000;
828 }
829 
HAL_MVD_GetDrvFwVer(void)830 MS_U32 HAL_MVD_GetDrvFwVer(void)
831 {
832     return MVD_FW_VERSION;
833 }
834 
835 #if 0
836 MS_U32 HAL_MVD_GetMiu1BaseAdd(void)
837 {
838     return MIU1_BASEADDR;
839 }
840 #endif
841 
842 //#if defined(CHIP_MUJI)
HAL_MVD_GetMiu1BaseAdd(void)843 MS_VIRT HAL_MVD_GetMiu1BaseAdd(void)
844 {
845     return MIU1_BASEADDR;
846 }
847 
HAL_MVD_GetFWSelMiu1(void)848 MS_BOOL HAL_MVD_GetFWSelMiu1(void)
849 {
850     return MVDCPU_ON_MIU1;
851 }
852 //#endif
853 
854 
HAL_MVD_GetFWSelMiu(void)855 MS_U8 HAL_MVD_GetFWSelMiu(void)
856 {
857     return pMVDHalContext->stMiuCfg.u8FWMiuSel;
858 }
859 
860 
861 
HAL_MVD_MemGetMap(MS_U8 u8Idx,MS_U8 u8type,MS_VIRT * pu32addr,MS_SIZE * pu32len)862 void HAL_MVD_MemGetMap(MS_U8 u8Idx, MS_U8 u8type, MS_VIRT* pu32addr, MS_SIZE* pu32len)
863 {
864     MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
865     MS_VIRT u32StartOffset;
866     MS_U8  u8MiuSel;
867 
868     switch (u8type)
869     {
870         case E_MVD_MMAP_ALL:
871         case E_MVD_MMAP_FW:
872             _phy_to_miu_offset(u8MiuSel, u32StartOffset, pstMemCfg->u32FWCodeAddr);
873             *pu32addr = u32StartOffset;
874             *pu32len = pstMemCfg->u32FWCodeSize;
875             break;
876         case E_MVD_MMAP_BS:
877             _phy_to_miu_offset(u8MiuSel, u32StartOffset, pstMemCfg->u32BSAddr);
878             *pu32addr = u32StartOffset;
879             *pu32len = pstMemCfg->u32BSSize;
880             break;
881         case E_MVD_MMAP_FB:
882             _phy_to_miu_offset(u8MiuSel, u32StartOffset, pstMemCfg->u32FBAddr);
883             *pu32addr = u32StartOffset;
884             *pu32len = pstMemCfg->u32FBSize;
885             break;
886         case E_MVD_MMAP_DRV:
887             _phy_to_miu_offset(u8MiuSel, u32StartOffset, pstMemCfg->u32DrvBufAddr);
888             *pu32addr = u32StartOffset;
889             *pu32len = pstMemCfg->u32DrvBufSize;
890             break;
891         default:
892             break;
893     }
894 
895     MVD_DEBUGINFO(MVD_PRINT("HAL_MVD_MemGetMap[%d] add=0x%lx len=0x%lx\n",u8type,(unsigned long)*pu32addr,(unsigned long)*pu32len));
896     return;
897 }
898 
HAL_MVD_RegSetBase(MS_VIRT u32Base)899 void HAL_MVD_RegSetBase(MS_VIRT u32Base)
900 {
901     u32RiuBaseAdd = u32Base;
902     HAL_VPU_EX_InitRegBase(u32Base);
903 }
904 
HAL_MVD_RegWriteByte(MS_VIRT u32Reg,MS_U8 u8Val)905 void HAL_MVD_RegWriteByte(MS_VIRT u32Reg, MS_U8 u8Val)
906 {
907     if ( __builtin_constant_p( u32Reg ) )
908     {
909         RIU8[((u32Reg) * 2) - ((u32Reg) & 1)] = u8Val;
910     }
911     else
912     {
913         RIU8[(u32Reg << 1) - (u32Reg & 1)] = u8Val;
914     }
915 }
916 
HAL_MVD_RegReadByte(MS_VIRT u32Reg)917 MS_U8 HAL_MVD_RegReadByte(MS_VIRT u32Reg)
918 {
919     return (__builtin_constant_p( u32Reg ) ?
920             (((u32Reg) & 0x01) ? RIU8[(u32Reg) * 2 - 1] : RIU8[(u32Reg) * 2]) :
921             (RIU8[(u32Reg << 1) - (u32Reg & 1)]));
922 }
923 
HAL_MVD_RegWriteBit(MS_VIRT u32Reg,MS_BOOL bEnable,MS_U8 u8Mask)924 void HAL_MVD_RegWriteBit(MS_VIRT u32Reg, MS_BOOL bEnable, MS_U8 u8Mask)
925 {
926     MS_VIRT u32Reg8 = ((u32Reg) * 2) - ((u32Reg) & 1);
927     RIU8[u32Reg8] = (bEnable) ? (RIU8[u32Reg8] |  (u8Mask)) :
928                                 (RIU8[u32Reg8] & ~(u8Mask));
929 }
930 
HAL_MVD_RegWriteByteMask(MS_VIRT u32Reg,MS_U8 u8Val,MS_U8 u8Msk)931 void HAL_MVD_RegWriteByteMask(MS_VIRT u32Reg, MS_U8 u8Val, MS_U8 u8Msk)
932 {
933     MS_VIRT u32Reg8 = ((u32Reg) * 2) - ((u32Reg) & 1);
934     RIU8[u32Reg8] = (RIU8[u32Reg8] & ~(u8Msk)) | ((u8Val) & (u8Msk));
935 }
936 
HAL_MVD_RegWrite4Byte(MS_VIRT u32Reg,MS_U32 u32Val)937 void HAL_MVD_RegWrite4Byte(MS_VIRT u32Reg, MS_U32 u32Val)
938 {
939     if ( __builtin_constant_p( u32Reg ) && !((u32Reg) & 0x01) )
940     {
941         RIU[u32Reg] = (MS_U16)(u32Val);
942         RIU[(u32Reg) + 2] = (MS_U16)((u32Val) >> 16);
943     }
944     else
945     {
946         if (u32Reg & 0x01)
947         {
948             RIU8[(u32Reg << 1) - 1] = u32Val;
949             RIU[u32Reg + 1] = (u32Val >> 8);
950             RIU8[((u32Reg + 3) << 1)] = (u32Val >> 24);
951         }
952         else
953         {
954             RIU[u32Reg] = u32Val;
955             RIU[u32Reg + 2] = (u32Val >> 16);
956         }
957     }
958 }
959 
960 
HAL_MVD_MemRead4Byte(MS_VIRT u32Address)961 MS_U32 HAL_MVD_MemRead4Byte(MS_VIRT u32Address)
962 {
963     volatile MS_U32 u32Val;
964     MS_ASSERT(!(u32Address & 0x03UL));
965 
966     HAL_MVD_CPU_Sync();
967     HAL_MVD_ReadMemory();
968 
969     _miu_offset_to_phy(pMVDHalContext->stMiuCfg.u8FWMiuSel,u32Address,u32Address);
970 
971     u32Val = *(volatile MS_U32*) HAL_MVD_PA2NonCacheSeg(u32Address);
972 
973     //MVD_PRINT("mvd rd 0x%lx = 0x%lx\n", u32Address, u32Val);
974     return u32Val;
975 }
976 
HAL_MVD_MemRead2Byte(MS_VIRT u32Address)977 MS_U16 HAL_MVD_MemRead2Byte(MS_VIRT u32Address)
978 {
979     MS_VIRT u32ReadAddr;
980     MS_U32 u32ReadValue;
981     MS_U16 u16Value;
982     MS_U8 u8Shift;
983     u32ReadAddr = (u32Address >> 2) << 2;
984     u8Shift = (MS_U8)((u32Address & 0x03) * 8);
985     u32ReadValue = HAL_MVD_MemRead4Byte(u32ReadAddr);
986 
987     u16Value = (MS_U16)(u32ReadValue >> u8Shift);
988     if(u8Shift == 24)
989     {
990         u32ReadValue = HAL_MVD_MemRead4Byte(u32ReadAddr+4);
991         u16Value = u16Value << 8 || (MS_U16)(u32ReadValue & 0xFF);
992     }
993     return u16Value;
994 }
995 
HAL_MVD_MemReadByte(MS_VIRT u32Address)996 MS_U8 HAL_MVD_MemReadByte(MS_VIRT u32Address)
997 {
998     MS_VIRT u32ReadAddr;
999     MS_U32 u32ReadValue;
1000     MS_U8 u8Value;
1001     MS_U8 u8Shift;
1002     u32ReadAddr = (u32Address >> 2) << 2;
1003     u8Shift = (MS_U8)((u32Address & 0x03) * 8);
1004     u32ReadValue = HAL_MVD_MemRead4Byte(u32ReadAddr);
1005     u8Value = (MS_U8)(u32ReadValue >> u8Shift);
1006 
1007     return u8Value;
1008 }
1009 
HAL_MVD_MemWrite4Byte(MS_VIRT u32Address,MS_U32 u32Value)1010 MS_BOOL HAL_MVD_MemWrite4Byte(MS_VIRT u32Address, MS_U32 u32Value)
1011 {
1012 
1013     _miu_offset_to_phy(pMVDHalContext->stMiuCfg.u8FWMiuSel,u32Address,u32Address);
1014 
1015     *(volatile MS_U32 *) HAL_MVD_PA2NonCacheSeg(u32Address) = u32Value;
1016 
1017     HAL_MVD_CPU_Sync();
1018     HAL_MVD_FlushMemory();
1019 
1020     return TRUE;
1021 }
1022 
HAL_MVD_MemWriteByte(MS_VIRT u32Address,MS_U8 u8Value)1023 MS_BOOL HAL_MVD_MemWriteByte(MS_VIRT u32Address, MS_U8 u8Value)
1024 {
1025     MS_VIRT u32ReadAddr;
1026     MS_U32 u32ReadValue;
1027     MS_U8 u8Shift;
1028 
1029     u32ReadAddr = (u32Address >> 2) << 2;
1030     u8Shift = (MS_U8)((u32Address & 0x03UL) * 8);
1031     u32ReadValue = HAL_MVD_MemRead4Byte(u32ReadAddr);
1032     u32ReadValue &= ~(0xFFUL << u8Shift);
1033     u32ReadValue |= ((MS_U32)u8Value << u8Shift);
1034     HAL_MVD_MemWrite4Byte(u32ReadAddr, u32ReadValue);
1035     return TRUE;
1036 }
1037 
HAL_MVD_MemWrite2Byte(MS_VIRT u32Address,MS_U16 u16Value)1038 MS_BOOL HAL_MVD_MemWrite2Byte(MS_VIRT u32Address, MS_U16 u16Value)
1039 {
1040     MS_VIRT u32ReadAddr;
1041     MS_U32 u32ReadValue;
1042     MS_U8 u8Shift;
1043 
1044     u8Shift = (MS_U8)((u32Address & 0x03UL) * 8) ;
1045     if(u8Shift < 24)
1046     {
1047         u32ReadAddr = (u32Address >> 2) << 2;
1048         u32ReadValue = HAL_MVD_MemRead4Byte(u32ReadAddr);
1049         u32ReadValue &= ~(0xFFFF << u8Shift);
1050         u32ReadValue |= ((MS_U32)u16Value << u8Shift);
1051         HAL_MVD_MemWrite4Byte(u32ReadAddr, u32ReadValue);
1052     }
1053     else
1054     {
1055         HAL_MVD_MemWriteByte(u32Address, (MS_U8)(u16Value));
1056         HAL_MVD_MemWriteByte(u32Address+1, (MS_U8)(u16Value >> 8));
1057     }
1058     return TRUE;
1059 }
1060 
1061 
HAL_MVD_SetReqMask(MS_U32 u32Id,MS_BOOL bEnMask)1062 void HAL_MVD_SetReqMask(MS_U32 u32Id, MS_BOOL bEnMask)
1063 {
1064     HAL_VPU_EX_MIU_RW_Protect(u32Id, bEnMask);
1065 
1066     if (MVDHW_ON_MIU1)
1067     {
1068         HAL_MVD_RegWriteBit(MIU1_RQ2_MASK_L, bEnMask, BIT6);  //MVD R/W
1069         HAL_MVD_RegWriteBit(MIU1_RQ0_MASK_H, bEnMask, BIT2);  //MVD bbu R/W
1070         HAL_MVD_RegWriteBit(MIU1_RQ4_MASK_H, bEnMask, BIT1);  //RTO
1071     }
1072     else
1073     {
1074         HAL_MVD_RegWriteBit(MIU0_RQ2_MASK_L, bEnMask, BIT6);  //MVD R/W
1075         HAL_MVD_RegWriteBit(MIU0_RQ0_MASK_H, bEnMask, BIT2);  //MVD bbu R/W
1076         HAL_MVD_RegWriteBit(MIU0_RQ4_MASK_H, bEnMask, BIT1);  //RTO
1077     }
1078     HAL_MVD_Delayms(1);
1079 
1080     return;
1081 }
1082 
HAL_MVD_Memset4Byte(MS_VIRT u32Address,MS_U32 u32Value)1083 static MS_BOOL HAL_MVD_Memset4Byte(MS_VIRT u32Address, MS_U32 u32Value)
1084 {
1085     _miu_offset_to_phy(pMVDHalContext->stMiuCfg.u8FWMiuSel,u32Address,u32Address);
1086 
1087     *(volatile MS_U32 *) HAL_MVD_PA2NonCacheSeg(u32Address) = u32Value;
1088 
1089     return TRUE;
1090 }
1091 
1092 //------------------------------------------------------------------------------
1093 /// Initialize MVD
1094 /// @return -result of resetting MVD hardware
1095 //------------------------------------------------------------------------------
HAL_MVD_RstHW(MS_U32 u32Id)1096 MS_BOOL HAL_MVD_RstHW(MS_U32 u32Id)
1097 {
1098     MS_U32 u32Time = 0;
1099 
1100     OSAL_MVD_LockHwMutex();
1101 
1102     HAL_MVD_SetReqMask(u32Id, ENABLE);
1103 
1104     HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_DISCONNECT_MIU);//disconnect MIU
1105     HAL_MVD_RegWriteBit(MVD_CTRL, 0, MVD_CTRL_DISCONNECT_MIU);//release reset
1106 
1107     HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_RST);//reset MVD
1108     HAL_MVD_RegWriteBit(MVD_CTRL, 0, MVD_CTRL_RST);//release reset
1109 
1110     u32Time = HAL_MVD_GetTime();
1111     while ( ((HAL_MVD_RegReadByte(MVD_STATUS) & MVD_STATUS_READY) == 0)
1112             && ((HAL_MVD_GetTime() - u32Time) < 200) );
1113 
1114 #if 0 //bring up
1115     MVD_PRINT("====================>>>>MVD Ctrl status1.5a : 0x%x\n",HAL_MVD_RegReadByte(MVD_STATUS));
1116     HAL_MVD_RegWriteBit(MVD_STATUS, 1, MVD_T8_MIU_128_0);//release reset
1117     HAL_MVD_RegWriteBit(MVD_STATUS, 1, MVD_T8_MIU_128_1);//release reset
1118     MVD_DEBUGINFO(MVD_PRINT("MVD Ctrl status : 0x%x\n",HAL_MVD_RegReadByte(MVD_STATUS)));
1119     MVD_PRINT("====================>>>>MVD Ctrl status1.5b : 0x%x\n",HAL_MVD_RegReadByte(MVD_STATUS));
1120 #endif
1121 
1122     HAL_MVD_SetReqMask(u32Id, DISABLE);
1123 
1124     OSAL_MVD_UnlockHwMutex();
1125 
1126     return TRUE;
1127 }
1128 
1129 
1130 //------------------------------------------------------------------------------
1131 /// Release CPU
1132 /// @return -release CPU successfully or not
1133 //------------------------------------------------------------------------------
HAL_MVD_ReleaseFW(MS_U32 u32Id)1134 MS_BOOL HAL_MVD_ReleaseFW(MS_U32 u32Id)
1135 {
1136     //For dual decoder, we only release VPU if it is not released yet.
1137     if (TRUE == HAL_VPU_EX_IsRsted(u32Id))
1138     {
1139         MVD_DEBUGINFO(MVD_PRINT("%s VPU_IsRsted\n", __FUNCTION__));
1140         return TRUE;
1141     }
1142 
1143     HAL_VPU_EX_SwRstRelse(u32Id);
1144     return TRUE;
1145 }
1146 
HAL_MVD_PA2NonCacheSeg(MS_PHY u32PhyAddr)1147 MS_VIRT HAL_MVD_PA2NonCacheSeg(MS_PHY u32PhyAddr)
1148 {
1149     return MS_PA2KSEG1(u32PhyAddr);
1150 }
1151 
HAL_MVD_GetTime(void)1152 MS_U32 HAL_MVD_GetTime(void)
1153 {
1154     return MsOS_GetSystemTime();
1155 }
1156 
HAL_MVD_Delayms(MS_U32 u32msecs)1157 void HAL_MVD_Delayms(MS_U32 u32msecs)
1158 {
1159     MsOS_DelayTask(u32msecs);
1160 }
1161 
HAL_MVD_CPU_Sync(void)1162 void HAL_MVD_CPU_Sync(void)
1163 {
1164     MAsm_CPU_Sync();
1165 }
1166 
HAL_MVD_FlushMemory(void)1167 void HAL_MVD_FlushMemory(void)
1168 {
1169     MsOS_FlushMemory();
1170 }
1171 
HAL_MVD_ReadMemory(void)1172 void HAL_MVD_ReadMemory(void)
1173 {
1174     MsOS_ReadMemory();
1175 }
1176 
1177 //Record the memory layout from system configuration
HAL_MVD_SetMEMCfg(MS_U8 u8Idx,MVD_MEMCfg * pMEMCfg)1178 MS_BOOL HAL_MVD_SetMEMCfg(MS_U8 u8Idx, MVD_MEMCfg* pMEMCfg)
1179 {
1180     memcpy(&(pMVDHalContext->stMemCfg[u8Idx]), pMEMCfg, sizeof(MVD_MEMCfg));
1181     //record the MIU settings
1182     pMVDHalContext->stMiuCfg.u32Miu1BaseAddr = pMEMCfg->u32Miu1BaseAddr;
1183     pMVDHalContext->stMiuCfg.u32Miu2BaseAddr = pMEMCfg->u32Miu2BaseAddr;
1184     pMVDHalContext->stMiuCfg.u32Miu3BaseAddr = pMEMCfg->u32Miu3BaseAddr;
1185     pMVDHalContext->stMiuCfg.u8FWMiuSel = pMEMCfg->u8FWMiuSel;
1186     pMVDHalContext->stMiuCfg.u8HWMiuSel = pMEMCfg->u8HWMiuSel;
1187     pMVDHalContext->stMiuCfg.u8FBMiuSel = pMEMCfg->u8FBMiuSel;
1188     return TRUE;
1189 }
1190 
HAL_MVD_GetMEMCfg(MS_U8 u8Idx)1191 MVD_MEMCfg* HAL_MVD_GetMEMCfg(MS_U8 u8Idx)
1192 {
1193     //MVD_PRINT("%s: u8Idx=0x%x\n", __FUNCTION__, u8Idx);
1194     MVD_MEMCfg* pInfo = NULL;
1195     pInfo = &(pMVDHalContext->stMemCfg[u8Idx]);
1196     return pInfo;
1197 }
1198 
HAL_MVD_SetFWCfg(MS_U8 u8Idx,MVD_FWCfg * pFWCfg)1199 MS_BOOL HAL_MVD_SetFWCfg(MS_U8 u8Idx, MVD_FWCfg* pFWCfg)
1200 {
1201     //MVD_PRINT("%s: u8Idx=0x%x\n", __FUNCTION__, u8Idx);
1202     memcpy(&(pMVDHalContext->stFwCfg[u8Idx]), pFWCfg, sizeof(MVD_FWCfg));
1203     memcpy(&(pMVDHalContext->stFwCfg[u8Idx].stFBReduction), &pFWCfg->stFBReduction,sizeof(MVD_FB_Reduction));
1204     return TRUE;
1205 }
1206 
HAL_MVD_GetFWCfg(MS_U8 u8Idx)1207 MVD_FWCfg* HAL_MVD_GetFWCfg(MS_U8 u8Idx)
1208 {
1209     MVD_FWCfg* pInfo = NULL;
1210     //MVD_PRINT("%s: u8Idx=0x%x\n", __FUNCTION__, u8Idx);
1211     pInfo = &(pMVDHalContext->stFwCfg[u8Idx]);
1212     return pInfo;
1213 }
1214 
HAL_MVD_GetFBMode(MS_U8 u8Idx)1215 MS_U8 HAL_MVD_GetFBMode(MS_U8 u8Idx)
1216 {
1217     MS_U8 u8Mode = MVD3_SD_MODE;
1218     u8Mode = pMVDHalContext->stFwCfg[u8Idx].u8FBMode;
1219     MVD_DEBUGINFO(MVD_PRINT("FBMode=0x%x\n", u8Mode));
1220     return u8Mode;
1221 }
1222 
HAL_MVD_GetCodecType(MS_U8 u8Idx)1223 MVD_CodecType HAL_MVD_GetCodecType(MS_U8 u8Idx)
1224 {
1225     MVD_CodecType eCodecType = E_MVD_CODEC_UNKNOWN;
1226     eCodecType = pMVDHalContext->stFwCfg[u8Idx].eCodecType;
1227     return eCodecType;
1228 }
1229 
HAL_MVD_GetSrcMode(MS_U8 u8Idx)1230 MVD_SrcMode HAL_MVD_GetSrcMode(MS_U8 u8Idx)
1231 {
1232     MVD_SrcMode eSrcMode = E_MVD_SRC_UNKNOWN;
1233     eSrcMode = pMVDHalContext->stFwCfg[u8Idx].eSrcMode;
1234     return eSrcMode;
1235 }
1236 
HAL_MVD_SetSrcMode(MS_U8 u8Idx,MVD_SrcMode mode)1237 MS_BOOL HAL_MVD_SetSrcMode(MS_U8 u8Idx,MVD_SrcMode mode)
1238 {
1239     if(pMVDHalContext != NULL)
1240     {
1241         pMVDHalContext->stFwCfg[u8Idx].eSrcMode = mode;
1242         return TRUE;
1243     }
1244     else
1245     {
1246         return FALSE;
1247     }
1248 }
1249 
1250 
HAL_MVD_GetCtrlCfg(MS_U8 u8Idx)1251 MVD_CtrlCfg* HAL_MVD_GetCtrlCfg(MS_U8 u8Idx)
1252 {
1253     MVD_CtrlCfg* pInfo = NULL;
1254     pInfo = &(pMVDHalContext->stCtrlCfg[u8Idx]);
1255     return pInfo;
1256 }
1257 
HAL_MVD_GetSlqTblInfo(MS_U8 u8Idx)1258 MVD_SLQTBLInfo* HAL_MVD_GetSlqTblInfo(MS_U8 u8Idx)
1259 {
1260     MVD_SLQTBLInfo* pInfo = NULL;
1261     pInfo = &(pMVDHalContext->stSlqTblInfo[u8Idx]);
1262     return pInfo;
1263 }
1264 
HAL_MVD_PowerCtrl(MS_BOOL bOn)1265 void HAL_MVD_PowerCtrl(MS_BOOL bOn)
1266 {
1267 #ifdef CONFIG_MSTAR_CLKM
1268     HAL_VPU_EX_SetClkManagement(E_VPU_EX_CLKPORT_MVD, bOn);
1269 #else
1270     HAL_MVD_RegWriteByteMask(REG_CKG_MVD, CKG_MVD_144MHZ, CKG_MVD_MASK);
1271     HAL_MVD_RegWriteBit(REG_CKG_MVD, !bOn, CKG_MVD_GATED);
1272     HAL_MVD_RegWriteBit(REG_CKG_MVD, !bOn, CKG_MVD_INVERT);
1273 #endif
1274     HAL_MVD_RegWriteBit(REG_CKG_MVD_CHROMA_A, !bOn, CKG_MVD_CHROMA_A_GATED);
1275     HAL_MVD_RegWriteBit(REG_CKG_MVD_CHROMA_A, !bOn, CKG_MVD_CHROMA_A_INVERT);
1276 
1277     HAL_MVD_RegWriteBit(REG_CKG_MVD_CHROMA_B, !bOn, CKG_MVD_CHROMA_B_GATED);
1278     HAL_MVD_RegWriteBit(REG_CKG_MVD_CHROMA_B, !bOn, CKG_MVD_CHROMA_B_INVERT);
1279 
1280     HAL_MVD_RegWriteBit(REG_CKG_MVD_CHROMA_C, !bOn, CKG_MVD_CHROMA_C_GATED);
1281     HAL_MVD_RegWriteBit(REG_CKG_MVD_CHROMA_C, !bOn, CKG_MVD_CHROMA_C_INVERT);
1282 
1283     HAL_MVD_RegWriteBit(REG_CKG_MVD_LUMA_A, !bOn, CKG_MVD_LUMA_A_GATED);
1284     HAL_MVD_RegWriteBit(REG_CKG_MVD_LUMA_A, !bOn, CKG_MVD_LUMA_A_INVERT);
1285 
1286     HAL_MVD_RegWriteBit(REG_CKG_MVD_LUMA_B, !bOn, CKG_MVD_LUMA_B_GATED);
1287     HAL_MVD_RegWriteBit(REG_CKG_MVD_LUMA_B, !bOn, CKG_MVD_LUMA_B_INVERT);
1288 
1289     HAL_MVD_RegWriteBit(REG_CKG_MVD_LUMA_C, !bOn, CKG_MVD_LUMA_C_GATED);
1290     HAL_MVD_RegWriteBit(REG_CKG_MVD_LUMA_C, !bOn, CKG_MVD_LUMA_C_INVERT);
1291 
1292     HAL_MVD_RegWriteBit(REG_CKG_MVD_RMEM, !bOn, CKG_MVD_RMEM_GATED);
1293     HAL_MVD_RegWriteBit(REG_CKG_MVD_RMEM, !bOn, CKG_MVD_RMEM_INVERT);
1294 
1295     HAL_MVD_RegWriteBit(REG_CKG_MVD_RMEM1, !bOn, CKG_MVD_RMEM1_GATED);
1296     HAL_MVD_RegWriteBit(REG_CKG_MVD_RMEM1, !bOn, CKG_MVD_RMEM1_INVERT);
1297 
1298     HAL_MVD_RegWriteBit(REG_CKG_MVD_RREFDAT, !bOn, CKG_MVD_RREFDAT_GATED);
1299     HAL_MVD_RegWriteBit(REG_CKG_MVD_RREFDAT, !bOn, CKG_MVD_RREFDAT_INVERT);
1300 
1301     //Set MVD all clock sources equal to clk_miu_p   0: enable  1: disable
1302     //Per Lawrence, mark this line:
1303     //  Sync mode is debug mode, so driver shouldn't write 1 to this register in normal case.
1304     //HAL_MVD_RegWriteBit(REG_CKG_MVD_SYNC, !bOn, CKG_MVD_SYNC_GATED);
1305 
1306     return;
1307 }
1308 
1309 #if 0
1310 void HAL_MVD_Sleep(MS_U32 u32us)
1311 {
1312     MsOS_DelayTaskUs(u32us);
1313 }
1314 #endif
HAL_MVD_ResetHandShake(MS_U8 u8Idx,MVD_HANDSHAKE_CMD cmd)1315 void HAL_MVD_ResetHandShake(MS_U8 u8Idx, MVD_HANDSHAKE_CMD cmd)
1316 {
1317     MS_U32 u32BufAddr = GET_FRMINFO_BUFFADD(u8Idx);
1318     HAL_MVD_CPU_Sync();
1319     HAL_MVD_ReadMemory();
1320     MVD_CMD_HANDSHADE_INDEX u32CmdState;
1321     u32CmdState.value= HAL_MVD_MemRead4Byte(u32BufAddr + OFFSET_CMD_HANDSHAKE_INDEX);
1322     switch (cmd)
1323     {
1324         case MVD_HANDSHAKE_PAUSE:
1325             (u32CmdState.mvdcmd_handshake_pause) = 0;
1326             break;
1327         case MVD_HANDSHAKE_SLQ_RST:
1328             (u32CmdState.mvdcmd_handshake_slq_reset) = 0;
1329             break;
1330         case MVD_HANDSHAKE_STOP:
1331             (u32CmdState.mvdcmd_handshake_stop) = 0;
1332             break;
1333         case MVD_HANDSHAKE_SKIP_DATA:
1334             (u32CmdState.mvdcmd_handshake_skip_data) = 0;
1335             break;
1336         case MVD_HANDSHAKE_SINGLE_STEP:
1337             (u32CmdState.mvdcmd_handshake_single_step) = 0;
1338             break;
1339         case MVD_HANDSHAKE_SCALER_INFO:
1340             (u32CmdState.mvdcmd_handshake_scaler_data_ready) = 0;
1341             break;
1342         case MVD_HANDSHAKE_GET_NXTDISPFRM:
1343             (u32CmdState.mvdcmd_handshake_get_nextdispfrm_ready) = 0;
1344             break;
1345         case MVD_HANDSHAKE_PARSER_RST:
1346             (u32CmdState.mvdcmd_handshake_parser_rst) = 0;
1347             break;
1348         case MVD_HANDSHAKE_RST_CC608:
1349             (u32CmdState.mvdcmd_handshake_cc608_rst) = 0;
1350             break;
1351         case MVD_HANDSHAKE_RST_CC708:
1352             (u32CmdState.mvdcmd_handshake_cc708_rst) = 0;
1353             break;
1354         case MVD_HANDSHAKE_VIRTUAL_COMMAND:
1355             (u32CmdState.mvdcmd_handshake_virtualCommand) = 0;
1356             break;
1357         case MVD_HANDSHAKE_FLUSHQUEUE_COMMAND:
1358             (u32CmdState.mvdcmd_handshake_flush) = 0;
1359             break;
1360         default:
1361             break;
1362     }
1363     HAL_MVD_MemWrite4Byte(u32BufAddr + OFFSET_CMD_HANDSHAKE_INDEX,u32CmdState.value);
1364     MsOS_FlushMemory();
1365 }
1366 
1367 //------------------------------------------------------------------------------
1368 /// Wait MVD command ready or timeout
1369 /// @return -MVD command ready or timeout
1370 //------------------------------------------------------------------------------
HAL_MVD_TimeOut(MS_U8 u8Idx)1371 MS_BOOL HAL_MVD_TimeOut(MS_U8 u8Idx)
1372 {
1373     MS_U32 i;
1374     MS_U32 u32StartTime = MsOS_GetSystemTime();
1375 
1376     for ( i = 0; i < MVD_PollingTimes; i++ )
1377     {
1378         ///- wait until MVD command ready or timeout
1379         if ( ( HAL_MVD_RegReadByte(MVD_STATUS) & MVD_STATUS_READY ) == MVD_STATUS_READY )
1380         {
1381             return FALSE;
1382         }
1383 
1384         if (/*(TRUE == pMVDHalContext->bStopped[u8Idx]) ||*/ ((MsOS_GetSystemTime()-u32StartTime)>1300))
1385         {
1386             MVD_DEBUGINFO(MVD_PRINT("%s: bStopped(%x) or timeout(%d)\n", __FUNCTION__, pMVDHalContext->bStopped[u8Idx], MsOS_GetSystemTime()-u32StartTime));
1387             return TRUE;
1388         }
1389 
1390         //HAL_MVD_Sleep(5);
1391     }
1392     MVD_DEBUGERROR( MVD_PRINT("MVD_TimeOut=%x\n", i) );
1393     return TRUE;
1394 }
1395 
1396 //------------------------------------------------------------------------------
1397 /// Set MVD firmware command
1398 /// @param -u8cmd \b IN : MVD command
1399 /// @param -pstCmdArg \b IN : pointer to command argument
1400 //------------------------------------------------------------------------------
HAL_MVD_MVDCommand(MS_U8 u8cmd,MVD_CmdArg * pstCmdArg)1401 MS_BOOL HAL_MVD_MVDCommand ( MS_U8 u8cmd, MVD_CmdArg *pstCmdArg )
1402 {
1403     MS_BOOL bRet = TRUE;
1404 #ifdef VDEC3
1405     MS_U32 u32CmdArg;
1406     MS_U32 u32Ret = FALSE;
1407     MS_U32 u32Timeout;
1408     MS_U8  u8HalIdx = pstCmdArg->Arg5;
1409     MS_U32 u32Id = MVD_GetStreamId(u8HalIdx);
1410     MS_U8 u8VPUIdx = HAL_VPU_EX_GetTaskId(u32Id);
1411     MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8HalIdx);
1412     CMD_QUEUE *pShm = (CMD_QUEUE *)MsOS_PA2KSEG1(pstMemCfg->u32FWCodeAddr + VCOMMANDQ_INFO_START + u8VPUIdx*0x100000);
1413     MS_VIRT u32BufStart2 = NULL;
1414     MS_BOOL bResponse = FALSE;
1415 #endif
1416     OSAL_MVD_LockHwMutex();
1417 
1418 #ifdef VDEC3
1419     if(HAL_MVD_IsDisplayCommand(u8cmd) == TRUE)
1420     {
1421         if(HAL_MVD_IsNeedResponseCommand(u8cmd) == TRUE)
1422         {
1423             // clear handshake dram
1424             u32BufStart2 = GET_VOL_BUFFADD(u8HalIdx);
1425 
1426             _miu_offset_to_phy(pMVDHalContext->stMiuCfg.u8FWMiuSel,u32BufStart2,u32BufStart2);
1427 
1428             MS_U8* temp2 = (MS_U8*)MsOS_PA2KSEG1(u32BufStart2+OFFSET_VCHANDSHAKE);
1429 
1430             *temp2 = 0;
1431 
1432             MsOS_FlushMemory();
1433         }
1434 
1435 
1436         u32CmdArg = pstCmdArg->Arg0 | (pstCmdArg->Arg1<<8) | (pstCmdArg->Arg2 << 16) | (pstCmdArg->Arg3 << 24);
1437 
1438         u32Timeout = MsOS_GetSystemTime()+VIRTUAL_CMD_TIMEOUT;
1439 
1440         do
1441         {
1442             u32Ret = HAL_VPU_EX_DRAMStreamDispCMDQueueSend(u32Id,(void*)pShm,E_HVD_CMDQ_ARG,u32CmdArg);
1443 
1444 
1445             if(u32Ret == E_HVD_COMMAND_QUEUE_NOT_INITIALED)
1446             {
1447                 bRet = FALSE;
1448                 break;
1449             }
1450             else if (MsOS_GetSystemTime() > u32Timeout && u32Ret != E_HVD_COMMAND_QUEUE_SEND_SUCCESSFUL )
1451             {
1452                 bRet = FALSE;
1453                 break;
1454             }
1455         }while(u32Ret != E_HVD_COMMAND_QUEUE_SEND_SUCCESSFUL);
1456 
1457         if(bRet == FALSE || u32Ret != E_HVD_COMMAND_QUEUE_SEND_SUCCESSFUL)
1458         {
1459             bRet = FALSE;
1460             goto _CMD_DONE;
1461         }
1462 
1463 
1464         u32Timeout = MsOS_GetSystemTime()+VIRTUAL_CMD_TIMEOUT;
1465 
1466         do
1467         {
1468             u32Ret = HAL_VPU_EX_DRAMStreamDispCMDQueueSend(u32Id,(void*)pShm,E_HVD_CMDQ_CMD,u8cmd|(u8VPUIdx<<24)|(pstCmdArg->Arg4<<16));
1469 
1470             if(u32Ret == E_HVD_COMMAND_QUEUE_NOT_INITIALED)
1471             {
1472                 bRet = FALSE;
1473                 break;
1474             }
1475             else if (MsOS_GetSystemTime() > u32Timeout && u32Ret != E_HVD_COMMAND_QUEUE_SEND_SUCCESSFUL)
1476             {
1477                 bRet = FALSE;
1478                 break;
1479             }
1480         }while(u32Ret != E_HVD_COMMAND_QUEUE_SEND_SUCCESSFUL);
1481 
1482         if(bRet == FALSE || u32Ret != E_HVD_COMMAND_QUEUE_SEND_SUCCESSFUL)
1483         {
1484             bRet = FALSE;
1485             goto _CMD_DONE;
1486         }
1487 
1488         if(HAL_MVD_IsNeedResponseCommand(u8cmd) == TRUE)
1489         {
1490             u32Timeout = MsOS_GetSystemTime()+VIRTUAL_CMD_TIMEOUT;
1491 
1492             while(MsOS_GetSystemTime() < u32Timeout)
1493             {
1494                 #if 0
1495                 if (HAL_MVD_IsCmdFinished(u8HalIdx, MVD_HANDSHAKE_VIRTUAL_COMMAND))
1496                 {
1497                     bResponse = TRUE;
1498                     break;
1499                 }
1500                 #else
1501                 if(MVD_GetFWBuffData(u8HalIdx, FW_BUFF_VOLINFO, OFFSET_VCHANDSHAKE, sizeof(MS_U8)) == 1)
1502                 {
1503                     bResponse = TRUE;
1504                     break;
1505                 }
1506                 #endif
1507             }
1508 
1509             if(bResponse == FALSE)  // fail case
1510             {
1511                 bRet = FALSE;
1512                 goto _CMD_DONE;
1513             }
1514 
1515             pstCmdArg->Arg0 = MVD_GetFWBuffData(u8HalIdx, FW_BUFF_VOLINFO, OFFSET_VIRTUAL_COMMANDARG0, sizeof(MS_U8));
1516             pstCmdArg->Arg1 = MVD_GetFWBuffData(u8HalIdx, FW_BUFF_VOLINFO, OFFSET_VIRTUAL_COMMANDARG1, sizeof(MS_U8));
1517             pstCmdArg->Arg2 = MVD_GetFWBuffData(u8HalIdx, FW_BUFF_VOLINFO, OFFSET_VIRTUAL_COMMANDARG2, sizeof(MS_U8));
1518             pstCmdArg->Arg3 = MVD_GetFWBuffData(u8HalIdx, FW_BUFF_VOLINFO, OFFSET_VIRTUAL_COMMANDARG3, sizeof(MS_U8));
1519             pstCmdArg->Arg4 = MVD_GetFWBuffData(u8HalIdx, FW_BUFF_VOLINFO, OFFSET_VIRTUAL_COMMANDARG4, sizeof(MS_U8));
1520         }
1521 
1522     }
1523     else if(HAL_MVD_IsNormalCommand(u8cmd) == TRUE)
1524     {
1525         if(HAL_MVD_IsNeedResponseCommand(u8cmd) == TRUE)
1526         {
1527             // clear handshake dram
1528             u32BufStart2 = GET_VOL_BUFFADD(u8HalIdx);
1529 
1530             _miu_offset_to_phy(pMVDHalContext->stMiuCfg.u8FWMiuSel,u32BufStart2,u32BufStart2);
1531 
1532             MS_U8* temp2 = (MS_U8*)MsOS_PA2KSEG1(u32BufStart2+OFFSET_VCHANDSHAKE);
1533 
1534             *temp2 = 0;
1535 
1536             MsOS_ReadMemory();
1537             MsOS_FlushMemory();
1538         }
1539 
1540         u32CmdArg = pstCmdArg->Arg0 | (pstCmdArg->Arg1<<8) | (pstCmdArg->Arg2 << 16) | (pstCmdArg->Arg3 << 24);
1541 
1542         u32Timeout = MsOS_GetSystemTime()+VIRTUAL_CMD_TIMEOUT;
1543 
1544         do
1545         {
1546             //u32Ret = HAL_VPU_EX_DRAMStreamCMDQueueSend_MVD(pstCmdArg->Arg5,E_HVD_CMDQ_ARG,u32CmdArg);
1547             u32Ret = HAL_VPU_EX_DRAMStreamCMDQueueSend(u32Id,(void*)pShm,E_HVD_CMDQ_ARG,u32CmdArg);
1548 
1549             if(u32Ret == E_HVD_COMMAND_QUEUE_NOT_INITIALED)
1550             {
1551                 bRet = FALSE;
1552                 break;
1553             }
1554             else if (MsOS_GetSystemTime() > u32Timeout && u32Ret != E_HVD_COMMAND_QUEUE_SEND_SUCCESSFUL )
1555             {
1556                 bRet = FALSE;
1557                 break;
1558             }
1559         }while(u32Ret != E_HVD_COMMAND_QUEUE_SEND_SUCCESSFUL);
1560 
1561 
1562         if(bRet == FALSE || u32Ret != E_HVD_COMMAND_QUEUE_SEND_SUCCESSFUL)
1563         {
1564             bRet = FALSE;
1565             goto _CMD_DONE;
1566         }
1567 
1568 
1569         u32Timeout = MsOS_GetSystemTime()+VIRTUAL_CMD_TIMEOUT;
1570         do
1571         {
1572             //u32Ret = HAL_VPU_EX_DRAMStreamCMDQueueSend_MVD(pstCmdArg->Arg5,E_HVD_CMDQ_CMD,u8cmd|(pstCmdArg->Arg5<<24)|(pstCmdArg->Arg4<<16));
1573             u32Ret = HAL_VPU_EX_DRAMStreamCMDQueueSend(u32Id,(void*)pShm,E_HVD_CMDQ_CMD,u8cmd|(u8VPUIdx<<24)|(pstCmdArg->Arg4<<16));
1574 
1575             if(u32Ret == E_HVD_COMMAND_QUEUE_NOT_INITIALED)
1576             {
1577                 bRet = FALSE;
1578                 break;
1579             }
1580             else if (MsOS_GetSystemTime() > u32Timeout && u32Ret != E_HVD_COMMAND_QUEUE_SEND_SUCCESSFUL)
1581             {
1582                 bRet = FALSE;
1583                 break;
1584             }
1585         }while(u32Ret != E_HVD_COMMAND_QUEUE_SEND_SUCCESSFUL);
1586 
1587         if(bRet == FALSE || u32Ret != E_HVD_COMMAND_QUEUE_SEND_SUCCESSFUL)
1588         {
1589             bRet = FALSE;
1590             goto _CMD_DONE;
1591         }
1592 
1593         if(HAL_MVD_IsNeedResponseCommand(u8cmd) == TRUE)
1594         {
1595             u32Timeout = MsOS_GetSystemTime()+VIRTUAL_CMD_TIMEOUT;
1596 
1597             while(MsOS_GetSystemTime() < u32Timeout)
1598             {
1599                 #if 0
1600                 if (HAL_MVD_IsCmdFinished(u8HalIdx, MVD_HANDSHAKE_VIRTUAL_COMMAND))
1601                 {
1602                     bResponse = TRUE;
1603                     break;
1604                 }
1605                 #else
1606                 if(MVD_GetFWBuffData(u8HalIdx, FW_BUFF_VOLINFO, OFFSET_VCHANDSHAKE, sizeof(MS_U8)) == 1)
1607                 {
1608                     bResponse = TRUE;
1609                     break;
1610                 }
1611                 #endif
1612             }
1613 
1614             if(bResponse == FALSE)  // fail case
1615             {
1616                 bRet = FALSE;
1617                 goto _CMD_DONE;
1618             }
1619 
1620             pstCmdArg->Arg0 = MVD_GetFWBuffData(u8HalIdx, FW_BUFF_VOLINFO, OFFSET_VIRTUAL_COMMANDARG0, sizeof(MS_U8));
1621             pstCmdArg->Arg1 = MVD_GetFWBuffData(u8HalIdx, FW_BUFF_VOLINFO, OFFSET_VIRTUAL_COMMANDARG1, sizeof(MS_U8));
1622             pstCmdArg->Arg2 = MVD_GetFWBuffData(u8HalIdx, FW_BUFF_VOLINFO, OFFSET_VIRTUAL_COMMANDARG2, sizeof(MS_U8));
1623             pstCmdArg->Arg3 = MVD_GetFWBuffData(u8HalIdx, FW_BUFF_VOLINFO, OFFSET_VIRTUAL_COMMANDARG3, sizeof(MS_U8));
1624             pstCmdArg->Arg4 = MVD_GetFWBuffData(u8HalIdx, FW_BUFF_VOLINFO, OFFSET_VIRTUAL_COMMANDARG4, sizeof(MS_U8));
1625         }
1626     }
1627     else
1628 #endif
1629     {
1630         if ( HAL_MVD_TimeOut(pstCmdArg->Arg5) == TRUE )
1631         {
1632             bRet = FALSE;
1633             goto _CMD_DONE;
1634         }
1635 
1636         HAL_MVD_RegWriteByte(MVD_ARG0, pstCmdArg->Arg0);
1637         HAL_MVD_RegWriteByte(MVD_ARG1, pstCmdArg->Arg1);
1638         HAL_MVD_RegWriteByte(MVD_ARG2, pstCmdArg->Arg2);
1639         HAL_MVD_RegWriteByte(MVD_ARG3, pstCmdArg->Arg3);
1640         HAL_MVD_RegWriteByte(MVD_ARG4, pstCmdArg->Arg4);
1641         HAL_MVD_RegWriteByte(MVD_ARG5, pstCmdArg->Arg5);
1642         HAL_MVD_RegWriteByte(MVD_COMMAND, u8cmd);
1643         if ((CMD_GET_AFD != u8cmd) && (CMD_SLQ_GET_TBL_RPTR != u8cmd) &&
1644             (CMD_SLQ_UPDATE_TBL_WPTR != u8cmd) && (CMD_GET_NEXTDISPFRM != u8cmd) &&
1645             (CMD_DECODE_STATUS != u8cmd) && (CMD_RD_PTS != u8cmd) &&
1646             (CMD_GET_INT_STAT != u8cmd) && (CMD_RD_IO != u8cmd))
1647         {
1648             MVD_DEBUG_FWCMD(MVD_PRINT("MVD_CMD: %x; %x, %x, %x, %x, %x, %x\n", u8cmd, pstCmdArg->Arg0,
1649             pstCmdArg->Arg1, pstCmdArg->Arg2, pstCmdArg->Arg3, pstCmdArg->Arg4, pstCmdArg->Arg5));
1650         }
1651 
1652         if ( HAL_MVD_TimeOut(pstCmdArg->Arg5) == TRUE )
1653         {
1654             bRet = FALSE;
1655             goto _CMD_DONE;
1656         }
1657 
1658         pstCmdArg->Arg0 = HAL_MVD_RegReadByte(MVD_ARG0);
1659         pstCmdArg->Arg1 = HAL_MVD_RegReadByte(MVD_ARG1);
1660         pstCmdArg->Arg2 = HAL_MVD_RegReadByte(MVD_ARG2);
1661         pstCmdArg->Arg3 = HAL_MVD_RegReadByte(MVD_ARG3);
1662         pstCmdArg->Arg4 = HAL_MVD_RegReadByte(MVD_ARG4);
1663         pstCmdArg->Arg5 = HAL_MVD_RegReadByte(MVD_ARG5);
1664     }
1665 
1666 _CMD_DONE:
1667     OSAL_MVD_UnlockHwMutex();
1668 
1669     if (!bRet)
1670     {
1671         MVD_DEBUG_FWCMD(MVD_PRINT("%s timeout dump pc\n", __FUNCTION__));
1672         MS_U32 x=0;
1673         for (x=0; x<30; x++)
1674             MVD_DEBUG_FWCMD(MVD_PRINT("0x%x\n", HAL_VPU_EX_GetProgCnt(u32Id)));
1675         MVD_DEBUG_FWCMD(MVD_PRINT("###\n"));
1676     }
1677 
1678     return bRet;
1679 }
1680 
HAL_MVD_SetSyncClk(MS_BOOL bEnable)1681 void HAL_MVD_SetSyncClk(MS_BOOL bEnable)
1682 {
1683     MS_ASSERT(0==bEnable);//Notice: Euclid & T3 have no sync_mode; Bit4 must be 0.
1684 
1685     OSAL_MVD_LockHwMutex();
1686     HAL_MVD_RegWriteBit(MVD_CTRL, bEnable, MVD_CTRL_CLK_SYNCMODE);
1687     OSAL_MVD_UnlockHwMutex();
1688 
1689     return;
1690 }
1691 
HAL_MVD_InitHW(MS_U32 u32Id,VPU_EX_SourceType SourceType,VPU_EX_DecoderType eDecType)1692 MS_BOOL HAL_MVD_InitHW(MS_U32 u32Id,VPU_EX_SourceType SourceType,VPU_EX_DecoderType eDecType)
1693 {
1694     //Set MVD Clock @ reg_CHIPTOP
1695     HAL_MVD_PowerCtrl(ENABLE);
1696 #ifdef CONFIG_MSTAR_CLKM
1697     if(eDecType == E_VPU_EX_DECODER_MVD)
1698     {
1699         HAL_VPU_EX_SetClkManagement(E_VPU_EX_CLKPORT_MVD_CORE, ENABLE);
1700     }
1701     if(SourceType == E_VPU_EX_INPUT_TSP)
1702     {
1703         HAL_VPU_EX_SetClkManagement(E_VPU_EX_CLKPORT_MVD_PAS, ENABLE);
1704     }
1705 #endif
1706 
1707 #ifdef CONFIG_MSTAR_SRAMPD
1708     HAL_MVD_RegWriteBit(REG_CODEC_SRAM_SD_EN, ENABLE, SRAM_SD_EN_MVD);
1709     HAL_MVD_Delayms(1);
1710 #endif
1711 
1712     //Set MVD Clock aync
1713     HAL_MVD_SetSyncClk(DISABLE);
1714 
1715     //MVD reset
1716     if(!HAL_MVD_RstHW(u32Id))
1717     {
1718         MVD_DEBUGERROR(MVD_PRINT("MDrv_MVD_MVDInit:MVD4ResetHW failed\n"));
1719         return FALSE;
1720     }
1721     else
1722     {
1723         MVD_DEBUGINFO(MVD_PRINT("MDrv_MVD_MVDInit:MVD4ResetHW success\n"));
1724     }
1725 
1726     return TRUE;
1727 }
1728 
1729 
1730 //------------------------------------------------------------------------------
1731 /// Get MVD firmware version
1732 /// @return -firmware version
1733 //------------------------------------------------------------------------------
HAL_MVD_GetFWVer(MS_U32 u32VpuSid)1734 MS_U32 HAL_MVD_GetFWVer(MS_U32 u32VpuSid)
1735 {
1736 #if 0
1737     return HAL_VPU_EX_GetFWVer(u32VpuSid, E_VPU_EX_FW_VER_MVD_FW);
1738 #else
1739     UNUSED(u32VpuSid);
1740     MVD_CmdArg mvdcmd;
1741 
1742     SETUP_CMDARG(mvdcmd);
1743     if (HAL_MVD_MVDCommand( CMD_GET_FW_VERSION, &mvdcmd ) == FALSE)
1744     {
1745         MVD_ERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_GET_FW_VERSION ) );
1746         return 0;
1747     }
1748     return COMBU32(mvdcmd.Arg3,mvdcmd.Arg2,mvdcmd.Arg1,mvdcmd.Arg0);
1749 #endif
1750 }
1751 
1752 //------------------------------------------------------------------------------
1753 /// Get MVD firmware interface version
1754 /// @return -firmware interface version
1755 //------------------------------------------------------------------------------
HAL_MVD_GetFWIfVer(MS_U32 u32VpuSid)1756 MS_U32 HAL_MVD_GetFWIfVer(MS_U32 u32VpuSid)
1757 {
1758 #if 0
1759     return HAL_VPU_EX_GetFWVer(u32VpuSid, E_VPU_EX_FW_VER_MVD_IF);
1760 #else
1761     UNUSED(u32VpuSid);
1762     MVD_CmdArg mvdcmd;
1763 
1764     SETUP_CMDARG(mvdcmd);
1765     if (HAL_MVD_MVDCommand( CMD_INTERFACE_VERSION, &mvdcmd ) == FALSE)
1766     {
1767         MVD_ERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_INTERFACE_VERSION ) );
1768         return 0;
1769     }
1770     return COMBU32(mvdcmd.Arg3,mvdcmd.Arg2,mvdcmd.Arg1,mvdcmd.Arg0);
1771 #endif
1772 }
1773 
1774 //------------------------------------------------------------------------------
1775 /// Check MVD firmware status
1776 /// @return -firmware is ready or not
1777 //------------------------------------------------------------------------------
1778 
1779 #ifdef VDEC3
_MVD_Check_FW_Rdy(MS_U32 u32VpuSid)1780 static MS_BOOL _MVD_Check_FW_Rdy(MS_U32 u32VpuSid)
1781 {
1782     MS_U32 u32Id = MVD_GetStreamId(u32VpuSid);
1783     MS_U8 u8VPUIdx = HAL_VPU_EX_GetTaskId(u32Id);
1784     MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u32VpuSid);
1785     MS_U32 u32TimeOut = MsOS_GetSystemTime() + 500;
1786     unsigned int* pVersion = (unsigned int*)MsOS_PA2KSEG1(pstMemCfg->u32FWCodeAddr + OFFSET_BASE + u8VPUIdx*0x100000);
1787     MS_BOOL ret = FALSE;
1788 
1789     while(MsOS_GetSystemTime() < u32TimeOut)
1790     {
1791         if(((*pVersion) == FW_VERSION) && ((*(pVersion+4)) == INTERFACE_VERSION))
1792         {
1793             ret = TRUE;
1794             break;
1795         }
1796     }
1797 
1798     if (ret == FALSE)
1799     {
1800         MVD_ERROR(MVD_PRINT("MVD f/w header version is wrong,%x,%x,%x,%x\n",(*(pVersion+4)), INTERFACE_VERSION,(*pVersion), FW_VERSION));
1801     }
1802 
1803     return ret;
1804 }
1805 
1806 #else
_MVD_Check_FW_Rdy(MS_U32 u32VpuSid)1807 static MS_BOOL _MVD_Check_FW_Rdy(MS_U32 u32VpuSid)
1808 {
1809     MS_U32 u32TimeOut = 2000;
1810 
1811     //check firmware version consistent with header file
1812     while ((INTERFACE_VERSION != HAL_MVD_GetFWIfVer(u32VpuSid)) && (--u32TimeOut));
1813     if (u32TimeOut == 0)
1814     {
1815         MVD_ERROR(MVD_PRINT("MVD_FW_IF_Version=%lx inconsistent with header file(%x)!\n",
1816             HAL_MVD_GetFWIfVer(u32VpuSid), INTERFACE_VERSION));
1817         return FALSE;
1818     }
1819 
1820     if (FW_VERSION != HAL_MVD_GetFWVer(u32VpuSid))
1821     {
1822         MVD_DEBUGINFO(MVD_PRINT("Warning! FWBinVer(%lx) != FWHdrVer(%x)\n", HAL_MVD_GetFWVer(u32VpuSid), FW_VERSION));
1823     }
1824     MVD_DEBUGINFO(MVD_PRINT("MVD version Interface = %x, FW = %x\n", INTERFACE_VERSION, FW_VERSION));
1825 
1826     return TRUE;
1827 }
1828 #endif
_DumpCtrl(MS_U8 u8Idx)1829 MS_BOOL _DumpCtrl(MS_U8 u8Idx)
1830 {
1831     MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
1832 
1833     //MVD_PRINT("u32VA=0x%lx, PA=0x%x\n", u32VA, pstMemCfg->u32FWCodeAddr);
1834     struct _ctl_info *ctl_ptr = (struct _ctl_info *)
1835         HAL_MVD_PA2NonCacheSeg(pstMemCfg->u32FWCodeAddr + CTL_INFO_ADDR);
1836     MS_U32 u32timeout = HAL_MVD_GetTime() + 1000;//u32HVDCmdTimeout;
1837 
1838     HAL_MVD_ReadMemory();
1839 
1840     MVD_DEBUGINFO(MVD_PRINT("version=0x%x, statue=0x%x, last_ctl_cmd=0x%x, last_ctl_arg=0x%x\n",
1841         ctl_ptr->verion, ctl_ptr->statue, ctl_ptr->last_ctl_cmd, ctl_ptr->last_ctl_arg));
1842 
1843     while (CTL_TASK_CMDRDY != ctl_ptr->statue)
1844     {
1845         if (HAL_MVD_GetTime() > u32timeout)
1846         {
1847             MVD_DEBUGERROR(MVD_PRINT("CTRL timeout!!! %d\n", __LINE__));
1848             return FALSE;
1849         }
1850     }
1851 
1852     MVD_DEBUGINFO(MVD_PRINT("Version=0x%x, statue=0x%x, last_ctl_cmd=0x%x, last_ctl_arg=0x%x\n",
1853         ctl_ptr->verion, ctl_ptr->statue, ctl_ptr->last_ctl_cmd, ctl_ptr->last_ctl_arg));
1854 
1855     MS_U8 i;
1856 
1857     for (i = 0; i < 4; i++)
1858     {
1859         MVD_DEBUGINFO(MVD_PRINT("%s: Task %d, status=%d\n", __FUNCTION__, i, ctl_ptr->task_statue[i]));
1860     }
1861     return TRUE;
1862 }
1863 
1864 
MVD_MapVpuSrcType(MVD_SrcMode eSrcMode)1865 static VPU_EX_SourceType MVD_MapVpuSrcType(MVD_SrcMode eSrcMode)
1866 {
1867     VPU_EX_SourceType eVpuSrcType = E_VPU_EX_INPUT_NONE;
1868     switch (eSrcMode)
1869     {
1870         case E_MVD_TS_MODE:
1871         case E_MVD_TS_FILE_MODE:
1872             eVpuSrcType = E_VPU_EX_INPUT_TSP;
1873             break;
1874 
1875         case E_MVD_SLQ_TBL_MODE:
1876         case E_MVD_SLQ_MODE:
1877         case E_MVD_FILE_MODE:
1878             eVpuSrcType = E_VPU_EX_INPUT_FILE;
1879             break;
1880 
1881         case E_MVD_SRC_UNKNOWN:
1882         default:
1883             break;
1884     }
1885     return eVpuSrcType;
1886 }
1887 
MVD_GetTaskInfo(VPU_EX_TaskInfo * pstTaskInfo,MS_U32 u32Id,MS_U8 u8Idx,HAL_VPU_StreamId eVpuId)1888 static void MVD_GetTaskInfo(VPU_EX_TaskInfo* pstTaskInfo, MS_U32 u32Id, MS_U8 u8Idx, HAL_VPU_StreamId eVpuId)
1889 {
1890     pstTaskInfo->u32Id = u32Id & 0xFFFF;
1891     pstTaskInfo->eDecType = E_VPU_EX_DECODER_MVD;
1892     pstTaskInfo->eVpuId = eVpuId;
1893     pstTaskInfo->eSrcType = MVD_MapVpuSrcType(HAL_MVD_GetSrcMode(u8Idx));
1894     pstTaskInfo->u32HeapSize = MVD_DRAM_SIZE;
1895 }
1896 
HAL_MVD_Eng_MiuClientSel(MS_U8 u8MiuSel)1897 void HAL_MVD_Eng_MiuClientSel(MS_U8 u8MiuSel)  //SW select
1898 {
1899     if (u8MiuSel == E_CHIP_MIU_0)
1900     {
1901         HAL_MVD_RegWriteBit(MIU0_SEL2_L, 0, BIT6);
1902         HAL_MVD_RegWriteBit(MIU0_SEL4_H, 0, BIT1);
1903     }
1904     else if (u8MiuSel == E_CHIP_MIU_1)
1905     {
1906         HAL_MVD_RegWriteBit(MIU0_SEL2_L, 1, BIT6);
1907         HAL_MVD_RegWriteBit(MIU0_SEL4_H, 1, BIT1);
1908     }
1909 }
1910 
HAL_MVD_CreateTask(MS_U8 u8Idx,HAL_VPU_StreamId eVpuId)1911 MS_BOOL HAL_MVD_CreateTask(MS_U8 u8Idx, HAL_VPU_StreamId eVpuId)
1912 {
1913     MS_BOOL bRet = FALSE;
1914     MS_BOOL bFWdecideFB = FALSE;
1915     MVD_FWCfg* pstCfg = HAL_MVD_GetFWCfg(u8Idx);
1916     MS_U32 u32Id = MVD_GetStreamId(u8Idx);
1917     HAL_VPU_EX_SetFWReload(u32Id, !(pstCfg->bNotReload));
1918 
1919     MVD_DEBUGINFO(MVD_PRINT("\n\n Create Task(%x)!!!\n", u8Idx));
1920     VPU_EX_TaskInfo stTaskInfo;
1921     MVD_GetTaskInfo(&stTaskInfo, u32Id, u8Idx, eVpuId);
1922 
1923     VPU_EX_FWCodeCfg stVpuFWCfg;
1924     VPU_EX_NDecInitPara stVpuInitPara;
1925     stVpuInitPara.pFWCodeCfg = &stVpuFWCfg;
1926     stVpuInitPara.pTaskInfo = &stTaskInfo;
1927     stVpuInitPara.pVLCCfg   = NULL;
1928 
1929     MVD_MEMCfg* pMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
1930     stVpuFWCfg.u32BinAddr = HAL_MVD_PA2NonCacheSeg(pMemCfg->u32FWBinAddr);
1931     stVpuFWCfg.u32BinSize = pMemCfg->u32FWBinSize;
1932     stVpuFWCfg.u32DstAddr = HAL_MVD_PA2NonCacheSeg(pMemCfg->u32FWCodeAddr);
1933     stVpuFWCfg.u32DstSize = pMemCfg->u32FWCodeSize;
1934     stVpuFWCfg.u8SrcType  = pMemCfg->eFWSrcType;
1935 
1936     MS_U8 u8MiuSel;
1937     MS_U32 u32StartOffset;
1938 
1939     _phy_to_miu_offset(u8MiuSel, u32StartOffset, pMemCfg->u32FBAddr);
1940     //VPRINTF("[MVD FB] addr=0x%x, size=0x%x, miu=%d \n", (MS_U32)(pMemCfg->u32FBAddr), pMemCfg->u32FBSize, u8MiuSel);
1941     HAL_MVD_Eng_MiuClientSel(u8MiuSel);
1942 
1943 
1944 #ifdef VDEC3
1945     VPU_EX_FBCfg pFBCfg;
1946     stVpuInitPara.pFBCfg = &pFBCfg;
1947 
1948     #if defined(MSOS_TYPE_LINUX) && defined(SUPPORT_CMA)
1949     if(pMVDHalContext->bCMAUsed == TRUE)
1950     {
1951         stVpuInitPara.pFBCfg->u32FrameBufAddr = (MS_VIRT)pMVDHalContext->cmaInitParam.heap_miu_start_offset;
1952         stVpuInitPara.pFBCfg->u32FrameBufSize = (MS_VIRT)pMVDHalContext->cmaInitParam.heap_length;
1953         bFWdecideFB = TRUE;
1954     }
1955     #endif
1956 
1957     stTaskInfo.u8HalId = u8Idx;
1958     pMVDHalContext->_stMVDStream[u8Idx].u32SLQId = HAL_VPU_EX_GetBBUId(stTaskInfo.u32Id, &stTaskInfo, FALSE);
1959     if(pMVDHalContext->_stMVDStream[u8Idx].u32SLQId == HAL_VPU_INVALID_BBU_ID)
1960     {
1961         MVD_DEBUGINFO(MVD_PRINT("ERROR!!!MVD GetBBU Id Fail \n"));
1962     }
1963     else
1964     {
1965         bRet = HAL_VPU_EX_TaskCreate((MS_U32)eVpuId, (void*)&stVpuInitPara, bFWdecideFB, pMVDHalContext->_stMVDStream[u8Idx].u32SLQId);
1966     }
1967 #else
1968     bRet = HAL_VPU_EX_TaskCreate((MS_U32)eVpuId, (void*)&stVpuInitPara);
1969 #endif
1970     MVD_DEBUGINFO(MVD_PRINT(" Create Task!!! bRet=%x ###\n\n", bRet));
1971     _DumpCtrl(u8Idx);
1972 
1973     return bRet;
1974 }
1975 
HAL_MVD_DeleteTask(MS_U8 u8Idx,HAL_VPU_StreamId eVpuId)1976 MS_BOOL HAL_MVD_DeleteTask(MS_U8 u8Idx, HAL_VPU_StreamId eVpuId)
1977 {
1978     MS_BOOL bRet = FALSE;
1979     MVD_DEBUGINFO(MVD_PRINT("\n\n Delete Task(%x)!!!\n", u8Idx));
1980 
1981     MS_U32 u32Id = MVD_GetStreamId(u8Idx);
1982     VPU_EX_TaskInfo stTaskInfo;
1983     MVD_GetTaskInfo(&stTaskInfo, u32Id, u8Idx, eVpuId);
1984 
1985     VPU_EX_FWCodeCfg stVpuFWCfg;
1986     VPU_EX_NDecInitPara stVpuInitPara;
1987     stVpuInitPara.pFWCodeCfg = &stVpuFWCfg;
1988     stVpuInitPara.pTaskInfo = &stTaskInfo;
1989 
1990     MVD_MEMCfg* pMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
1991     stVpuFWCfg.u32BinAddr = HAL_MVD_PA2NonCacheSeg(pMemCfg->u32FWBinAddr);
1992     stVpuFWCfg.u32BinSize = pMemCfg->u32FWBinSize;
1993     stVpuFWCfg.u32DstAddr = HAL_MVD_PA2NonCacheSeg(pMemCfg->u32FWCodeAddr);
1994     stVpuFWCfg.u8SrcType  = pMemCfg->eFWSrcType;
1995 
1996 #ifdef VDEC3
1997     if(!HAL_VPU_EX_FreeBBUId(stTaskInfo.u32Id, pMVDHalContext->_stMVDStream[u8Idx].u32SLQId, &stTaskInfo))
1998     {
1999         MVD_DEBUGINFO(MVD_PRINT("ERROR!!! Free BBU Id Fail !!!\n"));
2000     }
2001 #endif
2002     bRet = HAL_VPU_EX_TaskDelete((MS_U32) eVpuId, &stVpuInitPara);
2003     MVD_DEBUGINFO(MVD_PRINT(" Delete Task!!! ###\n\n"));
2004     _DumpCtrl(u8Idx);
2005     return bRet;
2006 }
2007 
HAL_MVD_InitFW(MS_U32 u32VpuSid)2008 MS_BOOL HAL_MVD_InitFW(MS_U32 u32VpuSid)
2009 {
2010     //to fix the timing issue of getting FWIfVer on Chakra2
2011     HAL_MVD_Delayms(1);
2012 
2013     //check FW ready
2014     if ( !_MVD_Check_FW_Rdy(u32VpuSid))
2015     {
2016         MS_ASSERT(0);
2017         return FALSE;
2018     }
2019 
2020 #if 0
2021     if(pMVDHalContext->_stMVDStream[0].bUsed == FALSE && pMVDHalContext->_stMVDStream[1].bUsed == FALSE)   // no mvd is used
2022     {
2023         MVD_CmdArg mvdcmd;
2024         SETUP_CMDARG(mvdcmd);
2025         mvdcmd.Arg0 = 1; //reset mvd engine,if have only one mvd
2026         SET_DECNUM(mvdcmd, ((MS_U8)u32VpuSid));
2027         if (HAL_MVD_MVDCommand( CMD_SW_RESET, &mvdcmd ) == FALSE)
2028         {
2029             MVD_ERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_SW_RESET ) );
2030             return FALSE;
2031         }
2032     }
2033 #endif
2034     return TRUE;
2035 }
2036 
2037 #define _MVD_INIT_FAIL_RET()                                            \
2038             do {                                                        \
2039                 HAL_MVD_SetIsUsed(u8HalIdx, FALSE);                     \
2040                 return FALSE;                                           \
2041             } while (0)
2042 
2043 
HAL_MVD_Init(MS_U8 u8HalIdx,MVD_CodecType eCodecType,MS_U32 u32VpuSid)2044 MS_BOOL HAL_MVD_Init(MS_U8 u8HalIdx,MVD_CodecType eCodecType, MS_U32 u32VpuSid)
2045 {
2046     //OSAL_MVD_MutexInit();
2047     MS_BOOL no_use = FALSE;
2048     MS_BOOL ret;
2049 
2050     ret = MDrv_MVD_AUTH_IPCheck(eCodecType,&no_use);
2051     if(ret == FALSE)
2052     {
2053         return FALSE;
2054     }
2055 
2056     if (!HAL_MVD_CreateTask(u8HalIdx, (HAL_VPU_StreamId)u32VpuSid))
2057     {
2058         _MVD_INIT_FAIL_RET();
2059     }
2060 
2061     pMVDHalContext->bStopped[u8HalIdx] = FALSE;
2062 
2063     if (!HAL_MVD_InitFW(u8HalIdx))
2064     {
2065         MVD_DEBUGERROR(MVD_PRINT("%s:HAL_MVD_InitFW(%x) failed\n", __FUNCTION__, u8HalIdx));
2066         if (!HAL_MVD_DeleteTask(u8HalIdx, (HAL_VPU_StreamId)u32VpuSid))
2067         {
2068             MVD_DEBUGERROR(MVD_PRINT("%s:HAL_MVD_DeleteTask failed\n", __FUNCTION__));
2069         }
2070 
2071         _MVD_INIT_FAIL_RET();
2072     }
2073     else
2074     {
2075         MVD_DEBUGINFO(MVD_PRINT("%s:HAL_MVD_InitFW(%x) success\n", __FUNCTION__, u8HalIdx));
2076     }
2077 
2078     HAL_MVD_SetIsUsed(u8HalIdx, TRUE);
2079 
2080     return TRUE;
2081 }
2082 
2083 #define _MVD_CMDRDY ((HAL_MVD_RegReadByte(MVD_STATUS) & MVD_STATUS_READY) == MVD_STATUS_READY)
2084 //------------------------------------------------------------------------------
2085 /// Check if MVD command is ready
2086 /// @return TRUE or FALSE
2087 ///     - TRUE, Success to process the command
2088 ///     - FALSE, Failed due to timeout
2089 //------------------------------------------------------------------------------
HAL_MVD_GetCmdRdy(void)2090 MS_BOOL HAL_MVD_GetCmdRdy(void)
2091 {
2092     MS_U32 timeoutTick = 2000;
2093 
2094     while ((!_MVD_CMDRDY) && ((timeoutTick--)!=0));
2095 
2096     if (0 == timeoutTick)
2097         return FALSE;
2098     else
2099         return TRUE;
2100 }
2101 
HAL_MVD_CheckIdle(void)2102 MS_BOOL HAL_MVD_CheckIdle(void)
2103 {
2104     MS_BOOL bIsIdle = FALSE;
2105     MVD_CmdArg mvdcmd;
2106 
2107     //issue CheckIdle command
2108     SETUP_CMDARG(mvdcmd);
2109     SET_CMD_RET_FALSE(CMD_MVD_IDLE, &mvdcmd);
2110 
2111     bIsIdle = (mvdcmd.Arg0 == 1);
2112     if (HAL_MVD_GetCmdRdy())
2113     {
2114         return bIsIdle;
2115     }
2116     else
2117     {
2118         return FALSE;
2119     }
2120 }
2121 
2122 
_MVD_SoftRstHW(void)2123 static MS_BOOL _MVD_SoftRstHW(void)
2124 {
2125     return FALSE;
2126 }
2127 
2128 //------------------------------------------------------------------------------
2129 /// Soft-reset MVD
2130 /// Ref AP note p.12 HK2MVD Reset Flow
2131 /// @return TRUE or FALSE
2132 ///     - TRUE, Success to soft-reset MVD
2133 ///     - FALSE, Failed. Need init MVD again.
2134 //------------------------------------------------------------------------------
HAL_MVD_SoftRstHW(void)2135 MS_BOOL HAL_MVD_SoftRstHW(void)
2136 {
2137     MS_U32 timetick = 2000;
2138 
2139     if (HAL_MVD_GetCmdRdy())
2140     {
2141         //idle check
2142         while ((!HAL_MVD_CheckIdle()) && ((timetick--)!=0));
2143 
2144         //either MVD is idle or timeout, do ENG/SLQ reset
2145         return _MVD_SoftRstHW(); //Reset HW engine
2146     }
2147     else
2148     {
2149         return FALSE; //here means "CPU hanging"
2150     }
2151 }
2152 
2153 //------------------------------------------------------------------------------
2154 /// Clean the IRQ bit (in interrupt handler should call this function while the
2155 /// interrupt has been triggered.
2156 /// @param none
2157 /// @return none
2158 /// @internal
2159 //------------------------------------------------------------------------------
HAL_MVD_ClearIRQ(void)2160 void HAL_MVD_ClearIRQ(void)
2161 {
2162     OSAL_MVD_LockHwMutex();
2163     HAL_MVD_RegWriteBit(MVD_CTRL, 1, MVD_CTRL_CLR_INT);
2164     OSAL_MVD_UnlockHwMutex();
2165     return;
2166 }
2167 
2168 //------------------------------------------------------------------------------
2169 /// Set display speed.
2170 ///FW use (# of B frames) / (# of decode frames) < Ratio this formula to adjustment.
2171 ///Once if the ratio is 1, that means, whenever (#Bframes / #decoded) < 1, then
2172 ///FW would drop the B frame.
2173 ///In other words, once AP need to back to normal mode, AP have to set the arg0 to 0.
2174 //------------------------------------------------------------------------------
HAL_MVD_SetSpeed(MS_U8 u8Idx,MVD_SpeedType eSpeedType,MS_U8 u8Multiple)2175 MS_BOOL HAL_MVD_SetSpeed(MS_U8 u8Idx, MVD_SpeedType eSpeedType, MS_U8 u8Multiple)
2176 {
2177     MVD_CmdArg mvdcmd;
2178 
2179     SETUP_CMDARG(mvdcmd);
2180 
2181     if (E_MVD_SPEED_FAST == eSpeedType)
2182         mvdcmd.Arg0 = 1; //fast forward
2183     else if (E_MVD_SPEED_SLOW == eSpeedType)
2184         mvdcmd.Arg0 = 2; //slow motion
2185     else
2186         mvdcmd.Arg0 = 0; //normal speed
2187 
2188     if (u8Multiple == 1)
2189     {
2190         mvdcmd.Arg0 = 0;
2191         //The only way to be NORMAL speed.
2192     }
2193 
2194     mvdcmd.Arg1 = u8Multiple;
2195     if(pMVDHalContext->bTrickPlay2xAVSync[u8Idx] == TRUE && eSpeedType == E_MVD_SPEED_FAST && u8Multiple == 2)
2196     {
2197         mvdcmd.Arg2 = 1;
2198     }
2199     else
2200     {
2201         mvdcmd.Arg2 = 0;
2202     }
2203 
2204     SET_DECNUM(mvdcmd, u8Idx);
2205     SET_CMD_RET_FALSE(CMD_DISP_SPEED_CTRL, &mvdcmd);
2206     return TRUE;
2207 }
2208 
2209 //------------------------------------------------------------------------------
2210 /// Set frame buffer address to MVD
2211 /// @param -u32addr \b IN : start address
2212 //------------------------------------------------------------------------------
HAL_MVD_SetFrameBuffAddr(MS_U8 u8Idx,MS_VIRT u32addr,MS_U8 u8fbMode)2213 void HAL_MVD_SetFrameBuffAddr(MS_U8 u8Idx, MS_VIRT u32addr, MS_U8 u8fbMode)
2214 {
2215     MVD_CmdArg mvdcmd;
2216     if(pMVDHalContext->bCMAUsed)
2217     {
2218         u8fbMode = MVD_CMA_MODE;
2219     }
2220 
2221     if ((u32addr>>3) > MAX_ADD_28BIT)// TODO: fixme, in 64bits system, address may be more than 28 bits
2222     {
2223         MVD_DEBUGERROR(MVD_PRINT("MDrv_MVD_SetFrameBuffAddr: only support 28bit add!\n"));
2224         return;
2225     }
2226 
2227     MS_ASSERT((u32addr%8)==0);
2228     u32addr >>= 3;
2229 
2230     SETUP_CMDARG(mvdcmd);
2231     mvdcmd.Arg0 = L_WORD(u32addr);
2232     mvdcmd.Arg1 = H_WORD(u32addr);
2233     mvdcmd.Arg2 = L_DWORD(u32addr);
2234 
2235     //Frame Buffer Mode Setting
2236     mvdcmd.Arg3 = u8fbMode | ((u32addr>>24)&0x0f);
2237     mvdcmd.Arg4 = u8fbMode & 0xff;
2238     MVD_DEBUGINFO(MVD_PRINT("FramebufferAdd 0x%lx, FB Mode 0x%x, arg3=0x%x\n", (unsigned long)u32addr, u8fbMode, mvdcmd.Arg3));
2239     SET_DECNUM(mvdcmd, u8Idx);
2240     if (HAL_MVD_MVDCommand( CMD_FB_BASE, &mvdcmd ) == FALSE)
2241     {
2242         MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_FB_BASE ) );
2243         return;
2244     }
2245 
2246     return;
2247 }
2248 
2249 //------------------------------------------------------------------------------
2250 /// Set header buffer address to MVD
2251 /// @param -u32addr \b IN : start address
2252 //------------------------------------------------------------------------------
HAL_MVD_SetHeaderBufferAddr(MS_U8 u8Idx,MS_VIRT u32addr)2253 void HAL_MVD_SetHeaderBufferAddr (MS_U8 u8Idx, MS_VIRT u32addr )
2254 {
2255     MVD_CmdArg mvdcmd;
2256 
2257     MS_ASSERT((u32addr%8)==0);
2258     u32addr >>= 3;
2259 
2260     SET_CMDARG(mvdcmd, u32addr, u8Idx);
2261     if (HAL_MVD_MVDCommand( CMD_HEADER_INFO_BUF, &mvdcmd ) == FALSE)
2262     {
2263         MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_HEADER_INFO_BUF ) );
2264     }
2265     return;
2266 }
2267 
2268 //------------------------------------------------------------------------------
2269 /// Set vol info buffer address to MVD
2270 /// @param -u32addr \b IN : start address
2271 //------------------------------------------------------------------------------
HAL_MVD_SetVolInfoBufferAddr(MS_U8 u8Idx,MS_VIRT u32addr)2272 void HAL_MVD_SetVolInfoBufferAddr (MS_U8 u8Idx, MS_VIRT u32addr )
2273 {
2274     MVD_CmdArg mvdcmd;
2275 
2276     MS_ASSERT((u32addr%8)==0);
2277     u32addr >>= 3;
2278 
2279     SET_CMDARG(mvdcmd, u32addr, u8Idx);
2280     if (HAL_MVD_MVDCommand( CMD_VOL_INFO_BUF, &mvdcmd ) == FALSE)
2281     {
2282         MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_VOL_INFO_BUF ) );
2283     }
2284     return;
2285 }
2286 
2287 //------------------------------------------------------------------------------
2288 /// Set frame info buffer address to MVD
2289 /// @param -u32addr \b IN : start address
2290 //------------------------------------------------------------------------------
HAL_MVD_SetFrameInfoBufferAddr(MS_U8 u8Idx,MS_VIRT u32addr)2291 void HAL_MVD_SetFrameInfoBufferAddr (MS_U8 u8Idx, MS_VIRT u32addr )
2292 {
2293     MVD_CmdArg mvdcmd;
2294 
2295     MS_ASSERT((u32addr%8)==0);
2296     u32addr >>= 3;
2297 
2298     SET_CMDARG(mvdcmd, u32addr, u8Idx);
2299     if (HAL_MVD_MVDCommand( CMD_FRAME_INFO_BUF, &mvdcmd ) == FALSE)
2300     {
2301         MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_FRAME_INFO_BUF ) );
2302     }
2303     return;
2304 }
2305 
2306 //------------------------------------------------------------------------------
2307 /// Set IAP buffer address to MVD
2308 /// @param -u32addr \b IN : start address
2309 //------------------------------------------------------------------------------
HAL_MVD_SetIAPBufferAddr(MS_U8 u8Idx,MS_VIRT u32addr)2310 void HAL_MVD_SetIAPBufferAddr (MS_U8 u8Idx, MS_VIRT u32addr )
2311 {
2312     MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
2313     MVD_CmdArg mvdcmd;
2314     MS_ASSERT((u32addr%8192)==0);
2315     u32addr >>= 13;
2316 
2317     SET_CMDARG(mvdcmd, u32addr, u8Idx);
2318     mvdcmd.Arg4 = pstMemCfg->u8FBMiuSel;
2319     if (HAL_MVD_MVDCommand( CMD_IAP_BUF_START, &mvdcmd ) == FALSE)
2320     {
2321         MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_IAP_BUF_START ) );
2322     }
2323     return;
2324 }
2325 
2326 //------------------------------------------------------------------------------
2327 /// Set Data Partition buffer address to MVD
2328 /// @param -u32addr \b IN : start address
2329 //------------------------------------------------------------------------------
HAL_MVD_SetDPBufferAddr(MS_U8 u8Idx,MS_VIRT u32addr)2330 void HAL_MVD_SetDPBufferAddr (MS_U8 u8Idx, MS_VIRT u32addr )
2331 {
2332     MVD_CmdArg mvdcmd;
2333     MS_ASSERT((u32addr%8)==0);
2334     u32addr >>= 3;
2335 
2336     SET_CMDARG(mvdcmd, u32addr, u8Idx);
2337     if (HAL_MVD_MVDCommand( CMD_DP_BUF_START, &mvdcmd ) == FALSE)
2338     {
2339         MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_DP_BUF_START ) );
2340     }
2341     return;
2342 }
2343 
2344 //------------------------------------------------------------------------------
2345 /// Set Motion Vector buffer address to MVD
2346 /// @param -u32addr \b IN : start address
2347 //------------------------------------------------------------------------------
HAL_MVD_SetMVBufferAddr(MS_U8 u8Idx,MS_VIRT u32addr)2348 void HAL_MVD_SetMVBufferAddr (MS_U8 u8Idx, MS_VIRT u32addr )
2349 {
2350     MVD_CmdArg mvdcmd;
2351     MS_ASSERT((u32addr%2048)==0);
2352     u32addr >>= 3;
2353 
2354     SET_CMDARG(mvdcmd, u32addr, u8Idx);
2355     if (HAL_MVD_MVDCommand( CMD_MV_BUF_START, &mvdcmd ) == FALSE)
2356     {
2357         MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_MV_BUF_START ) );
2358     }
2359     return;
2360 }
2361 
_MVD_SetUserDataBufStart(MS_U8 u8Idx,MS_VIRT u32addr,MS_U8 u8arg3)2362 static void _MVD_SetUserDataBufStart(MS_U8 u8Idx, MS_VIRT u32addr, MS_U8 u8arg3)
2363 {
2364     MVD_CmdArg mvdcmd;
2365 
2366     MS_ASSERT((u32addr%8)==0);
2367     u32addr >>= 3;
2368     MVD_DEBUGINFO(MVD_PRINT("%s add=0x%lx arg3=0x%x\n", __FUNCTION__, (unsigned long)u32addr, u8arg3));
2369 
2370     SETUP_CMDARG(mvdcmd);
2371     mvdcmd.Arg0 = L_WORD(u32addr);
2372     mvdcmd.Arg1 = H_WORD(u32addr);
2373     mvdcmd.Arg2 = L_DWORD(u32addr);
2374     mvdcmd.Arg4 = H_DWORD(u32addr);
2375     mvdcmd.Arg3 = u8arg3;
2376     SET_DECNUM(mvdcmd, u8Idx);
2377     if (HAL_MVD_MVDCommand( CMD_USER_BUF_START, &mvdcmd ) == FALSE)
2378     {
2379         MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_USER_BUF_START ) );
2380         return;
2381     }
2382     return;
2383 }
2384 
_MVD_SetUserDataBufSize(MS_U8 u8Idx,MS_U32 u32size,MS_U8 u8arg3)2385 static void _MVD_SetUserDataBufSize(MS_U8 u8Idx, MS_U32 u32size, MS_U8 u8arg3)
2386 {
2387     MVD_CmdArg mvdcmd;
2388 
2389     MS_ASSERT((u32size%8)==0);
2390     u32size >>= 3;
2391     MVD_DEBUGINFO(MVD_PRINT("%s add=0x%x arg3=0x%x\n", __FUNCTION__, u32size, u8arg3));
2392 
2393     SETUP_CMDARG(mvdcmd);
2394     mvdcmd.Arg0 = L_WORD(u32size);
2395     mvdcmd.Arg1 = H_WORD(u32size);
2396     mvdcmd.Arg2 = L_DWORD(u32size);
2397     mvdcmd.Arg4 = H_DWORD(u32size);
2398     mvdcmd.Arg3 = u8arg3;
2399     if(mvdcmd.Arg3 <= 1) //mean 608 and 708 in MM RVU
2400     {
2401       mvdcmd.Arg2 = 7;//ntsc1+ntsc2+atsc
2402       mvdcmd.Arg4 = 0;
2403     }
2404     SET_DECNUM(mvdcmd, u8Idx);
2405     if (HAL_MVD_MVDCommand( CMD_USER_BUF_SIZE, &mvdcmd ) == FALSE)
2406     {
2407         MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_USER_BUF_SIZE ) );
2408         return;
2409     }
2410     return;
2411 }
2412 
2413 //------------------------------------------------------------------------------
2414 /// Set user data buffer address to MVD
2415 /// @param -u32addr \b IN : start address
2416 //------------------------------------------------------------------------------
HAL_MVD_SetUserDataBuf(MS_U8 u8Idx,MS_VIRT u32addr,MS_U32 u32size)2417 void HAL_MVD_SetUserDataBuf(MS_U8 u8Idx, MS_VIRT u32addr, MS_U32 u32size)
2418 {
2419     MS_U8 u8ccType = 0;
2420 
2421     MS_ASSERT((u32addr%8)==0);
2422     MS_ASSERT((u32size%8)==0);
2423 #ifdef REDLION_LINUX_KERNEL_ENVI
2424     u8ccType = 2;
2425 #elif defined(MVD_SUPPORT_X4_CC)
2426     u8ccType = 4;   //display order
2427 #else
2428     u8ccType = 2;// 2 for testing 0;
2429 #endif
2430 
2431 #if defined(MVD_SUPPORT_X4_CC)
2432     //set decoding buffer address
2433     _MVD_SetUserDataBufStart(u8Idx, u32addr+u32size, 3);
2434 #endif
2435 
2436     //set CC output buffer address
2437     _MVD_SetUserDataBufStart(u8Idx, u32addr, u8ccType);
2438 
2439 #if defined(MVD_SUPPORT_X4_CC)
2440     //set decoding buffer size
2441     _MVD_SetUserDataBufSize(u8Idx, u32size, 3);
2442 #endif
2443 
2444     //set CC output buffer size
2445     _MVD_SetUserDataBufSize(u8Idx, u32size, u8ccType);
2446 
2447     return;
2448 }
2449 
HAL_MVD_SetSLQTblBufStartEnd(MS_U8 u8Idx,MS_VIRT u32start,MS_VIRT u32end)2450 void HAL_MVD_SetSLQTblBufStartEnd(MS_U8 u8Idx, MS_VIRT u32start, MS_VIRT u32end)
2451 {
2452     MVD_CmdArg mvdcmd;
2453     MS_U32 u32val = u32end>>3;
2454     MVD_DEBUGINFO(MVD_PRINT("%s st=0x%lx end=0x%lx\n", __FUNCTION__, (unsigned long)u32start, (unsigned long)u32end));
2455 
2456     SET_CMDARG(mvdcmd, u32val, u8Idx);
2457     if (HAL_MVD_MVDCommand( CMD_SLQ_TBL_BUF_END, &mvdcmd ) == FALSE)
2458     {
2459         MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_SLQ_TBL_BUF_END ) );
2460         return;
2461     }
2462 
2463     u32val = (u32start)>>3;
2464     SET_CMDARG(mvdcmd, u32val, u8Idx);
2465     if (HAL_MVD_MVDCommand( CMD_SLQ_TBL_BUF_START, &mvdcmd ) == FALSE)
2466     {
2467         MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_SLQ_TBL_BUF_START ) );
2468         return;
2469     }
2470 
2471     MVD_DEBUGINFO(MVD_PRINT("%s st=0x%lx end=0x%lx OK!!!\n", __FUNCTION__, (unsigned long)u32start, (unsigned long)u32end));
2472     return;
2473 }
2474 
2475 //------------------------------------------------------------------------------
2476 /// Issue StepDisplay command.
2477 /// @return -TRUE for success; FALSE for failure.
2478 //------------------------------------------------------------------------------
HAL_MVD_StepDisp(MS_U8 u8Idx)2479 MS_BOOL HAL_MVD_StepDisp(MS_U8 u8Idx)
2480 {
2481     MVD_CmdArg mvdcmd;
2482 
2483     MVD_SetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_STEP_DISP_DONE, sizeof(MS_U8), 0);
2484 
2485     SETUP_CMDARG(mvdcmd);
2486     SET_DECNUM(mvdcmd, u8Idx);
2487     SET_CMD_RET_FALSE(CMD_STEP_DISP_DECODE_ONE, &mvdcmd);
2488     if (HAL_MVD_Resume(u8Idx) == FALSE)
2489     {
2490         MVD_DEBUGERROR( MVD_PRINT( "Command: HAL_MVD_Resume fail!!\r\n" ) );
2491         return FALSE;
2492     }
2493 
2494     return TRUE;
2495 }
2496 
2497 //------------------------------------------------------------------------------
2498 /// Get ES read address for TS file mode.
2499 /// @return ES read address
2500 //------------------------------------------------------------------------------
HAL_MVD_GetTsFileESReadPtr(MS_U8 u8Idx)2501 MS_VIRT HAL_MVD_GetTsFileESReadPtr(MS_U8 u8Idx)
2502 {
2503     MS_VIRT u32Add = 0;
2504     MVD_CmdArg mvdcmd;
2505 
2506     SETUP_CMDARG(mvdcmd);
2507     mvdcmd.Arg0 = 2;    //ES diff
2508     SET_DECNUM(mvdcmd, u8Idx);
2509     if (HAL_MVD_MVDCommand( CMD_PARSER_READ_POSITION, &mvdcmd ) == TRUE)
2510     {
2511         //in order to latch the newest parser status
2512         //u32Diff = (((MS_U32)mvdcmd.Arg3) <<24) | (((MS_U32)mvdcmd.Arg2) <<16) |
2513         //          (((MS_U32)mvdcmd.Arg1) << 8) | (((MS_U32)mvdcmd.Arg0));
2514     }
2515     else
2516     {
2517         MVD_DEBUGERROR( MVD_PRINT( "Ctrl: 0x%x fail!!\n", CMD_PARSER_READ_POSITION) );
2518     }
2519 
2520     SETUP_CMDARG(mvdcmd);
2521     mvdcmd.Arg0 = 1;
2522     SET_DECNUM(mvdcmd, u8Idx);
2523     if (HAL_MVD_MVDCommand( CMD_PARSER_READ_POSITION, &mvdcmd ) == TRUE)
2524     {
2525         u32Add = (((MS_U32)mvdcmd.Arg3) <<24) |
2526                  (((MS_U32)mvdcmd.Arg2) <<16) |
2527                  (((MS_U32)mvdcmd.Arg1) << 8) |
2528                  (((MS_U32)mvdcmd.Arg0));
2529     }
2530     else
2531     {
2532         MVD_DEBUGERROR( MVD_PRINT( "Ctrl: 0x%x fail!!\n", CMD_PARSER_READ_POSITION) );
2533     }
2534 
2535     return (u32Add*8);
2536 }
2537 
2538 //------------------------------------------------------------------------------
2539 /// Get ES write address for TS file mode.
2540 /// @return ES write address
2541 //------------------------------------------------------------------------------
HAL_MVD_GetTsFileESWritePtr(MS_U8 u8Idx)2542 MS_VIRT HAL_MVD_GetTsFileESWritePtr(MS_U8 u8Idx)
2543 {
2544     MS_VIRT u32Diff = 0;
2545     MS_VIRT u32WrPtr = 0;
2546     MVD_CmdArg mvdcmd;
2547     MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
2548     MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
2549 
2550     SETUP_CMDARG(mvdcmd);
2551     mvdcmd.Arg0 = 2;    //ES diff
2552     SET_DECNUM(mvdcmd, u8Idx);
2553     if (HAL_MVD_MVDCommand( CMD_PARSER_READ_POSITION, &mvdcmd ) == TRUE)
2554     {
2555         u32Diff = (((MS_U32)mvdcmd.Arg3) <<24) | (((MS_U32)mvdcmd.Arg2) <<16) |
2556                   (((MS_U32)mvdcmd.Arg1) << 8) | (((MS_U32)mvdcmd.Arg0));
2557     }
2558     else
2559     {
2560         MVD_DEBUGERROR( MVD_PRINT( "Ctrl: 0x%x fail!!\n", CMD_PARSER_READ_POSITION) );
2561     }
2562 
2563     u32WrPtr = u32Diff*8 + HAL_MVD_GetTsFileESReadPtr(u8Idx);
2564     if (u32WrPtr > pstSlqTblInfo->u32ESBuffEnd)
2565     {
2566         MVD_DEBUGINFO(MVD_PRINT("ES wrapping Wr=0x%lx ==> ", (unsigned long)u32WrPtr));
2567         u32WrPtr -= pstMemCfg->u32BSSize;
2568         MVD_DEBUGINFO(MVD_PRINT("0x%lx\n", (unsigned long)u32WrPtr));
2569     }
2570     return u32WrPtr;
2571 }
2572 
2573 //------------------------------------------------------------------------------
2574 /// Enable/Disable firmware to show the last frame.
2575 /// @return -TRUE for success; FALSE for failure.
2576 //------------------------------------------------------------------------------
HAL_MVD_EnableLastFrameShow(MS_U8 u8Idx,MS_BOOL bEnable)2577 MS_BOOL HAL_MVD_EnableLastFrameShow(MS_U8 u8Idx, MS_BOOL bEnable)
2578 {
2579     MVD_CmdArg mvdcmd;
2580     MVD_SrcMode curSrcMode = HAL_MVD_GetSrcMode(u8Idx);
2581     MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
2582     MS_VIRT* pu32FileEndPtr = &pstSlqTblInfo->u32FileEndPtr;
2583 
2584     if (E_MVD_SLQ_TBL_MODE == curSrcMode)
2585     {
2586     #if SLQ_NEW_PUSH
2587         if (pstSlqTblInfo->pSlqStatus->bSlqCtrlBit)
2588         {
2589             pstSlqTblInfo->pDrvSlqTbl->u32WrPtr = pstSlqTblInfo->pSlqStatus->u32VaildWptrAddr + SLQ_ENTRY_LEN;
2590         }
2591     #endif //
2592         //save current writePtr
2593         if (pstSlqTblInfo->pDrvSlqTbl->u32WrPtr != pstSlqTblInfo->pDrvSlqTbl->u32EndAdd)
2594         {
2595             *pu32FileEndPtr = pstSlqTblInfo->pDrvSlqTbl->u32WrPtr;
2596         }
2597         else
2598         {
2599             *pu32FileEndPtr = pstSlqTblInfo->pDrvSlqTbl->u32StAdd;
2600         }
2601         MVD_DEBUGINFO(MVD_PRINT("fe=%lx, rd=%lx, wr=%lx\n", (unsigned long)*pu32FileEndPtr,
2602                         (unsigned long)pstSlqTblInfo->pDrvSlqTbl->u32RdPtr, (unsigned long)pstSlqTblInfo->pDrvSlqTbl->u32WrPtr));
2603     }
2604 
2605     SETUP_CMDARG(mvdcmd);
2606     mvdcmd.Arg0 = bEnable;
2607     SET_DECNUM(mvdcmd, u8Idx);
2608     SET_CMD_RET_FALSE(CMD_ENABLE_LAST_FRAME_SHOW, &mvdcmd);
2609     return TRUE;
2610 }
2611 
2612 
HAL_MVD_SlqTblRst(MS_U8 u8Idx)2613 MS_BOOL HAL_MVD_SlqTblRst(MS_U8 u8Idx)
2614 {
2615     MVD_CmdArg mvdcmd;
2616     MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
2617 
2618     SETUP_CMDARG(mvdcmd);
2619     SET_DECNUM(mvdcmd, u8Idx);
2620     SET_CMD_RET_FALSE(CMD_VC1_HW_SLQ_RESET, &mvdcmd);
2621     pstSlqTblInfo->bEnSlqTblHkCtrl = FALSE;
2622     return TRUE;
2623 }
2624 
HAL_MVD_SeekToPTS(MS_U8 u8Idx,MS_U32 u32Pts)2625 MS_BOOL HAL_MVD_SeekToPTS(MS_U8 u8Idx, MS_U32 u32Pts)
2626 {
2627     MVD_CmdArg mvdcmd;
2628 
2629     SET_CMDARG(mvdcmd, u32Pts, u8Idx);
2630     SET_CMD_RET_FALSE(CMD_STEP_TO_PTS, &mvdcmd);
2631 
2632     if (HAL_MVD_Resume(u8Idx) == FALSE)
2633     {
2634         MVD_DEBUGERROR( MVD_PRINT( "Command: HAL_MVD_Resume fail!!\r\n" ) );
2635         return FALSE;
2636     }
2637     return TRUE;
2638 }
2639 
HAL_MVD_SkipToPTS(MS_U8 u8Idx,MS_U32 u32Pts)2640 MS_BOOL HAL_MVD_SkipToPTS(MS_U8 u8Idx, MS_U32 u32Pts)
2641 {
2642     MVD_CmdArg mvdcmd;
2643 
2644     SET_CMDARG(mvdcmd, u32Pts, u8Idx);
2645     SET_CMD_RET_FALSE(CMD_SKIP_TO_PTS, &mvdcmd);
2646 
2647     if (HAL_MVD_Resume(u8Idx) == FALSE)
2648     {
2649         MVD_DEBUGERROR( MVD_PRINT( "Command: HAL_MVD_Resume fail!!\r\n" ) );
2650         return FALSE;
2651     }
2652     return TRUE;
2653 }
2654 
HAL_MVD_TrickPlay(MS_U8 u8Idx,MVD_TrickDec trickDec,MS_U8 u8DispDuration)2655 MS_BOOL HAL_MVD_TrickPlay(MS_U8 u8Idx, MVD_TrickDec trickDec, MS_U8 u8DispDuration)
2656 {
2657     MVD_CmdArg mvdcmd;
2658     MS_U8 u8DecType;
2659 
2660     switch (trickDec)
2661     {
2662         case E_MVD_TRICK_DEC_ALL:
2663             u8DecType = 0;
2664             break;
2665         case E_MVD_TRICK_DEC_I:
2666             u8DecType = 1;
2667             break;
2668         case E_MVD_TRICK_DEC_IP:
2669             u8DecType = 2;
2670             break;
2671         default:
2672             return FALSE;
2673             break;
2674     }
2675 
2676     SETUP_CMDARG(mvdcmd);
2677     mvdcmd.Arg0 = u8DecType;
2678     mvdcmd.Arg1 = u8DispDuration;
2679     SET_DECNUM(mvdcmd, u8Idx);
2680     SET_CMD_RET_FALSE(CMD_FAST_SLOW, &mvdcmd);
2681 
2682     pMVDHalContext->stCtrlCfg[u8Idx].eTrickMode = trickDec;
2683     return TRUE;
2684 }
2685 
HAL_MVD_FlushDisplayBuf(MS_U8 u8Idx)2686 MS_BOOL HAL_MVD_FlushDisplayBuf(MS_U8 u8Idx)
2687 {
2688     #define STOP_TIMEOUT 500 //ms
2689     MS_U32 u32StartTime = 0;
2690 
2691     HAL_MVD_ResetHandShake(u8Idx, MVD_HANDSHAKE_FLUSHQUEUE_COMMAND);
2692     MVD_CmdArg mvdcmd;
2693     SETUP_CMDARG(mvdcmd);
2694     SET_DECNUM(mvdcmd, u8Idx);
2695     SET_CMD_RET_FALSE(CMD_FLUSH_DISP_QUEUE, &mvdcmd);
2696 
2697     u32StartTime = HAL_MVD_GetTime();
2698 
2699     while(!HAL_MVD_IsCmdFinished(u8Idx, MVD_HANDSHAKE_FLUSHQUEUE_COMMAND))
2700     {
2701         if ((HAL_MVD_GetTime()-u32StartTime)>STOP_TIMEOUT)
2702         {
2703             MVD_DEBUGERROR( MVD_PRINT( "Ctrl: 0x%x fail timeout!!\r\n", CMD_FLUSH_DISP_QUEUE ) );
2704             break;
2705         }
2706     }
2707 
2708     return TRUE;
2709 }
2710 
2711 
HAL_MVD_SetFileModeAVSync(MS_U8 u8Idx,MVD_TIMESTAMP_TYPE eSyncMode)2712 MS_BOOL HAL_MVD_SetFileModeAVSync(MS_U8 u8Idx, MVD_TIMESTAMP_TYPE eSyncMode)
2713 {
2714     MVD_CmdArg mvdcmd;
2715     MVD_CtrlCfg* pstCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
2716 
2717     pstCtrlCfg->eFileSyncMode = eSyncMode;
2718     MVD_DEBUGINFO(MVD_PRINT("%s eSyncMode=%d\n", __FUNCTION__, eSyncMode));
2719     SETUP_CMDARG(mvdcmd);
2720     switch (eSyncMode)
2721     {
2722         case E_MVD_TIMESTAMP_PTS:
2723         case E_MVD_TIMESTAMP_PTS_RVU:
2724             mvdcmd.Arg0 = FILE_PTS_MODE;
2725             break;
2726 
2727         case E_MVD_TIMESTAMP_DTS:
2728         case E_MVD_TIMESTAMP_DTS_RVU:
2729             mvdcmd.Arg0 = FILE_DTS_MODE;
2730             break;
2731         case E_MVD_TIMESTAMP_NEW_STS:
2732             mvdcmd.Arg0 = FILE_STS_MODE;
2733             break;
2734         case E_MVD_TIMESTAMP_FREERUN:
2735         default:
2736             mvdcmd.Arg0 = NONE_FILE_MODE; //Freerun
2737             break;
2738     }
2739     SET_DECNUM(mvdcmd, u8Idx);
2740     SET_CMD_RET_FALSE(CMD_ENABLE_FILE_SYNC, &mvdcmd);
2741 
2742     SETUP_CMDARG(mvdcmd);
2743     switch (eSyncMode) //for set RVU mode
2744     {
2745         case E_MVD_TIMESTAMP_PTS_RVU:
2746              mvdcmd.Arg0 = FILE_PTS_MODE;
2747              break;
2748         case E_MVD_TIMESTAMP_DTS_RVU:
2749              mvdcmd.Arg0 = FILE_DTS_MODE;
2750              break;
2751         case E_MVD_TIMESTAMP_FREERUN:
2752         default:
2753              mvdcmd.Arg0 = 0xFF;
2754              break;
2755     }
2756     SET_DECNUM(mvdcmd, u8Idx);
2757     SET_CMD_RET_FALSE(CMD_RVU_EN, &mvdcmd);
2758     return TRUE;
2759 }
2760 
2761 
2762 
2763 
2764 //------------------------------------------------------------------------------
2765 /// Set the start address of PTS table used for SLQ table link mode.
2766 /// @return -TRUE for success; FALSE for failure.
2767 //------------------------------------------------------------------------------
HAL_MVD_SetPtsTblAddr(MS_U8 u8Idx,MS_VIRT u32addr)2768 MS_BOOL HAL_MVD_SetPtsTblAddr(MS_U8 u8Idx, MS_VIRT u32addr)
2769 {
2770     MVD_CmdArg mvdcmd;
2771 
2772     MS_ASSERT((u32addr%8)==0);
2773     u32addr >>= 3;
2774 
2775     SET_CMDARG(mvdcmd, u32addr, u8Idx);
2776     SET_CMD_RET_FALSE(CMD_PTS_TBL_START, &mvdcmd);
2777     return TRUE;
2778 }
2779 
HAL_MVD_SkipToIFrame(MS_U8 u8Idx)2780 MS_BOOL HAL_MVD_SkipToIFrame(MS_U8 u8Idx)
2781 {
2782     MVD_CmdArg mvdcmd;
2783     SETUP_CMDARG(mvdcmd);
2784     SET_DECNUM(mvdcmd, u8Idx);
2785     SET_CMD_RET_FALSE(CMD_START_DEC_STRICT, &mvdcmd);
2786     return TRUE;
2787 }
2788 
2789 //Map driver FRC (Frame rate conversion) mode to firmware's.
HAL_MVD_MapFrcMode(MVD_FrcMode eFrcMode)2790 MS_U8 HAL_MVD_MapFrcMode(MVD_FrcMode eFrcMode)
2791 {
2792     MS_U8 frcMode = 0xf;
2793     switch (eFrcMode)
2794     {
2795         case E_MVD_FRC_NORMAL:
2796             frcMode = FrcNormal;
2797             break;
2798         case E_MVD_FRC_DISP_TWICE:
2799             frcMode = FrcDisplayTwice;
2800             break;
2801         case E_MVD_FRC_3_2_PULLDOWN:    //film 24 -> 50i
2802             frcMode = Frc32Pulldown;
2803             break;
2804         case E_MVD_FRC_PAL_TO_NTSC:
2805             frcMode = FrcPALtoNTSC;
2806             break;
2807         case E_MVD_FRC_NTSC_TO_PAL:
2808             frcMode = FrcNTSCtoPAL;
2809             break;
2810         case E_MVD_FRC_DISP_ONEFIELD:
2811             frcMode = FrcShowOneFiled;
2812             break;
2813         default:
2814             break;
2815     }
2816     return frcMode;
2817 }
2818 
HAL_MVD_DispCtrl(MS_U8 u8Idx,MS_BOOL bDecOrder,MS_BOOL bDropErr,MS_BOOL bDropDisp,MVD_FrcMode eFrcMode)2819 MS_BOOL HAL_MVD_DispCtrl(MS_U8 u8Idx, MS_BOOL bDecOrder, MS_BOOL bDropErr, MS_BOOL bDropDisp, MVD_FrcMode eFrcMode)
2820 {
2821     MVD_CmdArg mvdcmd;
2822     MVD_CtrlCfg* pstCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
2823     MS_BOOL* pbDropErrFrm = &pstCtrlCfg->bDropErrFrm;
2824 
2825     SETUP_CMDARG(mvdcmd);
2826     mvdcmd.Arg0 = (MS_U8)bDecOrder;
2827     mvdcmd.Arg1 = (MS_U8)bDropErr;
2828     mvdcmd.Arg2 = (MS_U8)bDropDisp;
2829     mvdcmd.Arg3 = HAL_MVD_MapFrcMode(eFrcMode);
2830     SET_DECNUM(mvdcmd, u8Idx);
2831     SET_CMD_RET_FALSE(CMD_DISPLAY_CTL, &mvdcmd);
2832 
2833     pstCtrlCfg->eFrcMode = eFrcMode;
2834 
2835     if (*pbDropErrFrm != bDropErr)
2836     {
2837         MVD_DEBUGINFO( MVD_PRINT("bDropErrFrm(%d) != bDropErr(%d)\n", *pbDropErrFrm, bDropErr));
2838         *pbDropErrFrm = bDropErr;
2839     }
2840     pstCtrlCfg->bDropDispfrm = bDropDisp;
2841 
2842     return TRUE;
2843 }
2844 
2845 
HAL_MVD_SkipData(MS_U8 u8Idx)2846 MS_BOOL HAL_MVD_SkipData(MS_U8 u8Idx)
2847 {
2848     MS_U32 u32TimeCnt = 0;
2849     MVD_CmdArg mvdcmd;
2850 
2851     HAL_MVD_ResetHandShake(u8Idx, MVD_HANDSHAKE_SKIP_DATA);
2852     SETUP_CMDARG(mvdcmd);
2853     SET_DECNUM(mvdcmd, u8Idx);
2854     SET_CMD_RET_FALSE(CMD_SKIP_DATA, &mvdcmd);
2855 
2856     u32TimeCnt = HAL_MVD_GetTime();
2857     while ((HAL_MVD_GetTime() - u32TimeCnt) < SKIP_DATA_TIMEOUT_MS)
2858     {
2859         if (HAL_MVD_IsCmdFinished(u8Idx, MVD_HANDSHAKE_SKIP_DATA))
2860         {
2861             MVD_DEBUGINFO(MVD_PRINT("\nSkip data finished!\n"));
2862             break;
2863         }
2864     }
2865     MVD_DEBUGINFO(MVD_PRINT("====> %s (t1=%u t2=%u diff=%u)\n", __FUNCTION__,
2866         u32TimeCnt, HAL_MVD_GetTime(), (HAL_MVD_GetTime() - u32TimeCnt)));
2867     if (TRUE != HAL_MVD_IsCmdFinished(u8Idx, MVD_HANDSHAKE_SKIP_DATA))
2868     {
2869         MVD_DEBUGINFO(MVD_PRINT("\n***** TS flush timeout *****\n\n"));
2870         return FALSE;
2871     }
2872 
2873         return TRUE;
2874     }
2875 
HAL_MVD_DispRepeatField(MS_U8 u8Idx,MS_BOOL bEnable)2876 MS_BOOL HAL_MVD_DispRepeatField(MS_U8 u8Idx, MS_BOOL bEnable)
2877 {
2878     MVD_CmdArg mvdcmd;
2879     SETUP_CMDARG(mvdcmd);
2880     mvdcmd.Arg0 = bEnable;
2881     SET_DECNUM(mvdcmd, u8Idx);
2882     SET_CMD_RET_FALSE(CMD_REPEAT_MODE, &mvdcmd);
2883     return TRUE;
2884 }
2885 
2886 //------------------------------------------------------------------------------
2887 /// Pause display.
2888 /// @return -TRUE for success; FALSE for failure
2889 //------------------------------------------------------------------------------
HAL_MVD_PauseDisp(MS_U8 u8Idx)2890 MS_BOOL HAL_MVD_PauseDisp(MS_U8 u8Idx)
2891 {
2892     MS_BOOL bRst = TRUE;
2893     MVD_CmdArg mvdcmd;
2894 
2895     SETUP_CMDARG(mvdcmd);
2896     mvdcmd.Arg0 = DISPLAY_PAUSE_ON;
2897     SET_DECNUM(mvdcmd, u8Idx);
2898     if (HAL_MVD_MVDCommand(CMD_DISPLAY_PAUSE, &mvdcmd)== FALSE)
2899     {
2900         MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x(ON) fail!!\r\n", CMD_DISPLAY_PAUSE) );
2901         bRst = FALSE;
2902     }
2903     return bRst;
2904 }
2905 
2906 //------------------------------------------------------------------------------
2907 /// Issue Pause command.
2908 /// @return -TRUE for success; FALSE for failure
2909 //------------------------------------------------------------------------------
HAL_MVD_Resume(MS_U8 u8Idx)2910 MS_BOOL HAL_MVD_Resume(MS_U8 u8Idx)
2911 {
2912     MS_BOOL bRst = TRUE;
2913     MVD_CmdArg mvdcmd;
2914 
2915     SETUP_CMDARG(mvdcmd);
2916     mvdcmd.Arg0 = DISPLAY_PAUSE_OFF;
2917     SET_DECNUM(mvdcmd, u8Idx);
2918     if (HAL_MVD_MVDCommand(CMD_DISPLAY_PAUSE, &mvdcmd)== FALSE)
2919     {
2920         MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_DISPLAY_PAUSE) );
2921         bRst = FALSE;
2922     }
2923     return bRst;
2924 }
2925 
HAL_MVD_Play(MS_U8 u8Idx)2926 MS_BOOL HAL_MVD_Play(MS_U8 u8Idx)
2927 {
2928     MVD_CmdArg mvdcmd;
2929     SETUP_CMDARG(mvdcmd);
2930     mvdcmd.Arg0 = 1;
2931     SET_DECNUM(mvdcmd, u8Idx);
2932     SET_CMD_RET_FALSE(CMD_DIU_WIDTH_ALIGN, &mvdcmd);
2933 
2934     SETUP_CMDARG(mvdcmd);
2935     SET_DECNUM(mvdcmd, u8Idx);
2936     SET_CMD_RET_FALSE(CMD_PLAY, &mvdcmd);
2937 
2938     if (HAL_MVD_Resume(u8Idx) == FALSE)
2939     {
2940         MVD_DEBUGERROR( MVD_PRINT( "Command: HAL_MVD_Resume fail!!\r\n" ) );
2941         return FALSE;
2942     }
2943 
2944     MVD_CtrlCfg* pCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
2945     pCtrlCfg->bDecodeIFrame = FALSE;
2946 
2947     return TRUE;
2948 }
2949 
2950 //------------------------------------------------------------------------------
2951 /// Set base address for ScalerInfo structure to f/w
2952 /// @param -u32addr \b IN : start address (units in byte)
2953 //------------------------------------------------------------------------------
HAL_MVD_SetScalerInfoAddr(MS_U8 u8Idx,MS_VIRT u32addr,MS_U8 u8Arg4)2954 MS_BOOL HAL_MVD_SetScalerInfoAddr(MS_U8 u8Idx, MS_VIRT u32addr,MS_U8 u8Arg4)
2955 {
2956     MVD_CmdArg mvdcmd;
2957 
2958     MS_ASSERT((u32addr%8)==0);
2959     u32addr >>= 3;
2960 
2961     SET_CMDARG(mvdcmd, u32addr, u8Idx);
2962     mvdcmd.Arg4 = u8Arg4;
2963     SET_CMD_RET_FALSE(CMD_SCALER_INFO_BASE, &mvdcmd);
2964     return TRUE;
2965 }
2966 
2967 //------------------------------------------------------------------------------
2968 /// Set the dynamic scale base address
2969 /// @return -TRUE for success; FALSE for failure.
2970 //------------------------------------------------------------------------------
HAL_MVD_SetDynamicScaleAddr(MS_U8 u8Idx,MS_VIRT u32addr)2971 MS_BOOL HAL_MVD_SetDynamicScaleAddr(MS_U8 u8Idx, MS_VIRT u32addr)
2972 {
2973     MVD_CmdArg mvdcmd;
2974 
2975     MS_ASSERT((u32addr%8)==0);
2976     u32addr >>= 3;
2977 
2978     SET_CMDARG(mvdcmd, u32addr, u8Idx);
2979     SET_CMD_RET_FALSE(CMD_DYNAMIC_SCALE_BASE, &mvdcmd);
2980     return TRUE;
2981 }
2982 
2983 //------------------------------------------------------------------------------
2984 /// Set virtual box width/height to F/W.
2985 /// F/W will use the same w/h as scaler to calculate scaling factor.
2986 /// @return -TRUE for success; FALSE for failure.
2987 //------------------------------------------------------------------------------
HAL_MVD_SetVirtualBox(MS_U8 u8Idx,MS_U16 u16Width,MS_U16 u16Height)2988 MS_BOOL HAL_MVD_SetVirtualBox(MS_U8 u8Idx, MS_U16 u16Width, MS_U16 u16Height)
2989 {
2990     MVD_CmdArg mvdcmd;
2991 
2992     SETUP_CMDARG(mvdcmd);
2993     mvdcmd.Arg0 = L_WORD(u16Width);
2994     mvdcmd.Arg1 = H_WORD(u16Width);
2995     mvdcmd.Arg2 = L_WORD(u16Height);
2996     mvdcmd.Arg3 = H_WORD(u16Height);
2997     SET_DECNUM(mvdcmd, u8Idx);
2998     SET_CMD_RET_FALSE(CMD_DS_VIRTUAL_BOX, &mvdcmd);
2999     return TRUE;
3000 }
3001 
3002 //------------------------------------------------------------------------------
3003 /// Enable VC1 dynamic scaling
3004 /// @return -TRUE for success; FALSE for failure.
3005 //------------------------------------------------------------------------------
HAL_MVD_EnableDynamicScale(MS_U8 u8Idx,MS_U8 u8NewDS)3006 MS_BOOL HAL_MVD_EnableDynamicScale(MS_U8 u8Idx,MS_U8 u8NewDS)
3007 {
3008     MVD_CmdArg mvdcmd;
3009 
3010     SETUP_CMDARG(mvdcmd);
3011     mvdcmd.Arg0 = TRUE;
3012     mvdcmd.Arg1 = u8NewDS;
3013     SET_DECNUM(mvdcmd, u8Idx);
3014     SET_CMD_RET_FALSE(CMD_ENABLE_DYNAMIC_SCALE, &mvdcmd);
3015     return TRUE;
3016 }
3017 
3018 
3019 //------------------------------------------------------------------------------
3020 /// Set blue screen
3021 /// @return -TRUE for success; FALSE for failure.
3022 //------------------------------------------------------------------------------
HAL_MVD_SetBlueScreen(MS_U8 u8Idx,MS_BOOL bEn)3023 MS_BOOL HAL_MVD_SetBlueScreen(MS_U8 u8Idx, MS_BOOL bEn)
3024 {
3025     MVD_CmdArg mvdcmd;
3026 
3027     SETUP_CMDARG(mvdcmd);
3028     mvdcmd.Arg0 = bEn; //1 -> show MVOP frame color.  0 -> normal case.
3029     SET_DECNUM(mvdcmd, u8Idx);
3030     SET_CMD_RET_FALSE(CMD_FORCE_BLUE_SCREEN, &mvdcmd);
3031     return TRUE;
3032 }
3033 
3034 
HAL_MVD_SetFreezeDisp(MS_U8 u8Idx,MS_BOOL bEn)3035 MS_BOOL HAL_MVD_SetFreezeDisp(MS_U8 u8Idx, MS_BOOL bEn)
3036 {
3037     MVD_CmdArg mvdcmd;
3038 
3039     SETUP_CMDARG(mvdcmd);
3040     mvdcmd.Arg0 = bEn;
3041     SET_DECNUM(mvdcmd, u8Idx);
3042     SET_CMD_RET_FALSE(CMD_FREEZE_DISP, &mvdcmd);
3043     return TRUE;
3044 }
3045 
3046 
3047 //------------------------------------------------------------------------------
3048 /// Set base address for DecFrameInfo structure to f/w
3049 /// @param -u32addr \b IN : start address (units in byte)
3050 //------------------------------------------------------------------------------
HAL_MVD_SetDecFrmInfoAddr(MS_U8 u8Idx,MS_VIRT u32addr)3051 void HAL_MVD_SetDecFrmInfoAddr(MS_U8 u8Idx, MS_VIRT u32addr)
3052 {
3053     MVD_CmdArg mvdcmd;
3054 
3055     MS_ASSERT((u32addr%8)==0);
3056     u32addr >>= 3;
3057 
3058     SET_CMDARG(mvdcmd, u32addr, u8Idx);
3059     if (HAL_MVD_MVDCommand( CMD_DEC_FRAME_INFO_BUF, &mvdcmd ) == FALSE)
3060     {
3061         MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_DEC_FRAME_INFO_BUF ) );
3062     }
3063     return;
3064 }
3065 
3066 //Check if the task has interrupt
HAL_MVD_GetHasInt(MS_U8 u8Idx)3067 MS_BOOL HAL_MVD_GetHasInt(MS_U8 u8Idx)
3068 {
3069     MS_BOOL bHasInt = FALSE;
3070     MS_U32 u32IntCnt = 0;
3071     MVD_CtrlCfg* pCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
3072 
3073     u32IntCnt = MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_INT_CNT, sizeof(MS_U32));
3074     if (u32IntCnt != pCtrlCfg->u32IntCnt)
3075     {
3076         MVD_DEBUGINFO(MVD_PRINT("%s %d--> %d\n", __FUNCTION__, pCtrlCfg->u32IntCnt, u32IntCnt));
3077         bHasInt = TRUE;
3078         pCtrlCfg->u32IntCnt = u32IntCnt;
3079     }
3080     return bHasInt;
3081 }
3082 
3083 #ifdef VDEC3
HAL_MVD_GetIntState(MS_U8 u8Idx)3084 MS_U32 HAL_MVD_GetIntState(MS_U8 u8Idx)
3085 {
3086     MS_U32 u32IntStat;
3087 
3088     u32IntStat = MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_INT_STAT, sizeof(MS_U32));
3089 
3090     MVD_SetFWBuffData(u8Idx,FW_BUFF_FRMINFO,OFFSET_INT_STAT,sizeof(MS_U32),0);
3091 
3092     return u32IntStat;
3093 }
3094 #else
HAL_MVD_GetIntState(MS_U8 u8Idx)3095 MS_U32 HAL_MVD_GetIntState(MS_U8 u8Idx)
3096 {
3097     MS_U32 u32IntStat = 0;
3098     MVD_CmdArg mvdcmd;
3099 
3100     SETUP_CMDARG(mvdcmd);
3101     SET_DECNUM(mvdcmd, u8Idx);
3102     if (HAL_MVD_MVDCommand( CMD_GET_INT_STAT, &mvdcmd ) == TRUE)
3103     {
3104         u32IntStat = (((MS_U32)mvdcmd.Arg4) << 16) |
3105                      (((MS_U32)mvdcmd.Arg3) << 8) |
3106                      (((MS_U32)mvdcmd.Arg2));
3107     }
3108     else
3109     {
3110         if (FALSE == pMVDHalContext->bStopped[u8Idx])
3111         {
3112             MVD_DEBUGERROR(MVD_PRINT("Ctrl: 0x%x fail!!\n", CMD_GET_INT_STAT));
3113         }
3114         else
3115         {
3116             MVD_DEBUGINFO(MVD_PRINT("Cmd 0x%x normal timeout.\n", CMD_GET_INT_STAT));
3117         }
3118     }
3119 
3120     return u32IntStat;
3121 }
3122 
3123 #endif
3124 
3125 ///// functions to check interrupt status /////
MVD_IntHasUsrDataDisp(MS_U32 u32IntStat)3126 MS_BOOL MVD_IntHasUsrDataDisp(MS_U32 u32IntStat)
3127 {
3128     return (((u32IntStat&INT_USER_DATA_DISP)==INT_USER_DATA_DISP) ? TRUE : FALSE);
3129 }
3130 
MVD_IntHasUsrData(MS_U32 u32IntStat)3131 MS_BOOL MVD_IntHasUsrData(MS_U32 u32IntStat)
3132 {
3133     return (((u32IntStat&INT_USER_DATA)==INT_USER_DATA) ? TRUE : FALSE);
3134 }
3135 
MVD_IntIsDispRdy(MS_U32 u32IntStat)3136 MS_BOOL MVD_IntIsDispRdy(MS_U32 u32IntStat)
3137 {
3138     return (((u32IntStat&INT_DISP_RDY)==INT_DISP_RDY) ? TRUE : FALSE);
3139 }
3140 
MVD_IntHasSeqHdr(MS_U32 u32IntStat)3141 MS_BOOL MVD_IntHasSeqHdr(MS_U32 u32IntStat)
3142 {
3143     return (((u32IntStat&INT_SEQ_FOUND)==INT_SEQ_FOUND) ? TRUE : FALSE);
3144 }
3145 
MVD_IntHasESDataInvalid(MS_U32 u32IntStat)3146 MS_BOOL MVD_IntHasESDataInvalid(MS_U32 u32IntStat)
3147 {
3148     return (((u32IntStat&INT_VES_VALID)==INT_VES_VALID) ? TRUE : FALSE);
3149 }
3150 
MVD_IntHasDecodeErr(MS_U32 u32IntStat)3151 MS_BOOL MVD_IntHasDecodeErr(MS_U32 u32IntStat)
3152 {
3153     return (((u32IntStat&INT_DEC_ERR)==INT_DEC_ERR) ? TRUE : FALSE);
3154 }
3155 //INT_FIRST_FRAME means "1st frame be push to display queue & ready for display"
3156 //So, (1) in IPB or IP stream, that's I-frame
3157 //    (2) in PB only stream, that's first P-frame
MVD_IntHas1stFrame(MS_U32 u32IntStat)3158 MS_BOOL MVD_IntHas1stFrame(MS_U32 u32IntStat)
3159 {
3160     return (((u32IntStat&INT_FIRST_FRAME)==INT_FIRST_FRAME) ? TRUE : FALSE);
3161 }
3162 
3163 //INT_XC_LOW_DELAY
MVD_IntHasXcLowDelay(MS_U32 u32IntStat)3164 MS_BOOL MVD_IntHasXcLowDelay(MS_U32 u32IntStat)
3165 {
3166     //MVD_PRINT("MVD_IntHasXcLowDelay=%x \n ", u32IntStat);
3167     return (((u32IntStat&INT_XC_LOW_DELAY)==INT_XC_LOW_DELAY) ? TRUE : FALSE);
3168 }
3169 
MVD_IntHasDecodeIframe(MS_U32 u32IntStat)3170 MS_BOOL MVD_IntHasDecodeIframe(MS_U32 u32IntStat)
3171 {
3172     return (((u32IntStat&INT_DEC_I)==INT_DEC_I) ? TRUE : FALSE);
3173 }
3174 
3175 
MVD_IntVSyncInt(MS_U32 u32IntStat)3176 MS_BOOL MVD_IntVSyncInt(MS_U32 u32IntStat)
3177 {
3178     return (((u32IntStat&INT_DISP_VSYNC)==INT_DISP_VSYNC) ? TRUE : FALSE);
3179 }
3180 
MVD_IntDecOneFrmInt(MS_U32 u32IntStat)3181 MS_BOOL MVD_IntDecOneFrmInt(MS_U32 u32IntStat)
3182 {
3183     return (((u32IntStat&INT_DEC_DONE)==INT_DEC_DONE) ? TRUE : FALSE);
3184 }
3185 
3186 
MVD_GetSyncStat(MS_U8 u8Idx,MS_U8 u8ArgIdx)3187 static MS_U8 MVD_GetSyncStat(MS_U8 u8Idx, MS_U8 u8ArgIdx)
3188 {
3189     MS_U8 u8Val = 0xFF;
3190     MVD_CmdArg mvdcmd;
3191     SETUP_CMDARG(mvdcmd);
3192     SET_DECNUM(mvdcmd, u8Idx);
3193     if (HAL_MVD_MVDCommand( CMD_GET_SYNC_STAT, &mvdcmd ) == FALSE)
3194     {
3195         MVD_DEBUGERROR(MVD_PRINT("Ctrl: 0x%x fail!!\r\n", CMD_GET_SYNC_STAT));
3196         return 0xFF;
3197     }
3198     MVD_DEBUGINFO(MVD_PRINT("Sync On/Off %x, Done %x, Stat %x, diff=%d\n",
3199                   mvdcmd.Arg0, mvdcmd.Arg1, mvdcmd.Arg2, (int)HAL_MVD_GetPtsStcDiff(u8Idx)));
3200 
3201     if (0==u8ArgIdx)
3202     {
3203         u8Val = mvdcmd.Arg0; //On/Off
3204     }
3205     else if (1==u8ArgIdx)
3206     {
3207         u8Val = mvdcmd.Arg1; //Done
3208     }
3209     else if (2==u8ArgIdx)
3210     {
3211         u8Val = mvdcmd.Arg2; //Stat
3212     }
3213     return u8Val;
3214 }
3215 
3216 //------------------------------------------------------------------------------
3217 /// Report avsync status
3218 /// avsync_status=avsync_done|(avsync_skip_picture<<1)|(avsync_repeat_picture<<2),
3219 /// 0 for free run
3220 //------------------------------------------------------------------------------
HAL_MVD_GetAVSyncStatus(MS_U8 u8Idx)3221 MS_U8 HAL_MVD_GetAVSyncStatus(MS_U8 u8Idx)
3222 {
3223     return MVD_GetSyncStat(u8Idx, 2);
3224 }
3225 
HAL_MVD_SlqTblLoadWrPtr(MS_U8 u8Idx,MS_VIRT u32WrPtr)3226 void HAL_MVD_SlqTblLoadWrPtr(MS_U8 u8Idx, MS_VIRT u32WrPtr)
3227 {
3228 #if 1
3229     MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
3230     MVD_CmdArg mvdcmd;
3231     MS_U16 u16Val = 0;
3232 
3233     if (FALSE == pstSlqTblInfo->bEnSlqTblHkCtrl)
3234     {
3235         SETUP_CMDARG(mvdcmd);
3236         mvdcmd.Arg0 = 0x10;
3237         mvdcmd.Arg1 = 0x01;
3238         SET_DECNUM(mvdcmd, u8Idx);
3239         if (HAL_MVD_MVDCommand( CMD_RD_IO, &mvdcmd ) == FALSE)
3240         {
3241             MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_RD_IO ) );
3242             return;
3243         }
3244         u16Val = (((MS_U32)mvdcmd.Arg2)) | ((MS_U32)mvdcmd.Arg3 << 8);
3245 
3246         SETUP_CMDARG(mvdcmd);
3247         mvdcmd.Arg0 = 0x10;
3248         mvdcmd.Arg1 = 0x01;
3249         mvdcmd.Arg2 = u16Val & 0xff;
3250         mvdcmd.Arg3 = ((u16Val>>8 ) & 0xff) | 0x80;
3251         SET_DECNUM(mvdcmd, u8Idx);
3252         if (HAL_MVD_MVDCommand(CMD_WR_IO, &mvdcmd) == FALSE)
3253         {
3254             MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_WR_IO ) );
3255             return;
3256         }
3257 
3258         pstSlqTblInfo->bEnSlqTblHkCtrl = TRUE;
3259         //MVD_PRINT("@@@ OPEN HK.SLQ.CTRL!\n");
3260     }
3261 #endif
3262     OSAL_MVD_LockHwMutex();
3263 
3264     HAL_MVD_RegWriteByte(MVD_SLQ_WADR0, (u32WrPtr & 0xff));
3265     HAL_MVD_RegWriteByte(MVD_SLQ_WADR1, ((u32WrPtr>>8 ) & 0xff));
3266     HAL_MVD_RegWriteByte(MVD_SLQ_WADR2, ((u32WrPtr>>16) & 0xff));
3267     HAL_MVD_RegWriteByte(MVD_SLQ_WADR3, ((u32WrPtr>>24) & 0x01));
3268     HAL_MVD_RegWriteBit(MVD_SLQCTRL, 1, MVD_SLQCTRL_WADR_RELOAD);
3269     HAL_MVD_RegWriteBit(MVD_SLQCTRL, 0, MVD_SLQCTRL_WADR_RELOAD);
3270 
3271     OSAL_MVD_UnlockHwMutex();
3272 }
3273 
HAL_MVD_SlqTblProbe(MVD_HKSLQ_CMD eCmd)3274 static MS_VIRT HAL_MVD_SlqTblProbe(MVD_HKSLQ_CMD eCmd)
3275 {
3276     MS_VIRT u32Cadr = 0;
3277     OSAL_MVD_LockHwMutex();
3278 
3279     switch (eCmd)
3280     {
3281         case MVD_HKSLQ_GET_READPTR:
3282             HAL_MVD_RegWriteBit(MVD_SLQCTRL, 1, MVD_SLQCTRL_RADR_PROBE);
3283             HAL_MVD_RegWriteBit(MVD_SLQCTRL, 0, MVD_SLQCTRL_RADR_PROBE);
3284             break;
3285         case MVD_HKSLQ_GET_WRITEPTR:
3286             HAL_MVD_RegWriteBit(MVD_SLQCTRL, 1, MVD_SLQCTRL_WADR_PROBE);
3287             HAL_MVD_RegWriteBit(MVD_SLQCTRL, 0, MVD_SLQCTRL_WADR_PROBE);
3288             break;
3289         default:
3290             break;
3291     }
3292     u32Cadr = HAL_MVD_RegReadByte(MVD_SLQ_CADR0) |
3293              (HAL_MVD_RegReadByte(MVD_SLQ_CADR1) << 8) |
3294              (HAL_MVD_RegReadByte(MVD_SLQ_CADR2) <<16) |
3295              ((HAL_MVD_RegReadByte(MVD_SLQ_CADR3) & 0x01) <<24);
3296 
3297     OSAL_MVD_UnlockHwMutex();
3298     return u32Cadr;
3299 }
3300 
HAL_MVD_SlqTblProbeWrPtr(MS_U8 u8Idx)3301 MS_VIRT HAL_MVD_SlqTblProbeWrPtr(MS_U8 u8Idx)
3302 {
3303     return HAL_MVD_SlqTblProbe(MVD_HKSLQ_GET_WRITEPTR);
3304 }
3305 
HAL_MVD_SlqTblProbeRdPtr(MS_U8 u8Idx)3306 MS_VIRT HAL_MVD_SlqTblProbeRdPtr(MS_U8 u8Idx)
3307 {
3308     return HAL_MVD_SlqTblProbe(MVD_HKSLQ_GET_READPTR);
3309 }
3310 
3311 //------------------------------------------------------------------------------
3312 /// Set firmware as MStreamer mode
3313 /// @return -TRUE for success; FALSE for failure.
3314 //------------------------------------------------------------------------------
HAL_MVD_SetMStreamerMode(MS_U8 u8Idx,MS_U8 u8Mode)3315 MS_BOOL HAL_MVD_SetMStreamerMode(MS_U8 u8Idx, MS_U8 u8Mode)
3316 {
3317     MVD_CmdArg mvdcmd;
3318     MVD_CtrlCfg* pstCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
3319 
3320     SETUP_CMDARG(mvdcmd);
3321     mvdcmd.Arg0 = u8Mode; //1: enable, 0:disable MStreamer mode.
3322     SET_DECNUM(mvdcmd, u8Idx);
3323     SET_CMD_RET_FALSE(CMD_SET_MST_MODE, &mvdcmd);
3324 
3325     pstCtrlCfg->u8MstMode = u8Mode;
3326     return TRUE;
3327 }
3328 
3329 //------------------------------------------------------------------------------
3330 /// Set firmware as MStreamer mode (IP clip mode)
3331 /// @return -TRUE for success; FALSE for failure.
3332 //------------------------------------------------------------------------------
HAL_MVD_ShowDecodeOrder(MS_U8 u8Idx,MS_U8 u8Mode)3333 MS_BOOL HAL_MVD_ShowDecodeOrder(MS_U8 u8Idx, MS_U8 u8Mode)
3334 {
3335     MVD_CmdArg mvdcmd;
3336     MVD_CtrlCfg* pstCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
3337 
3338     SETUP_CMDARG(mvdcmd);
3339     mvdcmd.Arg0 = pstCtrlCfg->u8MstMode;
3340     mvdcmd.Arg1 = u8Mode;//a u8Mode; //1: clip mode, 0:normal mode.
3341     SET_DECNUM(mvdcmd, u8Idx);
3342     SET_CMD_RET_FALSE(CMD_SET_MST_MODE, &mvdcmd);
3343     return TRUE;
3344 
3345 }
3346 
HAL_MVD_IsMStreamerMode(MS_U8 u8Idx)3347 MS_BOOL HAL_MVD_IsMStreamerMode(MS_U8 u8Idx)
3348 {
3349     MVD_CtrlCfg* pstCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
3350     return (MST_MODE_TRUE == pstCtrlCfg->u8MstMode);
3351 }
3352 
HAL_MVD_FrameOpt(MS_U8 u8Idx,MS_U8 u8FrmIdx,MVD_FrmOpt eOpt)3353 MS_BOOL HAL_MVD_FrameOpt(MS_U8 u8Idx, MS_U8 u8FrmIdx, MVD_FrmOpt eOpt)
3354 {
3355     MVD_CmdArg mvdcmd;
3356 
3357     SETUP_CMDARG(mvdcmd);
3358     mvdcmd.Arg0 = u8FrmIdx;
3359     mvdcmd.Arg1 = eOpt; // 0 = Flip,  1 = Release.
3360     MVD_DEBUGINFO(MVD_PRINT("FLIP_RELEASE_FRAME: idx=0x%x, opt=0x%x\n", u8FrmIdx, eOpt));
3361     SET_DECNUM(mvdcmd, u8Idx);
3362     SET_CMD_RET_FALSE(CMD_FLIP_RELEASE_FRAME, &mvdcmd);
3363 
3364     return TRUE;
3365 }
3366 
3367 //------------------------------------------------------------------------------
3368 /// Set firmware dynamic allocate FrameBuffer, now support MCU mode only
3369 /// @return -TRUE for success; FALSE for failure.
3370 //------------------------------------------------------------------------------
_MVD_SetDynamicAllocateFB(MS_U8 u8Idx,MS_BOOL bEnable)3371 MS_BOOL _MVD_SetDynamicAllocateFB(MS_U8 u8Idx,MS_BOOL bEnable)
3372 {
3373     MVD_CmdArg mvdcmd;
3374 
3375     SETUP_CMDARG(mvdcmd);
3376     mvdcmd.Arg0 = 1-bEnable; //Arg0 :  0(enable) , 1(disable)
3377     SET_DECNUM(mvdcmd, u8Idx);
3378     if (HAL_MVD_MVDCommand( CMD_FIXED_FRAME_BUFFER, &mvdcmd ) == FALSE)
3379     {
3380         MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_FIXED_FRAME_BUFFER ) );
3381         return FALSE;
3382     }
3383 
3384     return TRUE;
3385 }
3386 
3387 //------------------------------------------------------------------------------
3388 /// Set firmware as MCU mode
3389 /// @return -TRUE for success; FALSE for failure.
3390 //------------------------------------------------------------------------------
HAL_MVD_SetMcuMode(MS_U8 u8Idx,MS_U8 u8Mode)3391 MS_BOOL HAL_MVD_SetMcuMode(MS_U8 u8Idx, MS_U8 u8Mode)
3392 {
3393     MVD_CmdArg mvdcmd;
3394     MVD_CtrlCfg* pstCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
3395 
3396     SETUP_CMDARG(mvdcmd);
3397     mvdcmd.Arg0 = u8Mode; //1: enable, 0:disable MCU
3398     SET_DECNUM(mvdcmd, u8Idx);
3399     SET_CMD_RET_FALSE(CMD_SET_MCU_MODE, &mvdcmd);
3400 
3401     pstCtrlCfg->u8McuMode = u8Mode;
3402 
3403     return TRUE;
3404 }
3405 
HAL_MVD_IsMcuMode(MS_U8 u8Idx)3406 MS_BOOL HAL_MVD_IsMcuMode(MS_U8 u8Idx)
3407 {
3408     MVD_CtrlCfg* pstCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
3409     return (TRUE == pstCtrlCfg->u8McuMode);
3410 }
3411 
3412 //------------------------------------------------------------------------------
3413 /// Inform firwmare that PTS is updated.
3414 /// @return -TRUE for success; FALSE for failure.
3415 //------------------------------------------------------------------------------
HAL_MVD_UpdatePts(MS_U8 u8Idx)3416 MS_BOOL HAL_MVD_UpdatePts(MS_U8 u8Idx)
3417 {
3418     MVD_CmdArg mvdcmd;
3419 
3420     SETUP_CMDARG(mvdcmd);
3421     SET_DECNUM(mvdcmd, u8Idx);
3422     SET_CMD_RET_FALSE(CMD_SEND_UNI_PTS, &mvdcmd);
3423 
3424     return TRUE;
3425 }
3426 
3427 
HAL_MVD_FrameCapture(MS_U8 u8Idx,MS_U8 u8FrmIdx,MS_BOOL bEnable)3428 MS_BOOL HAL_MVD_FrameCapture(MS_U8 u8Idx, MS_U8 u8FrmIdx, MS_BOOL bEnable)
3429 {
3430     MVD_CmdArg mvdcmd;
3431 
3432     SETUP_CMDARG(mvdcmd);
3433     mvdcmd.Arg0 = bEnable;  //0 or 1 to enable/disable the freeze function
3434     mvdcmd.Arg2 = u8FrmIdx; //specify the freezed frame index
3435     MVD_DEBUGINFO(MVD_PRINT("CAPTURE_FRAME: idx=0x%x, enable=0x%x\n", u8FrmIdx, bEnable));
3436     SET_DECNUM(mvdcmd, u8Idx);
3437     SET_CMD_RET_FALSE(CMD_ENABLE_FREEZE_PIC, &mvdcmd);
3438 
3439     return TRUE;
3440 }
3441 
3442 //------------------------------------------------------------------------------
3443 /// Set HW buffers' start address to MVD FW
3444 /// Return (the end address - 1)
3445 /// @param -u32Addr \b IN : start address (MIU offset)
3446 //------------------------------------------------------------------------------
HAL_MVD_SetHWBuffer(MS_U8 u8Idx,MS_VIRT u32Add)3447 MS_VIRT HAL_MVD_SetHWBuffer(MS_U8 u8Idx, MS_VIRT u32Add)
3448 {
3449     MS_VIRT tmpAdr;
3450 
3451     MVD_DEBUGINFO(MVD_PRINT("====> %s u32Add = 0x%lx\n", __FUNCTION__, (unsigned long)u32Add));
3452     tmpAdr = (MemAlign(u32Add, MVD_FW_IAP_BUF_ALIGN));
3453     MVD_DEBUGINFO(MVD_PRINT("set MVD3_FW_IAP_BUF_ADR =%lx\n",(unsigned long)tmpAdr));
3454     HAL_MVD_SetIAPBufferAddr(u8Idx, tmpAdr);
3455     tmpAdr += MVD_FW_IAP_BUF_LEN;
3456 
3457     tmpAdr = (MemAlign(tmpAdr, MVD_FW_DP_BUF_ALIGN));
3458     MVD_DEBUGINFO(MVD_PRINT("set MVD3_FW_DP_BUF_ADR=%lx\n",(unsigned long)tmpAdr));
3459     HAL_MVD_SetDPBufferAddr(u8Idx, tmpAdr);
3460     tmpAdr += MVD_FW_DP_BUF_LEN;
3461 
3462     tmpAdr = (MemAlign(tmpAdr, MVD_FW_MV_BUF_ALIGN));
3463     MVD_DEBUGINFO(MVD_PRINT("set MVD3_FW_MV_BUF_ADR=%lx\n",(unsigned long)tmpAdr));
3464     HAL_MVD_SetMVBufferAddr(u8Idx, tmpAdr);
3465     tmpAdr += MVD_FW_MV_BUF_LEN;
3466     MVD_DEBUGINFO(MVD_PRINT("====> %s End of HW buffers = 0x%lx\n", __FUNCTION__, (unsigned long)tmpAdr));
3467 
3468     return tmpAdr;
3469 }
3470 
3471 //------------------------------------------------------------------------------
3472 /// Set the number of framebuffer
3473 /// @param -u8FrmNum \b IN : the number of framebuffer
3474 //------------------------------------------------------------------------------
HAL_MVD_SetFrameBuffNum(MS_U8 u8Idx,MS_U8 u8FrmNum,MS_U32 u32FBUsedSize)3475 void HAL_MVD_SetFrameBuffNum(MS_U8 u8Idx, MS_U8 u8FrmNum,MS_U32 u32FBUsedSize)
3476 {
3477 #define MVD_FBNUM_DEFAULT 4
3478 #define MVD_FBNUM_MIN     MVD_FBNUM_DEFAULT
3479 
3480     MVD_CmdArg mvdcmd;
3481 
3482     MVD_DEBUGINFO(MVD_PRINT("%s u8FrmNum = %d\n", __FUNCTION__, u8FrmNum));
3483     if (u8FrmNum < MVD_FBNUM_MIN)
3484     {
3485         MVD_DEBUGINFO(MVD_PRINT("%s set u8FrmNum as %d instead of %d!\n",
3486             __FUNCTION__, MVD_FBNUM_MIN, u8FrmNum));
3487         u8FrmNum = MVD_FBNUM_MIN;
3488     }
3489     SETUP_CMDARG(mvdcmd);
3490     mvdcmd.Arg0 = u8FrmNum;
3491     mvdcmd.Arg1 = u32FBUsedSize&0xff;
3492     mvdcmd.Arg2 = (u32FBUsedSize>>8)&0xff;
3493     mvdcmd.Arg3 = (u32FBUsedSize>>16)&0xff;
3494     mvdcmd.Arg4 = (u32FBUsedSize>>24)&0xff;
3495     SET_DECNUM(mvdcmd, u8Idx);
3496     if (HAL_MVD_MVDCommand( CMD_FB_NUM, &mvdcmd ) == FALSE)
3497     {
3498         MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_FB_NUM ) );
3499         return;
3500     }
3501     return;
3502 }
3503 
MVD_WriteFWBuffData(MS_U8 u8Idx,FW_BUFF_TYPE eBuffType,MS_U8 u8Offset,MS_U8 u8Size,MS_U32 u32Val)3504 static MS_BOOL MVD_WriteFWBuffData(MS_U8 u8Idx, FW_BUFF_TYPE eBuffType, MS_U8 u8Offset, MS_U8 u8Size, MS_U32 u32Val)
3505 {
3506     MS_BOOL bRet = FALSE;
3507     MS_VIRT u32BufStart = NULL;
3508     switch (eBuffType)
3509     {
3510         case FW_BUFF_VOLINFO:    u32BufStart = GET_VOL_BUFFADD(u8Idx);        break;
3511         case FW_BUFF_FRMINFO:    u32BufStart = GET_FRMINFO_BUFFADD(u8Idx);    break;
3512         case FW_BUFF_HDR:        u32BufStart = GET_HDR_BUFFADD(u8Idx);        break;
3513         case FW_BUFF_USRDATA:    u32BufStart = GET_USRDATA_BUFFADD(u8Idx);    break;
3514         case FW_BUFF_FWSLQTAB:   u32BufStart = GET_SLQ_BUFFADD(u8Idx);        break;
3515         case FW_BUFF_PTSTBL:     u32BufStart = GET_PTSTBL_BUFFADD(u8Idx);     break;
3516         case FW_BUFF_DS:         u32BufStart = GET_DS_BUFFADD(u8Idx);         break;
3517         case FW_BUFF_XCINFO:     u32BufStart = GET_XCINFO_BUFFADD(u8Idx);     break;
3518         case FW_BUFF_DECFRMINFO: u32BufStart = GET_DECFRMINFO_BUFFADD(u8Idx); break;
3519         default:
3520             break;
3521     }
3522     if (NULL == u32BufStart)
3523     {
3524         MVD_PRINT("%s err: u8Idx=0x%x, bufType=0x%x, offset=%d, size=%d\n",
3525                __FUNCTION__, u8Idx, eBuffType, u8Offset, u8Size);
3526         return bRet;
3527     }
3528 
3529     if (u8Size == sizeof(MS_U8))
3530     {
3531         bRet = HAL_MVD_MemWriteByte(u32BufStart+u8Offset, (MS_U8)u32Val);
3532     }
3533     else if (u8Size == sizeof(MS_U32))
3534     {
3535         bRet = HAL_MVD_MemWrite4Byte(u32BufStart+u8Offset, u32Val);
3536     }
3537 
3538     MVD_DEBUGINFO(MVD_PRINT("%s: u32Val=%d for u8Idx=0x%x, bufType=0x%x, offset=%d, size=%d\n",
3539                           __FUNCTION__, u32Val, u8Idx, eBuffType, u8Offset, u8Size));
3540     return bRet;
3541 }
3542 
3543 //================== Vol Info ==================//
HAL_MVD_GetBitsRate(MS_U8 u8Idx)3544 MS_U32 HAL_MVD_GetBitsRate(MS_U8 u8Idx)
3545 {
3546     //Ref 13818-2, this flag is unit of 400 bits/sec
3547     return MVD_GetFWBuffData(u8Idx, FW_BUFF_VOLINFO, OFFSET_BIT_RATE, sizeof(MS_U32))*400;
3548 }
3549 
HAL_MVD_GetVideoRange(MS_U8 u8Idx)3550 MS_U8 HAL_MVD_GetVideoRange(MS_U8 u8Idx)
3551 {
3552     return (MS_U8)MVD_GetFWBuffData(u8Idx, FW_BUFF_VOLINFO, OFFSET_VIDEO_RANGE, sizeof(MS_U8));
3553 }
3554 
HAL_MVD_GetLowDelayFlag(MS_U8 u8Idx)3555 MS_BOOL HAL_MVD_GetLowDelayFlag(MS_U8 u8Idx)
3556 {
3557     return (MS_BOOL)MVD_GetFWBuffData(u8Idx, FW_BUFF_VOLINFO, OFFSET_LOW_DELAY, sizeof(MS_U8));
3558 }
3559 
HAL_MVD_GetIs32PullDown(MS_U8 u8Idx)3560 MS_BOOL HAL_MVD_GetIs32PullDown(MS_U8 u8Idx)
3561 {
3562     return (MS_BOOL)MVD_GetFWBuffData(u8Idx, FW_BUFF_VOLINFO, OFFSET_MPEG_FRC_MODE, sizeof(MS_U8));
3563 }
3564 
HAL_MVD_GetIsDynScalingEnabled(MS_U8 u8Idx)3565 MS_BOOL HAL_MVD_GetIsDynScalingEnabled(MS_U8 u8Idx)
3566 {
3567     return (MS_BOOL)MVD_GetFWBuffData(u8Idx, FW_BUFF_VOLINFO, OFFSET_DS_ENABLE, sizeof(MS_U8));
3568 }
3569 
HAL_MVD_Is1stFrmRdy(MS_U8 u8Idx)3570 MS_BOOL HAL_MVD_Is1stFrmRdy(MS_U8 u8Idx)
3571 {
3572     return (MS_BOOL)MVD_GetFWBuffData(u8Idx, FW_BUFF_VOLINFO, OFFSET_FIRST_DISPLAY, sizeof(MS_U8));
3573 }
3574 
3575 
3576 //================== FrameInfo ==================//
HAL_MVD_GetPicCounter(MS_U8 u8Idx)3577 MS_U32 HAL_MVD_GetPicCounter(MS_U8 u8Idx)
3578 {
3579     return MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_FRAME_COUNT, sizeof(MS_U32));
3580 }
3581 
HAL_MVD_GetSkipPicCounter(MS_U8 u8Idx)3582 MS_U32 HAL_MVD_GetSkipPicCounter(MS_U8 u8Idx)
3583 {
3584     return MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_SKIP_FRAME_COUNT, sizeof(MS_U32));
3585 }
3586 
HAL_MVD_GetPicType(MS_U8 u8Idx)3587 MVD_PicType HAL_MVD_GetPicType(MS_U8 u8Idx)
3588 {
3589     MS_U32 picType = 0xff;
3590     MVD_PicType ret = E_MVD_PIC_UNKNOWN;
3591 
3592     if (GET_FRMINFO_BUFFADD(u8Idx)==0)
3593     {
3594         MVD_DEBUGERROR(MVD_PRINT("%s error: pu8MVDGetFrameInfoBufStart=NULL\n", __FUNCTION__));
3595         return E_MVD_PIC_UNKNOWN;
3596     }
3597     picType = MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_PICTURE_TYPE, sizeof(MS_U32));
3598     switch (picType)
3599     {
3600         case 0:
3601             ret = E_MVD_PIC_I;
3602             break;
3603         case 1:
3604             ret = E_MVD_PIC_P;
3605             break;
3606         case 2:
3607             ret = E_MVD_PIC_B;
3608             break;
3609         default:
3610             break;
3611     }
3612     return ret;
3613 }
3614 
HAL_MVD_GetPtsStcDiff(MS_U8 u8Idx)3615 MS_S32 HAL_MVD_GetPtsStcDiff(MS_U8 u8Idx)
3616 {
3617     return (MS_S32)MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_PTS_STC, sizeof(MS_S32));
3618 }
3619 
HAL_MVD_GetDecodedFrameIdx(MS_U8 u8Idx)3620 MS_U8 HAL_MVD_GetDecodedFrameIdx(MS_U8 u8Idx)
3621 {
3622     return (MS_U8)MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_FB_INDEX, sizeof(MS_U8));
3623 }
3624 
HAL_MVD_GetVldErrCount(MS_U8 u8Idx)3625 MS_U32 HAL_MVD_GetVldErrCount(MS_U8 u8Idx)
3626 {
3627     return MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_VLD_ERR_COUNT, sizeof(MS_U32));
3628 }
3629 
HAL_MVD_GetValidStreamFlag(MS_U8 u8Idx)3630 MS_BOOL HAL_MVD_GetValidStreamFlag(MS_U8 u8Idx)
3631 {
3632     return !(MS_BOOL)MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_INVALIDSTREAM, sizeof(MS_U8));
3633 }
3634 
HAL_MVD_GetIsIPicFound(MS_U8 u8Idx)3635 MS_U8 HAL_MVD_GetIsIPicFound(MS_U8 u8Idx)
3636 {
3637     return (MS_U8)MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_FIRST_I_FOUND, sizeof(MS_U8));
3638 }
3639 
3640 //------------------------------------------------------------------------------
3641 /// Set PTS base to MVD F/W
3642 /// @param -u32pts \b IN : pts unit in 90k counter
3643 //------------------------------------------------------------------------------
HAL_MVD_SetPTSBase(MS_U8 u8Idx,MS_U32 u32pts)3644 void HAL_MVD_SetPTSBase(MS_U8 u8Idx, MS_U32 u32pts)
3645 {
3646     MVD_CmdArg mvdcmd;
3647 
3648     SET_CMDARG(mvdcmd, u32pts, u8Idx);
3649     if (HAL_MVD_MVDCommand( CMD_PTS_BASE, &mvdcmd ) == FALSE)
3650     {
3651         MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_PTS_BASE ) );
3652     }
3653     return;
3654 }
3655 
HAL_MVD_GetPTS(MS_U8 u8Idx)3656 MS_U32 HAL_MVD_GetPTS(MS_U8 u8Idx)
3657 {
3658     MS_U32 u32PTS = 0;
3659 
3660     u32PTS = (MS_U32)MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_DISP_PTS, sizeof(MS_U32));
3661     u32PTS = _90K_TO_MS(u32PTS);
3662     return u32PTS;
3663 }
3664 
HAL_MVD_GetU64PTS(MS_U8 u8Idx,MVD_PtsType eType)3665 MS_U64 HAL_MVD_GetU64PTS(MS_U8 u8Idx,MVD_PtsType eType)
3666 {
3667     MS_U64 u64PTS = 0;
3668     MS_U64 u32_high32_PTS = 0;
3669     MS_U64 u32_low32_PTS = 0;
3670 
3671     if(eType==E_MVD_PTS_DISP)
3672     {
3673         u32_low32_PTS = (MS_U64)MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_DISP_PTS, sizeof(MS_U32));
3674         u32_high32_PTS = (MS_U64)MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_DISP_PTS_MSB, sizeof(MS_U32));
3675     }
3676     else if(eType==E_MVD_PTS_PRE_PAS)
3677     {
3678         u32_low32_PTS = (MS_U64)MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_WRPTR_PTS_LOW, sizeof(MS_U32));
3679         u32_high32_PTS = (MS_U64)MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_WRPTR_PTS_HIGH, sizeof(MS_U32));
3680     }
3681 
3682     u64PTS = (u32_high32_PTS<<32)|u32_low32_PTS;
3683     _90K_TO_MS_U64(u64PTS);
3684     return u64PTS;
3685 }
3686 
HAL_MVD_GetNextPTS(MS_U8 u8Idx)3687 MS_U32 HAL_MVD_GetNextPTS(MS_U8 u8Idx)
3688 {
3689     return (MS_U32)_90K_TO_MS(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_NEXT_PTS, sizeof(MS_U32)));
3690 }
3691 
HAL_MVD_GetChromaFormat(MS_U8 u8Idx)3692 MS_U32 HAL_MVD_GetChromaFormat(MS_U8 u8Idx)
3693 {
3694     return MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_CHROMA_FORMAT, sizeof(MS_U8));
3695 }
3696 
HAL_MVD_GetGOPCount(MS_U8 u8Idx)3697 MS_U32 HAL_MVD_GetGOPCount(MS_U8 u8Idx)
3698 {
3699     return MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_GOP_I_FCNT, sizeof(MS_U32))
3700          + MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_GOP_P_FCNT, sizeof(MS_U32))
3701          + MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_GOP_B_FCNT, sizeof(MS_U32));
3702 }
3703 
HAL_MVD_GetColorFormat(MS_U8 u8Idx)3704 MS_U8 HAL_MVD_GetColorFormat(MS_U8 u8Idx)
3705 {
3706     if (GET_FRMINFO_BUFFADD(u8Idx)==0)
3707     {
3708         MVD_DEBUGERROR(MVD_PRINT("%s error: pu8MVDGetFrameInfoBufStart=NULL\n", __FUNCTION__));
3709         return 0xff;
3710     }
3711 
3712     return (MS_U8)MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_VIDEO_FORMAT, sizeof(MS_U8));
3713 }
3714 
HAL_MVD_GetMatrixCoef(MS_U8 u8Idx)3715 MS_U8 HAL_MVD_GetMatrixCoef(MS_U8 u8Idx)
3716 {
3717     if (GET_FRMINFO_BUFFADD(u8Idx)==0)
3718     {
3719         MVD_DEBUGERROR(MVD_PRINT("%s error: pu8MVDGetFrameInfoBufStart=NULL\n", __FUNCTION__));
3720         return 0xff;
3721     }
3722 
3723     return (MS_U8)MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_MATRIX_COEF, sizeof(MS_U8));
3724 }
3725 
HAL_MVD_StepDecode(MS_U8 u8Idx)3726 MS_BOOL HAL_MVD_StepDecode(MS_U8 u8Idx)
3727 {
3728     MVD_CmdArg mvdcmd;
3729     SETUP_CMDARG(mvdcmd);
3730     SET_DECNUM(mvdcmd, u8Idx);
3731     SET_CMD_RET_FALSE(CMD_SINGLE_STEP, &mvdcmd);
3732 
3733     if (HAL_MVD_Resume(u8Idx) == FALSE)
3734     {
3735         MVD_DEBUGERROR(MVD_PRINT("Command: HAL_MVD_Resume fail!!\r\n"));
3736         return FALSE;
3737     }
3738 
3739     MVD_CtrlCfg* pCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
3740     if (pCtrlCfg)
3741     {
3742         pCtrlCfg->bStepDecode = TRUE;
3743     }
3744 
3745     return TRUE;
3746 }
3747 
HAL_MVD_IsStepDispDone(MS_U8 u8Idx)3748 MS_BOOL HAL_MVD_IsStepDispDone(MS_U8 u8Idx)
3749 {
3750     return (MS_BOOL)MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_STEP_DISP_DONE, sizeof(MS_U8));
3751 }
3752 
HAL_MVD_IsStep2PtsDone(MS_U8 u8Idx)3753 MS_BOOL HAL_MVD_IsStep2PtsDone(MS_U8 u8Idx)
3754 {
3755     return (MS_BOOL)MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_STEP_TO_PTS_DONE, sizeof(MS_U8));
3756 }
3757 
3758 //Only for RCV.
HAL_MVD_GetPayloadLen(MS_U8 u8Idx)3759 MS_U32 HAL_MVD_GetPayloadLen(MS_U8 u8Idx)
3760 {
3761     return MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_RCV_PAYLOAD_LENGTH, sizeof(MS_U32));
3762 }
3763 
3764 //Only for RCV.
HAL_MVD_GotFileEndPattern(MS_U8 u8Idx)3765 MS_BOOL HAL_MVD_GotFileEndPattern(MS_U8 u8Idx)
3766 {
3767     return (MS_BOOL)MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_MEET_FILE_END_SC, sizeof(MS_U8));
3768 }
3769 
HAL_MVD_IsCmdFinished(MS_U8 u8Idx,MVD_HANDSHAKE_CMD eCmd)3770 MS_BOOL HAL_MVD_IsCmdFinished(MS_U8 u8Idx, MVD_HANDSHAKE_CMD eCmd)
3771 {
3772     MVD_CMD_HANDSHADE_INDEX u32CmdState;
3773     MS_BOOL bCmdRdy = FALSE;
3774 
3775     HAL_MVD_InvalidBuffRetFalse(GET_FRMINFO_BUFFADD(u8Idx));
3776 
3777     u32CmdState.value = MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_CMD_HANDSHAKE_INDEX, sizeof(MS_U32));
3778     MVD_DEBUGINFO(MVD_PRINT("u32CmdState.value = 0x%x\n", u32CmdState.value));
3779     switch (eCmd)
3780     {
3781         case MVD_HANDSHAKE_PAUSE:
3782             bCmdRdy = (MS_BOOL)(u32CmdState.mvdcmd_handshake_pause);
3783             break;
3784         case MVD_HANDSHAKE_SLQ_RST:
3785             bCmdRdy = (MS_BOOL)(u32CmdState.mvdcmd_handshake_slq_reset);
3786             break;
3787         case MVD_HANDSHAKE_STOP:
3788             bCmdRdy = (MS_BOOL)(u32CmdState.mvdcmd_handshake_stop);
3789             break;
3790         case MVD_HANDSHAKE_SKIP_DATA:
3791             bCmdRdy = (MS_BOOL)(u32CmdState.mvdcmd_handshake_skip_data);
3792             break;
3793         case MVD_HANDSHAKE_SINGLE_STEP:
3794             bCmdRdy = (MS_BOOL)(u32CmdState.mvdcmd_handshake_single_step);
3795             break;
3796         case MVD_HANDSHAKE_SCALER_INFO:
3797             bCmdRdy = (MS_BOOL)(u32CmdState.mvdcmd_handshake_scaler_data_ready);
3798             break;
3799         case MVD_HANDSHAKE_GET_NXTDISPFRM:
3800             bCmdRdy = (MS_BOOL)(u32CmdState.mvdcmd_handshake_get_nextdispfrm_ready);
3801             break;
3802         case MVD_HANDSHAKE_PARSER_RST:
3803             bCmdRdy = (MS_BOOL)(u32CmdState.mvdcmd_handshake_parser_rst);
3804             break;
3805         case MVD_HANDSHAKE_RST_CC608:
3806             bCmdRdy = (MS_BOOL)(u32CmdState.mvdcmd_handshake_cc608_rst);
3807             break;
3808         case MVD_HANDSHAKE_RST_CC708:
3809             bCmdRdy = (MS_BOOL)(u32CmdState.mvdcmd_handshake_cc708_rst);
3810             break;
3811         case MVD_HANDSHAKE_VIRTUAL_COMMAND:
3812             bCmdRdy = (MS_BOOL)(u32CmdState.mvdcmd_handshake_virtualCommand);
3813             break;
3814         case MVD_HANDSHAKE_FLUSHQUEUE_COMMAND:
3815             bCmdRdy = (MS_BOOL)(u32CmdState.mvdcmd_handshake_flush);
3816             break;
3817         default:
3818             bCmdRdy = FALSE;
3819             break;
3820     }
3821     return bCmdRdy;
3822 }
3823 
HAL_MVD_ClearCmdFinished(MS_U8 u8Idx,MVD_HANDSHAKE_CMD eCmd)3824 MS_BOOL HAL_MVD_ClearCmdFinished(MS_U8 u8Idx, MVD_HANDSHAKE_CMD eCmd)
3825 {
3826     MVD_CMD_HANDSHADE_INDEX u32CmdState;
3827 
3828     HAL_MVD_InvalidBuffRetFalse(GET_FRMINFO_BUFFADD(u8Idx));
3829 
3830     u32CmdState.value = MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_CMD_HANDSHAKE_INDEX, sizeof(MS_U32));
3831     MVD_DEBUGINFO(MVD_PRINT("before CLR u32CmdState.value = 0x%x\n", u32CmdState.value));
3832     switch (eCmd)
3833     {
3834         case MVD_HANDSHAKE_SCALER_INFO:
3835             u32CmdState.mvdcmd_handshake_scaler_data_ready = 0;
3836             break;
3837         default:
3838             break;
3839     }
3840 
3841     //write the value back: may it overwrite the value that f/w is supposed to write?
3842     MVD_WriteFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_CMD_HANDSHAKE_INDEX, sizeof(MS_U32), u32CmdState.value);
3843     MVD_DEBUGINFO(MVD_PRINT("after CLR u32CmdState.value = 0x%x\n",
3844         MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_CMD_HANDSHAKE_INDEX, sizeof(MS_U32))));
3845     return TRUE;
3846 }
3847 
3848 
HAL_MVD_GetTimeCode(MS_U8 u8Idx,MVD_FrmInfoType eType,MVD_TimeCode * pInfo)3849 MS_BOOL HAL_MVD_GetTimeCode(MS_U8 u8Idx, MVD_FrmInfoType eType, MVD_TimeCode* pInfo)
3850 {
3851     MS_BOOL bRet = FALSE;
3852     MS_VIRT pu8MVDGetFrameInfoBufStart = GET_FRMINFO_BUFFADD(u8Idx);
3853     if (NULL == pInfo)
3854     {
3855         return FALSE;
3856     }
3857 
3858     HAL_MVD_InvalidBuffRetFalse(pu8MVDGetFrameInfoBufStart);
3859 
3860     if (E_MVD_FRMINFO_DECODE == eType)
3861     {
3862         pInfo->u8TimeCodeHr  = HAL_MVD_MemReadByte(pu8MVDGetFrameInfoBufStart+OFFSET_TIME_CODE_HOURS);
3863         pInfo->u8TimeCodeMin = HAL_MVD_MemReadByte(pu8MVDGetFrameInfoBufStart+OFFSET_TIME_CODE_MINUTES);
3864         pInfo->u8TimeCodeSec = HAL_MVD_MemReadByte(pu8MVDGetFrameInfoBufStart+OFFSET_TIME_CODE_SECONDS);
3865         pInfo->u8TimeCodePic = HAL_MVD_MemReadByte(pu8MVDGetFrameInfoBufStart+OFFSET_TIME_CODE_PICTURES);
3866         pInfo->u8DropFrmFlag = HAL_MVD_MemReadByte(pu8MVDGetFrameInfoBufStart+OFFSET_DROP_FRAME_FLAG);
3867     }
3868     else if (E_MVD_FRMINFO_DISPLAY == eType)
3869     {
3870         pInfo->u8TimeCodeHr  = HAL_MVD_MemReadByte(pu8MVDGetFrameInfoBufStart+OFFSET_TIME_CODE_HOURS_DISP);
3871         pInfo->u8TimeCodeMin = HAL_MVD_MemReadByte(pu8MVDGetFrameInfoBufStart+OFFSET_TIME_CODE_MINUTES_DISP);
3872         pInfo->u8TimeCodeSec = HAL_MVD_MemReadByte(pu8MVDGetFrameInfoBufStart+OFFSET_TIME_CODE_SECONDS_DISP);
3873         pInfo->u8TimeCodePic = HAL_MVD_MemReadByte(pu8MVDGetFrameInfoBufStart+OFFSET_TIME_CODE_PICTURES_DISP);
3874         pInfo->u8DropFrmFlag = HAL_MVD_MemReadByte(pu8MVDGetFrameInfoBufStart+OFFSET_DROP_FRAME_FLAG_DISP);
3875     }
3876     else
3877     {
3878         bRet = FALSE;
3879     }
3880 
3881     return bRet;
3882 }
3883 
HAL_MVD_GetDispCnt(MS_U8 u8Idx)3884 MS_U32 HAL_MVD_GetDispCnt(MS_U8 u8Idx)
3885 {
3886     return MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_DISPLAYED_CNT, sizeof(MS_U32));
3887 }
3888 
HAL_MVD_GetMinTspDataSize(MS_U8 u8HalIdx)3889 MS_U32 HAL_MVD_GetMinTspDataSize(MS_U8 u8HalIdx)
3890 {
3891 #ifdef OFFSET_CUR_MIN_TSP_DATA_SIZE
3892     return MVD_GetFWBuffData(u8HalIdx, FW_BUFF_FRMINFO, OFFSET_CUR_MIN_TSP_DATA_SIZE, sizeof(MS_U32));
3893 #else
3894     return 0x400;
3895 #endif
3896 }
3897 
HAL_MVD_GetXcLowDelayIntState(MS_U8 u8Idx)3898 MS_U32 HAL_MVD_GetXcLowDelayIntState(MS_U8 u8Idx)
3899 {
3900     MS_VIRT pu8MVDGetFrameInfoBufStart = GET_FRMINFO_BUFFADD(u8Idx);
3901 
3902     if(pu8MVDGetFrameInfoBufStart==0)
3903     {
3904         MVD_DEBUGERROR(MVD_PRINT("MDrv_MVD_GetXcLowDelayIntState error: pu8MVDGetFrameInfoBufStart=NULL\n"));
3905         return 0;
3906     }
3907 
3908     MVD_DEBUGINFO(MVD_PRINT("MDrv_MVD_GetXcLowDelayIntState()=%x,%x,%x,%x,%x\n",
3909         (HAL_MVD_MemRead4Byte(pu8MVDGetFrameInfoBufStart+OFFSET_XC_LOW_DELAY_CNT)),
3910         (HAL_MVD_MemRead4Byte(pu8MVDGetFrameInfoBufStart+OFFSET_XC_LOW_DELAY_INT_STATE)),
3911         (HAL_MVD_MemRead4Byte(pu8MVDGetFrameInfoBufStart+OFFSET_XC_DIFF_FIELD_NO)),
3912         (HAL_MVD_MemRead4Byte(pu8MVDGetFrameInfoBufStart+OFFSET_XC_LOW_DELAY_CNT_LATCH)),
3913         (HAL_MVD_MemRead4Byte(pu8MVDGetFrameInfoBufStart+OFFSET_FRAME_COUNT))));
3914 
3915     return HAL_MVD_MemRead4Byte(pu8MVDGetFrameInfoBufStart+OFFSET_XC_LOW_DELAY_INT_STATE);
3916 }
3917 
3918 //Get ErrStatus when ErrCode==ErrShape
MVD_GetErrShapeStat(MS_U32 u32errStat)3919 static MVD_ErrStatus MVD_GetErrShapeStat(MS_U32 u32errStat)
3920 {
3921     MVD_ErrStatus st = E_MVD_ERR_STATUS_UNKOWN;
3922     switch (u32errStat)
3923     {
3924         case 0:
3925             st = E_MVD_ERR_SHAPE_RECTANGULAR;
3926             break;
3927         case 1:
3928             st = E_MVD_ERR_SHAPE_BINARY;
3929             break;
3930         case 2:
3931             st = E_MVD_ERR_SHAPE_BINARY_ONLY;
3932             break;
3933         case 3:
3934             st = E_MVD_ERR_SHAPE_GRAYSCALE;
3935             break;
3936         default:
3937             break;
3938     }
3939     return st;
3940 }
3941 
3942 //Get ErrStatus when ErrCode==ErrSprite
MVD_GetErrSpriteStat(MS_U32 u32errStat)3943 static MVD_ErrStatus MVD_GetErrSpriteStat(MS_U32 u32errStat)
3944 {
3945     MVD_ErrStatus st = E_MVD_ERR_STATUS_UNKOWN;
3946     switch (u32errStat)
3947     {
3948         case 0:
3949             st = E_MVD_ERR_USED_SPRITE_UNUSED;
3950             break;
3951         case 1:
3952             st = E_MVD_ERR_USED_SPRITE_STATIC;
3953             break;
3954         case 2:
3955             st = E_MVD_ERR_USED_SPRITE_GMC;
3956             break;
3957         case 3:
3958             st = E_MVD_ERR_USED_SPRITE_RESERVED;
3959             break;
3960         default:
3961             break;
3962     }
3963     return st;
3964 }
3965 
HAL_MVD_GetErrInfo(MS_U8 u8Idx,MVD_ErrCode * errCode,MVD_ErrStatus * errStatus)3966 void HAL_MVD_GetErrInfo(MS_U8 u8Idx, MVD_ErrCode *errCode, MVD_ErrStatus *errStatus)
3967 {
3968     MS_U32 errorCode = E_MVD_ERR_UNKNOWN;
3969     MS_U32 errorStatus = E_MVD_ERR_STATUS_UNKOWN;
3970     MS_VIRT pu8MVDGetFrameInfoBufStart = GET_FRMINFO_BUFFADD(u8Idx);
3971 
3972     if(pu8MVDGetFrameInfoBufStart==0)
3973     {
3974         MVD_DEBUGERROR(MVD_PRINT("MDrv_MVD_GetErrInfo error!\n"));
3975         return;
3976     }
3977 
3978     errorCode = HAL_MVD_MemRead4Byte(pu8MVDGetFrameInfoBufStart + OFFSET_ERROR_CODE);
3979     errorStatus = HAL_MVD_MemRead4Byte(pu8MVDGetFrameInfoBufStart + OFFSET_ERROR_STATUS);
3980 
3981     switch (errorCode)
3982     {
3983         case VOL_SHAPE:
3984             *errCode = E_MVD_ERR_SHAPE;
3985             *errStatus = MVD_GetErrShapeStat(errorStatus);
3986             break;
3987         case VOL_USED_SPRITE:
3988             *errCode = E_MVD_ERR_USED_SPRITE;
3989             *errStatus = MVD_GetErrSpriteStat(errorStatus);
3990             break;
3991         case VOL_NOT_8_BIT:
3992             *errCode = E_MVD_ERR_NOT_8_BIT;
3993             *errStatus = E_MVD_ERR_STATUS_NONE;
3994             break;
3995         case VOL_NERPRED_ENABLE:
3996             *errCode = E_MVD_ERR_NERPRED_ENABLE;
3997             *errStatus = E_MVD_ERR_STATUS_NONE;
3998             break;
3999         case VOL_REDUCED_RES_ENABLE:
4000             *errCode = E_MVD_ERR_REDUCED_RES_ENABLE;
4001             *errStatus = E_MVD_ERR_STATUS_NONE;
4002             break;
4003         case VOL_SCALABILITY:
4004             *errCode = E_MVD_ERR_SCALABILITY;
4005             *errStatus = E_MVD_ERR_STATUS_NONE;
4006             break;
4007         case VOL_H263_ERROR:
4008             *errCode = E_MVD_ERR_H263_ERROR;
4009             *errStatus = E_MVD_ERR_STATUS_NONE;
4010             break;
4011         case VOL_RES_NOT_SUPPORT:
4012             *errCode = E_MVD_ERR_RES_NOT_SUPPORT;
4013             *errStatus = E_MVD_ERR_STATUS_NONE;
4014             break;
4015         case VOL_MPEG4_NOT_SUPPORT:
4016             *errCode = E_MVD_ERR_MPEG4_NOT_SUPPORT;
4017             *errStatus = E_MVD_ERR_STATUS_NONE;
4018             break;
4019         case VOL_PROFILE_NOT_SUPPORT:
4020             *errCode = E_MVD_ERR_PROFILE_NOT_SUPPORT;
4021             *errStatus = E_MVD_ERR_STATUS_NONE;
4022             break;
4023         case VOL_RCV_ERROR_OCCUR:
4024             *errCode = E_MVD_ERR_RCV_ERROR_OCCUR;
4025             *errStatus = E_MVD_ERR_STATUS_NONE;
4026             break;
4027         case VOL_OTHER:
4028             *errCode = E_MVD_ERR_OTHER;
4029             *errStatus = E_MVD_ERR_STATUS_NONE;
4030             break;
4031         default:
4032             *errCode = E_MVD_ERR_UNKNOWN;
4033             *errStatus = E_MVD_ERR_STATUS_UNKOWN;
4034             break;
4035     }
4036 
4037     return;
4038 }
4039 
4040 //take care MIU1 address
HAL_MVD_GetMemOffset(MS_PHY u32PhyAdd)4041 MS_PHY HAL_MVD_GetMemOffset(MS_PHY u32PhyAdd)
4042 {
4043     if (u32PhyAdd >= pMVDHalContext->stMiuCfg.u32Miu2BaseAddr)
4044     {
4045         return (u32PhyAdd - pMVDHalContext->stMiuCfg.u32Miu2BaseAddr);
4046     }
4047     else if(u32PhyAdd >= pMVDHalContext->stMiuCfg.u32Miu1BaseAddr)
4048     {
4049         return (u32PhyAdd - pMVDHalContext->stMiuCfg.u32Miu1BaseAddr);
4050     }
4051     else
4052     {
4053         return u32PhyAdd;
4054     }
4055 }
4056 
4057 
HAL_MVD_SLQTblSendPacket(MS_U8 u8Idx,MVD_PacketInfo * pstVideoPKT)4058 MS_BOOL HAL_MVD_SLQTblSendPacket(MS_U8 u8Idx, MVD_PacketInfo *pstVideoPKT)
4059 {
4060     MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
4061     MS_VIRT u32EsLast;
4062     MS_VIRT* u32LastEntry = &pstSlqTblInfo->pDrvSlqTbl->u32WrPtr;
4063     MS_VIRT* pu32EsNew = &pstSlqTblInfo->pDrvEsTbl->u32WrPtr;
4064     MS_U32 u32EntryWord = 0;
4065     MS_U32 u32Index = 0;
4066     MS_U32 u32Pts;
4067     MS_VIRT u32MVDFWPtsTblAddr = NULL;
4068     MVD_CtrlCfg* pstCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
4069 
4070     MS_U32 u32ESStart=0;
4071     MS_U32 u32ESEnd=0;
4072     MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
4073 
4074 
4075 #if _SLQTBL_DUMP_PKT
4076    // static MS_U32 u32SendTimes[MAX_DEC_NUM]= {0, 0};
4077 
4078     MVD_PRINT("Pkt[%x] st=0x%x len=0x%x pts=0x%x id_l=0x%x id_h=0x%x\n", u32SendTimes[u8Idx]++,
4079         pstVideoPKT->u32StAddr, pstVideoPKT->u32Length, pstVideoPKT->u32TimeStamp,
4080         pstVideoPKT->u32ID_L, pstVideoPKT->u32ID_H);
4081 #endif
4082 
4083 #ifdef VDEC3
4084     if(pstCtrlCfg->u8McuMode == FALSE)
4085 #endif
4086     {
4087     u32MVDFWPtsTblAddr = GET_PTSTBL_BUFFADD(u8Idx);
4088     MS_ASSERT(u32MVDFWPtsTblAddr != NULL);
4089     if (u32MVDFWPtsTblAddr)
4090     {
4091         MS_VIRT u32PtsTblEntryAddr = 0;
4092         //so far, this is the only place that driver will write f/w 1M area after init.
4093         u32Index = (pstSlqTblInfo->pDrvSlqTbl->u32WrPtr - pstSlqTblInfo->pDrvSlqTbl->u32StAdd)/8;
4094         if(HAL_MVD_IsMcuMode(u8Idx) == FALSE)
4095         {
4096             if (pstVideoPKT->u32TimeStamp != MVD_NULLPKT_PTS)
4097             {
4098                 u32Pts = _MS_TO_90K(pstVideoPKT->u32TimeStamp);
4099             }
4100             else
4101             {
4102                 u32Pts = MVD_NULLPKT_PTS;
4103             }
4104         }
4105         else
4106         {
4107             u32Pts = pstVideoPKT->u32TimeStamp;
4108         }
4109         u32PtsTblEntryAddr = u32MVDFWPtsTblAddr+u32Index*MVD_FW_SLQTBL_PTS_LEN;
4110         HAL_MVD_MemWrite4Byte(u32PtsTblEntryAddr+4, pstSlqTblInfo->u32DummyPktCnt);   //dummyPktCnt
4111         HAL_MVD_MemWrite4Byte(u32PtsTblEntryAddr+8, pstVideoPKT->u32ID_L);  //idLow
4112         HAL_MVD_MemWrite4Byte(u32PtsTblEntryAddr+12, pstVideoPKT->u32ID_H); //idHigh
4113         HAL_MVD_MemWrite4Byte(u32PtsTblEntryAddr+16, u32Pts);  //PTS
4114         HAL_MVD_MemWrite4Byte(u32PtsTblEntryAddr, (pstSlqTblInfo->u32SlqByteCnt)&0xffffff); //byteCnt
4115         //MVD_PRINT("PTS=0x%x(%x), idx=0x%x add=0x%x\n", pstVideoPKT->u32TimeStamp,
4116         //        HAL_MVD_MemRead4Byte(u32PtsTblEntryAddr+16),
4117         //        u32Index, u32PtsTblEntryAddr+16);
4118 
4119         if ((HAL_MVD_IsMStreamerMode(u8Idx) || HAL_MVD_IsMcuMode(u8Idx))
4120             && (pstCtrlCfg->eFileSyncMode == E_MVD_TIMESTAMP_STS))
4121         {
4122             if(pMVDHalContext->bDropOnePTS[u8Idx] == FALSE)
4123             {
4124                 HAL_MVD_MemWrite4Byte(u32MVDFWPtsTblAddr+MVD_FW_SLQTBL_PTS_LEN+12, pstVideoPKT->u32ID_H); //idHigh
4125                 HAL_MVD_MemWrite4Byte(u32MVDFWPtsTblAddr+MVD_FW_SLQTBL_PTS_LEN+16, pstVideoPKT->u32TimeStamp);  //PTS
4126 
4127                 MVD_DBG_STS(MVD_PRINT(">>> drvMVD pts,idH = %lu, %lu\n", HAL_MVD_MemRead4Byte(u32MVDFWPtsTblAddr+MVD_FW_SLQTBL_PTS_LEN+16),
4128                        HAL_MVD_MemRead4Byte(u32MVDFWPtsTblAddr+MVD_FW_SLQTBL_PTS_LEN+12)));
4129                 if (((MVD_NULLPKT_PTS == pstVideoPKT->u32ID_H) && (MVD_NULLPKT_PTS == pstVideoPKT->u32TimeStamp)) == FALSE)
4130                 {   //Only update PTS to firmware when pts field is valid.
4131                     //Plz refer to MDrv_MVD_PushQueue if (u8MstMode == MST_MODE_TRUE) {}
4132                         HAL_MVD_UpdatePts(u8Idx);    //for uniplayer or MCU mode
4133                 }
4134             }
4135 
4136             pMVDHalContext->bDropOnePTS[u8Idx] = FALSE;
4137         }
4138     }
4139 #if _SLQTBL_DUMP_PTS
4140     if (u32Index == 0x177)
4141     {
4142         _SLQTbl_DumpPtsTbl(u8Idx, 0, 0x179);
4143     }
4144 #endif
4145     }
4146     pstSlqTblInfo->u32SlqByteCnt += pstVideoPKT->u32Length;
4147 
4148     //update SLQ tbl entry
4149     //u32EsLast = (pstVideoPKT->u32StAddr)+pstSlqTblInfo->pDrvSlqTbl->u32StAdd;
4150     u32EsLast = (pstVideoPKT->u32StAddr)+HAL_MVD_GetMemOffset(pstMemCfg->u32BSAddr);
4151     HAL_MVD_MemWrite4Byte(*pu32EsNew, u32EsLast-HAL_MVD_GetMemOffset(pstMemCfg->u32BSAddr));
4152     u32ESStart = (u32EsLast) & SLQ_TBL_ENTRY_LEN;
4153 
4154     u32EsLast += pstVideoPKT->u32Length; //update ES write pointer
4155     //Notice: This is for MVD HW, so no need to minus one.
4156     HAL_MVD_MemWrite4Byte((*pu32EsNew)+4, u32EsLast-HAL_MVD_GetMemOffset(pstMemCfg->u32BSAddr));
4157     u32ESEnd   = (u32EsLast) & SLQ_TBL_ENTRY_LEN;
4158 
4159     *pu32EsNew += 8;
4160     if (*pu32EsNew >= pstSlqTblInfo->pDrvEsTbl->u32EndAdd)
4161     {   //wrap to the beginning of the table
4162         MVD_DEBUGINFO(MVD_PRINT("...ES wrapping to the beginning!\n"));
4163         *pu32EsNew = pstSlqTblInfo->pDrvEsTbl->u32StAdd;
4164     }
4165 
4166     //MVD_PRINT("===>[%x] u32ESStart=0x%x u32ESEnd=0x%x u32EsLast=0x%x\n",
4167     //    pMVDHalContext->u32SendTimes[u8Idx]++, u32ESStart, u32ESEnd, u32EsLast);
4168 
4169     u32EntryWord = u32ESEnd;
4170     HAL_MVD_MemWrite4Byte(*u32LastEntry, u32EntryWord);
4171     //MVD_PRINT("===> u32EntryWord1 addr=0x%x\n", (*u32LastEntry));
4172     //MVD_PRINT("===> u32EntryWord0=0x%x\n", u32EntryWord);
4173 
4174     u32EntryWord = u32ESStart;
4175     HAL_MVD_MemWrite4Byte((*u32LastEntry)+4, u32EntryWord);
4176     //MVD_PRINT("===> u32EntryWord1 addr=0x%x\n", (*u32LastEntry)+4);
4177     //MVD_PRINT("===> u32EntryWord1=0x%x\n", u32EntryWord);
4178 
4179     *u32LastEntry += 8;
4180     if (*u32LastEntry >= pstSlqTblInfo->pDrvSlqTbl->u32EndAdd)
4181     {   //wrap to the beginning of the table
4182         MVD_DEBUGINFO(MVD_PRINT("...wrapping to the beginning!\n"));
4183         *u32LastEntry = pstSlqTblInfo->pDrvSlqTbl->u32StAdd;
4184         //also wrap DivX311 pattern table
4185         pstSlqTblInfo->pDrvDivxTbl->u32WrPtr = pstSlqTblInfo->pDrvDivxTbl->u32StAdd;
4186     }
4187 
4188     if (pstSlqTblInfo->pDrvSlqTbl->u32Empty)
4189     {
4190         pstSlqTblInfo->pDrvSlqTbl->u32Empty -= SLQ_ENTRY_LEN;
4191     }
4192 
4193     return TRUE;
4194 }
4195 
4196 //Table of frame rate code for MPEG-2
4197 #if 0
4198 #define FRM_RATE_CODE_NUM 9
4199 static const MS_U16 stFrameRateCode[FRM_RATE_CODE_NUM]=
4200 {
4201     NULL,23976,24000,25000,29976,30000,50000,59947,60000
4202 };
4203 #endif
MVD_GCD(MS_U32 u32A,MS_U32 u32B)4204 static MS_U32 MVD_GCD(MS_U32 u32A, MS_U32 u32B)
4205 {
4206    MS_S32 i;
4207    MS_U32 x[4]; /* need x[0], x[1], x[i-1] */
4208 
4209    if (u32A > u32B)
4210    {
4211      x[0] = u32A; x[1] = u32B;
4212    }
4213    else
4214    {
4215      x[0] = u32B; x[1] = u32A;
4216    }
4217 
4218    i = 1;
4219 
4220    #define w(x) (((x)<4)?(x):(2+((x)&1)))
4221 
4222    while( x[w(i)] != 0 )
4223    {
4224        x[w(i+1)] = x[w(i-1)] % x[w(i)];
4225        i++;
4226    }
4227 
4228    return x[w(i-1)];
4229 
4230    #undef w
4231 }
HAL_MVD_GetFrameInfo(MS_U8 u8Idx,MVD_FrameInfo * pinfo)4232 void HAL_MVD_GetFrameInfo(MS_U8 u8Idx, MVD_FrameInfo *pinfo)
4233 {
4234     FW_VOL_INFO gvolInfo;
4235     FW_DIVX_INFO* pDivxInfo = &(pMVDHalContext->gdivxInfo[u8Idx]);
4236     MS_VIRT temp = 0;
4237     MS_U32 u32DAR_Width=0,u32DAR_Height=0,u32PAR_Width=0,u32PAR_Height=0,u32GCD=0;
4238     MS_U32 u32Vertical_Size=0, u32Horizontal_Size=0;
4239     //13818-2 page 38 Table 6-3
4240     MS_U8 u8DARTable[5][2] = { {1,1}, {1,1}, {4,3}, {16,9}, {221,100} };
4241     MS_U32 pu8MVDGetVolBufStart = NULL;
4242     MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
4243 
4244     pu8MVDGetVolBufStart = GET_VOL_BUFFADD(u8Idx);
4245     if (pu8MVDGetVolBufStart == NULL)
4246     {
4247         MVD_DEBUGERROR(MVD_PRINT("MDrv_MVD_GetFrameInfo error: pu8MVDGetVolBufStart=NULL\n"));
4248         return;
4249     }
4250 
4251     HAL_MVD_CPU_Sync();
4252     HAL_MVD_ReadMemory();
4253 
4254     _miu_offset_to_phy(pMVDHalContext->stMiuCfg.u8FWMiuSel,GET_VOL_BUFFADD(u8Idx),temp);
4255 
4256     gvolInfo = (*(volatile FW_VOL_INFO*)(HAL_MVD_PA2NonCacheSeg(temp)));
4257 
4258     pinfo->u16HorSize = (MS_U16) gvolInfo.width;
4259     pinfo->u16VerSize = (MS_U16) gvolInfo.height;
4260     pinfo->u16par_width  = (MS_U16) gvolInfo.par_width;
4261     pinfo->u16par_height = (MS_U16) gvolInfo.par_height;
4262     pinfo->u8AspectRate = gvolInfo.aspect_ratio;
4263 
4264     pinfo->u16CropBottom = gvolInfo.CropBottom;
4265     pinfo->u16CropTop = 0;
4266     pinfo->u16CropLeft = 0;
4267 
4268     if (pinfo->u16HorSize & MVD_WIDTH_ALIGN_MASK)
4269     {
4270         //Notice: Firmware and driver have to be consistent for this part,
4271         // otherwise the pitch will not match and video is noisy.
4272         pinfo->u16CropRight = MVD_WIDTH_ALIGN_BYTE - (pinfo->u16HorSize & MVD_WIDTH_ALIGN_MASK);
4273         pinfo->u16HorSize = ((pinfo->u16HorSize >> MVD_WIDTH_ALIGN_BITS) + 1) << MVD_WIDTH_ALIGN_BITS;
4274     }
4275     else
4276     {
4277         pinfo->u16CropRight = 0;
4278     }
4279 
4280     MVD_CodecType curCodecType = HAL_MVD_GetCodecType(u8Idx);
4281     if ((curCodecType == E_MVD_CODEC_MPEG4_SHORT_VIDEO_HEADER) ||
4282         (curCodecType == E_MVD_CODEC_DIVX311) || (curCodecType == E_MVD_CODEC_FLV))
4283     {
4284         pinfo->u8Interlace= FALSE; //divx311/flv/svh just has progressive mode
4285         MS_ASSERT(gvolInfo.progressive_sequence == 1); //FW will init it as 1
4286     }
4287     else
4288     {
4289         if (gvolInfo.progressive_sequence == 0)
4290         {
4291             pinfo->u8Interlace=1;
4292         }
4293         else
4294         {
4295             pinfo->u8Interlace=0;
4296         }
4297     }
4298 
4299     ///Calculate PAR info
4300     if (pinfo->u16par_width == 0 || pinfo->u16par_height == 0)
4301     {
4302         if ((pinfo->u8AspectRate > 0) && (pinfo->u8AspectRate < 5 ))
4303         {
4304             if (pinfo->u8AspectRate == 1)
4305             {   //SAR=1.0 square sample
4306                 u32DAR_Width = (MS_U32)pinfo->u16HorSize;
4307                 u32DAR_Height = (MS_U32)pinfo->u16VerSize;
4308                 pinfo->u16par_width = 1;
4309                 pinfo->u16par_height = 1;
4310             }
4311             else
4312             {
4313                 u32DAR_Width = (MS_U32)u8DARTable[pinfo->u8AspectRate][0];
4314                 u32DAR_Height = (MS_U32)u8DARTable[pinfo->u8AspectRate][1];
4315                 u32Vertical_Size = (MS_U32)pinfo->u16VerSize;
4316                 u32Horizontal_Size = (MS_U32)(pinfo->u16HorSize - pinfo->u16CropRight);
4317                 u32PAR_Width = u32DAR_Width * u32Vertical_Size;
4318                 u32PAR_Height = u32DAR_Height * u32Horizontal_Size;
4319                 u32GCD = MVD_GCD(u32PAR_Width, u32PAR_Height);
4320                 if (0 == u32GCD)
4321                 {
4322                     pinfo->u16HorSize = 0xFFFF;
4323                     pinfo->u16VerSize = 0xFFFF;
4324 
4325                     return;
4326                 }
4327                 else
4328                 {
4329                     pinfo->u16par_width = (MS_U16) (u32PAR_Width / u32GCD);
4330                     pinfo->u16par_height = (MS_U16) (u32PAR_Height / u32GCD);
4331                     MVD_DEBUGVERBAL(MVD_PRINT("u32PAR_Width:%d,u32PAR_Height:%d,GCD:%d\n",u32PAR_Width,u32PAR_Height,u32GCD));
4332                 }
4333             }
4334         }
4335         else
4336         {
4337             //set to 0 to indicate it's abnormal
4338             u32DAR_Width = 0;
4339             u32DAR_Height = 0;
4340             pinfo->u16par_width = 0;
4341             pinfo->u16par_height = 0;
4342         }
4343         MVD_DEBUGVERBAL(MVD_PRINT("u32DAR_Width:%d,u32DAR_Height%d\n",u32DAR_Width,u32DAR_Height));
4344     }
4345     MVD_DEBUGVERBAL(MVD_PRINT("pinfo->u16par_width:%d, pinfo->u16par_height:%d\n",pinfo->u16par_width, pinfo->u16par_height));
4346 
4347     if (curCodecType == E_MVD_CODEC_MPEG2)
4348     {
4349         if (gvolInfo.frame_rate < FRM_RATE_CODE_NUM)
4350         {
4351             pinfo->u32FrameRate = stFrameRateCode[gvolInfo.frame_rate];
4352         }
4353         else
4354         {
4355             pinfo->u32FrameRate = 0;
4356         }
4357     }
4358     else if ((curCodecType == E_MVD_CODEC_VC1_ADV) || (curCodecType == E_MVD_CODEC_VC1_MAIN))
4359     {
4360         if ((gvolInfo.vc1_frame_rate != 0) && (gvolInfo.vc1_frame_rate != MVD_U32_MAX))
4361         {
4362             pinfo->u32FrameRate = gvolInfo.vc1_frame_rate;
4363         }
4364         else
4365         {
4366             pinfo->u32FrameRate = pDivxInfo->frame_rate; //report framerate specified in MDrv_MVD_SetFrameInfo()
4367         }
4368 
4369         MVD_DEBUGVERBAL(MVD_PRINT("MVD: vc1_frameRate=%d\n", pinfo->u32FrameRate));
4370     }
4371     else if (curCodecType == E_MVD_CODEC_MPEG4)
4372     {
4373         if (pDivxInfo->frame_rate != 0)
4374         {
4375             pinfo->u32FrameRate = pDivxInfo->frame_rate;
4376             //report framerate specified in MDrv_MVD_SetFrameInfo(), which is usually obtained from container
4377         }
4378         else if (gvolInfo.frame_rate != 0)
4379         {
4380             pinfo->u32FrameRate = gvolInfo.frame_rate;  //report framerate from f/w
4381         }
4382         else if ((gvolInfo.fixed_vop_time_incr != 0) && (gvolInfo.vol_time_incr_res != 0))
4383         {
4384             pinfo->u32FrameRate = (gvolInfo.vol_time_incr_res * 1000) / gvolInfo.fixed_vop_time_incr;
4385             //calculate framerate according to vol header
4386         }
4387         else if(pMVDHalContext->u32DmxFrameRate[u8Idx] != 0 && pMVDHalContext->u32DmxFrameRateBase[u8Idx] != 0)
4388         {
4389             pinfo->u32FrameRate = (pMVDHalContext->u32DmxFrameRate[u8Idx]/pMVDHalContext->u32DmxFrameRateBase[u8Idx])*1000;
4390         }
4391         else
4392         {
4393             pinfo->u32FrameRate = 60000; //set default frame rate according to chip capability
4394         }
4395         MVD_DEBUGVERBAL(MVD_PRINT("MVD: vol_time_incr_res=%d, fixed_vop_time_incr=%d\n", gvolInfo.vol_time_incr_res, gvolInfo.fixed_vop_time_incr));
4396     }
4397     else
4398     {
4399         if (gvolInfo.frame_rate != 0)
4400         {
4401             pinfo->u32FrameRate = gvolInfo.frame_rate;
4402         }
4403         else
4404         {
4405             pinfo->u32FrameRate = pDivxInfo->frame_rate; //report framerate specified in MDrv_MVD_SetFrameInfo()
4406         }
4407     }
4408     MVD_DEBUGVERBAL(MVD_PRINT("===> MVD: frameRate=%d  curCodecType=0x%x\n", pinfo->u32FrameRate, curCodecType));
4409 
4410     //for MM
4411     pinfo->u8MPEG1=gvolInfo.mpeg1;
4412     pinfo->u16PTSInterval=gvolInfo.pts_incr;
4413     pinfo->u8PlayMode=gvolInfo.play_mode;
4414     pinfo->u8FrcMode=gvolInfo.mpeg_frc_mode;
4415 
4416     //for dynamic scaling
4417     pinfo->bEnableMIUSel = (MS_BOOL)pMVDHalContext->stMiuCfg.u8FWMiuSel;
4418 
4419     if(pMVDHalContext->stMiuCfg.u8FWMiuSel >= E_CHIP_MIU_2)
4420         {
4421         MVD_DEBUGERROR(MVD_PRINT("u8MiuSel is %d !!, but return type is only Boolean. Please use MDrv_HVD_EX_GetDSBufMiuSelect() to get right miu select of DS buffer!\n",pMVDHalContext->stMiuCfg.u8FWMiuSel));
4422         }
4423 
4424     if (pstMemCfg->bEnableDynScale)
4425         {
4426         _miu_offset_to_phy(pMVDHalContext->stMiuCfg.u8FWMiuSel,GET_DS_BUFFADD(u8Idx),pinfo->u32DynScalingAddr);
4427 
4428         MVD_CtrlCfg* pCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
4429         pinfo->u8DynScalingDepth= pCtrlCfg->u8DynScalingDepth;
4430         pinfo->u32DynScalingBufSize= gvolInfo.DSbufsize;
4431     }
4432     else
4433     {
4434         pinfo->u32DynScalingAddr= NULL;
4435         pinfo->u8DynScalingDepth= 0;
4436         pinfo->u32DynScalingBufSize= 0;
4437     }
4438 
4439     return;
4440 }
4441 
MVD_RstFrmInfo(MS_U8 u8Idx,MVD_FrmInfoType eType)4442 E_MVD_Result MVD_RstFrmInfo(MS_U8 u8Idx, MVD_FrmInfoType eType)
4443 {
4444     E_MVD_Result eRet = E_MVD_RET_OK;
4445     MS_VIRT u32DecFrmInfoAdd = GET_DECFRMINFO_BUFFADD(u8Idx);
4446     if (NULL == u32DecFrmInfoAdd)
4447     {
4448         return E_MVD_RET_FAIL;
4449     }
4450 
4451     //MVD_PRINT("%s u32DecFrmInfoAdd = 0x%x\n", __FUNCTION__, u32DecFrmInfoAdd);
4452     if (E_MVD_FRMINFO_DECODE == eType)
4453     {
4454         HAL_MVD_MemWrite4Byte((u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DEC_LUMAADDR), _INIT_ADDR);
4455         HAL_MVD_MemWrite4Byte((u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DEC_CHROMAADDR), _INIT_ADDR);
4456         HAL_MVD_MemWrite4Byte((u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DEC_TIMESTAMP), _INIT_TIMESTAMP);
4457         HAL_MVD_MemWrite4Byte((u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DEC_ID_L), _INIT_ID);
4458         HAL_MVD_MemWrite4Byte((u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DEC_ID_H), _INIT_ID);
4459         HAL_MVD_MemWrite2Byte((u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DEC_PITCH), _INIT_LEN);
4460         HAL_MVD_MemWrite2Byte((u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DEC_WIDTH), _INIT_LEN);
4461         HAL_MVD_MemWrite2Byte((u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DEC_HEIGHT), _INIT_LEN);
4462         HAL_MVD_MemWrite2Byte((u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DEC_FRAMETYPE), 0xff);
4463     }
4464     else if (E_MVD_FRMINFO_DISPLAY == eType)
4465     {
4466         HAL_MVD_MemWrite4Byte((u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DISP_LUMAADDR), _INIT_ADDR);
4467         HAL_MVD_MemWrite4Byte((u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DISP_CHROMAADDR), _INIT_ADDR);
4468         HAL_MVD_MemWrite4Byte((u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DISP_TIMESTAMP), _INIT_TIMESTAMP);
4469         HAL_MVD_MemWrite4Byte((u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DISP_ID_L), _INIT_ID);
4470         HAL_MVD_MemWrite4Byte((u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DISP_ID_H), _INIT_ID);
4471         HAL_MVD_MemWrite2Byte((u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DISP_PITCH), _INIT_LEN);
4472         HAL_MVD_MemWrite2Byte((u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DISP_WIDTH), _INIT_LEN);
4473         HAL_MVD_MemWrite2Byte((u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DISP_HEIGHT), _INIT_LEN);
4474         HAL_MVD_MemWrite2Byte((u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DISP_FRAMETYPE), 0xff);
4475     }
4476     else
4477     {
4478         eRet = E_MVD_RET_INVALID_PARAM;
4479     }
4480 
4481     return eRet;
4482 }
4483 
4484 //Given the start address & the available size for the FW buffers,
4485 //Calculate the start address of each buffers.
MVD_GetFWBuffAdd(MS_VIRT u32Start,MS_U32 u32AvailLen,MVD_FWBuff * pBuff)4486 static MS_BOOL MVD_GetFWBuffAdd(MS_VIRT u32Start, MS_U32 u32AvailLen, MVD_FWBuff* pBuff)
4487 {
4488     MS_VIRT tmpAdr = u32Start;
4489 
4490     if(pBuff == NULL)
4491     {
4492         MVD_DEBUGERROR(MVD_PRINT("%s err: NULL pBuff\n", __FUNCTION__));
4493         return FALSE;
4494     }
4495     tmpAdr += MVD_FW_CODE_LEN;
4496     GET_FW_BUFFADD_ALIGN(tmpAdr, FW_BUFF_ALIGN, MVD3_FW_VOL_INFO_BUF_LEN, pBuff->pu8MVDGetVolBufStart);
4497     GET_FW_BUFFADD_ALIGN(tmpAdr, FW_BUFF_ALIGN, MVD3_FW_FRAME_INFO_BUF_LEN, pBuff->pu8MVDGetFrameInfoBufStart);
4498     GET_FW_BUFFADD_ALIGN(tmpAdr, FW_BUFF_ALIGN, MVD3_FW_DIVX_INFO_BUF_LEN, pBuff->pu8MVDSetHeaderBufStart);
4499     GET_FW_BUFFADD_ALIGN(tmpAdr, FW_BUFF_ALIGN,
4500         (MVD3_FW_USER_DATA_BUF_LEN+MVD3_FW_USER_DATA_BUF_BACKUP_LEN), pBuff->u32UserDataBuf);
4501     //MVD3_FW_USER_DATA_BUF_BACKUP_LEN is used as CC decoding buffer for MVD_SUPPORT_X4_CC
4502 
4503     GET_FW_BUFFADD_ALIGN(tmpAdr, FW_BUFF_ALIGN, MVD3_FW_SLQ_TAB_TMPBUF_LEN, pBuff->u32MVDFWSLQTABTmpbufAdr);
4504     GET_FW_BUFFADD(tmpAdr, MVD_FW_SLQTBL_PTS_BUF_LEN, pBuff->u32MVDFWPtsTblAddr);
4505     GET_FW_BUFFADD(tmpAdr, MVD_FW_DYN_SCALE_BUF_LEN, pBuff->u32DynScalingAdd);
4506     GET_FW_BUFFADD(tmpAdr, MVD_FW_SCALER_INFO_BUF_LEN, pBuff->u32ScalerInfoAdd);
4507     GET_FW_BUFFADD(tmpAdr, MVD_FW_DECFRM_INFO_BUF_LEN, pBuff->u32DecFrmInfoAdd);
4508     GET_FW_BUFFADD(tmpAdr, MVD_FW_VBBU_TABLE_LEN, pBuff->u32VBBUTableAdd);
4509 
4510 
4511     MVD_DEBUGINFO(MVD_PRINT("set pu8MVDGetVolBufStart=%lx\n", (unsigned long)pBuff->pu8MVDGetVolBufStart));
4512     MVD_DEBUGINFO(MVD_PRINT("set pu8MVDGetFrameInfoBufStart=%lx\n", (unsigned long)pBuff->pu8MVDGetFrameInfoBufStart));
4513     MVD_DEBUGINFO(MVD_PRINT("set pu8MVDSetHeaderBufStart=%lx\n", (unsigned long)pBuff->pu8MVDSetHeaderBufStart));
4514     MVD_DEBUGINFO(MVD_PRINT("u32UserDataBuf start=%lx\n", (unsigned long)pBuff->u32UserDataBuf));
4515     MVD_DEBUGINFO(MVD_PRINT("u32MVDFWSLQTABTmpbufAdr start=%lx\n", (unsigned long)pBuff->u32MVDFWSLQTABTmpbufAdr));
4516     MVD_DEBUGINFO(MVD_PRINT("PtsTblAddr start=%lx\n", (unsigned long)pBuff->u32MVDFWPtsTblAddr));
4517     MVD_DEBUGINFO(MVD_PRINT("u32DynScalingAdd start=%lx\n", (unsigned long)pBuff->u32DynScalingAdd));
4518     MVD_DEBUGINFO(MVD_PRINT("ScalerInfo start=%lx end=%lx\n",
4519            (unsigned long)pBuff->u32ScalerInfoAdd, (pBuff->u32ScalerInfoAdd+MVD_FW_SCALER_INFO_BUF_LEN)));
4520     MVD_DEBUGINFO(MVD_PRINT("DecFrmInfo start=%lx end=%lx\n",
4521            (unsigned long)pBuff->u32DecFrmInfoAdd, (pBuff->u32DecFrmInfoAdd+MVD_FW_DECFRM_INFO_BUF_LEN)));
4522 
4523     MS_U32 u32ShMemBoundary = (MVD_FW_CODE_LEN==MVD_FW_CODE_LEN_V00) ? MVD_FW_MPOOL_START_OFFSET : MVD_FW_TASK_OFFSET;
4524 #if v3_temp
4525 
4526     if ((pBuff->u32VBBUTableAdd+MVD_FW_VBBU_TABLE_LEN-u32Start) > u32ShMemBoundary)
4527     {
4528         //shared memory should not overlap with FW memory pool.
4529         MVD_DEBUGERROR(MVD_PRINT("%s err: 0x%lx out of memory boundary!\n", __FUNCTION__,
4530                        (pBuff->u32VBBUTableAdd+MVD_FW_VBBU_TABLE_LEN-u32Start)));
4531         return FALSE;
4532     }
4533 #else
4534      if ((pBuff->u32DecFrmInfoAdd+MVD_FW_DECFRM_INFO_BUF_LEN-u32Start) > u32ShMemBoundary)
4535     {
4536         //shared memory should not overlap with FW memory pool.
4537         MVD_DEBUGERROR(MVD_PRINT("%s err: 0x%x out of memory boundary!\n", __FUNCTION__,
4538                        (pBuff->u32DecFrmInfoAdd+MVD_FW_DECFRM_INFO_BUF_LEN-u32Start)));
4539         return FALSE;
4540     }
4541 #endif
4542 
4543     return TRUE;
4544 }
4545 
4546 //Set buffer address to f/w
4547 //Init the memory erea if necessary
MVD_SetFWBuffAdd(MS_U8 u8Idx,MVD_FWBuff * pBuff)4548 static MS_BOOL MVD_SetFWBuffAdd(MS_U8 u8Idx, MVD_FWBuff* pBuff)
4549 {
4550     MS_U32 i;
4551     MVD_SrcMode curSrcMode = E_MVD_SRC_UNKNOWN;
4552     MVD_MEMCfg* pstMemCfg = NULL;
4553     MVD_CtrlCfg* pCtrlCfg = NULL;
4554 
4555     if(pBuff == NULL)
4556     {
4557         MVD_DEBUGERROR(MVD_PRINT("%s err: NULL pBuff\n", __FUNCTION__));
4558         return FALSE;
4559     }
4560 
4561     pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
4562 
4563     MVD_DEBUGINFO(MVD_PRINT("\nMIU is (shm,hw,fw)=(%x,%x,%x)\n",u8SHMMiuSel,pstMemCfg->u8HWMiuSel,pstMemCfg->u8FWMiuSel));
4564 
4565     curSrcMode = HAL_MVD_GetSrcMode(u8Idx);
4566 
4567     HAL_MVD_SetVolInfoBufferAddr(u8Idx, pBuff->pu8MVDGetVolBufStart);
4568     _MVD_Memset(pBuff->pu8MVDGetVolBufStart, 0, MVD3_FW_VOL_INFO_BUF_LEN);
4569 
4570     pBuff->u32VolAdd = pBuff->pu8MVDGetVolBufStart;
4571 
4572     _miu_offset_to_phy(pMVDHalContext->stMiuCfg.u8FWMiuSel,pBuff->u32VolAdd,pBuff->u32VolAdd);
4573 
4574     pBuff->u32VolAdd = HAL_MVD_PA2NonCacheSeg(pBuff->u32VolAdd);
4575     MVD_DEBUGINFO(MVD_PRINT("gvolInfo = 0x%lx, volBuf=0x%lx\n", (unsigned long)pBuff->u32VolAdd, (unsigned long)pBuff->pu8MVDGetVolBufStart));
4576 
4577     HAL_MVD_SetFrameInfoBufferAddr(u8Idx, pBuff->pu8MVDGetFrameInfoBufStart);
4578     _MVD_Memset(pBuff->pu8MVDGetFrameInfoBufStart, 0, MVD3_FW_FRAME_INFO_BUF_LEN);
4579 
4580     HAL_MVD_SetHeaderBufferAddr(u8Idx, pBuff->pu8MVDSetHeaderBufStart);
4581     HAL_MVD_SetUserDataBuf(u8Idx, pBuff->u32UserDataBuf, MVD3_FW_USER_DATA_BUF_LEN);
4582     pCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
4583     pCtrlCfg->u32UsrDataRd = pBuff->u32UserDataBuf;
4584 
4585 
4586     if((curSrcMode != E_MVD_TS_FILE_MODE)
4587     && (curSrcMode != E_MVD_TS_MODE))
4588     {
4589         _MVD_Memset(pBuff->u32MVDFWSLQTABTmpbufAdr, 0, MVD3_FW_SLQ_TAB_TMPBUF_LEN);
4590         HAL_MVD_MemWrite4Byte(pBuff->u32MVDFWSLQTABTmpbufAdr, 0xBE010000UL);
4591         HAL_MVD_MemWrite4Byte(pBuff->u32MVDFWSLQTABTmpbufAdr+4, 0x000000FAUL);
4592 
4593         HAL_MVD_SetPtsTblAddr(u8Idx, pBuff->u32MVDFWPtsTblAddr);
4594         for (i=0; i<MVD_FW_SLQTBL_PTS_BUF_LEN; i+=MVD_FW_SLQTBL_PTS_LEN)
4595         {
4596             HAL_MVD_MemWrite4Byte(pBuff->u32MVDFWPtsTblAddr+i, 0);     //byteCnt
4597             HAL_MVD_MemWrite4Byte(pBuff->u32MVDFWPtsTblAddr+i+4, 0);   //dummyPktCnt
4598             HAL_MVD_MemWrite4Byte(pBuff->u32MVDFWPtsTblAddr+i+8, 0);   //idLow
4599             HAL_MVD_MemWrite4Byte(pBuff->u32MVDFWPtsTblAddr+i+12, 0);  //idHigh
4600 
4601             HAL_MVD_MemWrite4Byte(pBuff->u32MVDFWPtsTblAddr+i+16, MVD_NULLPKT_PTS);  //PTS
4602             HAL_MVD_MemWrite4Byte(pBuff->u32MVDFWPtsTblAddr+i+20, 0);  //reserved0
4603             HAL_MVD_MemWrite4Byte(pBuff->u32MVDFWPtsTblAddr+i+24, 0);  //reserved1
4604             HAL_MVD_MemWrite4Byte(pBuff->u32MVDFWPtsTblAddr+i+28, 0);  //reserved2
4605         }
4606         //MS_ASSERT((u32MVDFWPtsTblAddr+MVD_FW_SLQTBL_PTS_BUF_LEN)<=(u32start+u32len));
4607         MVD_DEBUGINFO(MVD_PRINT("PTS tbl start=%lx end=%lx\n",
4608                (unsigned long)pBuff->u32MVDFWPtsTblAddr, (unsigned long)(pBuff->u32MVDFWPtsTblAddr+MVD_FW_SLQTBL_PTS_BUF_LEN)));
4609 
4610         pBuff->u32VBBUTableAdd = VBBU_TABLE_START+u8Idx*0x100000;
4611     }
4612 
4613     if (pstMemCfg->bEnableDynScale)
4614     {
4615         HAL_MVD_SetDynamicScaleAddr(u8Idx, pBuff->u32DynScalingAdd);
4616         HAL_MVD_EnableDynamicScale(u8Idx,0); //default old DS style
4617         pCtrlCfg->u8DynScalingDepth = 32; //HAL_MVD_GetDynamicScaleDepth
4618         MVD_DEBUGINFO(MVD_PRINT("u8EnableMIUSel    = 0x%x\n", pMVDHalContext->stMiuCfg.u8FWMiuSel));
4619         MVD_DEBUGINFO(MVD_PRINT("u32DynScalingAddr= 0x%lx\n", (unsigned long)pBuff->u32DynScalingAdd));
4620         MVD_DEBUGINFO(MVD_PRINT("u8DynScalingDepth= 0x%x\n", pCtrlCfg->u8DynScalingDepth));
4621     }
4622     MVD_DEBUGINFO(MVD_PRINT("DynScaling start=%lx end=%lx\n",
4623            (unsigned long)pBuff->u32DynScalingAdd, (unsigned long)(pBuff->u32DynScalingAdd+MVD_FW_DYN_SCALE_BUF_LEN)));
4624 
4625     HAL_MVD_SetDecFrmInfoAddr(u8Idx, pBuff->u32DecFrmInfoAdd);
4626 
4627     MVD_RstFrmInfo(u8Idx, E_MVD_FRMINFO_DECODE);
4628     MVD_RstFrmInfo(u8Idx, E_MVD_FRMINFO_DISPLAY);
4629     MVD_DEBUGINFO(MVD_PRINT("DecFrmInfo start=%lx\n", (unsigned long)pBuff->u32DecFrmInfoAdd));
4630 
4631     if (curSrcMode == E_MVD_SLQ_TBL_MODE)
4632     {
4633         HAL_MVD_SLQTblInit(u8Idx);
4634     }
4635 
4636     return TRUE;
4637 }
4638 
4639 #ifdef VDEC3
4640 #else
MVD_IsNextDispFrmRdy(MS_U8 u8Idx)4641 static MS_BOOL MVD_IsNextDispFrmRdy(MS_U8 u8Idx)
4642 {
4643     #define NXT_DISP_TIMEOUT 20000//0x20
4644     MS_U32 u32TimeOut = 0;
4645     MVD_CmdArg mvdcmd;
4646 
4647     HAL_MVD_ResetHandShake(u8Idx, MVD_HANDSHAKE_GET_NXTDISPFRM);
4648     SETUP_CMDARG(mvdcmd);
4649     SET_DECNUM(mvdcmd, u8Idx);
4650     SET_CMD_RET_FALSE(CMD_GET_NEXTDISPFRM, &mvdcmd);
4651 
4652     while(!HAL_MVD_IsCmdFinished(u8Idx, MVD_HANDSHAKE_GET_NXTDISPFRM) && (u32TimeOut < NXT_DISP_TIMEOUT))
4653     {
4654         u32TimeOut++;
4655     }
4656     if(u32TimeOut >= NXT_DISP_TIMEOUT)
4657     {
4658         MVD_DEBUGERROR( MVD_PRINT( "Ctrl: 0x%x fail!!\r\n", CMD_GET_NEXTDISPFRM ) );
4659         return FALSE;
4660     }
4661     return TRUE;
4662 }
4663 #endif
4664 
HAL_MVD_GetExtDispInfo(MS_U8 u8Idx,MVD_ExtDispInfo * pInfo)4665 void HAL_MVD_GetExtDispInfo(MS_U8 u8Idx, MVD_ExtDispInfo* pInfo)
4666 {
4667     pInfo->u16VSize  = MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_DISP_V_SIZE, sizeof(MS_U16));
4668     pInfo->u16HSize  = MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_DISP_H_SIZE, sizeof(MS_U16));
4669     pInfo->u16VOffset = MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_CENTRE_V_OFFSET, sizeof(MS_U16));
4670     pInfo->u16HOffset = MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_CENTRE_H_OFFSET, sizeof(MS_U16));
4671 }
4672 
HAL_MVD_GetFrmInfo(MS_U8 u8Idx,MVD_FrmInfoType eType,MVD_FrmInfo * pInfo)4673 E_MVD_Result HAL_MVD_GetFrmInfo(MS_U8 u8Idx, MVD_FrmInfoType eType, MVD_FrmInfo* pInfo)
4674 {
4675     MS_U32 u32Id = MVD_GetStreamId(u8Idx);
4676     MS_U8 u8VPUIdx = HAL_VPU_EX_GetTaskId(u32Id);
4677     E_MVD_Result eRet = E_MVD_RET_OK;
4678     MS_VIRT u32DecFrmInfoAdd = GET_DECFRMINFO_BUFFADD(u8Idx);
4679 #if v3_temp
4680     MVD_MEMCfg* pstMemCfg = NULL;
4681     pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
4682 #endif
4683     if (NULL == pInfo)
4684     {
4685         MVD_DEBUGERROR(MVD_PRINT("GetFrmInfo NULL pInfo!\n"));
4686         return E_MVD_RET_INVALID_PARAM;
4687     }
4688     if (NULL == u32DecFrmInfoAdd)
4689     {
4690         MVD_DEBUGERROR(MVD_PRINT("GetFrmInfo NULL u32DecFrmInfoAdd!\n"));
4691         return E_MVD_RET_FAIL;
4692     }
4693     //MVD_PRINT("%s u32DecFrmInfoAdd = 0x%x\n", __FUNCTION__, u32DecFrmInfoAdd);
4694 
4695     if (E_MVD_FRMINFO_DECODE == eType)
4696     {
4697         pInfo->u32LumaAddr  = HAL_MVD_MemRead4Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DEC_LUMAADDR);
4698         pInfo->u32ChromaAddr= HAL_MVD_MemRead4Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DEC_CHROMAADDR);
4699         pInfo->u32TimeStamp = _90K_TO_MS(HAL_MVD_MemRead4Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DEC_TIMESTAMP));
4700         pInfo->u32ID_L  = HAL_MVD_MemRead4Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DEC_ID_L);
4701         pInfo->u32ID_H  = HAL_MVD_MemRead4Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DEC_ID_H);
4702         pInfo->u16Pitch = HAL_MVD_MemRead2Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DEC_PITCH);
4703         pInfo->u16Width = HAL_MVD_MemRead2Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DEC_WIDTH);
4704         pInfo->u16Height= HAL_MVD_MemRead2Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DEC_HEIGHT);
4705         pInfo->eFrmType = (MVD_PicType)HAL_MVD_MemRead2Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DEC_FRAMETYPE);
4706     }
4707     else if (E_MVD_FRMINFO_DISPLAY == eType)
4708     {
4709         pInfo->u32LumaAddr  = HAL_MVD_MemRead4Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DISP_LUMAADDR);
4710         pInfo->u32ChromaAddr= HAL_MVD_MemRead4Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DISP_CHROMAADDR);
4711         pInfo->u32TimeStamp = _90K_TO_MS(HAL_MVD_MemRead4Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DISP_TIMESTAMP));
4712         pInfo->u32ID_L  = HAL_MVD_MemRead4Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DISP_ID_L);
4713         pInfo->u32ID_H  = HAL_MVD_MemRead4Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DISP_ID_H);
4714         pInfo->u16Pitch = HAL_MVD_MemRead2Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DISP_PITCH);
4715         pInfo->u16Width = HAL_MVD_MemRead2Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DISP_WIDTH);
4716         pInfo->u16Height= HAL_MVD_MemRead2Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DISP_HEIGHT);
4717         pInfo->eFrmType = (MVD_PicType)HAL_MVD_MemRead2Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_DISP_FRAMETYPE);
4718     }
4719     else if (E_MVD_FRMINFO_NEXT_DISPLAY == eType)
4720     {
4721 #if v3_temp
4722         DISPQ_IN_DRAM* pTemp = (DISPQ_IN_DRAM*)(MS_PA2KSEG1(pstMemCfg->u32FWCodeAddr+DISP_QUEUE_START+ u8VPUIdx*0x100000));
4723         if (pTemp->dispQ_rd == pTemp->dispQ_wr)
4724         {
4725             MVD_DEBUGINFO(MVD_PRINT("NextDispFrm not ready!\n"));
4726             return E_MVD_RET_FAIL;
4727         }
4728         pInfo->u16FrmIdx = pTemp->disp_info[pTemp->dispQ_rd].u16NextDispFrameIdx;
4729 
4730         pInfo->u32LumaAddr  = pTemp->disp_info[pTemp->dispQ_rd].u32NextDispLumaAddr;
4731 
4732         pInfo->u32ChromaAddr= pTemp->disp_info[pTemp->dispQ_rd].u32NextDispChromaAddr;
4733         // 64BIT_PTS = (TimeStamp | (ID_H<<32)) , unit: 90K
4734         pInfo->u32TimeStamp = pTemp->disp_info[pTemp->dispQ_rd].u32NextDispTimeStamp;
4735 
4736         pInfo->u32ID_H  = pTemp->disp_info[pTemp->dispQ_rd].u32NextDispID_H;
4737 
4738         pInfo->u16Width = pTemp->disp_info[pTemp->dispQ_rd].u16NextDispWidth;
4739 
4740         if(HAL_MVD_IsMcuMode(u8Idx))
4741         {
4742              //bit[19-20] Picture format,
4743             //bit[18-17] Disp times, 1~3
4744             //bit[16] Top field first , 0-> bottom first, 1-> top first
4745             //bit[15:8] Range reduction of luma data
4746             //bit[7:0] Range reduction of chroma data
4747             pInfo->u32ID_L = (MS_U32)pTemp->disp_info[pTemp->dispQ_rd].u8NextDispRangeRed_UV
4748                                              | (MS_U32)(pTemp->disp_info[pTemp->dispQ_rd].u8NextDispRangeRed_Y << 8)
4749                                              | (MS_U32)(pTemp->disp_info[pTemp->dispQ_rd].u16ExtData << 16)
4750                                              | (MS_U32)(pTemp->disp_info[pTemp->dispQ_rd].u8Progressive << 19);
4751 
4752             if (pInfo->u16Width & MVD_WIDTH_ALIGN_MASK)
4753             {
4754                 pInfo->u16Width = ((pInfo->u16Width >> MVD_WIDTH_ALIGN_BITS) + 1) << MVD_WIDTH_ALIGN_BITS;
4755             }
4756         }
4757         else
4758         {
4759             pInfo->u32ID_L  = pTemp->disp_info[pTemp->dispQ_rd].u32DispID_L;
4760         }
4761         pInfo->u16Pitch = pTemp->disp_info[pTemp->dispQ_rd].u16NextDispPitch;
4762         pInfo->u16Height= pTemp->disp_info[pTemp->dispQ_rd].u16NextDispHeight;
4763         pInfo->eFrmType = pTemp->disp_info[pTemp->dispQ_rd].u16NextDispeFrameType;
4764 
4765         pTemp->bUsedByOutside[pInfo->u16FrmIdx]++;
4766 
4767         pTemp->dispQ_rd = (pTemp->dispQ_rd+1)%DISPQ_SIZE;
4768         MsOS_FlushMemory();
4769 #else
4770         if (!MVD_IsNextDispFrmRdy(u8Idx))
4771         {
4772             MVD_DEBUGINFO(MVD_PRINT("NextDispFrm not ready!\n"));
4773             return E_MVD_RET_FAIL;
4774         }
4775         pInfo->u16FrmIdx= HAL_MVD_MemRead2Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_NEXTDISP_FRAMEIDX);
4776         if (pInfo->u16FrmIdx  == 0xFFFF)
4777         {
4778             MVD_DEBUGINFO(MVD_PRINT("GetFrmInfo no available frame!\n"));
4779             return E_MVD_RET_FAIL;
4780         }
4781         pInfo->u32LumaAddr  = HAL_MVD_MemRead4Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_NEXTDISP_LUMAADDR);
4782         pInfo->u32ChromaAddr= HAL_MVD_MemRead4Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_NEXTDISP_CHROMAADDR);
4783         // 64BIT_PTS = (TimeStamp | (ID_H<<32)) , unit: 90K
4784         pInfo->u32TimeStamp = (HAL_MVD_MemRead4Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_NEXTDISP_TIMESTAMP));
4785         pInfo->u32ID_H  = HAL_MVD_MemRead4Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_NEXTDISP_ID_H);
4786         pInfo->u16Width = HAL_MVD_MemRead2Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_NEXTDISP_WIDTH);
4787         if(HAL_MVD_IsMcuMode(u8Idx))
4788         {
4789             //bit[18-17] Disp times, 1~3
4790             //bit[16] Top field first , 0-> bottom first, 1-> top first
4791             //bit[15:8] Range reduction of luma data
4792             //bit[7:0] Range reduction of chroma data
4793             pInfo->u32ID_L = (MS_U32)HAL_MVD_MemReadByte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_NEXTDISP_RANGERED_UV)
4794                                              | (MS_U32)(HAL_MVD_MemReadByte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_NEXTDISP_RANGERED_Y) << 8)
4795                                              | (MS_U32)(HAL_MVD_MemReadByte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_NEXTDISP_EXT_DATA) << 16);
4796             if (pInfo->u16Width & MVD_WIDTH_ALIGN_MASK)
4797             {
4798                 pInfo->u16Width = ((pInfo->u16Width >> MVD_WIDTH_ALIGN_BITS) + 1) << MVD_WIDTH_ALIGN_BITS;
4799             }
4800         }
4801         else
4802         {
4803             pInfo->u32ID_L  = HAL_MVD_MemRead4Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_NEXTDISP_ID_L);
4804         }
4805         pInfo->u16Pitch = HAL_MVD_MemRead2Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_NEXTDISP_PITCH);
4806         pInfo->u16Height= HAL_MVD_MemRead2Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_NEXTDISP_HEIGHT);
4807         pInfo->eFrmType = (MVD_PicType)HAL_MVD_MemRead2Byte(u32DecFrmInfoAdd + OFFSET_DECFRAMEINFO_NEXTDISP_FRAMETYPE);
4808 #endif
4809 #if 0
4810     MVD_PRINT("NxtFrm:: Idx=0x%x, ", pInfo->u16FrmIdx);
4811     MVD_PRINT("Type=0x%x, ", pInfo->eFrmType      );
4812     MVD_PRINT("Luma=0x%x, ", pInfo->u32LumaAddr  );
4813     MVD_PRINT("Chroma=0x%x, ", pInfo->u32ChromaAddr);
4814     MVD_PRINT("Pts=%lu, ", pInfo->u32TimeStamp );
4815     MVD_PRINT("ID_H=%lu, ", pInfo->u32ID_H      );
4816     MVD_PRINT("ID_L=0x%x\n", pInfo->u32ID_L      );
4817 #endif
4818         MVD_DBG_STS(MVD_PRINT("<<< drvMVD pts,idH = %lu, %lu\n", pInfo->u32TimeStamp, pInfo->u32ID_H));
4819     }
4820     else
4821     {
4822         eRet = E_MVD_RET_INVALID_PARAM;
4823     }
4824 
4825     if ((pInfo->u32LumaAddr  == _INIT_ADDR) || (pInfo->u32ChromaAddr== _INIT_ADDR) ||
4826         (pInfo->u16Pitch == _INIT_LEN) || (pInfo->u16Width == _INIT_LEN) ||
4827         (pInfo->u16Height== _INIT_LEN))
4828     {
4829         MVD_DEBUGINFO(MVD_PRINT("GetFrmInfo not ready!\n"));
4830         return E_MVD_RET_FAIL;
4831     }
4832 
4833     _miu_offset_to_phy(pMVDHalContext->stMiuCfg.u8FBMiuSel,(pInfo->u32LumaAddr * 8),pInfo->u32LumaAddr);
4834     _miu_offset_to_phy(pMVDHalContext->stMiuCfg.u8FBMiuSel,(pInfo->u32ChromaAddr * 8),pInfo->u32ChromaAddr);
4835 
4836     //MVD_PRINT("===> Luma=0x%x, Chroma=0x%x\n", pInfo->u32LumaAddr, pInfo->u32ChromaAddr);
4837     return eRet;
4838 }
4839 
4840 
4841 
HAL_MVD_SetDynScalingParam(MS_U8 u8Idx,MS_PHY u32StAddr,MS_SIZE u32Size)4842 E_MVD_Result HAL_MVD_SetDynScalingParam(MS_U8 u8Idx, MS_PHY u32StAddr, MS_SIZE u32Size)
4843 {
4844     #define SCALER_INFO_TIMEOUT 0x1000
4845     MS_U32 u32TimeOut = 0;
4846     MS_VIRT u32SrcAdd = NULL;
4847     MS_U32 i;
4848     MS_VIRT u32ScalerInfoAdd = GET_XCINFO_BUFFADD(u8Idx);
4849     MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
4850 
4851     if ((u32StAddr==NULL) || (u32Size==0) || (u32Size>MVD_FW_SCALER_INFO_BUF_LEN))
4852     {
4853         MVD_DEBUGERROR(MVD_PRINT("%s invalid para u32StAddr=0x%lx, u32Size=0x%lx\n",
4854                        __FUNCTION__, (unsigned long)u32StAddr, (unsigned long)u32Size));
4855         return E_MVD_RET_INVALID_PARAM;
4856     }
4857     if (TRUE != pstMemCfg->bEnableDynScale)
4858     {
4859         MVD_DEBUGERROR(MVD_PRINT("%s !bEnableDynScale\n", __FUNCTION__));
4860         return E_MVD_RET_FAIL;
4861     }
4862 
4863     //copy data
4864     u32SrcAdd = HAL_MVD_PA2NonCacheSeg(u32StAddr);
4865     u32Size = ((u32Size+3)>>2)<<2;
4866     MVD_DEBUGINFO(MVD_PRINT("u32Size= 0x%lx, u32SrcAdd= 0x%lx\n", (unsigned long)u32Size, (unsigned long)u32SrcAdd));
4867     for (i=0; i<u32Size; i=i+4)
4868     {
4869         HAL_MVD_MemWrite4Byte(u32ScalerInfoAdd+i, *(volatile MS_U32*)(u32SrcAdd+i));
4870         MVD_DEBUGINFO(MVD_PRINT("0x%lx = 0x%x\n", (unsigned long)(u32ScalerInfoAdd+i), HAL_MVD_MemRead4Byte(u32ScalerInfoAdd+i)));
4871     }
4872 
4873     //notify f/w
4874     HAL_MVD_ResetHandShake(u8Idx, MVD_HANDSHAKE_SCALER_INFO);
4875     if (TRUE!=HAL_MVD_SetScalerInfoAddr(u8Idx, u32ScalerInfoAdd,((MS_U8*)u32SrcAdd)[0])) //Set the buffer address (MIU offset) to f/w
4876     {
4877         MVD_DEBUGERROR(MVD_PRINT("%s fail to set ScalerInfoAdd\n", __FUNCTION__));
4878         return E_MVD_RET_FAIL;
4879     }
4880 
4881     //check f/w already handle the data
4882     while((TRUE!=HAL_MVD_IsCmdFinished(u8Idx, MVD_HANDSHAKE_SCALER_INFO)) && (u32TimeOut < SCALER_INFO_TIMEOUT))
4883     {
4884         u32TimeOut++;
4885     }
4886     if(u32TimeOut >= SCALER_INFO_TIMEOUT)
4887     {
4888         MVD_DEBUGERROR(MVD_PRINT("%s timeout!!!\n", __FUNCTION__));
4889         return E_MVD_RET_FAIL;
4890     }
4891 
4892     //clear ack bit
4893     HAL_MVD_ClearCmdFinished(u8Idx, MVD_HANDSHAKE_SCALER_INFO);
4894 
4895     MVD_DEBUGINFO(MVD_PRINT("=====> %s u32TimeOut = 0x%x\n", __FUNCTION__, u32TimeOut));
4896     return E_MVD_RET_OK;
4897 }
4898 
4899 //Map driver CodecType to firmware CodecType
MVD_MapCodecType(MVD_CodecType type)4900 static MS_U8 MVD_MapCodecType(MVD_CodecType type)
4901 {
4902     MS_U8 u8type = 0xff;
4903     switch (type)
4904     {
4905         case E_MVD_CODEC_MPEG2:
4906             u8type = CODEC_MPEG2;
4907             break;
4908         case E_MVD_CODEC_MPEG4:
4909             u8type = CODEC_MPEG4;
4910             break;
4911         case E_MVD_CODEC_MPEG4_SHORT_VIDEO_HEADER:
4912             u8type = CODEC_MPEG4_SHORT_VIDEO_HEADER;
4913             break;
4914         case E_MVD_CODEC_DIVX311:
4915             u8type = CODEC_DIVX311;
4916             break;
4917 
4918         case E_MVD_CODEC_FLV:
4919             u8type = 0x03;
4920             break;
4921 
4922         case E_MVD_CODEC_VC1_MAIN: //RCV
4923             u8type = 0x05;
4924             break;
4925 
4926         case E_MVD_CODEC_VC1_ADV:  //VC1
4927             u8type = 0x04;
4928             break;
4929 
4930         default:
4931             break;
4932     }
4933 
4934     return u8type;
4935 }
4936 
4937 //Map driver SrcType to firmware SrcType
MVD_MapSrcMode(MVD_SrcMode mode)4938 static MS_U8 MVD_MapSrcMode(MVD_SrcMode mode)
4939 {
4940     MS_U8 u8mode = 0xff;
4941     switch (mode)
4942     {
4943         case E_MVD_TS_MODE:
4944             u8mode = STREAM_MODE;
4945             break;
4946         case E_MVD_FILE_MODE:
4947             u8mode = FILE_MODE;
4948             break;
4949         case E_MVD_SLQ_MODE:
4950             u8mode = SLQ_MODE;
4951             break;
4952         case E_MVD_SLQ_TBL_MODE:
4953             u8mode = SLQ_TBL_MODE;
4954             break;
4955         case E_MVD_TS_FILE_MODE:
4956             u8mode = TS_FILE_MODE;
4957             break;
4958 
4959         default:
4960             break;
4961     }
4962 
4963     return u8mode;
4964 }
4965 
4966 
MVD_CheckFrmBuffSizeMin(MVD_FWCfg * fwCfg,MVD_MEMCfg * memCfg)4967 static MS_BOOL MVD_CheckFrmBuffSizeMin(MVD_FWCfg* fwCfg, MVD_MEMCfg* memCfg)
4968 {
4969     MS_BOOL ret = TRUE;
4970 
4971     if (_IS_VC1(fwCfg->eCodecType))
4972     {
4973         MVD_DEBUGERROR(MVD_PRINT("Framebuffer size(0x%lx) < (0x%x+0x%lx)!\n",
4974             (unsigned long)memCfg->u32FBSize, (MVD_HD_FBSIZE*MVD_FBNUM_MIN), MVD_HW_BUF_TOTAL_LEN));
4975         ret = FALSE;
4976     }
4977     else if (memCfg->u32FBSize < (MVD4_MPEG_FBSIZE_SDMIN+MVD_HW_BUF_TOTAL_LEN))
4978     {
4979         MVD_DEBUGERROR(MVD_PRINT("Framebuffer size(0x%lx) < (0x%x+0x%lx)\n",
4980             (unsigned long)memCfg->u32FBSize, MVD4_MPEG_FBSIZE_SDMIN, MVD_HW_BUF_TOTAL_LEN));
4981         ret = FALSE;
4982     }
4983     return ret;
4984 }
4985 
MVD_GetUsedFrmBuffSize(MS_U8 u8FBMode,MS_U8 u8FBNum)4986 MS_U32 MVD_GetUsedFrmBuffSize(MS_U8 u8FBMode, MS_U8 u8FBNum)
4987 {
4988     MS_U32 u32Size = 0;
4989     if (MVD3_DHD_MODE == u8FBMode)
4990     {
4991         u32Size = MVD_DHD_FBSIZE;
4992         if (MVD_FBNUM_MAX == u8FBNum)
4993         {
4994             u32Size *= MVD_FBNUM_MAX;
4995         }
4996         else if (MVD_FBNUM_MIN == u8FBNum)
4997         {
4998             u32Size *= MVD_FBNUM_MIN;
4999         }
5000     }
5001     else if (MVD3_HD_MODE == u8FBMode)
5002     {
5003         u32Size = MVD_HD_FBSIZE;
5004         if (MVD_FBNUM_MAX == u8FBNum)
5005         {
5006             u32Size *= MVD_FBNUM_MAX;
5007         }
5008         else if (MVD_FBNUM_MIN == u8FBNum)
5009         {
5010             u32Size *= MVD_FBNUM_MIN;
5011         }
5012     }
5013     else if (MVD3_SD_MODE == u8FBMode)
5014     {
5015         u32Size = MVD4_MPEG_FBSIZE_SDMIN;
5016     }
5017     return u32Size;
5018 }
5019 
5020 //------------------------------------------------------------------------------
5021 /// Determine u8FBMode & u8FBNum according to the assigned FBSize
5022 //------------------------------------------------------------------------------
HAL_MVD_CheckFrmBuffSize(MS_U8 u8Idx,MVD_FWCfg * fwCfg,MVD_MEMCfg * memCfg)5023 MS_BOOL HAL_MVD_CheckFrmBuffSize(MS_U8 u8Idx, MVD_FWCfg* fwCfg, MVD_MEMCfg* memCfg)
5024 {
5025     MS_BOOL ret = TRUE;
5026     MS_U8* pu8FBMode = &(fwCfg->u8FBMode);
5027     MS_U8* pu8FBNum  = &(fwCfg->u8FBNum);
5028     MS_U32 u32AvailFrmBuffSize = memCfg->u32FBSize - MVD_HW_BUF_TOTAL_LEN;
5029 
5030     ret = MDrv_MVD_AUTH_IPCheck(fwCfg->eCodecType,&(memCfg->bSupportSDModeOnly));
5031     if(ret == FALSE)
5032     {
5033         return FALSE;
5034     }
5035 
5036     *pu8FBMode = 0xff;
5037 
5038 #if defined(MVD_SUPPORT_SD_ONLY)
5039     *pu8FBMode = MVD3_SD_MODE;
5040 #else
5041     if(memCfg->bSupportSDModeOnly)
5042     {
5043         *pu8FBMode = MVD3_SD_MODE;
5044     }
5045 #endif //MVD_SUPPORT_SD_ONLY
5046 
5047     //For SD only cases: defined(MVD_SUPPORT_SD_ONLY) and bSupportSDModeOnly
5048     if (MVD3_SD_MODE == *pu8FBMode)
5049     {
5050         ret = MVD_CheckFrmBuffSizeMin(fwCfg, memCfg);
5051 
5052         //set frmBuffNum as 4
5053         *pu8FBNum = MVD_FBNUM_MIN;
5054         MVD_DEBUGINFO(MVD_PRINT("[MVD_SD_MODE] u8FBNum=%d, FBSize=0x%lx\n", *pu8FBNum, (unsigned long)memCfg->u32FBSize));
5055         goto _GET_USED_SIZE;
5056     }
5057 
5058     if (u32AvailFrmBuffSize >= (MVD_DHD_FBSIZE*MVD_FBNUM_MAX))
5059     {
5060         MVD_DEBUGINFO(MVD_PRINT("%s(%d) DHD*5\n", __FUNCTION__, __LINE__));
5061         //Dual HD: (1920*2)*1088 or 1920*(1088*2)
5062         if (!_IS_VC1(fwCfg->eCodecType)) //mpeg2/4
5063         {
5064             *pu8FBMode = MVD3_DHD_MODE;
5065         }
5066         else
5067         {
5068             *pu8FBMode = MVD3_DHD_MODE_MIN;
5069         }
5070         *pu8FBNum = MVD_FBNUM_MAX;
5071     }
5072     else if (u32AvailFrmBuffSize >= (MVD_DHD_FBSIZE*MVD_FBNUM_MIN))
5073     {
5074         MVD_DEBUGINFO(MVD_PRINT("%s(%d) DHD*4\n", __FUNCTION__, __LINE__));
5075         //Dual HD: (1920*2)*1088 or 1920*(1088*2)
5076         if (!_IS_VC1(fwCfg->eCodecType)) //mpeg2/4
5077         {
5078             *pu8FBMode = MVD3_DHD_MODE;
5079         }
5080         else
5081         {
5082             *pu8FBMode = MVD3_DHD_MODE_MIN;
5083         }
5084         *pu8FBNum = MVD_FBNUM_MIN;
5085     }
5086     else if (u32AvailFrmBuffSize >= (MVD_HD_FBSIZE*MVD_FBNUM_MAX))
5087     {
5088         MVD_DEBUGINFO(MVD_PRINT("%s(%d) HD*5\n", __FUNCTION__, __LINE__));
5089         *pu8FBMode = MVD3_HD_MODE;
5090         *pu8FBNum = MVD_FBNUM_MAX;
5091     }
5092     else if (u32AvailFrmBuffSize >= (MVD_HD_FBSIZE*MVD_FBNUM_MIN))
5093     {
5094         MVD_DEBUGINFO(MVD_PRINT("%s(%d) HD*4\n", __FUNCTION__, __LINE__));
5095         *pu8FBMode = MVD3_HD_MODE;
5096         *pu8FBNum = MVD_FBNUM_MIN;
5097     }
5098     else
5099     {
5100         MVD_DEBUGINFO(MVD_PRINT("%s(%d) SD\n", __FUNCTION__, __LINE__));
5101         ret = MVD_CheckFrmBuffSizeMin(fwCfg, memCfg);
5102         if (TRUE == ret)
5103         {
5104             *pu8FBMode = MVD3_SD_MODE;
5105             *pu8FBNum = MVD_FBNUM_MIN;
5106             MVD_DEBUGINFO(MVD_PRINT("Framebuffer [SD] mode\n"));
5107         }
5108     }
5109 
5110 
5111     //Keep FBNum=4 for mpeg2/4, not-mstreamer/uniplayer/mcu mode.
5112     if (!_IS_VC1(fwCfg->eCodecType)) //mpeg2/4
5113     {
5114         if (*pu8FBNum != MVD_FBNUM_DEFAULT)
5115         {
5116             *pu8FBNum = MVD_FBNUM_DEFAULT;
5117         }
5118     }
5119 
5120 _GET_USED_SIZE:
5121     fwCfg->u32FBUsedSize = u32AvailFrmBuffSize;
5122 
5123     MVD_DEBUGINFO(MVD_PRINT("%s u8FBMode=0x%x, u8FBNum=%d, FBSize=0x%lx, used=0x%lx\n",
5124                   __FUNCTION__, fwCfg->u8FBMode, fwCfg->u8FBNum, (unsigned long)memCfg->u32FBSize, (unsigned long)fwCfg->u32FBUsedSize));
5125     return ret;
5126 }
5127 
HAL_MVD_SetCodecInfo(MS_U8 u8Idx,MVD_CodecType eCodecType,MVD_SrcMode eSrcMode,MS_U8 bDisablePESParsing,MS_U8 u8ChipECORev)5128 MS_BOOL HAL_MVD_SetCodecInfo(MS_U8 u8Idx, MVD_CodecType eCodecType, MVD_SrcMode eSrcMode, MS_U8 bDisablePESParsing, MS_U8 u8ChipECORev)
5129 {
5130     MVD_CmdArg stCmdArg;
5131     //MVD_PRINT("u8CodecType=0x%x\n", u8CodecType);
5132     //MVD_PRINT("eSrcMode=0x%x\n", eSrcMode);
5133     SETUP_CMDARG(stCmdArg);
5134     stCmdArg.Arg0 = MVD_MapCodecType(eCodecType);
5135     stCmdArg.Arg1 = MVD_MapSrcMode(eSrcMode);
5136     stCmdArg.Arg2 = bDisablePESParsing;
5137     //arg2 is only valid for STREAM_MODE and TS_FILE_MODE
5138     //set as 0 to enable MVD parser and parser interrupt
5139     stCmdArg.Arg3 = 0;
5140     stCmdArg.Arg4 = u8ChipECORev;
5141     MVD_DEBUGINFO(MVD_PRINT("MDrv_MVD_SetCodecInfo: Cmd: %x, Arg0: %x, Arg1: %x. Arg2: %x\n",
5142                   CMD_CODEC_INFO, stCmdArg.Arg0, stCmdArg.Arg1, stCmdArg.Arg2));
5143     SET_DECNUM(stCmdArg, u8Idx);
5144     SET_CMD_RET_FALSE(CMD_CODEC_INFO, &stCmdArg);
5145 
5146     HAL_MVD_SetSrcMode(u8Idx,eSrcMode);
5147 
5148     //set code offset to MVD
5149     MS_VIRT u32Addr, u32Len;
5150     HAL_MVD_MemGetMap(u8Idx, E_MVD_MMAP_FW, &u32Addr, &u32Len);
5151 
5152     if (u32Len==0) MVD_PRINT("%s err: u32Len=0!\n", __FUNCTION__);
5153     MS_U32 i=0;
5154     i = u32Addr >> 3;
5155     SET_CMDARG(stCmdArg, i, u8Idx);
5156     SET_CMD_RET_FALSE(CMD_CODE_OFFSET, &stCmdArg);
5157 
5158     #define _mvdAssert(x) if(!x) MVD_PRINT("%s(%d) inconsistent cfg!\n", __FUNCTION__, __LINE__);
5159     MVD_FWCfg* pCurFwCfg = HAL_MVD_GetFWCfg(u8Idx);
5160     _mvdAssert(pCurFwCfg->eCodecType == eCodecType);
5161     _mvdAssert(pCurFwCfg->eSrcMode == eSrcMode);
5162     _mvdAssert(pCurFwCfg->bDisablePESParsing == bDisablePESParsing);
5163 
5164     //Refer to msAPI_VDPlayer_DecodeMPEG4.c (core\kernel\api\videoplayer)
5165     if (eSrcMode == E_MVD_SLQ_TBL_MODE)
5166     {
5167         if ((eCodecType == E_MVD_CODEC_MPEG4) ||
5168             (eCodecType == E_MVD_CODEC_DIVX311) ||
5169             (eCodecType == E_MVD_CODEC_MPEG4_SHORT_VIDEO_HEADER))
5170         {
5171             // Enable PackMode
5172             SETUP_CMDARG(stCmdArg);
5173             stCmdArg.Arg0 = 3;
5174             SET_DECNUM(stCmdArg, u8Idx);
5175             if (HAL_MVD_MVDCommand( CMD_PARSE_M4V_PACKMD, &stCmdArg ) == FALSE)
5176             {
5177                 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_PARSE_M4V_PACKMD ) );
5178                 return FALSE;
5179             }
5180 
5181             // Set DIU width of rounding mode (align to 8byte)
5182             SETUP_CMDARG(stCmdArg);
5183             stCmdArg.Arg0 = 1;
5184             SET_DECNUM(stCmdArg, u8Idx);
5185             if (HAL_MVD_MVDCommand(CMD_DIU_WIDTH_ALIGN, &stCmdArg) == FALSE)
5186             {
5187                 MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_DIU_WIDTH_ALIGN ) );
5188                 return FALSE;
5189             }
5190         }
5191     }
5192 
5193     //set internal buffers after setting codecinfo for V3
5194     if (!HAL_MVD_SetInternalBuffAddr(u8Idx, u32Addr, u32Len))
5195     {
5196         MVD_DEBUGERROR(MVD_PRINT("MDrv_MVD_Init:_MVD_MVDSetInternalBuffAddr failed\n"));
5197         return FALSE;
5198     }
5199     else
5200     {
5201         MVD_DEBUGINFO(MVD_PRINT("MDrv_MVD_Init:_MVD_MVDSetInternalBuffAddr success\n"));
5202     }
5203 
5204     return TRUE;
5205 }
5206 
MVD_GetBDMAType(void)5207 BDMA_CpyType MVD_GetBDMAType(void)
5208 {
5209     BDMA_CpyType bdmaCpyType = E_BDMA_CPYTYPE_MAX;
5210 
5211     if (pMVDHalContext->stMiuCfg.u8HWMiuSel == MIU_SEL_0)
5212     {
5213         if (pMVDHalContext->stMiuCfg.u8FWMiuSel == MIU_SEL_0)
5214         {
5215             bdmaCpyType = E_BDMA_SDRAM2SDRAM;
5216         }
5217         else if (pMVDHalContext->stMiuCfg.u8FWMiuSel == MIU_SEL_1)
5218         {
5219             bdmaCpyType = E_BDMA_SDRAM2SDRAM1;
5220         }
5221         else if (pMVDHalContext->stMiuCfg.u8FWMiuSel == MIU_SEL_2)
5222         {
5223             bdmaCpyType = E_BDMA_SDRAM2SDRAM2;
5224         }
5225         else if (pMVDHalContext->stMiuCfg.u8FWMiuSel == MIU_SEL_3)
5226         {
5227             bdmaCpyType = E_BDMA_SDRAM2SDRAM3;
5228         }
5229         else
5230         {
5231             MS_ASSERT(0);
5232         }
5233     }
5234     else if (pMVDHalContext->stMiuCfg.u8HWMiuSel == MIU_SEL_1)
5235     {
5236         if (pMVDHalContext->stMiuCfg.u8FWMiuSel == MIU_SEL_0)
5237         {
5238             bdmaCpyType = E_BDMA_SDRAM12SDRAM;
5239         }
5240         else if (pMVDHalContext->stMiuCfg.u8FWMiuSel == MIU_SEL_1)
5241         {
5242             bdmaCpyType = E_BDMA_SDRAM12SDRAM1;
5243         }
5244         else if (pMVDHalContext->stMiuCfg.u8FWMiuSel == MIU_SEL_2)
5245         {
5246             bdmaCpyType = E_BDMA_SDRAM12SDRAM2;
5247         }
5248         else if (pMVDHalContext->stMiuCfg.u8FWMiuSel == MIU_SEL_3)
5249         {
5250             bdmaCpyType = E_BDMA_SDRAM12SDRAM3;
5251         }
5252         else
5253         {
5254             MS_ASSERT(0);
5255         }
5256     }
5257     else if (pMVDHalContext->stMiuCfg.u8HWMiuSel == MIU_SEL_2)
5258     {
5259         if (pMVDHalContext->stMiuCfg.u8FWMiuSel == MIU_SEL_0)
5260         {
5261             bdmaCpyType = E_BDMA_SDRAM22SDRAM;
5262         }
5263         else if (pMVDHalContext->stMiuCfg.u8FWMiuSel == MIU_SEL_1)
5264         {
5265             bdmaCpyType = E_BDMA_SDRAM22SDRAM1;
5266         }
5267         else if (pMVDHalContext->stMiuCfg.u8FWMiuSel == MIU_SEL_2)
5268         {
5269             bdmaCpyType = E_BDMA_SDRAM22SDRAM2;
5270         }
5271         else if (pMVDHalContext->stMiuCfg.u8FWMiuSel == MIU_SEL_3)
5272         {
5273             bdmaCpyType = E_BDMA_SDRAM22SDRAM3;
5274         }
5275         else
5276         {
5277             MS_ASSERT(0);
5278         }
5279     }
5280     else if (pMVDHalContext->stMiuCfg.u8HWMiuSel == MIU_SEL_3)
5281     {
5282         if (pMVDHalContext->stMiuCfg.u8FWMiuSel == MIU_SEL_0)
5283     {
5284             bdmaCpyType = E_BDMA_SDRAM32SDRAM;
5285         }
5286         else if (pMVDHalContext->stMiuCfg.u8FWMiuSel == MIU_SEL_1)
5287         {
5288             bdmaCpyType = E_BDMA_SDRAM32SDRAM1;
5289         }
5290         else if (pMVDHalContext->stMiuCfg.u8FWMiuSel == MIU_SEL_2)
5291         {
5292             bdmaCpyType = E_BDMA_SDRAM32SDRAM2;
5293         }
5294         else if (pMVDHalContext->stMiuCfg.u8FWMiuSel == MIU_SEL_3)
5295         {
5296             bdmaCpyType = E_BDMA_SDRAM32SDRAM3;
5297         }
5298         else
5299         {
5300             MS_ASSERT(0);
5301         }
5302     }
5303     else
5304     {
5305         MS_ASSERT(0);
5306     }
5307 
5308     return bdmaCpyType;
5309 }
5310 
5311 //Init static variables.
5312 //Exception: stMemCfg & stMiuCfg since they are set before calling this function.
HAL_MVD_InitVar(MS_U8 u8Idx)5313 void HAL_MVD_InitVar(MS_U8 u8Idx)
5314 {
5315     MVD_MEMCfg*  pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
5316     MVD_CtrlCfg* pstCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
5317     MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
5318 
5319     memset(pstCtrlCfg, 0, sizeof(MVD_CtrlCfg));
5320     pstCtrlCfg->eTrickMode = E_MVD_TRICK_DEC_ALL;
5321     pstCtrlCfg->eFrcMode = E_MVD_FRC_NORMAL;
5322     pstCtrlCfg->ePreSpeedType = E_MVD_SPEED_DEFAULT;
5323     pstCtrlCfg->eFileSyncMode = E_MVD_TIMESTAMP_FREERUN;
5324 
5325     //determine if we need to BDMA SLQ table from DrvProcBuff to BitstreamBuff
5326 #ifndef MSOS_TYPE_LINUX_KERNEL//BDMA
5327     pstCtrlCfg->bSlqTblSync = ((pstMemCfg->u32DrvBufAddr < pstMemCfg->u32BSAddr) ||
5328                    ((pstMemCfg->u32DrvBufAddr+pstMemCfg->u32DrvBufSize) > (pstMemCfg->u32BSAddr+pstMemCfg->u32BSSize)));
5329     MVD_DEBUGINFO(MVD_PRINT("bSlqTblSync = %x\n", pstCtrlCfg->bSlqTblSync));
5330     if (pstCtrlCfg->bSlqTblSync)
5331     {
5332         const BDMA_Info* pBDMA;
5333         pBDMA = MDrv_BDMA_GetInfo();
5334         if ((pBDMA == NULL) || (pBDMA->bInit != TRUE))
5335         {
5336             if (E_BDMA_OK != MDrv_BDMA_Init(pstMemCfg->u32Miu1BaseAddr))
5337             {
5338                 MVD_PRINT("%s fail at MDrv_BDMA_Init!!!\n", __FUNCTION__);
5339             }
5340         }
5341         pstSlqTblInfo->bdmaCpyType = MVD_GetBDMAType();
5342     }
5343 #else
5344     pstCtrlCfg->bSlqTblSync = 0;
5345 #endif
5346     memset(pstSlqTblInfo, 0, sizeof(MVD_SLQTBLInfo));
5347     pstSlqTblInfo->u32LastPts = MVD_NULLPKT_PTS;
5348     pstSlqTblInfo->u32PreEsRd = MVD_U32_MAX;
5349     pstSlqTblInfo->u32PreEsWr = 0;
5350     pstSlqTblInfo->pSlqStatus = &(pMVDHalContext->_SlqStatus[u8Idx]);
5351     pstSlqTblInfo->pDrvSlqTbl = &(pMVDHalContext->_drvSlqTbl[u8Idx]);
5352     pstSlqTblInfo->pDrvEsTbl = &(pMVDHalContext->_drvEsTbl[u8Idx]);
5353     pstSlqTblInfo->pDrvDivxTbl = &(pMVDHalContext->_drvDivxTbl[u8Idx]);
5354 #if SLQ_NEW_PUSH
5355     pstSlqTblInfo->pSlqStatus->u32SlqPatternAddr = 0;
5356     pstSlqTblInfo->pSlqStatus->u32SlqPushLength = 0;
5357     pstSlqTblInfo->pSlqStatus->bSlqPicStart = FALSE;
5358     pstSlqTblInfo->pSlqStatus->bSlqPicCollect = FALSE;
5359     pstSlqTblInfo->pSlqStatus->bSlqPicWaitNextStart = FALSE;
5360     pstSlqTblInfo->pSlqStatus->bSlqEnLastFrameShow =FALSE;
5361     pstSlqTblInfo->pSlqStatus->bSlqFireRdy = FALSE;
5362     pstSlqTblInfo->pSlqStatus->bSlqCtrlBit =FALSE;
5363 #endif
5364 }
5365 
5366 //------------------------------------------------------------------------------
5367 /// Issue Stop command.
5368 //------------------------------------------------------------------------------
HAL_MVD_Stop(MS_U8 u8Idx)5369 MS_BOOL HAL_MVD_Stop(MS_U8 u8Idx)
5370 {
5371     MVD_CmdArg mvdcmd;
5372     MS_BOOL bRet = TRUE;
5373 
5374     #define STOP_TIMEOUT 500 //ms
5375     MS_U32 u32StartTime = 0;
5376     u32StartTime = HAL_MVD_GetTime();
5377 
5378     SETUP_CMDARG(mvdcmd);
5379     SET_DECNUM(mvdcmd, u8Idx);
5380     HAL_MVD_ResetHandShake(u8Idx, MVD_HANDSHAKE_STOP);
5381 
5382     if (HAL_MVD_MVDCommand(CMD_STOP, &mvdcmd) == FALSE)
5383     {
5384         MVD_DEBUGERROR(MVD_PRINT("Command: 0x%x fail!!\r\n", CMD_STOP));
5385         HAL_MVD_Delayms(1);
5386         if ( HAL_MVD_TimeOut(u8Idx) == TRUE )
5387         {
5388             MVD_DEBUGERROR(MVD_PRINT("*** MVD ERR: STOP TIMEOUT!!! ***\n"));
5389         }
5390     }
5391 
5392     while(!HAL_MVD_IsCmdFinished(u8Idx, MVD_HANDSHAKE_STOP))
5393     {
5394         if ((HAL_MVD_GetTime()-u32StartTime)>STOP_TIMEOUT)
5395         {
5396             MVD_DEBUGERROR( MVD_PRINT( "Ctrl: 0x%x fail timeout!!\r\n", CMD_STOP ) );
5397             break;
5398         }
5399     }
5400 
5401     pMVDHalContext->bStopped[u8Idx] = TRUE;
5402     return bRet;
5403 }
5404 
HAL_MVD_DeinitHW(MS_U32 u32Id,VPU_EX_SourceType SourceType,VPU_EX_DecoderType eDecType)5405 MS_BOOL HAL_MVD_DeinitHW(MS_U32 u32Id, VPU_EX_SourceType SourceType, VPU_EX_DecoderType eDecType)
5406 {
5407     //MVD HW reset
5408     if (!HAL_MVD_RstHW(u32Id))
5409     {
5410         MVD_DEBUGERROR(MVD_PRINT("MDrv_MVD_Exit:MVD4ResetHW failed\n"));
5411     }
5412     else
5413     {
5414         MVD_DEBUGINFO(MVD_PRINT("MDrv_MVD_Exit:MVD4ResetHW success\n"));
5415     }
5416 
5417     HAL_MVD_PowerCtrl(DISABLE);
5418 #ifdef CONFIG_MSTAR_CLKM
5419     if(eDecType == E_VPU_EX_DECODER_MVD)
5420     {
5421         HAL_VPU_EX_SetClkManagement(E_VPU_EX_CLKPORT_MVD_CORE, DISABLE);
5422     }
5423     if(SourceType == E_VPU_EX_INPUT_TSP)
5424     {
5425         HAL_VPU_EX_SetClkManagement(E_VPU_EX_CLKPORT_MVD_PAS, DISABLE);
5426     }
5427 #endif
5428 
5429 #ifdef CONFIG_MSTAR_SRAMPD
5430     HAL_MVD_RegWriteBit(REG_CODEC_SRAM_SD_EN, DISABLE, SRAM_SD_EN_MVD);
5431     HAL_MVD_Delayms(1);
5432 #endif
5433     return TRUE;
5434 }
5435 
HAL_MVD_Exit(MS_U8 u8Idx)5436 MS_BOOL HAL_MVD_Exit(MS_U8 u8Idx)
5437 {
5438     MVD_DEBUGINFO(MVD_PRINT("MDrv_MVD_Exit:start\n"));
5439 
5440     HAL_MVD_SetIsUsed(u8Idx, FALSE);
5441     pMVDHalContext->bAutoInsertDummyPattern[u8Idx] = FALSE;
5442     pMVDHalContext->bDropOnePTS[u8Idx] = FALSE;
5443     pMVDHalContext->u32DmxFrameRate[u8Idx] = 0;
5444     pMVDHalContext->u32DmxFrameRateBase[u8Idx] = 0;
5445     pMVDHalContext->bTrickPlay2xAVSync[u8Idx] = FALSE;
5446 
5447     return TRUE;
5448 }
5449 
5450 
5451 //------------------------------------------------------------------------------
5452 /// Set DivX311 stream info.
5453 /// @param divxInfo \b IN : DivX311 stream info.
5454 //------------------------------------------------------------------------------
MVD_WriteDivx311Data(MS_U8 u8Idx,FW_DIVX_INFO * divxInfo)5455 static void MVD_WriteDivx311Data(MS_U8 u8Idx, FW_DIVX_INFO *divxInfo)
5456 {
5457     MS_VIRT pu8MVDSetHeaderBufStart = GET_HDR_BUFFADD(u8Idx);
5458     HAL_MVD_MemWrite4Byte(pu8MVDSetHeaderBufStart+OFFSET_DIVX_VOL_HANDLE_DONE,divxInfo->vol_handle_done);
5459     HAL_MVD_MemWrite4Byte(pu8MVDSetHeaderBufStart+OFFSET_DIVX_WIDTH,divxInfo->width);
5460     HAL_MVD_MemWrite4Byte(pu8MVDSetHeaderBufStart+OFFSET_DIVX_HEIGHT,divxInfo->height);
5461     HAL_MVD_MemWrite4Byte(pu8MVDSetHeaderBufStart+OFFSET_DIVX_FRAME_COUNT,divxInfo->frame_count);
5462     HAL_MVD_MemWrite4Byte(pu8MVDSetHeaderBufStart+OFFSET_DIVX_FRAME_TIME,divxInfo->frame_time);
5463     HAL_MVD_MemWrite2Byte(pu8MVDSetHeaderBufStart+OFFSET_DIVX_PTS_INCR,divxInfo->pts_incr);
5464     HAL_MVD_MemWrite4Byte(pu8MVDSetHeaderBufStart+OFFSET_DIVX_FRAME_RATE,divxInfo->frame_rate);
5465     HAL_MVD_MemWriteByte(pu8MVDSetHeaderBufStart+OFFSET_DIVX_ASPECT_RATIO,divxInfo->aspect_ratio);
5466     HAL_MVD_MemWriteByte(pu8MVDSetHeaderBufStart+OFFSET_DIVX_PROGRESSIVE_SEQUENCE,divxInfo->progressive_sequence);
5467     HAL_MVD_MemWriteByte(pu8MVDSetHeaderBufStart+OFFSET_DIVX_MPEG1,divxInfo->mpeg1);
5468     HAL_MVD_MemWriteByte(pu8MVDSetHeaderBufStart+OFFSET_DIVX_PLAY_MODE,divxInfo->play_mode);
5469     HAL_MVD_MemWriteByte(pu8MVDSetHeaderBufStart+OFFSET_DIVX_MPEG_FRC_MODE,divxInfo->mpeg_frc_mode);
5470     return;
5471 }
5472 
HAL_MVD_SetFrameInfo(MS_U8 u8Idx,MVD_FrameInfo * pinfo)5473 void HAL_MVD_SetFrameInfo(MS_U8 u8Idx, MVD_FrameInfo *pinfo )
5474 {
5475     if (GET_HDR_BUFFADD(u8Idx)==0)
5476     {
5477         MVD_DEBUGERROR(MVD_PRINT("MDrv_MVD_SetFrameInfo error: pu8MVDSetHeaderBufStart=NULL\n"));
5478         return;
5479     }
5480 
5481     FW_DIVX_INFO* pDivxInfo = &(pMVDHalContext->gdivxInfo[u8Idx]);
5482     pDivxInfo->width=pinfo->u16HorSize;
5483     pDivxInfo->height=pinfo->u16VerSize;
5484     pDivxInfo->aspect_ratio=pinfo->u8AspectRate;
5485     pDivxInfo->frame_rate = pinfo->u32FrameRate;
5486 
5487     //for MM
5488     pDivxInfo->mpeg1=pinfo->u8MPEG1;
5489     pDivxInfo->pts_incr=pinfo->u16PTSInterval;
5490     pDivxInfo->play_mode=pinfo->u8PlayMode;
5491     pDivxInfo->mpeg_frc_mode=pinfo->u8FrcMode;
5492 
5493     if(pinfo->u8Interlace==0)
5494         pDivxInfo->progressive_sequence=1;
5495     else
5496         pDivxInfo->progressive_sequence=0;
5497 
5498     pDivxInfo->frame_count=0;
5499     pDivxInfo->frame_time=0;
5500     pDivxInfo->vol_handle_done=0;
5501 //    pDivxInfo->invalidstream=0;
5502     MVD_DEBUGINFO(MVD_PRINT("set vol info,pts_incr=%d,\n",pDivxInfo->pts_incr));
5503     MVD_DEBUGINFO(MVD_PRINT("set vol info,width=%x,height=%x,frame_rate=%d,aspect_ratio=%x,\n",
5504                   (unsigned int)pDivxInfo->width,(unsigned int)pDivxInfo->height,pDivxInfo->frame_rate,pDivxInfo->aspect_ratio));
5505     MVD_DEBUGINFO(MVD_PRINT("set vol info,progressive_sequence=%x,mpeg1=%x,play_mode=%x,\n",
5506                   pDivxInfo->progressive_sequence,pDivxInfo->mpeg1,pDivxInfo->play_mode));
5507 
5508     MVD_WriteDivx311Data(u8Idx, pDivxInfo);
5509     return;
5510 }
5511 
5512 
5513 
5514 ///////////////////////////////////////////////////////////////////////////////
5515 /// Get Hardware Pointer of MVD CC Ring Buffer
5516 /// Return value:: The HW Pointer Address of MVD CC Ring Buffer
5517 /// @param u8CC608 \b IN
5518 ///   - # TRUE for CC608 parser
5519 ///   - # FALSE for CC708 parser
5520 ///////////////////////////////////////////////////////////////////////////////
HAL_CC_CM_GetMVDRB_HWAddr(MS_U8 u8CC608)5521 MS_VIRT HAL_CC_CM_GetMVDRB_HWAddr(MS_U8 u8CC608)
5522 {
5523 #if 1
5524     MVD_CmdArg mvdcmd;
5525     MS_VIRT u32CCWrPtr = 0;
5526 
5527     SETUP_CMDARG(mvdcmd);
5528     mvdcmd.Arg3 = u8CC608;
5529     if (HAL_MVD_MVDCommand( CMD_RD_USER_WP, &mvdcmd ) == FALSE)
5530     {
5531         MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_RD_USER_WP ) );
5532         return MVD_U32_MAX;
5533     }
5534     u32CCWrPtr = COMBU32(mvdcmd.Arg3, mvdcmd.Arg2, mvdcmd.Arg1, mvdcmd.Arg0) << 3;
5535     return u32CCWrPtr;
5536 #else
5537     MS_U32 u32MVDCC_Temp1 = 0;
5538     if (HAL_MVD_TimeOut(pstCmdArg->Arg5) == FALSE)
5539     {
5540         //HAL_MVD_ARGINIT();
5541         HAL_MVD_RegWriteByte(MVD_ARG5, 0);
5542         HAL_MVD_RegWriteByte(MVD_ARG4, 0);
5543         HAL_MVD_RegWriteByte(MVD_ARG3, (MS_U8)u8CC608);
5544         HAL_MVD_RegWriteByte(MVD_COMMAND, (MS_U8)(CMD_RD_USER_WP));//CMD_GET_CCBUF_HWADDR
5545 
5546         if (HAL_MVD_TimeOut(pstCmdArg->Arg5) == FALSE)
5547         {
5548             u32MVDCC_Temp1 = 0;
5549             u32MVDCC_Temp1 = (((MS_U32)HAL_MVD_RegReadByte(MVD_ARG0)) & 0x000000FF);
5550             u32MVDCC_Temp1 += ((((MS_U32)HAL_MVD_RegReadByte(MVD_ARG1)) & 0x000000FF) << 8);
5551             u32MVDCC_Temp1 += ((((MS_U32)HAL_MVD_RegReadByte(MVD_ARG2)) & 0x000000FF) << 16);
5552             u32MVDCC_Temp1 = (u32MVDCC_Temp1 << 3);
5553             return (u32MVDCC_Temp1);
5554         }
5555         else
5556         {
5557             MVD_DEBUGINFO(MVD_PRINT("\nF:GHAV"));
5558         }
5559     }
5560     else
5561     {
5562         MVD_DEBUGINFO(MVD_PRINT("\nF:GHA"));
5563     }
5564 
5565     return 0xffffffff;
5566 #endif
5567 }
5568 
HAL_MVD_GetUsrDataIsAvailable(MS_U8 u8Idx)5569 MS_BOOL HAL_MVD_GetUsrDataIsAvailable(MS_U8 u8Idx)
5570 {
5571     volatile MVD_CtrlCfg* pCtrlCfg = (volatile MVD_CtrlCfg*)HAL_MVD_GetCtrlCfg(u8Idx);
5572     MS_VIRT u32UsrDataWr = 0;
5573     MS_BOOL bIsAvail = FALSE;
5574 
5575 #if defined(MVD_SUPPORT_X4_CC)
5576     u32UsrDataWr = HAL_CC_CM_GetMVDRB_HWAddr(4)>>3;
5577 #else
5578     u32UsrDataWr = HAL_CC_CM_GetMVDRB_HWAddr(2)>>3;
5579 #endif
5580     bIsAvail = !(pCtrlCfg->u32UsrDataRd == u32UsrDataWr);
5581     MVD_DEBUGINFO(MVD_PRINT("IsAvail:%x rd=%lx wr=%lx\n", bIsAvail,
5582                          (unsigned long)pCtrlCfg->u32UsrDataRd, (unsigned long)u32UsrDataWr));
5583     return bIsAvail;
5584 }
5585 
5586 //------------------------------------------------------------------------------
5587 /// Get info of user data
5588 //------------------------------------------------------------------------------
HAL_MVD_GetUsrDataInfo(MS_U8 u8Idx,MVD_UsrDataInfo * pUsrInfo)5589 MS_BOOL HAL_MVD_GetUsrDataInfo(MS_U8 u8Idx, MVD_UsrDataInfo* pUsrInfo)
5590 {
5591     MS_VIRT u32UsrData = NULL;
5592     MS_VIRT u32UsrDataWr = 0;
5593 #if defined(MVD_SUPPORT_X4_CC)
5594     FW_USER_DATA_BUF_EXT stUsrDataExt;
5595 #else
5596     FW_USER_DATA_BUF stUsrDataInfo;
5597 #endif
5598     volatile MVD_CtrlCfg* pCtrlCfg = (volatile MVD_CtrlCfg*)HAL_MVD_GetCtrlCfg(u8Idx);
5599 
5600     if ((!pUsrInfo) || (GET_FRMINFO_BUFFADD(u8Idx)==0))
5601     {
5602         MVD_DEBUGERROR(MVD_PRINT("%s: NULL ptr.\n", __FUNCTION__));
5603         return FALSE;
5604     }
5605 
5606     //get write pointer
5607 #if defined(MVD_SUPPORT_X4_CC)
5608     u32UsrDataWr = HAL_CC_CM_GetMVDRB_HWAddr(4)>>3;
5609 #else
5610     u32UsrDataWr = HAL_CC_CM_GetMVDRB_HWAddr(2)>>3;
5611 #endif
5612     if (pCtrlCfg->u32UsrDataRd == (GET_USRDATA_BUFFADD(u8Idx)+MVD3_FW_USER_DATA_BUF_LEN))
5613     {
5614         pCtrlCfg->u32UsrDataRd = GET_USRDATA_BUFFADD(u8Idx); //wrap to BufStart
5615     }
5616     MVD_DEBUGINFO(MVD_PRINT("CC Rd=0x%lx Wr=0x%lx\n", (unsigned long)pCtrlCfg->u32UsrDataRd, (unsigned long)u32UsrDataWr));
5617 
5618     if (pCtrlCfg->u32UsrDataRd == u32UsrDataWr)
5619     {
5620         MVD_DEBUGERROR(MVD_PRINT("%s: no data? Rd=0x%lx Wr=0x%lx\n", __FUNCTION__, (unsigned long)pCtrlCfg->u32UsrDataRd, (unsigned long)u32UsrDataWr));
5621         return FALSE;
5622     }
5623 
5624     _miu_offset_to_phy(pMVDHalContext->stMiuCfg.u8FWMiuSel,pCtrlCfg->u32UsrDataRd,u32UsrData);
5625 
5626     u32UsrData = HAL_MVD_PA2NonCacheSeg(u32UsrData);
5627 
5628     HAL_MVD_CPU_Sync();
5629     HAL_MVD_ReadMemory();
5630 
5631 #if defined(MVD_SUPPORT_X4_CC)
5632     stUsrDataExt = *(volatile FW_USER_DATA_BUF_EXT*)u32UsrData;
5633 
5634     pUsrInfo->u32Pts = stUsrDataExt.pts;
5635     pUsrInfo->u8PicStruct = stUsrDataExt.PicStruct;
5636     pUsrInfo->u8PicType   = stUsrDataExt.picType;
5637     pUsrInfo->u8TopFieldFirst = stUsrDataExt.top_ff;
5638     pUsrInfo->u8RptFirstField = stUsrDataExt.rpt_ff;
5639     pUsrInfo->u16TmpRef = stUsrDataExt.tmpRef;
5640     pUsrInfo->u8ByteCnt = stUsrDataExt.userdatabytecnt;
5641     pUsrInfo->u32DataBuf = u32UsrData + MVD_FW_USER_DATA_EXT_HDR_LEN;
5642 #else
5643     stUsrDataInfo = *(volatile FW_USER_DATA_BUF*)u32UsrData;
5644 
5645     pUsrInfo->u8PicType   = stUsrDataInfo.picType;
5646     pUsrInfo->u8TopFieldFirst = stUsrDataInfo.top_ff;
5647     pUsrInfo->u8RptFirstField = stUsrDataInfo.rpt_ff;
5648     pUsrInfo->u16TmpRef = stUsrDataInfo.tmpRef;
5649     pUsrInfo->u8ByteCnt = stUsrDataInfo.userdatabytecnt;
5650     pUsrInfo->u32DataBuf = u32UsrData + MVD_FW_USER_DATA_HDR_LEN;
5651 #endif
5652     //update read pointer
5653     pCtrlCfg->u32UsrDataRd += MVD_FW_USER_DATA_PKT_LEN;
5654 #if 0
5655     MVD_PRINT("xxInfo: ");
5656     MVD_PRINT("%02d, ", pUsrInfo->u16TmpRef);
5657     MVD_PRINT("%d, ", pUsrInfo->u8PicStruct);
5658     MVD_PRINT("%d, ", pUsrInfo->u8TopFieldFirst);
5659     MVD_PRINT("0x%x, ", pUsrInfo->u32DataBuf);
5660     MVD_PRINT("%d, ", pUsrInfo->u8ByteCnt);
5661     MVD_PRINT("%ld, ", pUsrInfo->u32Pts);
5662     MVD_PRINT("%d\n", pUsrInfo->u8PicType);
5663 #endif
5664     return TRUE;
5665 }
5666 
5667 
HAL_MVD_Map2DrvSlqTbl(MS_U8 u8Idx,MS_VIRT u32HWPtr)5668 MS_VIRT HAL_MVD_Map2DrvSlqTbl(MS_U8 u8Idx, MS_VIRT u32HWPtr)
5669 {
5670     MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
5671     MVD_CtrlCfg* pstCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
5672     MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
5673     MS_VIRT u32HWSt = HAL_MVD_GetMemOffset(pstMemCfg->u32BSAddr);
5674     MS_VIRT u32DrvPtr;
5675 
5676     if ((u32HWPtr<u32HWSt) && (u32HWPtr!=0))
5677     {
5678         MVD_DEBUGERROR(MVD_PRINT("Invalid u32HWPtr=0x%lx\n", (unsigned long)u32HWPtr));
5679         return 0;
5680     }
5681     if ((pstCtrlCfg->bSlqTblSync) && (u32HWPtr!=0))
5682     {
5683         u32DrvPtr = pstSlqTblInfo->pDrvSlqTbl->u32StAdd + (u32HWPtr - u32HWSt);
5684         return u32DrvPtr;
5685     }
5686     return u32HWPtr;
5687 }
5688 
5689 
MVD_SLQTblGetFileEndPkt(MS_U8 u8Idx,MVD_PacketInfo * pFileEnd)5690 static void MVD_SLQTblGetFileEndPkt(MS_U8 u8Idx, MVD_PacketInfo* pFileEnd)
5691 {
5692     MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
5693     MS_VIRT u32EndPattern = HAL_MVD_GetMemOffset(pstMemCfg->u32DrvBufAddr+SLQ_TBL_SIZE*3);
5694 
5695     pFileEnd->u32StAddr = SLQ_TBL_SIZE*3;//u32EndPattern - HAL_MVD_GetMemOffset(pstMemCfg->u32DrvBufAddr);
5696     pFileEnd->u32Length = END_PATTERN_SIZE;
5697     pFileEnd->u32TimeStamp = MVD_NULLPKT_PTS;
5698     pFileEnd->u32ID_L = MVD_U32_MAX;
5699     pFileEnd->u32ID_H = MVD_U32_MAX;
5700     MVD_DEBUGINFO(MVD_PRINT("u32EndPattern(0x%lx)=0x%x 0x%x 0x%x 0x%x\n", (unsigned long)pFileEnd->u32StAddr,
5701             HAL_MVD_MemRead4Byte(u32EndPattern), HAL_MVD_MemRead4Byte(u32EndPattern+4),
5702             HAL_MVD_MemRead4Byte(u32EndPattern+8), HAL_MVD_MemRead4Byte(u32EndPattern+12)));
5703 }
5704 
5705 
MVD_SLQTblGetDummyPkt(MVD_PacketInfo * pDummy)5706 static void MVD_SLQTblGetDummyPkt(MVD_PacketInfo* pDummy)
5707 {
5708     //MS_U32 u32DummyES = HAL_MVD_GetMemOffset(pstMemCfg->u32DrvBufAddr+SLQ_TBL_SIZE*2);
5709 
5710     pDummy->u32StAddr = SLQ_TBL_SIZE*2;//u32DummyES - HAL_MVD_GetMemOffset(pstMemCfg->u32DrvBufAddr);
5711     pDummy->u32Length = DUMMY_SIZE;
5712     pDummy->u32TimeStamp = MVD_NULLPKT_PTS;
5713     pDummy->u32ID_L = MVD_U32_MAX;
5714     pDummy->u32ID_H = MVD_U32_MAX;
5715 #if 0
5716     MVD_PRINT("u32DummyES(0x%x-->0x%x, size=0x%x)=0x%08lx 0x%08lx 0x%08lx 0x%08lx\n", u32DummyES,
5717             pDummy->u32StAddr, pDummy->u32Length, HAL_MVD_MemRead4Byte(u32DummyES),
5718             HAL_MVD_MemRead4Byte(u32DummyES+4),HAL_MVD_MemRead4Byte(u32DummyES+8),HAL_MVD_MemRead4Byte(u32DummyES+12));
5719 #endif
5720 
5721 }
5722 
5723 
HAL_MVD_SLQTblInsertPattern(MS_U8 u8Idx,MVD_PatternType ePattern)5724 MS_BOOL HAL_MVD_SLQTblInsertPattern(MS_U8 u8Idx, MVD_PatternType ePattern)
5725 {
5726     MS_U32 i;
5727     MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
5728 
5729     if (pstSlqTblInfo->pDrvSlqTbl->u32Empty < SLQ_TBL_SAFERANGE)
5730     {
5731         MVD_DEBUGINFO(MVD_PRINT("SLQTbl full!(0x%lx) Cannot insert pattern any more!\n", (unsigned long)pstSlqTblInfo->pDrvSlqTbl->u32Empty));
5732         return FALSE;
5733     }
5734 
5735 #if SLQ_NEW_PUSH
5736     if(pstSlqTblInfo->pSlqStatus->bSlqCtrlBit)
5737     {
5738         if(pstSlqTblInfo->pSlqStatus->bSlqPicWaitNextStart)
5739         {
5740             pstSlqTblInfo->pDrvSlqTbl->u32WrPtr = pstSlqTblInfo->pSlqStatus->u32VaildWptrAddr;
5741         }
5742         pstSlqTblInfo->pSlqStatus->bSlqCtrlBit = FALSE;
5743     }
5744 #endif // #if SLQ_NEW_PUSH
5745     for (i =0; i<2; i++)
5746     {   //insert dummy pattern
5747         MVD_PacketInfo stDummyPkt;
5748 
5749         if (E_MVD_PATTERN_FLUSH == ePattern)
5750         {
5751             MVD_SLQTblGetDummyPkt(&stDummyPkt);
5752         }
5753         else if (E_MVD_PATTERN_FILEEND == ePattern)
5754         {
5755             MVD_SLQTblGetFileEndPkt(u8Idx, &stDummyPkt);
5756         }
5757         else
5758         {
5759             MVD_DEBUGERROR(MVD_PRINT("Invalid MVD_PatternType! Won't insert pattern!\n"));
5760             return FALSE;
5761         }
5762         #if SLQ_NEW_PUSH
5763         pstSlqTblInfo->pSlqStatus->bSlqFireRdy = TRUE;
5764         #endif
5765         //MVD_PRINT("WrPtr 0x%x ", pstSlqTblInfo->pDrvSlqTbl->u32WrPtr);
5766         HAL_MVD_SLQTblSendPacket(u8Idx, &stDummyPkt);
5767         //MVD_PRINT("==> 0x%x\n", pstSlqTblInfo->pDrvSlqTbl->u32WrPtr);
5768         HAL_MVD_SetSLQWritePtr(u8Idx, FALSE);
5769     }
5770     return TRUE;
5771 }
5772 
5773 
5774 #define FLAG_LAST_FRM_SHOW (MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_CMD_LAST_FRAME_SHOW, sizeof(MS_U32)))
HAL_MVD_IsDispFinish(MS_U8 u8Idx)5775 E_MVD_Result HAL_MVD_IsDispFinish(MS_U8 u8Idx)
5776 {
5777     MS_U32 u32TimeCnt;
5778     MVD_SrcMode curSrcMode = HAL_MVD_GetSrcMode(u8Idx);
5779     MS_U32 u32FeByteCnt = 0;
5780     MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
5781     MS_VIRT u32FileEndPtr = pstSlqTblInfo->u32FileEndPtr;
5782     MS_U32 u32Id = MVD_GetStreamId(u8Idx);
5783     MS_U8 u8VPUIdx = HAL_VPU_EX_GetTaskId(u32Id);
5784 #ifdef VDEC3
5785     MS_VIRT u32VBBUAddr = HAL_MVD_GetVBBUTableAddr(u8VPUIdx);
5786     MVD_CtrlCfg* pstCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
5787     #endif
5788 
5789     //MVD_PRINT("MDrv_MVD_IsDispFinish::");
5790     if (GET_FRMINFO_BUFFADD(u8Idx)==0)
5791     {
5792         MVD_DEBUGERROR(MVD_PRINT("%s err: pu8MVDGetFrameInfoBufStart=NULL\n", __FUNCTION__));
5793         return E_MVD_RET_FAIL;
5794     }
5795 
5796     //MVD_PRINT("0x%x\n", FLAG_LAST_FRM_SHOW);
5797     if ((E_MVD_SLQ_TBL_MODE == curSrcMode) && (TRUE != FLAG_LAST_FRM_SHOW))
5798     {
5799         //insert pattern when each time checking IsDispFinish
5800 #ifdef VDEC3
5801         if(pstCtrlCfg->u8McuMode == TRUE)
5802         {
5803             u32TimeCnt= HAL_MVD_GetTime();
5804             while ((HAL_MVD_GetTime() - u32TimeCnt) < 20)  // timeout 20 ms
5805             {
5806                 if(HAL_VPU_EX_GetVBBUVacancy(u32Id, u32VBBUAddr) > 0)
5807                 {
5808                     HAL_VPU_EX_PacketInfo stVpuPkt;
5809                     MVD_PacketInfo stDummyPkt;
5810                     MVD_SLQTblGetFileEndPkt(u8Idx,&stDummyPkt);
5811 
5812                     stVpuPkt.u32Offset = stDummyPkt.u32StAddr;
5813                     stVpuPkt.u32Length = stDummyPkt.u32Length;
5814                     stVpuPkt.u64TimeStamp = (MS_U64)stDummyPkt.u32TimeStamp;
5815                     //If in display queue mode
5816                     stVpuPkt.u64TimeStamp |= ((MS_U64)stDummyPkt.u32ID_H << 32);
5817                     stVpuPkt.u32ID_H = stDummyPkt.u32ID_H;
5818                     stVpuPkt.u32ID_L = stDummyPkt.u32ID_L;
5819 
5820                     HAL_VPU_EX_Push2VBBU(u32Id, &stVpuPkt,u32VBBUAddr);
5821                 }
5822 
5823                 if (TRUE == FLAG_LAST_FRM_SHOW)
5824                 {
5825                     break;
5826                 }
5827             }
5828 
5829             if (TRUE != FLAG_LAST_FRM_SHOW)
5830             {
5831                 MVD_DEBUGERROR(MVD_PRINT("MDrv_MVD_IsDispFinish TIMEOUT\n"));
5832                 return E_MVD_RET_TIME_OUT;
5833             }
5834             else
5835             {
5836                 return E_MVD_RET_OK;
5837             }
5838         }
5839         else
5840 #endif
5841         {
5842         //insert pattern when each time checking IsDispFinish
5843         if (HAL_MVD_SLQTblInsertPattern(u8Idx, E_MVD_PATTERN_FILEEND))
5844         {
5845             u32FeByteCnt += END_PATTERN_SIZE;
5846         }
5847 
5848         if ((u32FileEndPtr == HAL_MVD_Map2DrvSlqTbl(u8Idx, HAL_MVD_GetSLQReadPtr(u8Idx))) &&
5849             (HAL_MVD_IsMcuMode(u8Idx) == FALSE) &&
5850             (HAL_MVD_IsMStreamerMode(u8Idx) == FALSE))
5851         {
5852             //insert padding pattern until timeout
5853             u32TimeCnt= HAL_MVD_GetTime();
5854             while ((HAL_MVD_GetTime() - u32TimeCnt) < CMD_TIMEOUT_MS)
5855             {
5856                 if (TRUE == FLAG_LAST_FRM_SHOW)
5857                 {
5858                     //MVD_PRINT("\nDisp finished!\n");
5859                     break;
5860                 }
5861                 //insert file-end pattern again
5862                 if (HAL_MVD_SLQTblInsertPattern(u8Idx, E_MVD_PATTERN_FILEEND))
5863                 {
5864                     u32FeByteCnt += END_PATTERN_SIZE;
5865                 }
5866             }
5867             if ((HAL_MVD_GetTime() - u32TimeCnt) >= CMD_TIMEOUT_MS)
5868             {
5869                 MVD_DEBUGERROR(MVD_PRINT("\n***** MDrv_MVD_IsDispFinish TIMEOUT!!! *****\n\n"));
5870                 if (E_MVD_CODEC_VC1_MAIN == HAL_MVD_GetCodecType(u8Idx))
5871                 {
5872                     if ((HAL_MVD_GetPayloadLen(u8Idx) > 0x200000)
5873                         && (TRUE != HAL_MVD_GotFileEndPattern(u8Idx)))
5874                     {
5875                         MVD_DEBUGERROR(MVD_PRINT("RCV payloadLen(0x%x) invalid!\n",
5876                             HAL_MVD_GetPayloadLen(u8Idx)));
5877                     }
5878                 }
5879                 MVD_DEBUGERROR(MVD_PRINT("***** fe=%lx, rd=%lx(%lx,%lx), wr=%lx, empty=%lx, u32FeByteCnt=%x\n",
5880                     (unsigned long)u32FileEndPtr, (unsigned long)pstSlqTblInfo->pDrvSlqTbl->u32RdPtr, (unsigned long)HAL_MVD_Map2DrvSlqTbl(u8Idx, HAL_MVD_GetSLQReadPtr(u8Idx)),
5881                     (unsigned long)HAL_MVD_GetSLQReadPtr(u8Idx), (unsigned long)pstSlqTblInfo->pDrvSlqTbl->u32WrPtr, (unsigned long)pstSlqTblInfo->pDrvSlqTbl->u32Empty, u32FeByteCnt));
5882                 return E_MVD_RET_TIME_OUT;
5883             }
5884             else
5885             {
5886                 return E_MVD_RET_OK;
5887             }
5888         }
5889         else
5890         {
5891             //just return fail if readPtr is not closed to file-end ptr
5892             MVD_DEBUGINFO(MVD_PRINT("fe=%lx, rd=%lx(%lx), wr=%lx, empty=%lx\n", (unsigned long)u32FileEndPtr, (unsigned long)pstSlqTblInfo->pDrvSlqTbl->u32RdPtr,
5893                             (unsigned long)HAL_MVD_Map2DrvSlqTbl(u8Idx, (unsigned long)HAL_MVD_GetSLQReadPtr(u8Idx)), (unsigned long)pstSlqTblInfo->pDrvSlqTbl->u32WrPtr, (unsigned long)pstSlqTblInfo->pDrvSlqTbl->u32Empty));
5894             return E_MVD_RET_FAIL;
5895         }
5896         }
5897     }
5898 
5899     if (FLAG_LAST_FRM_SHOW)
5900     {
5901         return E_MVD_RET_OK;
5902     }
5903     else
5904     {
5905         return E_MVD_RET_FAIL;
5906     }
5907 }
5908 
5909 //------------------------------------------------------------------------------
5910 /// Set MVD SLQ start & end address
5911 /// @param -u32start \b IN : start address
5912 /// @param -u32end \b IN : end address
5913 //------------------------------------------------------------------------------
HAL_MVD_SetSLQStartEnd(MS_U8 u8Idx,MS_U32 u32start,MS_U32 u32end)5914 static void HAL_MVD_SetSLQStartEnd(MS_U8 u8Idx, MS_U32 u32start, MS_U32 u32end)
5915 {
5916     MVD_CmdArg mvdcmd;
5917 
5918     if ((u32start > SLQ_ADDR_LEN) || ((u32end+1) > SLQ_ADDR_LEN))
5919     {
5920         MVD_DEBUGERROR(MVD_PRINT("MDrv_MVD_SetSLQStartEnd: only support 27bit add!\n"));
5921     }
5922 
5923     SET_CMDARG(mvdcmd, (u32end+1), u8Idx);
5924     if (HAL_MVD_MVDCommand( CMD_SLQ_END, &mvdcmd ) == FALSE)
5925     {
5926         MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_SLQ_END ) );
5927         return;
5928     }
5929 
5930     SET_CMDARG(mvdcmd, u32start, u8Idx);
5931     if (HAL_MVD_MVDCommand( CMD_SLQ_START, &mvdcmd ) == FALSE)
5932     {
5933         MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_SLQ_START ) );
5934         return;
5935     }
5936 
5937     return;
5938 }
5939 
HAL_MVD_DecodeIFrame(MS_U8 u8Idx,MS_PHY u32FrameBufAddr,MS_PHY u32StreamBufAddr,MS_PHY u32StreamBufEndAddr,MS_U8 u8ChipECORev)5940 MS_BOOL HAL_MVD_DecodeIFrame(MS_U8 u8Idx, MS_PHY u32FrameBufAddr, MS_PHY u32StreamBufAddr, MS_PHY u32StreamBufEndAddr, MS_U8 u8ChipECORev)
5941 {
5942     MS_U32 u32deley = 0;
5943     MS_U32 u32time = 0;
5944     MVD_CmdArg mvdcmd;
5945     MS_VIRT u32MVDFWSLQTABTmpbufAdr = GET_SLQ_BUFFADD(u8Idx);
5946 
5947     MVD_DEBUGINFO(MVD_PRINT("%s offset FBAdd=0x%lx streamStart=0x%lx streamEnd=0x%lx\n",
5948             __FUNCTION__, (unsigned long)u32FrameBufAddr, (unsigned long)u32StreamBufAddr, (unsigned long)u32StreamBufEndAddr));
5949 
5950     HAL_MVD_SetCodecInfo(u8Idx, E_MVD_CODEC_MPEG2, E_MVD_SLQ_MODE, DISABLE_PARSER, u8ChipECORev);
5951     HAL_MVD_SetFrameBuffAddr(u8Idx, u32FrameBufAddr, HAL_MVD_GetFBMode(u8Idx));
5952 
5953     SETUP_CMDARG(mvdcmd);
5954     mvdcmd.Arg0 = 1;
5955     SET_DECNUM(mvdcmd, u8Idx);
5956     SET_CMD_RET_FALSE(CMD_DISPLAY_CTL, &mvdcmd);
5957 
5958     if (HAL_MVD_StepDecode(u8Idx) == FALSE)
5959     {
5960         MVD_DEBUGERROR( MVD_PRINT( "HAL_MVD_StepDecode fail!!\r\n") );
5961         return FALSE;
5962     }
5963 
5964     SETUP_CMDARG(mvdcmd);
5965     mvdcmd.Arg0 = 1;
5966     mvdcmd.Arg1 = 1;
5967     SET_DECNUM(mvdcmd, u8Idx);
5968     SET_CMD_RET_FALSE(CMD_FAST_SLOW, &mvdcmd);
5969 
5970     //set data
5971     HAL_MVD_Delayms(2);
5972 
5973     HAL_MVD_CPU_Sync();
5974     HAL_MVD_FlushMemory();
5975 
5976     //wait vld init success or data may lost!
5977 #define WAIT_INIT_SUCCESS_TIME 100 //100ms
5978     u32deley = HAL_MVD_GetTime();
5979     while ((HAL_MVD_GetDecodeStatus(u8Idx)==DEC_STAT_IDLE) && (u32time<WAIT_INIT_SUCCESS_TIME))
5980     {
5981         u32time = HAL_MVD_GetTime()-u32deley;
5982     }
5983     if (u32time>=WAIT_INIT_SUCCESS_TIME)
5984     {
5985         MVD_DEBUGERROR(MVD_PRINT("%s: wait init_success timeout!!!\n", __FUNCTION__));
5986     }
5987     HAL_MVD_SetSLQStartEnd(u8Idx, u32StreamBufAddr, u32StreamBufEndAddr);
5988     MVD_DEBUGINFO(MVD_PRINT("set MVD3_FW_SLQ_TAB_TMPBUF_ADR=%lx\n",(unsigned long)u32MVDFWSLQTABTmpbufAdr));
5989 
5990     HAL_MVD_CPU_Sync();
5991     HAL_MVD_FlushMemory();
5992     HAL_MVD_SetSLQStartEnd(u8Idx, u32MVDFWSLQTABTmpbufAdr, u32MVDFWSLQTABTmpbufAdr+MVD3_FW_SLQ_TAB_TMPBUF_LEN);
5993 
5994     HAL_MVD_CPU_Sync();
5995     HAL_MVD_ReadMemory();
5996 
5997     // wait decode complete
5998 #define WAIT_DECODE_DONE_TIME 33 //To decode 1 frame should take less than 33ms
5999     u32deley = HAL_MVD_GetTime();
6000     u32time = 0;
6001     while (HAL_MVD_GetPicCounter(u8Idx)<1 && (u32time<WAIT_DECODE_DONE_TIME))
6002     {
6003         u32time = HAL_MVD_GetTime()-u32deley;
6004     }
6005     if (u32time >= WAIT_DECODE_DONE_TIME)
6006     {
6007         MVD_DEBUGERROR(MVD_PRINT ("MDrv_MVD_DecodeIFrame time out(du=%d, st=%d, now=%d)\n", u32time, u32deley, HAL_MVD_GetTime()));
6008         MVD_DEBUGERROR(MVD_PRINT("frmCnt=%d state=0x%x lastCmd=0x%x\n", HAL_MVD_GetPicCounter(u8Idx), HAL_MVD_GetDecodeStatus(u8Idx), HAL_MVD_GetLastCmd(u8Idx)));
6009         return FALSE;
6010     }
6011     MVD_DEBUGINFO(MVD_PRINT ("MDrv_MVD_DecodeIFrame time (%d, %d)\n", u32time, u32deley));
6012     //MVD_PRINT("frmCnt=%ld state=0x%x lastCmd=0x%x\n", HAL_MVD_GetPicCounter(u8Idx), HAL_MVD_GetDecodeStatus(u8Idx), HAL_MVD_GetLastCmd(u8Idx));
6013 
6014     MVD_CtrlCfg* pCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
6015     pCtrlCfg->bDecodeIFrame = TRUE;
6016 
6017     return TRUE;
6018 }
6019 
6020 
6021 //------------------------------------------------------------------------------
6022 /// Set bit stream buffer address to MVD
6023 /// @param -u32start \b IN : start address
6024 /// @param -u32end \b IN : end address
6025 //------------------------------------------------------------------------------
MVD_SetBitStreamAddr(MS_U8 u8Idx,MS_VIRT u32start,MS_VIRT u32end)6026 static void MVD_SetBitStreamAddr(MS_U8 u8Idx, MS_VIRT u32start, MS_VIRT u32end)
6027 {
6028     MVD_CmdArg mvdcmd;
6029     MS_ASSERT((u32start%8)==0);
6030     u32start >>= 3;
6031     SET_CMDARG(mvdcmd, u32start, u8Idx);
6032     if (HAL_MVD_MVDCommand( CMD_STREAM_BUF_START, &mvdcmd ) == FALSE)
6033     {
6034         MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_STREAM_BUF_START ) );
6035         return;
6036     }
6037 
6038     MS_ASSERT((u32end%8)==0);
6039     u32end >>= 3;
6040     SET_CMDARG(mvdcmd, u32end, u8Idx);
6041     if (HAL_MVD_MVDCommand( CMD_STREAM_BUF_END, &mvdcmd ) == FALSE)
6042     {
6043         MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_STREAM_BUF_END ) );
6044         return;
6045     }
6046     return;
6047 }
6048 
HAL_MVD_SetInternalBuffAddr(MS_U8 u8Idx,MS_VIRT u32start,MS_U32 u32len)6049 MS_BOOL HAL_MVD_SetInternalBuffAddr(MS_U8 u8Idx, MS_VIRT u32start, MS_U32 u32len)
6050 {
6051     MS_VIRT tmpAdr, tmpLen;
6052     MVD_FWCfg* pFwCfg = NULL;
6053     MVD_FWBuff* pBuff = &(pMVDHalContext->stFWBuff[u8Idx]);
6054     MVD_MEMCfg* pstMemCfg = NULL;
6055     MVD_SLQTBLInfo* pstSlqTblInfo = NULL;
6056     MS_U32 u32Id = MVD_GetStreamId(u8Idx);
6057     MS_U8 u8VPUIdx = HAL_VPU_EX_GetTaskId(u32Id);
6058     MS_VIRT u32BuffStart = u32start+(MVD_FW_TASK_OFFSET*u8VPUIdx);
6059     MS_VIRT VPUSHMAddr = HAL_VPU_EX_GetSHMAddr();
6060     MS_VIRT u32StartOffset;
6061     MS_U8  u8MiuSel;
6062 
6063     if(VPUSHMAddr != 0)
6064     {
6065         _phy_to_miu_offset(u8MiuSel, u32StartOffset, VPUSHMAddr);
6066 
6067         u32StartOffset -= MVD_FW_CODE_LEN;
6068 
6069         if(u8Idx == 0)
6070         {
6071             u32BuffStart = u32StartOffset; // for main decoder
6072         }
6073         else if(u8Idx == 1)
6074         {
6075             u32BuffStart = u32StartOffset + 0x20000; // VPUSHMAddr+128K bytes
6076         }
6077     }
6078 
6079     MVD_DEBUGINFO(MVD_PRINT("MVD FW shared mem start = 0x%lx\n", (unsigned long)u32BuffStart));
6080     MVD_GetFWBuffAdd(u32BuffStart, u32len, pBuff);
6081     MVD_SetFWBuffAdd(u8Idx, pBuff);
6082 
6083     tmpAdr = pBuff->u32DecFrmInfoAdd + MVD_FW_DECFRM_INFO_BUF_LEN;
6084 
6085     HAL_MVD_MemGetMap(u8Idx, E_MVD_MMAP_FB, &tmpAdr, &tmpLen);
6086     MVD_DEBUGINFO(MVD_PRINT("set MVD_FRAMEBUFFER_ADR=%lx\n",(unsigned long)tmpAdr));
6087     HAL_MVD_SetFrameBuffAddr(u8Idx, tmpAdr, HAL_MVD_GetFBMode(u8Idx));
6088     pFwCfg = HAL_MVD_GetFWCfg(u8Idx);
6089     HAL_MVD_SetFrameBuffNum(u8Idx, pFwCfg->u8FBNum,pFwCfg->u32FBUsedSize);
6090 
6091 //  If VD_MHEG5(CPU) and MVD HW engine are run on different MIU,
6092 // IAP, DP, and MV buffers are allocated after FB.
6093 // The reason is that these 3 buffers are used by MVD HW engine.
6094     if(pMVDHalContext->bCMAUsed == FALSE)
6095     {
6096         tmpAdr += pFwCfg->u32FBUsedSize;
6097         pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
6098         if (pstMemCfg->u32FBSize < (pFwCfg->u32FBUsedSize + MVD_HW_BUF_TOTAL_LEN))
6099         {
6100             MVD_DEBUGERROR(MVD_PRINT("MVD HW buffers larger than FB size!!!\n"));
6101         }
6102         MVD_DEBUGINFO(MVD_PRINT("MVD FB boundary =0x%lx\n",(unsigned long)tmpAdr));
6103         tmpAdr = HAL_MVD_SetHWBuffer(u8Idx, tmpAdr);
6104     }
6105 
6106     HAL_MVD_MemGetMap(u8Idx, E_MVD_MMAP_BS, &tmpAdr, &tmpLen);
6107     MVD_DEBUGINFO(MVD_PRINT("set MVD_BITSTREAM_ADR=%lx\n",(unsigned long)tmpAdr));
6108     MVD_SetBitStreamAddr(u8Idx, tmpAdr,tmpAdr+tmpLen);
6109     pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
6110     pstSlqTblInfo->u32ESBuffEnd = tmpAdr+tmpLen;
6111 
6112     if((pFwCfg->stFBReduction.LumaFBReductionMode != E_MVD_FB_REDUCTION_NONE)
6113     || (pFwCfg->stFBReduction.ChromaFBReductionMode  != E_MVD_FB_REDUCTION_NONE))
6114     {
6115         //for chips not support reduction mode, just ignore related config.
6116         MVD_DEBUGERROR(MVD_PRINT("MVD Err: Not support FB reduction mode!!\n"));
6117     }
6118 
6119     return TRUE;
6120 }
6121 
6122 //------------------------------------------------------------------------------
6123 /// Issue "Decode Pause" command.
6124 //------------------------------------------------------------------------------
HAL_MVD_DecodePause(MS_U8 u8Idx)6125 void HAL_MVD_DecodePause(MS_U8 u8Idx)
6126 {
6127     MVD_CmdArg mvdcmd;
6128     SETUP_CMDARG(mvdcmd);
6129     SET_DECNUM(mvdcmd, u8Idx);
6130     if (HAL_MVD_MVDCommand(CMD_PAUSE, &mvdcmd)== FALSE)
6131     {
6132         MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_PAUSE) );
6133         return;
6134     }
6135 
6136     return;
6137 }
6138 
6139 
6140 //------------- Below functions are for MediaCodec SLQ Table --------------------
6141 #if _SLQTBL_DUMP_PTS
_SLQTbl_DumpPtsTbl(MS_U8 u8Idx,MS_U32 u32EntryStart,MS_U32 u32EntryEnd)6142 static void _SLQTbl_DumpPtsTbl(MS_U8 u8Idx, MS_U32 u32EntryStart, MS_U32 u32EntryEnd)
6143 {
6144     MS_U32 i;
6145     MS_VIRT u32EsRp, u32EsStart, u32EsEnd;
6146     MS_VIRT u32MVDFWPtsTblAddr = GET_PTSTBL_BUFFADD(u8Idx);
6147 
6148     for (i=u32EntryStart; i<u32EntryEnd; i++)
6149     {
6150         u32EsRp = pstSlqTblInfo->pDrvEsTbl->u32StAdd + i*8;
6151 
6152         u32EsEnd = HAL_MVD_MemRead4Byte(u32EsRp+4);
6153         u32EsStart = HAL_MVD_MemRead4Byte(u32EsRp); //report StartAdd as read_pointer
6154         MVD_PRINT("ES[%x] Start=0x%x End=0x%x u32EsRp=%x\n",
6155             i, u32EsStart, u32EsEnd, u32EsRp);
6156     }
6157 
6158     MVD_PRINT("\n=======Dump PTS table========\n");
6159     MVD_PRINT("addr\t byte_cnt\t dummy_cnt\t id_low\t id_high\t time_stamp\n");
6160     for (i=u32EntryStart; i<u32EntryEnd; i++)
6161     {
6162         MVD_PRINT("0x%x\t 0x%08lx\t 0x%08lx\t 0x%08lx\t 0x%08lx\t 0x%08lx\n", u32MVDFWPtsTblAddr+i*MVD_FW_SLQTBL_PTS_LEN,
6163                HAL_MVD_MemRead4Byte(u32MVDFWPtsTblAddr+i*MVD_FW_SLQTBL_PTS_LEN),   //byteCnt
6164                HAL_MVD_MemRead4Byte(u32MVDFWPtsTblAddr+i*MVD_FW_SLQTBL_PTS_LEN+4), //dummyPktCnt
6165                HAL_MVD_MemRead4Byte(u32MVDFWPtsTblAddr+i*MVD_FW_SLQTBL_PTS_LEN+8), //idLow
6166                HAL_MVD_MemRead4Byte(u32MVDFWPtsTblAddr+i*MVD_FW_SLQTBL_PTS_LEN+12),//idHigh
6167                HAL_MVD_MemRead4Byte(u32MVDFWPtsTblAddr+i*MVD_FW_SLQTBL_PTS_LEN+16) //pts
6168                );
6169     }
6170     MVD_PRINT("=====================================\n");
6171 }
6172 #endif
6173 
6174 
6175 #if SLQ_NEW_PUSH
MVD_SLQTblGetHdrPkt(MS_U8 u8Idx,MVD_PacketInfo * pDivxHdr,MVD_PacketInfo * pDivxData)6176 void MVD_SLQTblGetHdrPkt(MS_U8 u8Idx, MVD_PacketInfo* pDivxHdr, MVD_PacketInfo* pDivxData)
6177 #else
6178 static void MVD_SLQTblGetDivxHdrPkt(MS_U8 u8Idx, MVD_PacketInfo* pDivxHdr, MVD_PacketInfo* pDivxData)
6179 #endif
6180 {
6181     MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
6182     MS_VIRT u32DivXPattern = pstSlqTblInfo->pDrvDivxTbl->u32WrPtr;
6183     MS_U32 u32FrmSize = pDivxData->u32Length;
6184     MVD_CodecType curCodecType = HAL_MVD_GetCodecType(u8Idx);
6185     MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
6186 #ifdef VDEC3
6187     MVD_CtrlCfg* pstCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
6188 #endif
6189 #if SLQ_NEW_PUSH
6190     if(pstSlqTblInfo->pSlqStatus->bSlqCtrlBit && pstCtrlCfg->u8McuMode == FALSE)
6191     {
6192         if(pstSlqTblInfo->pSlqStatus->bSlqPicWaitNextStart && pstSlqTblInfo->pSlqStatus->bSlqPicStart)
6193         {
6194              //MVD_PRINT("Show KC the SlqPushLength = 0x%x\n",pstSlqTblInfo->pSlqStatus->u32SlqPushLength);
6195             if (E_MVD_CODEC_DIVX311 == curCodecType)
6196             {
6197                 HAL_MVD_MemWrite4Byte(pstSlqTblInfo->pSlqStatus->u32SlqPatternAddr +4, pstSlqTblInfo->pSlqStatus->u32SlqPushLength);
6198                 HAL_MVD_MemWrite4Byte(pstSlqTblInfo->pSlqStatus->u32SlqPatternAddr , DIVX_PATTERN);
6199             }
6200             else if(E_MVD_CODEC_VC1_MAIN == curCodecType)
6201             {//rcv
6202                 HAL_MVD_MemWrite4Byte(pstSlqTblInfo->pSlqStatus->u32SlqPatternAddr +4, RCV_PATTERN);
6203                 HAL_MVD_MemWrite4Byte(pstSlqTblInfo->pSlqStatus->u32SlqPatternAddr , pstSlqTblInfo->pSlqStatus->u32SlqPushLength);
6204             }
6205             else if (E_MVD_CODEC_VC1_ADV == curCodecType)
6206             {
6207                 HAL_MVD_MemWrite4Byte(pstSlqTblInfo->pSlqStatus->u32SlqPatternAddr , VC1_PATTERN);
6208             }
6209             pstSlqTblInfo->pSlqStatus->u32SlqPushLength = 0;
6210             pstSlqTblInfo->pSlqStatus->u32SlqPatternAddr  = 0;
6211             pstSlqTblInfo->pSlqStatus->bSlqFireRdy =TRUE;
6212             pstSlqTblInfo->pSlqStatus->u32VaildWptrAddr = pstSlqTblInfo->pDrvSlqTbl->u32WrPtr;// - 16;
6213             pstSlqTblInfo->pSlqStatus->bSlqPicWaitNextStart = FALSE;
6214             pstSlqTblInfo->pSlqStatus->bSlqPicCollect = FALSE;
6215         }
6216 
6217         if(pstSlqTblInfo->pSlqStatus->bSlqPicStart)
6218         {
6219             pstSlqTblInfo->pSlqStatus->u32SlqPatternAddr = u32DivXPattern;
6220             pstSlqTblInfo->pSlqStatus->u32SlqPushLength += u32FrmSize;
6221             pstSlqTblInfo->pSlqStatus->bSlqPicCollect = TRUE;
6222             pstSlqTblInfo->pSlqStatus->bSlqPicWaitNextStart =TRUE;
6223         }
6224         else if(pstSlqTblInfo->pSlqStatus->bSlqPicCollect)
6225         {
6226             pstSlqTblInfo->pSlqStatus->u32SlqPushLength += u32FrmSize;
6227             pstSlqTblInfo->pSlqStatus->bSlqPicWaitNextStart =TRUE;
6228         }
6229     }
6230     else
6231     {
6232         HAL_MVD_MemWrite4Byte(u32DivXPattern, DIVX_PATTERN);
6233         HAL_MVD_MemWrite4Byte(u32DivXPattern +4,u32FrmSize);
6234     }
6235 #else
6236     HAL_MVD_MemWrite4Byte(u32DivXPattern, DIVX_PATTERN);
6237     HAL_MVD_MemWrite4Byte(u32DivXPattern+4, u32FrmSize);
6238 #endif
6239     pDivxHdr->u32StAddr = u32DivXPattern - HAL_MVD_GetMemOffset(pstMemCfg->u32DrvBufAddr);
6240     pDivxHdr->u32TimeStamp = pDivxData->u32TimeStamp; //unit: ms
6241     pDivxHdr->u32ID_L = pDivxData->u32ID_L;
6242     pDivxHdr->u32ID_H = pDivxData->u32ID_H;
6243     //MVD_PRINT("u32DivXPattern(0x%x==>0x%x)=0x%x 0x%x\n", u32DivXPattern, pDivxHdr->u32StAddr,
6244     //        HAL_MVD_MemRead4Byte(u32DivXPattern), HAL_MVD_MemRead4Byte(u32DivXPattern+4));
6245     if (E_MVD_CODEC_VC1_ADV == curCodecType)
6246     {
6247         pstSlqTblInfo->pDrvDivxTbl->u32WrPtr += 4;
6248         pDivxHdr->u32Length = 4;
6249     }
6250     else
6251     {
6252         pstSlqTblInfo->pDrvDivxTbl->u32WrPtr += 8;
6253         if(pstCtrlCfg->u8McuMode == TRUE)
6254         {
6255             pDivxHdr->u32Length = 64;
6256             if (pstSlqTblInfo->pDrvDivxTbl->u32WrPtr >= pstSlqTblInfo->pDrvDivxTbl->u32EndAdd)
6257             {
6258                 pstSlqTblInfo->pDrvDivxTbl->u32WrPtr = pstSlqTblInfo->pDrvDivxTbl->u32StAdd;
6259             }
6260         }
6261         else
6262         {
6263             pDivxHdr->u32Length = 8;
6264         }
6265     }
6266 
6267 #if SLQ_NEW_PUSH
6268     if(pstSlqTblInfo->pSlqStatus->bSlqPicStart && pstCtrlCfg->u8McuMode == FALSE)
6269     {
6270         if (E_MVD_CODEC_VC1_ADV == curCodecType)
6271         {
6272             pstSlqTblInfo->pDrvDivxTbl->u32WrPtr += 4;
6273             pDivxHdr->u32Length = 4;
6274         }
6275         else
6276         {
6277             pstSlqTblInfo->pDrvDivxTbl->u32WrPtr += 8;
6278             pDivxHdr->u32Length = 8;
6279         }
6280     }
6281 #endif
6282 }
6283 
MVD_SLQTblInitFileEndPkt(MS_U8 u8Idx,MVD_CodecType eType)6284 static void MVD_SLQTblInitFileEndPkt(MS_U8 u8Idx, MVD_CodecType eType)
6285 {
6286     MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
6287     MS_VIRT u32EndPattern = HAL_MVD_GetMemOffset(pstMemCfg->u32DrvBufAddr+SLQ_TBL_SIZE*3);
6288     MS_PHY temp = 0;
6289 
6290 #if 0
6291     _MVD_Memset(u32EndPattern, 0xff, END_PATTERN_SIZE);
6292 #else
6293     _miu_offset_to_phy(pMVDHalContext->stMiuCfg.u8FWMiuSel,u32EndPattern,temp);
6294     memset((void*)(MS_PA2KSEG1(temp)),0xff,END_PATTERN_SIZE);
6295     MsOS_FlushMemory();
6296     MsOS_ReadMemory();
6297 #endif
6298 
6299     if ((E_MVD_CODEC_FLV == eType)||(E_MVD_CODEC_MPEG4_SHORT_VIDEO_HEADER == eType))
6300     {
6301         HAL_MVD_MemWrite4Byte(u32EndPattern, FLV_PATTERN);
6302         HAL_MVD_MemWrite4Byte(u32EndPattern+4, 0xffffffff);
6303         HAL_MVD_MemWrite4Byte(u32EndPattern+8, END_PATTERN_1); //scw
6304         HAL_MVD_MemWrite4Byte(u32EndPattern+12,END_PATTERN_2); //scw
6305         HAL_MVD_MemWrite4Byte(u32EndPattern+16,END_PATTERN_3); //scw
6306         //MVD_PRINT("##########FileEnd for FLV/SVH!, u32EndPattern=%x\n",u32EndPattern);
6307     }
6308     else if (E_MVD_CODEC_DIVX311 == eType)
6309     {
6310         HAL_MVD_MemWrite4Byte(u32EndPattern, DIVX_PATTERN);
6311         HAL_MVD_MemWrite4Byte(u32EndPattern+4, 0xffffffff);
6312         HAL_MVD_MemWrite4Byte(u32EndPattern+8, END_PATTERN_1); //scw
6313         HAL_MVD_MemWrite4Byte(u32EndPattern+12,END_PATTERN_2); //scw
6314         HAL_MVD_MemWrite4Byte(u32EndPattern+16,END_PATTERN_3); //scw
6315         //MVD_PRINT("##########FileEnd for DIVX311!, u32EndPattern=%x\n",u32EndPattern);
6316     }
6317     else if ((E_MVD_CODEC_MPEG2 == eType)||(E_MVD_CODEC_MPEG4 == eType))
6318     {
6319         HAL_MVD_MemWrite4Byte(u32EndPattern, MPEG_PATTERN_0);
6320         HAL_MVD_MemWrite4Byte(u32EndPattern+4, END_PATTERN_1);
6321         HAL_MVD_MemWrite4Byte(u32EndPattern+8, END_PATTERN_2);
6322         HAL_MVD_MemWrite4Byte(u32EndPattern+12,END_PATTERN_3);
6323         //MVD_PRINT("##########FileEnd for MPEG2/4!, u32EndPattern=%x\n",u32EndPattern);
6324     }
6325     else
6326     {
6327         HAL_MVD_MemWrite4Byte(u32EndPattern, END_PATTERN_0);
6328         HAL_MVD_MemWrite4Byte(u32EndPattern+4, END_PATTERN_1);
6329         HAL_MVD_MemWrite4Byte(u32EndPattern+8, END_PATTERN_2); //scw
6330         HAL_MVD_MemWrite4Byte(u32EndPattern+12,END_PATTERN_3); //scw
6331         //MVD_PRINT("##########FileEnd for VC1!, u32EndPattern=%x\n",u32EndPattern);
6332     }
6333 
6334     MVD_DEBUGINFO(MVD_PRINT("u32EndPattern(0x%lx)=0x%x 0x%x\n", (unsigned long)u32EndPattern,
6335             HAL_MVD_MemRead4Byte(u32EndPattern), HAL_MVD_MemRead4Byte(u32EndPattern+4)));
6336 }
6337 
6338 
MVD_SLQTblInitDummyPkt(MS_U8 u8Idx,MVD_CodecType eType)6339 static void MVD_SLQTblInitDummyPkt(MS_U8 u8Idx, MVD_CodecType eType)
6340 {
6341     MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
6342     MS_VIRT u32DummyES = HAL_MVD_GetMemOffset(pstMemCfg->u32DrvBufAddr+SLQ_TBL_SIZE*2);
6343     MS_U32 u32DummyPattern[3];
6344     MS_U32 u32PatternSize;
6345     MS_U32 i;
6346     MS_PHY temp = 0;
6347 
6348     //MVD_PRINT("eType = 0x%x\n", eType);
6349     //initial content for dummy packet
6350     #if 0
6351     _MVD_Memset(u32DummyES, 0xff, DUMMY_SIZE);
6352     #else
6353     _miu_offset_to_phy(pMVDHalContext->stMiuCfg.u8FWMiuSel,u32DummyES,temp);
6354     memset((void*)(MS_PA2KSEG1(temp)),0xff,DUMMY_SIZE);
6355     MsOS_FlushMemory();
6356     MsOS_ReadMemory();
6357     #endif
6358 
6359     switch (eType)
6360     {
6361         case E_MVD_CODEC_FLV:
6362         case E_MVD_CODEC_MPEG4_SHORT_VIDEO_HEADER:
6363             u32DummyPattern[0] = FLV_PATTERN;
6364             u32PatternSize = 1;
6365             break;
6366 
6367         case E_MVD_CODEC_DIVX311:
6368             u32DummyPattern[0] = DIVX_PATTERN;
6369             u32PatternSize = 1;
6370             break;
6371 
6372         case E_MVD_CODEC_VC1_ADV: //vc1
6373             u32DummyPattern[0] = VC1_PATTERN_0;
6374             u32DummyPattern[1] = VC1_PATTERN_1;
6375             u32DummyPattern[2] = VC1_PATTERN_2;
6376             u32PatternSize = 3;
6377             break;
6378 
6379         case E_MVD_CODEC_VC1_MAIN: //rcv
6380             u32DummyPattern[0] = RCV_PATTERN_0;
6381             u32DummyPattern[1] = RCV_PATTERN_1;
6382             u32DummyPattern[2] = RCV_PATTERN_2;
6383             u32PatternSize = 3;
6384             break;
6385 
6386         default:
6387             u32DummyPattern[0] = DUMMY_PATTERN;
6388             u32PatternSize = 1;
6389             break;
6390     }
6391     for (i=0; i<u32PatternSize; i++)
6392     {
6393         HAL_MVD_MemWrite4Byte(u32DummyES+i*4, u32DummyPattern[i]);
6394     }
6395 #if 0
6396     MVD_PRINT("u32DummyES(0x%x)=0x%08lx 0x%08lx 0x%08lx 0x%08lx\n", u32DummyES, HAL_MVD_MemRead4Byte(u32DummyES),
6397             HAL_MVD_MemRead4Byte(u32DummyES+4),HAL_MVD_MemRead4Byte(u32DummyES+8),HAL_MVD_MemRead4Byte(u32DummyES+12));
6398 #endif
6399 
6400 }
6401 
MVD_SLQTblInitDrvSlqTbl(MVD_SLQ_TBL_ST * pDrvSlqTbl,MS_VIRT u32Addr)6402 static void MVD_SLQTblInitDrvSlqTbl(MVD_SLQ_TBL_ST* pDrvSlqTbl, MS_VIRT u32Addr)
6403 {
6404     MS_PHY temp = 0;
6405     pDrvSlqTbl->u32StAdd  = u32Addr;
6406     pDrvSlqTbl->u32EndAdd = u32Addr + SLQ_TBL_SIZE;
6407     pDrvSlqTbl->u32EntryCntMax = SLQ_ENTRY_MAX;
6408 
6409     //reset SLQ table read/write pointers
6410     pDrvSlqTbl->u32RdPtr = pDrvSlqTbl->u32StAdd;
6411     pDrvSlqTbl->u32WrPtr = pDrvSlqTbl->u32StAdd;
6412     pDrvSlqTbl->pu32LastEntry = &pDrvSlqTbl->u32WrPtr;
6413 
6414 #if (!MVD_TURBO_INIT)
6415     //reset SLQ table
6416 #if 0
6417     _MVD_Memset(pDrvSlqTbl->u32StAdd, 0, SLQ_TBL_SIZE);
6418 #else
6419     _miu_offset_to_phy(pMVDHalContext->stMiuCfg.u8FWMiuSel,pDrvSlqTbl->u32StAdd,temp);
6420     memset((void*)(MS_PA2KSEG1(temp)),0,SLQ_TBL_SIZE);
6421     MsOS_FlushMemory();
6422     MsOS_ReadMemory();
6423 #endif
6424 #endif
6425     pDrvSlqTbl->u32Empty = SLQ_TBL_SIZE;
6426     //_SLQTbl_DumpInfo(pDrvSlqTbl);
6427 }
6428 
MVD_SLQTblInitSlqStatus(MVD_SLQ_STATUS * pSlqStatus,MS_VIRT u32WrPtr)6429 static void MVD_SLQTblInitSlqStatus(MVD_SLQ_STATUS* pSlqStatus, MS_VIRT u32WrPtr)
6430 {
6431 #if SLQ_NEW_PUSH
6432     pSlqStatus->u32VaildWptrAddr = u32WrPtr ;
6433     pSlqStatus->bSlqPicWaitNextStart = FALSE;
6434     pSlqStatus->bSlqCtrlBit = FALSE;
6435     pSlqStatus->u32SlqPushLength = 0;
6436     pSlqStatus->bSlqPicStart = FALSE;
6437     pSlqStatus->bSlqPicCollect = FALSE;
6438     pSlqStatus->bSlqEnLastFrameShow =FALSE;
6439     pSlqStatus->bSlqFireRdy = FALSE;
6440 #endif
6441 }
6442 
MVD_SLQTblInitDrvDivxTbl(MVD_SLQ_ES_ST * pDrvDivxTbl,MS_VIRT u32StAdd,MS_U32 u32Val)6443 static void MVD_SLQTblInitDrvDivxTbl(MVD_SLQ_ES_ST* pDrvDivxTbl, MS_VIRT u32StAdd, MS_U32 u32Val)
6444 {
6445     MS_PHY temp = 0;
6446     ///// init SLQ entries for DivX311
6447     pDrvDivxTbl->u32StAdd = u32StAdd;
6448     pDrvDivxTbl->u32EndAdd= pDrvDivxTbl->u32StAdd + SLQ_TBL_SIZE;
6449     pDrvDivxTbl->u32WrPtr = pDrvDivxTbl->u32StAdd;
6450     //pDrvDivxTbl->u32RdPtr = pDrvDivxTbl->u32StAdd;
6451 #if (!MVD_TURBO_INIT)
6452     //reset DivX311 pattern table
6453 #if 0
6454     _MVD_Memset(pDrvDivxTbl->u32StAdd, 0, u32Val);
6455 #else
6456     _miu_offset_to_phy(pMVDHalContext->stMiuCfg.u8FWMiuSel,pDrvDivxTbl->u32StAdd,temp);
6457     memset((void*)(MS_PA2KSEG1(temp)),0,u32Val);
6458     MsOS_FlushMemory();
6459     MsOS_ReadMemory();
6460 #endif
6461 #endif
6462 }
6463 
MVD_SLQTblInitDrvEsTbl(MVD_SLQ_ES_ST * pDrvEsTbl,MS_VIRT u32StAdd,MS_U32 u32Val)6464 static void MVD_SLQTblInitDrvEsTbl(MVD_SLQ_ES_ST* pDrvEsTbl, MS_VIRT u32StAdd, MS_U32 u32Val)
6465 {
6466     UNUSED(u32Val);
6467     MS_PHY temp = 0;
6468     ///// init ES table
6469     pDrvEsTbl->u32StAdd = u32StAdd;
6470     pDrvEsTbl->u32EndAdd= pDrvEsTbl->u32StAdd + ES_TBL_SIZE;
6471     pDrvEsTbl->u32WrPtr = pDrvEsTbl->u32StAdd;
6472     //reset ES table
6473 #if 0
6474     _MVD_Memset(pDrvEsTbl->u32StAdd, 0, ES_TBL_SIZE);
6475 #else
6476     _miu_offset_to_phy(pMVDHalContext->stMiuCfg.u8FWMiuSel,pDrvEsTbl->u32StAdd,temp);
6477     memset((void*)(MS_PA2KSEG1(temp)),0,ES_TBL_SIZE);
6478     MsOS_FlushMemory();
6479     MsOS_ReadMemory();
6480 #endif
6481 }
6482 
6483 //------------------------------------------------------------------------------------------------------------
6484 // Layout of drvProcBuffer
6485 //              -----------------
6486 // drvProcBuff | SlqTbl entries  | <- pstSlqTblInfo->pDrvSlqTbl->u32StAdd
6487 //             |     8K bytes    |
6488 //             | (1024 entries)  |
6489 //             |                 |
6490 //             |-----------------|
6491 //             | DivX311         | <- pstSlqTblInfo->pDrvSlqTbl->u32EndAdd   <- pstSlqTblInfo->pDrvDivxTbl->u32StAdd
6492 //             |     8K bytes    |
6493 //             | (1024 entries)  |
6494 //             |                 |
6495 //             |-----------------|
6496 //             | Flush Patterns  |... <- pstSlqTblInfo->pDrvDivxTbl->u32EndAdd   <- _drvDummy.u32StAdd
6497 //             |     8K bytes    |
6498 //             | (1024 entries)  |
6499 //             |                 |
6500 //             |-----------------|
6501 //             | FileEnd Pattern |... <- _drvDummy.u32EndAdd   <- _drvFileEnd.u32StAdd
6502 //             |     8K bytes    |
6503 //             | (1024 entries)  |
6504 //             |                 |
6505 //             |-----------------|
6506 //             |  ES table       |... <- _drvFileEnd.u32EndAdd   <- pstSlqTblInfo->pDrvEsTbl->u32StAdd
6507 //             |     8K bytes    |
6508 //             | (1024 entries)  |
6509 //             |                 |
6510 //             |-----------------|
6511 //             |                 |........ End of drvProcBuff
6512 //
6513 //------------------------------------------------------------------------------------------------------------
HAL_MVD_SLQTblInit(MS_U8 u8Idx)6514 MS_BOOL HAL_MVD_SLQTblInit(MS_U8 u8Idx)
6515 {
6516     MS_VIRT u32Addr, u32Len;
6517     MVD_CodecType curCodecType = HAL_MVD_GetCodecType(u8Idx);
6518     MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
6519     MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
6520 
6521     if(curCodecType == E_MVD_CODEC_UNKNOWN)
6522     {
6523         MVD_DEBUGERROR(MVD_PRINT("%s: unknow codec type!\n", __FUNCTION__));
6524         return FALSE;
6525     }
6526     pstSlqTblInfo->u32DummyPktCnt = 0;//reset dummy packet counter
6527     pstSlqTblInfo->u32SlqByteCnt = 0; //reset SLQ table byte counter
6528     pstSlqTblInfo->bSlqTblHasValidData = FALSE;
6529 
6530     HAL_MVD_MemGetMap(u8Idx, E_MVD_MMAP_DRV, &u32Addr, &u32Len);
6531 
6532     //init SLQ table attributes & reset SLQ table read/write pointers
6533     MVD_SLQTblInitDrvSlqTbl(pstSlqTblInfo->pDrvSlqTbl, u32Addr);
6534     pstSlqTblInfo->u32FileEndPtr = pstSlqTblInfo->pDrvSlqTbl->u32StAdd;
6535 
6536     MVD_SLQTblInitSlqStatus(pstSlqTblInfo->pSlqStatus, pstSlqTblInfo->pDrvSlqTbl->u32WrPtr);
6537 
6538     //set SLQ table start/end to F/W
6539     HAL_MVD_SetSLQTblBufStartEnd(u8Idx, HAL_MVD_GetMemOffset(pstMemCfg->u32BSAddr), HAL_MVD_GetMemOffset(pstMemCfg->u32BSAddr+SLQ_TBL_SIZE));
6540 
6541     ///// init SLQ entries for DivX311
6542     MVD_SLQTblInitDrvDivxTbl(pstSlqTblInfo->pDrvDivxTbl, pstSlqTblInfo->pDrvSlqTbl->u32EndAdd, SLQ_TBL_SIZE);
6543 
6544     ///// init flush pattern
6545     MVD_SLQTblInitDummyPkt(u8Idx, curCodecType);
6546 
6547     ///// init file-end pattern
6548     MVD_SLQTblInitFileEndPkt(u8Idx, curCodecType);
6549 
6550     MVD_SLQTblInitDrvEsTbl(pstSlqTblInfo->pDrvEsTbl, (pstSlqTblInfo->pDrvDivxTbl->u32EndAdd + DUMMY_SIZE*2), pstMemCfg->u32DrvBufSize);
6551 
6552     pstSlqTblInfo->u32PreEsRd = MVD_U32_MAX;    //reset ES read pointer
6553     pstSlqTblInfo->u32PreEsWr = 0;              //reset ES write pointer
6554 
6555     return TRUE;
6556 }
6557 
6558 
6559 #if 0
6560 static void _SLQTbl_DumpInfo(MVD_SLQ_TBL_ST* pInfo)
6561 {
6562     MVD_PRINT("str=0x%x\n", pInfo->u32StAdd);
6563     MVD_PRINT("end=0x%x\n", pInfo->u32EndAdd);
6564     MVD_PRINT("cnt=0x%x\n", pInfo->u32EntryCntMax);
6565     MVD_PRINT("rd =0x%x\n", pInfo->u32RdPtr);
6566     MVD_PRINT("wr =0x%x\n", pInfo->u32WrPtr);
6567     return;
6568 }
6569 #endif
6570 
6571 
HAL_MVD_GetQueueVacancy(MS_U8 u8Idx,MS_BOOL bCached)6572 MS_U32 HAL_MVD_GetQueueVacancy(MS_U8 u8Idx, MS_BOOL bCached)
6573 {
6574     MS_U32 u32Empty;
6575     MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
6576 
6577 #if 0
6578     if (MDrv_MVD_GetVldErrCount()!=0)
6579     {
6580         MVD_PRINT("QQQ wPtr= 0x%x(0x%x) rPtr=0x%x(0x%x) vldErr=0x%x\n", writePtrLast[u8Idx], pstSlqTblInfo->pDrvSlqTbl->u32WrPtr,
6581         HAL_MVD_GetSLQReadPtr(u8Idx), pstSlqTblInfo->pDrvSlqTbl->u32RdPtr, MDrv_MVD_GetVldErrCount(u8Idx));
6582         MVD_PRINT("Previous EsRead=0x%x EsWrite=0x%x\n", pstSlqTblInfo->u32PreEsRd, pstSlqTblInfo->u32PreEsWr);
6583         _SLQTbl_DumpPtsTbl(u8Idx, 0x0, 0x620);
6584         while(1);
6585     }
6586 #endif
6587 
6588     u32Empty = pstSlqTblInfo->pDrvSlqTbl->u32Empty;
6589     if ((TRUE == bCached) && (u32Empty > SLQTBL_CHECKVACANCY_WATERLEVEL))
6590     {
6591         //To have better performance, we only query F/W read pointer
6592         //when queue_vacancy is lower than water_level
6593         if (pstSlqTblInfo->pDrvSlqTbl->u32WrPtr > pstSlqTblInfo->pDrvSlqTbl->u32RdPtr)
6594         {
6595             u32Empty = SLQ_TBL_SIZE - (pstSlqTblInfo->pDrvSlqTbl->u32WrPtr - pstSlqTblInfo->pDrvSlqTbl->u32RdPtr);
6596         }
6597         else
6598         {
6599             u32Empty = pstSlqTblInfo->pDrvSlqTbl->u32RdPtr - pstSlqTblInfo->pDrvSlqTbl->u32WrPtr;
6600         }
6601 
6602         if (u32Empty == 0)// && (pstSlqTblInfo->pDrvSlqTbl->u32WrPtr == pstSlqTblInfo->pDrvSlqTbl->u32StAdd))
6603         {
6604             u32Empty = SLQ_TBL_SIZE;
6605         }
6606         u32Empty -= SLQ_TBL_SAFERANGE;
6607         return (u32Empty / SLQ_ENTRY_LEN);
6608     }
6609 
6610     pstSlqTblInfo->pDrvSlqTbl->u32RdPtr = HAL_MVD_Map2DrvSlqTbl(u8Idx, HAL_MVD_GetSLQReadPtr(u8Idx));
6611     //MVD_PRINT("QV=0x%x rd=0x%x==>", u32Empty, pstSlqTblInfo->pDrvSlqTbl->u32RdPtr);
6612     if (pstSlqTblInfo->pDrvSlqTbl->u32RdPtr >= (pstSlqTblInfo->pDrvSlqTbl->u32StAdd+SLQ_ENTRY_LEN))
6613     {
6614         if (pstSlqTblInfo->pDrvSlqTbl->u32RdPtr >= pstSlqTblInfo->pDrvSlqTbl->u32EndAdd)
6615         {
6616             MVD_DEBUGERROR(MVD_PRINT("%s: readPtr 0x%lx out of range: too large!\n",
6617                            __FUNCTION__, (unsigned long)pstSlqTblInfo->pDrvSlqTbl->u32RdPtr));
6618         }
6619         pstSlqTblInfo->pDrvSlqTbl->u32RdPtr -= SLQ_ENTRY_LEN;
6620     }
6621     else if (pstSlqTblInfo->pDrvSlqTbl->u32RdPtr == pstSlqTblInfo->pDrvSlqTbl->u32StAdd)
6622     {
6623         pstSlqTblInfo->pDrvSlqTbl->u32RdPtr = pstSlqTblInfo->pDrvSlqTbl->u32EndAdd - SLQ_ENTRY_LEN;
6624     }
6625     else
6626     {
6627         MVD_DEBUGERROR(MVD_PRINT("%s: readPtr 0x%lx out of range: too small!\n",
6628                        __FUNCTION__, (unsigned long)pstSlqTblInfo->pDrvSlqTbl->u32RdPtr));
6629         pstSlqTblInfo->pDrvSlqTbl->u32RdPtr = pstSlqTblInfo->pDrvSlqTbl->u32StAdd;
6630     }
6631     //MVD_PRINT("0x%x\n", pstSlqTblInfo->pDrvSlqTbl->u32RdPtr);
6632 
6633     if (pstSlqTblInfo->pDrvSlqTbl->u32WrPtr > pstSlqTblInfo->pDrvSlqTbl->u32RdPtr)
6634     {
6635         u32Empty = SLQ_TBL_SIZE - (pstSlqTblInfo->pDrvSlqTbl->u32WrPtr - pstSlqTblInfo->pDrvSlqTbl->u32RdPtr);
6636     }
6637     else
6638     {
6639         u32Empty = pstSlqTblInfo->pDrvSlqTbl->u32RdPtr - pstSlqTblInfo->pDrvSlqTbl->u32WrPtr;
6640     }
6641 
6642     if (u32Empty == 0)// && (pstSlqTblInfo->pDrvSlqTbl->u32WrPtr == pstSlqTblInfo->pDrvSlqTbl->u32StAdd))
6643     {
6644         u32Empty = SLQ_TBL_SIZE;
6645     }
6646 
6647     pstSlqTblInfo->pDrvSlqTbl->u32Empty = u32Empty;
6648 
6649     if (u32Empty < SLQ_TBL_SAFERANGE)
6650     {//to avoid write_pointer catch up to read_pointer
6651         u32Empty= 0;
6652     }
6653     else
6654     {
6655         u32Empty -= SLQ_TBL_SAFERANGE;
6656     }
6657 
6658     //MVD_PRINT("%s r=0x%x w=0x%x u32Empty=0x%x\n", __FUNCTION__,
6659     //        pstSlqTblInfo->pDrvSlqTbl->u32RdPtr, pstSlqTblInfo->pDrvSlqTbl->u32WrPtr, u32Empty);
6660     return (u32Empty / SLQ_ENTRY_LEN);
6661 }
6662 
HAL_MVD_PushQueue(MS_U8 u8Idx,MVD_PacketInfo * pInfo)6663 E_MVD_Result HAL_MVD_PushQueue(MS_U8 u8Idx, MVD_PacketInfo* pInfo)
6664 {
6665     E_MVD_Result eRet=E_MVD_RET_INVALID_PARAM;
6666     MVD_CodecType curCodecType = HAL_MVD_GetCodecType(u8Idx);
6667     MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
6668     MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
6669     MS_U32 u32Id = MVD_GetStreamId(u8Idx);
6670     MS_U8 u8VPUIdx = HAL_VPU_EX_GetTaskId(u32Id);
6671 #ifdef VDEC3
6672     MS_VIRT u32VBBUAddr = HAL_MVD_GetVBBUTableAddr(u8VPUIdx);
6673     MVD_CtrlCfg* pstCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
6674 #endif
6675     if (pInfo == NULL)
6676     {
6677         MVD_DEBUGERROR(MVD_PRINT("PushQueue NULL pInfo\n"));
6678         return E_MVD_RET_INVALID_PARAM;
6679     }
6680 
6681 #ifndef VDEC3
6682     if(pMVDHalContext->bAutoInsertDummyPattern[u8Idx] == TRUE)
6683 #else
6684     if(pstCtrlCfg->u8McuMode == TRUE)
6685 #endif
6686     {
6687         MS_U8* temp = (MS_U8*)(MS_PA2KSEG1( pInfo->u32StAddr+pstMemCfg->u32BSAddr));
6688         MS_U32 i;
6689         MS_U32 u32DummyPattern[3];
6690         MS_U32 u32PatternSize;
6691 
6692         switch (curCodecType)
6693         {
6694             case E_MVD_CODEC_FLV:
6695             case E_MVD_CODEC_MPEG4_SHORT_VIDEO_HEADER:
6696                 u32DummyPattern[0] = FLV_PATTERN;
6697                 u32PatternSize = 1;
6698                 break;
6699 
6700             case E_MVD_CODEC_DIVX311:
6701                 u32DummyPattern[0] = DIVX_PATTERN;
6702                 u32PatternSize = 1;
6703                 break;
6704 
6705             case E_MVD_CODEC_VC1_ADV: //vc1
6706                 u32DummyPattern[0] = VC1_PATTERN_0;
6707                 u32DummyPattern[1] = VC1_PATTERN_3;
6708                 u32PatternSize = 2;
6709                 break;
6710             case E_MVD_CODEC_VC1_MAIN: //rcv
6711                 u32DummyPattern[0] = RCV_PATTERN_3;
6712                  u32DummyPattern[1] = RCV_PATTERN_1;
6713                  u32DummyPattern[2] = RCV_PATTERN_3;
6714                 u32PatternSize = 3;
6715                 break;
6716 
6717             default:
6718                 u32DummyPattern[0] = DUMMY_PATTERN;
6719                 u32DummyPattern[1] = DUMMY_PATTERN;
6720                 u32PatternSize = 2;
6721                 break;
6722         }
6723 
6724 
6725         for (i=0; i<u32PatternSize; i++)
6726         {
6727             temp[4*i+pInfo->u32Length] = ((u32DummyPattern[i])&0xff);
6728             temp[4*i+pInfo->u32Length+1] = ((u32DummyPattern[i]>>8)&0xff);
6729             temp[4*i+pInfo->u32Length+2] = ((u32DummyPattern[i]>>16)&0xff);
6730             temp[4*i+pInfo->u32Length+3] = ((u32DummyPattern[i]>>24)&0xff);
6731         }
6732 
6733         for(i=u32PatternSize*4;i<256;i++)
6734         {
6735             temp[pInfo->u32Length+i] = 0xFF;
6736         }
6737 
6738         pInfo->u32Length += 256;
6739     }
6740 
6741 
6742 #if _SLQTBL_DUMP_PUSHQ
6743     {
6744         //static MS_U32 u32pqTimes[MAX_DEC_NUM]= {0, 0};
6745 
6746         MVD_PRINT("Push[%x] st=0x%x len=0x%x pts=0x%x\n", pMVDHalContext->u32pqTimes[u8Idx]++,
6747                 pInfo->u32StAddr, pInfo->u32Length, pInfo->u32TimeStamp);
6748     }
6749 #endif
6750 
6751 #if SLQ_NEW_PUSH
6752     if((pInfo->u32StAddr & SLQ_PIC_START_FLAG) == SLQ_PIC_START_FLAG)
6753     {
6754         pInfo->u32StAddr = pInfo->u32StAddr&~SLQ_PIC_START_FLAG;
6755         pstSlqTblInfo->pSlqStatus->bSlqPicStart =TRUE;
6756         pstSlqTblInfo->pSlqStatus->bSlqCtrlBit = TRUE;
6757     }
6758     else
6759     {
6760         pstSlqTblInfo->pSlqStatus->bSlqPicStart = FALSE;
6761     }
6762 #endif
6763     //check input parameters
6764     if (pInfo->u32StAddr >= pstMemCfg->u32BSSize)
6765     {
6766         //since u32StAddr is offset, it shouldn't be larger than size.
6767         MVD_DEBUGERROR(MVD_PRINT("PushQueue invalid u32StAddr=0x%lx, bsSize=0x%lx\n", (unsigned long)pInfo->u32StAddr, (unsigned long)pstMemCfg->u32BSSize));
6768         return E_MVD_RET_INVALID_PARAM;
6769     }
6770     else if ((pInfo->u32TimeStamp == MVD_NULLPKT_PTS) && (pInfo->u32Length==0))
6771     {
6772         // AVI NULL packet.
6773         pstSlqTblInfo->u32DummyPktCnt++;
6774         //MVD_PRINT("Pos:0x%x%08x; PTS:%08d; NullPKT:%d\n", pInfo->u32ID_H, pInfo->u32ID_L, pInfo->u32TimeStamp, pstSlqTblInfo->u32DummyPktCnt);
6775         return E_MVD_RET_OK;
6776     }
6777 
6778     if (FALSE == (HAL_MVD_IsMStreamerMode(u8Idx) ||HAL_MVD_IsMcuMode(u8Idx)))
6779     {   //Check repeat PTS for non-MStreamer/Mcu mode.
6780         //MVD_PRINT(".Pos:0x%x%08x; PTS:%08d; NullPKT:%d\n", pInfo->u32ID_H, pInfo->u32ID_L, pInfo->u32TimeStamp, pstSlqTblInfo->u32DummyPktCnt);
6781         if (pInfo->u32TimeStamp == pstSlqTblInfo->u32LastPts)
6782         {
6783             //MVD_PRINT("Repeat PTS!\n");
6784             if (pInfo->u32TimeStamp != MVD_NULLPKT_PTS)
6785                 pInfo->u32TimeStamp = MVD_NULLPKT_PTS; //repeat PTS
6786         }
6787         else
6788         {
6789             pstSlqTblInfo->u32LastPts = pInfo->u32TimeStamp;
6790         }
6791     }
6792 
6793     //check queue vacancy
6794     if (pstSlqTblInfo->pDrvSlqTbl->u32Empty >= SLQ_TBL_SAFERANGE)
6795     {   //put packets
6796 #if SLQ_NEW_PUSH
6797         if (E_MVD_CODEC_DIVX311 == curCodecType
6798             ||E_MVD_CODEC_VC1_MAIN == curCodecType //rcv
6799             ||E_MVD_CODEC_VC1_ADV == curCodecType)
6800         {
6801             MVD_PacketInfo stHdr;
6802             if((pstSlqTblInfo->pSlqStatus->bSlqCtrlBit) || (E_MVD_CODEC_DIVX311 == curCodecType))
6803             {
6804                 MVD_SLQTblGetHdrPkt(u8Idx, &stHdr, pInfo);
6805 
6806                 if(pstSlqTblInfo->pSlqStatus->bSlqPicStart||(!pstSlqTblInfo->pSlqStatus->bSlqCtrlBit))
6807                 {
6808                     if (HAL_MVD_IsMStreamerMode(u8Idx) || HAL_MVD_IsMcuMode(u8Idx))
6809                     {   //to mark this packet's pts as unused.
6810                         stHdr.u32TimeStamp = MVD_NULLPKT_PTS;
6811                         stHdr.u32ID_H = MVD_NULLPKT_PTS;
6812                     }
6813 #ifdef VDEC3
6814                     if(pstCtrlCfg->u8McuMode == TRUE)
6815                     {
6816                         if(HAL_VPU_EX_GetVBBUVacancy(u32Id, u32VBBUAddr) > 1)
6817                         {
6818                             HAL_VPU_EX_PacketInfo stVpuPkt;
6819 
6820                             stVpuPkt.u32Offset = stHdr.u32StAddr;
6821                             stVpuPkt.u32Length = stHdr.u32Length;
6822                             stVpuPkt.u64TimeStamp = (MS_U64)stHdr.u32TimeStamp;
6823                             //If in display queue mode
6824                             stVpuPkt.u64TimeStamp |= ((MS_U64)stHdr.u32ID_H << 32);
6825                             stVpuPkt.u32ID_H = stHdr.u32ID_H;
6826                             stVpuPkt.u32ID_L = stHdr.u32ID_L;
6827 
6828                             pstSlqTblInfo->bSlqTblHasValidData = TRUE;
6829                             eRet = (E_MVD_Result)HAL_VPU_EX_Push2VBBU(u32Id, &stVpuPkt, u32VBBUAddr);
6830                         }
6831                         else
6832                         {
6833                             return E_MVD_RET_FAIL;
6834                         }
6835                     }
6836                     else
6837 #endif
6838                     {
6839                         HAL_MVD_SLQTblSendPacket(u8Idx, &stHdr);
6840                     }
6841                 }
6842             }
6843         }
6844  #else
6845         if (E_MVD_CODEC_DIVX311 == curCodecType)
6846         {
6847             MVD_PacketInfo stDivxHdr;
6848             MVD_SLQTblGetDivxHdrPkt(u8Idx, &stDivxHdr, pInfo);
6849             if (HAL_MVD_IsMStreamerMode(u8Idx) || HAL_MVD_IsMcuMode(u8Idx))
6850             {   //to mark this packet's pts as unused.
6851                 stDivxHdr.u32TimeStamp = MVD_NULLPKT_PTS;
6852                 stDivxHdr.u32ID_H = MVD_NULLPKT_PTS;
6853             }
6854             HAL_MVD_SLQTblSendPacket(u8Idx, &stDivxHdr);
6855         }
6856 #endif
6857 
6858 #ifdef VDEC3
6859         if(pstCtrlCfg->u8McuMode == TRUE)
6860         {
6861             if(HAL_VPU_EX_GetVBBUVacancy(u32Id, u32VBBUAddr) > 0)
6862             {
6863                 HAL_VPU_EX_PacketInfo stVpuPkt;
6864 
6865                 stVpuPkt.u32Offset = pInfo->u32StAddr;
6866                 stVpuPkt.u32Length = pInfo->u32Length;
6867                 stVpuPkt.u64TimeStamp = (MS_U64)pInfo->u32TimeStamp;
6868                  //If in display queue mode
6869                 stVpuPkt.u64TimeStamp |= ((MS_U64)pInfo->u32ID_H << 32);
6870                 stVpuPkt.u32ID_H = pInfo->u32ID_H;
6871                 stVpuPkt.u32ID_L = pInfo->u32ID_L;
6872 
6873                 pstSlqTblInfo->bSlqTblHasValidData = TRUE;
6874                 eRet = (E_MVD_Result)HAL_VPU_EX_Push2VBBU(u32Id, &stVpuPkt, u32VBBUAddr);
6875                 //VPRINTF("[%d]%s[%d],ret=%d,u32StAddr %x,u32Length %d,u32TimeStamp %d\n",u8Idx,__FUNCTION__,__LINE__,eRet,(unsigned int)pInfo->u32StAddr,(unsigned int)pInfo->u32Length,(unsigned int)pInfo->u32TimeStamp);
6876                 return eRet;
6877             }
6878             else
6879             {
6880                 return E_MVD_RET_FAIL;
6881             }
6882         }
6883         else
6884 #endif
6885         {
6886              HAL_MVD_SLQTblSendPacket(u8Idx, pInfo);
6887              eRet=E_MVD_RET_OK;
6888              pstSlqTblInfo->bSlqTblHasValidData = TRUE;
6889         }
6890     }
6891     else
6892     {
6893         MS_ASSERT(0); //shouldn't be here!
6894         MVD_DEBUGERROR(MVD_PRINT("PushQueue FULL!!! empty=0x%lx\n", (unsigned long)pstSlqTblInfo->pDrvSlqTbl->u32Empty));
6895         //Player will only push queue when queue vacancy != 0
6896         eRet=E_MVD_RET_QUEUE_FULL;
6897     }
6898 
6899     if (E_MVD_RET_OK != eRet)
6900     {
6901         MVD_DEBUGERROR(MVD_PRINT("%s ret = %d\n", __FUNCTION__, eRet));
6902     }
6903     return eRet;
6904 }
6905 
6906 
MVD_FlushTSQueue(MS_U8 u8Idx)6907 static E_MVD_Result MVD_FlushTSQueue(MS_U8 u8Idx)
6908 {
6909     if (HAL_MVD_GetLastCmd(u8Idx)!=CMD_PAUSE)
6910     {
6911         HAL_MVD_PauseDisp(u8Idx);
6912         HAL_MVD_DecodePause(u8Idx);
6913         HAL_MVD_FlushDisplayBuf(u8Idx);
6914     }
6915 
6916     if(HAL_MVD_SkipData(u8Idx) == FALSE)
6917     {
6918         return E_MVD_RET_FAIL;
6919     }
6920     else
6921     {
6922         return E_MVD_RET_OK;
6923     }
6924 }
6925 
6926 
MVD_PatternLenIsValid(MS_U8 u8Idx,MS_U32 u32Len)6927 static MS_BOOL MVD_PatternLenIsValid(MS_U8 u8Idx, MS_U32 u32Len)
6928 {
6929     MS_U32 u32ValidLen = 0;
6930     MVD_CodecType curCodecType = HAL_MVD_GetCodecType(u8Idx);
6931 #define MAX_VALIDLEN    0x200000    //2M
6932 
6933     if (E_MVD_CODEC_VC1_MAIN != curCodecType)
6934     {
6935         return TRUE;
6936     }
6937     else
6938     {
6939         //only RCV has to check this
6940         u32ValidLen = HAL_MVD_GetPayloadLen(u8Idx);
6941         if (u32ValidLen > MAX_VALIDLEN)
6942         {   //avoid the extreme large value due to error bitstream
6943             u32ValidLen = MAX_VALIDLEN;
6944         }
6945         MVD_DEBUGINFO(MVD_PRINT("(%x) ValidLen=0x%x CurLen=0x%x\n",
6946                        (u32Len > u32ValidLen), u32ValidLen, u32Len));
6947         return (u32Len > u32ValidLen);
6948     }
6949 }
6950 
MVD_FlushSlqTblQueue(MS_U8 u8Idx)6951 static E_MVD_Result MVD_FlushSlqTblQueue(MS_U8 u8Idx)
6952 {
6953     MS_U32 u32TimeCnt;
6954     MS_U32 u32PatternByteCnt = 0;
6955     MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
6956     MS_U32 u32Id = MVD_GetStreamId(u8Idx);
6957     MS_U8 u8VPUIdx = HAL_VPU_EX_GetTaskId(u32Id);
6958 #ifdef VDEC3
6959     MVD_CtrlCfg* pstCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
6960     MS_VIRT u32VBBUAddr = HAL_MVD_GetVBBUTableAddr(u8VPUIdx);
6961 #endif
6962     HAL_MVD_ResetHandShake(u8Idx,MVD_HANDSHAKE_PAUSE);
6963     HAL_MVD_PauseDisp(u8Idx);
6964     HAL_MVD_DecodePause(u8Idx);
6965     HAL_MVD_FlushDisplayBuf(u8Idx);
6966 
6967     u32TimeCnt = HAL_MVD_GetTime();
6968     while (((HAL_MVD_GetTime() - u32TimeCnt) < CMD_TIMEOUT_MS) ||
6969            (TRUE != MVD_PatternLenIsValid(u8Idx, u32PatternByteCnt)))
6970     {
6971         if (HAL_MVD_IsCmdFinished(u8Idx, MVD_HANDSHAKE_PAUSE))
6972         {
6973             MVD_DEBUGINFO(MVD_PRINT("\nPause finished!\n"));
6974             break;
6975         }
6976 
6977 #ifdef VDEC3
6978         if(pstCtrlCfg->u8McuMode == TRUE)
6979         {
6980             if(HAL_VPU_EX_GetVBBUVacancy(u32Id, u32VBBUAddr) > 0)
6981             {
6982                 HAL_VPU_EX_PacketInfo stVpuPkt;
6983                 MVD_PacketInfo stDummyPkt;
6984                 MVD_SLQTblGetDummyPkt(&stDummyPkt);
6985 
6986                 stVpuPkt.u32Offset = stDummyPkt.u32StAddr;
6987                 stVpuPkt.u32Length = stDummyPkt.u32Length;
6988                 stVpuPkt.u64TimeStamp = (MS_U64)stDummyPkt.u32TimeStamp;
6989                 //If in display queue mode
6990                 stVpuPkt.u64TimeStamp |= ((MS_U64)stDummyPkt.u32ID_H << 32);
6991                 stVpuPkt.u32ID_H = stDummyPkt.u32ID_H;
6992                 stVpuPkt.u32ID_L = stDummyPkt.u32ID_L;
6993 
6994                 HAL_VPU_EX_Push2VBBU(u32Id, &stVpuPkt,u32VBBUAddr);
6995             }
6996         }
6997         else
6998 #endif
6999         {
7000             if (pstSlqTblInfo->pDrvSlqTbl->u32Empty < SLQ_TBL_SAFERANGE)
7001             {
7002                 HAL_MVD_GetQueueVacancy(u8Idx, FALSE); //update pstSlqTblInfo->pDrvSlqTbl->u32Empty
7003                 HAL_MVD_Delayms(1);  //avoid busy query
7004             }
7005             //insert dummy pattern
7006             if (TRUE == HAL_MVD_SLQTblInsertPattern(u8Idx, E_MVD_PATTERN_FLUSH))
7007             {
7008                 u32PatternByteCnt += DUMMY_SIZE*2; //2 dummy were inserted
7009             }
7010         }
7011 
7012 
7013         //Timeout for RCV
7014         if ((HAL_MVD_GetTime() - u32TimeCnt) > (CMD_TIMEOUT_MS*10))
7015         {
7016             MVD_DEBUGERROR(MVD_PRINT("RCV timeout!!! pl=%d, pbc=%d, emp=%ld\n",
7017                            HAL_MVD_GetPayloadLen(u8Idx), u32PatternByteCnt,
7018                            (unsigned long)pstSlqTblInfo->pDrvSlqTbl->u32Empty));
7019             break;
7020         }
7021     }
7022     MVD_DEBUGINFO(MVD_PRINT("====> %s (t1=%u t2=%u diff=%u)\n", __FUNCTION__,
7023             u32TimeCnt, HAL_MVD_GetTime(), (HAL_MVD_GetTime() - u32TimeCnt)));
7024     //if ((HAL_MVD_GetTime() - u32TimeCnt) >= CMD_TIMEOUT_MS)
7025     if (TRUE != HAL_MVD_IsCmdFinished(u8Idx, MVD_HANDSHAKE_PAUSE))
7026     {
7027         MVD_DEBUGERROR(MVD_PRINT("\n***** MDrv_MVD_FlushQueue PAUSE TIMEOUT!!! *****\n\n"));
7028         MVD_DEBUGERROR(MVD_PRINT("ValidLen=0x%x CurPatternLen=0x%x\n",
7029                       HAL_MVD_GetPayloadLen(u8Idx), u32PatternByteCnt));
7030 
7031         return E_MVD_RET_FAIL;
7032     }
7033 
7034     //flush ES buffer & reset SLQ tbl
7035     HAL_MVD_ResetHandShake(u8Idx, MVD_HANDSHAKE_SLQ_RST);
7036     if (HAL_MVD_SlqTblRst(u8Idx) == TRUE)
7037     {
7038         //return E_MVD_RET_OK;
7039     }
7040 
7041     u32TimeCnt = HAL_MVD_GetTime();
7042     while (((HAL_MVD_GetTime() - u32TimeCnt) < CMD_TIMEOUT_MS))
7043     {
7044         if (HAL_MVD_IsCmdFinished(u8Idx, MVD_HANDSHAKE_SLQ_RST))
7045         {
7046             MVD_DEBUGINFO(MVD_PRINT("\nSlqRst finished!\n"));
7047             break;
7048         }
7049     }
7050     MVD_DEBUGINFO(MVD_PRINT("====> %s (t1=%u t2=%u diff=%u)\n", __FUNCTION__,
7051             u32TimeCnt, HAL_MVD_GetTime(), (HAL_MVD_GetTime() - u32TimeCnt)));
7052     if (TRUE != HAL_MVD_IsCmdFinished(u8Idx, MVD_HANDSHAKE_SLQ_RST))
7053     {
7054         MVD_DEBUGERROR(MVD_PRINT("\n***** MDrv_MVD_FlushQueue SlqRst TIMEOUT!!! *****\n\n"));
7055         return E_MVD_RET_FAIL;
7056     }
7057 
7058     HAL_MVD_SLQTblInit(u8Idx); //reset related buffers
7059 
7060     return E_MVD_RET_OK;
7061 }
7062 
HAL_MVD_FlushQueue(MS_U8 u8Idx)7063 E_MVD_Result HAL_MVD_FlushQueue(MS_U8 u8Idx)
7064 {
7065     E_MVD_Result eRet = E_MVD_RET_OK;
7066     MVD_SrcMode curSrcMode = HAL_MVD_GetSrcMode(u8Idx);
7067 
7068     if (HAL_MVD_GetDecodeStatus(u8Idx) == E_MVD_STAT_IDLE)
7069     {
7070         return eRet;
7071     }
7072 
7073     //flush ES buffer (and cmd queue if used)
7074     if (E_MVD_SLQ_TBL_MODE == curSrcMode)
7075     {
7076         eRet = MVD_FlushSlqTblQueue(u8Idx);
7077     }
7078     else if (E_MVD_TS_FILE_MODE == curSrcMode)
7079     {
7080         eRet = MVD_FlushTSQueue(u8Idx);
7081     }
7082     if (E_MVD_RET_OK != eRet)
7083     {
7084         return eRet;
7085     }
7086 
7087     MVD_RstFrmInfo(u8Idx, E_MVD_FRMINFO_DECODE);
7088     //flush display buffer
7089 
7090     if (HAL_MVD_FlushDisplayBuf(u8Idx) != TRUE)
7091     {
7092         return E_MVD_RET_FAIL;
7093     }
7094 
7095     if (TRUE == HAL_MVD_SkipToIFrame(u8Idx))
7096     {
7097         return E_MVD_RET_OK;
7098     }
7099     else
7100     {
7101         return E_MVD_RET_FAIL;
7102     }
7103 }
7104 
HAL_MVD_IsAllBufferEmpty(MS_U8 u8Idx)7105 MS_BOOL HAL_MVD_IsAllBufferEmpty(MS_U8 u8Idx)
7106 {
7107     return HAL_MVD_IsCmdFinished(u8Idx, MVD_HANDSHAKE_SKIP_DATA);
7108 }
7109 
HAL_MVD_EnableInt(MS_U8 u8Idx,MS_U32 bEn)7110 MS_BOOL HAL_MVD_EnableInt(MS_U8 u8Idx, MS_U32 bEn)
7111 {
7112     MVD_CmdArg mvdcmd;
7113     MS_U32 u32IntFlag = 0;
7114 
7115     u32IntFlag = (((bEn & E_MVD_EVENT_USER_DATA) == E_MVD_EVENT_USER_DATA) ? INT_USER_DATA : 0) |
7116                  (((bEn & E_MVD_EVENT_USER_DATA_DISP) == E_MVD_EVENT_USER_DATA_DISP) ? INT_USER_DATA_DISP : 0) |
7117                  (((bEn & E_MVD_EVENT_PIC_FOUND) == E_MVD_EVENT_PIC_FOUND) ? INT_PIC_FOUND : 0) |
7118                  (((bEn & E_MVD_EVENT_FIRST_FRAME) == E_MVD_EVENT_FIRST_FRAME) ? INT_FIRST_FRAME : 0) |
7119                  (((bEn & E_MVD_EVENT_DISP_RDY) == E_MVD_EVENT_DISP_RDY) ? INT_DISP_RDY : 0) |
7120                  (((bEn & E_MVD_EVENT_SEQ_FOUND) == E_MVD_EVENT_SEQ_FOUND) ? INT_SEQ_FOUND : 0)|
7121                  (((bEn & E_MVD_EVENT_DEC_ONE_FRAME) == E_MVD_EVENT_DEC_ONE_FRAME) ? INT_DEC_DONE : 0)|
7122                  (((bEn & E_MVD_EVENT_DEC_ERR) == E_MVD_EVENT_DEC_ERR) ? INT_DEC_ERR : 0)|
7123                  (((bEn & E_MVD_EVENT_DEC_DATA_ERR) == E_MVD_EVENT_DEC_DATA_ERR) ? INT_VES_INVALID : 0)|
7124                  (((bEn & E_MVD_EVENT_XC_LOW_DEALY) == E_MVD_EVENT_XC_LOW_DEALY) ? INT_XC_LOW_DELAY : 0)|
7125                  (((bEn & E_MVD_EVENT_DEC_I) == E_MVD_EVENT_DEC_I) ? INT_DEC_I : 0);
7126     if (((bEn & E_MVD_EVENT_DISP_VSYNC) == E_MVD_EVENT_DISP_VSYNC) ||
7127         ((bEn & E_MVD_EVENT_UNMUTE) == E_MVD_EVENT_UNMUTE))
7128     {
7129         u32IntFlag |= INT_DISP_VSYNC;
7130     }
7131 
7132     MVD_DEBUGINFO(MVD_PRINT("u32IntFlag = 0x%x\n", u32IntFlag));
7133     SETUP_CMDARG(mvdcmd);
7134     mvdcmd.Arg0 = u32IntFlag & 0xff;
7135     mvdcmd.Arg1 = (u32IntFlag>>8) & 0xff;
7136     mvdcmd.Arg2 = (u32IntFlag>>16) & 0xff;
7137     SET_DECNUM(mvdcmd, u8Idx);
7138     SET_CMD_RET_FALSE(CMD_ENABLE_INT_STAT, &mvdcmd);
7139 
7140     return TRUE;
7141 }
7142 
HAL_MVD_EnablePTSDetector(MS_U8 u8Idx,MS_BOOL bEn)7143 E_MVD_Result HAL_MVD_EnablePTSDetector(MS_U8 u8Idx, MS_BOOL bEn)
7144 {
7145     MVD_CmdArg stCmdArg;
7146 
7147     SETUP_CMDARG(stCmdArg);
7148     if(TRUE == bEn)
7149     {
7150         stCmdArg.Arg0 = 1;
7151     }
7152     SET_DECNUM(stCmdArg, u8Idx);
7153     if (HAL_MVD_MVDCommand(CMD_PTS_DETECTOR_EN, &stCmdArg) == FALSE)
7154     {
7155         MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_PTS_DETECTOR_EN ) );
7156         return E_MVD_RET_FAIL;
7157     }
7158     return E_MVD_RET_OK;
7159 }
7160 
HAL_MVD_DisablePBFrameMode(MS_U8 u8Idx,MS_BOOL bEn)7161 E_MVD_Result HAL_MVD_DisablePBFrameMode(MS_U8 u8Idx, MS_BOOL bEn)
7162 {
7163     MVD_CmdArg stCmdArg;
7164 
7165     SETUP_CMDARG(stCmdArg);
7166     if(TRUE == bEn)
7167     {
7168         stCmdArg.Arg0 = 1;
7169     }
7170     SET_DECNUM(stCmdArg, u8Idx);
7171     if (HAL_MVD_MVDCommand(CMD_DISABLE_PATCH_PBFRAME, &stCmdArg) == FALSE)
7172     {
7173         MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_PTS_DETECTOR_EN ) );
7174         return E_MVD_RET_FAIL;
7175     }
7176     return E_MVD_RET_OK;
7177 }
7178 
HAL_MVD_EnableDispOneField(MS_U8 u8Idx,MS_BOOL bEn)7179 E_MVD_Result HAL_MVD_EnableDispOneField(MS_U8 u8Idx, MS_BOOL bEn)
7180 {
7181     MVD_CmdArg stCmdArg;
7182 
7183     SETUP_CMDARG(stCmdArg);
7184     if(TRUE == bEn)
7185     {
7186         stCmdArg.Arg0 = 1;
7187         //stCmdArg.Arg1 = 1; //0:default 1:top 2:bottom
7188     }
7189 
7190     SET_DECNUM(stCmdArg, u8Idx);
7191 
7192     if (HAL_MVD_MVDCommand(CMD_SHOW_ONE_FIELD, &stCmdArg) == FALSE)
7193     {
7194         MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_SHOW_ONE_FIELD ) );
7195         return E_MVD_RET_FAIL;
7196     }
7197     return E_MVD_RET_OK;
7198 }
7199 
HAL_MVD_SetFdMaskDelayCount(MS_U8 u8Idx,MS_U16 u16Cnt)7200 E_MVD_Result HAL_MVD_SetFdMaskDelayCount(MS_U8 u8Idx, MS_U16 u16Cnt)
7201 {
7202     MVD_CmdArg stCmdArg;
7203 
7204     SETUP_CMDARG(stCmdArg);
7205     //16bits and unit in vsync for mute the fd_mask
7206     stCmdArg.Arg0 = u16Cnt & 0xff;
7207     stCmdArg.Arg1 = (u16Cnt>>8) & 0xff;
7208     SET_DECNUM(stCmdArg, u8Idx);
7209     if (HAL_MVD_MVDCommand(CMD_FD_MASK_DELAY_CNT, &stCmdArg) == FALSE)
7210     {
7211         MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_FD_MASK_DELAY_CNT ) );
7212         return E_MVD_RET_FAIL;
7213     }
7214     return E_MVD_RET_OK;
7215 }
7216 
HAL_MVD_SetOutputFRCMode(MS_U8 u8Idx,MS_U8 u8FrameRate,MS_U8 u8Interlace)7217 E_MVD_Result HAL_MVD_SetOutputFRCMode(MS_U8 u8Idx, MS_U8 u8FrameRate, MS_U8 u8Interlace)
7218 {
7219     MVD_CmdArg stCmdArg;
7220     if((u8Interlace != 0) && (u8Interlace != 1))
7221     {
7222         return E_MVD_RET_FAIL;
7223     }
7224     SETUP_CMDARG(stCmdArg);
7225     stCmdArg.Arg0 = u8FrameRate;
7226     stCmdArg.Arg1 = u8Interlace;
7227     SET_DECNUM(stCmdArg, u8Idx);
7228     if (HAL_MVD_MVDCommand(CMD_FRC_OUPUT, &stCmdArg) == FALSE)
7229     {
7230         MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_FRC_OUPUT ) );
7231         return E_MVD_RET_FAIL;
7232     }
7233     return E_MVD_RET_OK;
7234 }
7235 
7236 
HAL_MVD_SetFRCDropType(MS_U8 u8Idx,MS_U8 u8DropType)7237 E_MVD_Result HAL_MVD_SetFRCDropType(MS_U8 u8Idx, MS_U8 u8DropType)
7238 {
7239     MVD_CmdArg stCmdArg;
7240 
7241     if((u8DropType != FRC_DROP_FRAME)
7242     && (u8DropType != FRC_DROP_FIELD))
7243     {
7244         return E_MVD_RET_FAIL;
7245     }
7246 
7247     SETUP_CMDARG(stCmdArg);
7248     stCmdArg.Arg0 = u8DropType;
7249     SET_DECNUM(stCmdArg, u8Idx);
7250     if (HAL_MVD_MVDCommand(CMD_FRC_DROP_BEHAVIOR, &stCmdArg) == FALSE)
7251     {
7252         MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_FRC_DROP_BEHAVIOR ) );
7253         return E_MVD_RET_FAIL;
7254     }
7255     return E_MVD_RET_OK;
7256 }
7257 
HAL_MVD_SetDisableSeqChange(MS_U8 u8Idx,MS_BOOL bEnable)7258 E_MVD_Result HAL_MVD_SetDisableSeqChange(MS_U8 u8Idx, MS_BOOL bEnable)
7259 {
7260     MVD_CmdArg stCmdArg;
7261 
7262     SETUP_CMDARG(stCmdArg);
7263     stCmdArg.Arg0 = bEnable;
7264     SET_DECNUM(stCmdArg, u8Idx);
7265     if (HAL_MVD_MVDCommand(CMD_FORBID_RESOLUTION_CHANGE, &stCmdArg) == FALSE)
7266     {
7267         MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_FORBID_RESOLUTION_CHANGE ) );
7268         return E_MVD_RET_FAIL;
7269     }
7270     MVD_DEBUGINFO(MVD_PRINT("MVD CMD_FORBID_RESOLUTION_CHANGE(0x%x) OK\n", bEnable));
7271 
7272     return E_MVD_RET_OK;
7273 }
7274 
HAL_MVD_DbgGetData(MS_VIRT u32Addr,MS_U32 * u32Data)7275 E_MVD_Result HAL_MVD_DbgGetData(MS_VIRT u32Addr, MS_U32* u32Data)
7276 {
7277     MVD_CmdArg mvdcmd;
7278     MS_U32 u32Val;
7279 
7280     if (!u32Data)
7281     {
7282         return E_MVD_RET_INVALID_PARAM;
7283     }
7284 
7285     SET_CMDARG(mvdcmd, u32Addr, 0);  //FIXME
7286     if (HAL_MVD_MVDCommand( CMD_RD_IO, &mvdcmd ) == FALSE)
7287     {
7288         MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_RD_IO ) );
7289         return E_MVD_RET_FAIL;
7290     }
7291 
7292     u32Val = (((MS_U32)mvdcmd.Arg2)) | ((MS_U32)mvdcmd.Arg3 << 8) |
7293              (((MS_U32)mvdcmd.Arg4) << 16) | (((MS_U32)mvdcmd.Arg5) << 24);
7294     *u32Data = u32Val;
7295 
7296     return E_MVD_RET_OK;
7297 }
7298 
7299 
HAL_MVD_DbgDumpBits(MS_U8 u8Idx,MS_PHY u32base,MS_U32 u32size)7300 void HAL_MVD_DbgDumpBits(MS_U8 u8Idx, MS_PHY u32base, MS_U32 u32size)
7301 {
7302     MVD_CmdArg mvdcmd;
7303 
7304     u32base = HAL_MVD_GetMemOffset(u32base);
7305     MVD_PRINT("%s base=0x%lx size=0x%x\n", __FUNCTION__, (unsigned long)u32base, u32size);
7306     MS_ASSERT((u32base%8)==0);
7307     u32base >>= 3;
7308     SET_CMDARG(mvdcmd, u32base, u8Idx);
7309     if (HAL_MVD_MVDCommand( CMD_DUMP_BITSTREAM_BASE, &mvdcmd ) == FALSE)
7310     {
7311         MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\n", CMD_DUMP_BITSTREAM_BASE ) );
7312         return;
7313     }
7314 
7315     MS_ASSERT((u32size%8)==0);
7316     u32size >>= 3;
7317     SET_CMDARG(mvdcmd, u32size, u8Idx);
7318     if (HAL_MVD_MVDCommand( CMD_DUMP_BITSTREAM_LENGTH, &mvdcmd ) == FALSE)
7319     {
7320         MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\n", CMD_DUMP_BITSTREAM_LENGTH ) );
7321         return;
7322     }
7323     return;
7324 }
7325 
7326 
HAL_MVD_GetActiveFormat(MS_U8 u8Idx)7327 MS_U8 HAL_MVD_GetActiveFormat(MS_U8 u8Idx)
7328 {
7329     MVD_CmdArg mvdcmd;
7330     MS_U8 u8Afd = 0;
7331 
7332     SETUP_CMDARG(mvdcmd);
7333     SET_DECNUM(mvdcmd, u8Idx);
7334     if (HAL_MVD_MVDCommand( CMD_GET_AFD, &mvdcmd ) == FALSE)
7335     {
7336         MVD_DEBUGERROR( MVD_PRINT( "Ctrl: 0x%x fail!!\r\n", CMD_GET_AFD  ) );
7337         return 0xff;
7338     }
7339     u8Afd = mvdcmd.Arg0;
7340     return u8Afd;
7341 }
7342 
HAL_MVD_EnableAVSync(MS_U8 u8Idx,MS_BOOL bEnable)7343 MS_BOOL HAL_MVD_EnableAVSync(MS_U8 u8Idx, MS_BOOL bEnable)
7344 {
7345     MVD_CmdArg mvdcmd;
7346     SETUP_CMDARG(mvdcmd);
7347     mvdcmd.Arg0 = bEnable;
7348     SET_DECNUM(mvdcmd, u8Idx);
7349     SET_CMD_RET_FALSE(CMD_SYNC_ON, &mvdcmd);
7350 
7351     MVD_CtrlCfg* pCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
7352     pCtrlCfg->bAVSyncOn = bEnable;
7353 
7354     return TRUE;
7355 }
7356 
HAL_MVD_SetAVSyncDelay(MS_U8 u8Idx,MS_U32 u32Delay)7357 MS_BOOL HAL_MVD_SetAVSyncDelay(MS_U8 u8Idx, MS_U32 u32Delay)
7358 {
7359     MVD_CmdArg mvdcmd;
7360     SET_CMDARG(mvdcmd, _MS_TO_90K(u32Delay), u8Idx); //u32Delay ms ==> 90k counter
7361     SET_CMD_RET_FALSE(CMD_SYNC_OFFSET, &mvdcmd);
7362     return TRUE;
7363 }
7364 
HAL_MVD_SetAVSyncThreshold(MS_U8 u8Idx,MS_U32 u32Th)7365 MS_BOOL HAL_MVD_SetAVSyncThreshold(MS_U8 u8Idx, MS_U32 u32Th)
7366 {
7367     MVD_CmdArg mvdcmd;
7368 
7369     if (u32Th == 0x00)
7370     {
7371         return FALSE; //invalid parameter, do nothing
7372     }
7373     if (u32Th > 0xff)
7374     {
7375         u32Th = 0xff; //set to maximum
7376     }
7377 
7378     SETUP_CMDARG(mvdcmd);
7379     mvdcmd.Arg3 = u32Th;
7380     SET_DECNUM(mvdcmd, u8Idx);
7381     SET_CMD_RET_FALSE(CMD_SYN_THRESHOLD, &mvdcmd);
7382     return TRUE;
7383 }
7384 
HAL_MVD_SetAVSyncFreerunThreshold(MS_U8 u8Idx,MS_U32 u32Th)7385 MS_BOOL HAL_MVD_SetAVSyncFreerunThreshold(MS_U8 u8Idx, MS_U32 u32Th)
7386 {
7387     MVD_CmdArg mvdcmd;
7388     SET_CMDARG(mvdcmd, u32Th, u8Idx);
7389     SET_CMD_RET_FALSE(CMD_AVSYNC_FREERUN_THRESHOLD, &mvdcmd);
7390     return TRUE;
7391 }
7392 
HAL_MVD_ChangeAVsync(MS_U8 u8Idx,MS_BOOL bEnable,MS_U16 u16PTS)7393 MS_BOOL HAL_MVD_ChangeAVsync(MS_U8 u8Idx, MS_BOOL bEnable, MS_U16 u16PTS)
7394 {
7395     MVD_CmdArg mvdcmd;
7396 
7397     u16PTS = _MS_TO_90K(u16PTS); //u16PTS ms ==> 90k counter
7398     SETUP_CMDARG(mvdcmd);
7399     mvdcmd.Arg0 = (MS_U8)bEnable;
7400     mvdcmd.Arg1 = 0;
7401     mvdcmd.Arg2 = (MS_U8)(u16PTS&0xff);
7402     mvdcmd.Arg3 = (MS_U8)((u16PTS&0xff00)>>8);
7403     SET_DECNUM(mvdcmd, u8Idx);
7404     SET_CMD_RET_FALSE(CMD_MVD_FAST_INT, &mvdcmd);
7405     return TRUE;
7406 }
7407 
HAL_MVD_GetIsSyncRep(MS_U8 u8Idx)7408 MS_BOOL HAL_MVD_GetIsSyncRep(MS_U8 u8Idx)
7409 {
7410     MS_U32 u32IntStat = 0;
7411     MS_BOOL bRet = FALSE;
7412 
7413     u32IntStat = HAL_MVD_GetIntState(u8Idx);
7414     if (u32IntStat != 0)
7415     {
7416         bRet = ((u32IntStat&INT_SYN_REP)==INT_SYN_REP) ? TRUE : FALSE;
7417     }
7418     return bRet;
7419 }
7420 
HAL_MVD_GetIsSyncSkip(MS_U8 u8Idx)7421 MS_BOOL HAL_MVD_GetIsSyncSkip(MS_U8 u8Idx)
7422 {
7423     MS_U32 u32IntStat = 0;
7424     MS_BOOL bRet = FALSE;
7425 
7426     u32IntStat = HAL_MVD_GetIntState(u8Idx);
7427     if (u32IntStat != 0)
7428     {
7429         bRet = ((u32IntStat&INT_SYN_SKIP)==INT_SYN_SKIP) ? TRUE : FALSE;
7430     }
7431 
7432     return bRet;
7433 }
7434 
HAL_MVD_GetIsSyncReach(MS_U8 u8Idx)7435 MS_U8 HAL_MVD_GetIsSyncReach(MS_U8 u8Idx)
7436 {
7437 #define MVD_SYNC_DONE    1
7438     if(MVD_GetSyncStat(u8Idx, 1) == MVD_SYNC_DONE)
7439         return 1;
7440     else
7441         return 0xFF;
7442 }
7443 
HAL_MVD_GetDispRdy(MS_U8 u8Idx)7444 MS_U8 HAL_MVD_GetDispRdy(MS_U8 u8Idx)
7445 {
7446     if (HAL_MVD_GetPicCounter(u8Idx) > 0)
7447     {
7448         return 1;
7449     }
7450     else
7451     {
7452         return 0;
7453     }
7454 }
7455 
HAL_MVD_GetDecodeStatus(MS_U8 u8Idx)7456 MVD_DecStat HAL_MVD_GetDecodeStatus(MS_U8 u8Idx)
7457 {
7458     MVD_CmdArg mvdcmd;
7459     MVD_DecStat stat = E_MVD_STAT_UNKNOWN;
7460 
7461     SETUP_CMDARG(mvdcmd);
7462     SET_DECNUM(mvdcmd, u8Idx);
7463     if (HAL_MVD_MVDCommand(CMD_DECODE_STATUS, &mvdcmd) == FALSE)
7464     {
7465         MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_DECODE_STATUS ) );
7466         return E_MVD_STAT_UNKNOWN;
7467     }
7468 
7469     switch(mvdcmd.Arg1)
7470     {
7471         case DEC_STAT_IDLE:
7472             stat = E_MVD_STAT_IDLE;
7473             break;
7474         case DEC_STAT_FIND_SC:
7475             stat = E_MVD_STAT_FIND_STARTCODE;
7476             break;
7477         case DEC_STAT_FIND_SPE_SC:
7478             stat = E_MVD_STAT_FIND_SPECIALCODE;
7479             break;
7480         case DEC_STAT_FIND_FRAMEBUFFER:
7481             stat = E_MVD_STAT_FIND_FRAMEBUFFER;
7482             break;
7483         case DEC_STAT_WAIT_DECODE_DONE:
7484             stat = E_MVD_STAT_WAIT_DECODEDONE;
7485             break;
7486         case DEC_STAT_DECODE_DONE:
7487             stat = E_MVD_STAT_DECODE_DONE;
7488             break;
7489         case DEC_STAT_WAIT_VDFIFO:
7490             stat = E_MVD_STAT_WAIT_VDFIFO;
7491             break;
7492         case DEC_STAT_INIT_SUCCESS:
7493             stat = E_MVD_STAT_INIT_SUCCESS;
7494             break;
7495         default:
7496             break;
7497     }
7498 
7499     return stat;
7500 }
7501 
HAL_MVD_GetLastCmd(MS_U8 u8Idx)7502 MS_U8 HAL_MVD_GetLastCmd(MS_U8 u8Idx)
7503 {
7504     MVD_CmdArg mvdcmd;
7505     SETUP_CMDARG(mvdcmd);
7506     SET_DECNUM(mvdcmd, u8Idx);
7507     if (HAL_MVD_MVDCommand( CMD_DECODE_STATUS, &mvdcmd ) == FALSE)
7508     {
7509         MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_DECODE_STATUS ) );
7510         return 0xff;
7511     }
7512 
7513     return (mvdcmd.Arg0);
7514 }
7515 
HAL_MVD_GetParserByteCnt(MS_U8 u8Idx)7516 MS_U32 HAL_MVD_GetParserByteCnt(MS_U8 u8Idx)
7517 {
7518     MVD_CmdArg mvdcmd;
7519     MS_U32 u32Cnt = 0;
7520 
7521     SETUP_CMDARG(mvdcmd);
7522 
7523     //To be accurate, it's "VLD byte count", instead of "parser byte count".
7524     mvdcmd.Arg0 = 0x34;
7525     mvdcmd.Arg1 = 0x2;
7526     SET_DECNUM(mvdcmd, u8Idx);
7527     if (HAL_MVD_MVDCommand( CMD_RD_IO, &mvdcmd ) == FALSE)
7528     {
7529         MVD_DEBUGERROR( MVD_PRINT( "Ctrl: 0x%x fail!!\r\n", CMD_RD_IO  ) );
7530         return 0;
7531     }
7532     u32Cnt = (((MS_U32)mvdcmd.Arg2)) | ((MS_U32)mvdcmd.Arg3 << 8) |
7533              (((MS_U32)mvdcmd.Arg4) << 16) | (((MS_U32)mvdcmd.Arg5) << 24);
7534 
7535     //MVD_PRINT("  parser byte count = %lu byte \n", u32Cnt);
7536     return u32Cnt;
7537 }
7538 
HAL_MVD_DropErrorFrame(MS_U8 u8Idx,MS_BOOL bDrop)7539 MS_BOOL HAL_MVD_DropErrorFrame(MS_U8 u8Idx, MS_BOOL bDrop)
7540 {
7541     MVD_CmdArg mvdcmd;
7542     MVD_CtrlCfg* pstCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
7543 
7544     SETUP_CMDARG(mvdcmd);
7545     mvdcmd.Arg1 = (MS_U8)bDrop;
7546     mvdcmd.Arg2 = (MS_U8)pstCtrlCfg->bDropDispfrm;
7547     mvdcmd.Arg3 = (MS_U8)pstCtrlCfg->eFrcMode;
7548     SET_DECNUM(mvdcmd, u8Idx);
7549     SET_CMD_RET_FALSE(CMD_DISPLAY_CTL, &mvdcmd);
7550     return TRUE;
7551 }
7552 
HAL_MVD_SetDivXCfg(MS_U8 u8Idx,MS_U8 u8MvAdjust,MS_U8 u8IdctSel)7553 void HAL_MVD_SetDivXCfg(MS_U8 u8Idx, MS_U8 u8MvAdjust, MS_U8 u8IdctSel)
7554 {
7555     MVD_CmdArg stCmdArg;
7556 
7557     SETUP_CMDARG(stCmdArg);
7558     stCmdArg.Arg0 = u8MvAdjust;
7559     SET_DECNUM(stCmdArg, u8Idx);
7560     if (HAL_MVD_MVDCommand(CMD_DIVX_PATCH, &stCmdArg) == FALSE)
7561     {
7562         MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_DIVX_PATCH ) );
7563         return;
7564     }
7565 
7566     SETUP_CMDARG(stCmdArg);
7567     stCmdArg.Arg0 = u8IdctSel;
7568     SET_DECNUM(stCmdArg, u8Idx);
7569     if (HAL_MVD_MVDCommand(CMD_IDCT_SEL, &stCmdArg) == FALSE)
7570     {
7571         MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_IDCT_SEL ) );
7572         return;
7573     }
7574 
7575     return;
7576 }
7577 
7578 #define _IsNotInStreamBuff(x)                                       \
7579         (((x) < pstMemCfg->u32DrvBufSize) ||   \
7580          ((x) > pstMemCfg->u32BSSize) )
7581 
7582 //------------------------------------------------------------------------------
7583 /// Get read pointer in ElementaryStream buffer for SLQ table mode
7584 /// @return -the read pointer
7585 //------------------------------------------------------------------------------
MVD_GetSlqTblESReadPtr(MS_U8 u8Idx)7586 MS_VIRT MVD_GetSlqTblESReadPtr(MS_U8 u8Idx)
7587 {
7588     MS_U32 u32Idx;
7589     MS_U32 u32SlqRp = 0, u32SlqRp1 = 0;
7590     MS_VIRT u32EsRp;
7591     MS_VIRT u32EsStart;
7592     MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
7593     MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
7594     MVD_CodecType curCodecType = HAL_MVD_GetCodecType(u8Idx);
7595 
7596     u32SlqRp1 = HAL_MVD_GetSLQReadPtr(u8Idx);
7597 
7598     if (u32SlqRp1 == 0)
7599     {
7600         return MVD_U32_MAX;
7601     }
7602     else
7603     {
7604         u32SlqRp = HAL_MVD_Map2DrvSlqTbl(u8Idx, u32SlqRp1);
7605     }
7606 
7607     pstSlqTblInfo->pDrvSlqTbl->u32RdPtr = u32SlqRp; //update pstSlqTblInfo->pDrvSlqTbl->u32RdPtr
7608 
7609     //report (readPtr-1) for HW may still use (readPtr)
7610     if (u32SlqRp > (pstSlqTblInfo->pDrvSlqTbl->u32StAdd))
7611     {
7612         u32Idx = ((u32SlqRp - pstSlqTblInfo->pDrvSlqTbl->u32StAdd)/SLQ_ENTRY_LEN) - 1;
7613     }
7614     else
7615     {
7616         u32Idx = SLQ_ENTRY_MAX - 1;
7617     }
7618     u32EsRp = pstSlqTblInfo->pDrvEsTbl->u32StAdd + u32Idx*8;
7619 
7620     u32EsStart = HAL_MVD_MemRead4Byte(u32EsRp); //report StartAdd as read_pointer
7621 #if 0
7622     MS_U32 u32EsEnd;
7623     u32EsEnd = HAL_MVD_MemRead4Byte(u32EsRp+4);
7624     MVD_PRINT("GetESReadPtr ES[%x] Start=0x%x End=0x%x u32EsRp=%x u32SlqRp=%x\n",
7625             u32Idx, HAL_MVD_MemRead4Byte(u32EsRp), u32EsEnd, u32EsRp, u32SlqRp);
7626 #endif
7627 
7628     if ((_IsNotInStreamBuff(u32EsStart)) && (u32EsStart != 0))
7629     {   //ESRead is not in BS buffer, so this entry is a divx or dummy pattern.
7630         //Report the last ESRead, instead of this one.
7631         if(curCodecType == E_MVD_CODEC_DIVX311)
7632         {
7633             //update last slq index es end address
7634             if(u32Idx == 0)
7635             {
7636                 u32Idx = SLQ_ENTRY_MAX-1;
7637             }
7638             else
7639             {
7640                 u32Idx = u32Idx-1;
7641             }
7642             u32EsRp = pstSlqTblInfo->pDrvEsTbl->u32StAdd + u32Idx*8;
7643             u32EsStart = HAL_MVD_MemRead4Byte(u32EsRp); //report StartAdd as read_pointer
7644             if(_IsNotInStreamBuff(u32EsStart))
7645             {
7646                 return (pstSlqTblInfo->u32PreEsRd);
7647             }
7648         }
7649         else
7650         {
7651             MVD_DEBUGINFO(MVD_PRINT("0x%lx Not in BS, report u32PreEsRd=0x%lx\n", (unsigned long)u32EsStart, (unsigned long)pstSlqTblInfo->u32PreEsRd));
7652             return (pstSlqTblInfo->u32PreEsRd);
7653         }
7654     }
7655     pstSlqTblInfo->u32PreEsRd = u32EsStart;
7656 
7657     return u32EsStart;
7658 }
7659 
7660 //------------------------------------------------------------------------------
7661 /// Get write pointer in ElementaryStream buffer for SLQ table mode
7662 /// @return -the read pointer
7663 //------------------------------------------------------------------------------
MVD_GetSlqTblESWritePtr(MS_U8 u8Idx)7664 MS_VIRT MVD_GetSlqTblESWritePtr(MS_U8 u8Idx)
7665 {
7666     MS_VIRT u32EsWp;
7667     MS_VIRT u32EsEnd;
7668     MS_U32 u32Idx;
7669     MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
7670     MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
7671 
7672     if (pstSlqTblInfo->pDrvSlqTbl->u32WrPtr > (pstSlqTblInfo->pDrvSlqTbl->u32StAdd))
7673     {
7674         u32Idx = ((pstSlqTblInfo->pDrvSlqTbl->u32WrPtr - pstSlqTblInfo->pDrvSlqTbl->u32StAdd)/SLQ_ENTRY_LEN) - 1;
7675     }
7676     else
7677     {
7678         u32Idx = SLQ_ENTRY_MAX - 1;
7679     }
7680     u32EsWp = pstSlqTblInfo->pDrvEsTbl->u32StAdd + u32Idx*8;
7681 
7682     u32EsEnd = HAL_MVD_MemRead4Byte(u32EsWp+4);
7683 #if 0
7684     MVD_PRINT("GetESWritePtr[%x] ES Start=0x%x End=0x%x u32EsWp=%x\n",
7685         (u32EsWp - pstSlqTblInfo->pDrvEsTbl->u32StAdd)/8,
7686         HAL_MVD_MemRead4Byte(u32EsWp), u32EsEnd, u32EsWp);
7687 #endif
7688 
7689     if ((_IsNotInStreamBuff(u32EsEnd)) && (u32EsEnd != 0))
7690     {   //ESRead is not in BS buffer, so this entry is a divx pattern.
7691         //Report the last ESRead, instead of this one.
7692         MVD_DEBUGINFO(MVD_PRINT("0x%lx Not in BS, report u32PreEsWr=0x%lx\n", (unsigned long)u32EsEnd, (unsigned long)pstSlqTblInfo->u32PreEsWr));
7693         return (pstSlqTblInfo->u32PreEsWr);
7694     }
7695     pstSlqTblInfo->u32PreEsWr = u32EsEnd;
7696 
7697     return u32EsEnd;
7698 }
7699 
7700 
HAL_MVD_GetSLQReadPtr(MS_U8 u8Idx)7701 MS_VIRT HAL_MVD_GetSLQReadPtr(MS_U8 u8Idx)
7702 {
7703     MS_VIRT u32RdPtr = 0;
7704 
7705     if (!(pMVDHalContext->bSlqTblHKCtrl[u8Idx]))
7706     {
7707         #ifndef VDEC3
7708         MVD_CmdArg mvdcmd;
7709         SETUP_CMDARG(mvdcmd);
7710         SET_DECNUM(mvdcmd, u8Idx);
7711         if (HAL_MVD_MVDCommand( CMD_SLQ_GET_TBL_RPTR, &mvdcmd ) == FALSE)
7712         {
7713             MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_SLQ_GET_TBL_RPTR ) );
7714             return 0;
7715         }
7716         u32RdPtr = mvdcmd.Arg0 | (mvdcmd.Arg1<<8) | (mvdcmd.Arg2<<16) | (mvdcmd.Arg3<<24);
7717         #else
7718         u32RdPtr = MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_SLQ_TBL_RPTR, sizeof(MS_U32));
7719         #endif
7720     }
7721     else
7722     {
7723         u32RdPtr = HAL_MVD_SlqTblProbeRdPtr(u8Idx);
7724     }
7725 
7726     //MVD_PRINT("##### HAL_MVD_GetSLQReadPtr 0x%x\n", readPtr);
7727 
7728     if(u32RdPtr == 0)//not start decode yet,MVD return 0
7729     {
7730         u32RdPtr = 0;
7731     }
7732     else
7733     {
7734         u32RdPtr = u32RdPtr << 3;
7735     }
7736 
7737     return u32RdPtr;
7738 }
7739 
7740 
HAL_MVD_SetSLQWritePtr(MS_U8 u8Idx,MS_BOOL bCheckData)7741 MS_BOOL HAL_MVD_SetSLQWritePtr(MS_U8 u8Idx, MS_BOOL bCheckData)
7742 {
7743     MVD_CmdArg mvdcmd;
7744     MS_VIRT u32WrPtr;
7745     MVD_MEMCfg* pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
7746     MVD_CtrlCfg* pstCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
7747     MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
7748 
7749     if (FALSE == pstSlqTblInfo->bRdyToFireCmd)
7750     {
7751         //check FW is init success and thus ready to update write pointer
7752         MS_U32 u32TimeCnt;
7753 
7754         u32TimeCnt = HAL_MVD_GetTime();
7755         while ((HAL_MVD_GetTime() - u32TimeCnt) < CMD_TIMEOUT_MS)
7756         {
7757             if (HAL_MVD_GetDecodeStatus(u8Idx) != E_MVD_STAT_IDLE)
7758             {
7759                 pstSlqTblInfo->bRdyToFireCmd = TRUE;
7760                 MVD_DEBUGVERBAL(MVD_PRINT("time=0x%x ms, ", (HAL_MVD_GetTime() - u32TimeCnt)));
7761                 break;
7762             }
7763         }
7764         if (FALSE == pstSlqTblInfo->bRdyToFireCmd)
7765         {
7766             MVD_DEBUGERROR(MVD_PRINT("%s: err timeout(%d)! stat=0x%x\n", __FUNCTION__,
7767                     HAL_MVD_GetTime() - u32TimeCnt, HAL_MVD_GetDecodeStatus(u8Idx)));
7768             return FALSE;
7769         }
7770         else
7771         {
7772             MVD_DEBUGVERBAL(MVD_PRINT("%s: ready to update WrPtr.\n", __FUNCTION__));
7773         }
7774     }
7775 
7776 
7777     MS_ASSERT(pstSlqTblInfo->pDrvSlqTbl->u32WrPtr < pstSlqTblInfo->pDrvSlqTbl->u32EndAdd);
7778     MS_ASSERT(pstSlqTblInfo->pDrvSlqTbl->u32WrPtr >= pstSlqTblInfo->pDrvSlqTbl->u32StAdd);
7779 #if SLQ_NEW_PUSH
7780     if((!pstSlqTblInfo->pSlqStatus->bSlqFireRdy)&&pstSlqTblInfo->pSlqStatus->bSlqCtrlBit)
7781     {
7782         MVD_DEBUGINFO(MVD_PRINT("**** pstSlqTblInfo->pSlqStatus->bSlqFireRdy is not Ready ** \n"));
7783         return FALSE;
7784     }
7785     pstSlqTblInfo->pSlqStatus->bSlqFireRdy = FALSE;
7786 #endif
7787     if ((bCheckData==TRUE) && (FALSE==pstSlqTblInfo->bSlqTblHasValidData))
7788     {
7789         MVD_DEBUGINFO(MVD_PRINT("**** SlqWrPtr(0x%lx) is not update!(%x, %x) ****\n",
7790             (unsigned long)pstSlqTblInfo->pDrvSlqTbl->u32WrPtr, bCheckData, pstSlqTblInfo->bSlqTblHasValidData));
7791         return FALSE;
7792     }
7793     pstSlqTblInfo->bSlqTblHasValidData = FALSE;
7794 
7795     if (pstSlqTblInfo->pDrvSlqTbl->u32WrPtr != pstSlqTblInfo->pDrvSlqTbl->u32EndAdd)
7796     {
7797         u32WrPtr = pstSlqTblInfo->pDrvSlqTbl->u32WrPtr;
7798     }
7799     else
7800     {
7801         u32WrPtr = pstSlqTblInfo->pDrvSlqTbl->u32StAdd;
7802     }
7803 
7804     if (pstCtrlCfg->bSlqTblSync)
7805     {
7806         //Update SLQ table, DivX311 patterns, and dummy patterns to bitstream buffer
7807         MS_VIRT u32SrcOffset = pstSlqTblInfo->pDrvSlqTbl->u32StAdd;
7808         MS_VIRT u32SrcAdd = u32SrcOffset;
7809         MS_VIRT u32DstAdd = pstMemCfg->u32BSAddr;
7810         MS_VIRT u32DstOffset = HAL_MVD_GetMemOffset(pstMemCfg->u32BSAddr);
7811         MS_VIRT u32TblWr;
7812 
7813         _miu_offset_to_phy(pMVDHalContext->stMiuCfg.u8FWMiuSel,u32SrcOffset,u32SrcAdd);
7814 
7815 
7816         HAL_MVD_CPU_Sync();
7817 
7818 #ifndef MSOS_TYPE_LINUX_KERNEL//BDMA
7819         BDMA_Result bdmaRlt;
7820 
7821         bdmaRlt = MDrv_BDMA_CopyHnd(u32SrcAdd, u32DstAdd, pstMemCfg->u32DrvBufSize, pstSlqTblInfo->bdmaCpyType, BDMA_OPCFG_DEF);
7822 
7823         if (E_BDMA_OK != bdmaRlt)
7824         {
7825             MVD_DEBUGERROR(MVD_PRINT("%s MDrv_BDMA_MemCopy fail ret=%x!\n", __FUNCTION__, bdmaRlt));
7826         }
7827 #endif
7828         MVD_DEBUGINFO(MVD_PRINT("SlqWrPtr_BDMA src=0x%lx dst=0x%lx size=0x%lx cpyType=0x%x\n",
7829             (unsigned long)u32SrcAdd, (unsigned long)u32DstAdd, (unsigned long)pstMemCfg->u32DrvBufSize, pstSlqTblInfo->bdmaCpyType));
7830 
7831         u32TblWr = u32DstOffset + (u32WrPtr - pstSlqTblInfo->pDrvSlqTbl->u32StAdd);
7832 
7833         u32WrPtr = u32TblWr;
7834     }
7835     //MVD_PRINT("wPtr= 0x%x(0x%x) rPtr=0x%x(0x%x)\n", writePtr, pstSlqTblInfo->pDrvSlqTbl->u32WrPtr,
7836     //    HAL_MVD_GetSLQReadPtr(u8Idx), pstSlqTblInfo->pDrvSlqTbl->u32RdPtr);
7837 
7838 
7839     //writePtrLast[u8Idx] = u32WrPtr;
7840     #if SLQ_NEW_PUSH
7841     if(!pstSlqTblInfo->pSlqStatus->bSlqEnLastFrameShow && pstSlqTblInfo->pSlqStatus->bSlqCtrlBit)
7842     {
7843         u32WrPtr = pstSlqTblInfo->pSlqStatus->u32VaildWptrAddr;
7844     }
7845     #endif
7846     MS_ASSERT((u32WrPtr%8)==0);
7847     u32WrPtr >>= 3;
7848 
7849     if (!(pMVDHalContext->bSlqTblHKCtrl[u8Idx]))
7850     {
7851         SET_CMDARG(mvdcmd, u32WrPtr, u8Idx);
7852         HAL_MVD_CPU_Sync();
7853         SET_CMD_RET_FALSE(CMD_SLQ_UPDATE_TBL_WPTR, &mvdcmd);
7854     }
7855     else
7856     {
7857         HAL_MVD_SlqTblLoadWrPtr(u8Idx, u32WrPtr);
7858         if (HAL_MVD_SlqTblProbeWrPtr(u8Idx) != u32WrPtr)
7859         {
7860             MVD_DEBUGERROR(MVD_PRINT("Ooops! SlqWrPtr update fail!!! 0x%lx != 0x%lx\n", (unsigned long)HAL_MVD_SlqTblProbeWrPtr(u8Idx), (unsigned long)u32WrPtr));
7861             return FALSE;
7862         }
7863     }
7864 
7865     return TRUE;
7866 }
7867 
HAL_MVD_SetOverflowTH(MS_U8 u8Idx,MS_U32 u32Threshold)7868 void HAL_MVD_SetOverflowTH(MS_U8 u8Idx, MS_U32 u32Threshold)
7869 {
7870     MVD_CmdArg mvdcmd;
7871 
7872     MS_ASSERT((u32Threshold%8)==0);
7873     u32Threshold >>= 3;
7874     SET_CMDARG(mvdcmd, u32Threshold, u8Idx);
7875     if (HAL_MVD_MVDCommand( CMD_DMA_OVFTH, &mvdcmd ) == FALSE)
7876     {
7877         MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_DMA_OVFTH ) );
7878         return;
7879     }
7880     return;
7881 }
7882 
7883 //------------------------------------------------------------------------------
7884 /// Set bitstream buffer underflow threshold
7885 /// @return -none
7886 //------------------------------------------------------------------------------
HAL_MVD_SetUnderflowTH(MS_U8 u8Idx,MS_U32 u32Threshold)7887 void HAL_MVD_SetUnderflowTH(MS_U8 u8Idx, MS_U32 u32Threshold)
7888 {
7889     MVD_CmdArg mvdcmd;
7890 
7891     MS_ASSERT((u32Threshold%8)==0);
7892     u32Threshold >>= 3;
7893     SET_CMDARG(mvdcmd, u32Threshold, u8Idx);
7894     if (HAL_MVD_MVDCommand( CMD_DMA_UNFTH, &mvdcmd ) == FALSE)
7895     {
7896         MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_DMA_UNFTH ) );
7897         return;
7898     }
7899     return;
7900 }
7901 
HAL_MVD_GenPattern(MS_U8 u8Idx,MVD_PatternType ePattern,MS_PHY u32PAddr,MS_U32 * pu32Size)7902 MS_BOOL HAL_MVD_GenPattern(MS_U8 u8Idx, MVD_PatternType ePattern, MS_PHY u32PAddr, MS_U32* pu32Size)
7903 {
7904     MS_U8* pu8DummyData = NULL;
7905     MVD_CodecType curCodecType = HAL_MVD_GetCodecType(u8Idx);
7906 
7907     if ((!pu32Size) || (*pu32Size < SKIP_PATTERN_SIZE))
7908     {
7909         return FALSE;
7910     }
7911 
7912     pu8DummyData = (MS_U8*) HAL_MVD_PA2NonCacheSeg(u32PAddr);
7913 
7914     if(pu8DummyData == NULL)
7915     {
7916         MVD_PRINT("%s  %d  NULL Address\n",__FILE__,__LINE__);
7917         return FALSE;
7918     }
7919 
7920     switch (ePattern)
7921     {
7922         case E_MVD_PATTERN_FLUSH:
7923             #if 0
7924             *pu8DummyData = SKIP_PATTERN_0;
7925             pu8DummyData++;
7926             *pu8DummyData = SKIP_PATTERN_1;
7927             *pu32Size = SKIP_PATTERN_SIZE;
7928             #else
7929             pu8DummyData[0] =    SKIP_PATTERN_0&0xff;
7930             pu8DummyData[1] = (SKIP_PATTERN_0>>8)&0xff;
7931             pu8DummyData[2] = (SKIP_PATTERN_0>>16)&0xff;
7932             pu8DummyData[3] = (SKIP_PATTERN_0>>24)&0xff;
7933 
7934             pu8DummyData[4] = SKIP_PATTERN_1&0xff;
7935             pu8DummyData[5] = (SKIP_PATTERN_1>>8)&0xff;
7936             pu8DummyData[6] = (SKIP_PATTERN_1>>16)&0xff;
7937             pu8DummyData[7] = (SKIP_PATTERN_1>>24)&0xff;
7938 
7939             *pu32Size = SKIP_PATTERN_SIZE;
7940             #endif
7941             break;
7942         case E_MVD_PATTERN_FILEEND:
7943             if ((E_MVD_CODEC_FLV == curCodecType)||(E_MVD_CODEC_MPEG4_SHORT_VIDEO_HEADER == curCodecType))
7944             {
7945                 #if 0
7946                 *pu8DummyData = FLV_PATTERN;
7947                 pu8DummyData++;
7948                 *pu8DummyData = 0xffffffff;
7949                 pu8DummyData++;
7950                 *pu8DummyData = END_PATTERN_1;
7951                 pu8DummyData++;
7952                 *pu8DummyData = END_PATTERN_2;
7953                 pu8DummyData++;
7954                 *pu8DummyData = END_PATTERN_3;
7955                 #else
7956                 pu8DummyData[0] = FLV_PATTERN&0xff;
7957                 pu8DummyData[1] = (FLV_PATTERN>>8)&0xff;
7958                 pu8DummyData[2] = (FLV_PATTERN>>16)&0xff;
7959                 pu8DummyData[3] = (FLV_PATTERN>>24)&0xff;
7960 
7961                 pu8DummyData[4] = 0xffffffff&0xff;
7962                 pu8DummyData[5] = (0xffffffff>>8)&0xff;
7963                 pu8DummyData[6] = (0xffffffff>>16)&0xff;
7964                 pu8DummyData[7] = (0xffffffff>>24)&0xff;
7965 
7966                 pu8DummyData[8] = END_PATTERN_1&0xff;
7967                 pu8DummyData[9] = (END_PATTERN_1>>8)&0xff;
7968                 pu8DummyData[10] = (END_PATTERN_1>>16)&0xff;
7969                 pu8DummyData[11] = (END_PATTERN_1>>24)&0xff;
7970 
7971                 pu8DummyData[12] = END_PATTERN_2&0xff;
7972                 pu8DummyData[13] = (END_PATTERN_2>>8)&0xff;
7973                 pu8DummyData[14] = (END_PATTERN_2>>16)&0xff;
7974                 pu8DummyData[15] = (END_PATTERN_2>>24)&0xff;
7975 
7976                 pu8DummyData[16] = END_PATTERN_3&0xff;
7977                 pu8DummyData[17] = (END_PATTERN_3>>8)&0xff;
7978                 pu8DummyData[18] = (END_PATTERN_3>>16)&0xff;
7979                 pu8DummyData[19] = (END_PATTERN_3>>24)&0xff;
7980 
7981                 #endif
7982 
7983             }
7984             else if (E_MVD_CODEC_DIVX311 == curCodecType)
7985             {
7986                 #if 0
7987                 *pu8DummyData = DIVX_PATTERN;
7988                 pu8DummyData++;
7989                 *pu8DummyData = 0xffffffff;
7990                 pu8DummyData++;
7991                 *pu8DummyData = END_PATTERN_1;
7992                 pu8DummyData++;
7993                 *pu8DummyData = END_PATTERN_2;
7994                 pu8DummyData++;
7995                 *pu8DummyData = END_PATTERN_3;
7996                 #else
7997                 pu8DummyData[0] = DIVX_PATTERN&0xff;
7998                 pu8DummyData[1] = (DIVX_PATTERN>>8)&0xff;
7999                 pu8DummyData[2] = (DIVX_PATTERN>>16)&0xff;
8000                 pu8DummyData[3] = (DIVX_PATTERN>>24)&0xff;
8001 
8002                 pu8DummyData[4] = 0xffffffff&0xff;
8003                 pu8DummyData[5] = (0xffffffff>>8)&0xff;
8004                 pu8DummyData[6] = (0xffffffff>>16)&0xff;
8005                 pu8DummyData[7] = (0xffffffff>>24)&0xff;
8006 
8007                 pu8DummyData[8] = END_PATTERN_1&0xff;
8008                 pu8DummyData[9] = (END_PATTERN_1>>8)&0xff;
8009                 pu8DummyData[10] = (END_PATTERN_1>>16)&0xff;
8010                 pu8DummyData[11] = (END_PATTERN_1>>24)&0xff;
8011 
8012                 pu8DummyData[12] = END_PATTERN_2&0xff;
8013                 pu8DummyData[13] = (END_PATTERN_2>>8)&0xff;
8014                 pu8DummyData[14] = (END_PATTERN_2>>16)&0xff;
8015                 pu8DummyData[15] = (END_PATTERN_2>>24)&0xff;
8016 
8017                 pu8DummyData[16] = END_PATTERN_3&0xff;
8018                 pu8DummyData[17] = (END_PATTERN_3>>8)&0xff;
8019                 pu8DummyData[18] = (END_PATTERN_3>>16)&0xff;
8020                 pu8DummyData[19] = (END_PATTERN_3>>24)&0xff;
8021                 #endif
8022             }
8023             else if ((E_MVD_CODEC_MPEG2 == curCodecType)||(E_MVD_CODEC_MPEG4 == curCodecType))
8024             {
8025                 #if 0
8026                 *pu8DummyData = MPEG_PATTERN_0;
8027                 pu8DummyData++;
8028                 *pu8DummyData = END_PATTERN_1;
8029                 pu8DummyData++;
8030                 *pu8DummyData = END_PATTERN_2;
8031                 pu8DummyData++;
8032                 *pu8DummyData = END_PATTERN_3;
8033                 #else
8034                 pu8DummyData[0] = MPEG_PATTERN_0&0xff;
8035                 pu8DummyData[1] = (MPEG_PATTERN_0>>8)&0xff;
8036                 pu8DummyData[2] = (MPEG_PATTERN_0>>16)&0xff;
8037                 pu8DummyData[3] = (MPEG_PATTERN_0>>24)&0xff;
8038 
8039                 pu8DummyData[4] = END_PATTERN_1&0xff;
8040                 pu8DummyData[5] = (END_PATTERN_1>>8)&0xff;
8041                 pu8DummyData[6] = (END_PATTERN_1>>16)&0xff;
8042                 pu8DummyData[7] = (END_PATTERN_1>>24)&0xff;
8043 
8044                 pu8DummyData[8] = END_PATTERN_2&0xff;
8045                 pu8DummyData[9] = (END_PATTERN_2>>8)&0xff;
8046                 pu8DummyData[10] = (END_PATTERN_2>>16)&0xff;
8047                 pu8DummyData[11] = (END_PATTERN_2>>24)&0xff;
8048 
8049                 pu8DummyData[12] = END_PATTERN_3&0xff;
8050                 pu8DummyData[13] = (END_PATTERN_3>>8)&0xff;
8051                 pu8DummyData[14] = (END_PATTERN_3>>16)&0xff;
8052                 pu8DummyData[15] = (END_PATTERN_3>>24)&0xff;
8053                 #endif
8054             }
8055             else
8056             {
8057                 #if 0
8058                 *pu8DummyData = END_PATTERN_0;
8059                 pu8DummyData++;
8060                 *pu8DummyData = END_PATTERN_1;
8061                 pu8DummyData++;
8062                 *pu8DummyData = END_PATTERN_2;
8063                 pu8DummyData++;
8064                 *pu8DummyData = END_PATTERN_3;
8065                 #else
8066                 pu8DummyData[0] = END_PATTERN_0&0xff;
8067                 pu8DummyData[1] = (END_PATTERN_0>>8)&0xff;
8068                 pu8DummyData[2] = (END_PATTERN_0>>16)&0xff;
8069                 pu8DummyData[3] = (END_PATTERN_0>>24)&0xff;
8070 
8071                 pu8DummyData[4] = END_PATTERN_1&0xff;
8072                 pu8DummyData[5] = (END_PATTERN_1>>8)&0xff;
8073                 pu8DummyData[6] = (END_PATTERN_1>>16)&0xff;
8074                 pu8DummyData[7] = (END_PATTERN_1>>24)&0xff;
8075 
8076                 pu8DummyData[8] = END_PATTERN_2&0xff;
8077                 pu8DummyData[9] = (END_PATTERN_2>>8)&0xff;
8078                 pu8DummyData[10] = (END_PATTERN_2>>16)&0xff;
8079                 pu8DummyData[11] = (END_PATTERN_2>>24)&0xff;
8080 
8081                 pu8DummyData[12] = END_PATTERN_3&0xff;
8082                 pu8DummyData[13] = (END_PATTERN_3>>8)&0xff;
8083                 pu8DummyData[14] = (END_PATTERN_3>>16)&0xff;
8084                 pu8DummyData[15] = (END_PATTERN_3>>24)&0xff;
8085                 #endif
8086             }
8087             *pu32Size = 16;
8088             break;
8089         default:
8090             break;
8091     }
8092 
8093     return TRUE;
8094 }
8095 
8096 
8097 
HAL_MVD_DbgDump(MS_U8 u8Idx)8098 void HAL_MVD_DbgDump(MS_U8 u8Idx)
8099 {
8100     MS_U32 u32VdCnt=0;
8101     //static MS_U32 u32PreVdCnt[MAX_DEC_NUM]= {0, 0};
8102     MS_U32 u32ErrCnt=0;
8103     //static MS_U32 u32PreErrCnt[MAX_DEC_NUM]= {0, 0};
8104     //static MS_BOOL b1stDump[MAX_DEC_NUM]= {TRUE, TRUE};
8105     MS_U32 u32Id = MVD_GetStreamId(u8Idx);
8106     MVD_FrmInfo stFrm = {_INIT_ADDR, _INIT_ADDR, _INIT_TIMESTAMP, _INIT_ID,
8107                          _INIT_ID, _INIT_LEN, _INIT_LEN, _INIT_LEN, 0xff, E_MVD_PIC_UNKNOWN};
8108     MVD_SrcMode curSrcMode = HAL_MVD_GetSrcMode(u8Idx);
8109     #ifndef VDEC3
8110     MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
8111     #endif
8112     if (pMVDHalContext->b1stDump[u8Idx])
8113     {
8114         MVD_FWCfg* pFwCfg = NULL;
8115         pFwCfg = HAL_MVD_GetFWCfg(u8Idx);
8116         MVD_PRINT("curDisablePESParsing = %d\n", pFwCfg->bDisablePESParsing);
8117         pMVDHalContext->b1stDump[u8Idx] = FALSE;
8118     }
8119 
8120     u32VdCnt = HAL_MVD_GetParserByteCnt(u8Idx);
8121     u32ErrCnt= HAL_MVD_GetVldErrCount(u8Idx);
8122     MVD_PRINT("input: vfifo=%d(full=%d,empty=%d), vdCnt=%d(%d), vldErr=%d(%d); ",
8123             HAL_MVD_RegReadByte(0x1564)>>6, HAL_MVD_RegReadByte(0x1564)&0x20,
8124             HAL_MVD_RegReadByte(0x1564)&0x10, u32VdCnt, (u32VdCnt-pMVDHalContext->u32PreVdCnt[u8Idx]),
8125             u32ErrCnt, (u32ErrCnt-pMVDHalContext->u32PreErrCnt[u8Idx]));
8126     pMVDHalContext->u32PreVdCnt[u8Idx] = u32VdCnt;
8127     pMVDHalContext->u32PreErrCnt[u8Idx] = u32ErrCnt;
8128 
8129     MVD_PRINT("state: fw=0x%x, lastCmd=0x%x, pc=0x%x\n",
8130             HAL_MVD_GetDecodeStatus(u8Idx), HAL_MVD_GetLastCmd(u8Idx), HAL_VPU_EX_GetProgCnt(u32Id));
8131     MVD_PRINT("cnt: dec=%d, skip=%d, drop=%ld\n", HAL_MVD_GetPicCounter(u8Idx), HAL_MVD_GetSkipPicCounter(u8Idx), 0x0UL);
8132     HAL_MVD_GetFrmInfo(u8Idx, E_MVD_FRMINFO_DECODE, &stFrm);
8133     MVD_PRINT("frm Dec Y=%lx UV=%lx Pitch=%x; ", (unsigned long)stFrm.u32LumaAddr, (unsigned long)stFrm.u32ChromaAddr, stFrm.u16Pitch);
8134     HAL_MVD_GetFrmInfo(u8Idx, E_MVD_FRMINFO_DISPLAY, &stFrm);
8135     MVD_PRINT("Disp Y=%lx UV=%lx Pitch=%x\n", (unsigned long)stFrm.u32LumaAddr, (unsigned long)stFrm.u32ChromaAddr, stFrm.u16Pitch);
8136     if (curSrcMode == E_MVD_SLQ_TBL_MODE)
8137     {
8138         #ifndef VDEC3
8139         MVD_PRINT("fe=%x, rd=%x(%x), wr=%x, empty=%x; ", pstSlqTblInfo->u32FileEndPtr, pstSlqTblInfo->pDrvSlqTbl->u32RdPtr,
8140                 HAL_MVD_Map2DrvSlqTbl(u8Idx, HAL_MVD_GetSLQReadPtr(u8Idx)), pstSlqTblInfo->pDrvSlqTbl->u32WrPtr, pstSlqTblInfo->pDrvSlqTbl->u32Empty);
8141 
8142         MVD_PRINT("es rd=0x%lx, wr=0x%lx\n", (unsigned long)MVD_GetSlqTblESReadPtr(u8Idx), (unsigned long)MVD_GetSlqTblESWritePtr(u8Idx));
8143          #endif
8144     }
8145     else if (curSrcMode == E_MVD_TS_FILE_MODE)
8146     {
8147         MVD_PRINT("es rd=0x%lx, wr=0x%lx\n", (unsigned long)HAL_MVD_GetTsFileESReadPtr(u8Idx), (unsigned long)HAL_MVD_GetTsFileESWritePtr(u8Idx));
8148     }
8149 }
8150 
8151 #ifdef MS_DEBUG
8152 #define _STRINGIFY_HAL_SID(x)   \
8153     (x==E_HAL_MVD_MAIN_STREAM0)?"E_HAL_MVD_MAIN_STREAM0": \
8154     ((x==E_HAL_MVD_SUB_STREAM0)?"E_HAL_MVD_SUB_STREAM0":"E_HAL_MVD_STREAM_NONE")
MVD_DumpMVDStream(void)8155 void MVD_DumpMVDStream(void)
8156 {
8157     //if (_u8HalDbgLevel == 0) return;
8158     MS_U8 i = 0;
8159     for (i=0; i< MAX_DEC_NUM; i++)
8160     {
8161         MVD_DEBUGINFO(MVD_PRINT("[%d] eStreamId=0x%x(%s) bUsed=0x%x\n", i, pMVDHalContext->_stMVDStream[i].eStreamId,
8162                 _STRINGIFY_HAL_SID(pMVDHalContext->_stMVDStream[i].eStreamId), pMVDHalContext->_stMVDStream[i].bUsed));
8163     }
8164 }
8165 #endif
HAL_MVD_Init_Share_Mem(void)8166 MS_BOOL HAL_MVD_Init_Share_Mem(void)
8167 {
8168 #if (defined(MSOS_TYPE_LINUX) || defined(MSOS_TYPE_ECOS) || defined(MSOS_TYPE_LINUX_KERNEL))
8169 #if !defined(SUPPORT_X_MODEL_FEATURE)
8170     MS_U32 u32ShmId;
8171     MS_VIRT u32Addr;
8172     MS_U32 u32BufSize;
8173 
8174 
8175     if (FALSE == MsOS_SHM_GetId( (MS_U8*)"Linux MVD HAL",
8176                                           sizeof(MVD_Hal_CTX),
8177                                           &u32ShmId,
8178                                           &u32Addr,
8179                                           &u32BufSize,
8180                                           MSOS_SHM_QUERY))
8181     {
8182         if (FALSE == MsOS_SHM_GetId((MS_U8*)"Linux MVD HAL",
8183                                              sizeof(MVD_Hal_CTX),
8184                                              &u32ShmId,
8185                                              &u32Addr,
8186                                              &u32BufSize,
8187                                              MSOS_SHM_CREATE))
8188         {
8189             MVD_PRINT("[%s]SHM allocation failed!!! use global structure instead!!!\n",__FUNCTION__);
8190             if(pMVDHalContext == NULL)
8191             {
8192                 pMVDHalContext = &gMVDHalContext;
8193                 memset(pMVDHalContext,0,sizeof(MVD_Hal_CTX));
8194                 HAL_MVD_Context_Init();
8195                 MVD_PRINT("[%s]Global structure init Success!!!\n",__FUNCTION__);
8196             }
8197             else
8198             {
8199                 MVD_PRINT("[%s]Global structure exists!!!\n",__FUNCTION__);
8200             }
8201             //return FALSE;
8202         }
8203         else
8204         {
8205             memset((MS_U8*)u32Addr,0,sizeof(MVD_Hal_CTX));
8206             pMVDHalContext = (MVD_Hal_CTX*)u32Addr; // for one process
8207             HAL_MVD_Context_Init();
8208         }
8209     }
8210     else
8211     {
8212         pMVDHalContext = (MVD_Hal_CTX*)u32Addr; // for another process
8213     }
8214 #else
8215     if(pMVDHalContext == NULL)
8216     {
8217         pMVDHalContext = &gMVDHalContext;
8218         memset(pMVDHalContext,0,sizeof(MVD_Hal_CTX));
8219         HAL_MVD_Context_Init();
8220     }
8221 #endif
8222     OSAL_MVD_MutexInit();
8223 #else
8224     if(pMVDHalContext == NULL)
8225     {
8226         pMVDHalContext = &gMVDHalContext;
8227         memset(pMVDHalContext,0,sizeof(MVD_Hal_CTX));
8228         HAL_MVD_Context_Init();
8229 }
8230 #endif
8231 
8232 
8233     return TRUE;
8234 
8235 }
8236 
8237 //------------------------------------------------------------------------------
HAL_MVD_GetFreeStream(HAL_MVD_StreamType eStreamType)8238 HAL_MVD_StreamId HAL_MVD_GetFreeStream(HAL_MVD_StreamType eStreamType)
8239 {
8240     MS_U32 i = 0;
8241 
8242 #ifdef MS_DEBUG
8243     MVD_DumpMVDStream();
8244 #endif
8245     if (eStreamType == E_HAL_MVD_MAIN_STREAM)
8246     {
8247         for (i = 0;
8248              i <
8249              ((E_HAL_MVD_MAIN_STREAM_MAX - E_HAL_MVD_MAIN_STREAM_BASE) +
8250               (E_HAL_MVD_SUB_STREAM_MAX - E_HAL_MVD_SUB_STREAM_BASE)); i++)
8251         {
8252             if ((E_HAL_MVD_MAIN_STREAM_BASE & pMVDHalContext->_stMVDStream[i].eStreamId) && (FALSE == pMVDHalContext->_stMVDStream[i].bUsed))
8253             {
8254                 return pMVDHalContext->_stMVDStream[i].eStreamId;
8255             }
8256         }
8257     }
8258     else if (eStreamType == E_HAL_MVD_SUB_STREAM)
8259     {
8260         for (i = 0;
8261              i <
8262              ((E_HAL_MVD_MAIN_STREAM_MAX - E_HAL_MVD_MAIN_STREAM_BASE) +
8263               (E_HAL_MVD_SUB_STREAM_MAX - E_HAL_MVD_SUB_STREAM_BASE)); i++)
8264         {
8265             if ((E_HAL_MVD_SUB_STREAM_BASE & pMVDHalContext->_stMVDStream[i].eStreamId) && (FALSE == pMVDHalContext->_stMVDStream[i].bUsed))
8266             {
8267                 return pMVDHalContext->_stMVDStream[i].eStreamId;
8268             }
8269         }
8270     }
8271 #ifdef VDEC3
8272     else if ((eStreamType >= E_HAL_MVD_N_STREAM) && (eStreamType < E_HAL_MVD_N_STREAM + MAX_DEC_NUM))
8273     {
8274         i = eStreamType - E_HAL_MVD_N_STREAM;
8275         if (!pMVDHalContext->_stMVDStream[i].bUsed)
8276         {
8277             return pMVDHalContext->_stMVDStream[i].eStreamId;
8278          }
8279     }
8280 #endif
8281 
8282     return E_HAL_MVD_STREAM_NONE;
8283 }
8284 
HAL_MVD_SidToIdx(HAL_MVD_StreamId eSID)8285 MS_U8 HAL_MVD_SidToIdx(HAL_MVD_StreamId eSID)
8286 {
8287 #ifdef VDEC3
8288     return eSID - E_HAL_MVD_N_STREAM_BASE;
8289 #else
8290     MS_U8 u8Idx = 0;
8291     switch (eSID)
8292     {
8293         case E_HAL_MVD_MAIN_STREAM0:
8294           u8Idx = 0;
8295           break;
8296         case E_HAL_MVD_SUB_STREAM0:
8297           u8Idx = 1;
8298           break;
8299 #if 0
8300         case E_HAL_MVD_SUB_STREAM1:
8301           u8Idx = 2;
8302           break;
8303 #endif
8304         default:
8305           u8Idx = 0;
8306           break;
8307     }
8308     return u8Idx;
8309 #endif
8310 }
8311 
HAL_MVD_ReleaseFdMask(MS_U8 u8Idx,MS_BOOL bRls)8312 MS_BOOL HAL_MVD_ReleaseFdMask(MS_U8 u8Idx, MS_BOOL bRls)
8313 {
8314     MVD_CmdArg mvdcmd;
8315 
8316     SETUP_CMDARG(mvdcmd);
8317     mvdcmd.Arg0 = bRls;  //1 to release the fd mask
8318     MVD_DEBUGINFO(MVD_PRINT("%s: release=0x%x\n", __FUNCTION__, bRls));
8319     SET_DECNUM(mvdcmd, u8Idx);
8320     SET_CMD_RET_FALSE(CMD_UPDATE_FRAME, &mvdcmd);
8321 
8322     return TRUE;
8323 }
8324 
HAL_MVD_ParserRstDone(MS_U8 u8Idx,MS_BOOL bEnable)8325 MS_BOOL HAL_MVD_ParserRstDone(MS_U8 u8Idx, MS_BOOL bEnable)
8326 {
8327     #define PARSER_RST_TIMEOUT 0x40000
8328     MS_U32 u32TimeOut = 0;
8329     MVD_CmdArg mvdcmd;
8330 
8331     HAL_MVD_ResetHandShake(u8Idx, MVD_HANDSHAKE_PARSER_RST);
8332     SETUP_CMDARG(mvdcmd);
8333     mvdcmd.Arg1 = bEnable;
8334     SET_DECNUM(mvdcmd, u8Idx);
8335     SET_CMD_RET_FALSE(CMD_PTS_TBL_RESET, &mvdcmd);
8336 
8337     while ((TRUE != HAL_MVD_IsCmdFinished(u8Idx, MVD_HANDSHAKE_PARSER_RST)) && (u32TimeOut < PARSER_RST_TIMEOUT))
8338     {
8339         u32TimeOut++;
8340     }
8341     if (u32TimeOut >= PARSER_RST_TIMEOUT)
8342     {
8343         MVD_DEBUGERROR( MVD_PRINT( "Ctrl: 0x%x fail timeout!!\r\n", CMD_PTS_TBL_RESET ) );
8344         return FALSE;
8345     }
8346     return TRUE;
8347 }
8348 
HAL_MVD_FlushPTSBuf(MS_U8 u8Idx,MS_BOOL bEnable)8349 MS_BOOL HAL_MVD_FlushPTSBuf(MS_U8 u8Idx, MS_BOOL bEnable)
8350 {
8351 #ifdef VDEC3
8352     MVD_CtrlCfg* pstCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
8353 
8354     if(pstCtrlCfg->u8McuMode == FALSE)
8355 #endif
8356     {
8357     MVD_CmdArg mvdcmd;
8358     SETUP_CMDARG(mvdcmd);
8359     mvdcmd.Arg0 = bEnable;
8360     if (HAL_MVD_MVDCommand( CMD_SEND_UNI_PTS, &mvdcmd ) == FALSE)
8361     {
8362         MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_SEND_UNI_PTS ) );
8363         return FALSE;
8364     }
8365     }
8366     return TRUE;
8367 }
8368 
8369 
HAL_MVD_GetSLQNum(MS_U8 u8Idx)8370 MS_U32 HAL_MVD_GetSLQNum(MS_U8 u8Idx)
8371 {
8372     MVD_SLQTBLInfo* pstSlqTblInfo = HAL_MVD_GetSlqTblInfo(u8Idx);
8373     MS_VIRT u32RdPtr = HAL_MVD_GetSLQReadPtr(u8Idx);
8374     MS_VIRT u32Diff = 0;
8375 
8376     if (pstSlqTblInfo->pDrvSlqTbl->u32WrPtr >= u32RdPtr)
8377     {
8378         u32Diff = pstSlqTblInfo->pDrvSlqTbl->u32WrPtr - u32RdPtr;
8379     }
8380     else
8381     {
8382         u32Diff = SLQ_TBL_SIZE - (u32RdPtr - pstSlqTblInfo->pDrvSlqTbl->u32WrPtr);
8383     }
8384 
8385 //    MVD_PRINT("slq wptr = 0x%x, rptr = 0x%x\n", pstSlqTblInfo->pDrvSlqTbl->u32WrPtr, u32RdPtr);
8386 
8387     return (u32Diff/SLQ_ENTRY_LEN);
8388 }
8389 
8390 
HAL_MVD_GetDispQNum(MS_U8 u8Idx)8391 MS_U32 HAL_MVD_GetDispQNum(MS_U8 u8Idx)
8392 {
8393     return MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_DISPQ_NUM, sizeof(MS_U8));
8394 }
HAL_MVD_SetAutoMute(MS_U8 u8Idx,MS_BOOL bEn)8395 MS_BOOL HAL_MVD_SetAutoMute(MS_U8 u8Idx, MS_BOOL bEn)
8396 {
8397     MVD_CmdArg mvdcmd;
8398 
8399     SETUP_CMDARG(mvdcmd);
8400     mvdcmd.Arg0 = bEn;  //1 to enable
8401     MVD_DEBUGINFO(MVD_PRINT("%s: bEn=%x\n", __FUNCTION__, bEn));
8402     SET_DECNUM(mvdcmd, u8Idx);
8403     SET_CMD_RET_FALSE(CMD_ENABLE_AUTO_MUTE, &mvdcmd);
8404 
8405     return TRUE;
8406 }
8407 
HAL_MVD_SetVSizeAlign(MS_U8 u8Idx,MS_BOOL bEn)8408 MS_BOOL HAL_MVD_SetVSizeAlign(MS_U8 u8Idx, MS_BOOL bEn)
8409 {
8410     MVD_CmdArg mvdcmd;
8411 
8412     SETUP_CMDARG(mvdcmd);
8413     mvdcmd.Arg0 = bEn;  //1 to enable VSize alignment to 4x
8414     MVD_DEBUGINFO(MVD_PRINT("%s: bEn=%x\n", __FUNCTION__, bEn));
8415     SET_DECNUM(mvdcmd, u8Idx);
8416     SET_CMD_RET_FALSE(CMD_FORCE_ALIGN_VSIZE, &mvdcmd);
8417 
8418     return TRUE;
8419 }
8420 
HAL_MVD_GetFrmRateIsSupported(MS_U16 u16HSize,MS_U16 u16VSize,MS_U32 u32FrmRate)8421 MS_BOOL HAL_MVD_GetFrmRateIsSupported(MS_U16 u16HSize, MS_U16 u16VSize, MS_U32 u32FrmRate)
8422 {
8423     MVD_DEBUGINFO(MVD_PRINT("%s w:%d, h:%d, fr:%d, MAX:%lld\n", __FUNCTION__, u16HSize, u16VSize, u32FrmRate, MVD_HW_MAX_PIXEL));
8424     return (((MS_U64)u16HSize*(MS_U64)u16VSize*(MS_U64)u32FrmRate) <= MVD_HW_MAX_PIXEL);
8425 }
8426 
HAL_MVD_GetColorInfo(MS_U8 u8Idx,MVD_Color_Info * pstColorInfo)8427 MS_BOOL HAL_MVD_GetColorInfo(MS_U8 u8Idx, MVD_Color_Info* pstColorInfo)
8428 {
8429     MS_VIRT pu8MVDGetFrameInfoBufStart = GET_FRMINFO_BUFFADD(u8Idx);
8430 
8431     if((pu8MVDGetFrameInfoBufStart==0) || (pstColorInfo==0))
8432     {
8433         MVD_DEBUGERROR(MVD_PRINT("HAL_MVD_GetColorInfo error: pu8MVDGetFrameInfoBufStart=NULL\n"));
8434         return FALSE;
8435     }
8436 
8437     pstColorInfo->bColor_Descript = (MS_BOOL)(HAL_MVD_MemReadByte(pu8MVDGetFrameInfoBufStart+OFFSET_COLOR_DESCRIPT));
8438 
8439     if(pstColorInfo->bColor_Descript)
8440     {
8441         pstColorInfo->u8Color_Primaries = HAL_MVD_MemReadByte(pu8MVDGetFrameInfoBufStart+OFFSET_COLOR_PRIMARIES);
8442         pstColorInfo->u8Transfer_Char = HAL_MVD_MemReadByte(pu8MVDGetFrameInfoBufStart+OFFSET_TRANSFER_CHAR);
8443         pstColorInfo->u8Matrix_Coef = HAL_MVD_MemReadByte(pu8MVDGetFrameInfoBufStart+OFFSET_MATRIX_COEF);
8444     }
8445     return TRUE;
8446 
8447 }
8448 
8449 
8450 
8451 //------------------------------------------------------------------------------
8452 /// Wait MVD generate CRC done or timeout
8453 /// @return -MVD generate CRC done or timeout
8454 //------------------------------------------------------------------------------
_HAL_MVD_CrcTimeOut(MS_U8 u8Idx)8455 MS_BOOL _HAL_MVD_CrcTimeOut(MS_U8 u8Idx)
8456 {
8457     MS_U32 i;
8458     MS_U32 u32StartTime = MsOS_GetSystemTime();
8459 
8460     for ( i = 0; i < MVD_PollingTimes; i++ )
8461     {
8462         ///- wait until MVD generate CRC done or timeout
8463         if ( ( HAL_MVD_RegReadByte(MVD_CRC_CTL) & MVD_CRC_CTL_DONE ) == MVD_CRC_CTL_DONE )
8464         {
8465             return FALSE;
8466         }
8467 
8468         if ((TRUE == pMVDHalContext->bStopped[u8Idx]) || ((MsOS_GetSystemTime()-u32StartTime)>1300))
8469         {
8470             MVD_DEBUGINFO(MVD_PRINT("%s: bStopped(%x) or timeout(%d)\n", __FUNCTION__, pMVDHalContext->bStopped[u8Idx], MsOS_GetSystemTime()-u32StartTime));
8471             return TRUE;
8472         }
8473 
8474     }
8475     MVD_DEBUGERROR( MVD_PRINT("_HAL_MVD_CrcTimeOut=%x\n", i) );
8476     return TRUE;
8477 }
8478 
HAL_MVD_GetCrcValue(MS_U8 u8Idx,MVD_CrcIn * pCrcIn,MVD_CrcOut * pCrcOut)8479 E_MVD_Result HAL_MVD_GetCrcValue(MS_U8 u8Idx, MVD_CrcIn *pCrcIn, MVD_CrcOut *pCrcOut)
8480 {
8481     E_MVD_Result eRet = E_MVD_RET_OK;
8482     MS_U32 u32tmp = 0;
8483 
8484     OSAL_MVD_LockHwMutex();
8485 
8486     MVD_DEBUGINFO(MVD_PRINT("%s width=0x%x, height=0x%x, pitch=0x%x, luma=0x%lx, chroma=0x%lx\n",
8487                                     __FUNCTION__, pCrcIn->u32HSize, pCrcIn->u32VSize, pCrcIn->u32Strip, (unsigned long)pCrcIn->u32YStartAddr, (unsigned long)pCrcIn->u32UVStartAddr));
8488 
8489     //Set generate CRC value
8490     u32tmp = ((pCrcIn->u32HSize + MVD_WIDTH_ALIGN_MASK) >> MVD_WIDTH_ALIGN_BITS) << MVD_WIDTH_ALIGN_BITS;
8491     HAL_MVD_RegWriteByte(MVD_CRC_HSIZE, u32tmp & 0xf0);
8492     HAL_MVD_RegWriteByte(MVD_CRC_HSIZE+1, (u32tmp >> 8) & 0x3f);
8493 
8494     u32tmp = ((pCrcIn->u32VSize + MVD_WIDTH_ALIGN_MASK) >> MVD_WIDTH_ALIGN_BITS) << MVD_WIDTH_ALIGN_BITS;
8495     HAL_MVD_RegWriteByte(MVD_CRC_VSIZE, u32tmp & 0xff);
8496     HAL_MVD_RegWriteByte(MVD_CRC_VSIZE+1, (u32tmp >> 8) & 0xff);
8497 
8498     u32tmp = (pCrcIn->u32Strip) >> 3;
8499     HAL_MVD_RegWriteByte(MVD_CRC_STRIP, u32tmp & 0xff);
8500     HAL_MVD_RegWriteByte((MVD_CRC_STRIP+1), (u32tmp >> 8) & 0xff);
8501 
8502     u32tmp = (pCrcIn->u32YStartAddr) >> 3;
8503     HAL_MVD_RegWrite4Byte(MVD_CRC_Y_START, u32tmp & MVD_CRC_Y_START_LEN);
8504 
8505     u32tmp = (pCrcIn->u32UVStartAddr) >> 3;
8506     HAL_MVD_RegWrite4Byte(MVD_CRC_UV_START, u32tmp & MVD_CRC_UV_START_LEN);
8507 
8508     //Fire
8509     HAL_MVD_RegWriteBit(MVD_CRC_CTL, 1, MVD_CRC_CTL_FIRE);
8510 
8511     //Check CRC done
8512     if ( _HAL_MVD_CrcTimeOut(u8Idx) == TRUE )
8513     {
8514         eRet = E_MVD_RET_TIME_OUT;
8515         goto _CRC_DONE;
8516     }
8517 
8518     //Get CRC value
8519     pCrcOut->u32YCrc = HAL_MVD_RegReadByte(MVD_CRC_Y_L) |
8520              (HAL_MVD_RegReadByte(MVD_CRC_Y_L+1) << 8) |
8521              (HAL_MVD_RegReadByte(MVD_CRC_Y_H) <<16) |
8522              (HAL_MVD_RegReadByte(MVD_CRC_Y_H+1) <<24);
8523 
8524     pCrcOut->u32UVCrc = HAL_MVD_RegReadByte(MVD_CRC_UV_L) |
8525              (HAL_MVD_RegReadByte(MVD_CRC_UV_L+1) << 8) |
8526              (HAL_MVD_RegReadByte(MVD_CRC_UV_H) <<16) |
8527              (HAL_MVD_RegReadByte(MVD_CRC_UV_H+1) <<24);
8528 
8529     MVD_DEBUGINFO(MVD_PRINT("%s Y=0x%x, UV=0x%x\n", __FUNCTION__, pCrcOut->u32YCrc, pCrcOut->u32UVCrc));
8530 
8531 _CRC_DONE:
8532     OSAL_MVD_UnlockHwMutex();
8533     return eRet;
8534 }
8535 
8536 
HAL_MVD_SuspendDynamicScale(MS_U8 u8Idx,MS_BOOL bEn)8537 MS_BOOL HAL_MVD_SuspendDynamicScale(MS_U8 u8Idx, MS_BOOL bEn)
8538 {
8539     MVD_CmdArg mvdcmd;
8540 
8541     SETUP_CMDARG(mvdcmd);
8542     mvdcmd.Arg0 = bEn;
8543     MVD_DEBUGINFO(MVD_PRINT("%s: bEn=%x\n", __FUNCTION__, bEn));
8544     SET_DECNUM(mvdcmd, u8Idx);
8545     SET_CMD_RET_FALSE(CMD_SUSPEND_DS, &mvdcmd);
8546 
8547     return TRUE;
8548 }
8549 
HAL_MVD_GetSuspendDynamicScale(MS_U8 u8Idx)8550 MS_U8 HAL_MVD_GetSuspendDynamicScale(MS_U8 u8Idx)
8551 {
8552     return (MS_U8)MVD_GetFWBuffData(u8Idx, FW_BUFF_VOLINFO, OFFSET_SUSPEND_DS, sizeof(MS_U8));
8553 }
8554 
HAL_MVD_GetStereoType(MS_U8 u8Idx)8555 MS_U8 HAL_MVD_GetStereoType(MS_U8 u8Idx)
8556 {
8557     return (MS_U8)MVD_GetFWBuffData(u8Idx, FW_BUFF_VOLINFO, OFFSET_STEREO_TYPE, sizeof(MS_U8));
8558 }
8559 
HAL_MVD_GetDivxVer(MS_U8 u8Idx)8560 MS_U32 HAL_MVD_GetDivxVer(MS_U8 u8Idx)
8561 {
8562     return MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_DIVX_VER_5X, sizeof(MS_U32));
8563 }
8564 
HAL_MVD_SetIdctMode(MS_U8 u8Idx,MS_U8 u8Mode)8565 MS_BOOL HAL_MVD_SetIdctMode(MS_U8 u8Idx, MS_U8 u8Mode)
8566 {
8567     MVD_CmdArg mvdcmd;
8568 
8569     SETUP_CMDARG(mvdcmd);
8570     mvdcmd.Arg0 = u8Mode;
8571     SET_DECNUM(mvdcmd, u8Idx);
8572 
8573     MVD_DEBUGINFO(MVD_PRINT("%s CMD_IDCT_SEL arg0=%x)\n", __FUNCTION__, u8Mode));
8574     SET_CMD_RET_FALSE(CMD_IDCT_SEL, &mvdcmd);
8575 
8576     return TRUE;
8577 }
8578 
HAL_MVD_EX_SetClockSpeed(HAL_MVD_EX_ClockSpeed eClockSpeed)8579 E_MVD_Result HAL_MVD_EX_SetClockSpeed(HAL_MVD_EX_ClockSpeed eClockSpeed)
8580 {
8581     UNUSED(eClockSpeed);
8582     MVD_PRINT("This chip does not support mvd clock presetting~\n");
8583     return E_MVD_RET_FAIL;
8584 }
8585 
HAL_MVD_GetIsAVSyncOn(MS_U8 u8Idx)8586 MS_BOOL HAL_MVD_GetIsAVSyncOn(MS_U8 u8Idx)
8587 {
8588     MS_BOOL bAVSyncOn = FALSE;
8589     MVD_CtrlCfg* pCtrlCfg = HAL_MVD_GetCtrlCfg(u8Idx);
8590     if (pCtrlCfg)
8591     {
8592         bAVSyncOn = pCtrlCfg->bAVSyncOn;
8593     }
8594 
8595     return bAVSyncOn;
8596 }
8597 
HAL_MVD_SetExternalDSBuff(MS_U8 u8Idx,MS_VIRT u32VPUAddr,MS_VIRT u32DrvAddr)8598 MS_BOOL HAL_MVD_SetExternalDSBuff(MS_U8 u8Idx, MS_VIRT u32VPUAddr, MS_VIRT u32DrvAddr)
8599 {
8600     MS_BOOL bRet = TRUE;
8601     MVD_FWBuff* pBuff = &(pMVDHalContext->stFWBuff[u8Idx]);
8602 
8603     pBuff->u32DynScalingAdd = u32DrvAddr;
8604     bRet = HAL_MVD_SetDynamicScaleAddr(u8Idx, u32VPUAddr);
8605     return bRet;
8606 }
8607 
HAL_MVD_ShowFirstFrameDirect(MS_U8 u8Idx,MS_U8 bEnable)8608 MS_BOOL HAL_MVD_ShowFirstFrameDirect(MS_U8 u8Idx, MS_U8 bEnable)
8609 {
8610     MVD_CmdArg mvdcmd;
8611 
8612     SETUP_CMDARG(mvdcmd);
8613     mvdcmd.Arg0 = bEnable;
8614     SET_DECNUM(mvdcmd, u8Idx);
8615 
8616     MVD_DEBUGINFO(MVD_PRINT("%s CMD_PUSH_FIRST_FRAME_DISP arg0=%x)\n", __FUNCTION__, bEnable));
8617     SET_CMD_RET_FALSE(CMD_PUSH_FIRST_FRAME_DISP, &mvdcmd);
8618 
8619     return TRUE;
8620 }
8621 
HAL_MVD_SetXCLowDelayPara(MS_U8 u8Idx,MS_U32 u32Para)8622 E_MVD_Result HAL_MVD_SetXCLowDelayPara(MS_U8 u8Idx,MS_U32 u32Para)
8623 {
8624     MVD_CmdArg mvdcmd;
8625 
8626     SETUP_CMDARG(mvdcmd);
8627     mvdcmd.Arg0 = L_WORD(u32Para); // for set the XC diff_field_number
8628     mvdcmd.Arg1 = H_WORD(u32Para); // for set XC UCNR diff field no
8629     SET_DECNUM(mvdcmd, u8Idx);
8630 
8631     SET_CMD_RET_FALSE(CMD_XC_LOW_DELAY_PARA, &mvdcmd);
8632 
8633     return TRUE;
8634 }
8635 
HAL_MVD_GetESBufferStatus(MS_U8 u8Idx)8636 MS_U8 HAL_MVD_GetESBufferStatus(MS_U8 u8Idx)
8637 {
8638     return (MS_U8)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_CURRENT_ES_BUFFER_STATUS, sizeof(MS_U8)));
8639 }
8640 
HAL_MVD_Field_Polarity_Display_One_field(MS_U8 u8Idx,MS_BOOL bEn,MS_U8 top_bottom)8641 MS_BOOL HAL_MVD_Field_Polarity_Display_One_field(MS_U8 u8Idx, MS_BOOL bEn,MS_U8 top_bottom)
8642 {
8643     MVD_CmdArg mvdcmd;
8644 
8645     SETUP_CMDARG(mvdcmd);
8646     mvdcmd.Arg2 = bEn;
8647     mvdcmd.Arg3 = top_bottom;
8648     MVD_DEBUGINFO(MVD_PRINT("%s: bEn=%x,top_bottom=%x\n", __FUNCTION__, bEn,top_bottom));
8649     SET_DECNUM(mvdcmd, u8Idx);
8650     SET_CMD_RET_FALSE(CMD_FP_FILTER, &mvdcmd);
8651 
8652     return TRUE;
8653 }
8654 
8655 
HAL_MVD_SetShareMemoryBase(MS_U8 u8Idx,MS_VIRT u32base,MS_U8 u8sel)8656 MS_BOOL HAL_MVD_SetShareMemoryBase(MS_U8 u8Idx, MS_VIRT u32base, MS_U8 u8sel)
8657 {
8658     u8SHMMiuSel = u8sel;
8659     u32SharememoryBase[u8Idx] = u32base - MVD_FW_CODE_LEN;
8660     return TRUE;
8661 }
8662 
HAL_MVD_GetShareMemoryOffset(MS_U8 u8Idx,MS_VIRT * u32base)8663 MS_BOOL HAL_MVD_GetShareMemoryOffset(MS_U8 u8Idx, MS_VIRT *u32base)
8664 {
8665     *u32base=u32SharememoryBase[u8Idx];
8666     return  TRUE;
8667 }
8668 
HAL_MVD_Support2ndMVOPInterface(void)8669 MS_BOOL HAL_MVD_Support2ndMVOPInterface(void)
8670 {
8671     return TRUE;
8672 }
8673 
HAL_MVD_SetExternal_CC_Buffer(MS_U8 u8Idx,MS_VIRT u32base,MS_U8 u8size,MS_U8 cc_type)8674 MS_BOOL HAL_MVD_SetExternal_CC_Buffer(MS_U8 u8Idx, MS_VIRT u32base, MS_U8 u8size, MS_U8 cc_type)
8675 {
8676     MVD_CmdArg mvdcmd;
8677     MS_U32 u32cc_size=0;
8678     MS_VIRT u32StartOffset;
8679     MS_U8  u8MiuSel;
8680 
8681     SETUP_CMDARG(mvdcmd);
8682     if (u8size !=0)
8683     {
8684         mvdcmd.Arg0 = TRUE; //enable
8685     }
8686     else
8687     {
8688         mvdcmd.Arg0 = FALSE; //disable
8689     }
8690     mvdcmd.Arg1 = cc_type; //608->1,708->0
8691 
8692     SET_DECNUM(mvdcmd, u8Idx);
8693     SET_CMD_RET_FALSE(CMD_CC_ENABLE_EXTERNAL_BUFFER, &mvdcmd);
8694 
8695     if (u8size ==0)
8696     {
8697         SET_CMD_RET_FALSE(CMD_CLOSE_CC, &mvdcmd);
8698         return E_MVD_RET_OK;
8699     }
8700 
8701     u32base *= (1<<10); //unit is bytes
8702     u32cc_size = u8size * (1<<10); //unit is bytes
8703 
8704 
8705     MS_U32 *pu32ReadPtr = (MS_U32 *)(HAL_MVD_PA2NonCacheSeg(u32base));
8706     MS_U32 *pu32WritePtr = (MS_U32 *)(HAL_MVD_PA2NonCacheSeg(u32base+sizeof(MS_U32)));
8707     MS_U32 *pu32LatchOverflow = (MS_U32 *)(HAL_MVD_PA2NonCacheSeg(u32base+sizeof(MS_U32)*2));
8708     MS_U32 *pu32CpuBaseAddr = (MS_U32 *)(HAL_MVD_PA2NonCacheSeg(u32base+sizeof(MS_U32)*3));
8709 
8710     //rptr,wptr,overflow,latch 16 bytes
8711     if(cc_type==1)
8712     {
8713         u32base += (4*sizeof(MS_U32));
8714         u32cc_size -= (4*sizeof(MS_U32));
8715     }
8716 
8717     if(cc_type==0) // 708: start from 128 bytes
8718     {
8719         u32base += 128;
8720         u32cc_size -=128;
8721     }
8722 
8723     *pu32ReadPtr = *pu32WritePtr = u32base;
8724     *pu32LatchOverflow = 0;
8725     *pu32CpuBaseAddr = HAL_MVD_GetMEMCfg(u8Idx)->u32FWBinAddr;
8726 
8727     _phy_to_miu_offset(u8MiuSel, u32StartOffset, u32base);
8728     _MVD_SetUserDataBufStart(u8Idx,u32StartOffset,cc_type);
8729     _MVD_SetUserDataBufSize(u8Idx,u32cc_size,cc_type);
8730     //MVD_DEBUGINFO(MVD_PRINT("%s: u32base=%x,u32size=%x,cc_type=%x\n", __FUNCTION__,u32base,u32cc_size,cc_type));
8731 
8732     return E_MVD_RET_OK;
8733 }
8734 
HAL_MVD_GetPVRSeamlessInfo(MS_U8 u8Idx,void * param)8735 MS_BOOL HAL_MVD_GetPVRSeamlessInfo(MS_U8 u8Idx,void* param)
8736 {
8737 
8738     MVD_PVR_Seamless_Info* temp = (MVD_PVR_Seamless_Info*)param;
8739 
8740     temp->u64PTS = ((MS_U64)MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_PVRSEAMLESSTARGETPTS, sizeof(MS_U32))) |
8741                    (((MS_U64)MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_PVRSEAMLESSTARGETPTSHIGH, sizeof(MS_U8)))<<32);
8742 
8743     temp->u32POC = 0xFF; // not support in mvd
8744     temp->u8FrameType = MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_PVRSEAMLESSTARGETFRAMETYPE, sizeof(MS_U8));
8745 
8746     return TRUE;
8747 }
8748 
HAL_MVD_HWBuffer_ReMappingMode(MS_U8 u8Idx,MS_BOOL bEnable)8749 E_MVD_Result HAL_MVD_HWBuffer_ReMappingMode(MS_U8 u8Idx,MS_BOOL bEnable)
8750 {
8751    pMVDHalContext->gMVDPreCtrl[u8Idx].bHWBufferReMapping = bEnable;
8752     return E_MVD_RET_OK;
8753 }
8754 
HAL_MVD_SetPrebufferSize(MS_U8 u8Idx,MS_U32 size)8755 MS_BOOL HAL_MVD_SetPrebufferSize(MS_U8 u8Idx, MS_U32 size)
8756 {
8757     MVD_CmdArg mvdcmd;
8758 
8759     SETUP_CMDARG(mvdcmd);
8760     mvdcmd.Arg0 = size&0xff;
8761     mvdcmd.Arg1 = (size>>8)&0xff;
8762     mvdcmd.Arg2 = (size>>16)&0xff;
8763     mvdcmd.Arg3 = (size>>24)&0xff;
8764     SET_DECNUM(mvdcmd, u8Idx);
8765     if (HAL_MVD_MVDCommand( CMD_PREBUFFER_SIZE, &mvdcmd ) == FALSE)
8766     {
8767         MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_PREBUFFER_SIZE ) );
8768         return FALSE;
8769     }
8770     return TRUE;
8771 }
8772 
HAL_MVD_GetVsyncAddrOffset(void)8773 MS_VIRT HAL_MVD_GetVsyncAddrOffset(void)
8774 {
8775     MS_VIRT VPUSHMAddr = HAL_VPU_EX_GetSHMAddr();
8776     MS_VIRT VsyncBridgeOffset = 0;
8777 
8778     if(VPUSHMAddr != 0)  // TEE project
8779     {
8780         VsyncBridgeOffset = VSYNC_BRIDGE_OFFSET;
8781     }
8782     else  // normal project
8783     {
8784         VsyncBridgeOffset = COMMON_AREA_START + VSYNC_BRIDGE_OFFSET;
8785     }
8786 
8787     return VsyncBridgeOffset;
8788 }
8789 
HAL_MVD_GetVsyncExtAddrOffset(void)8790 MS_VIRT HAL_MVD_GetVsyncExtAddrOffset(void)
8791 {
8792     MS_VIRT VsyncBridgeExtOffset = 0;
8793 
8794     MS_VIRT VPUSHMAddr = HAL_VPU_EX_GetSHMAddr();
8795     if(VPUSHMAddr != 0)  // TEE project
8796     {
8797         VsyncBridgeExtOffset = VSYNC_BRIDGE_EXT_OFFSET;
8798     }
8799     else  // normal project
8800     {
8801         VsyncBridgeExtOffset = COMMON_AREA_START + VSYNC_BRIDGE_EXT_OFFSET;
8802     }
8803     return VsyncBridgeExtOffset;
8804 }
8805 
HAL_MVD_SetTimeIncPredictParam(MS_U8 u8Idx,MS_U32 u32time)8806 E_MVD_Result HAL_MVD_SetTimeIncPredictParam(MS_U8 u8Idx, MS_U32 u32time)
8807 {
8808     MVD_CmdArg mvdcmd;
8809     SETUP_CMDARG(mvdcmd);
8810 
8811     mvdcmd.Arg0 = L_WORD(u32time); // Arg0(enable), 1 for enable, default is 0...
8812     mvdcmd.Arg1 = H_WORD(u32time); // Arg1(vop_time_incr_predict_count), 1 for predict once, 2 for twice...0xff for always guess the vop_time_incr even with the vol_header, default is 0...
8813     mvdcmd.Arg2 = L_DWORD(u32time);// Arg2(vop_time_incr_follow_vol_header), // 0 for follow vol_header...1 for bypass vol_header, default is 0...
8814     mvdcmd.Arg3 = H_DWORD(u32time);// Arg3, reserve...
8815     MVD_DEBUGINFO(MVD_PRINT("CMD_TIME_INCR_PREDICT=%x\n",u32time));
8816     if (HAL_MVD_MVDCommand(CMD_TIME_INCR_PREDICT, &mvdcmd) == FALSE)
8817     {
8818         MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_TIME_INCR_PREDICT ) );
8819         return E_MVD_RET_FAIL;
8820     }
8821     return E_MVD_RET_OK;
8822 
8823 }
8824 
HAL_MVD_SetDecodeTimeoutParam(MS_U8 u8Idx,MS_BOOL enable,MS_U32 u32timeout)8825 MS_BOOL HAL_MVD_SetDecodeTimeoutParam(MS_U8 u8Idx, MS_BOOL enable,MS_U32 u32timeout)
8826 {
8827     MVD_CmdArg mvdcmd;
8828 
8829     SETUP_CMDARG(mvdcmd);
8830 
8831     if(enable == TRUE)
8832     {
8833         mvdcmd.Arg0 = 2; //0:disable, 2: enable decode timeout
8834         mvdcmd.Arg1 = u32timeout&0xff;
8835         mvdcmd.Arg2 = (u32timeout>>8)&0xff;
8836         mvdcmd.Arg3 = (u32timeout>>16)&0xff;
8837     }
8838     else
8839     {
8840         mvdcmd.Arg0 = 0; //0:disable, 2: enable decode timeout
8841     }
8842 
8843     SET_DECNUM(mvdcmd, u8Idx);
8844 
8845     if (HAL_MVD_MVDCommand( CMD_ENABLE_VLD_TIMEOUT, &mvdcmd ) == FALSE)
8846     {
8847         MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_ENABLE_VLD_TIMEOUT ) );
8848         return FALSE;
8849     }
8850 
8851     return TRUE;
8852 }
8853 
HAL_MVD_Set_Smooth_Rewind(MS_U8 u8Idx,MS_U8 btype)8854 E_MVD_Result HAL_MVD_Set_Smooth_Rewind(MS_U8 u8Idx, MS_U8 btype)
8855 {
8856     MVD_CmdArg mvdcmd;
8857     SETUP_CMDARG(mvdcmd);
8858     mvdcmd.Arg0 = btype;
8859     MVD_DEBUGINFO(MVD_PRINT("%s: btype=%x\n", __FUNCTION__, btype));
8860     SET_DECNUM(mvdcmd, u8Idx);
8861     if (HAL_MVD_MVDCommand(CMD_SMOOTH_REWIND, &mvdcmd) == FALSE)
8862     {
8863         MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_SMOOTH_REWIND ) );
8864         return E_MVD_RET_FAIL;
8865     }
8866     return E_MVD_RET_OK;
8867 }
8868 
HAL_MVD_IsAlive(MS_U8 u8Idx)8869 E_MVD_Result HAL_MVD_IsAlive(MS_U8 u8Idx)
8870 {
8871     MVD_ALIVEInfo* pAliveInfo = &(pMVDHalContext->aliveInfo[u8Idx]);
8872 
8873         //check count to vertify alive
8874     if((pAliveInfo->u32decode_count!=(MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_DECODEDONE_COUNT, sizeof(MS_U32))))||
8875        (pAliveInfo->u32searchbuf_count!=(MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_SEARCHBUF_COUNT, sizeof(MS_U32))))||
8876        (pAliveInfo->u32searchcode_count!=(MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_SEARCHCODE_COUNT, sizeof(MS_U32))))||
8877        (pAliveInfo->u32prebuf_count!=(MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_PREBUF_COUNT, sizeof(MS_U32))))||
8878        (pAliveInfo->u32vfifobuf_count!=(MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_VFIFOBUF_COUNT, sizeof(MS_U32))))||
8879        (pAliveInfo->u32searchheader_count!=(MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_SEARCHHEADER_COUNT, sizeof(MS_U32))))||
8880        (pAliveInfo->u32flashpattern_count!=(MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_FLASHPATTERN_COUNT, sizeof(MS_U32)))))
8881     {
8882         pAliveInfo->u32decode_count=(MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_DECODEDONE_COUNT, sizeof(MS_U32)));
8883         pAliveInfo->u32searchbuf_count=(MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_SEARCHBUF_COUNT, sizeof(MS_U32)));
8884         pAliveInfo->u32searchcode_count=(MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_SEARCHCODE_COUNT, sizeof(MS_U32)));
8885         pAliveInfo->u32prebuf_count=(MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_PREBUF_COUNT, sizeof(MS_U32)));
8886         pAliveInfo->u32vfifobuf_count=(MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_VFIFOBUF_COUNT, sizeof(MS_U32)));
8887         pAliveInfo->u32searchheader_count=(MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_SEARCHHEADER_COUNT, sizeof(MS_U32)));
8888         pAliveInfo->u32flashpattern_count=(MS_U32)(MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_FLASHPATTERN_COUNT, sizeof(MS_U32)));
8889         return E_MVD_RET_OK;
8890     }
8891     else
8892     {
8893         return E_MVD_RET_FAIL;
8894     }
8895 
8896 }
8897 
HAL_MVD_Set_Err_Tolerance(MS_U8 u8Idx,MS_U16 u16Para)8898 E_MVD_Result HAL_MVD_Set_Err_Tolerance(MS_U8 u8Idx, MS_U16 u16Para)
8899 {
8900     MVD_CmdArg mvdcmd;
8901     SETUP_CMDARG(mvdcmd);
8902     mvdcmd.Arg0 = u16Para & 0xFF; //enable or disable
8903     mvdcmd.Arg1 = u16Para >> 8; // err rate 0~100%
8904     if(mvdcmd.Arg1 >= 100)
8905         mvdcmd.Arg1 = 100;
8906 
8907     SET_DECNUM(mvdcmd, u8Idx);
8908     if (HAL_MVD_MVDCommand(CMD_DECODE_ERROR_TOLERANCE, &mvdcmd) == FALSE)
8909     {
8910         MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_DECODE_ERROR_TOLERANCE ) );
8911         return E_MVD_RET_FAIL;
8912     }
8913     return E_MVD_RET_OK;
8914 
8915 }
8916 
HAL_MVD_EnableAutoInsertDummyPattern(MS_U8 u8Idx,MS_BOOL bEnable)8917 void HAL_MVD_EnableAutoInsertDummyPattern(MS_U8 u8Idx, MS_BOOL bEnable)
8918 {
8919     pMVDHalContext->bAutoInsertDummyPattern[u8Idx] = bEnable;
8920 }
8921 
HAL_MVD_Drop_One_PTS(MS_U8 u8Idx)8922 void HAL_MVD_Drop_One_PTS(MS_U8 u8Idx)
8923 {
8924     pMVDHalContext->bDropOnePTS[u8Idx] = TRUE;
8925 }
8926 
HAL_MVD_PVR_Seamless_mode(MS_U8 u8Idx,MS_U8 u8Arg)8927 E_MVD_Result HAL_MVD_PVR_Seamless_mode(MS_U8 u8Idx, MS_U8 u8Arg)
8928 {
8929     #define STOP_TIMEOUT 500 //ms
8930     MVD_CmdArg mvdcmd;
8931     E_MVD_Result ret = E_MVD_RET_OK;
8932     MS_U32 u32StartTime;
8933     MS_U32 u32SeamlessStatus = 0;
8934     MS_U32 u32BufStart = 0;
8935     MS_U32* temp = 0;
8936 
8937     if(u8Arg != 2)
8938     {
8939         // clear handshake dram
8940         u32BufStart = GET_FRMINFO_BUFFADD(u8Idx);
8941         _miu_offset_to_phy(pMVDHalContext->stMiuCfg.u8FWMiuSel,u32BufStart,u32BufStart);
8942         temp = (MS_U32*)MsOS_PA2KSEG1(u32BufStart+OFFSET_PVR_SEAMLESS_STATUS);
8943         *temp = 0;
8944         MsOS_FlushMemory();
8945     }
8946 
8947     SETUP_CMDARG(mvdcmd);
8948     mvdcmd.Arg0 = u8Arg;
8949     MVD_DEBUGINFO(MVD_PRINT("%s: arg=%d\n", __FUNCTION__, (unsigned int)u8Arg));
8950     SET_DECNUM(mvdcmd, u8Idx);
8951 
8952     if (HAL_MVD_MVDCommand(CMD_PVR_SEAMLESS_MODE, &mvdcmd) == FALSE)
8953     {
8954         MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_PVR_SEAMLESS_MODE ) );
8955         return E_MVD_RET_FAIL;
8956     }
8957 
8958 
8959     u32StartTime = HAL_MVD_GetTime();
8960 
8961     if(u8Arg == 1)
8962     {
8963          pMVDHalContext->stFwCfg[u8Idx].eSrcMode = E_MVD_TS_FILE_MODE;
8964         while(1)
8965         {
8966             u32SeamlessStatus = MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_PVR_SEAMLESS_STATUS, sizeof(MS_U32));
8967             if(u32SeamlessStatus&1) // bit0 , pause done
8968             {
8969                 break;
8970             }
8971 
8972             if((HAL_MVD_GetTime()-u32StartTime)>STOP_TIMEOUT)
8973             {
8974                 MVD_DEBUGERROR(MVD_PRINT("PVR seamless pause timeout\n" ) );
8975                 ret = E_MVD_RET_FAIL;
8976                 break;
8977             }
8978         }
8979     }
8980     else if(u8Arg == 2)
8981     {
8982         while(1)
8983         {
8984             u32SeamlessStatus = MVD_GetFWBuffData(u8Idx, FW_BUFF_FRMINFO, OFFSET_PVR_SEAMLESS_STATUS, sizeof(MS_U32));
8985             if(u32SeamlessStatus&4) // bit2, hw reset done
8986             {
8987                 break;
8988             }
8989 
8990             if((HAL_MVD_GetTime()-u32StartTime)>STOP_TIMEOUT)
8991             {
8992                 MVD_DEBUGERROR(MVD_PRINT("PVR seamless hw reset timeout\n" ) );
8993                 ret = E_MVD_RET_FAIL;
8994                 break;
8995             }
8996         }
8997     }
8998 
8999     return ret;
9000 }
9001 
HAL_MVD_SetDisplayFinishMode(MS_U8 u8Idx,MS_U8 u8Mode)9002 E_MVD_Result HAL_MVD_SetDisplayFinishMode(MS_U8 u8Idx, MS_U8 u8Mode)
9003 {
9004     MVD_CmdArg mvdcmd;
9005 
9006     SETUP_CMDARG(mvdcmd);
9007     mvdcmd.Arg0 = u8Mode;
9008 
9009     SET_DECNUM(mvdcmd, u8Idx);
9010 
9011     MVD_DEBUGINFO(MVD_PRINT("%s CMD_ENABLE_LAST_FRAME_QUALIFIER arg0=%x\n", __FUNCTION__, u8Mode));
9012     if (HAL_MVD_MVDCommand(CMD_ENABLE_LAST_FRAME_QUALIFIER, &mvdcmd)== FALSE)
9013     {
9014         MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_ENABLE_LAST_FRAME_QUALIFIER) );
9015         return E_MVD_RET_FAIL;
9016     }
9017 
9018     return E_MVD_RET_OK;
9019 }
9020 
HAL_MVD_Set_SlowSyncParam(MS_U8 u8Idx,MS_U8 u8RepeatPeriod,MS_U8 u8DropPeriod)9021 E_MVD_Result HAL_MVD_Set_SlowSyncParam(MS_U8 u8Idx, MS_U8 u8RepeatPeriod,MS_U8 u8DropPeriod)
9022 {
9023     MVD_CmdArg mvdcmd;
9024     SETUP_CMDARG(mvdcmd);
9025 
9026     mvdcmd.Arg0 = u8RepeatPeriod;
9027 
9028     SET_DECNUM(mvdcmd, u8Idx);
9029     if (HAL_MVD_MVDCommand(CMD_SLOW_SYNC_REPEAT, &mvdcmd) == FALSE)
9030     {
9031         MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_SLOW_SYNC_REPEAT ) );
9032         return E_MVD_RET_FAIL;
9033     }
9034 
9035 
9036     mvdcmd.Arg0 = u8DropPeriod;
9037 
9038     SET_DECNUM(mvdcmd, u8Idx);
9039     if (HAL_MVD_MVDCommand(CMD_SLOW_SYNC_SKIP, &mvdcmd) == FALSE)
9040     {
9041         MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_SLOW_SYNC_SKIP ) );
9042         return E_MVD_RET_FAIL;
9043     }
9044 
9045 
9046     return E_MVD_RET_OK;
9047 
9048 }
9049 
HAL_MVD_VariableFrameRate(MS_U8 u8Idx)9050 MS_BOOL HAL_MVD_VariableFrameRate(MS_U8 u8Idx)
9051 {
9052     MVD_CmdArg mvdcmd;
9053     SETUP_CMDARG(mvdcmd);
9054     mvdcmd.Arg0 = 1;
9055     SET_DECNUM(mvdcmd, u8Idx);
9056     if (HAL_MVD_MVDCommand(CMD_VARIABLE_FRAMERATE, &mvdcmd)== FALSE)
9057     {
9058         MVD_DEBUGERROR( MVD_PRINT( "Command: 0x%x fail!!\r\n", CMD_VARIABLE_FRAMERATE) );
9059         return FALSE;
9060     }
9061     return TRUE;
9062 }
9063 
9064 //------------------------------------------------------------------------------
9065 /// Set FRC Only Show TopField
9066 /// @return -TRUE for success; FALSE for failure.
9067 //------------------------------------------------------------------------------
HAL_MVD_FRC_OnlyShowTopField(MS_U8 u8Idx,MS_BOOL bEnable)9068 MS_BOOL HAL_MVD_FRC_OnlyShowTopField(MS_U8 u8Idx, MS_BOOL bEnable)
9069 {
9070     MVD_CmdArg mvdcmd;
9071 
9072     SETUP_CMDARG(mvdcmd);
9073     mvdcmd.Arg0 = bEnable; //1 -> show Only Show TopField.  0 -> normal case.
9074     SET_DECNUM(mvdcmd, u8Idx);
9075     SET_CMD_RET_FALSE(CMD_FRC_ONLY_SHOW_TOP_FIELD, &mvdcmd);
9076     return TRUE;
9077 }
9078 
9079 
9080 
HAL_MVD_GetVBBUTableAddr(MS_U8 u8Idx)9081 MS_VIRT HAL_MVD_GetVBBUTableAddr(MS_U8 u8Idx)
9082 {
9083     return pMVDHalContext->stFWBuff[(u8Idx)].u32VBBUTableAdd;
9084 }
9085 
HAL_MVD_SetDmxFrameRate(MS_U8 u8HalIdx,MS_U32 u32Value)9086 void HAL_MVD_SetDmxFrameRate(MS_U8 u8HalIdx,MS_U32 u32Value)
9087 {
9088     pMVDHalContext->u32DmxFrameRate[u8HalIdx] = u32Value;
9089 }
9090 
HAL_MVD_SetDmxFrameRateBase(MS_U8 u8HalIdx,MS_U32 u32Value)9091 void HAL_MVD_SetDmxFrameRateBase(MS_U8 u8HalIdx,MS_U32 u32Value)
9092 {
9093     pMVDHalContext->u32DmxFrameRateBase[u8HalIdx] = u32Value;
9094 }
9095 
HAL_MVD_TrickPlay2xAVSync(MS_U8 u8Idx,MS_BOOL bEnable)9096 void HAL_MVD_TrickPlay2xAVSync(MS_U8 u8Idx,MS_BOOL bEnable)
9097 {
9098     pMVDHalContext->bTrickPlay2xAVSync[u8Idx] = bEnable;
9099 }
9100 
HAL_MVD_SetCMAInformation(void * cmaInitParam)9101 void HAL_MVD_SetCMAInformation(void* cmaInitParam)
9102 {
9103     pMVDHalContext->bCMAUsed = TRUE;
9104     #if defined(MSOS_TYPE_LINUX) && defined(SUPPORT_CMA)
9105     memcpy((void*)(&pMVDHalContext->cmaInitParam),cmaInitParam,sizeof(struct CMA_Pool_Init_Param));
9106     #endif
9107 }
9108 
HAL_MVD_IsDispQueueEmpty(MS_U8 u8Idx)9109 E_MVD_DISP_QUEUE HAL_MVD_IsDispQueueEmpty(MS_U8 u8Idx)
9110 {
9111     MS_U32 u32Id = MVD_GetStreamId(u8Idx);
9112     MS_U8 u8VPUIdx = HAL_VPU_EX_GetTaskId(u32Id);
9113 
9114     MVD_MEMCfg* pstMemCfg = NULL;
9115     pstMemCfg = HAL_MVD_GetMEMCfg(u8Idx);
9116     DISPQ_IN_DRAM* pTemp = (DISPQ_IN_DRAM*)(MS_PA2KSEG1(pstMemCfg->u32FWCodeAddr+DISP_QUEUE_START+ u8VPUIdx*0x100000));
9117 
9118     //MVD_PRINT("dispQ_rd: %u,dispQ_wr: %u\n",pTemp->dispQ_rd,pTemp->dispQ_wr);
9119     if(pTemp)
9120     {
9121         if (pTemp->dispQ_rd == pTemp->dispQ_wr)
9122             return MVD_DISP_QUEUE_EMPTY;
9123         else
9124             return MVD_DISP_QUEUE_NOT_EMPTY;
9125     }
9126     else
9127         return MVD_DISP_QUEUE_INVALID_ADDR;
9128 }
9129 
HAL_MVD_GetCMAInformation(MS_U8 u8HalIdx,MS_U64 * u64Addr,MS_SIZE * u64Size,MS_BOOL * bAllocDone)9130 void HAL_MVD_GetCMAInformation(MS_U8 u8HalIdx,MS_U64* u64Addr,MS_SIZE* u64Size,MS_BOOL* bAllocDone)
9131 {
9132     FW_VOL_INFO gvolInfo;
9133     MS_U32 u32VolAddr;
9134 
9135     _miu_offset_to_phy(pMVDHalContext->stMiuCfg.u8FWMiuSel,GET_VOL_BUFFADD(u8HalIdx),u32VolAddr);
9136 
9137     gvolInfo = (*(volatile FW_VOL_INFO*)(MsOS_PA2KSEG1(u32VolAddr)));
9138 
9139     *u64Addr = (MS_U64)gvolInfo.CMA_FB_Address;
9140     *u64Size = (MS_SIZE)gvolInfo.CMA_FB_Size;
9141     *bAllocDone = gvolInfo.CMA_AllocDone;
9142 
9143     MsOS_ReadMemory();
9144     MsOS_FlushMemory();
9145 }
9146 
HAL_MVD_SetCMAAllocateDone(MS_U8 u8HalIdx)9147 void HAL_MVD_SetCMAAllocateDone(MS_U8 u8HalIdx)
9148 {
9149     MS_U8* temp;
9150     MS_VIRT u32VolAddr;
9151 
9152     _miu_offset_to_phy(pMVDHalContext->stMiuCfg.u8FWMiuSel,GET_VOL_BUFFADD(u8HalIdx),u32VolAddr);
9153 
9154     temp = (MS_U8*)(MsOS_PA2KSEG1(u32VolAddr+OFFSET_CMA_ALLOCDONE));
9155 
9156     *temp = 1;
9157 
9158     MsOS_ReadMemory();
9159     MsOS_FlushMemory();
9160 }
9161 
HAL_MVD_SetFrameBufferMiu(MS_U8 u8HalIdx,MS_U8 u8MiuIdx)9162 void HAL_MVD_SetFrameBufferMiu(MS_U8 u8HalIdx,MS_U8 u8MiuIdx)
9163 {
9164     //to do....
9165 }
9166 
9167 #ifdef VDEC3
HAL_MVD_IsDisplayCommand(MS_U8 u8Cmd)9168 MS_BOOL HAL_MVD_IsDisplayCommand(MS_U8 u8Cmd)
9169 {
9170 
9171 #if 1 // to do.
9172     UNUSED(u8Cmd);
9173     return TRUE;
9174 #else
9175     MS_BOOL ret;
9176     switch(u8Cmd)
9177     {
9178         case CMD_PLAY:
9179         case CMD_STOP:
9180         case CMD_DISPLAY_PAUSE:
9181         case CMD_PAUSE:
9182         case CMD_FLUSH_DISP_QUEUE:
9183         case CMD_VC1_HW_SLQ_RESET:
9184         case CMD_FAST_SLOW:
9185         case CMD_FLIP_RELEASE_FRAME:
9186         case CMD_FD_MASK_DELAY_CNT:
9187         case CMD_PVR_SEAMLESS_MODE:
9188         case CMD_SW_RESET:
9189         case CMD_CODEC_INFO:
9190         case CMD_CODE_OFFSET:
9191         case CMD_VOL_INFO_BUF:
9192         case CMD_FRAME_INFO_BUF:
9193         case CMD_HEADER_INFO_BUF:
9194         case CMD_USER_BUF_START:
9195         case CMD_USER_BUF_SIZE:
9196         case CMD_PTS_TBL_START:
9197         case CMD_DEC_FRAME_INFO_BUF:
9198         case CMD_SLQ_TBL_BUF_END:
9199         case CMD_SLQ_TBL_BUF_START:
9200         case CMD_STREAM_BUF_START:
9201         case CMD_STREAM_BUF_END:
9202         case CMD_FB_BASE:
9203         case CMD_IAP_BUF_START:
9204         case CMD_DP_BUF_START:
9205         case CMD_MV_BUF_START:
9206         case CMD_FB_NUM:
9207         case CMD_DISPLAY_CTL:
9208         case CMD_REPEAT_MODE:
9209         case CMD_DS_VIRTUAL_BOX:
9210         case CMD_ENABLE_FILE_SYNC:
9211         case CMD_RVU_EN:
9212         case CMD_START_DEC_STRICT:
9213         case CMD_SYNC_ON:
9214         case CMD_SET_MST_MODE:
9215         case CMD_SET_MCU_MODE:
9216             ret = TRUE;
9217             break;
9218         default:
9219             ret = FALSE;
9220             break;
9221     }
9222 
9223     return ret;
9224 #endif
9225 }
9226 
HAL_MVD_IsNormalCommand(MS_U8 u8Cmd)9227 MS_BOOL HAL_MVD_IsNormalCommand(MS_U8 u8Cmd)
9228 {
9229     MS_BOOL ret;
9230 
9231     switch(u8Cmd)
9232     {
9233 
9234         case CMD_DISP_SPEED_CTRL:
9235         case CMD_STEP_DISP_DECODE_ONE:
9236         case CMD_ENABLE_LAST_FRAME_SHOW:
9237         case CMD_STEP_TO_PTS:
9238         case CMD_SKIP_DATA:
9239         case CMD_DIU_WIDTH_ALIGN:
9240         case CMD_SCALER_INFO_BASE:
9241         case CMD_DYNAMIC_SCALE_BASE:
9242         case CMD_ENABLE_DYNAMIC_SCALE:
9243         case CMD_FORCE_BLUE_SCREEN:
9244         case CMD_FREEZE_DISP:
9245         case CMD_FIXED_FRAME_BUFFER:
9246         case CMD_SEND_UNI_PTS:
9247         case CMD_ENABLE_FREEZE_PIC:
9248         case CMD_PTS_BASE:
9249         case CMD_SINGLE_STEP:
9250         case CMD_PARSE_M4V_PACKMD:
9251         case CMD_SLQ_END:
9252         case CMD_SLQ_START:
9253         case CMD_ENABLE_INT_STAT:
9254         case CMD_SHOW_ONE_FIELD:
9255         case CMD_FRC_OUPUT:
9256         case CMD_FRC_DROP_BEHAVIOR:
9257         case CMD_FORBID_RESOLUTION_CHANGE:
9258         case CMD_DUMP_BITSTREAM_BASE:
9259         case CMD_DUMP_BITSTREAM_LENGTH:
9260         case CMD_SYNC_OFFSET:
9261         case CMD_SYN_THRESHOLD:
9262         case CMD_AVSYNC_FREERUN_THRESHOLD:
9263         case CMD_MVD_FAST_INT:
9264         case CMD_DIVX_PATCH:
9265         case CMD_IDCT_SEL:
9266         case CMD_SLQ_UPDATE_TBL_WPTR:
9267         case CMD_DMA_OVFTH:
9268         case CMD_DMA_UNFTH:
9269         case CMD_UPDATE_FRAME:
9270         case CMD_PTS_TBL_RESET:
9271         case CMD_ENABLE_AUTO_MUTE:
9272         case CMD_FORCE_ALIGN_VSIZE:
9273         case CMD_SUSPEND_DS:
9274         case CMD_PUSH_FIRST_FRAME_DISP:
9275         case CMD_XC_LOW_DELAY_PARA:
9276         case CMD_FP_FILTER:
9277         case CMD_CC_ENABLE_EXTERNAL_BUFFER:
9278         case CMD_CLOSE_CC:
9279         case CMD_PREBUFFER_SIZE:
9280         case CMD_TIME_INCR_PREDICT:
9281         case CMD_ENABLE_VLD_TIMEOUT:
9282         case CMD_SMOOTH_REWIND:
9283         case CMD_DECODE_ERROR_TOLERANCE:
9284         case CMD_MVD_IDLE:
9285         case CMD_PARSER_READ_POSITION:
9286         case CMD_SLQ_GET_TBL_RPTR:
9287         case CMD_DECODE_STATUS:
9288         case CMD_GET_AFD:
9289         case CMD_GET_SYNC_STAT:
9290         case CMD_RD_USER_WP:
9291         case CMD_ENABLE_LAST_FRAME_QUALIFIER:
9292         //case CMD_RD_IO: // no need in V3
9293         //case CMD_WR_IO: // no need in V3
9294             ret = TRUE;
9295             break;
9296         default:
9297             ret = FALSE;
9298             break;
9299     }
9300 
9301     return ret;
9302 }
9303 
HAL_MVD_IsNeedResponseCommand(MS_U8 u8Cmd)9304 MS_BOOL HAL_MVD_IsNeedResponseCommand(MS_U8 u8Cmd)
9305 {
9306     MS_BOOL ret;
9307 
9308     switch(u8Cmd)
9309     {
9310         case CMD_GET_AFD:
9311         case CMD_GET_SYNC_STAT:
9312         case CMD_RD_USER_WP:
9313         case CMD_DECODE_STATUS:
9314         case CMD_PARSER_READ_POSITION:
9315         case CMD_MVD_IDLE:
9316             ret = TRUE;
9317             break;
9318         default:
9319             ret = FALSE;
9320             break;
9321     }
9322 
9323     return ret;
9324 }
9325 #endif
9326 #endif
9327