xref: /utopia/UTPA2-700.0.x/modules/vdec_lite/drv/hvd_lite/drvHVD_def.h (revision 53ee8cc121a030b8d368113ac3e966b4705770ef)
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94*53ee8cc1Swenshuai.xi 
95*53ee8cc1Swenshuai.xi ///////////////////////////////////////////////////////////////////////////////////////////////////
96*53ee8cc1Swenshuai.xi ///
97*53ee8cc1Swenshuai.xi /// @file   drvHVD.h
98*53ee8cc1Swenshuai.xi /// @brief  HVD Driver Interface
99*53ee8cc1Swenshuai.xi /// @author MStar Semiconductor Inc.
100*53ee8cc1Swenshuai.xi ///////////////////////////////////////////////////////////////////////////////////////////////////
101*53ee8cc1Swenshuai.xi 
102*53ee8cc1Swenshuai.xi #ifndef _DRV_HVD_DEF_H_
103*53ee8cc1Swenshuai.xi #define _DRV_HVD_DEF_H_
104*53ee8cc1Swenshuai.xi 
105*53ee8cc1Swenshuai.xi #include "drvHVD_Common.h"
106*53ee8cc1Swenshuai.xi 
107*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
108*53ee8cc1Swenshuai.xi //  Driver Capability
109*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
110*53ee8cc1Swenshuai.xi 
111*53ee8cc1Swenshuai.xi // HW capability
112*53ee8cc1Swenshuai.xi #define HVD_HW_SVD  1
113*53ee8cc1Swenshuai.xi #define HVD_HW_HVD  2
114*53ee8cc1Swenshuai.xi #if defined(CHIP_T2)
115*53ee8cc1Swenshuai.xi #define HVD_HW_VERSION      HVD_HW_SVD
116*53ee8cc1Swenshuai.xi #else
117*53ee8cc1Swenshuai.xi #define HVD_HW_VERSION      HVD_HW_HVD
118*53ee8cc1Swenshuai.xi #endif
119*53ee8cc1Swenshuai.xi 
120*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
121*53ee8cc1Swenshuai.xi //  Macro and Define
122*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
123*53ee8cc1Swenshuai.xi // Feature switch
124*53ee8cc1Swenshuai.xi #if defined(REDLION_LINUX_KERNEL_ENVI)
125*53ee8cc1Swenshuai.xi     #define HVD_ENABLE_MUTEX_PROTECT                0
126*53ee8cc1Swenshuai.xi     #define HVD_ENABLE_MIU_RST_PROTECT              1
127*53ee8cc1Swenshuai.xi     #define HVD_ENABLE_AUTO_SET_REG_BASE            0
128*53ee8cc1Swenshuai.xi     #define HVD_ENABLE_MSOS_SYSTEM_CALL             0
129*53ee8cc1Swenshuai.xi     #define HVD_ENABLE_PATCH_ISFRAMERDY             0
130*53ee8cc1Swenshuai.xi     #define HVD_ENABLE_STOP_ACCESS_OVER_256         0
131*53ee8cc1Swenshuai.xi     #define HVD_ENABLE_AUTO_AVI_NULL_PACKET         0
132*53ee8cc1Swenshuai.xi     #define HVD_ENABLE_MSOS_MIU1_BASE               0
133*53ee8cc1Swenshuai.xi     #define HVD_ENABLE_BDMA_2_BITSTREAMBUF          0
134*53ee8cc1Swenshuai.xi     #define HVD_ENABLE_EMBEDDED_FW_BINARY           1
135*53ee8cc1Swenshuai.xi     #define HVD_ENABLE_CHECK_STATE_BEFORE_SET_CMD   0
136*53ee8cc1Swenshuai.xi     #define HVD_ENABLE_WAIT_CMD_FINISHED            0
137*53ee8cc1Swenshuai.xi     #define HVD_ENABLE_TIME_MEASURE                 0
138*53ee8cc1Swenshuai.xi     #define HVD_ENABLE_REINIT_FAILED                1
139*53ee8cc1Swenshuai.xi     #define HVD_ENABLE_RV_FEATURE                   0
140*53ee8cc1Swenshuai.xi #else
141*53ee8cc1Swenshuai.xi     #define HVD_ENABLE_MUTEX_PROTECT                1
142*53ee8cc1Swenshuai.xi     #define HVD_ENABLE_MIU_RST_PROTECT              1
143*53ee8cc1Swenshuai.xi     #if 1//defined( MSOS_TYPE_LINUX)
144*53ee8cc1Swenshuai.xi         #define HVD_ENABLE_AUTO_SET_REG_BASE        1
145*53ee8cc1Swenshuai.xi     #else
146*53ee8cc1Swenshuai.xi         #define HVD_ENABLE_AUTO_SET_REG_BASE        0
147*53ee8cc1Swenshuai.xi     #endif
148*53ee8cc1Swenshuai.xi     #if defined(MSOS_TYPE_LINUX) || defined(MSOS_TYPE_ECOS) //|| defined( MSOS_TYPE_NOS)
149*53ee8cc1Swenshuai.xi         #define HVD_ENABLE_PATCH_ISFRAMERDY         0
150*53ee8cc1Swenshuai.xi         #define HVD_ENABLE_MSOS_SYSTEM_CALL         1
151*53ee8cc1Swenshuai.xi     #else
152*53ee8cc1Swenshuai.xi         #define HVD_ENABLE_PATCH_ISFRAMERDY         1
153*53ee8cc1Swenshuai.xi         #define HVD_ENABLE_MSOS_SYSTEM_CALL         1
154*53ee8cc1Swenshuai.xi     #endif
155*53ee8cc1Swenshuai.xi     #if defined(MSOS_TYPE_NOS) && (defined(CHIP_T3) || defined(CHIP_T8) || defined(CHIP_J2))
156*53ee8cc1Swenshuai.xi         #define HVD_ENABLE_STOP_ACCESS_OVER_256     1
157*53ee8cc1Swenshuai.xi         #define HVD_ENABLE_BDMA_2_BITSTREAMBUF      1
158*53ee8cc1Swenshuai.xi     #else
159*53ee8cc1Swenshuai.xi         #define HVD_ENABLE_STOP_ACCESS_OVER_256     0
160*53ee8cc1Swenshuai.xi         #define HVD_ENABLE_BDMA_2_BITSTREAMBUF      0
161*53ee8cc1Swenshuai.xi     #endif
162*53ee8cc1Swenshuai.xi 
163*53ee8cc1Swenshuai.xi     #define HVD_ENABLE_AUTO_AVI_NULL_PACKET         1
164*53ee8cc1Swenshuai.xi 
165*53ee8cc1Swenshuai.xi     #if defined(CHIP_JANUS)
166*53ee8cc1Swenshuai.xi     #define HVD_ENABLE_MSOS_MIU1_BASE   0
167*53ee8cc1Swenshuai.xi     #else
168*53ee8cc1Swenshuai.xi     #define HVD_ENABLE_MSOS_MIU1_BASE   1
169*53ee8cc1Swenshuai.xi     #endif
170*53ee8cc1Swenshuai.xi 
171*53ee8cc1Swenshuai.xi     #define HVD_ENABLE_CHECK_STATE_BEFORE_SET_CMD   0
172*53ee8cc1Swenshuai.xi     #define HVD_ENABLE_WAIT_CMD_FINISHED   0
173*53ee8cc1Swenshuai.xi     #define HVD_ENABLE_TIME_MEASURE     0
174*53ee8cc1Swenshuai.xi     #define HVD_ENABLE_REINIT_FAILED        0
175*53ee8cc1Swenshuai.xi 
176*53ee8cc1Swenshuai.xi     #if defined(CHIP_T2) || defined(CHIP_U3) || defined(CHIP_T3) || defined(CHIP_T4) || defined(CHIP_T7)
177*53ee8cc1Swenshuai.xi         #define HVD_ENABLE_RV_FEATURE   0
178*53ee8cc1Swenshuai.xi     #else
179*53ee8cc1Swenshuai.xi         #define HVD_ENABLE_RV_FEATURE   1
180*53ee8cc1Swenshuai.xi     #endif
181*53ee8cc1Swenshuai.xi 
182*53ee8cc1Swenshuai.xi     #if defined(CHIP_T12) || \
183*53ee8cc1Swenshuai.xi         defined(CHIP_J2) || \
184*53ee8cc1Swenshuai.xi         defined(CHIP_A1) || \
185*53ee8cc1Swenshuai.xi         defined(CHIP_A2) || \
186*53ee8cc1Swenshuai.xi         defined(CHIP_A5) || \
187*53ee8cc1Swenshuai.xi         defined(CHIP_A5P) || \
188*53ee8cc1Swenshuai.xi         defined(CHIP_A7) || \
189*53ee8cc1Swenshuai.xi         defined(CHIP_A3) || \
190*53ee8cc1Swenshuai.xi         defined(CHIP_AMETHYST)|| \
191*53ee8cc1Swenshuai.xi         defined(CHIP_AGATE) || \
192*53ee8cc1Swenshuai.xi         defined(CHIP_EDISON) || \
193*53ee8cc1Swenshuai.xi         defined(CHIP_EMERALD)|| \
194*53ee8cc1Swenshuai.xi         defined(CHIP_EAGLE) || \
195*53ee8cc1Swenshuai.xi         defined(CHIP_EIFFEL) || \
196*53ee8cc1Swenshuai.xi         defined(CHIP_NIKE) || \
197*53ee8cc1Swenshuai.xi         defined(CHIP_MADISON) || \
198*53ee8cc1Swenshuai.xi         defined(CHIP_CLIPPERS) || \
199*53ee8cc1Swenshuai.xi         defined(CHIP_MIAMI) || \
200*53ee8cc1Swenshuai.xi         defined(CHIP_NUGGET) || \
201*53ee8cc1Swenshuai.xi         defined(CHIP_KAISER) || \
202*53ee8cc1Swenshuai.xi         defined(CHIP_NIKON)  || \
203*53ee8cc1Swenshuai.xi         defined(CHIP_EINSTEIN)|| \
204*53ee8cc1Swenshuai.xi         defined(CHIP_NAPOLI) || \
205*53ee8cc1Swenshuai.xi         defined(CHIP_KERES)  || \
206*53ee8cc1Swenshuai.xi         defined(CHIP_MONACO)  || \
207*53ee8cc1Swenshuai.xi         defined(CHIP_MUJI)  || \
208*53ee8cc1Swenshuai.xi         defined(CHIP_MUNICH) || \
209*53ee8cc1Swenshuai.xi         defined(CHIP_MONET) || \
210*53ee8cc1Swenshuai.xi         defined(CHIP_MANHATTAN) || \
211*53ee8cc1Swenshuai.xi         defined(CHIP_KANO)
212*53ee8cc1Swenshuai.xi         #define HVD_ENABLE_MVC     1
213*53ee8cc1Swenshuai.xi     #else
214*53ee8cc1Swenshuai.xi         #define HVD_ENABLE_MVC     0
215*53ee8cc1Swenshuai.xi     #endif
216*53ee8cc1Swenshuai.xi 
217*53ee8cc1Swenshuai.xi #endif
218*53ee8cc1Swenshuai.xi 
219*53ee8cc1Swenshuai.xi #if defined(REDLION_LINUX_KERNEL_ENVI)
220*53ee8cc1Swenshuai.xi     #include "drvHVD_redlion.h"
221*53ee8cc1Swenshuai.xi #endif
222*53ee8cc1Swenshuai.xi 
223*53ee8cc1Swenshuai.xi #if (HVD_ENABLE_MUTEX_PROTECT) || ( HVD_ENABLE_MSOS_SYSTEM_CALL )
224*53ee8cc1Swenshuai.xi     #include "osalHVD_EX.h"
225*53ee8cc1Swenshuai.xi #endif
226*53ee8cc1Swenshuai.xi 
227*53ee8cc1Swenshuai.xi #if HVD_ENABLE_MSOS_MIU1_BASE
228*53ee8cc1Swenshuai.xi     #include "halCHIP.h"
229*53ee8cc1Swenshuai.xi #endif
230*53ee8cc1Swenshuai.xi 
231*53ee8cc1Swenshuai.xi #if HVD_ENABLE_BDMA_2_BITSTREAMBUF
232*53ee8cc1Swenshuai.xi     #include "drvBDMA.h"
233*53ee8cc1Swenshuai.xi     #define HVD_dmacpy( DESTADDR, SRCADDR , LEN)   MDrv_BDMA_CopyHnd((MS_PHY)(SRCADDR), (MS_PHY)(DESTADDR), (LEN), E_BDMA_SDRAM2SDRAM1, BDMA_OPCFG_DEF)
234*53ee8cc1Swenshuai.xi     #define HVD_BDMAcpy(DESTADDR, SRCADDR, LEN , Flag)   MDrv_BDMA_CopyHnd((MS_PHY)(SRCADDR), (MS_PHY)(DESTADDR), (LEN), (Flag), BDMA_OPCFG_DEF)
235*53ee8cc1Swenshuai.xi #endif
236*53ee8cc1Swenshuai.xi 
237*53ee8cc1Swenshuai.xi // debug switch
238*53ee8cc1Swenshuai.xi // DEBUG
239*53ee8cc1Swenshuai.xi #if defined (REDLION_LINUX_KERNEL_ENVI)
240*53ee8cc1Swenshuai.xi     #define HVD_PRINT  printk
241*53ee8cc1Swenshuai.xi     #define HVD_ERR printk
242*53ee8cc1Swenshuai.xi #elif defined(MSOS_TYPE_ECOS)
243*53ee8cc1Swenshuai.xi     #define HVD_PRINT   diag_printf
244*53ee8cc1Swenshuai.xi     #define HVD_ERR     diag_printf
245*53ee8cc1Swenshuai.xi #elif defined (ANDROID)
246*53ee8cc1Swenshuai.xi     #include <sys/mman.h>
247*53ee8cc1Swenshuai.xi     #include <cutils/ashmem.h>
248*53ee8cc1Swenshuai.xi     #include <cutils/log.h>
249*53ee8cc1Swenshuai.xi     #ifndef LOGI // android 4.1 rename LOGx to ALOGx
250*53ee8cc1Swenshuai.xi         #define HVD_PRINT ALOGI
251*53ee8cc1Swenshuai.xi     #else
252*53ee8cc1Swenshuai.xi         #define HVD_PRINT LOGI
253*53ee8cc1Swenshuai.xi     #endif
254*53ee8cc1Swenshuai.xi     #ifndef LOGE // android 4.1 rename LOGx to ALOGx
255*53ee8cc1Swenshuai.xi         #define HVD_ERR ALOGE
256*53ee8cc1Swenshuai.xi     #else
257*53ee8cc1Swenshuai.xi         #define HVD_ERR LOGE
258*53ee8cc1Swenshuai.xi     #endif
259*53ee8cc1Swenshuai.xi #else
260*53ee8cc1Swenshuai.xi     #define HVD_PRINT  printf
261*53ee8cc1Swenshuai.xi     #define HVD_ERR printf
262*53ee8cc1Swenshuai.xi #endif
263*53ee8cc1Swenshuai.xi 
264*53ee8cc1Swenshuai.xi #define HVD_EX_MSG_MUST(format, args...)            \
265*53ee8cc1Swenshuai.xi     do                                              \
266*53ee8cc1Swenshuai.xi     {                                               \
267*53ee8cc1Swenshuai.xi         if (u32UartCtrl & E_HVD_UART_CTRL_MUST)     \
268*53ee8cc1Swenshuai.xi         {                                           \
269*53ee8cc1Swenshuai.xi             HVD_ERR("[HVD][MUST]%s:", __FUNCTION__); \
270*53ee8cc1Swenshuai.xi             HVD_ERR(format, ##args);                 \
271*53ee8cc1Swenshuai.xi         }                                           \
272*53ee8cc1Swenshuai.xi     } while (0)
273*53ee8cc1Swenshuai.xi 
274*53ee8cc1Swenshuai.xi #define HVD_EX_MSG_ERR(format, args...)             \
275*53ee8cc1Swenshuai.xi     do                                              \
276*53ee8cc1Swenshuai.xi     {                                               \
277*53ee8cc1Swenshuai.xi         if (u32UartCtrl & E_HVD_UART_CTRL_ERR)      \
278*53ee8cc1Swenshuai.xi         {                                           \
279*53ee8cc1Swenshuai.xi             HVD_ERR("[HVD][ERR]%s:", __FUNCTION__);  \
280*53ee8cc1Swenshuai.xi             HVD_ERR(format, ##args);                 \
281*53ee8cc1Swenshuai.xi         }                                           \
282*53ee8cc1Swenshuai.xi     } while (0)
283*53ee8cc1Swenshuai.xi 
284*53ee8cc1Swenshuai.xi #if ((defined(CHIP_A1) || defined(CHIP_A7) || defined(CHIP_AMETHYST) || defined(CHIP_EMERALD) || defined(CHIP_NUGGET) || defined(CHIP_NIKON)) && defined (__aeon__))
285*53ee8cc1Swenshuai.xi #define HVD_EX_MSG_INF(format, args...)
286*53ee8cc1Swenshuai.xi #define HVD_EX_MSG_DBG(format, args...)
287*53ee8cc1Swenshuai.xi #define HVD_EX_MSG_TRACE()
288*53ee8cc1Swenshuai.xi #else
289*53ee8cc1Swenshuai.xi #define HVD_EX_MSG_INF(format, args...)             \
290*53ee8cc1Swenshuai.xi     do                                              \
291*53ee8cc1Swenshuai.xi     {                                               \
292*53ee8cc1Swenshuai.xi         if (u32UartCtrl & E_HVD_UART_CTRL_INFO)     \
293*53ee8cc1Swenshuai.xi         {                                           \
294*53ee8cc1Swenshuai.xi             HVD_PRINT("[HVD][INF]%s:", __FUNCTION__);  \
295*53ee8cc1Swenshuai.xi             HVD_PRINT(format, ##args);                 \
296*53ee8cc1Swenshuai.xi         }                                           \
297*53ee8cc1Swenshuai.xi     } while (0)
298*53ee8cc1Swenshuai.xi 
299*53ee8cc1Swenshuai.xi #define HVD_EX_MSG_DBG(format, args...)             \
300*53ee8cc1Swenshuai.xi     do                                              \
301*53ee8cc1Swenshuai.xi     {                                               \
302*53ee8cc1Swenshuai.xi         if (u32UartCtrl & E_HVD_UART_CTRL_DBG)      \
303*53ee8cc1Swenshuai.xi         {                                           \
304*53ee8cc1Swenshuai.xi             HVD_PRINT("[HVD][DBG]%s:", __FUNCTION__);  \
305*53ee8cc1Swenshuai.xi             HVD_PRINT(format, ##args);                 \
306*53ee8cc1Swenshuai.xi         }                                           \
307*53ee8cc1Swenshuai.xi     } while (0)
308*53ee8cc1Swenshuai.xi 
309*53ee8cc1Swenshuai.xi #define HVD_EX_MSG_TRACE()                          \
310*53ee8cc1Swenshuai.xi     do                                              \
311*53ee8cc1Swenshuai.xi     {                                               \
312*53ee8cc1Swenshuai.xi         if (u32UartCtrl & E_HVD_UART_CTRL_TRACE)    \
313*53ee8cc1Swenshuai.xi         {                                           \
314*53ee8cc1Swenshuai.xi             HVD_PRINT("[HVD][TRA]%s:", __FUNCTION__);  \
315*53ee8cc1Swenshuai.xi         }                                           \
316*53ee8cc1Swenshuai.xi     } while (0)
317*53ee8cc1Swenshuai.xi #endif
318*53ee8cc1Swenshuai.xi 
319*53ee8cc1Swenshuai.xi // Configs
320*53ee8cc1Swenshuai.xi #define HVD_FW_IDLE_THRESHOLD     5000 // VPU ticks
321*53ee8cc1Swenshuai.xi #define HVD_BBU_ST_ADDR_IN_BITSTREAMBUF     0x400
322*53ee8cc1Swenshuai.xi 
323*53ee8cc1Swenshuai.xi #define HVD_DRV_CMD_WAIT_FINISH_TIMEOUT     100
324*53ee8cc1Swenshuai.xi 
325*53ee8cc1Swenshuai.xi #define H265_RBSP_BUF_LEN       1024
326*53ee8cc1Swenshuai.xi 
327*53ee8cc1Swenshuai.xi // Util or Functions
328*53ee8cc1Swenshuai.xi #define HVD_MIN(a,b) (((a)<(b)) ? (a) : (b))
329*53ee8cc1Swenshuai.xi #define HVD_MAX3(x,y,z) (((x)>(y) ? (x):(y)) > (z) ? ((x)>(y) ? (x):(y)):(z))
330*53ee8cc1Swenshuai.xi #define HVD_LWORD(x)    (MS_U16)((x)&0xffff)
331*53ee8cc1Swenshuai.xi #define HVD_HWORD(x)    (MS_U16)(((x)>>16)&0xffff)
332*53ee8cc1Swenshuai.xi #define HVD_U32_MAX     0xffffffffUL
333*53ee8cc1Swenshuai.xi #define HVD_RV_BROKENBYUS_MASK    0x00800000
334*53ee8cc1Swenshuai.xi 
335*53ee8cc1Swenshuai.xi #ifdef MSOS_TYPE_LINUX
336*53ee8cc1Swenshuai.xi     #if HVD_ENABLE_MSOS_SYSTEM_CALL
337*53ee8cc1Swenshuai.xi         #define HVD_VA2PA(x )  (x)//(MS_U32)(MS_VA2PA( (void*)(x))) // fixme
338*53ee8cc1Swenshuai.xi     #else
339*53ee8cc1Swenshuai.xi         #define HVD_VA2PA(x )  (x)//(MS_U32)(MS_VA2PA( (void*)(x))) // fixme
340*53ee8cc1Swenshuai.xi     #endif
341*53ee8cc1Swenshuai.xi #else
342*53ee8cc1Swenshuai.xi #define HVD_VA2PA(x)        (x)
343*53ee8cc1Swenshuai.xi #endif
344*53ee8cc1Swenshuai.xi 
345*53ee8cc1Swenshuai.xi #if defined(REDLION_LINUX_KERNEL_ENVI)
346*53ee8cc1Swenshuai.xi #define HVD_PA2VA(x )   (MS_VIRT)MDrv_SYS_PA2NonCacheSeg((void*)(x))
347*53ee8cc1Swenshuai.xi #else
348*53ee8cc1Swenshuai.xi #define HVD_PA2VA(x )   (MS_VIRT)MS_PA2KSEG1((MS_VIRT)(x))
349*53ee8cc1Swenshuai.xi #endif
350*53ee8cc1Swenshuai.xi 
351*53ee8cc1Swenshuai.xi // Memory alignment
352*53ee8cc1Swenshuai.xi #define MEMALIGN(N, UNIT)       ((((N)+(UNIT)-1)/(UNIT))*(UNIT))
353*53ee8cc1Swenshuai.xi 
354*53ee8cc1Swenshuai.xi #if 0//def memcpy
355*53ee8cc1Swenshuai.xi #define HVD_memcpy(x , y , z)   memcpy(x, y, z)
356*53ee8cc1Swenshuai.xi #else
357*53ee8cc1Swenshuai.xi 
358*53ee8cc1Swenshuai.xi #if 0
359*53ee8cc1Swenshuai.xi #define HVD_memcpy(  pDstAddr, pSrcAddr, u32Size)           \
360*53ee8cc1Swenshuai.xi     do {                                                                               \
361*53ee8cc1Swenshuai.xi         MS_U32 i = 0;                                                               \
362*53ee8cc1Swenshuai.xi         volatile MS_U8 *Dest = (volatile MS_U8 *)(pDstAddr );                     \
363*53ee8cc1Swenshuai.xi         volatile MS_U8 *Src = ( volatile MS_U8 *)(pSrcAddr) ;                         \
364*53ee8cc1Swenshuai.xi         for (i = 0; i < (u32Size); i++)                                     \
365*53ee8cc1Swenshuai.xi         {                                                                           \
366*53ee8cc1Swenshuai.xi             Dest[i] = Src[i];                                                      \
367*53ee8cc1Swenshuai.xi         }                                                                               \
368*53ee8cc1Swenshuai.xi     }while(0)
369*53ee8cc1Swenshuai.xi #else
370*53ee8cc1Swenshuai.xi #define HVD_memcpy(  pDstAddr, pSrcAddr, u32Size) \
371*53ee8cc1Swenshuai.xi     do { \
372*53ee8cc1Swenshuai.xi         register unsigned long u32I=0; \
373*53ee8cc1Swenshuai.xi         register unsigned long u32Dst = (unsigned long)pDstAddr; \
374*53ee8cc1Swenshuai.xi         void * pSrc = (void *)pSrcAddr; \
375*53ee8cc1Swenshuai.xi         MS_U32 _u32memsize = u32Size; \
376*53ee8cc1Swenshuai.xi         if( (u32Dst % 4) || ((unsigned long)pSrc % 4) ) \
377*53ee8cc1Swenshuai.xi         { \
378*53ee8cc1Swenshuai.xi             for( u32I=0; u32I< (unsigned long)(_u32memsize); u32I++) \
379*53ee8cc1Swenshuai.xi             { \
380*53ee8cc1Swenshuai.xi                 ((volatile unsigned char *)u32Dst)[u32I] = ((volatile unsigned char *)pSrc)[u32I]; \
381*53ee8cc1Swenshuai.xi             } \
382*53ee8cc1Swenshuai.xi         } \
383*53ee8cc1Swenshuai.xi         else \
384*53ee8cc1Swenshuai.xi         { \
385*53ee8cc1Swenshuai.xi             for( u32I=0; u32I < ((unsigned long)(u32Size)/4); u32I++) \
386*53ee8cc1Swenshuai.xi             { \
387*53ee8cc1Swenshuai.xi                 ((volatile unsigned int *)u32Dst)[u32I] = ((volatile unsigned int *)pSrc)[u32I]; \
388*53ee8cc1Swenshuai.xi             } \
389*53ee8cc1Swenshuai.xi             if((_u32memsize)%4) \
390*53ee8cc1Swenshuai.xi             { \
391*53ee8cc1Swenshuai.xi                 u32Dst += u32I*4; \
392*53ee8cc1Swenshuai.xi                 pSrc = (void *)((unsigned long)pSrc + u32I*4); \
393*53ee8cc1Swenshuai.xi                 for( u32I=0; u32I<((unsigned long)(_u32memsize)%4); u32I++) \
394*53ee8cc1Swenshuai.xi                 { \
395*53ee8cc1Swenshuai.xi                     ((volatile unsigned char *)u32Dst)[u32I] = ((volatile unsigned char *)pSrc)[u32I]; \
396*53ee8cc1Swenshuai.xi                 } \
397*53ee8cc1Swenshuai.xi             } \
398*53ee8cc1Swenshuai.xi         } \
399*53ee8cc1Swenshuai.xi     }while(0)
400*53ee8cc1Swenshuai.xi #endif
401*53ee8cc1Swenshuai.xi 
402*53ee8cc1Swenshuai.xi #endif
403*53ee8cc1Swenshuai.xi 
404*53ee8cc1Swenshuai.xi 
405*53ee8cc1Swenshuai.xi 
406*53ee8cc1Swenshuai.xi #if HVD_ENABLE_MSOS_SYSTEM_CALL
407*53ee8cc1Swenshuai.xi #define HVD_Delay_ms(x)     MsOS_DelayTask(x)
408*53ee8cc1Swenshuai.xi #define HVD_SYSTEM_DELAY_MS_TYPE       2
409*53ee8cc1Swenshuai.xi #elif defined(REDLION_LINUX_KERNEL_ENVI)
410*53ee8cc1Swenshuai.xi #define HVD_Delay_ms(x)     msleep(x)
411*53ee8cc1Swenshuai.xi //#define HVD_Delay_ms(x)     MHal_H264_Delay_ms(x)
412*53ee8cc1Swenshuai.xi #define HVD_SYSTEM_DELAY_MS_TYPE       3
413*53ee8cc1Swenshuai.xi #else
414*53ee8cc1Swenshuai.xi #define HVD_Delay_ms(x)                                 \
415*53ee8cc1Swenshuai.xi     do {                                                            \
416*53ee8cc1Swenshuai.xi         volatile MS_U32 ticks=0;                                         \
417*53ee8cc1Swenshuai.xi         while( ticks < ( ((MS_U32)(x)) <<13) )      \
418*53ee8cc1Swenshuai.xi         {                                                               \
419*53ee8cc1Swenshuai.xi             ticks++;                                                \
420*53ee8cc1Swenshuai.xi         }                                                               \
421*53ee8cc1Swenshuai.xi     } while(0)
422*53ee8cc1Swenshuai.xi #define HVD_SYSTEM_DELAY_MS_TYPE       0
423*53ee8cc1Swenshuai.xi #endif  // HVD_ENABLE_MSOS_SYSTEM_CALL
424*53ee8cc1Swenshuai.xi 
425*53ee8cc1Swenshuai.xi 
426*53ee8cc1Swenshuai.xi #define HVD_DumpMemory( addr,  size ,  ascii , NonCacheMask)       \
427*53ee8cc1Swenshuai.xi         do{                                                                                     \
428*53ee8cc1Swenshuai.xi             MS_U32 i = 0;                                                                          \
429*53ee8cc1Swenshuai.xi             MS_U32 j = 0;                                                                           \
430*53ee8cc1Swenshuai.xi             MS_U8* temp = (MS_U8*)addr;                                                 \
431*53ee8cc1Swenshuai.xi             MS_U8 string[17] ;                                                                      \
432*53ee8cc1Swenshuai.xi             HVD_EX_MSG_DBG("HVD Dump Memory addr: 0x%x ; size: 0x%x \r\n", addr, size);    \
433*53ee8cc1Swenshuai.xi             temp = (MS_U8*)(((MS_U32)temp) | NonCacheMask);              \
434*53ee8cc1Swenshuai.xi             memset(string , 0 , sizeof(string));                                                        \
435*53ee8cc1Swenshuai.xi             for (j = 0; j < (size >> 4); j++)                                                               \
436*53ee8cc1Swenshuai.xi             {                                                                                                               \
437*53ee8cc1Swenshuai.xi                 if (ascii)                                                                                              \
438*53ee8cc1Swenshuai.xi                 {                                                                                                           \
439*53ee8cc1Swenshuai.xi                     for (i = 0; i < 16; i++)                                                                        \
440*53ee8cc1Swenshuai.xi                     {                                                                                                           \
441*53ee8cc1Swenshuai.xi                         if (*(temp + i) >= 30 && *(temp + i) <= 126)                                        \
442*53ee8cc1Swenshuai.xi                             string[i] = *(temp + i);                                                                    \
443*53ee8cc1Swenshuai.xi                         else                                                                                                    \
444*53ee8cc1Swenshuai.xi                             string[i] = '.';                                                                                    \
445*53ee8cc1Swenshuai.xi                     }                                                                                                         \
446*53ee8cc1Swenshuai.xi                     HVD_EX_MSG_DBG("0x%08x  %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x  %s\n"  \
447*53ee8cc1Swenshuai.xi                            , j << 4 , *temp, *(temp + 1), *(temp + 2), *(temp + 3), *(temp + 4), *(temp + 5), *(temp + 6), *(temp + 7), *(temp + 8), *(temp + 9), *(temp + 10), *(temp + 11), *(temp + 12), *(temp + 13), *(temp + 14), *(temp + 15) , string); \
448*53ee8cc1Swenshuai.xi                 }                                                                       \
449*53ee8cc1Swenshuai.xi                 else                                                                                                            \
450*53ee8cc1Swenshuai.xi                 {                                                                                                                   \
451*53ee8cc1Swenshuai.xi                     HVD_EX_MSG_DBG("0x%08x  %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n"  \
452*53ee8cc1Swenshuai.xi                            , j << 4 , *temp, *(temp + 1), *(temp + 2), *(temp + 3), *(temp + 4), *(temp + 5), *(temp + 6), *(temp + 7), *(temp + 8), *(temp + 9), *(temp + 10), *(temp + 11), *(temp + 12), *(temp + 13), *(temp + 14), *(temp + 15));  \
453*53ee8cc1Swenshuai.xi                 }                                       \
454*53ee8cc1Swenshuai.xi                 temp += 16;                                                         \
455*53ee8cc1Swenshuai.xi             }                                           \
456*53ee8cc1Swenshuai.xi             HVD_EX_MSG_DBG("0x%08x  " , j << 4);                                        \
457*53ee8cc1Swenshuai.xi             memset(string , 0 , sizeof(string));                            \
458*53ee8cc1Swenshuai.xi             for (i = 0; i < (size & 0x0f); i++)                                 \
459*53ee8cc1Swenshuai.xi             {                                                                                   \
460*53ee8cc1Swenshuai.xi                 if (*(temp + i) >= 30 && *(temp + i) <= 126)                        \
461*53ee8cc1Swenshuai.xi                     string[i] = *(temp + i);                                                    \
462*53ee8cc1Swenshuai.xi                 else                                                                                    \
463*53ee8cc1Swenshuai.xi                     string[i] = '.';                                                                    \
464*53ee8cc1Swenshuai.xi                 HVD_EX_MSG_DBG("%02x ", *(MS_U8*)(temp + i));                                              \
465*53ee8cc1Swenshuai.xi             }                                                               \
466*53ee8cc1Swenshuai.xi             if (ascii)                                                                                      \
467*53ee8cc1Swenshuai.xi             {                                                                                                       \
468*53ee8cc1Swenshuai.xi                 for (; i < 16  ; i++)                                                                           \
469*53ee8cc1Swenshuai.xi                     HVD_EX_MSG_DBG("   ");                                                                                  \
470*53ee8cc1Swenshuai.xi                 HVD_EX_MSG_DBG(" %s\n" , string);                                                                       \
471*53ee8cc1Swenshuai.xi             }                                                                       \
472*53ee8cc1Swenshuai.xi             else                                                                                                        \
473*53ee8cc1Swenshuai.xi                 HVD_EX_MSG_DBG("\n");                                                                                       \
474*53ee8cc1Swenshuai.xi         }while(0)
475*53ee8cc1Swenshuai.xi 
476*53ee8cc1Swenshuai.xi 
477*53ee8cc1Swenshuai.xi #if HVD_ENABLE_MSOS_SYSTEM_CALL
478*53ee8cc1Swenshuai.xi     #define HVD_GetSysTime_ms()    MsOS_GetSystemTime()
479*53ee8cc1Swenshuai.xi     #define HVD_SYSTEM_CLOCK_TYPE       1
480*53ee8cc1Swenshuai.xi #elif defined(REDLION_LINUX_KERNEL_ENVI)
481*53ee8cc1Swenshuai.xi     #define HVD_GetSysTime_ms()    MHal_H264_GetSyetemTime()
482*53ee8cc1Swenshuai.xi     #define HVD_SYSTEM_CLOCK_TYPE       2
483*53ee8cc1Swenshuai.xi #else
484*53ee8cc1Swenshuai.xi     #define HVD_GetSysTime_ms()    1
485*53ee8cc1Swenshuai.xi     #define HVD_SYSTEM_CLOCK_TYPE       0
486*53ee8cc1Swenshuai.xi #endif  // MsOS_GetSystemTime
487*53ee8cc1Swenshuai.xi 
488*53ee8cc1Swenshuai.xi #if HVD_ENABLE_MSOS_SYSTEM_CALL
489*53ee8cc1Swenshuai.xi     #include "asmCPU.h"
490*53ee8cc1Swenshuai.xi     #define HAL_MEMORY_BARRIER()     MAsm_CPU_Sync()
491*53ee8cc1Swenshuai.xi     #define HVD_MEMORY_BARRIER_TYPE       3
492*53ee8cc1Swenshuai.xi #else
493*53ee8cc1Swenshuai.xi     #if defined (__mips__)
494*53ee8cc1Swenshuai.xi         #define HAL_MEMORY_BARRIER() __asm__ volatile ("sync;")
495*53ee8cc1Swenshuai.xi         #define HVD_MEMORY_BARRIER_TYPE       1
496*53ee8cc1Swenshuai.xi     #elif defined (__aeon__)
497*53ee8cc1Swenshuai.xi         #ifdef __AEONR2__
498*53ee8cc1Swenshuai.xi             #define HAL_MEMORY_BARRIER() __asm__ volatile ("b.syncwritebuffer;")
499*53ee8cc1Swenshuai.xi             #define HVD_MEMORY_BARRIER_TYPE       22
500*53ee8cc1Swenshuai.xi         #else
501*53ee8cc1Swenshuai.xi             #if defined( CHIP_T2 )
502*53ee8cc1Swenshuai.xi                 #define HAL_MEMORY_BARRIER() __asm__ volatile ("l.msync;")
503*53ee8cc1Swenshuai.xi                 #define HVD_MEMORY_BARRIER_TYPE       21
504*53ee8cc1Swenshuai.xi             #else
505*53ee8cc1Swenshuai.xi                 #define HAL_MEMORY_BARRIER() __asm__ volatile ("l.syncwritebuffer;")
506*53ee8cc1Swenshuai.xi                 #define HVD_MEMORY_BARRIER_TYPE       23
507*53ee8cc1Swenshuai.xi             #endif
508*53ee8cc1Swenshuai.xi         #endif
509*53ee8cc1Swenshuai.xi     #else
510*53ee8cc1Swenshuai.xi         #define HAL_MEMORY_BARRIER()
511*53ee8cc1Swenshuai.xi         #define HVD_MEMORY_BARRIER_TYPE       0
512*53ee8cc1Swenshuai.xi     #endif
513*53ee8cc1Swenshuai.xi #endif
514*53ee8cc1Swenshuai.xi 
515*53ee8cc1Swenshuai.xi #define HVD_DRV_MODE_EXTERNAL_DS_BUFFER         (1 << 0)
516*53ee8cc1Swenshuai.xi 
517*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
518*53ee8cc1Swenshuai.xi //  Type and Structure
519*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
520*53ee8cc1Swenshuai.xi typedef void (*HVD_ISRCallBack)(MS_U32 u32Sid);
521*53ee8cc1Swenshuai.xi 
522*53ee8cc1Swenshuai.xi typedef enum
523*53ee8cc1Swenshuai.xi {
524*53ee8cc1Swenshuai.xi     E_HVD_RETURN_FAIL=0,
525*53ee8cc1Swenshuai.xi     E_HVD_RETURN_SUCCESS,
526*53ee8cc1Swenshuai.xi     E_HVD_RETURN_INVALID_PARAMETER,
527*53ee8cc1Swenshuai.xi     E_HVD_RETURN_ILLEGAL_ACCESS,
528*53ee8cc1Swenshuai.xi     E_HVD_RETURN_HARDWARE_BREAKDOWN,
529*53ee8cc1Swenshuai.xi     E_HVD_RETURN_OUTOF_MEMORY,
530*53ee8cc1Swenshuai.xi     E_HVD_RETURN_UNSUPPORTED,
531*53ee8cc1Swenshuai.xi     E_HVD_RETURN_TIMEOUT,
532*53ee8cc1Swenshuai.xi     E_HVD_RETURN_NOTREADY,
533*53ee8cc1Swenshuai.xi     E_HVD_RETURN_MEMORY_OVERWIRTE,
534*53ee8cc1Swenshuai.xi     E_HVD_RETURN_ES_FULL,
535*53ee8cc1Swenshuai.xi     E_HVD_RETURN_RE_INIT,
536*53ee8cc1Swenshuai.xi     E_HVD_RETURN_NOT_RUNNING,
537*53ee8cc1Swenshuai.xi } HVD_Return;
538*53ee8cc1Swenshuai.xi 
539*53ee8cc1Swenshuai.xi typedef enum
540*53ee8cc1Swenshuai.xi {
541*53ee8cc1Swenshuai.xi // share memory
542*53ee8cc1Swenshuai.xi     E_HVD_GDATA_SHARE_MEM=0x1000,
543*53ee8cc1Swenshuai.xi     // switch
544*53ee8cc1Swenshuai.xi     //E_HVD_GDATA_SEMAPHORE,
545*53ee8cc1Swenshuai.xi     E_HVD_GDATA_DISP_INFO_ADDR=(0x0100+E_HVD_GDATA_SHARE_MEM),
546*53ee8cc1Swenshuai.xi     E_HVD_GDATA_MIU_SEL,
547*53ee8cc1Swenshuai.xi     E_HVD_GDATA_FRAMEBUF_ADDR,
548*53ee8cc1Swenshuai.xi     E_HVD_GDATA_FRAMEBUF_SIZE,
549*53ee8cc1Swenshuai.xi     E_HVD_GDATA_FRAMEBUF2_ADDR,
550*53ee8cc1Swenshuai.xi     E_HVD_GDATA_FRAMEBUF2_SIZE,
551*53ee8cc1Swenshuai.xi     E_HVD_GDATA_CMA_USED,
552*53ee8cc1Swenshuai.xi     E_HVD_GDATA_CMA_ALLOC_DONE,
553*53ee8cc1Swenshuai.xi     // report
554*53ee8cc1Swenshuai.xi     E_HVD_GDATA_PTS=(0x0200+E_HVD_GDATA_SHARE_MEM),
555*53ee8cc1Swenshuai.xi     E_HVD_GDATA_U64PTS,
556*53ee8cc1Swenshuai.xi     E_HVD_GDATA_DECODE_CNT,
557*53ee8cc1Swenshuai.xi     E_HVD_GDATA_DATA_ERROR_CNT,
558*53ee8cc1Swenshuai.xi     E_HVD_GDATA_DEC_ERROR_CNT,
559*53ee8cc1Swenshuai.xi     E_HVD_GDATA_ERROR_CODE,
560*53ee8cc1Swenshuai.xi     E_HVD_GDATA_VPU_IDLE_CNT,
561*53ee8cc1Swenshuai.xi     E_HVD_GDATA_DISP_FRM_INFO,
562*53ee8cc1Swenshuai.xi     E_HVD_GDATA_DEC_FRM_INFO,
563*53ee8cc1Swenshuai.xi     E_HVD_GDATA_ES_LEVEL,
564*53ee8cc1Swenshuai.xi     E_HVD_GDATA_PTS_STC_DIFF,
565*53ee8cc1Swenshuai.xi #if HVD_ENABLE_MVC
566*53ee8cc1Swenshuai.xi     E_HVD_GDATA_DISP_FRM_INFO_SUB,
567*53ee8cc1Swenshuai.xi     E_HVD_GDATA_DEC_FRM_INFO_SUB,
568*53ee8cc1Swenshuai.xi #endif
569*53ee8cc1Swenshuai.xi     E_HVD_GDATA_HVD_HW_MAX_PIXEL,
570*53ee8cc1Swenshuai.xi     E_HVD_GDATA_TS_SEAMLESS_TARGET_PTS,
571*53ee8cc1Swenshuai.xi     E_HVD_GDATA_TS_SEAMLESS_TARGET_POC,
572*53ee8cc1Swenshuai.xi 
573*53ee8cc1Swenshuai.xi     // user data
574*53ee8cc1Swenshuai.xi     E_HVD_GDATA_USERDATA_WPTR,
575*53ee8cc1Swenshuai.xi     E_HVD_GDATA_USERDATA_IDX_TBL_ADDR,
576*53ee8cc1Swenshuai.xi     E_HVD_GDATA_USERDATA_PACKET_TBL_ADDR,
577*53ee8cc1Swenshuai.xi     E_HVD_GDATA_USERDATA_PACKET_SIZE,
578*53ee8cc1Swenshuai.xi     E_HVD_GDATA_USERDATA_IDX_TBL_SIZE,
579*53ee8cc1Swenshuai.xi     E_HVD_GDATA_USERDATA_PACKET_TBL_SIZE,
580*53ee8cc1Swenshuai.xi     // report - modes
581*53ee8cc1Swenshuai.xi     E_HVD_GDATA_IS_SHOW_ERR_FRM,
582*53ee8cc1Swenshuai.xi     E_HVD_GDATA_IS_REPEAT_LAST_FIELD,
583*53ee8cc1Swenshuai.xi     E_HVD_GDATA_IS_ERR_CONCEAL,
584*53ee8cc1Swenshuai.xi     E_HVD_GDATA_IS_SYNC_ON,
585*53ee8cc1Swenshuai.xi     E_HVD_GDATA_IS_PLAYBACK_FINISH,
586*53ee8cc1Swenshuai.xi     E_HVD_GDATA_SYNC_MODE,
587*53ee8cc1Swenshuai.xi     E_HVD_GDATA_SKIP_MODE,
588*53ee8cc1Swenshuai.xi     E_HVD_GDATA_DROP_MODE,
589*53ee8cc1Swenshuai.xi     E_HVD_GDATA_DISPLAY_DURATION,
590*53ee8cc1Swenshuai.xi     E_HVD_GDATA_FRC_MODE,
591*53ee8cc1Swenshuai.xi     E_HVD_GDATA_NEXT_PTS,
592*53ee8cc1Swenshuai.xi     E_HVD_GDATA_DISP_Q_SIZE,
593*53ee8cc1Swenshuai.xi     E_HVD_GDATA_DISP_Q_PTR,
594*53ee8cc1Swenshuai.xi     E_HVD_GDATA_NEXT_DISP_FRM_INFO,
595*53ee8cc1Swenshuai.xi     E_HVD_GDATA_REAL_FRAMERATE,
596*53ee8cc1Swenshuai.xi     E_HVD_GDATA_IS_ORI_INTERLACE_MODE,
597*53ee8cc1Swenshuai.xi     E_HVD_GDATA_FRM_PACKING_SEI_DATA,
598*53ee8cc1Swenshuai.xi     E_HVD_GDATA_TYPE_FRAME_MBS_ONLY_FLAG,
599*53ee8cc1Swenshuai.xi     E_HVD_GDATA_TYPE_IS_LEAST_DISPQ_SIZE,
600*53ee8cc1Swenshuai.xi     E_HVD_GDATA_FIELD_PIC_FLAG,
601*53ee8cc1Swenshuai.xi     E_HVD_GDATA_FW_STATUS_FLAG,
602*53ee8cc1Swenshuai.xi     E_HVD_GDATA_NEXT_DISP_FRM_INFO_EXT,
603*53ee8cc1Swenshuai.xi     E_HVD_GDATA_DISPLAYCOLOURVOLUME_SEI_DATA,
604*53ee8cc1Swenshuai.xi     E_HVD_GDATA_U64PTS_PRE_PARSE,
605*53ee8cc1Swenshuai.xi     E_HVD_GDATA_CONTENT_LIGHT_LEVEL_INFO,
606*53ee8cc1Swenshuai.xi 
607*53ee8cc1Swenshuai.xi     // internal control
608*53ee8cc1Swenshuai.xi     E_HVD_GDATA_IS_1ST_FRM_RDY=(0x0300+E_HVD_GDATA_SHARE_MEM),
609*53ee8cc1Swenshuai.xi     E_HVD_GDATA_IS_I_FRM_FOUND,
610*53ee8cc1Swenshuai.xi     E_HVD_GDATA_IS_SYNC_START,
611*53ee8cc1Swenshuai.xi     E_HVD_GDATA_IS_SYNC_REACH,
612*53ee8cc1Swenshuai.xi     E_HVD_GDATA_FW_VERSION_ID,
613*53ee8cc1Swenshuai.xi     E_HVD_GDATA_FW_IF_VERSION_ID,
614*53ee8cc1Swenshuai.xi     E_HVD_GDATA_BBU_Q_NUMB,
615*53ee8cc1Swenshuai.xi     E_HVD_GDATA_DEC_Q_NUMB,
616*53ee8cc1Swenshuai.xi     E_HVD_GDATA_DISP_Q_NUMB,
617*53ee8cc1Swenshuai.xi     E_HVD_GDATA_PTS_Q_NUMB,
618*53ee8cc1Swenshuai.xi     E_HVD_GDATA_FW_INIT_DONE,
619*53ee8cc1Swenshuai.xi     E_HVD_GDATA_FW_IS_IQMEM_SUPPORT,
620*53ee8cc1Swenshuai.xi     E_HVD_GDATA_FW_IQMEM_CTRL,
621*53ee8cc1Swenshuai.xi     E_HVD_GDATA_FW_FLUSH_STATUS,
622*53ee8cc1Swenshuai.xi     E_HVD_GDATA_FW_CODEC_TYPE,
623*53ee8cc1Swenshuai.xi     E_HVD_GDATA_FW_ES_BUF_STATUS,
624*53ee8cc1Swenshuai.xi     E_HVD_GDATA_TS_SEAMLESS_STATUS,
625*53ee8cc1Swenshuai.xi     E_HVD_GDATA_VIDEO_FULL_RANGE_FLAG,
626*53ee8cc1Swenshuai.xi     E_HVD_GDATA_GET_NOT_SUPPORT_INFO,
627*53ee8cc1Swenshuai.xi     E_HVD_GDATA_GET_MIN_TSP_DATA_SIZE,
628*53ee8cc1Swenshuai.xi 
629*53ee8cc1Swenshuai.xi     // debug
630*53ee8cc1Swenshuai.xi     E_HVD_GDATA_SKIP_CNT=(0x0400+E_HVD_GDATA_SHARE_MEM),
631*53ee8cc1Swenshuai.xi     E_HVD_GDATA_GOP_CNT,
632*53ee8cc1Swenshuai.xi     E_HVD_GDATA_DISP_CNT,
633*53ee8cc1Swenshuai.xi     E_HVD_GDATA_DROP_CNT,
634*53ee8cc1Swenshuai.xi     E_HVD_GDATA_DISP_STC,
635*53ee8cc1Swenshuai.xi     E_HVD_GDATA_VSYNC_CNT,
636*53ee8cc1Swenshuai.xi     E_HVD_GDATA_MAIN_LOOP_CNT,
637*53ee8cc1Swenshuai.xi     // AVC
638*53ee8cc1Swenshuai.xi     E_HVD_GDATA_AVC_LEVEL_IDC =(0x0500+E_HVD_GDATA_SHARE_MEM),
639*53ee8cc1Swenshuai.xi     E_HVD_GDATA_AVC_LOW_DELAY,
640*53ee8cc1Swenshuai.xi     E_HVD_GDATA_AVC_VUI_DISP_INFO,
641*53ee8cc1Swenshuai.xi     //E_HVD_GDATA_AVC_SPS_ADDR,
642*53ee8cc1Swenshuai.xi 
643*53ee8cc1Swenshuai.xi // SRAM
644*53ee8cc1Swenshuai.xi     E_HVD_GDATA_SRAM=0x2000,
645*53ee8cc1Swenshuai.xi     //E_HVD_GDATA_AVC_NAL_CNT,
646*53ee8cc1Swenshuai.xi 
647*53ee8cc1Swenshuai.xi // Mailbox or Reg
648*53ee8cc1Swenshuai.xi     E_HVD_GDATA_MBOX=0x3000,
649*53ee8cc1Swenshuai.xi     E_HVD_GDATA_FW_STATE,       // HVD RISC MBOX 0 (esp. FW init done)
650*53ee8cc1Swenshuai.xi     E_HVD_GDATA_IS_DISP_INFO_UNCOPYED,   // HVD RISC MBOX 0 (rdy only)
651*53ee8cc1Swenshuai.xi     E_HVD_GDATA_IS_DISP_INFO_CHANGE,   // HVD RISC MBOX 0 (rdy only)
652*53ee8cc1Swenshuai.xi     E_HVD_GDATA_HVD_ISR_STATUS,   // HVD RISC MBOX 1 (value only)
653*53ee8cc1Swenshuai.xi     E_HVD_GDATA_IS_FRAME_SHOWED,    // HVD HI mbox 0 ( showed: rdy cleared ; not show: rdy enable )
654*53ee8cc1Swenshuai.xi     E_HVD_GDATA_ES_READ_PTR,    //
655*53ee8cc1Swenshuai.xi     E_HVD_GDATA_ES_WRITE_PTR,    //
656*53ee8cc1Swenshuai.xi     E_HVD_GDATA_BBU_READ_PTR,    //
657*53ee8cc1Swenshuai.xi     E_HVD_GDATA_BBU_WRITE_PTR,    //
658*53ee8cc1Swenshuai.xi     E_HVD_GDATA_BBU_WRITE_PTR_FIRED,    //
659*53ee8cc1Swenshuai.xi     E_HVD_GDATA_VPU_PC_CNT,    //
660*53ee8cc1Swenshuai.xi     E_HVD_GDATA_ES_QUANTITY,
661*53ee8cc1Swenshuai.xi 
662*53ee8cc1Swenshuai.xi // FW def
663*53ee8cc1Swenshuai.xi     E_HVD_GDATA_FW_DEF=0x4000,
664*53ee8cc1Swenshuai.xi     E_HVD_GDATA_FW_MAX_DUMMY_FIFO,  // AVC: 256Bytes AVS: 2kB RM:???
665*53ee8cc1Swenshuai.xi     E_HVD_GDATA_FW_AVC_MAX_VIDEO_DELAY,
666*53ee8cc1Swenshuai.xi     E_HVD_GDATA_FW_BBU_TOTAL_TBL_ENTRY,
667*53ee8cc1Swenshuai.xi     E_HVD_GDATA_FW_BBU_TBL_ENTRY_NUMB,
668*53ee8cc1Swenshuai.xi     E_HVD_GDATA_FW_PTS_TOTAL_ENTRY_NUMB,
669*53ee8cc1Swenshuai.xi     E_HVD_GDATA_FW_DUMMY_WRITE_ADDR,
670*53ee8cc1Swenshuai.xi     E_HVD_GDATA_FW_DS_BUF_ADDR,
671*53ee8cc1Swenshuai.xi     E_HVD_GDATA_FW_DS_BUF_SIZE,
672*53ee8cc1Swenshuai.xi     E_HVD_GDATA_FW_DS_VECTOR_DEPTH,
673*53ee8cc1Swenshuai.xi     E_HVD_GDATA_FW_DS_INFO_ADDR,
674*53ee8cc1Swenshuai.xi     E_HVD_GDATA_FW_DS_IS_ENABLED,
675*53ee8cc1Swenshuai.xi     E_HVD_GDATA_FW_VSYNC_BRIDGE_ADDR,
676*53ee8cc1Swenshuai.xi #ifdef VDEC3
677*53ee8cc1Swenshuai.xi     E_HVD_GDATA_FW_VBBU_ADDR,
678*53ee8cc1Swenshuai.xi #endif
679*53ee8cc1Swenshuai.xi // BBU size
680*53ee8cc1Swenshuai.xi // default pitch number
681*53ee8cc1Swenshuai.xi //
682*53ee8cc1Swenshuai.xi } HVD_GetData;
683*53ee8cc1Swenshuai.xi 
684*53ee8cc1Swenshuai.xi typedef enum
685*53ee8cc1Swenshuai.xi {
686*53ee8cc1Swenshuai.xi // share memory
687*53ee8cc1Swenshuai.xi     E_HVD_SDATA_SHARE_MEM = 0x1000,
688*53ee8cc1Swenshuai.xi     // switch
689*53ee8cc1Swenshuai.xi     E_HVD_SDATA_FRAMEBUF_ADDR = (0x0100 + E_HVD_SDATA_SHARE_MEM),
690*53ee8cc1Swenshuai.xi     E_HVD_SDATA_FRAMEBUF_SIZE,
691*53ee8cc1Swenshuai.xi     E_HVD_SDATA_ERROR_CODE,
692*53ee8cc1Swenshuai.xi     E_HVD_SDATA_DISP_INFO_TH,
693*53ee8cc1Swenshuai.xi     E_HVD_SDATA_FW_FLUSH_STATUS,
694*53ee8cc1Swenshuai.xi     E_HVD_SDATA_DMX_FRAMERATE,
695*53ee8cc1Swenshuai.xi     E_HVD_SDATA_DMX_FRAMERATEBASE,
696*53ee8cc1Swenshuai.xi     E_HVD_SDATA_MIU_SEL,
697*53ee8cc1Swenshuai.xi     E_HVD_SDATA_FRAMEBUF2_ADDR,
698*53ee8cc1Swenshuai.xi     E_HVD_SDATA_FRAMEBUF2_SIZE,
699*53ee8cc1Swenshuai.xi     E_HVD_SDATA_CMA_USED,
700*53ee8cc1Swenshuai.xi     E_HVD_SDATA_CMA_ALLOC_DONE,
701*53ee8cc1Swenshuai.xi     E_HVD_SDATA_CMA_TWO_MIU,
702*53ee8cc1Swenshuai.xi     E_HVD_SDATA_DV_XC_SHM_SIZE,
703*53ee8cc1Swenshuai.xi     // display info
704*53ee8cc1Swenshuai.xi     //E_HVD_SDATA_HOR_SIZE=(0x0200|E_HVD_SDATA_SHARE_MEM),
705*53ee8cc1Swenshuai.xi     // report
706*53ee8cc1Swenshuai.xi     //E_HVD_SDATA_PTS=0x0200,
707*53ee8cc1Swenshuai.xi     // internal control
708*53ee8cc1Swenshuai.xi     //E_HVD_SDATA_IDLE_CNT=0x0300,
709*53ee8cc1Swenshuai.xi     // debug
710*53ee8cc1Swenshuai.xi     //E_HVD_SDATA_SKIP_CNT=0x0400,
711*53ee8cc1Swenshuai.xi     // RM
712*53ee8cc1Swenshuai.xi     E_HVD_SDATA_RM_PICTURE_SIZES = (0x0500 | E_HVD_SDATA_SHARE_MEM),
713*53ee8cc1Swenshuai.xi 
714*53ee8cc1Swenshuai.xi // SRAM
715*53ee8cc1Swenshuai.xi // Mailbox or Reg
716*53ee8cc1Swenshuai.xi     E_HVD_SDATA_MAILBOX = 0x3000,
717*53ee8cc1Swenshuai.xi     E_HVD_SDATA_FW_CODE_TYPE = (0x0000 | E_HVD_SDATA_MAILBOX),
718*53ee8cc1Swenshuai.xi     E_HVD_SDATA_TRIGGER_DISP,
719*53ee8cc1Swenshuai.xi     E_HVD_SDATA_GET_DISP_INFO_DONE,
720*53ee8cc1Swenshuai.xi     E_HVD_SDATA_GET_DISP_INFO_START,
721*53ee8cc1Swenshuai.xi 
722*53ee8cc1Swenshuai.xi // FW def
723*53ee8cc1Swenshuai.xi     E_HVD_SDATA_FW_DEF = 0x4000,
724*53ee8cc1Swenshuai.xi     E_HVD_SDATA_VIRTUAL_BOX_WIDTH,
725*53ee8cc1Swenshuai.xi     E_HVD_SDATA_VIRTUAL_BOX_HEIGHT,
726*53ee8cc1Swenshuai.xi     //modify the state of the frame in DispQueue
727*53ee8cc1Swenshuai.xi     E_HVD_SDATA_DISPQ_STATUS_VIEW,
728*53ee8cc1Swenshuai.xi     E_HVD_SDATA_DISPQ_STATUS_DISP,
729*53ee8cc1Swenshuai.xi     E_HVD_SDATA_DISPQ_STATUS_FREE,
730*53ee8cc1Swenshuai.xi     E_HVD_SDATA_FW_IQMEM_CTRL,
731*53ee8cc1Swenshuai.xi     E_HVD_SDATA_FW_IQMEM_ENABLE_IF_SUPPORT,
732*53ee8cc1Swenshuai.xi     E_HVD_SDATA_DV_INFO,
733*53ee8cc1Swenshuai.xi } HVD_SetData;
734*53ee8cc1Swenshuai.xi 
735*53ee8cc1Swenshuai.xi typedef enum
736*53ee8cc1Swenshuai.xi {
737*53ee8cc1Swenshuai.xi     E_HVD_UART_CTRL_DISABLE = BIT(4),
738*53ee8cc1Swenshuai.xi     E_HVD_UART_CTRL_ERR     = BIT(0),
739*53ee8cc1Swenshuai.xi     E_HVD_UART_CTRL_INFO    = BIT(1),
740*53ee8cc1Swenshuai.xi     E_HVD_UART_CTRL_DBG     = BIT(2),
741*53ee8cc1Swenshuai.xi     E_HVD_UART_CTRL_FW      = BIT(3),
742*53ee8cc1Swenshuai.xi     E_HVD_UART_CTRL_MUST    = BIT(4),
743*53ee8cc1Swenshuai.xi     E_HVD_UART_CTRL_TRACE   = BIT(5),
744*53ee8cc1Swenshuai.xi } HVD_Uart_Ctrl;
745*53ee8cc1Swenshuai.xi 
746*53ee8cc1Swenshuai.xi typedef enum
747*53ee8cc1Swenshuai.xi {
748*53ee8cc1Swenshuai.xi     E_HVD_INIT_HW_MASK = BMASK(3:0),        ///< HW Type, should same as HVD_Codec_Type in fwHVD_if.h
749*53ee8cc1Swenshuai.xi         E_HVD_INIT_HW_AVC = BITS(3:0, 0),   ///< HW deflaut: AVC 0X00
750*53ee8cc1Swenshuai.xi         E_HVD_INIT_HW_AVS = BITS(3:0, 1),   ///< HW: AVS    0X01
751*53ee8cc1Swenshuai.xi         E_HVD_INIT_HW_RM  = BITS(3:0, 2),   ///< HW: RM     0X10
752*53ee8cc1Swenshuai.xi         E_HVD_INIT_HW_MVC = BITS(3:0, 3),   ///< HW: MVC    0x11
753*53ee8cc1Swenshuai.xi         E_HVD_INIT_HW_VP8 = BITS(3:0, 4),   ///< HW: VP8    0X100
754*53ee8cc1Swenshuai.xi         E_HVD_INIT_HW_MJPEG = BITS(3:0, 5), ///< HW: MJPEG  0x101
755*53ee8cc1Swenshuai.xi         E_HVD_INIT_HW_VP6 = BITS(3:0, 6),   ///< HW: VP6    0x110
756*53ee8cc1Swenshuai.xi         E_HVD_INIT_HW_HEVC = BITS(3:0, 7),  ///< HW: HEVC   0x111
757*53ee8cc1Swenshuai.xi         E_HVD_INIT_HW_VP9 = BITS(3:0, 8),   ///< HW: VP9    0x1000
758*53ee8cc1Swenshuai.xi     E_HVD_INIT_MAIN_MASK = BMASK(5:4),                  ///< main type
759*53ee8cc1Swenshuai.xi         E_HVD_INIT_MAIN_FILE_RAW     = BITS(5:4, 0),    ///< main type: default: 0X00
760*53ee8cc1Swenshuai.xi         E_HVD_INIT_MAIN_FILE_TS      = BITS(5:4, 1),    ///< main type: 0X01
761*53ee8cc1Swenshuai.xi         E_HVD_INIT_MAIN_LIVE_STREAM  = BITS(5:4, 2),    ///< main type: 0X10
762*53ee8cc1Swenshuai.xi     E_HVD_INIT_INPUT_MASK = BMASK(6:6),         ///< process path for filling BBU table:  file mode. use drive; TSP: use tsp mode
763*53ee8cc1Swenshuai.xi         E_HVD_INIT_INPUT_TSP = BITS(6:6, 0),    ///< tsp input( default)
764*53ee8cc1Swenshuai.xi         E_HVD_INIT_INPUT_DRV = BITS(6:6, 1),    ///< driver input
765*53ee8cc1Swenshuai.xi     E_HVD_INIT_START_CODE_MASK = BMASK(7:7),                ///< AVC FILE MODE ONLY: mkv, mp4 container use.
766*53ee8cc1Swenshuai.xi         E_HVD_INIT_START_CODE_REMAINED  = BITS(7:7, 0),     ///< start code remained.(Defualt)
767*53ee8cc1Swenshuai.xi         E_HVD_INIT_START_CODE_REMOVED   = BITS(7:7, 1),     ///< start code removed.
768*53ee8cc1Swenshuai.xi     E_HVD_INIT_UTOPIA_ENVI = BIT(8),        ///< check MIU sel and set it
769*53ee8cc1Swenshuai.xi     E_HVD_INIT_DBG_FW      = BIT(9),        ///< check FW is debug version or not
770*53ee8cc1Swenshuai.xi     E_HVD_INIT_DUAL_ES_MASK = BMASK(10:10),                 ///< Dual ES buffer iput.
771*53ee8cc1Swenshuai.xi         E_HVD_INIT_DUAL_ES_DISABLE    = BITS(10:10, 0),     ///< Disable Dual ES buffer input.
772*53ee8cc1Swenshuai.xi         E_HVD_INIT_DUAL_ES_ENABLE     = BITS(10:10, 1),     ///< Enable Dual ES buffer input.
773*53ee8cc1Swenshuai.xi     //E_HVD_INIT_ENABLE_ISR_DISP =  BIT( 8)  ,      ///< enable display ISR. ISR occurs at every Vsync.
774*53ee8cc1Swenshuai.xi } HVD_Init_Mode_Flag;
775*53ee8cc1Swenshuai.xi 
776*53ee8cc1Swenshuai.xi typedef enum
777*53ee8cc1Swenshuai.xi {
778*53ee8cc1Swenshuai.xi     E_HVD_PLAY_NORMAL,
779*53ee8cc1Swenshuai.xi     E_HVD_PLAY_PAUSE,
780*53ee8cc1Swenshuai.xi     E_HVD_PLAY_STEP_DISPLAY,
781*53ee8cc1Swenshuai.xi } HVD_Play_Type;
782*53ee8cc1Swenshuai.xi 
783*53ee8cc1Swenshuai.xi typedef enum
784*53ee8cc1Swenshuai.xi {
785*53ee8cc1Swenshuai.xi     E_HVD_ESB_LEVEL_NORMAL = 0,
786*53ee8cc1Swenshuai.xi     E_HVD_ESB_LEVEL_UNDER = BIT(0),
787*53ee8cc1Swenshuai.xi     E_HVD_ESB_LEVEL_OVER = BIT(1),
788*53ee8cc1Swenshuai.xi } HVD_ESBuf_Level;
789*53ee8cc1Swenshuai.xi 
790*53ee8cc1Swenshuai.xi //-----------------------------------------------------------------------------
791*53ee8cc1Swenshuai.xi /// @brief \b Enum \b Name: HVD_FWInputSourceType
792*53ee8cc1Swenshuai.xi /// @brief \b Enum \b Description:  The type of fw binary input source
793*53ee8cc1Swenshuai.xi //-----------------------------------------------------------------------------
794*53ee8cc1Swenshuai.xi typedef enum
795*53ee8cc1Swenshuai.xi {
796*53ee8cc1Swenshuai.xi     E_HVD_FW_INPUT_SOURCE_NONE,       ///< No input fw.
797*53ee8cc1Swenshuai.xi     E_HVD_FW_INPUT_SOURCE_DRAM,       ///< input source from DRAM.
798*53ee8cc1Swenshuai.xi     E_HVD_FW_INPUT_SOURCE_FLASH,      ///< input source from FLASH.
799*53ee8cc1Swenshuai.xi } HVD_FWInputSourceType;
800*53ee8cc1Swenshuai.xi 
801*53ee8cc1Swenshuai.xi //-----------------------------------------------------------------------------
802*53ee8cc1Swenshuai.xi /// @brief \b Enum \b Name: HVD_FB_Reduction_Type
803*53ee8cc1Swenshuai.xi /// @brief \b Enum \b Description:  The type of frame buffer reduction type
804*53ee8cc1Swenshuai.xi //-----------------------------------------------------------------------------
805*53ee8cc1Swenshuai.xi typedef enum
806*53ee8cc1Swenshuai.xi {
807*53ee8cc1Swenshuai.xi     E_HVD_FB_REDUCTION_TYPE_NONE = 0,        ///< FB reduction disable
808*53ee8cc1Swenshuai.xi     E_HVD_FB_REDUCTION_TYPE_1_2 = 1,         ///< FB reduction 1/2
809*53ee8cc1Swenshuai.xi     E_HVD_FB_REDUCTION_TYPE_1_4 = 2,         ///< FB reduction 1/4
810*53ee8cc1Swenshuai.xi } HVD_FBReductionType;
811*53ee8cc1Swenshuai.xi 
812*53ee8cc1Swenshuai.xi typedef enum
813*53ee8cc1Swenshuai.xi {
814*53ee8cc1Swenshuai.xi     E_VDEC_EX_MAIN_VIEW = 0,                 ///< MVC main view
815*53ee8cc1Swenshuai.xi     E_VDEC_EX_SUB_VIEW,                      ///< MVC sub view
816*53ee8cc1Swenshuai.xi } VDEC_EX_View;
817*53ee8cc1Swenshuai.xi 
818*53ee8cc1Swenshuai.xi typedef enum
819*53ee8cc1Swenshuai.xi {
820*53ee8cc1Swenshuai.xi     E_HVD_SECURE_MODE_NONE = 0,                 /// None secure
821*53ee8cc1Swenshuai.xi     E_HVD_SECURE_MODE_TRUSTZONE              /// Secure for TrustZone
822*53ee8cc1Swenshuai.xi } HVD_SECURE_MODE;
823*53ee8cc1Swenshuai.xi 
824*53ee8cc1Swenshuai.xi typedef enum
825*53ee8cc1Swenshuai.xi {
826*53ee8cc1Swenshuai.xi     E_HWDEC_ISR_NONE = 0,
827*53ee8cc1Swenshuai.xi     E_HWDEC_ISR_HVD = 1,    // For HW Decoder check
828*53ee8cc1Swenshuai.xi     E_HWDEC_ISR_EVD = 2,
829*53ee8cc1Swenshuai.xi     E_HWDEC_ISR_G2VP9 = 3,
830*53ee8cc1Swenshuai.xi     E_HWDEC_ISR_EVDLITE = 4,
831*53ee8cc1Swenshuai.xi } HWDEC_ISR_TYPE;
832*53ee8cc1Swenshuai.xi 
833*53ee8cc1Swenshuai.xi //HVD set MFcodec Mode
834*53ee8cc1Swenshuai.xi typedef enum
835*53ee8cc1Swenshuai.xi {
836*53ee8cc1Swenshuai.xi     E_HVD_DEF_MFCODEC_DEFAULT = 0,
837*53ee8cc1Swenshuai.xi     E_HVD_DEF_MFCODEC_FORCE_ENABLE,
838*53ee8cc1Swenshuai.xi     E_HVD_DEF_MFCODEC_FORCE_DISABLE,
839*53ee8cc1Swenshuai.xi } HVD_MFCodec_mode;
840*53ee8cc1Swenshuai.xi 
841*53ee8cc1Swenshuai.xi //HVD set Display Mode
842*53ee8cc1Swenshuai.xi typedef enum
843*53ee8cc1Swenshuai.xi {
844*53ee8cc1Swenshuai.xi     E_HVD_DISPLAY_MODE_DEFAULT,
845*53ee8cc1Swenshuai.xi 	E_HVD_DISPLAY_MODE_MCU,
846*53ee8cc1Swenshuai.xi     E_HVD_DISPLAY_MODE_HARDWIRE,
847*53ee8cc1Swenshuai.xi }HVD_Display_mode;
848*53ee8cc1Swenshuai.xi 
849*53ee8cc1Swenshuai.xi typedef enum
850*53ee8cc1Swenshuai.xi {
851*53ee8cc1Swenshuai.xi     E_HVD_DEF_FEATURE_DEFAULT = 0,
852*53ee8cc1Swenshuai.xi     E_HVD_DEF_FEATURE_FORCE_MAIN_PROFILE = 1, //BIT0=1: HEVC Only support Main profile decode
853*53ee8cc1Swenshuai.xi } HVD_Feature;
854*53ee8cc1Swenshuai.xi 
855*53ee8cc1Swenshuai.xi typedef enum
856*53ee8cc1Swenshuai.xi {
857*53ee8cc1Swenshuai.xi     // Indicates Dolby Vision stream profile is Unsupported.
858*53ee8cc1Swenshuai.xi     E_DV_STREAM_PROFILE_ID_UNSUPPORTED = 0x0,
859*53ee8cc1Swenshuai.xi     // Indicates Dolby Vision stream profile is "dvav.per".
860*53ee8cc1Swenshuai.xi     E_DV_STREAM_PROFILE_ID_DVAV_PER    = 0x1,
861*53ee8cc1Swenshuai.xi     // Indicates Dolby Vision stream profile is "dvav.pen".
862*53ee8cc1Swenshuai.xi     E_DV_STREAM_PROFILE_ID_DVAV_PEN    = 0x2,
863*53ee8cc1Swenshuai.xi     // Indicates Dolby Vision stream profile is "dvhe.der".
864*53ee8cc1Swenshuai.xi     E_DV_STREAM_PROFILE_ID_DVHE_DER    = 0x4,
865*53ee8cc1Swenshuai.xi     // Indicates Dolby Vision stream profile is "dvhe.den".
866*53ee8cc1Swenshuai.xi     E_DV_STREAM_PROFILE_ID_DVHE_DEN    = 0x8,
867*53ee8cc1Swenshuai.xi     // Indicates Dolby Vision stream profile is "dvhe.dtr".
868*53ee8cc1Swenshuai.xi     E_DV_STREAM_PROFILE_ID_DVHE_DTR    = 0x10,
869*53ee8cc1Swenshuai.xi     // Indicates Dolby Vision stream profile is "dvhe.stn".
870*53ee8cc1Swenshuai.xi     E_DV_STREAM_PROFILE_ID_DVHE_STN    = 0x20,
871*53ee8cc1Swenshuai.xi     // Indicates Dolby Vision stream profile is "dvhe.dth".
872*53ee8cc1Swenshuai.xi     E_DV_STREAM_PROFILE_ID_DVHE_DTH    = 0x40,
873*53ee8cc1Swenshuai.xi } DV_Stream_Profile;
874*53ee8cc1Swenshuai.xi 
875*53ee8cc1Swenshuai.xi typedef enum
876*53ee8cc1Swenshuai.xi {
877*53ee8cc1Swenshuai.xi     // Indicates Dolby Vision stream level is unsupported.
878*53ee8cc1Swenshuai.xi     E_DV_STREAM_LEVEL_ID_UNSUPPORTED = 0,
879*53ee8cc1Swenshuai.xi     // Indicates Dolby Vision stream level is "HD24".
880*53ee8cc1Swenshuai.xi     E_DV_STREAM_LEVEL_ID_HD24,
881*53ee8cc1Swenshuai.xi     // Indicates Dolby Vision stream level is "HD30".
882*53ee8cc1Swenshuai.xi     E_DV_STREAM_LEVEL_ID_HD30,
883*53ee8cc1Swenshuai.xi     // Indicates Dolby Vision stream level is "FHD24".
884*53ee8cc1Swenshuai.xi     E_DV_STREAM_LEVEL_ID_FHD24,
885*53ee8cc1Swenshuai.xi     // Indicates Dolby Vision stream level is "FHD30".
886*53ee8cc1Swenshuai.xi     E_DV_STREAM_LEVEL_ID_FHD30,
887*53ee8cc1Swenshuai.xi     // Indicates Dolby Vision stream level is "FHD60".
888*53ee8cc1Swenshuai.xi     E_DV_STREAM_LEVEL_ID_FHD60,
889*53ee8cc1Swenshuai.xi     // Indicates Dolby Vision stream level is "UHD24".
890*53ee8cc1Swenshuai.xi     E_DV_STREAM_LEVEL_ID_UHD24,
891*53ee8cc1Swenshuai.xi     // Indicates Dolby Vision stream level is "UHD30".
892*53ee8cc1Swenshuai.xi     E_DV_STREAM_LEVEL_ID_UHD30,
893*53ee8cc1Swenshuai.xi     // Indicates Dolby Vision stream level is "UHD48".
894*53ee8cc1Swenshuai.xi     E_DV_STREAM_LEVEL_ID_UHD48,
895*53ee8cc1Swenshuai.xi     // Indicates Dolby Vision stream level is "UHD60".
896*53ee8cc1Swenshuai.xi     E_DV_STREAM_LEVEL_ID_UHD60,
897*53ee8cc1Swenshuai.xi } DV_Stream_Level;
898*53ee8cc1Swenshuai.xi 
899*53ee8cc1Swenshuai.xi //-----------------------------------------------------------------------------
900*53ee8cc1Swenshuai.xi /// @brief \b Struct \b Name: HVD_EX_MemMap
901*53ee8cc1Swenshuai.xi /// @brief \b Struct \b Description:  Store the HVD driver config
902*53ee8cc1Swenshuai.xi //-----------------------------------------------------------------------------
903*53ee8cc1Swenshuai.xi typedef struct
904*53ee8cc1Swenshuai.xi {
905*53ee8cc1Swenshuai.xi     MS_PHY  u32MIU1BaseAddr;                //!< the physical memory start address of MIU 1 base address. 0: default value.
906*53ee8cc1Swenshuai.xi     MS_PHY  u32MIU2BaseAddr;                //!< the physical memory start address of MIU 2 base address. 0: default value.
907*53ee8cc1Swenshuai.xi     MS_VIRT   u32FWBinaryVAddr;               //!<  virtual address of input FW binary in DRAM
908*53ee8cc1Swenshuai.xi     MS_PHY  u32FWBinaryAddr;                //!< the physical memory start address in Flash memory of FW code source.
909*53ee8cc1Swenshuai.xi     MS_U32    u32FWBinarySize;                //!< the FW code size
910*53ee8cc1Swenshuai.xi     MS_VIRT   u32VLCBinaryVAddr;              //!< VLC table binary data buffer start address
911*53ee8cc1Swenshuai.xi     MS_PHY  u32VLCBinaryAddr;               //!< VLC table binary data buffer start address
912*53ee8cc1Swenshuai.xi     MS_U32    u32VLCBinarySize;               //!<VLC table binary data buffer size
913*53ee8cc1Swenshuai.xi     MS_VIRT   u32CodeBufVAddr;                //!< the virtual memory start address of code buffer
914*53ee8cc1Swenshuai.xi     MS_PHY  u32CodeBufAddr;                 //!< the physical memory start address of code buffer
915*53ee8cc1Swenshuai.xi     MS_U32    u32CodeBufSize;                 //!< the code buffer size
916*53ee8cc1Swenshuai.xi     MS_VIRT   u32FrameBufVAddr;               //!< the virtual memory start address of frame buffer
917*53ee8cc1Swenshuai.xi     MS_PHY  u32FrameBufAddr;                //!< the physical memory start address of frame buffer
918*53ee8cc1Swenshuai.xi     MS_U32    u32FrameBufSize;                //!< the frame buffer size
919*53ee8cc1Swenshuai.xi     MS_VIRT   u32BitstreamBufVAddr;           //!< the virtual memory start address of bit stream buffer
920*53ee8cc1Swenshuai.xi     MS_PHY  u32BitstreamBufAddr;            //!< the physical memory start address of bit stream buffer
921*53ee8cc1Swenshuai.xi     MS_U32    u32BitstreamBufSize;            //!< the bit stream buffer size
922*53ee8cc1Swenshuai.xi     MS_VIRT   u32DrvProcessBufVAddr;          //!< the virtual memory start address of driver process buffer
923*53ee8cc1Swenshuai.xi     MS_PHY  u32DrvProcessBufAddr;           //!< the physical memory start address of driver process buffer
924*53ee8cc1Swenshuai.xi     MS_U32    u32DrvProcessBufSize;           //!< the driver process buffer size
925*53ee8cc1Swenshuai.xi     MS_VIRT   u32DynSacalingBufVAddr;         //!< the virtual memory start address of dynamic scaling buffer
926*53ee8cc1Swenshuai.xi     MS_PHY  u32DynSacalingBufAddr;          //!< the physical memory start address of dynamic scaling buffer
927*53ee8cc1Swenshuai.xi     MS_U32    u32DynSacalingBufSize;          //!< the dynamic scaling buffer size
928*53ee8cc1Swenshuai.xi     HVD_FWInputSourceType eFWSourceType;    //!< the input FW source type.
929*53ee8cc1Swenshuai.xi #ifdef VDEC3
930*53ee8cc1Swenshuai.xi     MS_PHY  u32TotalBitstreamBufAddr;
931*53ee8cc1Swenshuai.xi     MS_U32    u32TotalBitstreamBufSize;
932*53ee8cc1Swenshuai.xi #endif
933*53ee8cc1Swenshuai.xi } HVD_EX_MemMap;
934*53ee8cc1Swenshuai.xi 
935*53ee8cc1Swenshuai.xi //-----------------------------------------------------------------------------
936*53ee8cc1Swenshuai.xi /// @brief \b Struct \b Name: HVD_Nal_Entry
937*53ee8cc1Swenshuai.xi /// @brief \b Struct \b Description:  Store the information of one nal entry
938*53ee8cc1Swenshuai.xi //-----------------------------------------------------------------------------
939*53ee8cc1Swenshuai.xi typedef struct
940*53ee8cc1Swenshuai.xi {
941*53ee8cc1Swenshuai.xi     MS_U32  u32NalID;       ///< the ID nunber of this nal
942*53ee8cc1Swenshuai.xi     MS_VIRT  u32NalAddr;     ///< the offset of this nal from bit stream buffer start address. unit: byte
943*53ee8cc1Swenshuai.xi     MS_U32  u32NalSize;     ///< the size of this nal. unit: byte
944*53ee8cc1Swenshuai.xi     MS_U32  u32NalPTS;      ///< the time stamp of this nal. unit: ms
945*53ee8cc1Swenshuai.xi     MS_BOOL  bRVBrokenPacket;      ///< the RV only
946*53ee8cc1Swenshuai.xi } HVD_Nal_Entry;
947*53ee8cc1Swenshuai.xi 
948*53ee8cc1Swenshuai.xi //-----------------------------------------------------------------------------
949*53ee8cc1Swenshuai.xi /// @brief \b Struct \b Name: RV_FileInfo
950*53ee8cc1Swenshuai.xi /// @brief \b Struct \b Description:  RV file information
951*53ee8cc1Swenshuai.xi //-----------------------------------------------------------------------------
952*53ee8cc1Swenshuai.xi typedef struct
953*53ee8cc1Swenshuai.xi {
954*53ee8cc1Swenshuai.xi     MS_U16 RV_Version;      ///< Real Video Bitstream version
955*53ee8cc1Swenshuai.xi     MS_U16 ulNumSizes;      ///< Real Video Number sizes
956*53ee8cc1Swenshuai.xi     MS_U16 ulPicSizes_w[8]; ///< Real Video file width
957*53ee8cc1Swenshuai.xi     MS_U16 ulPicSizes_h[8]; ///< Real Video file height
958*53ee8cc1Swenshuai.xi } RV_FileInfo;
959*53ee8cc1Swenshuai.xi 
960*53ee8cc1Swenshuai.xi //-----------------------------------------------------------------------------
961*53ee8cc1Swenshuai.xi /// @brief \b Struct \b Name: HVD_FB_Reduction_Mode
962*53ee8cc1Swenshuai.xi /// @brief \b Struct \b Description:  Set up frame buffer reduction mode
963*53ee8cc1Swenshuai.xi //-----------------------------------------------------------------------------
964*53ee8cc1Swenshuai.xi typedef struct
965*53ee8cc1Swenshuai.xi {
966*53ee8cc1Swenshuai.xi     HVD_FBReductionType eLumaFBReductionMode;     ///< Luma frame buffer reduction mode.
967*53ee8cc1Swenshuai.xi     HVD_FBReductionType eChromaFBReductionMode;   ///< Chroma frame buffer reduction mode.
968*53ee8cc1Swenshuai.xi     MS_U8                u8EnableAutoMode;            /// 0: Disable, 1: Enable
969*53ee8cc1Swenshuai.xi } HVD_FBReductionMode;
970*53ee8cc1Swenshuai.xi 
971*53ee8cc1Swenshuai.xi //-----------------------------------------------------------------------------
972*53ee8cc1Swenshuai.xi /// @brief \b Struct \b Name: HVD_Init_Params
973*53ee8cc1Swenshuai.xi /// @brief \b Struct \b Description:  Store the initialization settings
974*53ee8cc1Swenshuai.xi //-----------------------------------------------------------------------------
975*53ee8cc1Swenshuai.xi typedef struct
976*53ee8cc1Swenshuai.xi {
977*53ee8cc1Swenshuai.xi     MS_U32 u32ModeFlag;     ///< init mode flag, use HVD_INIT_* to setup HVD.
978*53ee8cc1Swenshuai.xi     MS_U32 u32FrameRate;     ///< frame rate.
979*53ee8cc1Swenshuai.xi     MS_U32 u32FrameRateBase;     ///< frame rate base. The value of u32FrameRate /u32FrameRateBase must be frames per sec.
980*53ee8cc1Swenshuai.xi     MS_U8   u8MinFrmGap;    ///< set the min frame gap.
981*53ee8cc1Swenshuai.xi     MS_U8   u8SyncType;         ///< HVD_EX_SyncType. sync type of current playback.
982*53ee8cc1Swenshuai.xi     MS_U16 u16Pitch;   ///< not zero: specify the pitch. 0: use default value.
983*53ee8cc1Swenshuai.xi     MS_U32 u32MaxDecTick;   ///< not zero: specify the max decode tick. 0: use default value.
984*53ee8cc1Swenshuai.xi     MS_BOOL bSyncEachFrm;   ///< TRUE: sync STC at each frame. FALSE: not sync each frame.
985*53ee8cc1Swenshuai.xi     MS_BOOL bAutoFreeES;   ///< TRUE: auto free ES buffer when ES buffer is full. FALSE: not do the auto free.
986*53ee8cc1Swenshuai.xi     MS_BOOL bAutoPowerSaving;   ///< TRUE: auto power saving. FALSE: not do the auto power saving.
987*53ee8cc1Swenshuai.xi     MS_BOOL bDynamicScaling;   ///< TRUE: enable Dynamic Scaling. FALSE: disable Dynamic Scaling.
988*53ee8cc1Swenshuai.xi     MS_BOOL bFastDisplay;   ///< TRUE: enable Fast Display. FALSE: disable Fast Display.
989*53ee8cc1Swenshuai.xi     MS_BOOL bUserData;   ///< TRUE: enable processing User data. FALSE: disable processing User data.
990*53ee8cc1Swenshuai.xi     MS_U8 u8TurboInit;       ///< HVD_TurboInitLevel. set the turbo init mode.
991*53ee8cc1Swenshuai.xi     MS_U8 u8TimeUnit;   ///< HVD_Time_Unit_Type.set the type of input/output time unit.
992*53ee8cc1Swenshuai.xi     MS_U16 u16DecoderClock;      ///< HVD decoder clock speed. 0: default value. non-zero: any nearist clock.
993*53ee8cc1Swenshuai.xi     MS_U16 u16ChipECONum;    ///< Chip revision, ECO number.
994*53ee8cc1Swenshuai.xi     RV_FileInfo* pRVFileInfo;           ///< pointer to RV file info
995*53ee8cc1Swenshuai.xi     HVD_FBReductionMode stFBReduction; ///< HVD Frame buffer reduction type
996*53ee8cc1Swenshuai.xi } HVD_Init_Params;
997*53ee8cc1Swenshuai.xi 
998*53ee8cc1Swenshuai.xi //-----------------------------------------------------------------------------
999*53ee8cc1Swenshuai.xi /// @brief \b Struct \b Name: HVD_BBU_Info
1000*53ee8cc1Swenshuai.xi /// @brief \b Struct \b Description:  Store the packet information
1001*53ee8cc1Swenshuai.xi //-----------------------------------------------------------------------------
1002*53ee8cc1Swenshuai.xi typedef struct
1003*53ee8cc1Swenshuai.xi {
1004*53ee8cc1Swenshuai.xi     MS_VIRT u32Staddr;     ///< Packet offset from bitstream buffer base address. unit: byte.
1005*53ee8cc1Swenshuai.xi     MS_U32 u32Length;    ///< Packet size. unit: byte.
1006*53ee8cc1Swenshuai.xi     MS_VIRT u32Staddr2;     ///< Packet offset from bitstream buffer base address. unit: byte.
1007*53ee8cc1Swenshuai.xi     MS_U32 u32Length2;    ///< Packet size. unit: byte.
1008*53ee8cc1Swenshuai.xi     MS_U32 u32TimeStamp;    ///< Packet time stamp. unit: ms.
1009*53ee8cc1Swenshuai.xi     MS_U32 u32ID_L;    ///< Packet ID low part.
1010*53ee8cc1Swenshuai.xi     MS_U32 u32ID_H;    ///< Packet ID high part.
1011*53ee8cc1Swenshuai.xi     MS_U32 u32AllocLength;    ///< Allocated Packet size. unit: byte.
1012*53ee8cc1Swenshuai.xi     MS_U32 u32OriPktAddr;    ///< Original packet offset from bitstream buffer base address. unit: byte.
1013*53ee8cc1Swenshuai.xi     MS_BOOL  bRVBrokenPacket;      ///< the RV only
1014*53ee8cc1Swenshuai.xi } HVD_BBU_Info;
1015*53ee8cc1Swenshuai.xi 
1016*53ee8cc1Swenshuai.xi //-----------------------------------------------------------------------------
1017*53ee8cc1Swenshuai.xi /// @brief \b Struct \b Name: HVD_Alive_Status
1018*53ee8cc1Swenshuai.xi /// @brief \b Struct \b Description:  Store the decoder living information
1019*53ee8cc1Swenshuai.xi //-----------------------------------------------------------------------------
1020*53ee8cc1Swenshuai.xi typedef struct
1021*53ee8cc1Swenshuai.xi {
1022*53ee8cc1Swenshuai.xi     MS_U32 u32DecCnt;
1023*53ee8cc1Swenshuai.xi     MS_U32 u32SkipCnt;
1024*53ee8cc1Swenshuai.xi     MS_U32 u32IdleCnt;
1025*53ee8cc1Swenshuai.xi     MS_U32 u32MainLoopCnt;
1026*53ee8cc1Swenshuai.xi } HVD_Alive_Status;
1027*53ee8cc1Swenshuai.xi 
1028*53ee8cc1Swenshuai.xi //-----------------------------------------------------------------------------
1029*53ee8cc1Swenshuai.xi /// @brief \b Struct \b Name: HVD_DISP_INFO_THRESHOLD
1030*53ee8cc1Swenshuai.xi /// @brief \b Struct \b Description:  Store the disp information threshold.
1031*53ee8cc1Swenshuai.xi //-----------------------------------------------------------------------------
1032*53ee8cc1Swenshuai.xi typedef struct
1033*53ee8cc1Swenshuai.xi {
1034*53ee8cc1Swenshuai.xi     MS_U32 u32FrmrateUpBound;       //Framerate filter upper bound
1035*53ee8cc1Swenshuai.xi     MS_U32 u32FrmrateLowBound;      //Framerate filter lower bound
1036*53ee8cc1Swenshuai.xi     MS_U32 u32MvopUpBound;          //mvop filter upper bound
1037*53ee8cc1Swenshuai.xi     MS_U32 u32MvopLowBound;         //mvop filter lower bound
1038*53ee8cc1Swenshuai.xi } HVD_Disp_Info_TH;
1039*53ee8cc1Swenshuai.xi 
1040*53ee8cc1Swenshuai.xi //-----------------------------------------------------------------------------
1041*53ee8cc1Swenshuai.xi /// @brief \b Struct \b Name: HVD_Settings
1042*53ee8cc1Swenshuai.xi /// @brief \b Struct \b Description:  Store the settings of user requirment
1043*53ee8cc1Swenshuai.xi //-----------------------------------------------------------------------------
1044*53ee8cc1Swenshuai.xi typedef struct
1045*53ee8cc1Swenshuai.xi {
1046*53ee8cc1Swenshuai.xi // TODO: currently only DTV settings. Need to add more settings for MM.
1047*53ee8cc1Swenshuai.xi // Mode
1048*53ee8cc1Swenshuai.xi     HVD_Disp_Info_TH DispInfoTH;
1049*53ee8cc1Swenshuai.xi     MS_U32  u32IsrEvent;
1050*53ee8cc1Swenshuai.xi     MS_BOOL bEnISR;
1051*53ee8cc1Swenshuai.xi 
1052*53ee8cc1Swenshuai.xi     MS_U8 u8SkipMode;                   // HVD_Skip_Decode_Type
1053*53ee8cc1Swenshuai.xi     MS_U8 bIsShowErrFrm;
1054*53ee8cc1Swenshuai.xi     MS_U8 u8FrcMode;              //HVD_EX_FrmRateConvMode
1055*53ee8cc1Swenshuai.xi 
1056*53ee8cc1Swenshuai.xi     MS_BOOL bIsErrConceal;
1057*53ee8cc1Swenshuai.xi     MS_BOOL bAutoFreeES;
1058*53ee8cc1Swenshuai.xi     MS_BOOL bDisDeblocking;
1059*53ee8cc1Swenshuai.xi     MS_BOOL bDisQuarterPixel;
1060*53ee8cc1Swenshuai.xi 
1061*53ee8cc1Swenshuai.xi     MS_U8 bIsSyncOn;
1062*53ee8cc1Swenshuai.xi     MS_U32 u32SyncTolerance;
1063*53ee8cc1Swenshuai.xi     MS_U32 u32SyncRepeatTH;
1064*53ee8cc1Swenshuai.xi     MS_U32 u32SyncVideoDelay;
1065*53ee8cc1Swenshuai.xi     MS_U32 u32SyncFreeRunTH;
1066*53ee8cc1Swenshuai.xi     MS_U32 u32MiuBurstLevel;
1067*53ee8cc1Swenshuai.xi } HVD_Settings;
1068*53ee8cc1Swenshuai.xi 
1069*53ee8cc1Swenshuai.xi //-----------------------------------------------------------------------------
1070*53ee8cc1Swenshuai.xi /// @brief \b Struct \b Name: HVD_CC_Info
1071*53ee8cc1Swenshuai.xi /// @brief \b Struct \b Description:  HVD Close Caption Infomation.
1072*53ee8cc1Swenshuai.xi //-----------------------------------------------------------------------------
1073*53ee8cc1Swenshuai.xi typedef struct
1074*53ee8cc1Swenshuai.xi {
1075*53ee8cc1Swenshuai.xi     MS_U8 u8UserDataMode;
1076*53ee8cc1Swenshuai.xi     MS_U8 u8ParsingStatus;
1077*53ee8cc1Swenshuai.xi     MS_BOOL b708Enable;
1078*53ee8cc1Swenshuai.xi     MS_BOOL b608InfoEnhance;
1079*53ee8cc1Swenshuai.xi     //MS_BOOL bBufMiu1[2];
1080*53ee8cc1Swenshuai.xi     MS_U8 u8BufMiuSel[2];
1081*53ee8cc1Swenshuai.xi     MS_BOOL bOverFlow[2];
1082*53ee8cc1Swenshuai.xi     MS_PHY u32RingBufStartPAddr[2];//physical address
1083*53ee8cc1Swenshuai.xi     MS_U32 u32RingBufLen[2];
1084*53ee8cc1Swenshuai.xi     MS_U32 volatile u32RingBufVacancy[2];
1085*53ee8cc1Swenshuai.xi     MS_PHY volatile u32RingBufRPAddr[2], u32RingBufWPAddr[2];//physical address
1086*53ee8cc1Swenshuai.xi     MS_U32 volatile u32FWUsrDataRIdx, u32FWUsrDataWIdx;
1087*53ee8cc1Swenshuai.xi     MS_U32 u32PktLen708;
1088*53ee8cc1Swenshuai.xi     MS_VIRT u32PktHdrAddr708;
1089*53ee8cc1Swenshuai.xi     MS_U8 u8CC608buf[512];
1090*53ee8cc1Swenshuai.xi     MS_U8 u8CC708buf[512];
1091*53ee8cc1Swenshuai.xi } HVD_CC_Info;
1092*53ee8cc1Swenshuai.xi 
1093*53ee8cc1Swenshuai.xi typedef struct
1094*53ee8cc1Swenshuai.xi {
1095*53ee8cc1Swenshuai.xi     MS_U16 u16TmpRef;
1096*53ee8cc1Swenshuai.xi     MS_U16 u16PicStruct;
1097*53ee8cc1Swenshuai.xi     MS_U32 u32Pts;
1098*53ee8cc1Swenshuai.xi     MS_U8  u8UsrDataCnt;
1099*53ee8cc1Swenshuai.xi } HVD_CC_608EnhanceInfo;
1100*53ee8cc1Swenshuai.xi 
1101*53ee8cc1Swenshuai.xi 
1102*53ee8cc1Swenshuai.xi //-----------------------------------------------------------------------------
1103*53ee8cc1Swenshuai.xi /// @brief \b Struct \b Name: HVD_ISR_Ctrl
1104*53ee8cc1Swenshuai.xi /// @brief \b Struct \b Description:  HVD driver ISR control.
1105*53ee8cc1Swenshuai.xi //-----------------------------------------------------------------------------
1106*53ee8cc1Swenshuai.xi typedef struct
1107*53ee8cc1Swenshuai.xi {
1108*53ee8cc1Swenshuai.xi     MS_BOOL bRegISR;
1109*53ee8cc1Swenshuai.xi     MS_BOOL bInISR;
1110*53ee8cc1Swenshuai.xi     MS_U32  u32ISRInfo;
1111*53ee8cc1Swenshuai.xi     MS_U32  u32IntCount;
1112*53ee8cc1Swenshuai.xi     HVD_ISRCallBack pfnISRCallBack;
1113*53ee8cc1Swenshuai.xi     MS_BOOL bDisableISRFlag;
1114*53ee8cc1Swenshuai.xi     MS_BOOL bIsHvdIsr;
1115*53ee8cc1Swenshuai.xi     MS_BOOL bIsG2Vp9Isr;
1116*53ee8cc1Swenshuai.xi     HWDEC_ISR_TYPE  eHWDecIsr; //HVD, EVD, G2VP9 ISR
1117*53ee8cc1Swenshuai.xi } HVD_ISR_Ctrl;
1118*53ee8cc1Swenshuai.xi 
1119*53ee8cc1Swenshuai.xi //-----------------------------------------------------------------------------
1120*53ee8cc1Swenshuai.xi /// @brief \b Struct \b Name: HVD_EX_Drv_Ctrl
1121*53ee8cc1Swenshuai.xi /// @brief \b Struct \b Description:  HVD driver internal control.
1122*53ee8cc1Swenshuai.xi //-----------------------------------------------------------------------------
1123*53ee8cc1Swenshuai.xi typedef struct
1124*53ee8cc1Swenshuai.xi {
1125*53ee8cc1Swenshuai.xi // init stage
1126*53ee8cc1Swenshuai.xi     MS_BOOL bUsed;
1127*53ee8cc1Swenshuai.xi     HVD_EX_MemMap MemMap;         ///< HVD memory config
1128*53ee8cc1Swenshuai.xi     HVD_Init_Params InitParams;         ///< HVD init settings
1129*53ee8cc1Swenshuai.xi     MS_BOOL bNoDrvProccBuf;
1130*53ee8cc1Swenshuai.xi     MS_BOOL bAutoRmLastZeroByte;
1131*53ee8cc1Swenshuai.xi     MS_BOOL bCannotAccessMIU256;
1132*53ee8cc1Swenshuai.xi     MS_U32  u32CmdTimeout;          ///< HVD FW command timeout
1133*53ee8cc1Swenshuai.xi     void *pLastFrmInfo;
1134*53ee8cc1Swenshuai.xi     void *pLastFrmInfo_ext;
1135*53ee8cc1Swenshuai.xi 
1136*53ee8cc1Swenshuai.xi // reset stage
1137*53ee8cc1Swenshuai.xi     MS_U32  u32CtrlMode;            ///< HVD run-time control flag
1138*53ee8cc1Swenshuai.xi     MS_U32  u32DummyWriteBuf;       ///< For dummy write MIU action.
1139*53ee8cc1Swenshuai.xi     //MS_U32  u32CPUNonCacheMask;         ///< CPU non-cache mask
1140*53ee8cc1Swenshuai.xi     MS_U32  u32NULLPacketSize;      ///< to store the size of AVI null packet pattern
1141*53ee8cc1Swenshuai.xi     MS_VIRT u32NULLPacketAddr;      ///< to store the start address of AVI null packet pattern from bitstream buffer base.
1142*53ee8cc1Swenshuai.xi     MS_U32  u32RV_FlushPacketSize;      ///< to store the size of rm flush packet pattern
1143*53ee8cc1Swenshuai.xi     MS_U32  u32RV_FlushPacketAddr;      ///< to store the start address of rm flush packet pattern from bitstream buffer base.
1144*53ee8cc1Swenshuai.xi     MS_U32  u32StepDecodeCnt;
1145*53ee8cc1Swenshuai.xi     //MS_U32  u32LastBBUPTS;
1146*53ee8cc1Swenshuai.xi     //MS_U32  u32DummyDataSize;           ///< buffer size of dummy data.
1147*53ee8cc1Swenshuai.xi     //MS_U32  u32RestSizeofPushDummy;
1148*53ee8cc1Swenshuai.xi     //MS_U32  u32AddrPushDummy;
1149*53ee8cc1Swenshuai.xi     MS_U32  u32LastESRptr;
1150*53ee8cc1Swenshuai.xi     MS_U32  u32BBUTblInBitstreamBufAddr;
1151*53ee8cc1Swenshuai.xi     MS_U32  u32BBUPacketCnt;
1152*53ee8cc1Swenshuai.xi     MS_U32  u32BBUWptr_Fired;
1153*53ee8cc1Swenshuai.xi     MS_U32  u32LastErrCode;
1154*53ee8cc1Swenshuai.xi     //MS_BOOL bPushingDummy;
1155*53ee8cc1Swenshuai.xi     MS_BOOL bIsDispInfoChg;
1156*53ee8cc1Swenshuai.xi     MS_BOOL bFrmRateSupported;
1157*53ee8cc1Swenshuai.xi     HVD_Nal_Entry  LastNal;
1158*53ee8cc1Swenshuai.xi     HVD_Alive_Status LivingStatus;
1159*53ee8cc1Swenshuai.xi 
1160*53ee8cc1Swenshuai.xi // recovery stage
1161*53ee8cc1Swenshuai.xi     MS_BOOL bStepDecoding;
1162*53ee8cc1Swenshuai.xi     HVD_Settings Settings;
1163*53ee8cc1Swenshuai.xi 
1164*53ee8cc1Swenshuai.xi     MS_U8 bTurboFWMode; //TRUE:not reload FW more than once if pre-decoder is the same.
1165*53ee8cc1Swenshuai.xi 
1166*53ee8cc1Swenshuai.xi // ISR control
1167*53ee8cc1Swenshuai.xi     HVD_ISR_Ctrl HVDISRCtrl;
1168*53ee8cc1Swenshuai.xi     MS_U32 u32Sid; // stream ID
1169*53ee8cc1Swenshuai.xi 
1170*53ee8cc1Swenshuai.xi // user data
1171*53ee8cc1Swenshuai.xi     MS_U32 u32UsrDataRd;
1172*53ee8cc1Swenshuai.xi     MS_U32 u32UsrDataWr;
1173*53ee8cc1Swenshuai.xi     HVD_CC_Info CloseCaptionInfo;
1174*53ee8cc1Swenshuai.xi 
1175*53ee8cc1Swenshuai.xi     MS_U32 u32FlushRstPtr;  ///< flush rst ptr: 0: init, 1:after flush and before push packet
1176*53ee8cc1Swenshuai.xi 
1177*53ee8cc1Swenshuai.xi // Secure Mode
1178*53ee8cc1Swenshuai.xi     MS_U8 u8SecureMode;  // Enum HVD_SECURE_MODE
1179*53ee8cc1Swenshuai.xi     MS_U8 u8SettingMode;   // Record Setting mode
1180*53ee8cc1Swenshuai.xi     MS_U8 u8Resv[2];
1181*53ee8cc1Swenshuai.xi     MS_U32 u32ExternalDSbuf; // External DS buffer
1182*53ee8cc1Swenshuai.xi     MS_U8 u8CodeMiuSel;
1183*53ee8cc1Swenshuai.xi     MS_U8 u8ESMiuSel;
1184*53ee8cc1Swenshuai.xi     MS_U8 u8FrmMiuSel;
1185*53ee8cc1Swenshuai.xi     MS_U8 u8Frm2MiuSel;
1186*53ee8cc1Swenshuai.xi     MS_U8 u8DrvProccMiuSel;
1187*53ee8cc1Swenshuai.xi #ifdef VDEC3
1188*53ee8cc1Swenshuai.xi     MS_BOOL bNStreamMode;
1189*53ee8cc1Swenshuai.xi     MS_U32 u32BBUId;
1190*53ee8cc1Swenshuai.xi #endif
1191*53ee8cc1Swenshuai.xi     MS_BOOL bDirectSTCModeEnabled;
1192*53ee8cc1Swenshuai.xi } HVD_EX_Drv_Ctrl;
1193*53ee8cc1Swenshuai.xi 
1194*53ee8cc1Swenshuai.xi typedef void(*P_SC_ISR_Proc)(MS_U8 u8SCID);
1195*53ee8cc1Swenshuai.xi 
1196*53ee8cc1Swenshuai.xi typedef struct
1197*53ee8cc1Swenshuai.xi {
1198*53ee8cc1Swenshuai.xi   MS_BOOL bEnable;
1199*53ee8cc1Swenshuai.xi   MS_U32 u32IapGnBufAddr;
1200*53ee8cc1Swenshuai.xi   MS_U32 u32IapGnBufSize;
1201*53ee8cc1Swenshuai.xi } HVD_EX_IapGnBufShareBWMode;
1202*53ee8cc1Swenshuai.xi 
1203*53ee8cc1Swenshuai.xi typedef struct
1204*53ee8cc1Swenshuai.xi {
1205*53ee8cc1Swenshuai.xi     MS_BOOL bOnePendingBuffer;
1206*53ee8cc1Swenshuai.xi     MS_BOOL bFrameRateHandling;
1207*53ee8cc1Swenshuai.xi     MS_U32  u32PreSetFrameRate;
1208*53ee8cc1Swenshuai.xi     HVD_EX_IapGnBufShareBWMode  stIapGnShBWMode;
1209*53ee8cc1Swenshuai.xi     MS_BOOL bDisableTspInBbuMode;
1210*53ee8cc1Swenshuai.xi     HVD_MFCodec_mode eMFCodecMode;
1211*53ee8cc1Swenshuai.xi     MS_BOOL bForce8BitMode;
1212*53ee8cc1Swenshuai.xi     HVD_Feature eVdecFeature;
1213*53ee8cc1Swenshuai.xi     HVD_Display_mode eDisplayMode;
1214*53ee8cc1Swenshuai.xi     MS_BOOL bCalFrameRate;
1215*53ee8cc1Swenshuai.xi } HVD_Pre_Ctrl;
1216*53ee8cc1Swenshuai.xi 
1217*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
1218*53ee8cc1Swenshuai.xi //  Function and Variable
1219*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
1220*53ee8cc1Swenshuai.xi extern MS_U32 u32UartCtrl;
1221*53ee8cc1Swenshuai.xi //extern MS_U32 u32InitSysTimeBase;
1222*53ee8cc1Swenshuai.xi 
1223*53ee8cc1Swenshuai.xi #endif // _DRV_HVD_DEF_H_
1224*53ee8cc1Swenshuai.xi 
1225