1 //<MStar Software>
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77 //<MStar Software>
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92 //
93 ////////////////////////////////////////////////////////////////////////////////
94
95 #define _HAL_VBI_C
96
97 //-------------------------------------------------------------------------------------------------
98 // Include Files
99 //-------------------------------------------------------------------------------------------------
100 // Common Definition
101 #include "MsCommon.h"
102
103 // Internal Definition
104 #include "halVBI.h"
105 #include "regVBI.h"
106 #include <string.h>
107
108 //-------------------------------------------------------------------------------------------------
109 // Driver Compiler Options
110 //-------------------------------------------------------------------------------------------------
111 #define INTERFACE extern
112
113 //-------------------------------------------------------------------------------------------------
114 // Local Defines
115 //-------------------------------------------------------------------------------------------------
116 #define MAKEWORD(a,b) ((((MS_U16)((MS_U8) (a)))<<8) | ((MS_U16)((MS_U8) (b))))
117
118 #define R1BYTE(u32Addr, u8mask) \
119 (READ_BYTE (_u32VBIRiuBaseAddr + ((u32Addr) << 1) - ((u32Addr) & 1)) & (u8mask))
120
121 #define W1BYTE(u32Addr, u8Val, u8mask) \
122 (WRITE_BYTE(_u32VBIRiuBaseAddr + ((u32Addr) << 1) - ((u32Addr) & 1), (R1BYTE(u32Addr, 0xFF) & ~(u8mask)) | ((u8Val) & (u8mask))))
123
124 ///////////////////////////////////////////////////////////////
125 #define MDrv_WriteByte( u32Reg, u8Val ) \
126 do { \
127 (WRITE_BYTE(_u32VBIRiuBaseAddr + ((u32Reg) << 1) - ((u32Reg) & 1), u8Val)); \
128 }while(0)
129
130 #define MDrv_WriteWord( u32Reg, u16Val ) \
131 do { \
132 (WRITE_WORD(_u32VBIRiuBaseAddr + ((u32Reg) << 1), u16Val)); \
133 }while(0)
134
135 #define MDrv_WriteByteMask( u32Reg, u8Val, u8Mask ) \
136 do { \
137 (WRITE_BYTE(_u32VBIRiuBaseAddr + ((u32Reg) << 1) - ((u32Reg) & 1), (R1BYTE((u32Reg), 0xFF) & ~(u8Mask)) | ((u8Val) & (u8Mask)))); \
138 }while(0)
139
140 #define MDrv_ReadByte( u32Reg) (READ_BYTE (_u32VBIRiuBaseAddr + ((u32Reg) << 1) - ((u32Reg) & 1)))
141
142 #define _BIT0 BIT(0)
143 #define _BIT1 BIT(1)
144 #define _BIT2 BIT(2)
145 #define _BIT3 BIT(3)
146 #define _BIT4 BIT(4)
147 #define _BIT5 BIT(5)
148 #define _BIT6 BIT(6)
149 #define _BIT7 BIT(7)
150 #define _BIT8 BIT(8)
151 #define _BIT9 BIT(9)
152 #define _BIT10 BIT(10)
153 #define _BIT11 BIT(11)
154 #define _BIT12 BIT(12)
155 #define _BIT13 BIT(13)
156 #define _BIT14 BIT(14)
157 #define _BIT15 BIT(15)
158
159 typedef enum
160 {
161 VBI_FIELD_EVEN,
162 VBI_FIELD_ODD
163 } EN_VBI_FIELD;
164
165 #define BK_VBI_E7_BUG 1
166 //-------------------------------------------------------------------------------------------------
167 // Local Structures
168 //-------------------------------------------------------------------------------------------------
169
170
171 //-------------------------------------------------------------------------------------------------
172 // Global Variables
173 //-------------------------------------------------------------------------------------------------
174
175
176 //-------------------------------------------------------------------------------------------------
177 // Local Variables
178 //-------------------------------------------------------------------------------------------------
179 static MS_U32 _u32VBIRiuBaseAddr;
180
181 //-------------------------------------------------------------------------------------------------
182 // Debug Functions
183 //-------------------------------------------------------------------------------------------------
184
185
186 //-------------------------------------------------------------------------------------------------
187 // Local Functions
188 //-------------------------------------------------------------------------------------------------
HAL_VBI_ReadByte(MS_U32 u32RegAddr)189 MS_U8 HAL_VBI_ReadByte(MS_U32 u32RegAddr)
190 {
191 return (MDrv_ReadByte(u32RegAddr));
192 }
193
HAL_VBI_Read2Byte(MS_U32 u32RegAddr)194 MS_U16 HAL_VBI_Read2Byte(MS_U32 u32RegAddr)
195 {
196 return ((MDrv_ReadByte(u32RegAddr)) + ((MDrv_ReadByte(u32RegAddr + 1))<<8));
197 }
198
HAL_VBI_WriteByte(MS_U32 u32RegAddr,MS_U8 val)199 void HAL_VBI_WriteByte(MS_U32 u32RegAddr, MS_U8 val)
200 {
201 MDrv_WriteByte(u32RegAddr, val);
202 }
203
HAL_VBI_Write2Byte(MS_U32 u32RegAddr,MS_U16 val)204 void HAL_VBI_Write2Byte(MS_U32 u32RegAddr, MS_U16 val)
205 {
206 MDrv_WriteByte(u32RegAddr, (val & 0xFF));
207 MDrv_WriteByte(u32RegAddr + 1, (val>>8));
208 }
209
HAL_VBI_WriteWord(MS_U32 u32RegAddr,MS_U16 val)210 void HAL_VBI_WriteWord(MS_U32 u32RegAddr, MS_U16 val)
211 {
212 if (u32RegAddr & 0x01)
213 printf("[VBI][%s] ERROR, not alignment address", __FUNCTION__);
214
215 MDrv_WriteWord(u32RegAddr, val);
216 }
217
HAL_VBI_WriteByteMask(MS_U32 u32RegAddr,MS_U8 val,MS_U8 mask)218 void HAL_VBI_WriteByteMask(MS_U32 u32RegAddr, MS_U8 val, MS_U8 mask)
219 {
220 MDrv_WriteByteMask(u32RegAddr, val, mask);
221 }
222
223 //-------------------------------------------------------------------------------------------------
224 // Global Functions
225 //-------------------------------------------------------------------------------------------------
VBI_TTXInit(MS_U32 u32Addr)226 void VBI_TTXInit(MS_U32 u32Addr)
227 {
228 _u32VBIRiuBaseAddr = u32Addr;
229
230 // close caption slicer threshold mode
231 HAL_VBI_WriteByte(BK_VBI_40, 0x01);
232
233 // close caption line start 1 (lower 3 bits) = 0
234 // close caption lin end 1 = 0
235 HAL_VBI_WriteByte(BK_VBI_41, 0x00);
236
237 // close caption line start 2 = 0
238 // close caption CRI zero crossing type : positive edge
239 // close caption clock run-in amplitude upper threshold (upper 2 bits) = 0b01
240 HAL_VBI_WriteByte(BK_VBI_50, 0x60);
241
242 // close caption line end 2 = 0
243 // close caption multi-line acquisition mode : 1
244 // close caption zero crossing mode : normal.
245 // close caption SYNC Found enable mode : 1
246 HAL_VBI_WriteByte(BK_VBI_51, 0xA0);
247
248 // teletext clock run-in amplitude accumulation start point. : 0b00010001
249 // For eye-height testing
250 HAL_VBI_WriteByte(BK_VBI_77, 0x11);
251
252 // teletext clock run-in amplitude accumulation start point. : 0b00011010
253 // For SuperVHS decode issue
254 //HAL_VBI_WriteByte(TT_CLK_RUN_IN_START_POINT, 0x1A);
255
256 // teletext VBI line start 1 (odd field) : 0b00100
257 // teletext VBI line end (lower 3 bits) 0b000
258 HAL_VBI_WriteByte(BK_VBI_7C, 0x04);
259
260 // teletext data line end 1 (odd field) : 0b10110
261 // teletext slicer read mode : 0b1
262 // teletext framing code error bond value : 0b0 fully match framing code.
263 // teletext framing code windows mode : 0b0
264 HAL_VBI_WriteByte(BK_VBI_7D, 0x36);
265
266 // teletext data line start 2 (even field) : 0b00100
267 // teletext slicer threshold fixing mode : 0b0 adjust automatically according to TtSidDetSel
268 // teletext slicer level mode : 0b0 original mode.
269 // teletext initial packet counter : 0b1 packet counter increases when teletext packet is detected without upper-bound.
270 HAL_VBI_WriteByte(BK_VBI_7E, 0x84);
271
272 // teletext data line end 2 (even field) : 0b10110
273 // teletext single line point mode : 0b11 Enable ttslptrmode, start from the line when previous line is no teletext.
274 // teletext base address source selecion : 0b1
275 HAL_VBI_WriteByte(BK_VBI_7F, 0xF6);
276
277 HAL_VBI_WriteByte(BK_VBI_81, 0x52);
278 HAL_VBI_WriteByte(BK_VBI_86, 0xD6);
279 HAL_VBI_WriteByte(BK_VBI_89, 0xC2);
280 HAL_VBI_WriteByte(BK_VBI_8A, 0x42);
281 HAL_VBI_WriteByte(BK_VBI_8B, 0x24);
282 HAL_VBI_WriteByte(BK_VBI_8D, 0xA5);
283 HAL_VBI_WriteByte(BK_VBI_90, 0x70);
284 HAL_VBI_WriteByte(BK_VBI_C4, 0x32);
285 HAL_VBI_WriteByte(BK_VBI_CB, 0xC4);
286 HAL_VBI_WriteByte(BK_VBI_CC, 0xBD);
287
288 // For VPS detect speed up
289 HAL_VBI_WriteByte(BK_VBI_B4, 0x42);
290 HAL_VBI_WriteByte(BK_VBI_B5, 0x61);
291 HAL_VBI_WriteByte(BK_VBI_BB, 0x06);
292
293 HAL_VBI_WriteByte(BK_VBI_70,0x80); // enable VPS/WSS
294 }
295
VBI_WSSInit(MS_U32 u32Addr)296 void VBI_WSSInit(MS_U32 u32Addr)
297 {
298 MS_U8 tmp = 0;
299 _u32VBIRiuBaseAddr = u32Addr;
300
301 tmp = HAL_VBI_ReadByte(BK_VBI_BF);
302 tmp &= ~(_BIT6 | _BIT7);
303 HAL_VBI_WriteByte(BK_VBI_BF, tmp);
304
305 HAL_VBI_WriteByte(BK_VBI_70, 0x80); // enable VPS/WSS
306 }
307
VBI_TTX_CheckCircuitReady(void)308 MS_BOOL VBI_TTX_CheckCircuitReady(void)
309 {
310 if( !(HAL_VBI_ReadByte( SLICERREADY ) & _BIT7) )
311 {
312 return FALSE;
313 }
314 else
315 {
316 return TRUE;
317 }
318 }
319
VBI_TTX_GetPacketCount(void)320 MS_U16 VBI_TTX_GetPacketCount(void)
321 {
322 return (MS_U16) HAL_VBI_Read2Byte(VBI_PKTCNT_L);
323 }
324
VBI_GetWSS_Count(void)325 MS_U16 VBI_GetWSS_Count(void)
326 {
327 return (MS_U16) (HAL_VBI_ReadByte(VBI_WSS_COUNT) & 0x07);
328 }
329
VBI_GetVPS_Count(void)330 MS_U16 VBI_GetVPS_Count(void)
331 {
332 return (MS_U16) (HAL_VBI_ReadByte(VBI_VPS_COUNT)>>4);
333 }
334
VBI_TTX_InitSlicer(MS_PHYADDR addr,MS_U16 packetCount)335 void VBI_TTX_InitSlicer(MS_PHYADDR addr, MS_U16 packetCount)
336 {
337 if((addr >> 3) >= (1 << TTX_BUF_BIT))
338 {
339 printf("[VBI][%s] ERROR, buffer address out of bound\n", __FUNCTION__);
340 //MS_ASSERT(0);
341 }
342
343 addr = addr >> 3; /* 8 byte-aligned */
344
345 /* Initial VBI Buffer Start Address */
346 HAL_VBI_Write2Byte(VBI_BASEADDR_L, addr);
347 HAL_VBI_WriteByte(VBI_BASEADDR_H, addr >> 16);
348 if((addr>>24) & 0x0f)
349 HAL_VBI_WriteByte(VBI_BIT24_ADDR, (HAL_VBI_ReadByte(VBI_BIT24_ADDR)&(~0x0f))|((addr>>24) & 0x0f));
350 else
351 HAL_VBI_WriteByte(VBI_BIT24_ADDR, HAL_VBI_ReadByte(VBI_BIT24_ADDR)&(~0x0f));
352
353 /* Initial VBI Buffer Field Number */
354 HAL_VBI_Write2Byte(VBI_BUF_LEN, packetCount); /* no need to minus 1, follow Venus design */
355
356 /* change dram access mode
357 * 0x371F, BIT7 must be always 1 (otherwise the DMA access related function could be error) */
358 HAL_VBI_WriteByte(TTDEC_COMMAND, _BIT1|_BIT7); /* put header packet into VBI without decoder */
359 }
360
VBI_TTX_EnableSlicer(MS_BOOL bEnable)361 void VBI_TTX_EnableSlicer(MS_BOOL bEnable)
362 {
363 if(bEnable)
364 HAL_VBI_WriteByte(TT_ENABLE, HAL_VBI_ReadByte(TT_ENABLE) | _BIT0); // enable TT VBI slicer
365 else
366 HAL_VBI_WriteByte(TT_ENABLE, HAL_VBI_ReadByte(TT_ENABLE) & ~(_BIT0)); // enable TT VBI slicer
367 }
368
VBI_TTX_GetHardware_Indication(void)369 MS_U8 VBI_TTX_GetHardware_Indication(void)
370 {
371 return HAL_VBI_ReadByte(BK_VBI_AF);
372 }
373
VBI_GetVPS_Data(MS_U8 * byte1,MS_U8 * byte2,MS_U8 * byte3,MS_U8 * byte4)374 void VBI_GetVPS_Data(MS_U8 *byte1, MS_U8 *byte2, MS_U8 *byte3, MS_U8 *byte4)
375 {
376 *byte1 = HAL_VBI_ReadByte(BK_VBI_AD);
377 *byte2 = HAL_VBI_ReadByte(BK_VBI_AE);
378 *byte3 = HAL_VBI_ReadByte(BK_VBI_A6);
379 *byte4 = HAL_VBI_ReadByte(BK_VBI_A7);
380 }
381
382
383 #define VPS_PACKET_LEN 15
384 static MS_U8 _u8VPSData[VPS_PACKET_LEN];
385
VBI_GetCompleteVPS_Data(MS_U8 ** pData,MS_U32 * dataLen)386 MS_BOOL VBI_GetCompleteVPS_Data(MS_U8** pData, MS_U32* dataLen)
387 {
388 if(HAL_VBI_ReadByte(BK_VBI_AF)&BIT(4))
389 {
390 memset(_u8VPSData, 0, VPS_PACKET_LEN);
391 _u8VPSData[0x0D - 1] = HAL_VBI_ReadByte(BK_VBI_AD);
392 _u8VPSData[0x0E - 1] = HAL_VBI_ReadByte(BK_VBI_AE);
393 _u8VPSData[0x05 - 1] = HAL_VBI_ReadByte(BK_VBI_A6);
394 _u8VPSData[0x0B - 1] = HAL_VBI_ReadByte(BK_VBI_A7);
395
396 *dataLen = VPS_PACKET_LEN;
397 *pData = _u8VPSData;
398
399 return TRUE;
400 }
401 else
402 {
403 return FALSE;
404 }
405 }
406
407
VBI_GetWSS_Data(void)408 MS_U16 VBI_GetWSS_Data(void)
409 {
410 MS_U8 wWssWordH;
411 MS_U8 wWssWordL;
412
413 wWssWordL = HAL_VBI_ReadByte(BK_VBI_CD);
414 wWssWordH = HAL_VBI_ReadByte(BK_VBI_CE);
415
416 return MAKEWORD(wWssWordH, wWssWordL);
417 }
418
VBI_Set_PalNC_VideoStandard(void)419 void VBI_Set_PalNC_VideoStandard(void)
420 {
421 HAL_VBI_WriteByte(BK_VBI_82, 0x10);
422 HAL_VBI_WriteByte(BK_VBI_83, 0xB9);
423 HAL_VBI_WriteByte(BK_VBI_89, HAL_VBI_ReadByte(BK_VBI_89)|_BIT6);
424 // for VPS
425 HAL_VBI_WriteByte(BK_VBI_89, HAL_VBI_ReadByte(BK_VBI_89)&(~(_BIT5)));
426 HAL_VBI_WriteByte(BK_VBI_99, 0x8C);
427 HAL_VBI_WriteByte(BK_VBI_9A, 0x01);
428 }
429
VBI_Set_Secam_VideoStandard(void)430 void VBI_Set_Secam_VideoStandard(void)
431 {
432 HAL_VBI_WriteByte(BK_VBI_89, HAL_VBI_ReadByte(BK_VBI_89)|(_BIT6));
433 // for VPS
434 HAL_VBI_WriteByte(BK_VBI_89, HAL_VBI_ReadByte(BK_VBI_89)|_BIT5);
435 HAL_VBI_WriteByte(BK_VBI_99, 0x6D);
436 HAL_VBI_WriteByte(BK_VBI_9A, 0x9A);
437 }
438
VBI_Set_Pal_VideoStandard(void)439 void VBI_Set_Pal_VideoStandard(void)
440 {
441 HAL_VBI_WriteByte(BK_VBI_82, 0x8E);
442 HAL_VBI_WriteByte(BK_VBI_83, 0x6B);
443 HAL_VBI_WriteByte(BK_VBI_89, HAL_VBI_ReadByte(BK_VBI_89)|_BIT6);
444 // for VPS
445 HAL_VBI_WriteByte(BK_VBI_89, HAL_VBI_ReadByte(BK_VBI_89)&(~(_BIT5)));
446 HAL_VBI_WriteByte(BK_VBI_99, 0x8C);
447 HAL_VBI_WriteByte(BK_VBI_9A, 0x01);
448 }
449
VBI_TTX_EnableInterrupt(MS_BOOL bEnable)450 void VBI_TTX_EnableInterrupt(MS_BOOL bEnable)
451 {
452 if(bEnable)
453 {
454 // TTX, VPS and WSS
455 HAL_VBI_WriteByteMask(VBI_INTERRUPT_MASK, 0, _BIT4|_BIT1|_BIT0);
456 }
457 else
458 {
459 // TTX, VPS and WSS
460 HAL_VBI_WriteByteMask(VBI_INTERRUPT_MASK, _BIT4|_BIT1|_BIT0, _BIT4|_BIT1|_BIT0);
461 }
462 }
463
VBI_TTX_ReadIRQ(void)464 MS_U8 VBI_TTX_ReadIRQ(void)
465 {
466 return HAL_VBI_ReadByte(VBI_INTERRUPT_STATUS);
467 }
468
VBI_TTX_ClearIRQ(void)469 void VBI_TTX_ClearIRQ(void)
470 {
471 HAL_VBI_WriteByteMask(VBI_INTERRUPT_CLEAR, _BIT4|_BIT1|_BIT0, _BIT4|_BIT1|_BIT0);
472 HAL_VBI_WriteByteMask(VBI_INTERRUPT_CLEAR, 0, _BIT4|_BIT1|_BIT0);
473 }
474
VBI_TTX_EnableLine(MS_U16 StartLine,MS_U16 EndLine)475 void VBI_TTX_EnableLine(MS_U16 StartLine, MS_U16 EndLine)
476 {
477 #define EVEN_FIELD_OFFSET 313
478
479 EN_VBI_FIELD eField = VBI_FIELD_ODD;
480
481 if(StartLine >= EVEN_FIELD_OFFSET)
482 eField = VBI_FIELD_EVEN;
483
484 switch(eField)
485 {
486 case VBI_FIELD_EVEN:
487 HAL_VBI_WriteByteMask(BK_VBI_7E, StartLine - EVEN_FIELD_OFFSET, 0x1F);
488 HAL_VBI_WriteByteMask(BK_VBI_7F, EndLine - EVEN_FIELD_OFFSET, 0x1F);
489 break;
490
491 case VBI_FIELD_ODD:
492 HAL_VBI_WriteByteMask(BK_VBI_7C, StartLine, 0x1F);
493 HAL_VBI_WriteByteMask(BK_VBI_7D, EndLine, 0x1F);
494 break;
495 }
496 }
497
498 MS_U8 TTX_DMA_CMD_MAPPING[]=
499 {
500 DMA_HEADER,
501 DMA_PACKET1_TO_25,
502 DMA_PACKET26_28_29,
503 DMA_PACKET27,
504 DMA_BTT,
505 DMA_AIT,
506 };
507
508 #if defined(__mips__)
_VBI_WaitDMAReady(void)509 static void _VBI_WaitDMAReady(void)
510 {
511 MS_U8 i;
512
513 for(i = 0; i<25; i++)
514 __asm__ __volatile__ ("nop");
515
516 while(1)
517 {
518 if(HAL_VBI_ReadByte(DMA_COMMAND) & DMA_READY)
519 {
520 break;
521 }
522 }
523 }
524 #elif defined(__aeon__)
_VBI_WaitDMAReady(void)525 static void _VBI_WaitDMAReady(void)
526 {
527 MS_U8 i;
528
529 for(i = 0; i<10; i++)
530 __asm__ __volatile__ ("l.nop 0");
531
532 while(1)
533 {
534 if(HAL_VBI_ReadByte(DMA_COMMAND) & DMA_READY)
535 {
536 break;
537 }
538 }
539 }
540 #elif defined(__arm__)
_VBI_WaitDMAReady(void)541 static void _VBI_WaitDMAReady(void)
542 {
543 }
544 #else
545 #error "Not support CPU!!"
546 #endif
547
VBI_TTX_DMA_CopyPacket(MS_PHYADDR src_addr,MS_PHYADDR dest_addr,MS_U8 aPacketType)548 void VBI_TTX_DMA_CopyPacket(MS_PHYADDR src_addr, MS_PHYADDR dest_addr, MS_U8 aPacketType)
549 {
550 src_addr = src_addr>>3;
551
552
553 HAL_VBI_Write2Byte(DMASRC_ADR_L, (src_addr) & 0xFFFF);
554 HAL_VBI_WriteByte(DMASRC_ADR_H, (src_addr>>16) & 0xFF);
555
556 if((src_addr>>24) & 0x01)
557 {
558 HAL_VBI_WriteByte(VBI_BIT24_ADDR, HAL_VBI_ReadByte(VBI_BIT24_ADDR)|DMASRC_ADDR24);
559 }
560 else
561 {
562 HAL_VBI_WriteByte(VBI_BIT24_ADDR, HAL_VBI_ReadByte(VBI_BIT24_ADDR)&(~DMASRC_ADDR24));
563 }
564 dest_addr = dest_addr>>3;
565 HAL_VBI_Write2Byte(DMADES_ADR_L, (dest_addr) & 0xFFFF);
566 HAL_VBI_WriteByte(DMADES_ADR_H, (dest_addr>>16) & 0xFF);
567
568 if((dest_addr>>24) & 0x01)
569 {
570 HAL_VBI_WriteByte(VBI_BIT24_ADDR, HAL_VBI_ReadByte(VBI_BIT24_ADDR)|DMADES_ADDR24);
571 }
572 else
573 {
574 HAL_VBI_WriteByte(VBI_BIT24_ADDR, HAL_VBI_ReadByte(VBI_BIT24_ADDR)&(~DMADES_ADDR24));
575 }
576 HAL_VBI_WriteByte(DMA_FUNC, TTX_DMA_CMD_MAPPING[aPacketType]); // DMA Function 05 : AIT PAGE X/1~X/22
577
578 HAL_VBI_Write2Byte(DMAQW_CNT_L, 5); // DMA Counter (64Bit)
579 HAL_VBI_WriteByte (DMA_COMMAND, DMA_FIRE); // Fire
580 _VBI_WaitDMAReady();
581 }
582
583 /******************************************************************************/
584 // API for VBI Slicer Initialization::
585 // Initializing VBI Slicer HW
586 /******************************************************************************/
VBI_CC_Init(MS_U32 u32RiuAddr,MS_PHYADDR u32Addr,MS_U16 u8Len)587 void VBI_CC_Init(MS_U32 u32RiuAddr, MS_PHYADDR u32Addr, MS_U16 u8Len)
588 {
589 MS_U8 u8Tmp;
590
591 // VBI RIU base
592 _u32VBIRiuBaseAddr = u32RiuAddr;
593
594 // U8 u8Bank; <- remove the bank change code
595 if((u32Addr >> 3) >= (1 << CC_BUF_BIT))
596 {
597 printf("[VBI][%s] ERROR, buffer address out of bound\n", __FUNCTION__);
598 //MS_ASSERT(0);
599 }
600 //reset and enable closed caption
601 // u8Bank = XBYTE[BK_SELECT_00]; <- remove the bank change code
602 // XBYTE[BK_SELECT_00] = REG_BANK_VBI; <- remove the bank change code
603 HAL_VBI_WriteByte(BK_VBI_46, 0x00); //disable VBI
604
605 /* --- setup CC Bytes buffer --- */
606 /* set cc base address */
607 //printf("\n init adr=0x%x, %d", u32Addr, u8Len);
608 u8Tmp = HAL_VBI_ReadByte(BK_VBI_1D);
609 u8Tmp &= ~(0xf0);
610 u8Tmp |= (((u32Addr >> 27)&0x0f) << 4);
611 HAL_VBI_WriteByte(BK_VBI_1D, u8Tmp); // CcBaseAddr_24, 25, 26, 27
612 HAL_VBI_WriteByte(BK_VBI_5D, (u32Addr >> 19) & 0xFF); // CcBaseAddr_23_16 (default value is 0xFF so it needs to specify to 0x00)
613 HAL_VBI_WriteByte(BK_VBI_5E, (u32Addr >> 11) & 0xFF); // CcBaseAddr_15_8 (high order)
614 HAL_VBI_WriteByte(BK_VBI_5F, (u32Addr >> 3) & 0xFF); // CCBaseAddr_7_0 (low order)
615
616 /* set cc buffer length */
617 HAL_VBI_WriteByte(BK_VBI_5C, u8Len);
618
619 // CJ
620 HAL_VBI_WriteByte(BK_AFEC_6B, HAL_VBI_ReadByte(BK_AFEC_6B) & 0xF7);
621
622 // Set a constraint for CC patterns in case of wrong encoder's behavior
623 HAL_VBI_WriteByte(BK_VBI_4A, (HAL_VBI_ReadByte(BK_VBI_4A)&0xf0)|0x03);
624
625 HAL_VBI_WriteByte(BK_VBI_46, 0x01); //enable VBI
626
627 // disable vbi software reset
628 u8Tmp = HAL_VBI_ReadByte(BK_VBI_70);
629 u8Tmp &= ~(0x08);
630 HAL_VBI_WriteByte(BK_VBI_70, u8Tmp);
631 }
632
633 /******************************************************************************/
634 /// API to turn on VBI from YPbPr Initialization::
635 /// Initializing VBI Slicer HW
636 /******************************************************************************/
VBI_CC_YPbPr_Init(MS_U8 cvbs_no)637 void VBI_CC_YPbPr_Init(MS_U8 cvbs_no)
638 {
639 // Enable VD parts
640 HAL_VBI_WriteByte(L_BK_ADC_ATOP(0x00), 0x09); // enable VD & YPbPr
641 HAL_VBI_WriteByte(L_BK_ADC_ATOP(0x02), 0xf0|cvbs_no); // (select VD_ymux for CVBS input from Y)
642 HAL_VBI_WriteByte(L_BK_ADC_ATOP(0x04), 0x00); // enable analog blocks, 04, 05
643 HAL_VBI_WriteByte(H_BK_ADC_ATOP(0x04), 0x00);
644 HAL_VBI_WriteByte(L_BK_ADC_ATOP(0x05), 0x00);
645 HAL_VBI_WriteByte(L_BK_ADC_ATOP(0x06), 0x00); // enable ADC clocks
646 HAL_VBI_WriteByte(L_BK_ADC_ATOP(0x12), 0x01); // VD pll =2X (16Fsc)
647
648 // enable VD clocks, setup VD AFEC, AFEC and VBI are just set as AV mode
649 HAL_VBI_WriteByte(H_BK_CHIPTOP(0x16), (HAL_VBI_ReadByte(H_BK_CHIPTOP(0x16)) & (0x0F)));
650 HAL_VBI_WriteByte(L_BK_CHIPTOP(0x17), 0x06);
651 }
652
653 /******************************************************************************/
654 /// API to Set CC data rate::
655 /// Set CC's data rate
656 /// @Param u8Mode \b IN video system mode
657 /// @return TRUE:: Successfully set
658 /// FALSE:: Fail
659 /******************************************************************************/
VBI_CC_DataRateSet(MS_U8 * ptable)660 MS_U8 VBI_CC_DataRateSet(MS_U8 *ptable)
661 {
662 MS_U8 j=1;
663
664 // Set the VBI registers
665 HAL_VBI_WriteByte(BK_VBI_41, ptable[j++]);
666
667 HAL_VBI_WriteByte(BK_VBI_42, HAL_VBI_ReadByte(BK_VBI_42)&0xC0);
668 HAL_VBI_WriteByte(BK_VBI_42, HAL_VBI_ReadByte(BK_VBI_42)|ptable[j++]);
669
670 HAL_VBI_WriteByte(BK_VBI_44, ptable[j++]);
671
672 HAL_VBI_WriteByte(BK_VBI_4B, HAL_VBI_ReadByte(BK_VBI_4B)&0xC0);
673 HAL_VBI_WriteByte(BK_VBI_4B, HAL_VBI_ReadByte(BK_VBI_4B)|ptable[j++]);
674
675 HAL_VBI_WriteByte(BK_VBI_4D, ptable[j++]);
676
677 HAL_VBI_WriteByte(BK_VBI_50, HAL_VBI_ReadByte(BK_VBI_50)&0xE0);
678 HAL_VBI_WriteByte(BK_VBI_50, HAL_VBI_ReadByte(BK_VBI_50)|ptable[j++]);
679
680 HAL_VBI_WriteByte(BK_VBI_51, HAL_VBI_ReadByte(BK_VBI_51)&0xE0);
681 HAL_VBI_WriteByte(BK_VBI_51, HAL_VBI_ReadByte(BK_VBI_51)|ptable[j++]);
682
683 return TRUE;
684 }
685
686 /******************************************************************************/
687 /// API to get packet count:
688 ///
689 /******************************************************************************/
VBI_CC_GetPacketCnt(void)690 MS_U8 VBI_CC_GetPacketCnt(void)
691 {
692 return (HAL_VBI_ReadByte(BK_VBI_5B)&0x1F);
693 }
694
695 /******************************************************************************/
696 /// API to get odd/even byte-found-identification:
697 /// 2 bits
698 /******************************************************************************/
VBI_CC_GetByteFoundIndication(void)699 MS_U8 VBI_CC_GetByteFoundIndication(void)
700 {
701 return ((HAL_VBI_ReadByte(BK_VBI_56)&0xC0) >> 6);
702 }
703
704 /******************************************************************************/
705 /// API to get packet data:
706 ///
707 /// @return (U32) (Odd_1st_Byte + Odd_2nd_Byte + Even_1st_Byte + Even_2nd_Byte)
708 /******************************************************************************/
VBI_CC_GetPacket(void)709 MS_U32 VBI_CC_GetPacket(void)
710 {
711 MS_U32 u32Tmp;
712
713 u32Tmp = ((MS_U32)HAL_VBI_ReadByte(BK_VBI_57)) << 24;
714 u32Tmp |= ((MS_U32)HAL_VBI_ReadByte(BK_VBI_58)) << 16;
715 u32Tmp |= ((MS_U32)HAL_VBI_ReadByte(BK_VBI_59)) << 8;
716 u32Tmp |= ((MS_U32)HAL_VBI_ReadByte(BK_VBI_5A)) << 0;
717
718 return (u32Tmp);
719 }
720
721 /******************************************************************************/
722 /// API to set CC frame count:
723 ///
724 /******************************************************************************/
VBI_SetCCFrameCnt(MS_U8 cnt)725 void VBI_SetCCFrameCnt(MS_U8 cnt)
726 {
727 MS_U8 u8Tmp=0;
728
729 u8Tmp = HAL_VBI_ReadByte(BK_VBI_46);
730 u8Tmp &= ~(_BIT1 | _BIT2 | _BIT3 | _BIT4 | _BIT5);
731 u8Tmp |= ((cnt&0x1F) << 1);
732
733 HAL_VBI_WriteByte(BK_VBI_46, u8Tmp);
734 }
735
736 /******************************************************************************/
737 /// API to enable CC slicer:
738 ///
739 /******************************************************************************/
VBI_CC_EnableSlicer(MS_BOOL bEnable)740 void VBI_CC_EnableSlicer(MS_BOOL bEnable)
741 {
742 if(bEnable)
743 {
744 HAL_VBI_WriteByte(BK_VBI_46, HAL_VBI_ReadByte(BK_VBI_46) | _BIT0);
745 }
746 else
747 {
748 HAL_VBI_WriteByte(BK_VBI_46, HAL_VBI_ReadByte(BK_VBI_46) & 0xFE);
749 }
750 }
751
VBI_CC_SetCCLine(MS_U16 StartLine,MS_U16 EndLine,MS_U8 val)752 void VBI_CC_SetCCLine(MS_U16 StartLine, MS_U16 EndLine, MS_U8 val) // val -> 0:NTSC, 1:PAL
753 {
754 #define CC_EVEN_FIELD_OFFSET 263 // (525 / 2 + 1)
755 #define VBI_CC_NTSC_LINE_OFFSET 3
756 #define VBI_CC_NTSC_DEFAULT_LINE 21
757
758 EN_VBI_FIELD eField = VBI_FIELD_ODD;
759 MS_U8 u8Tmp;
760
761 if(StartLine >= CC_EVEN_FIELD_OFFSET)
762 eField = VBI_FIELD_EVEN;
763
764 if(val == 0)
765 {
766 val = VBI_CC_NTSC_LINE_OFFSET; // offset
767 }
768 else
769 {
770 val = 0; // offset
771 }
772
773 switch(eField)
774 {
775 case VBI_FIELD_EVEN:
776 HAL_VBI_WriteByteMask(BK_VBI_50, (StartLine - CC_EVEN_FIELD_OFFSET), 0x1F);
777 HAL_VBI_WriteByteMask(BK_VBI_51, (EndLine - CC_EVEN_FIELD_OFFSET), 0x1F);
778 break;
779
780 case VBI_FIELD_ODD:
781
782 // start line
783 u8Tmp = HAL_VBI_ReadByte(BK_VBI_40);
784 u8Tmp &= ~(_BIT4 | _BIT5);
785 u8Tmp |= ((StartLine & 0x18) << 1);
786 HAL_VBI_WriteByteMask(BK_VBI_40, u8Tmp, 0x30);
787
788 u8Tmp = HAL_VBI_ReadByte(BK_VBI_41);
789 u8Tmp &= ~(_BIT5 | _BIT6 | _BIT7);
790 u8Tmp |= ((StartLine & 0x07) << 5);
791 HAL_VBI_WriteByteMask(BK_VBI_41, u8Tmp, 0xE0);
792
793 // end line
794 HAL_VBI_WriteByteMask(BK_VBI_41, EndLine, 0x1F);
795 break;
796 }
797 }
798 /******************************************************************************/
799 /// API to set CC SC window length
800 ///
801 /******************************************************************************/
VBI_CC_SetSCWindowLen(MS_U8 u8Len)802 MS_BOOL VBI_CC_SetSCWindowLen(MS_U8 u8Len)
803 {
804 HAL_VBI_WriteByte(BK_VBI_53, u8Len);
805 return TRUE;
806 }
807 /******************************************************************************/
808 /// API to set WSS VPS byte number:
809 ///
810 /******************************************************************************/
VBI_SetWssVpsByteNum(MS_U8 cnt)811 void VBI_SetWssVpsByteNum(MS_U8 cnt)
812 {
813 MS_U8 u8Tmp=0;
814
815 u8Tmp = HAL_VBI_ReadByte(BK_VBI_B8);
816 u8Tmp &= ~(_BIT0 | _BIT1 | _BIT2 | _BIT3);
817 u8Tmp |= (cnt&0x0f);
818
819 HAL_VBI_WriteByte(BK_VBI_B8, u8Tmp);
820 }
821
822 /******************************************************************************/
823 /// API to enable memory protect (the memory range vbi can access)
824 ///
825 /******************************************************************************/
VBI_ProtectMemory(MS_BOOL bEnable,MS_PHYADDR phyAddr,MS_U32 u32Size)826 MS_BOOL VBI_ProtectMemory(MS_BOOL bEnable, MS_PHYADDR phyAddr, MS_U32 u32Size)
827 {
828 MS_U32 u32MiuAddr = (MS_U32)phyAddr >> 3;
829 MS_U32 u32MiuAddrMax = ( ( (MS_U32)phyAddr + u32Size ) >> 3 );
830 if(bEnable)
831 {
832 HAL_VBI_WriteByte(BK_VBI_DE, u32MiuAddr & 0xFF);
833 HAL_VBI_WriteByte(BK_VBI_DF, (u32MiuAddr >> 8) & 0xFF);
834 HAL_VBI_WriteByte(BK_VBI_E0, (u32MiuAddr >> 16) & 0xFF);
835
836 HAL_VBI_WriteByte(BK_VBI_E1, u32MiuAddrMax & 0xFF);
837 HAL_VBI_WriteByte(BK_VBI_E2, (u32MiuAddrMax >> 8) & 0xFF);
838 HAL_VBI_WriteByte(BK_VBI_E3, (u32MiuAddrMax >> 16) & 0xFF);
839
840 #if BK_VBI_E7_BUG
841 HAL_VBI_WriteWord(BK_VBI_E6, ( (u32MiuAddr >> 24) & 0x0F ) |
842 ( ( (u32MiuAddrMax >> 24) & 0x0F ) << 4));
843 #else
844 HAL_VBI_WriteByte(BK_VBI_E7, ( (u32MiuAddr >> 24) & 0x0F ) |
845 ( ( (u32MiuAddrMax >> 24) & 0x0F ) << 4));
846 #endif
847 HAL_VBI_WriteByteMask(BK_VBI_E4, _BIT1, _BIT1);
848 }
849 else
850 {
851 HAL_VBI_WriteByteMask(BK_VBI_E4, 0, _BIT1);
852 }
853
854 return TRUE;
855 }
856 #undef _HAL_VBI_C
857