xref: /utopia/UTPA2-700.0.x/modules/vd/hal/maxim/avd/regAVD.h (revision 53ee8cc121a030b8d368113ac3e966b4705770ef)
1 //<MStar Software>
2 //******************************************************************************
3 // MStar Software
4 // Copyright (c) 2010 - 2012 MStar Semiconductor, Inc. All rights reserved.
5 // All software, firmware and related documentation herein ("MStar Software") are
6 // intellectual property of MStar Semiconductor, Inc. ("MStar") and protected by
7 // law, including, but not limited to, copyright law and international treaties.
8 // Any use, modification, reproduction, retransmission, or republication of all
9 // or part of MStar Software is expressly prohibited, unless prior written
10 // permission has been granted by MStar.
11 //
12 // By accessing, browsing and/or using MStar Software, you acknowledge that you
13 // have read, understood, and agree, to be bound by below terms ("Terms") and to
14 // comply with all applicable laws and regulations:
15 //
16 // 1. MStar shall retain any and all right, ownership and interest to MStar
17 //    Software and any modification/derivatives thereof.
18 //    No right, ownership, or interest to MStar Software and any
19 //    modification/derivatives thereof is transferred to you under Terms.
20 //
21 // 2. You understand that MStar Software might include, incorporate or be
22 //    supplied together with third party`s software and the use of MStar
23 //    Software may require additional licenses from third parties.
24 //    Therefore, you hereby agree it is your sole responsibility to separately
25 //    obtain any and all third party right and license necessary for your use of
26 //    such third party`s software.
27 //
28 // 3. MStar Software and any modification/derivatives thereof shall be deemed as
29 //    MStar`s confidential information and you agree to keep MStar`s
30 //    confidential information in strictest confidence and not disclose to any
31 //    third party.
32 //
33 // 4. MStar Software is provided on an "AS IS" basis without warranties of any
34 //    kind. Any warranties are hereby expressly disclaimed by MStar, including
35 //    without limitation, any warranties of merchantability, non-infringement of
36 //    intellectual property rights, fitness for a particular purpose, error free
37 //    and in conformity with any international standard.  You agree to waive any
38 //    claim against MStar for any loss, damage, cost or expense that you may
39 //    incur related to your use of MStar Software.
40 //    In no event shall MStar be liable for any direct, indirect, incidental or
41 //    consequential damages, including without limitation, lost of profit or
42 //    revenues, lost or damage of data, and unauthorized system use.
43 //    You agree that this Section 4 shall still apply without being affected
44 //    even if MStar Software has been modified by MStar in accordance with your
45 //    request or instruction for your use, except otherwise agreed by both
46 //    parties in writing.
47 //
48 // 5. If requested, MStar may from time to time provide technical supports or
49 //    services in relation with MStar Software to you for your use of
50 //    MStar Software in conjunction with your or your customer`s product
51 //    ("Services").
52 //    You understand and agree that, except otherwise agreed by both parties in
53 //    writing, Services are provided on an "AS IS" basis and the warranty
54 //    disclaimer set forth in Section 4 above shall apply.
55 //
56 // 6. Nothing contained herein shall be construed as by implication, estoppels
57 //    or otherwise:
58 //    (a) conferring any license or right to use MStar name, trademark, service
59 //        mark, symbol or any other identification;
60 //    (b) obligating MStar or any of its affiliates to furnish any person,
61 //        including without limitation, you and your customers, any assistance
62 //        of any kind whatsoever, or any information; or
63 //    (c) conferring any license or right under any intellectual property right.
64 //
65 // 7. These terms shall be governed by and construed in accordance with the laws
66 //    of Taiwan, R.O.C., excluding its conflict of law rules.
67 //    Any and all dispute arising out hereof or related hereto shall be finally
68 //    settled by arbitration referred to the Chinese Arbitration Association,
69 //    Taipei in accordance with the ROC Arbitration Law and the Arbitration
70 //    Rules of the Association by three (3) arbitrators appointed in accordance
71 //    with the said Rules.
72 //    The place of arbitration shall be in Taipei, Taiwan and the language shall
73 //    be English.
74 //    The arbitration award shall be final and binding to both parties.
75 //
76 //******************************************************************************
77 //<MStar Software>
78 ////////////////////////////////////////////////////////////////////////////////
79 //
80 // Copyright (c) 2008-2009 MStar Semiconductor, Inc.
81 // All rights reserved.
82 //
83 // Unless otherwise stipulated in writing, any and all information contained
84 // herein regardless in any format shall remain the sole proprietary of
85 // MStar Semiconductor Inc. and be kept in strict confidence
86 // ("MStar Confidential Information") by the recipient.
87 // Any unauthorized act including without limitation unauthorized disclosure,
88 // copying, use, reproduction, sale, distribution, modification, disassembling,
89 // reverse engineering and compiling of the contents of MStar Confidential
90 // Information is unlawful and strictly prohibited. MStar hereby reserves the
91 // rights to any and all damages, losses, costs and expenses resulting therefrom.
92 //
93 ////////////////////////////////////////////////////////////////////////////////
94 
95 #ifndef _REG_AVD_H_
96 #define _REG_AVD_H_
97 
98 
99 //-------------------------------------------------------------------------------------------------
100 //  Hardware Capability
101 //-------------------------------------------------------------------------------------------------
102 
103 
104 //-------------------------------------------------------------------------------------------------
105 //  Macro and Define
106 //-------------------------------------------------------------------------------------------------
107 // Base address should be initial.
108 #if defined (__aeon__)          // Non-OS
109     #define BASEADDR_RIU 0xA0000000UL
110 //#elif ( OS_TYPE == linux )    // Linux
111 //    #define RIU_BASE u32RegOSBase    // MDrv_MIOMap_GetBASE(u32RegOSBase, puSize, MAP_NONPM_BANK)
112 #else                           // ecos
113     #define BASEADDR_RIU 0xBF800000UL
114 #endif
115 
116 #define CLKGEN0_REG_BASE            0x0B00UL  // 0x1E00 - 0x1EFF
117 #define CHIP_REG_BASE               0x1E00UL  // 0x1E00 - 0x1EFF
118 #define ADC_ATOP_REG_BASE           0x2500UL  // 0x2500 - 0x25FF
119 #define ADC_DTOP_REG_BASE           0x2600UL  // 0x2600 - 0x26EF
120 #define AFEC_REG_BASE               0x3500UL  // 0x3500 - 0x35FF
121 #define MIIC_REG_BASE               0x3400UL //0x3400 - 0x34FF
122 #define COMB_REG_BASE               0x3600UL  // 0x3600 - 0x36FF
123 #define VBI_REG_BASE                0x3700UL  // 0x3700 - 0x37FF
124 #define SCM_REG_BASE                0x3800UL  // 0x3800 - 0x38FF
125 
126 #define BK_REG_L( x, y )            ((x) | (((y) << 1)))
127 #define BK_REG_H( x, y )            (((x) | (((y) << 1))) + 1)
128 
129 /* Clkgen0 */
130 #define L_BK_CLKGEN0(x)     BK_REG_L(CLKGEN0_REG_BASE, x)
131 #define H_BK_CLKGEN0(x)     BK_REG_H(CLKGEN0_REG_BASE, x)
132 
133 /* Chip Top */
134 #define L_BK_CHIPTOP(x)     BK_REG_L(CHIP_REG_BASE, x)
135 #define H_BK_CHIPTOP(x)     BK_REG_H(CHIP_REG_BASE, x)
136 
137 /* ADC */
138 #define L_BK_ADC_ATOP(x)    BK_REG_L(ADC_ATOP_REG_BASE, x)
139 #define H_BK_ADC_ATOP(x)    BK_REG_H(ADC_ATOP_REG_BASE, x)
140 #define L_BK_ADC_DTOP(x)    BK_REG_L(ADC_DTOP_REG_BASE, x)
141 #define H_BK_ADC_DTOP(x)    BK_REG_H(ADC_DTOP_REG_BASE, x)
142 // Register access utility
143 //#define TEMP_OR(addr, val)          TEMP_WRITE(addr, TEMP_READ(addr) | (val))
144 //#define TEMP_AND(addr, val)         TEMP_WRITE(addr, TEMP_READ(addr) & (val))
145 //#define TEMP_XOR(addr, val)         TEMP_WRITE(addr, TEMP_READ(addr) ^ (val))
146 
147 ///////////////////////////////////////////////////////
148 // AFEC bank
149 ///////////////////////////////////////////////////////
150 #define BK_AFEC_01  (AFEC_REG_BASE+0x01)
151 #define BK_AFEC_02  (AFEC_REG_BASE+0x02)
152 #define BK_AFEC_03  (AFEC_REG_BASE+0x03)
153 #define BK_AFEC_04  (AFEC_REG_BASE+0x04)
154 #define BK_AFEC_05  (AFEC_REG_BASE+0x05)
155 #define BK_AFEC_06  (AFEC_REG_BASE+0x06)
156 #define BK_AFEC_07  (AFEC_REG_BASE+0x07)
157 #define BK_AFEC_08  (AFEC_REG_BASE+0x08)
158 #define BK_AFEC_09  (AFEC_REG_BASE+0x09)
159 #define BK_AFEC_0A  (AFEC_REG_BASE+0x0A)
160 #define BK_AFEC_0B  (AFEC_REG_BASE+0x0B)
161 #define BK_AFEC_0C  (AFEC_REG_BASE+0x0C)
162 #define BK_AFEC_0D  (AFEC_REG_BASE+0x0D)
163 #define BK_AFEC_0E  (AFEC_REG_BASE+0x0E)
164 #define BK_AFEC_0F  (AFEC_REG_BASE+0x0F)
165 #define BK_AFEC_10  (AFEC_REG_BASE+0x10)
166 #define BK_AFEC_11  (AFEC_REG_BASE+0x11)
167 #define BK_AFEC_12  (AFEC_REG_BASE+0x12)
168 #define BK_AFEC_13  (AFEC_REG_BASE+0x13)
169 #define BK_AFEC_14  (AFEC_REG_BASE+0x14)
170 #define BK_AFEC_15  (AFEC_REG_BASE+0x15)
171 #define BK_AFEC_16  (AFEC_REG_BASE+0x16)
172 #define BK_AFEC_17  (AFEC_REG_BASE+0x17)
173 #define BK_AFEC_18  (AFEC_REG_BASE+0x18)
174 #define BK_AFEC_19  (AFEC_REG_BASE+0x19)
175 #define BK_AFEC_1A  (AFEC_REG_BASE+0x1A)
176 #define BK_AFEC_1B  (AFEC_REG_BASE+0x1B)
177 #define BK_AFEC_1C  (AFEC_REG_BASE+0x1C)
178 #define BK_AFEC_1D  (AFEC_REG_BASE+0x1D)
179 #define BK_AFEC_1E  (AFEC_REG_BASE+0x1E)
180 #define BK_AFEC_1F  (AFEC_REG_BASE+0x1F)
181 #define BK_AFEC_20  (AFEC_REG_BASE+0x20)
182 #define BK_AFEC_21  (AFEC_REG_BASE+0x21)
183 #define BK_AFEC_22  (AFEC_REG_BASE+0x22)
184 #define BK_AFEC_23  (AFEC_REG_BASE+0x23)
185 #define BK_AFEC_24  (AFEC_REG_BASE+0x24)
186 #define BK_AFEC_25  (AFEC_REG_BASE+0x25)
187 #define BK_AFEC_26  (AFEC_REG_BASE+0x26)
188 #define BK_AFEC_27  (AFEC_REG_BASE+0x27)
189 #define BK_AFEC_28  (AFEC_REG_BASE+0x28)
190 #define BK_AFEC_29  (AFEC_REG_BASE+0x29)
191 #define BK_AFEC_2A  (AFEC_REG_BASE+0x2A)
192 #define BK_AFEC_2B  (AFEC_REG_BASE+0x2B)
193 #define BK_AFEC_2C  (AFEC_REG_BASE+0x2C)
194 #define BK_AFEC_2D  (AFEC_REG_BASE+0x2D)
195 #define BK_AFEC_2E  (AFEC_REG_BASE+0x2E)
196 #define BK_AFEC_2F  (AFEC_REG_BASE+0x2F)
197 #define BK_AFEC_30  (AFEC_REG_BASE+0x30)
198 #define BK_AFEC_31  (AFEC_REG_BASE+0x31)
199 #define BK_AFEC_32  (AFEC_REG_BASE+0x32)
200 #define BK_AFEC_33  (AFEC_REG_BASE+0x33)
201 #define BK_AFEC_34  (AFEC_REG_BASE+0x34)
202 #define BK_AFEC_35  (AFEC_REG_BASE+0x35)
203 #define BK_AFEC_36  (AFEC_REG_BASE+0x36)
204 #define BK_AFEC_37  (AFEC_REG_BASE+0x37)
205 #define BK_AFEC_38  (AFEC_REG_BASE+0x38)
206 #define BK_AFEC_39  (AFEC_REG_BASE+0x39)
207 #define BK_AFEC_3A  (AFEC_REG_BASE+0x3A)
208 #define BK_AFEC_3B  (AFEC_REG_BASE+0x3B)
209 #define BK_AFEC_3C  (AFEC_REG_BASE+0x3C)
210 #define BK_AFEC_3D  (AFEC_REG_BASE+0x3D)
211 #define BK_AFEC_3E  (AFEC_REG_BASE+0x3E)
212 #define BK_AFEC_3F  (AFEC_REG_BASE+0x3F)
213 #define BK_AFEC_40  (AFEC_REG_BASE+0x40)
214 #define BK_AFEC_41  (AFEC_REG_BASE+0x41)
215 #define BK_AFEC_42  (AFEC_REG_BASE+0x42)
216 #define BK_AFEC_43  (AFEC_REG_BASE+0x43)
217 #define BK_AFEC_44  (AFEC_REG_BASE+0x44)
218 #define BK_AFEC_45  (AFEC_REG_BASE+0x45)
219 #define BK_AFEC_46  (AFEC_REG_BASE+0x46)
220 #define BK_AFEC_47  (AFEC_REG_BASE+0x47)
221 #define BK_AFEC_48  (AFEC_REG_BASE+0x48)
222 #define BK_AFEC_49  (AFEC_REG_BASE+0x49)
223 #define BK_AFEC_4A  (AFEC_REG_BASE+0x4A)
224 #define BK_AFEC_4B  (AFEC_REG_BASE+0x4B)
225 #define BK_AFEC_4C  (AFEC_REG_BASE+0x4C)
226 #define BK_AFEC_4D  (AFEC_REG_BASE+0x4D)
227 #define BK_AFEC_4E  (AFEC_REG_BASE+0x4E)
228 #define BK_AFEC_4F  (AFEC_REG_BASE+0x4F)
229 #define BK_AFEC_50  (AFEC_REG_BASE+0x50)
230 #define BK_AFEC_51  (AFEC_REG_BASE+0x51)
231 #define BK_AFEC_52  (AFEC_REG_BASE+0x52)
232 #define BK_AFEC_53  (AFEC_REG_BASE+0x53)
233 #define BK_AFEC_54  (AFEC_REG_BASE+0x54)
234 #define BK_AFEC_55  (AFEC_REG_BASE+0x55)
235 #define BK_AFEC_56  (AFEC_REG_BASE+0x56)
236 #define BK_AFEC_57  (AFEC_REG_BASE+0x57)
237 #define BK_AFEC_58  (AFEC_REG_BASE+0x58)
238 #define BK_AFEC_59  (AFEC_REG_BASE+0x59)
239 #define BK_AFEC_5A  (AFEC_REG_BASE+0x5A)
240 #define BK_AFEC_5B  (AFEC_REG_BASE+0x5B)
241 #define BK_AFEC_5C  (AFEC_REG_BASE+0x5C)
242 #define BK_AFEC_5D  (AFEC_REG_BASE+0x5D)
243 #define BK_AFEC_5E  (AFEC_REG_BASE+0x5E)
244 #define BK_AFEC_5F  (AFEC_REG_BASE+0x5F)
245 #define BK_AFEC_60  (AFEC_REG_BASE+0x60)
246 #define BK_AFEC_61  (AFEC_REG_BASE+0x61)
247 #define BK_AFEC_62  (AFEC_REG_BASE+0x62)
248 #define BK_AFEC_63  (AFEC_REG_BASE+0x63)
249 #define BK_AFEC_64  (AFEC_REG_BASE+0x64)
250 #define BK_AFEC_65  (AFEC_REG_BASE+0x65)
251 #define BK_AFEC_66  (AFEC_REG_BASE+0x66)
252 #define BK_AFEC_67  (AFEC_REG_BASE+0x67)
253 #define BK_AFEC_68  (AFEC_REG_BASE+0x68)
254 #define BK_AFEC_69  (AFEC_REG_BASE+0x69)
255 #define BK_AFEC_6A  (AFEC_REG_BASE+0x6A)
256 #define BK_AFEC_6B  (AFEC_REG_BASE+0x6B)
257 #define BK_AFEC_6C  (AFEC_REG_BASE+0x6C)
258 #define BK_AFEC_6D  (AFEC_REG_BASE+0x6D)
259 #define BK_AFEC_6E  (AFEC_REG_BASE+0x6E)
260 #define BK_AFEC_6F  (AFEC_REG_BASE+0x6F)
261 #define BK_AFEC_70  (AFEC_REG_BASE+0x70)
262 #define BK_AFEC_71  (AFEC_REG_BASE+0x71)
263 #define BK_AFEC_72  (AFEC_REG_BASE+0x72)
264 #define BK_AFEC_73  (AFEC_REG_BASE+0x73)
265 #define BK_AFEC_74  (AFEC_REG_BASE+0x74)
266 #define BK_AFEC_75  (AFEC_REG_BASE+0x75)
267 #define BK_AFEC_76  (AFEC_REG_BASE+0x76)
268 #define BK_AFEC_77  (AFEC_REG_BASE+0x77)
269 #define BK_AFEC_78  (AFEC_REG_BASE+0x78)
270 #define BK_AFEC_79  (AFEC_REG_BASE+0x79)
271 #define BK_AFEC_7A  (AFEC_REG_BASE+0x7A)
272 #define BK_AFEC_7B  (AFEC_REG_BASE+0x7B)
273 #define BK_AFEC_7C  (AFEC_REG_BASE+0x7C)
274 #define BK_AFEC_7D  (AFEC_REG_BASE+0x7D)
275 #define BK_AFEC_7E  (AFEC_REG_BASE+0x7E)
276 #define BK_AFEC_7F  (AFEC_REG_BASE+0x7F)
277 #define BK_AFEC_80  (AFEC_REG_BASE+0x80)
278 #define BK_AFEC_81  (AFEC_REG_BASE+0x81)
279 #define BK_AFEC_82  (AFEC_REG_BASE+0x82)
280 #define BK_AFEC_83  (AFEC_REG_BASE+0x83)
281 #define BK_AFEC_84  (AFEC_REG_BASE+0x84)
282 #define BK_AFEC_85  (AFEC_REG_BASE+0x85)
283 #define BK_AFEC_86  (AFEC_REG_BASE+0x86)
284 #define BK_AFEC_87  (AFEC_REG_BASE+0x87)
285 #define BK_AFEC_88  (AFEC_REG_BASE+0x88)
286 #define BK_AFEC_89  (AFEC_REG_BASE+0x89)
287 #define BK_AFEC_8A  (AFEC_REG_BASE+0x8A)
288 #define BK_AFEC_8B  (AFEC_REG_BASE+0x8B)
289 #define BK_AFEC_8C  (AFEC_REG_BASE+0x8C)
290 #define BK_AFEC_8D  (AFEC_REG_BASE+0x8D)
291 #define BK_AFEC_8E  (AFEC_REG_BASE+0x8E)
292 #define BK_AFEC_8F  (AFEC_REG_BASE+0x8F)
293 #define BK_AFEC_90  (AFEC_REG_BASE+0x90)
294 #define BK_AFEC_91  (AFEC_REG_BASE+0x91)
295 #define BK_AFEC_92  (AFEC_REG_BASE+0x92)
296 #define BK_AFEC_93  (AFEC_REG_BASE+0x93)
297 #define BK_AFEC_94  (AFEC_REG_BASE+0x94)
298 #define BK_AFEC_95  (AFEC_REG_BASE+0x95)
299 #define BK_AFEC_96  (AFEC_REG_BASE+0x96)
300 #define BK_AFEC_97  (AFEC_REG_BASE+0x97)
301 #define BK_AFEC_98  (AFEC_REG_BASE+0x98)
302 #define BK_AFEC_99  (AFEC_REG_BASE+0x99)
303 #define BK_AFEC_9A  (AFEC_REG_BASE+0x9A)
304 #define BK_AFEC_9B  (AFEC_REG_BASE+0x9B)
305 #define BK_AFEC_9C  (AFEC_REG_BASE+0x9C)
306 #define BK_AFEC_9D  (AFEC_REG_BASE+0x9D)
307 #define BK_AFEC_9E  (AFEC_REG_BASE+0x9E)
308 #define BK_AFEC_9F  (AFEC_REG_BASE+0x9F)
309 #define BK_AFEC_A0  (AFEC_REG_BASE+0xA0)
310 #define BK_AFEC_A1  (AFEC_REG_BASE+0xA1)
311 #define BK_AFEC_A2  (AFEC_REG_BASE+0xA2)
312 #define BK_AFEC_A3  (AFEC_REG_BASE+0xA3)
313 #define BK_AFEC_A4  (AFEC_REG_BASE+0xA4)
314 #define BK_AFEC_A5  (AFEC_REG_BASE+0xA5)
315 #define BK_AFEC_A6  (AFEC_REG_BASE+0xA6)
316 #define BK_AFEC_A7  (AFEC_REG_BASE+0xA7)
317 #define BK_AFEC_A8  (AFEC_REG_BASE+0xA8)
318 #define BK_AFEC_A9  (AFEC_REG_BASE+0xA9)
319 #define BK_AFEC_AA  (AFEC_REG_BASE+0xAA)
320 #define BK_AFEC_AB  (AFEC_REG_BASE+0xAB)
321 #define BK_AFEC_AC  (AFEC_REG_BASE+0xAC)
322 #define BK_AFEC_AD  (AFEC_REG_BASE+0xAD)
323 #define BK_AFEC_AE  (AFEC_REG_BASE+0xAE)
324 #define BK_AFEC_AF  (AFEC_REG_BASE+0xAF)
325 #define BK_AFEC_B0  (AFEC_REG_BASE+0xB0)
326 #define BK_AFEC_B1  (AFEC_REG_BASE+0xB1)
327 #define BK_AFEC_B2  (AFEC_REG_BASE+0xB2)
328 #define BK_AFEC_B3  (AFEC_REG_BASE+0xB3)
329 #define BK_AFEC_B4  (AFEC_REG_BASE+0xB4)
330 #define BK_AFEC_B5  (AFEC_REG_BASE+0xB5)
331 #define BK_AFEC_B6  (AFEC_REG_BASE+0xB6)
332 #define BK_AFEC_B7  (AFEC_REG_BASE+0xB7)
333 #define BK_AFEC_B8  (AFEC_REG_BASE+0xB8)
334 #define BK_AFEC_B9  (AFEC_REG_BASE+0xB9)
335 #define BK_AFEC_BA  (AFEC_REG_BASE+0xBA)
336 #define BK_AFEC_BB  (AFEC_REG_BASE+0xBB)
337 #define BK_AFEC_BC  (AFEC_REG_BASE+0xBC)
338 #define BK_AFEC_BD  (AFEC_REG_BASE+0xBD)
339 #define BK_AFEC_BE  (AFEC_REG_BASE+0xBE)
340 #define BK_AFEC_BF  (AFEC_REG_BASE+0xBF)
341 #define BK_AFEC_C0  (AFEC_REG_BASE+0xC0)
342 #define BK_AFEC_C1  (AFEC_REG_BASE+0xC1)
343 #define BK_AFEC_C2  (AFEC_REG_BASE+0xC2)
344 #define BK_AFEC_C3  (AFEC_REG_BASE+0xC3)
345 #define BK_AFEC_C4  (AFEC_REG_BASE+0xC4)
346 #define BK_AFEC_C5  (AFEC_REG_BASE+0xC5)
347 #define BK_AFEC_C6  (AFEC_REG_BASE+0xC6)
348 #define BK_AFEC_C7  (AFEC_REG_BASE+0xC7)
349 #define BK_AFEC_C8  (AFEC_REG_BASE+0xC8)
350 #define BK_AFEC_C9  (AFEC_REG_BASE+0xC9)
351 #define BK_AFEC_CA  (AFEC_REG_BASE+0xCA)
352 #define BK_AFEC_CB  (AFEC_REG_BASE+0xCB)
353 #define BK_AFEC_CC  (AFEC_REG_BASE+0xCC)
354 #define BK_AFEC_CD  (AFEC_REG_BASE+0xCD)
355 #define BK_AFEC_CE  (AFEC_REG_BASE+0xCE)
356 #define BK_AFEC_CF  (AFEC_REG_BASE+0xCF)
357 #define BK_AFEC_D0  (AFEC_REG_BASE+0xD0)
358 #define BK_AFEC_D1  (AFEC_REG_BASE+0xD1)
359 #define BK_AFEC_D2  (AFEC_REG_BASE+0xD2)
360 #define BK_AFEC_D3  (AFEC_REG_BASE+0xD3)
361 #define BK_AFEC_D4  (AFEC_REG_BASE+0xD4)
362 #define BK_AFEC_D5  (AFEC_REG_BASE+0xD5)
363 #define BK_AFEC_D6  (AFEC_REG_BASE+0xD6)
364 #define BK_AFEC_D7  (AFEC_REG_BASE+0xD7)
365 #define BK_AFEC_D8  (AFEC_REG_BASE+0xD8)
366 #define BK_AFEC_D9  (AFEC_REG_BASE+0xD9)
367 #define BK_AFEC_DA  (AFEC_REG_BASE+0xDA)
368 #define BK_AFEC_DB  (AFEC_REG_BASE+0xDB)
369 #define BK_AFEC_DC  (AFEC_REG_BASE+0xDC)
370 #define BK_AFEC_DD  (AFEC_REG_BASE+0xDD)
371 #define BK_AFEC_DE  (AFEC_REG_BASE+0xDE)
372 #define BK_AFEC_DF  (AFEC_REG_BASE+0xDF)
373 #define BK_AFEC_E0  (AFEC_REG_BASE+0xE0)
374 #define BK_AFEC_E1  (AFEC_REG_BASE+0xE1)
375 #define BK_AFEC_E2  (AFEC_REG_BASE+0xE2)
376 #define BK_AFEC_E3  (AFEC_REG_BASE+0xE3)
377 #define BK_AFEC_E4  (AFEC_REG_BASE+0xE4)
378 #define BK_AFEC_E5  (AFEC_REG_BASE+0xE5)
379 #define BK_AFEC_E6  (AFEC_REG_BASE+0xE6)
380 #define BK_AFEC_E7  (AFEC_REG_BASE+0xE7)
381 #define BK_AFEC_E8  (AFEC_REG_BASE+0xE8)
382 #define BK_AFEC_E9  (AFEC_REG_BASE+0xE9)
383 #define BK_AFEC_EA  (AFEC_REG_BASE+0xEA)
384 #define BK_AFEC_EB  (AFEC_REG_BASE+0xEB)
385 #define BK_AFEC_EC  (AFEC_REG_BASE+0xEC)
386 #define BK_AFEC_ED  (AFEC_REG_BASE+0xED)
387 #define BK_AFEC_EE  (AFEC_REG_BASE+0xEE)
388 #define BK_AFEC_EF  (AFEC_REG_BASE+0xEF)
389 #define BK_AFEC_F0  (AFEC_REG_BASE+0xF0)
390 #define BK_AFEC_F1  (AFEC_REG_BASE+0xF1)
391 #define BK_AFEC_F2  (AFEC_REG_BASE+0xF2)
392 #define BK_AFEC_F3  (AFEC_REG_BASE+0xF3)
393 #define BK_AFEC_F4  (AFEC_REG_BASE+0xF4)
394 #define BK_AFEC_F5  (AFEC_REG_BASE+0xF5)
395 #define BK_AFEC_F6  (AFEC_REG_BASE+0xF6)
396 #define BK_AFEC_F7  (AFEC_REG_BASE+0xF7)
397 #define BK_AFEC_F8  (AFEC_REG_BASE+0xF8)
398 #define BK_AFEC_F9  (AFEC_REG_BASE+0xF9)
399 #define BK_AFEC_FA  (AFEC_REG_BASE+0xFA)
400 #define BK_AFEC_FB  (AFEC_REG_BASE+0xFB)
401 #define BK_AFEC_FC  (AFEC_REG_BASE+0xFC)
402 #define BK_AFEC_FD  (AFEC_REG_BASE+0xFD)
403 #define BK_AFEC_FE  (AFEC_REG_BASE+0xFE)
404 #define BK_AFEC_FF  (AFEC_REG_BASE+0xFF)
405 
406 
407 ////////////////////////////////////////////////////////////////////////////////
408 // Comb filter bank
409 ////////////////////////////////////////////////////////////////////////////////
410 
411 #define BK_COMB_01  (COMB_REG_BASE+0x01)
412 #define BK_COMB_02  (COMB_REG_BASE+0x02)
413 #define BK_COMB_03  (COMB_REG_BASE+0x03)
414 #define BK_COMB_04  (COMB_REG_BASE+0x04)
415 #define BK_COMB_05  (COMB_REG_BASE+0x05)
416 #define BK_COMB_06  (COMB_REG_BASE+0x06)
417 #define BK_COMB_07  (COMB_REG_BASE+0x07)
418 #define BK_COMB_08  (COMB_REG_BASE+0x08)
419 #define BK_COMB_09  (COMB_REG_BASE+0x09)
420 #define BK_COMB_0A  (COMB_REG_BASE+0x0A)
421 #define BK_COMB_0B  (COMB_REG_BASE+0x0B)
422 #define BK_COMB_0C  (COMB_REG_BASE+0x0C)
423 #define BK_COMB_0D  (COMB_REG_BASE+0x0D)
424 #define BK_COMB_0E  (COMB_REG_BASE+0x0E)
425 #define BK_COMB_0F  (COMB_REG_BASE+0x0F)
426 #define BK_COMB_10  (COMB_REG_BASE+0x10)
427 #define BK_COMB_11  (COMB_REG_BASE+0x11)
428 #define BK_COMB_12  (COMB_REG_BASE+0x12)
429 #define BK_COMB_13  (COMB_REG_BASE+0x13)
430 #define BK_COMB_14  (COMB_REG_BASE+0x14)
431 #define BK_COMB_15  (COMB_REG_BASE+0x15)
432 #define BK_COMB_16  (COMB_REG_BASE+0x16)
433 #define BK_COMB_17  (COMB_REG_BASE+0x17)
434 #define BK_COMB_18  (COMB_REG_BASE+0x18)
435 #define BK_COMB_19  (COMB_REG_BASE+0x19)
436 #define BK_COMB_1A  (COMB_REG_BASE+0x1A)
437 #define BK_COMB_1B  (COMB_REG_BASE+0x1B)
438 #define BK_COMB_1C  (COMB_REG_BASE+0x1C)
439 #define BK_COMB_1D  (COMB_REG_BASE+0x1D)
440 #define BK_COMB_1E  (COMB_REG_BASE+0x1E)
441 #define BK_COMB_1F  (COMB_REG_BASE+0x1F)
442 #define BK_COMB_20  (COMB_REG_BASE+0x20)
443 #define BK_COMB_21  (COMB_REG_BASE+0x21)
444 #define BK_COMB_22  (COMB_REG_BASE+0x22)
445 #define BK_COMB_23  (COMB_REG_BASE+0x23)
446 #define BK_COMB_24  (COMB_REG_BASE+0x24)
447 #define BK_COMB_25  (COMB_REG_BASE+0x25)
448 #define BK_COMB_26  (COMB_REG_BASE+0x26)
449 #define BK_COMB_27  (COMB_REG_BASE+0x27)
450 #define BK_COMB_28  (COMB_REG_BASE+0x28)
451 #define BK_COMB_29  (COMB_REG_BASE+0x29)
452 #define BK_COMB_2A  (COMB_REG_BASE+0x2A)
453 #define BK_COMB_2B  (COMB_REG_BASE+0x2B)
454 #define BK_COMB_2C  (COMB_REG_BASE+0x2C)
455 #define BK_COMB_2D  (COMB_REG_BASE+0x2D)
456 #define BK_COMB_2E  (COMB_REG_BASE+0x2E)
457 #define BK_COMB_2F  (COMB_REG_BASE+0x2F)
458 #define BK_COMB_30  (COMB_REG_BASE+0x30)
459 #define BK_COMB_31  (COMB_REG_BASE+0x31)
460 #define BK_COMB_32  (COMB_REG_BASE+0x32)
461 #define BK_COMB_33  (COMB_REG_BASE+0x33)
462 #define BK_COMB_34  (COMB_REG_BASE+0x34)
463 #define BK_COMB_35  (COMB_REG_BASE+0x35)
464 #define BK_COMB_36  (COMB_REG_BASE+0x36)
465 #define BK_COMB_37  (COMB_REG_BASE+0x37)
466 #define BK_COMB_38  (COMB_REG_BASE+0x38)
467 #define BK_COMB_39  (COMB_REG_BASE+0x39)
468 #define BK_COMB_3A  (COMB_REG_BASE+0x3A)
469 #define BK_COMB_3B  (COMB_REG_BASE+0x3B)
470 #define BK_COMB_3C  (COMB_REG_BASE+0x3C)
471 #define BK_COMB_3D  (COMB_REG_BASE+0x3D)
472 #define BK_COMB_3E  (COMB_REG_BASE+0x3E)
473 #define BK_COMB_3F  (COMB_REG_BASE+0x3F)
474 #define BK_COMB_40  (COMB_REG_BASE+0x40)
475 #define BK_COMB_41  (COMB_REG_BASE+0x41)
476 #define BK_COMB_42  (COMB_REG_BASE+0x42)
477 #define BK_COMB_43  (COMB_REG_BASE+0x43)
478 #define BK_COMB_44  (COMB_REG_BASE+0x44)
479 #define BK_COMB_45  (COMB_REG_BASE+0x45)
480 #define BK_COMB_46  (COMB_REG_BASE+0x46)
481 #define BK_COMB_47  (COMB_REG_BASE+0x47)
482 #define BK_COMB_48  (COMB_REG_BASE+0x48)
483 #define BK_COMB_49  (COMB_REG_BASE+0x49)
484 #define BK_COMB_4A  (COMB_REG_BASE+0x4A)
485 #define BK_COMB_4B  (COMB_REG_BASE+0x4B)
486 #define BK_COMB_4C  (COMB_REG_BASE+0x4C)
487 #define BK_COMB_4D  (COMB_REG_BASE+0x4D)
488 #define BK_COMB_4E  (COMB_REG_BASE+0x4E)
489 #define BK_COMB_4F  (COMB_REG_BASE+0x4F)
490 #define BK_COMB_50  (COMB_REG_BASE+0x50)
491 #define BK_COMB_51  (COMB_REG_BASE+0x51)
492 #define BK_COMB_52  (COMB_REG_BASE+0x52)
493 #define BK_COMB_53  (COMB_REG_BASE+0x53)
494 #define BK_COMB_54  (COMB_REG_BASE+0x54)
495 #define BK_COMB_55  (COMB_REG_BASE+0x55)
496 #define BK_COMB_56  (COMB_REG_BASE+0x56)
497 #define BK_COMB_57  (COMB_REG_BASE+0x57)
498 #define BK_COMB_58  (COMB_REG_BASE+0x58)
499 #define BK_COMB_59  (COMB_REG_BASE+0x59)
500 #define BK_COMB_5A  (COMB_REG_BASE+0x5A)
501 #define BK_COMB_5B  (COMB_REG_BASE+0x5B)
502 #define BK_COMB_5C  (COMB_REG_BASE+0x5C)
503 #define BK_COMB_5D  (COMB_REG_BASE+0x5D)
504 #define BK_COMB_5E  (COMB_REG_BASE+0x5E)
505 #define BK_COMB_5F  (COMB_REG_BASE+0x5F)
506 #define BK_COMB_60  (COMB_REG_BASE+0x60)
507 #define BK_COMB_61  (COMB_REG_BASE+0x61)
508 #define BK_COMB_62  (COMB_REG_BASE+0x62)
509 #define BK_COMB_63  (COMB_REG_BASE+0x63)
510 #define BK_COMB_64  (COMB_REG_BASE+0x64)
511 #define BK_COMB_65  (COMB_REG_BASE+0x65)
512 #define BK_COMB_66  (COMB_REG_BASE+0x66)
513 #define BK_COMB_67  (COMB_REG_BASE+0x67)
514 #define BK_COMB_68  (COMB_REG_BASE+0x68)
515 #define BK_COMB_69  (COMB_REG_BASE+0x69)
516 #define BK_COMB_6A  (COMB_REG_BASE+0x6A)
517 #define BK_COMB_6B  (COMB_REG_BASE+0x6B)
518 #define BK_COMB_6C  (COMB_REG_BASE+0x6C)
519 #define BK_COMB_6D  (COMB_REG_BASE+0x6D)
520 #define BK_COMB_6E  (COMB_REG_BASE+0x6E)
521 #define BK_COMB_6F  (COMB_REG_BASE+0x6F)
522 #define BK_COMB_70  (COMB_REG_BASE+0x70)
523 #define BK_COMB_71  (COMB_REG_BASE+0x71)
524 #define BK_COMB_72  (COMB_REG_BASE+0x72)
525 #define BK_COMB_73  (COMB_REG_BASE+0x73)
526 #define BK_COMB_74  (COMB_REG_BASE+0x74)
527 #define BK_COMB_75  (COMB_REG_BASE+0x75)
528 #define BK_COMB_76  (COMB_REG_BASE+0x76)
529 #define BK_COMB_77  (COMB_REG_BASE+0x77)
530 #define BK_COMB_78  (COMB_REG_BASE+0x78)
531 #define BK_COMB_79  (COMB_REG_BASE+0x79)
532 #define BK_COMB_7A  (COMB_REG_BASE+0x7A)
533 #define BK_COMB_7B  (COMB_REG_BASE+0x7B)
534 #define BK_COMB_7C  (COMB_REG_BASE+0x7C)
535 #define BK_COMB_7D  (COMB_REG_BASE+0x7D)
536 #define BK_COMB_7E  (COMB_REG_BASE+0x7E)
537 #define BK_COMB_7F  (COMB_REG_BASE+0x7F)
538 #define BK_COMB_80  (COMB_REG_BASE+0x80)
539 #define BK_COMB_81  (COMB_REG_BASE+0x81)
540 #define BK_COMB_82  (COMB_REG_BASE+0x82)
541 #define BK_COMB_83  (COMB_REG_BASE+0x83)
542 #define BK_COMB_84  (COMB_REG_BASE+0x84)
543 #define BK_COMB_85  (COMB_REG_BASE+0x85)
544 #define BK_COMB_86  (COMB_REG_BASE+0x86)
545 #define BK_COMB_87  (COMB_REG_BASE+0x87)
546 #define BK_COMB_88  (COMB_REG_BASE+0x88)
547 #define BK_COMB_89  (COMB_REG_BASE+0x89)
548 #define BK_COMB_8A  (COMB_REG_BASE+0x8A)
549 #define BK_COMB_8B  (COMB_REG_BASE+0x8B)
550 #define BK_COMB_8C  (COMB_REG_BASE+0x8C)
551 #define BK_COMB_8D  (COMB_REG_BASE+0x8D)
552 #define BK_COMB_8E  (COMB_REG_BASE+0x8E)
553 #define BK_COMB_8F  (COMB_REG_BASE+0x8F)
554 #define BK_COMB_90  (COMB_REG_BASE+0x90)
555 #define BK_COMB_91  (COMB_REG_BASE+0x91)
556 #define BK_COMB_92  (COMB_REG_BASE+0x92)
557 #define BK_COMB_93  (COMB_REG_BASE+0x93)
558 #define BK_COMB_94  (COMB_REG_BASE+0x94)
559 #define BK_COMB_95  (COMB_REG_BASE+0x95)
560 #define BK_COMB_96  (COMB_REG_BASE+0x96)
561 #define BK_COMB_97  (COMB_REG_BASE+0x97)
562 #define BK_COMB_98  (COMB_REG_BASE+0x98)
563 #define BK_COMB_99  (COMB_REG_BASE+0x99)
564 #define BK_COMB_9A  (COMB_REG_BASE+0x9A)
565 #define BK_COMB_9B  (COMB_REG_BASE+0x9B)
566 #define BK_COMB_9C  (COMB_REG_BASE+0x9C)
567 #define BK_COMB_9D  (COMB_REG_BASE+0x9D)
568 #define BK_COMB_9E  (COMB_REG_BASE+0x9E)
569 #define BK_COMB_9F  (COMB_REG_BASE+0x9F)
570 #define BK_COMB_A0  (COMB_REG_BASE+0xA0)
571 #define BK_COMB_A1  (COMB_REG_BASE+0xA1)
572 #define BK_COMB_A2  (COMB_REG_BASE+0xA2)
573 #define BK_COMB_A3  (COMB_REG_BASE+0xA3)
574 #define BK_COMB_A4  (COMB_REG_BASE+0xA4)
575 #define BK_COMB_A5  (COMB_REG_BASE+0xA5)
576 #define BK_COMB_A6  (COMB_REG_BASE+0xA6)
577 #define BK_COMB_A7  (COMB_REG_BASE+0xA7)
578 #define BK_COMB_A8  (COMB_REG_BASE+0xA8)
579 #define BK_COMB_A9  (COMB_REG_BASE+0xA9)
580 #define BK_COMB_AA  (COMB_REG_BASE+0xAA)
581 #define BK_COMB_AB  (COMB_REG_BASE+0xAB)
582 #define BK_COMB_AC  (COMB_REG_BASE+0xAC)
583 #define BK_COMB_AD  (COMB_REG_BASE+0xAD)
584 #define BK_COMB_AE  (COMB_REG_BASE+0xAE)
585 #define BK_COMB_AF  (COMB_REG_BASE+0xAF)
586 #define BK_COMB_B0  (COMB_REG_BASE+0xB0)
587 #define BK_COMB_B1  (COMB_REG_BASE+0xB1)
588 #define BK_COMB_B2  (COMB_REG_BASE+0xB2)
589 #define BK_COMB_B3  (COMB_REG_BASE+0xB3)
590 #define BK_COMB_B4  (COMB_REG_BASE+0xB4)
591 #define BK_COMB_B5  (COMB_REG_BASE+0xB5)
592 #define BK_COMB_B6  (COMB_REG_BASE+0xB6)
593 #define BK_COMB_B7  (COMB_REG_BASE+0xB7)
594 #define BK_COMB_B8  (COMB_REG_BASE+0xB8)
595 #define BK_COMB_B9  (COMB_REG_BASE+0xB9)
596 #define BK_COMB_BA  (COMB_REG_BASE+0xBA)
597 #define BK_COMB_BB  (COMB_REG_BASE+0xBB)
598 #define BK_COMB_BC  (COMB_REG_BASE+0xBC)
599 #define BK_COMB_BD  (COMB_REG_BASE+0xBD)
600 #define BK_COMB_BE  (COMB_REG_BASE+0xBE)
601 #define BK_COMB_BF  (COMB_REG_BASE+0xBF)
602 #define BK_COMB_C0  (COMB_REG_BASE+0xC0)
603 #define BK_COMB_C1  (COMB_REG_BASE+0xC1)
604 #define BK_COMB_C2  (COMB_REG_BASE+0xC2)
605 #define BK_COMB_C3  (COMB_REG_BASE+0xC3)
606 #define BK_COMB_C4  (COMB_REG_BASE+0xC4)
607 #define BK_COMB_C5  (COMB_REG_BASE+0xC5)
608 #define BK_COMB_C6  (COMB_REG_BASE+0xC6)
609 #define BK_COMB_C7  (COMB_REG_BASE+0xC7)
610 #define BK_COMB_C8  (COMB_REG_BASE+0xC8)
611 #define BK_COMB_C9  (COMB_REG_BASE+0xC9)
612 #define BK_COMB_CA  (COMB_REG_BASE+0xCA)
613 #define BK_COMB_CB  (COMB_REG_BASE+0xCB)
614 #define BK_COMB_CC  (COMB_REG_BASE+0xCC)
615 #define BK_COMB_CD  (COMB_REG_BASE+0xCD)
616 #define BK_COMB_CE  (COMB_REG_BASE+0xCE)
617 #define BK_COMB_CF  (COMB_REG_BASE+0xCF)
618 #define BK_COMB_D0  (COMB_REG_BASE+0xD0)
619 #define BK_COMB_D1  (COMB_REG_BASE+0xD1)
620 #define BK_COMB_D2  (COMB_REG_BASE+0xD2)
621 #define BK_COMB_D3  (COMB_REG_BASE+0xD3)
622 #define BK_COMB_D4  (COMB_REG_BASE+0xD4)
623 #define BK_COMB_D5  (COMB_REG_BASE+0xD5)
624 #define BK_COMB_D6  (COMB_REG_BASE+0xD6)
625 #define BK_COMB_D7  (COMB_REG_BASE+0xD7)
626 #define BK_COMB_D8  (COMB_REG_BASE+0xD8)
627 #define BK_COMB_D9  (COMB_REG_BASE+0xD9)
628 #define BK_COMB_DA  (COMB_REG_BASE+0xDA)
629 #define BK_COMB_DB  (COMB_REG_BASE+0xDB)
630 #define BK_COMB_DC  (COMB_REG_BASE+0xDC)
631 #define BK_COMB_DD  (COMB_REG_BASE+0xDD)
632 #define BK_COMB_DE  (COMB_REG_BASE+0xDE)
633 #define BK_COMB_DF  (COMB_REG_BASE+0xDF)
634 #define BK_COMB_E0  (COMB_REG_BASE+0xE0)
635 #define BK_COMB_E1  (COMB_REG_BASE+0xE1)
636 #define BK_COMB_E2  (COMB_REG_BASE+0xE2)
637 #define BK_COMB_E3  (COMB_REG_BASE+0xE3)
638 #define BK_COMB_E4  (COMB_REG_BASE+0xE4)
639 #define BK_COMB_E5  (COMB_REG_BASE+0xE5)
640 #define BK_COMB_E6  (COMB_REG_BASE+0xE6)
641 #define BK_COMB_E7  (COMB_REG_BASE+0xE7)
642 #define BK_COMB_E8  (COMB_REG_BASE+0xE8)
643 #define BK_COMB_E9  (COMB_REG_BASE+0xE9)
644 #define BK_COMB_EA  (COMB_REG_BASE+0xEA)
645 #define BK_COMB_EB  (COMB_REG_BASE+0xEB)
646 #define BK_COMB_EC  (COMB_REG_BASE+0xEC)
647 #define BK_COMB_ED  (COMB_REG_BASE+0xED)
648 #define BK_COMB_EE  (COMB_REG_BASE+0xEE)
649 #define BK_COMB_EF  (COMB_REG_BASE+0xEF)
650 #define BK_COMB_F0  (COMB_REG_BASE+0xF0)
651 #define BK_COMB_F1  (COMB_REG_BASE+0xF1)
652 #define BK_COMB_F2  (COMB_REG_BASE+0xF2)
653 #define BK_COMB_F3  (COMB_REG_BASE+0xF3)
654 #define BK_COMB_F4  (COMB_REG_BASE+0xF4)
655 #define BK_COMB_F5  (COMB_REG_BASE+0xF5)
656 #define BK_COMB_F6  (COMB_REG_BASE+0xF6)
657 #define BK_COMB_F7  (COMB_REG_BASE+0xF7)
658 #define BK_COMB_F8  (COMB_REG_BASE+0xF8)
659 #define BK_COMB_F9  (COMB_REG_BASE+0xF9)
660 #define BK_COMB_FA  (COMB_REG_BASE+0xFA)
661 #define BK_COMB_FB  (COMB_REG_BASE+0xFB)
662 #define BK_COMB_FC  (COMB_REG_BASE+0xFC)
663 #define BK_COMB_FD  (COMB_REG_BASE+0xFD)
664 #define BK_COMB_FE  (COMB_REG_BASE+0xFE)
665 #define BK_COMB_FF  (COMB_REG_BASE+0xFF)
666 
667 
668 ////////////////////////////////////////////////////////////////////////////////
669 // SECAM register
670 ////////////////////////////////////////////////////////////////////////////////
671 #define BK_SECAM_01  (SCM_REG_BASE+0x01)
672 #define BK_SECAM_02  (SCM_REG_BASE+0x02)
673 #define BK_SECAM_03  (SCM_REG_BASE+0x03)
674 #define BK_SECAM_04  (SCM_REG_BASE+0x04)
675 #define BK_SECAM_05  (SCM_REG_BASE+0x05)
676 #define BK_SECAM_06  (SCM_REG_BASE+0x06)
677 #define BK_SECAM_07  (SCM_REG_BASE+0x07)
678 #define BK_SECAM_08  (SCM_REG_BASE+0x08)
679 #define BK_SECAM_09  (SCM_REG_BASE+0x09)
680 #define BK_SECAM_0A  (SCM_REG_BASE+0x0A)
681 #define BK_SECAM_0B  (SCM_REG_BASE+0x0B)
682 #define BK_SECAM_0C  (SCM_REG_BASE+0x0C)
683 #define BK_SECAM_0D  (SCM_REG_BASE+0x0D)
684 #define BK_SECAM_0E  (SCM_REG_BASE+0x0E)
685 #define BK_SECAM_0F  (SCM_REG_BASE+0x0F)
686 #define BK_SECAM_10  (SCM_REG_BASE+0x10)
687 #define BK_SECAM_11  (SCM_REG_BASE+0x11)
688 #define BK_SECAM_12  (SCM_REG_BASE+0x12)
689 #define BK_SECAM_13  (SCM_REG_BASE+0x13)
690 #define BK_SECAM_14  (SCM_REG_BASE+0x14)
691 #define BK_SECAM_15  (SCM_REG_BASE+0x15)
692 #define BK_SECAM_16  (SCM_REG_BASE+0x16)
693 #define BK_SECAM_17  (SCM_REG_BASE+0x17)
694 #define BK_SECAM_18  (SCM_REG_BASE+0x18)
695 #define BK_SECAM_19  (SCM_REG_BASE+0x19)
696 #define BK_SECAM_1A  (SCM_REG_BASE+0x1A)
697 #define BK_SECAM_1B  (SCM_REG_BASE+0x1B)
698 #define BK_SECAM_1C  (SCM_REG_BASE+0x1C)
699 #define BK_SECAM_1D  (SCM_REG_BASE+0x1D)
700 #define BK_SECAM_1E  (SCM_REG_BASE+0x1E)
701 #define BK_SECAM_1F  (SCM_REG_BASE+0x1F)
702 #define BK_SECAM_20  (SCM_REG_BASE+0x20)
703 #define BK_SECAM_21  (SCM_REG_BASE+0x21)
704 #define BK_SECAM_22  (SCM_REG_BASE+0x22)
705 #define BK_SECAM_23  (SCM_REG_BASE+0x23)
706 #define BK_SECAM_24  (SCM_REG_BASE+0x24)
707 #define BK_SECAM_25  (SCM_REG_BASE+0x25)
708 #define BK_SECAM_26  (SCM_REG_BASE+0x26)
709 #define BK_SECAM_27  (SCM_REG_BASE+0x27)
710 #define BK_SECAM_28  (SCM_REG_BASE+0x28)
711 #define BK_SECAM_29  (SCM_REG_BASE+0x29)
712 #define BK_SECAM_2A  (SCM_REG_BASE+0x2A)
713 #define BK_SECAM_2B  (SCM_REG_BASE+0x2B)
714 #define BK_SECAM_2C  (SCM_REG_BASE+0x2C)
715 #define BK_SECAM_2D  (SCM_REG_BASE+0x2D)
716 #define BK_SECAM_2E  (SCM_REG_BASE+0x2E)
717 #define BK_SECAM_2F  (SCM_REG_BASE+0x2F)
718 #define BK_SECAM_30  (SCM_REG_BASE+0x30)
719 #define BK_SECAM_31  (SCM_REG_BASE+0x31)
720 #define BK_SECAM_32  (SCM_REG_BASE+0x32)
721 #define BK_SECAM_33  (SCM_REG_BASE+0x33)
722 #define BK_SECAM_34  (SCM_REG_BASE+0x34)
723 #define BK_SECAM_35  (SCM_REG_BASE+0x35)
724 #define BK_SECAM_36  (SCM_REG_BASE+0x36)
725 #define BK_SECAM_37  (SCM_REG_BASE+0x37)
726 #define BK_SECAM_38  (SCM_REG_BASE+0x38)
727 #define BK_SECAM_39  (SCM_REG_BASE+0x39)
728 #define BK_SECAM_3A  (SCM_REG_BASE+0x3A)
729 #define BK_SECAM_3B  (SCM_REG_BASE+0x3B)
730 #define BK_SECAM_3C  (SCM_REG_BASE+0x3C)
731 #define BK_SECAM_3D  (SCM_REG_BASE+0x3D)
732 #define BK_SECAM_3E  (SCM_REG_BASE+0x3E)
733 #define BK_SECAM_3F  (SCM_REG_BASE+0x3F)
734 
735 ////////////////////////////////////////////////////////////////////////////////
736 // VBI register
737 ////////////////////////////////////////////////////////////////////////////////
738 #define BK_VBI_2A  (VBI_REG_BASE+0x2A)
739 #define BK_VBI_41  (VBI_REG_BASE+0x41)
740 #define BK_VBI_45  (VBI_REG_BASE+0x45)
741 #define BK_VBI_46  (VBI_REG_BASE+0x46)
742 #define BK_VBI_4A  (VBI_REG_BASE+0x4A)
743 #define BK_VBI_4F  (VBI_REG_BASE+0x4F)
744 #define BK_VBI_50  (VBI_REG_BASE+0x50)
745 #define BK_VBI_51  (VBI_REG_BASE+0x51)
746 #define BK_VBI_55  (VBI_REG_BASE+0x55)
747 #define BK_VBI_56  (VBI_REG_BASE+0x56)
748 #define BK_VBI_57  (VBI_REG_BASE+0x57)
749 #define BK_VBI_58  (VBI_REG_BASE+0x58)
750 #define BK_VBI_59  (VBI_REG_BASE+0x59)
751 #define BK_VBI_5A  (VBI_REG_BASE+0x5A)
752 #define BK_VBI_5B  (VBI_REG_BASE+0x5B)
753 #define BK_VBI_5C  (VBI_REG_BASE+0x5C)
754 #define BK_VBI_5D  (VBI_REG_BASE+0x5D)
755 #define BK_VBI_5E  (VBI_REG_BASE+0x5E)
756 #define BK_VBI_5F  (VBI_REG_BASE+0x5F)
757 #define BK_VBI_70  (VBI_REG_BASE+0x70)
758 #define BK_VBI_71  (VBI_REG_BASE+0x71)
759 #define BK_VBI_72  (VBI_REG_BASE+0x72)
760 #define BK_VBI_77  (VBI_REG_BASE+0x77)
761 #define BK_VBI_7C  (VBI_REG_BASE+0x7C)
762 #define BK_VBI_7D  (VBI_REG_BASE+0x7D)
763 #define BK_VBI_7E  (VBI_REG_BASE+0x7E)
764 #define BK_VBI_7F  (VBI_REG_BASE+0x7F)
765 #define BK_VBI_81  (VBI_REG_BASE+0x81)
766 #define BK_VBI_82  (VBI_REG_BASE+0x82)
767 #define BK_VBI_83  (VBI_REG_BASE+0x83)
768 #define BK_VBI_86  (VBI_REG_BASE+0x86)
769 #define BK_VBI_89  (VBI_REG_BASE+0x89)
770 #define BK_VBI_8A  (VBI_REG_BASE+0x8A)
771 #define BK_VBI_8B  (VBI_REG_BASE+0x8B)
772 #define BK_VBI_8D  (VBI_REG_BASE+0x8D)
773 #define BK_VBI_91  (VBI_REG_BASE+0x91)
774 #define BK_VBI_92  (VBI_REG_BASE+0x92)
775 #define BK_VBI_99  (VBI_REG_BASE+0x99)
776 #define BK_VBI_9A  (VBI_REG_BASE+0x9A)
777 #define BK_VBI_AD  (VBI_REG_BASE+0xAD)
778 #define BK_VBI_AE  (VBI_REG_BASE+0xAE)
779 #define BK_VBI_AF  (VBI_REG_BASE+0xAF)
780 #define BK_VBI_B7  (VBI_REG_BASE+0xB7)
781 #define BK_VBI_B8  (VBI_REG_BASE+0xB8)
782 #define BK_VBI_BB  (VBI_REG_BASE+0xBB)
783 #define BK_VBI_C4  (VBI_REG_BASE+0xC4)
784 #define BK_VBI_CA  (VBI_REG_BASE+0xCA)
785 #define BK_VBI_CB  (VBI_REG_BASE+0xCB)
786 #define BK_VBI_CC  (VBI_REG_BASE+0xCC)
787 #define BK_VBI_CD  (VBI_REG_BASE+0xCD)
788 #define BK_VBI_CE  (VBI_REG_BASE+0xCE)
789 
790 //------------------------------------------------------------------------------
791 // VD MCU control register
792 //------------------------------------------------------------------------------
793 //h0000	h0000	0	0	reg_vdmcu_rst
794 //h0000	h0000	8	8	reg_vdmcu_sram_en
795 //h0000	h0000	9	9	reg_vdmcu_cache_en
796 //h0000	h0000	10	10	reg_vdmcu_spi_en
797 //h0001	h0001	7	0	reg_vdmcu_rom_bank
798 //h0001	h0001	8	8	reg_addr_auto_inc
799 //h0001	h0001	9	9	reg_hk2vd_int
800 //h0001	h0001	15	12	reg_key
801 //h0002	h0002	15	0	reg_addr
802 //h0006	h0006	7	0	reg_sram_wd
803 //h0008	h0008	7	0	reg_sram_rd
804 #define VD_MCU_RST  0x3460UL
805 #define VD_MCU_SRAM_EN 0x3461UL
806 #define VD_MCU_KEY 0x3463UL
807 #define VD_MCU_ADDR_AUTO_INC 0x3463UL
808 #define VD_MCU_ADDR_L 0x3464UL
809 #define VD_MCU_ADDR_H 0x3465UL
810 #define VD_MCU_SRAM_WD 0x346CUL
811 #define VD_MCU_SRAM_RD 0x3470UL
812 
813 #define VDMCU_MIU_MAP_CMD                       0x10C0UL
814 #define VDMCU_SDRAM_CODE_MAP                    0x10C1UL
815 #define VDMCU_SDRAM_CODE_MAP_H                  0x10C2UL
816 #define VDMCU_CACHE_ACCESS                      0x10C6UL
817 #define VDMCU_CACHE_HIT                         0x10C7UL
818 #define VDMCU_TAG_A0                            0x10C8UL
819 #define VDMCU_TAG_A1                            0x10C9UL
820 #define VDMCU_TAG_A2                            0x10CAUL
821 #define VDMCU_TAG_A3                            0x10CBUL
822 #define VDMCU_TAG_B0                            0x10CCUL
823 #define VDMCU_TAG_B1                            0x10CDUL
824 #define VDMCU_TAG_B2                            0x10CEUL
825 #define VDMCU_TAG_B3                            0x10CFUL
826 
827 //-------------------------------------------------------------------------------------------------
828 //  Type and Structure
829 //-------------------------------------------------------------------------------------------------
830 
831 
832 #endif // _REG_AVD_H_
833 
834