1 //<MStar Software>
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77 //<MStar Software>
78 ////////////////////////////////////////////////////////////////////////////////
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92 //
93 ////////////////////////////////////////////////////////////////////////////////
94
95 #define _HAL_VBI_C
96
97 //-------------------------------------------------------------------------------------------------
98 // Include Files
99 //-------------------------------------------------------------------------------------------------
100 // Common Definition
101 #include "MsCommon.h"
102
103 // Internal Definition
104 #include "halVBI.h"
105 #include "regVBI.h"
106
107 //-------------------------------------------------------------------------------------------------
108 // Driver Compiler Options
109 //-------------------------------------------------------------------------------------------------
110 #define INTERFACE extern
111
112 //-------------------------------------------------------------------------------------------------
113 // Local Defines
114 //-------------------------------------------------------------------------------------------------
115 #define MAKEWORD(a,b) ((((MS_U16)((MS_U8) (a)))<<8) | ((MS_U16)((MS_U8) (b))))
116
117 #define R1BYTE(Addr, u8mask) \
118 (READ_BYTE (_ptrVBIRiuBaseAddr + ((Addr) << 1) - ((Addr) & 1)) & (u8mask))
119
120 #define W1BYTE(Addr, u8Val, u8mask) \
121 (WRITE_BYTE(_ptrVBIRiuBaseAddr + ((Addr) << 1) - ((Addr) & 1), (R1BYTE(Addr, 0xFF) & ~(u8mask)) | ((u8Val) & (u8mask))))
122
123 ///////////////////////////////////////////////////////////////
124 #define MDrv_WriteByte( Reg, u8Val ) \
125 do { \
126 (WRITE_BYTE(_ptrVBIRiuBaseAddr + ((Reg) << 1) - ((Reg) & 1), u8Val)); \
127 }while(0)
128
129 #define MDrv_WriteWord( Reg, u16Val ) \
130 do { \
131 (WRITE_WORD(_ptrVBIRiuBaseAddr + ((Reg) << 1), u16Val)); \
132 }while(0)
133
134 #define MDrv_WriteByteMask( Reg, u8Val, u8Mask ) \
135 do { \
136 (WRITE_BYTE(_ptrVBIRiuBaseAddr + ((Reg) << 1) - ((Reg) & 1), (R1BYTE((Reg), 0xFF) & ~(u8Mask)) | ((u8Val) & (u8Mask)))); \
137 }while(0)
138
139 #define MDrv_ReadByte( Reg) (READ_BYTE (_ptrVBIRiuBaseAddr + ((Reg) << 1) - ((Reg) & 1)))
140
141 #define _BIT0 BIT(0)
142 #define _BIT1 BIT(1)
143 #define _BIT2 BIT(2)
144 #define _BIT3 BIT(3)
145 #define _BIT4 BIT(4)
146 #define _BIT5 BIT(5)
147 #define _BIT6 BIT(6)
148 #define _BIT7 BIT(7)
149 #define _BIT8 BIT(8)
150 #define _BIT9 BIT(9)
151 #define _BIT10 BIT(10)
152 #define _BIT11 BIT(11)
153 #define _BIT12 BIT(12)
154 #define _BIT13 BIT(13)
155 #define _BIT14 BIT(14)
156 #define _BIT15 BIT(15)
157
158 typedef enum
159 {
160 VBI_FIELD_EVEN,
161 VBI_FIELD_ODD
162 } EN_VBI_FIELD;
163
164 #define BK_VBI_E7_BUG 1
165 //-------------------------------------------------------------------------------------------------
166 // Local Structures
167 //-------------------------------------------------------------------------------------------------
168
169
170 //-------------------------------------------------------------------------------------------------
171 // Global Variables
172 //-------------------------------------------------------------------------------------------------
173
174
175 //-------------------------------------------------------------------------------------------------
176 // Local Variables
177 //-------------------------------------------------------------------------------------------------
178 static MS_VIRT _ptrVBIRiuBaseAddr;
179 static MS_U16 _u16VBIStoreRegInfo[255] = {[0 ... (254)] = 0x0};
180
181 //-------------------------------------------------------------------------------------------------
182 // Debug Functions
183 //-------------------------------------------------------------------------------------------------
184
185
186 //-------------------------------------------------------------------------------------------------
187 // Local Functions
188 //-------------------------------------------------------------------------------------------------
HAL_VBI_ReadByte(MS_U32 u32RegAddr)189 MS_U8 HAL_VBI_ReadByte(MS_U32 u32RegAddr)
190 {
191 return (MDrv_ReadByte(u32RegAddr));
192 }
193
HAL_VBI_Read2Byte(MS_U32 u32RegAddr)194 MS_U16 HAL_VBI_Read2Byte(MS_U32 u32RegAddr)
195 {
196 return ((MDrv_ReadByte(u32RegAddr)) + ((MDrv_ReadByte(u32RegAddr + 1))<<8));
197 }
198
HAL_VBI_WriteByte(MS_U32 u32RegAddr,MS_U8 val)199 void HAL_VBI_WriteByte(MS_U32 u32RegAddr, MS_U8 val)
200 {
201 MDrv_WriteByte(u32RegAddr, val);
202 }
203
HAL_VBI_Write2Byte(MS_U32 u32RegAddr,MS_U16 val)204 void HAL_VBI_Write2Byte(MS_U32 u32RegAddr, MS_U16 val)
205 {
206 MDrv_WriteByte(u32RegAddr, (val & 0xFF));
207 MDrv_WriteByte(u32RegAddr + 1, (val>>8));
208 }
209
HAL_VBI_WriteWord(MS_U32 u32RegAddr,MS_U16 val)210 void HAL_VBI_WriteWord(MS_U32 u32RegAddr, MS_U16 val)
211 {
212 if (u32RegAddr & 0x01)
213 printf("[VBI][%s] ERROR, not alignment address", __FUNCTION__);
214
215 MDrv_WriteWord(u32RegAddr, val);
216 }
217
HAL_VBI_WriteByteMask(MS_U32 u32RegAddr,MS_U8 val,MS_U8 mask)218 void HAL_VBI_WriteByteMask(MS_U32 u32RegAddr, MS_U8 val, MS_U8 mask)
219 {
220 MDrv_WriteByteMask(u32RegAddr, val, mask);
221 }
222
223 //-------------------------------------------------------------------------------------------------
224 // Global Functions
225 //-------------------------------------------------------------------------------------------------
VBI_TTXInit(MS_VIRT ptrAddr)226 void VBI_TTXInit(MS_VIRT ptrAddr)
227 {
228 _ptrVBIRiuBaseAddr = ptrAddr;
229
230 // close caption slicer threshold mode
231 HAL_VBI_WriteByte(BK_VBI_40, 0x01);
232
233 // close caption line start 1 (lower 3 bits) = 0
234 // close caption lin end 1 = 0
235 HAL_VBI_WriteByte(BK_VBI_41, 0x00);
236
237 // close caption line start 2 = 0
238 // close caption CRI zero crossing type : positive edge
239 // close caption clock run-in amplitude upper threshold (upper 2 bits) = 0b01
240 HAL_VBI_WriteByte(BK_VBI_50, 0x60);
241
242 // close caption line end 2 = 0
243 // close caption multi-line acquisition mode : 1
244 // close caption zero crossing mode : normal.
245 // close caption SYNC Found enable mode : 1
246 HAL_VBI_WriteByte(BK_VBI_51, 0xA0);
247
248 // teletext clock run-in amplitude accumulation start point. : 0b00010001
249 // For eye-height testing
250 HAL_VBI_WriteByte(BK_VBI_77, 0x11);
251
252 // teletext clock run-in amplitude accumulation start point. : 0b00011010
253 // For SuperVHS decode issue
254 //HAL_VBI_WriteByte(TT_CLK_RUN_IN_START_POINT, 0x1A);
255
256 // teletext VBI line start 1 (odd field) : 0b00100
257 // teletext VBI line end (lower 3 bits) 0b000
258 HAL_VBI_WriteByte(BK_VBI_7C, 0x04);
259
260 // teletext data line end 1 (odd field) : 0b10110
261 // teletext slicer read mode : 0b1
262 // teletext framing code error bond value : 0b0 fully match framing code.
263 // teletext framing code windows mode : 0b0
264 HAL_VBI_WriteByte(BK_VBI_7D, 0x36);
265
266 // teletext data line start 2 (even field) : 0b00100
267 // teletext slicer threshold fixing mode : 0b0 adjust automatically according to TtSidDetSel
268 // teletext slicer level mode : 0b0 original mode.
269 // teletext initial packet counter : 0b1 packet counter increases when teletext packet is detected without upper-bound.
270 HAL_VBI_WriteByte(BK_VBI_7E, 0x84);
271
272 // teletext data line end 2 (even field) : 0b10110
273 // teletext single line point mode : 0b11 Enable ttslptrmode, start from the line when previous line is no teletext.
274 // teletext base address source selecion : 0b1
275 HAL_VBI_WriteByte(BK_VBI_7F, 0xF6);
276
277 HAL_VBI_WriteByte(BK_VBI_81, 0x52);
278 HAL_VBI_WriteByte(BK_VBI_86, 0xD6);
279 HAL_VBI_WriteByte(BK_VBI_89, 0xC2);
280 HAL_VBI_WriteByte(BK_VBI_8A, 0x42);
281 HAL_VBI_WriteByte(BK_VBI_8B, 0x24);
282 HAL_VBI_WriteByte(BK_VBI_8D, 0xA5);
283 HAL_VBI_WriteByte(BK_VBI_90, 0x70);
284 HAL_VBI_WriteByte(BK_VBI_C4, 0x32);
285 HAL_VBI_WriteByte(BK_VBI_CB, 0xC4);
286 HAL_VBI_WriteByte(BK_VBI_CC, 0xBD);
287
288 // For VPS detect speed up
289 HAL_VBI_WriteByte(BK_VBI_B4, 0x42);
290 HAL_VBI_WriteByte(BK_VBI_B5, 0x61);
291 HAL_VBI_WriteByte(BK_VBI_BB, 0x06);
292
293 HAL_VBI_WriteByte(BK_VBI_70,0x80); // enable VPS/WSS
294 }
295
VBI_WSSInit(MS_VIRT ptrAddr)296 void VBI_WSSInit(MS_VIRT ptrAddr)
297 {
298 MS_U8 tmp = 0;
299 _ptrVBIRiuBaseAddr = ptrAddr;
300
301 tmp = HAL_VBI_ReadByte(BK_VBI_BF);
302 tmp &= ~(_BIT6 | _BIT7);
303 HAL_VBI_WriteByte(BK_VBI_BF, tmp);
304
305 HAL_VBI_WriteByte(BK_VBI_70, 0x80); // enable VPS/WSS
306 }
307
VBI_TTX_CheckCircuitReady(void)308 MS_BOOL VBI_TTX_CheckCircuitReady(void)
309 {
310 if( !(HAL_VBI_ReadByte( SLICERREADY ) & _BIT7) )
311 {
312 return FALSE;
313 }
314 else
315 {
316 return TRUE;
317 }
318 }
319
VBI_TTX_GetPacketCount(void)320 MS_U16 VBI_TTX_GetPacketCount(void)
321 {
322 return (MS_U16) HAL_VBI_Read2Byte(VBI_PKTCNT_L);
323 }
324
VBI_GetWSS_Count(void)325 MS_U16 VBI_GetWSS_Count(void)
326 {
327 return (MS_U16) (HAL_VBI_ReadByte(VBI_WSS_COUNT) & 0x07);
328 }
329
VBI_GetVPS_Count(void)330 MS_U16 VBI_GetVPS_Count(void)
331 {
332 return (MS_U16) (HAL_VBI_ReadByte(VBI_VPS_COUNT)>>4);
333 }
334
VBI_TTX_InitSlicer(MS_PHY addr,MS_U16 packetCount)335 void VBI_TTX_InitSlicer(MS_PHY addr, MS_U16 packetCount)
336 {
337 if((addr >> 3) >= (1 << TTX_BUF_BIT))
338 {
339 printf("[VBI][%s] ERROR, buffer address out of bound\n", __FUNCTION__);
340 //MS_ASSERT(0);
341 }
342
343 addr = addr >> 3; /* 8 byte-aligned */
344
345 /* Initial VBI Buffer Start Address */
346 HAL_VBI_Write2Byte(VBI_BASEADDR_L, addr);
347 HAL_VBI_WriteByte(VBI_BASEADDR_H, addr >> 16);
348 if((addr>>24) & 0x0f)
349 HAL_VBI_WriteByte(VBI_BIT24_ADDR, (HAL_VBI_ReadByte(VBI_BIT24_ADDR)&(~0x0f))|((addr>>24) & 0x0f));
350 else
351 HAL_VBI_WriteByte(VBI_BIT24_ADDR, HAL_VBI_ReadByte(VBI_BIT24_ADDR)&(~0x0f));
352
353 /* Initial VBI Buffer Field Number */
354 HAL_VBI_Write2Byte(VBI_BUF_LEN, packetCount); /* no need to minus 1, follow Venus design */
355
356 /* change dram access mode
357 * 0x371F, BIT7 must be always 1 (otherwise the DMA access related function could be error) */
358 HAL_VBI_WriteByte(TTDEC_COMMAND, _BIT1|_BIT7); /* put header packet into VBI without decoder */
359 }
360
VBI_TTX_EnableSlicer(MS_BOOL bEnable)361 void VBI_TTX_EnableSlicer(MS_BOOL bEnable)
362 {
363 if(bEnable)
364 HAL_VBI_WriteByte(TT_ENABLE, HAL_VBI_ReadByte(TT_ENABLE) | _BIT0); // enable TT VBI slicer
365 else
366 HAL_VBI_WriteByte(TT_ENABLE, HAL_VBI_ReadByte(TT_ENABLE) & ~(_BIT0)); // enable TT VBI slicer
367 }
368
VBI_TTX_GetHardware_Indication(void)369 MS_U8 VBI_TTX_GetHardware_Indication(void)
370 {
371 return HAL_VBI_ReadByte(BK_VBI_AF);
372 }
373
VBI_GetVPS_Data(MS_U8 * byte1,MS_U8 * byte2,MS_U8 * byte3,MS_U8 * byte4)374 void VBI_GetVPS_Data(MS_U8 *byte1, MS_U8 *byte2, MS_U8 *byte3, MS_U8 *byte4)
375 {
376 *byte1 = HAL_VBI_ReadByte(BK_VBI_AD);
377 *byte2 = HAL_VBI_ReadByte(BK_VBI_AE);
378 *byte3 = HAL_VBI_ReadByte(BK_VBI_A6);
379 *byte4 = HAL_VBI_ReadByte(BK_VBI_A7);
380 }
381
382 #define NTSC_WSS_CRC_CHECK 0
383
VBI_GetWSS_Data(void)384 MS_U16 VBI_GetWSS_Data(void)
385 {
386 MS_U8 wWssWordH;
387 MS_U8 wWssWordL;
388
389 wWssWordL = HAL_VBI_ReadByte(BK_VBI_CD);
390 wWssWordH = HAL_VBI_ReadByte(BK_VBI_CE);
391
392 #if NTSC_WSS_CRC_CHECK
393
394 MS_U32 idx = 0;
395 MS_U8 u8Op = 0;
396 MS_U8 u8CrcCode = 0x3f;
397 MS_U8 u8CrcCheck = ((HAL_VBI_ReadByte(BK_VBI_CF) & 0xf) << 2) | (wWssWordH >> 6);
398 MS_U16 u16Data = MAKEWORD(wWssWordH, wWssWordL);
399
400 if(HAL_VBI_ReadByte(BK_AFEC_CD) & 0x10) // not NTSC
401 {
402 return MAKEWORD(wWssWordH, wWssWordL);
403 }
404
405 for(idx = 0; idx <14; idx++)
406 {
407 MS_U8 u8CrcTmp = u8CrcCode;
408 u8CrcCode = 0;
409
410 u8Op = (u8CrcTmp ^ (MS_U8)u16Data) & 0x1;
411 u8CrcCode = (u8CrcTmp >> 1) & 0xf; // CRC[3:0]
412 u8CrcCode |= (((u8CrcTmp >> 5) ^ u8Op) << 4); // CRC[4]
413 u8CrcCode |= u8Op << 5; // CRC[5]
414 u16Data >>= 1;
415 }
416
417 if(u8CrcCheck == u8CrcCode)
418 {
419 return MAKEWORD(wWssWordH, wWssWordL);
420 }
421 else
422 {
423 return 0;
424 }
425 #else
426 return MAKEWORD(wWssWordH, wWssWordL);
427 #endif
428 }
429
VBI_Set_PalNC_VideoStandard(void)430 void VBI_Set_PalNC_VideoStandard(void)
431 {
432 HAL_VBI_WriteByte(BK_VBI_82, 0x10);
433 HAL_VBI_WriteByte(BK_VBI_83, 0xB9);
434 HAL_VBI_WriteByte(BK_VBI_89, HAL_VBI_ReadByte(BK_VBI_89)|_BIT6);
435 // for VPS
436 HAL_VBI_WriteByte(BK_VBI_89, HAL_VBI_ReadByte(BK_VBI_89)&(~(_BIT5)));
437 HAL_VBI_WriteByte(BK_VBI_99, 0x8C);
438 HAL_VBI_WriteByte(BK_VBI_9A, 0x01);
439 }
440
VBI_Set_Secam_VideoStandard(void)441 void VBI_Set_Secam_VideoStandard(void)
442 {
443 HAL_VBI_WriteByte(BK_VBI_89, HAL_VBI_ReadByte(BK_VBI_89)|(_BIT6));
444 // for VPS
445 HAL_VBI_WriteByte(BK_VBI_89, HAL_VBI_ReadByte(BK_VBI_89)|_BIT5);
446 HAL_VBI_WriteByte(BK_VBI_99, 0x6D);
447 HAL_VBI_WriteByte(BK_VBI_9A, 0x9A);
448 }
449
VBI_Set_Pal_VideoStandard(void)450 void VBI_Set_Pal_VideoStandard(void)
451 {
452 HAL_VBI_WriteByte(BK_VBI_82, 0x8E);
453 HAL_VBI_WriteByte(BK_VBI_83, 0x6B);
454 HAL_VBI_WriteByte(BK_VBI_89, HAL_VBI_ReadByte(BK_VBI_89)|_BIT6);
455 // for VPS
456 HAL_VBI_WriteByte(BK_VBI_89, HAL_VBI_ReadByte(BK_VBI_89)&(~(_BIT5)));
457 HAL_VBI_WriteByte(BK_VBI_99, 0x8C);
458 HAL_VBI_WriteByte(BK_VBI_9A, 0x01);
459 }
460
VBI_TTX_EnableInterrupt(MS_BOOL bEnable)461 void VBI_TTX_EnableInterrupt(MS_BOOL bEnable)
462 {
463 if(bEnable)
464 {
465 // TTX, VPS and WSS
466 HAL_VBI_WriteByteMask(VBI_INTERRUPT_MASK, 0, _BIT4|_BIT1|_BIT0);
467 }
468 else
469 {
470 // TTX, VPS and WSS
471 HAL_VBI_WriteByteMask(VBI_INTERRUPT_MASK, _BIT4|_BIT1|_BIT0, _BIT4|_BIT1|_BIT0);
472 }
473 }
474
VBI_TTX_ReadIRQ(void)475 MS_U8 VBI_TTX_ReadIRQ(void)
476 {
477 return HAL_VBI_ReadByte(VBI_INTERRUPT_STATUS);
478 }
479
VBI_TTX_ClearIRQ(void)480 void VBI_TTX_ClearIRQ(void)
481 {
482 HAL_VBI_WriteByteMask(VBI_INTERRUPT_CLEAR, _BIT4|_BIT1|_BIT0, _BIT4|_BIT1|_BIT0);
483 HAL_VBI_WriteByteMask(VBI_INTERRUPT_CLEAR, 0, _BIT4|_BIT1|_BIT0);
484 }
485
VBI_TTX_EnableLine(MS_U16 StartLine,MS_U16 EndLine)486 void VBI_TTX_EnableLine(MS_U16 StartLine, MS_U16 EndLine)
487 {
488 #define EVEN_FIELD_OFFSET 313
489
490 EN_VBI_FIELD eField = VBI_FIELD_ODD;
491
492 if(StartLine >= EVEN_FIELD_OFFSET)
493 eField = VBI_FIELD_EVEN;
494
495 switch(eField)
496 {
497 case VBI_FIELD_EVEN:
498 HAL_VBI_WriteByteMask(BK_VBI_7E, StartLine - EVEN_FIELD_OFFSET, 0x1F);
499 HAL_VBI_WriteByteMask(BK_VBI_7F, EndLine - EVEN_FIELD_OFFSET, 0x1F);
500 break;
501
502 case VBI_FIELD_ODD:
503 HAL_VBI_WriteByteMask(BK_VBI_7C, StartLine, 0x1F);
504 HAL_VBI_WriteByteMask(BK_VBI_7D, EndLine, 0x1F);
505 break;
506 }
507 }
508
509 MS_U8 TTX_DMA_CMD_MAPPING[]=
510 {
511 DMA_HEADER,
512 DMA_PACKET1_TO_25,
513 DMA_PACKET26_28_29,
514 DMA_PACKET27,
515 DMA_BTT,
516 DMA_AIT,
517 };
518
519 #if defined(__mips__)
_VBI_WaitDMAReady(void)520 static void _VBI_WaitDMAReady(void)
521 {
522 MS_U8 i;
523
524 for(i = 0; i<25; i++)
525 __asm__ __volatile__ ("nop");
526
527 while(1)
528 {
529 if(HAL_VBI_ReadByte(DMA_COMMAND) & DMA_READY)
530 {
531 break;
532 }
533 }
534 }
535 #elif defined(__aeon__)
_VBI_WaitDMAReady(void)536 static void _VBI_WaitDMAReady(void)
537 {
538 MS_U8 i;
539
540 for(i = 0; i<10; i++)
541 __asm__ __volatile__ ("l.nop 0");
542
543 while(1)
544 {
545 if(HAL_VBI_ReadByte(DMA_COMMAND) & DMA_READY)
546 {
547 break;
548 }
549 }
550 }
551 #elif defined(__arm__) || defined (__aarch64__)
_VBI_WaitDMAReady(void)552 static void _VBI_WaitDMAReady(void)
553 {
554 }
555 #else
556 #error "Not support CPU!!"
557 #endif
558
VBI_TTX_DMA_CopyPacket(MS_PHY src_addr,MS_PHY dest_addr,MS_U8 aPacketType)559 void VBI_TTX_DMA_CopyPacket(MS_PHY src_addr, MS_PHY dest_addr, MS_U8 aPacketType)
560 {
561 src_addr = src_addr>>3;
562
563
564 HAL_VBI_Write2Byte(DMASRC_ADR_L, (src_addr) & 0xFFFF);
565 HAL_VBI_WriteByte(DMASRC_ADR_H, (src_addr>>16) & 0xFF);
566
567 if((src_addr>>24) & 0x01)
568 {
569 HAL_VBI_WriteByte(VBI_BIT24_ADDR, HAL_VBI_ReadByte(VBI_BIT24_ADDR)|DMASRC_ADDR24);
570 }
571 else
572 {
573 HAL_VBI_WriteByte(VBI_BIT24_ADDR, HAL_VBI_ReadByte(VBI_BIT24_ADDR)&(~DMASRC_ADDR24));
574 }
575 dest_addr = dest_addr>>3;
576 HAL_VBI_Write2Byte(DMADES_ADR_L, (dest_addr) & 0xFFFF);
577 HAL_VBI_WriteByte(DMADES_ADR_H, (dest_addr>>16) & 0xFF);
578
579 if((dest_addr>>24) & 0x01)
580 {
581 HAL_VBI_WriteByte(VBI_BIT24_ADDR, HAL_VBI_ReadByte(VBI_BIT24_ADDR)|DMADES_ADDR24);
582 }
583 else
584 {
585 HAL_VBI_WriteByte(VBI_BIT24_ADDR, HAL_VBI_ReadByte(VBI_BIT24_ADDR)&(~DMADES_ADDR24));
586 }
587 HAL_VBI_WriteByte(DMA_FUNC, TTX_DMA_CMD_MAPPING[aPacketType]); // DMA Function 05 : AIT PAGE X/1~X/22
588
589 HAL_VBI_Write2Byte(DMAQW_CNT_L, 5); // DMA Counter (64Bit)
590 HAL_VBI_WriteByte (DMA_COMMAND, DMA_FIRE); // Fire
591 _VBI_WaitDMAReady();
592 }
593
594 /******************************************************************************/
595 // API for VBI Slicer Initialization::
596 // Initializing VBI Slicer HW
597 /******************************************************************************/
VBI_CC_Init(MS_VIRT ptrRiuAddr,MS_PHY phyAddr,MS_U16 u8Len)598 void VBI_CC_Init(MS_VIRT ptrRiuAddr, MS_PHY phyAddr, MS_U16 u8Len)
599 {
600 MS_U8 u8Tmp;
601
602 // VBI RIU base
603 _ptrVBIRiuBaseAddr = ptrRiuAddr;
604
605 // U8 u8Bank; <- remove the bank change code
606 if((phyAddr >> 3) >= (1 << CC_BUF_BIT))
607 {
608 printf("[VBI][%s] ERROR, buffer address out of bound\n", __FUNCTION__);
609 //MS_ASSERT(0);
610 }
611 //reset and enable closed caption
612 // u8Bank = XBYTE[BK_SELECT_00]; <- remove the bank change code
613 // XBYTE[BK_SELECT_00] = REG_BANK_VBI; <- remove the bank change code
614 HAL_VBI_WriteByte(BK_VBI_46, 0x00); //disable VBI
615
616 /* --- setup CC Bytes buffer --- */
617 /* set cc base address */
618 //printf("\n init adr=0x%x, %d", u32Addr, u8Len);
619 u8Tmp = HAL_VBI_ReadByte(BK_VBI_1D);
620 u8Tmp &= ~(0xf0);
621 u8Tmp |= (((phyAddr >> 27)&0x0f) << 4);
622 HAL_VBI_WriteByte(BK_VBI_1D, u8Tmp); // CcBaseAddr_24, 25
623 HAL_VBI_WriteByte(BK_VBI_5D, (phyAddr >> 19) & 0xFF); // CcBaseAddr_23_16 (default value is 0xFF so it needs to specify to 0x00)
624 HAL_VBI_WriteByte(BK_VBI_5E, (phyAddr >> 11) & 0xFF); // CcBaseAddr_15_8 (high order)
625 HAL_VBI_WriteByte(BK_VBI_5F, (phyAddr >> 3) & 0xFF); // CCBaseAddr_7_0 (low order)
626
627 /* set cc buffer length */
628 HAL_VBI_WriteByte(BK_VBI_5C, u8Len);
629
630 // CJ
631 HAL_VBI_WriteByte(BK_AFEC_6B, HAL_VBI_ReadByte(BK_AFEC_6B) & 0xF7);
632
633 // Set a constraint for CC patterns in case of wrong encoder's behavior
634 HAL_VBI_WriteByte(BK_VBI_4A, (HAL_VBI_ReadByte(BK_VBI_4A)&0xf0)|0x03);
635
636 HAL_VBI_WriteByte(BK_VBI_46, 0x01); //enable VBI
637
638 // disable vbi software reset
639 u8Tmp = HAL_VBI_ReadByte(BK_VBI_70);
640 u8Tmp &= ~(0x08);
641 HAL_VBI_WriteByte(BK_VBI_70, u8Tmp);
642 }
643
644 /******************************************************************************/
645 /// API to turn on VBI from YPbPr Initialization::
646 /// Initializing VBI Slicer HW
647 /******************************************************************************/
VBI_CC_YPbPr_Init(MS_U8 cvbs_no)648 void VBI_CC_YPbPr_Init(MS_U8 cvbs_no)
649 {
650 // Enable VD parts
651 HAL_VBI_WriteByte(L_BK_ADC_ATOP(0x00), 0x09); // enable VD & YPbPr
652 HAL_VBI_WriteByte(L_BK_ADC_ATOP(0x02), 0xf0|cvbs_no); // (select VD_ymux for CVBS input from Y)
653 HAL_VBI_WriteByte(L_BK_ADC_ATOP(0x04), 0x00); // enable analog blocks, 04, 05
654 HAL_VBI_WriteByte(H_BK_ADC_ATOP(0x04), 0x00);
655 HAL_VBI_WriteByte(L_BK_ADC_ATOP(0x05), 0x00);
656 HAL_VBI_WriteByte(L_BK_ADC_ATOP(0x06), 0x00); // enable ADC clocks
657 HAL_VBI_WriteByte(L_BK_ADC_ATOP(0x12), 0x01); // VD pll =2X (16Fsc)
658
659 // enable VD clocks, setup VD AFEC, AFEC and VBI are just set as AV mode
660 HAL_VBI_WriteByte(H_BK_CHIPTOP(0x16), (HAL_VBI_ReadByte(H_BK_CHIPTOP(0x16)) & (0x0F)));
661 HAL_VBI_WriteByte(L_BK_CHIPTOP(0x17), 0x06);
662 }
663
664 /******************************************************************************/
665 /// API to Set CC data rate::
666 /// Set CC's data rate
667 /// @Param u8Mode \b IN video system mode
668 /// @return TRUE:: Successfully set
669 /// FALSE:: Fail
670 /******************************************************************************/
VBI_CC_DataRateSet(MS_U8 * ptable)671 MS_U8 VBI_CC_DataRateSet(MS_U8 *ptable)
672 {
673 MS_U8 j=1;
674
675 // Set the VBI registers
676 HAL_VBI_WriteByte(BK_VBI_41, ptable[j++]);
677
678 HAL_VBI_WriteByte(BK_VBI_42, HAL_VBI_ReadByte(BK_VBI_42)&0xC0);
679 HAL_VBI_WriteByte(BK_VBI_42, HAL_VBI_ReadByte(BK_VBI_42)|ptable[j++]);
680
681 HAL_VBI_WriteByte(BK_VBI_44, ptable[j++]);
682
683 HAL_VBI_WriteByte(BK_VBI_4B, HAL_VBI_ReadByte(BK_VBI_4B)&0xC0);
684 HAL_VBI_WriteByte(BK_VBI_4B, HAL_VBI_ReadByte(BK_VBI_4B)|ptable[j++]);
685
686 HAL_VBI_WriteByte(BK_VBI_4D, ptable[j++]);
687
688 HAL_VBI_WriteByte(BK_VBI_50, HAL_VBI_ReadByte(BK_VBI_50)&0xE0);
689 HAL_VBI_WriteByte(BK_VBI_50, HAL_VBI_ReadByte(BK_VBI_50)|ptable[j++]);
690
691 HAL_VBI_WriteByte(BK_VBI_51, HAL_VBI_ReadByte(BK_VBI_51)&0xE0);
692 HAL_VBI_WriteByte(BK_VBI_51, HAL_VBI_ReadByte(BK_VBI_51)|ptable[j++]);
693
694 return TRUE;
695 }
696
697 /******************************************************************************/
698 /// API to get packet count:
699 ///
700 /******************************************************************************/
VBI_CC_GetPacketCnt(void)701 MS_U8 VBI_CC_GetPacketCnt(void)
702 {
703 return (HAL_VBI_ReadByte(BK_VBI_5B)&0x1F);
704 }
705
706 /******************************************************************************/
707 /// API to get odd/even byte-found-identification:
708 /// 2 bits
709 /******************************************************************************/
VBI_CC_GetByteFoundIndication(void)710 MS_U8 VBI_CC_GetByteFoundIndication(void)
711 {
712 return ((HAL_VBI_ReadByte(BK_VBI_56)&0xC0) >> 6);
713 }
714
715 /******************************************************************************/
716 /// API to get packet data:
717 ///
718 /// @return (U32) (Odd_1st_Byte + Odd_2nd_Byte + Even_1st_Byte + Even_2nd_Byte)
719 /******************************************************************************/
VBI_CC_GetPacket(void)720 MS_U32 VBI_CC_GetPacket(void)
721 {
722 MS_U32 u32Tmp;
723
724 u32Tmp = ((MS_U32)HAL_VBI_ReadByte(BK_VBI_57)) << 24;
725 u32Tmp |= ((MS_U32)HAL_VBI_ReadByte(BK_VBI_58)) << 16;
726 u32Tmp |= ((MS_U32)HAL_VBI_ReadByte(BK_VBI_59)) << 8;
727 u32Tmp |= ((MS_U32)HAL_VBI_ReadByte(BK_VBI_5A)) << 0;
728
729 return (u32Tmp);
730 }
731
732 /******************************************************************************/
733 /// API to set CC frame count:
734 ///
735 /******************************************************************************/
VBI_SetCCFrameCnt(MS_U8 cnt)736 void VBI_SetCCFrameCnt(MS_U8 cnt)
737 {
738 MS_U8 u8Tmp=0;
739
740 u8Tmp = HAL_VBI_ReadByte(BK_VBI_46);
741 u8Tmp &= ~(_BIT1 | _BIT2 | _BIT3 | _BIT4 | _BIT5);
742 u8Tmp |= ((cnt&0x1F) << 1);
743
744 HAL_VBI_WriteByte(BK_VBI_46, u8Tmp);
745 }
746
747 /******************************************************************************/
748 /// API to enable CC slicer:
749 ///
750 /******************************************************************************/
VBI_CC_EnableSlicer(MS_BOOL bEnable)751 void VBI_CC_EnableSlicer(MS_BOOL bEnable)
752 {
753 if(bEnable)
754 {
755 HAL_VBI_WriteByte(BK_VBI_46, HAL_VBI_ReadByte(BK_VBI_46) | _BIT0);
756 }
757 else
758 {
759 HAL_VBI_WriteByte(BK_VBI_46, HAL_VBI_ReadByte(BK_VBI_46) & 0xFE);
760 }
761 }
762
VBI_CC_SetCCLine(MS_U16 StartLine,MS_U16 EndLine,MS_U8 val)763 void VBI_CC_SetCCLine(MS_U16 StartLine, MS_U16 EndLine, MS_U8 val) // val -> 0:NTSC, 1:PAL
764 {
765 #define CC_EVEN_FIELD_OFFSET 263 // (525 / 2 + 1)
766 #define VBI_CC_NTSC_LINE_OFFSET 3
767 #define VBI_CC_NTSC_DEFAULT_LINE 21
768
769 EN_VBI_FIELD eField = VBI_FIELD_ODD;
770 MS_U8 u8Tmp;
771
772 if(StartLine >= CC_EVEN_FIELD_OFFSET)
773 eField = VBI_FIELD_EVEN;
774
775 if(val == 0)
776 {
777 val = VBI_CC_NTSC_LINE_OFFSET; // offset
778 }
779 else
780 {
781 val = 0; // offset
782 }
783
784 switch(eField)
785 {
786 case VBI_FIELD_EVEN:
787 HAL_VBI_WriteByteMask(BK_VBI_50, (StartLine - CC_EVEN_FIELD_OFFSET), 0x1F);
788 HAL_VBI_WriteByteMask(BK_VBI_51, (EndLine - CC_EVEN_FIELD_OFFSET), 0x1F);
789 break;
790
791 case VBI_FIELD_ODD:
792
793 // start line
794 u8Tmp = HAL_VBI_ReadByte(BK_VBI_40);
795 u8Tmp &= ~(_BIT4 | _BIT5);
796 u8Tmp |= ((StartLine & 0x18) << 1);
797 HAL_VBI_WriteByteMask(BK_VBI_40, u8Tmp, 0x30);
798
799 u8Tmp = HAL_VBI_ReadByte(BK_VBI_41);
800 u8Tmp &= ~(_BIT5 | _BIT6 | _BIT7);
801 u8Tmp |= ((StartLine & 0x07) << 5);
802 HAL_VBI_WriteByteMask(BK_VBI_41, u8Tmp, 0xE0);
803
804 // end line
805 HAL_VBI_WriteByteMask(BK_VBI_41, EndLine, 0x1F);
806 break;
807 }
808 }
809 /******************************************************************************/
810 /// API to set CC SC window length
811 ///
812 /******************************************************************************/
VBI_CC_SetSCWindowLen(MS_U8 u8Len)813 MS_BOOL VBI_CC_SetSCWindowLen(MS_U8 u8Len)
814 {
815 HAL_VBI_WriteByte(BK_VBI_53, u8Len);
816 return TRUE;
817 }
818 /******************************************************************************/
819 /// API to set WSS VPS byte number:
820 ///
821 /******************************************************************************/
VBI_SetWssVpsByteNum(MS_U8 cnt)822 void VBI_SetWssVpsByteNum(MS_U8 cnt)
823 {
824 MS_U8 u8Tmp=0;
825
826 u8Tmp = HAL_VBI_ReadByte(BK_VBI_B8);
827 u8Tmp &= ~(_BIT0 | _BIT1 | _BIT2 | _BIT3);
828 u8Tmp |= (cnt&0x0f);
829
830 HAL_VBI_WriteByte(BK_VBI_B8, u8Tmp);
831 }
832
833 /******************************************************************************/
834 /// API to enable memory protect (the memory range vbi can access)
835 ///
836 /******************************************************************************/
VBI_ProtectMemory(MS_BOOL bEnable,MS_PHY phyAddr,MS_U32 u32Size)837 MS_BOOL VBI_ProtectMemory(MS_BOOL bEnable, MS_PHY phyAddr, MS_U32 u32Size)
838 {
839 MS_U32 u32MiuAddr = (MS_U32)phyAddr >> 3;
840 MS_U32 u32MiuAddrMax = ( ( (MS_U32)phyAddr + u32Size ) >> 3 );
841
842 if(bEnable)
843 {
844 HAL_VBI_WriteByte(BK_VBI_DE, u32MiuAddr & 0xFF);
845 HAL_VBI_WriteByte(BK_VBI_DF, (u32MiuAddr >> 8) & 0xFF);
846 HAL_VBI_WriteByte(BK_VBI_E0, (u32MiuAddr >> 16) & 0xFF);
847
848 HAL_VBI_WriteByte(BK_VBI_E1, u32MiuAddrMax & 0xFF);
849 HAL_VBI_WriteByte(BK_VBI_E2, (u32MiuAddrMax >> 8) & 0xFF);
850 HAL_VBI_WriteByte(BK_VBI_E3, (u32MiuAddrMax >> 16) & 0xFF);
851
852 #if BK_VBI_E7_BUG
853 HAL_VBI_WriteWord(BK_VBI_E6, ( (u32MiuAddr >> 24) & 0x0F ) |
854 ( ( (u32MiuAddrMax >> 24) & 0x0F ) << 4));
855 #else
856 HAL_VBI_WriteByte(BK_VBI_E7, ( (u32MiuAddr >> 24) & 0x0F ) |
857 ( ( (u32MiuAddrMax >> 24) & 0x0F ) << 4));
858 #endif
859 HAL_VBI_WriteByteMask(BK_VBI_E4, _BIT1, _BIT1);
860 }
861 else
862 {
863 HAL_VBI_WriteByteMask(BK_VBI_E4, 0, _BIT1);
864 }
865
866 return TRUE;
867 }
868
869 /******************************************************************************/
870 /// API to store register value for STR usage.
871 ///
872 /******************************************************************************/
VBI_RegStateStore(void)873 void VBI_RegStateStore(void)
874 {
875 _u16VBIStoreRegInfo[64] = HAL_VBI_ReadByte(BK_VBI_40); // 0x40
876 _u16VBIStoreRegInfo[65] = HAL_VBI_ReadByte(BK_VBI_41); // 0x41
877 _u16VBIStoreRegInfo[66] = HAL_VBI_ReadByte(BK_VBI_42); // 0x42
878 _u16VBIStoreRegInfo[68] = HAL_VBI_ReadByte(BK_VBI_44); // 0x44
879 _u16VBIStoreRegInfo[70] = HAL_VBI_ReadByte(BK_VBI_46); // 0x46
880 _u16VBIStoreRegInfo[75] = HAL_VBI_ReadByte(BK_VBI_4B); // 0x4B
881 _u16VBIStoreRegInfo[77] = HAL_VBI_ReadByte(BK_VBI_4D); // 0x4D
882 _u16VBIStoreRegInfo[80] = HAL_VBI_ReadByte(BK_VBI_50); // 0x50
883 _u16VBIStoreRegInfo[81] = HAL_VBI_ReadByte(BK_VBI_51); // 0x51
884 _u16VBIStoreRegInfo[83] = HAL_VBI_ReadByte(BK_VBI_53); // 0x53
885 _u16VBIStoreRegInfo[86] = HAL_VBI_ReadByte(BK_VBI_56); // 0x56
886 _u16VBIStoreRegInfo[92] = HAL_VBI_ReadByte(BK_VBI_5C); // 0x5C
887 _u16VBIStoreRegInfo[124] = HAL_VBI_ReadByte(BK_VBI_7C); // 0x7C
888 _u16VBIStoreRegInfo[125] = HAL_VBI_ReadByte(BK_VBI_7D); // 0x7D
889 _u16VBIStoreRegInfo[126] = HAL_VBI_ReadByte(BK_VBI_7E); // 0x7E
890 _u16VBIStoreRegInfo[127] = HAL_VBI_ReadByte(BK_VBI_7F); // 0x7F
891 _u16VBIStoreRegInfo[129] = HAL_VBI_ReadByte(BK_VBI_82); // 0x82
892 _u16VBIStoreRegInfo[130] = HAL_VBI_ReadByte(BK_VBI_83); // 0x83
893 _u16VBIStoreRegInfo[137] = HAL_VBI_ReadByte(BK_VBI_89); // 0x89
894 _u16VBIStoreRegInfo[153] = HAL_VBI_ReadByte(BK_VBI_99); // 0x99
895 _u16VBIStoreRegInfo[154] = HAL_VBI_ReadByte(BK_VBI_9A); // 0x9A
896 _u16VBIStoreRegInfo[184] = HAL_VBI_ReadByte(BK_VBI_B8); // 0xB8
897 _u16VBIStoreRegInfo[222] = HAL_VBI_ReadByte(BK_VBI_DE); // 0xDE
898 _u16VBIStoreRegInfo[223] = HAL_VBI_ReadByte(BK_VBI_DF); // 0xDF
899 _u16VBIStoreRegInfo[224] = HAL_VBI_ReadByte(BK_VBI_E0); // 0xE0
900 _u16VBIStoreRegInfo[225] = HAL_VBI_ReadByte(BK_VBI_E1); // 0xE1
901 _u16VBIStoreRegInfo[226] = HAL_VBI_ReadByte(BK_VBI_E2); // 0xE2
902 _u16VBIStoreRegInfo[227] = HAL_VBI_ReadByte(BK_VBI_E3); // 0xE3
903 _u16VBIStoreRegInfo[228] = HAL_VBI_ReadByte(BK_VBI_E4); // 0xE4
904 _u16VBIStoreRegInfo[230] = HAL_VBI_ReadByte(BK_VBI_E6); // 0xE6
905 _u16VBIStoreRegInfo[231] = HAL_VBI_ReadByte(BK_VBI_E7); // 0xE7
906 }
907
908 /******************************************************************************/
909 /// API to store register value for STR usage.
910 ///
911 /******************************************************************************/
VBI_RegStateRestore(void)912 void VBI_RegStateRestore(void)
913 {
914 HAL_VBI_WriteByte(BK_VBI_40, _u16VBIStoreRegInfo[64] & 0xFF);
915 HAL_VBI_WriteByte(BK_VBI_41, _u16VBIStoreRegInfo[65] & 0xFF);
916 HAL_VBI_WriteByte(BK_VBI_42, _u16VBIStoreRegInfo[66] & 0xFF);
917 HAL_VBI_WriteByte(BK_VBI_44, _u16VBIStoreRegInfo[68] & 0xFF);
918 HAL_VBI_WriteByte(BK_VBI_46, _u16VBIStoreRegInfo[70] & 0xFF);
919 HAL_VBI_WriteByte(BK_VBI_4B, _u16VBIStoreRegInfo[75] & 0xFF);
920 HAL_VBI_WriteByte(BK_VBI_4D, _u16VBIStoreRegInfo[77] & 0xFF);
921 HAL_VBI_WriteByte(BK_VBI_50, _u16VBIStoreRegInfo[80] & 0xFF);
922 HAL_VBI_WriteByte(BK_VBI_51, _u16VBIStoreRegInfo[81] & 0xFF);
923 HAL_VBI_WriteByte(BK_VBI_53, _u16VBIStoreRegInfo[83] & 0xFF);
924 HAL_VBI_WriteByte(BK_VBI_56, _u16VBIStoreRegInfo[86] & 0xFF);
925 HAL_VBI_WriteByte(BK_VBI_5C, _u16VBIStoreRegInfo[92] & 0xFF);
926 HAL_VBI_WriteByte(BK_VBI_7C, _u16VBIStoreRegInfo[124] & 0xFF);
927 HAL_VBI_WriteByte(BK_VBI_7D, _u16VBIStoreRegInfo[125] & 0xFF);
928 HAL_VBI_WriteByte(BK_VBI_7E, _u16VBIStoreRegInfo[126] & 0xFF);
929 HAL_VBI_WriteByte(BK_VBI_7F, _u16VBIStoreRegInfo[127] & 0xFF);
930 HAL_VBI_WriteByte(BK_VBI_82, _u16VBIStoreRegInfo[129] & 0xFF);
931 HAL_VBI_WriteByte(BK_VBI_83, _u16VBIStoreRegInfo[130] & 0xFF);
932 HAL_VBI_WriteByte(BK_VBI_89, _u16VBIStoreRegInfo[137] & 0xFF);
933 HAL_VBI_WriteByte(BK_VBI_99, _u16VBIStoreRegInfo[153] & 0xFF);
934 HAL_VBI_WriteByte(BK_VBI_9A, _u16VBIStoreRegInfo[154] & 0xFF);
935 HAL_VBI_WriteByte(BK_VBI_B8, _u16VBIStoreRegInfo[184] & 0xFF);
936 HAL_VBI_WriteByte(BK_VBI_DE, _u16VBIStoreRegInfo[222] & 0xFF);
937 HAL_VBI_WriteByte(BK_VBI_DF, _u16VBIStoreRegInfo[223] & 0xFF);
938 HAL_VBI_WriteByte(BK_VBI_E0, _u16VBIStoreRegInfo[224] & 0xFF);
939 HAL_VBI_WriteByte(BK_VBI_E1, _u16VBIStoreRegInfo[225] & 0xFF);
940 HAL_VBI_WriteByte(BK_VBI_E2, _u16VBIStoreRegInfo[226] & 0xFF);
941 HAL_VBI_WriteByte(BK_VBI_E3, _u16VBIStoreRegInfo[227] & 0xFF);
942 HAL_VBI_WriteByte(BK_VBI_E4, _u16VBIStoreRegInfo[228] & 0xFF);
943 HAL_VBI_WriteByte(BK_VBI_E6, _u16VBIStoreRegInfo[230] & 0xFF);
944 HAL_VBI_WriteByte(BK_VBI_E7, _u16VBIStoreRegInfo[231] & 0xFF);
945
946 }
947
948
949 #undef _HAL_VBI_C
950