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MStar hereby reserves the 91 // rights to any and all damages, losses, costs and expenses resulting therefrom. 92 // 93 //////////////////////////////////////////////////////////////////////////////// 94 95 #ifndef _HAL_AVD_H_ 96 #define _HAL_AVD_H_ 97 98 #ifndef UNUSED 99 #define UNUSED(x) ((x)=(x)) 100 #endif 101 102 #define AVD_PAULO_1_A 0 103 #define AVD_PAULO_1_B 1 // Paulo1, Paulo2 104 #define AVD_PAULO_2_A 2 105 #define AVD_SATURN_A 10 // S1 106 #define AVD_LOLA_A 20 // Lola, Lomeo, S2, S3, Neptune 107 #define AVD_LATTE_A 21 // Latte, Laser 108 #define AVD_MOSES_A 22 // Moses 109 #define AVD_ERIS_A 23 // Eris,Pluto,T1,T2 110 #define AVD_EUCLID_A 24 // Euclid(13K code size with SPL2/DPL2) 111 // For New Version VD MCU below 112 #define AVD_LOPEZ_A 30 // Lopez,Metis,Martina 113 #define AVD_MUSE_A 31 // Maria5 114 #define AVD_RAPHAEL_A 32 // Rapfael 115 #define AVD_TITANIA3_A 33 // T3 116 #define AVD_METIS_A 34 // Metis,Martina 117 #define AVD_TITANIA4_A 35 // T4,T7,Janus 118 #define AVD_AMBER1_A 36 // Amber1,Amber5 119 #define AVD_AMBER7_A 37//Amber7,Agate,Amethyst,Eagle 120 121 #define VD_CHIP_VERSION AVD_AMBER7_A 122 123 // 20090812 turn off MID function temporarily because of COMB bug, 1 124 //#define AVD_COMB_3D_MID 1 125 #if((VD_CHIP_VERSION>=AVD_TITANIA3_A)) 126 #define NEW_VD_MCU 1 127 #else 128 #define NEW_VD_MCU 0 129 #endif 130 #if((VD_CHIP_VERSION==AVD_AMBER1_A)) 131 #define TWO_VD_DSP_CODE 1 132 #else 133 #define TWO_VD_DSP_CODE 0 134 #endif 135 #if ((VD_CHIP_VERSION==AVD_TITANIA4_A)) 136 #define LOAD_CODE_BYTE_WRITE_ONLY 1 137 #else 138 #define LOAD_CODE_BYTE_WRITE_ONLY 0 139 #endif 140 #if ((VD_CHIP_VERSION==AVD_TITANIA3_A)) 141 #define T3_LOAD_CODE 1 142 #else 143 #define T3_LOAD_CODE 0 144 #endif 145 //------------------------------------------------------------------------------------------------- 146 // Macro and Define 147 //------------------------------------------------------------------------------------------------- 148 #define FSC_AUTO_DET_ENABLE 0x00 149 #define FSC_AUTO_DET_DISABLE 0x01 150 151 #define FSC_MODE_PAL 0x00 152 #define FSC_MODE_SECAM 0x01 153 #define FSC_MODE_NTSC 0x02 154 #define FSC_MODE_NTSC_443 0x03 155 #define FSC_MODE_PAL_M 0x04 156 #define FSC_MODE_PAL_60 0x05 157 #define FSC_MODE_PAL_N 0x06 158 159 #define AVD_AGC_ENABLE 0x00 160 #define AVD_AGC_DISABLE 0x03 161 162 #define AVD_DSP_CODE_MSTAR 0 163 #define AVD_DSP_CODE_LGE_ATSC 1 164 #define AVD_DSP_CODE_LGE_MSTAR 2 165 #define AVD_DSP_CODE_SEC_ATSC 3 166 #define AVD_DSP_CODE_SEC 4 167 #define AVD_DSP_CODE_TYPE_VIF 5 //Milan VIF/ADC use different DSP AGC 168 #define AVD_DSP_CODE_TYPE_ADC 6 //Milan VIF/ADC use different DSP AGC 169 170 // Coarse Gain Define 171 #if (VD_CHIP_VERSION==AVD_AMBER1_A) // Brian 20110428 A1 & A5 ADC gain mapping are different 172 #define VD_AGC_COARSE_GAIN 0xE // 4'b:1110 0.857 173 #else 174 #define VD_AGC_COARSE_GAIN 0xA // 4'b:1010 0.867 175 #endif 176 177 //#define VD_AGC_COARSE_GAIN_X_0_5 0 // x0.5 178 //#define VD_AGC_COARSE_GAIN_X_1 1 // x1 179 //#define VD_AGC_COARSE_GAIN_X_2 2 // x2 180 //#define VD_AGC_COARSE_GAIN_X_4 3 // x4 181 182 //------------------------------------------------------------------------------------------------- 183 // Type and Structure 184 //------------------------------------------------------------------------------------------------- 185 //CLK_VDMCU clock setting 186 //[0]: disable clock 187 //[1]: invert clock 188 //[4:2]: 189 // 000: 170MHz (MPLL_DIV_BUF) 190 // 001: 160HMz 191 // 010: 144MHz 192 // 011: 123MHz 193 // 100: 108MHz 194 // 101: mem_clock 195 // 110: mem_clock div 2 196 // 111: select XTAL 197 198 typedef enum 199 { 200 AVD_VDMCU_CLOCK_170Mhz, 201 AVD_VDMCU_CLOCK_160Mhz, 202 AVD_VDMCU_CLOCK_144Mhz, 203 AVD_VDMCU_CLOCK_123Mhz, 204 AVD_VDMCU_CLOCK_108Mhz, 205 AVD_VDMCU_CLOCK_MEM, 206 AVD_VDMCU_CLOCK_MEM_DIV2, 207 AVD_VDMCU_CLOCK_XTAL, 208 AVD_VDMCU_CLOCK_54Mhz, // for drvavd.c compatibility, will set to 108Mhz 209 AVD_VDMCU_CLOCK_86Mhz, // for drvavd.c compatibility, will set to 108Mhz 210 } AVD_VDMCUClockSpeed; 211 212 typedef enum 213 { 214 AVD_VDMCU_CLOCK_NORMAL, 215 AVD_VDMCU_CLOCK_INV, 216 } AVD_VDMCUClockInverse; 217 218 //------------------------------------------------------------------------------------------------- 219 // Function and Variable 220 //------------------------------------------------------------------------------------------------- 221 extern const MS_U8 _u8VdDecInitialize[]; 222 extern void HAL_AVD_ADC_SetGMC(MS_U8 u8Value); 223 extern void HAL_AVD_VDMCU_SoftStop (void); 224 extern void HAL_AVD_VDMCU_SetFreeze (MS_BOOL bEnable); 225 extern void HAL_AVD_VDMCU_SetClock (AVD_VDMCUClockSpeed eClock, AVD_VDMCUClockInverse eInverse); 226 extern void HAL_AVD_AFEC_SetClockSource(MS_BOOL bSource); 227 extern void HAL_AVD_VDMCU_LoadDSP(const MS_U8 *pu8VD_DSP, MS_U32 len); 228 extern void HAL_AVD_RegInit (void); 229 extern void HAL_AVD_RegInitExt(MS_U8 *_u8VdDecInitializeExt); 230 extern MS_U16 HAL_AVD_AFEC_GetStatus(void); 231 extern MS_BOOL HAL_AVD_AFEC_GetHWHsync(void); 232 extern MS_BOOL HAL_AVD_AFEC_GetBurstOn(void); 233 extern MS_BOOL HAL_AVD_AFEC_GetCoChannelOn(void); 234 extern MS_U16 HAL_AVD_AFEC_GetVTotal(void); 235 extern MS_U16 HAL_AVD_AFEC_GetHTotal(void); 236 extern MS_U8 HAL_AVD_AFEC_GetNoiseMag(void); 237 extern void HAL_AVD_AFEC_McuReset(void); 238 extern void HAL_AVD_AFEC_SetClock(MS_BOOL bEnable); 239 extern void HAL_AVD_AFEC_SetPatchFlag(MS_U32 u32VDPatchFlag); 240 extern void HAL_AVD_AFEC_SetInput(AVD_InputSourceType eSource, MS_U8 u8ScartFB, AVD_DemodType eDemodType, MS_U32 u32XTAL_Clock); 241 extern void HAL_AVD_AFEC_SetRegFromDSP (void); 242 extern void HAL_AVD_AFEC_SetHTotal (MS_U32 u32HTotal); 243 extern void HAL_AVD_AFEC_SetVtotal (MS_U8 u8Mode); 244 extern void HAL_AVD_AFEC_SetBT656Width (MS_U8 u8BT656Width); 245 extern void HAL_AVD_AFEC_EnableForceMode (MS_BOOL bEnable); 246 extern void HAL_AVD_AFEC_SetFSCMode (MS_U8 u8FSCMode); 247 extern void HAL_AVD_AFEC_EnableCVBSLPF(MS_BOOL bEnable); 248 extern void HAL_AVD_AFEC_EnableBottomAverage(MS_BOOL bEnable); 249 extern void HAL_AVD_AFEC_EnableVBIDPLSpeedup(MS_BOOL bEnable); 250 extern void HAL_AVD_AFEC_AGCSetMode (MS_U8 u8AgcMode); 251 extern void HAL_AVD_AFEC_AGCSetCoarseGain (MS_U8 u8AgcCoarseGain); 252 extern void HAL_AVD_AFEC_AGCSetFineGain (MS_U8 u8AgcFineGain); 253 extern void HAL_AVD_AFEC_SetColorKillLevel (MS_U8 u8ColorKillLevel); 254 extern void HAL_AVD_AFEC_SetHsyncSensitivity(VD_HSYNC_SENSITIVITY eVDHsyncSensitivityTuning); 255 extern void HAL_AVD_AFEC_SetSwingLimit(MS_U8 u8Limit); 256 extern void HAL_AVD_AFEC_SetChannelChange (void); 257 extern void HAL_AVD_AFEC_SetColorStripe(MS_U8 u8Value); 258 extern MS_BOOL HAL_AVD_COMB_Get3dCombTimingCheck(void); 259 extern void HAL_AVD_COMB_SetMemoryProtect (MS_U32 u32COMB_3D_Addr, MS_U32 u32COMB_3D_Len); 260 #ifdef AVD_COMB_3D_MID 261 extern void HAL_AVD_COMB_Set3dCombMid(MS_BOOL bEnable); 262 #endif 263 extern void HAL_AVD_COMB_Set3dComb(MS_BOOL bEnable); 264 extern void HAL_AVD_COMB_Set3dCombSpeed(MS_U8 u8COMB57, MS_U8 u8COMB58, MS_U8 u8COMB5F); 265 extern void HAL_AVD_COMB_Set3dDetectionTolerance(MS_U8 u8Threshold); 266 extern void HAL_AVD_COMB_Set3dFineTune(MS_BOOL bEnable); 267 extern void HAL_AVD_COMB_SetF2(MS_U8 u8Value); 268 extern void HAL_AVD_COMB_SetNonStandardFSC(MS_BOOL bIsPAL,MS_BOOL bIsNonstandard); 269 extern void HAL_AVD_COMB_SetYCPipe(MS_U8 u8YCPipe); 270 extern void HAL_AVD_COMB_SetCbCrInverse(MS_U8 u8CbCrInverse); 271 extern void HAL_AVD_COMB_SetVerticalTimingDetectMode(MS_U8 u8Mode); 272 extern void HAL_AVD_COMB_SetLineBufferMode(MS_U8 u8Mode); 273 extern void HAL_AVD_COMB_SetNonStandardHtotal(MS_BOOL bEnable); 274 extern void HAL_AVD_COMB_SetHtotal(MS_U16 u16Htotal); 275 extern void HAL_AVD_COMB_SetHsyncTolerance(MS_U8 u8Tolerance); 276 extern void HAL_AVD_COMB_SetMemoryRequest(MS_BOOL bEnable); 277 extern void HAL_AVD_VBI_SetTTSigDetSel(MS_BOOL bEnable); 278 extern void HAL_AVD_VBI_SetVPSPhaseAcc(MS_U16 u16Parameter); 279 extern MS_U8 HAL_AVD_GetReg(MS_U16 u16Addr); 280 extern void HAL_AVD_SetReg(MS_U16 u16Addr, MS_U8 u8Value); 281 extern void HAL_AVD_SetPQFineTune(void); 282 extern MS_U8 HAL_AVD_GetHsyncEdge(void); 283 extern void HAL_AVD_Set2D3DPatchOnOff(MS_BOOL bEnable); 284 extern void HAL_AVD_AFEC_BackPorchWindowPosition(MS_BOOL bEnable ,MS_U8 u8Value); 285 extern void HAL_AVD_SetDSPCodeType(MS_U32 u32VDPatchFlag); 286 extern void HAL_AVD_ShiftClk(AVD_ATV_CLK_TYPE eShiftMode, AVD_VideoStandardType eStandard,MS_U32 u32XTAL_Clock); 287 extern MS_BOOL HAL_AVD_AFEC_GetMacroVisionDetect(void); 288 extern MS_BOOL HAL_AVD_VBI_GetCGMSDetect(void); 289 extern void HAL_AVD_SetBurstWinStart(MS_U8 u8BusrtStartPosition); 290 #endif // _HAL_AVD_H_ 291 292