1*53ee8cc1Swenshuai.xi //<MStar Software> 2*53ee8cc1Swenshuai.xi //****************************************************************************** 3*53ee8cc1Swenshuai.xi // MStar Software 4*53ee8cc1Swenshuai.xi // Copyright (c) 2010 - 2012 MStar Semiconductor, Inc. All rights reserved. 5*53ee8cc1Swenshuai.xi // All software, firmware and related documentation herein ("MStar Software") are 6*53ee8cc1Swenshuai.xi // intellectual property of MStar Semiconductor, Inc. ("MStar") and protected by 7*53ee8cc1Swenshuai.xi // law, including, but not limited to, copyright law and international treaties. 8*53ee8cc1Swenshuai.xi // Any use, modification, reproduction, retransmission, or republication of all 9*53ee8cc1Swenshuai.xi // or part of MStar Software is expressly prohibited, unless prior written 10*53ee8cc1Swenshuai.xi // permission has been granted by MStar. 11*53ee8cc1Swenshuai.xi // 12*53ee8cc1Swenshuai.xi // By accessing, browsing and/or using MStar Software, you acknowledge that you 13*53ee8cc1Swenshuai.xi // have read, understood, and agree, to be bound by below terms ("Terms") and to 14*53ee8cc1Swenshuai.xi // comply with all applicable laws and regulations: 15*53ee8cc1Swenshuai.xi // 16*53ee8cc1Swenshuai.xi // 1. MStar shall retain any and all right, ownership and interest to MStar 17*53ee8cc1Swenshuai.xi // Software and any modification/derivatives thereof. 18*53ee8cc1Swenshuai.xi // No right, ownership, or interest to MStar Software and any 19*53ee8cc1Swenshuai.xi // modification/derivatives thereof is transferred to you under Terms. 20*53ee8cc1Swenshuai.xi // 21*53ee8cc1Swenshuai.xi // 2. You understand that MStar Software might include, incorporate or be 22*53ee8cc1Swenshuai.xi // supplied together with third party`s software and the use of MStar 23*53ee8cc1Swenshuai.xi // Software may require additional licenses from third parties. 24*53ee8cc1Swenshuai.xi // Therefore, you hereby agree it is your sole responsibility to separately 25*53ee8cc1Swenshuai.xi // obtain any and all third party right and license necessary for your use of 26*53ee8cc1Swenshuai.xi // such third party`s software. 27*53ee8cc1Swenshuai.xi // 28*53ee8cc1Swenshuai.xi // 3. MStar Software and any modification/derivatives thereof shall be deemed as 29*53ee8cc1Swenshuai.xi // MStar`s confidential information and you agree to keep MStar`s 30*53ee8cc1Swenshuai.xi // confidential information in strictest confidence and not disclose to any 31*53ee8cc1Swenshuai.xi // third party. 32*53ee8cc1Swenshuai.xi // 33*53ee8cc1Swenshuai.xi // 4. MStar Software is provided on an "AS IS" basis without warranties of any 34*53ee8cc1Swenshuai.xi // kind. Any warranties are hereby expressly disclaimed by MStar, including 35*53ee8cc1Swenshuai.xi // without limitation, any warranties of merchantability, non-infringement of 36*53ee8cc1Swenshuai.xi // intellectual property rights, fitness for a particular purpose, error free 37*53ee8cc1Swenshuai.xi // and in conformity with any international standard. You agree to waive any 38*53ee8cc1Swenshuai.xi // claim against MStar for any loss, damage, cost or expense that you may 39*53ee8cc1Swenshuai.xi // incur related to your use of MStar Software. 40*53ee8cc1Swenshuai.xi // In no event shall MStar be liable for any direct, indirect, incidental or 41*53ee8cc1Swenshuai.xi // consequential damages, including without limitation, lost of profit or 42*53ee8cc1Swenshuai.xi // revenues, lost or damage of data, and unauthorized system use. 43*53ee8cc1Swenshuai.xi // You agree that this Section 4 shall still apply without being affected 44*53ee8cc1Swenshuai.xi // even if MStar Software has been modified by MStar in accordance with your 45*53ee8cc1Swenshuai.xi // request or instruction for your use, except otherwise agreed by both 46*53ee8cc1Swenshuai.xi // parties in writing. 47*53ee8cc1Swenshuai.xi // 48*53ee8cc1Swenshuai.xi // 5. If requested, MStar may from time to time provide technical supports or 49*53ee8cc1Swenshuai.xi // services in relation with MStar Software to you for your use of 50*53ee8cc1Swenshuai.xi // MStar Software in conjunction with your or your customer`s product 51*53ee8cc1Swenshuai.xi // ("Services"). 52*53ee8cc1Swenshuai.xi // You understand and agree that, except otherwise agreed by both parties in 53*53ee8cc1Swenshuai.xi // writing, Services are provided on an "AS IS" basis and the warranty 54*53ee8cc1Swenshuai.xi // disclaimer set forth in Section 4 above shall apply. 55*53ee8cc1Swenshuai.xi // 56*53ee8cc1Swenshuai.xi // 6. Nothing contained herein shall be construed as by implication, estoppels 57*53ee8cc1Swenshuai.xi // or otherwise: 58*53ee8cc1Swenshuai.xi // (a) conferring any license or right to use MStar name, trademark, service 59*53ee8cc1Swenshuai.xi // mark, symbol or any other identification; 60*53ee8cc1Swenshuai.xi // (b) obligating MStar or any of its affiliates to furnish any person, 61*53ee8cc1Swenshuai.xi // including without limitation, you and your customers, any assistance 62*53ee8cc1Swenshuai.xi // of any kind whatsoever, or any information; or 63*53ee8cc1Swenshuai.xi // (c) conferring any license or right under any intellectual property right. 64*53ee8cc1Swenshuai.xi // 65*53ee8cc1Swenshuai.xi // 7. These terms shall be governed by and construed in accordance with the laws 66*53ee8cc1Swenshuai.xi // of Taiwan, R.O.C., excluding its conflict of law rules. 67*53ee8cc1Swenshuai.xi // Any and all dispute arising out hereof or related hereto shall be finally 68*53ee8cc1Swenshuai.xi // settled by arbitration referred to the Chinese Arbitration Association, 69*53ee8cc1Swenshuai.xi // Taipei in accordance with the ROC Arbitration Law and the Arbitration 70*53ee8cc1Swenshuai.xi // Rules of the Association by three (3) arbitrators appointed in accordance 71*53ee8cc1Swenshuai.xi // with the said Rules. 72*53ee8cc1Swenshuai.xi // The place of arbitration shall be in Taipei, Taiwan and the language shall 73*53ee8cc1Swenshuai.xi // be English. 74*53ee8cc1Swenshuai.xi // The arbitration award shall be final and binding to both parties. 75*53ee8cc1Swenshuai.xi // 76*53ee8cc1Swenshuai.xi //****************************************************************************** 77*53ee8cc1Swenshuai.xi //<MStar Software> 78*53ee8cc1Swenshuai.xi //////////////////////////////////////////////////////////////////////////////// 79*53ee8cc1Swenshuai.xi // 80*53ee8cc1Swenshuai.xi // Copyright (c) 2008-2009 MStar Semiconductor, Inc. 81*53ee8cc1Swenshuai.xi // All rights reserved. 82*53ee8cc1Swenshuai.xi // 83*53ee8cc1Swenshuai.xi // Unless otherwise stipulated in writing, any and all information contained 84*53ee8cc1Swenshuai.xi // herein regardless in any format shall remain the sole proprietary of 85*53ee8cc1Swenshuai.xi // MStar Semiconductor Inc. and be kept in strict confidence 86*53ee8cc1Swenshuai.xi // ("MStar Confidential Information") by the recipient. 87*53ee8cc1Swenshuai.xi // Any unauthorized act including without limitation unauthorized disclosure, 88*53ee8cc1Swenshuai.xi // copying, use, reproduction, sale, distribution, modification, disassembling, 89*53ee8cc1Swenshuai.xi // reverse engineering and compiling of the contents of MStar Confidential 90*53ee8cc1Swenshuai.xi // Information is unlawful and strictly prohibited. MStar hereby reserves the 91*53ee8cc1Swenshuai.xi // rights to any and all damages, losses, costs and expenses resulting therefrom. 92*53ee8cc1Swenshuai.xi // 93*53ee8cc1Swenshuai.xi //////////////////////////////////////////////////////////////////////////////// 94*53ee8cc1Swenshuai.xi 95*53ee8cc1Swenshuai.xi #ifndef _HAL_AVD_H_ 96*53ee8cc1Swenshuai.xi #define _HAL_AVD_H_ 97*53ee8cc1Swenshuai.xi 98*53ee8cc1Swenshuai.xi #ifndef UNUSED 99*53ee8cc1Swenshuai.xi #define UNUSED(x) ((x)=(x)) 100*53ee8cc1Swenshuai.xi #endif 101*53ee8cc1Swenshuai.xi 102*53ee8cc1Swenshuai.xi #define AVD_PAULO_1_A 0 103*53ee8cc1Swenshuai.xi #define AVD_PAULO_1_B 1 // Paulo1, Paulo2 104*53ee8cc1Swenshuai.xi #define AVD_PAULO_2_A 2 105*53ee8cc1Swenshuai.xi #define AVD_SATURN_A 10 // S1 106*53ee8cc1Swenshuai.xi #define AVD_LOLA_A 20 // Lola, Lomeo, S2, S3, Neptune 107*53ee8cc1Swenshuai.xi #define AVD_LATTE_A 21 // Latte, Laser 108*53ee8cc1Swenshuai.xi #define AVD_MOSES_A 22 // Moses 109*53ee8cc1Swenshuai.xi #define AVD_ERIS_A 23 // Eris,Pluto,T1,T2 110*53ee8cc1Swenshuai.xi #define AVD_EUCLID_A 24 // Euclid(13K code size with SPL2/DPL2) 111*53ee8cc1Swenshuai.xi // For New Version VD MCU below 112*53ee8cc1Swenshuai.xi #define AVD_LOPEZ_A 30 // Lopez,Metis,Martina 113*53ee8cc1Swenshuai.xi #define AVD_MUSE_A 31 // Maria5 114*53ee8cc1Swenshuai.xi #define AVD_RAPHAEL_A 32 // Rapfael 115*53ee8cc1Swenshuai.xi #define AVD_TITANIA3_A 33 // T3 116*53ee8cc1Swenshuai.xi #define AVD_METIS_A 34 // Metis,Martina 117*53ee8cc1Swenshuai.xi #define AVD_TITANIA4_A 35 // T4,T7,Janus 118*53ee8cc1Swenshuai.xi #define AVD_AMBER1_A 36 // Amber1,Amber5 119*53ee8cc1Swenshuai.xi #define AVD_AMBER7_A 37//Amber7,Agate,Amethyst,Eagle 120*53ee8cc1Swenshuai.xi 121*53ee8cc1Swenshuai.xi #define VD_CHIP_VERSION AVD_AMBER7_A 122*53ee8cc1Swenshuai.xi 123*53ee8cc1Swenshuai.xi // 20090812 turn off MID function temporarily because of COMB bug, 1 124*53ee8cc1Swenshuai.xi //#define AVD_COMB_3D_MID 1 125*53ee8cc1Swenshuai.xi #if((VD_CHIP_VERSION>=AVD_TITANIA3_A)) 126*53ee8cc1Swenshuai.xi #define NEW_VD_MCU 1 127*53ee8cc1Swenshuai.xi #else 128*53ee8cc1Swenshuai.xi #define NEW_VD_MCU 0 129*53ee8cc1Swenshuai.xi #endif 130*53ee8cc1Swenshuai.xi #if((VD_CHIP_VERSION==AVD_AMBER1_A)) 131*53ee8cc1Swenshuai.xi #define TWO_VD_DSP_CODE 1 132*53ee8cc1Swenshuai.xi #else 133*53ee8cc1Swenshuai.xi #define TWO_VD_DSP_CODE 0 134*53ee8cc1Swenshuai.xi #endif 135*53ee8cc1Swenshuai.xi #if ((VD_CHIP_VERSION==AVD_TITANIA4_A)) 136*53ee8cc1Swenshuai.xi #define LOAD_CODE_BYTE_WRITE_ONLY 1 137*53ee8cc1Swenshuai.xi #else 138*53ee8cc1Swenshuai.xi #define LOAD_CODE_BYTE_WRITE_ONLY 0 139*53ee8cc1Swenshuai.xi #endif 140*53ee8cc1Swenshuai.xi #if ((VD_CHIP_VERSION==AVD_TITANIA3_A)) 141*53ee8cc1Swenshuai.xi #define T3_LOAD_CODE 1 142*53ee8cc1Swenshuai.xi #else 143*53ee8cc1Swenshuai.xi #define T3_LOAD_CODE 0 144*53ee8cc1Swenshuai.xi #endif 145*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 146*53ee8cc1Swenshuai.xi // Macro and Define 147*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 148*53ee8cc1Swenshuai.xi #define FSC_AUTO_DET_ENABLE 0x00 149*53ee8cc1Swenshuai.xi #define FSC_AUTO_DET_DISABLE 0x01 150*53ee8cc1Swenshuai.xi 151*53ee8cc1Swenshuai.xi #define FSC_MODE_PAL 0x00 152*53ee8cc1Swenshuai.xi #define FSC_MODE_SECAM 0x01 153*53ee8cc1Swenshuai.xi #define FSC_MODE_NTSC 0x02 154*53ee8cc1Swenshuai.xi #define FSC_MODE_NTSC_443 0x03 155*53ee8cc1Swenshuai.xi #define FSC_MODE_PAL_M 0x04 156*53ee8cc1Swenshuai.xi #define FSC_MODE_PAL_60 0x05 157*53ee8cc1Swenshuai.xi #define FSC_MODE_PAL_N 0x06 158*53ee8cc1Swenshuai.xi 159*53ee8cc1Swenshuai.xi #define AVD_AGC_ENABLE 0x00 160*53ee8cc1Swenshuai.xi #define AVD_AGC_DISABLE 0x03 161*53ee8cc1Swenshuai.xi 162*53ee8cc1Swenshuai.xi #define AVD_DSP_CODE_TYPE_VIF 0 163*53ee8cc1Swenshuai.xi #define AVD_DSP_CODE_TYPE_ADC 1 164*53ee8cc1Swenshuai.xi 165*53ee8cc1Swenshuai.xi // Coarse Gain Define 166*53ee8cc1Swenshuai.xi #if (VD_CHIP_VERSION==AVD_AMBER1_A) // Brian 20110428 A1 & A5 ADC gain mapping are different 167*53ee8cc1Swenshuai.xi #define VD_AGC_COARSE_GAIN 0xE // 4'b:1110 0.857 168*53ee8cc1Swenshuai.xi #else 169*53ee8cc1Swenshuai.xi #define VD_AGC_COARSE_GAIN 0xA // 4'b:1010 0.867 170*53ee8cc1Swenshuai.xi #endif 171*53ee8cc1Swenshuai.xi 172*53ee8cc1Swenshuai.xi //#define VD_AGC_COARSE_GAIN_X_0_5 0 // x0.5 173*53ee8cc1Swenshuai.xi //#define VD_AGC_COARSE_GAIN_X_1 1 // x1 174*53ee8cc1Swenshuai.xi //#define VD_AGC_COARSE_GAIN_X_2 2 // x2 175*53ee8cc1Swenshuai.xi //#define VD_AGC_COARSE_GAIN_X_4 3 // x4 176*53ee8cc1Swenshuai.xi 177*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 178*53ee8cc1Swenshuai.xi // Type and Structure 179*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 180*53ee8cc1Swenshuai.xi //CLK_VDMCU clock setting 181*53ee8cc1Swenshuai.xi //[0]: disable clock 182*53ee8cc1Swenshuai.xi //[1]: invert clock 183*53ee8cc1Swenshuai.xi //[4:2]: 184*53ee8cc1Swenshuai.xi // 000: 170MHz (MPLL_DIV_BUF) 185*53ee8cc1Swenshuai.xi // 001: 160HMz 186*53ee8cc1Swenshuai.xi // 010: 144MHz 187*53ee8cc1Swenshuai.xi // 011: 123MHz 188*53ee8cc1Swenshuai.xi // 100: 108MHz 189*53ee8cc1Swenshuai.xi // 101: mem_clock 190*53ee8cc1Swenshuai.xi // 110: mem_clock div 2 191*53ee8cc1Swenshuai.xi // 111: select XTAL 192*53ee8cc1Swenshuai.xi 193*53ee8cc1Swenshuai.xi typedef enum 194*53ee8cc1Swenshuai.xi { 195*53ee8cc1Swenshuai.xi AVD_VDMCU_CLOCK_170Mhz, 196*53ee8cc1Swenshuai.xi AVD_VDMCU_CLOCK_160Mhz, 197*53ee8cc1Swenshuai.xi AVD_VDMCU_CLOCK_144Mhz, 198*53ee8cc1Swenshuai.xi AVD_VDMCU_CLOCK_123Mhz, 199*53ee8cc1Swenshuai.xi AVD_VDMCU_CLOCK_108Mhz, 200*53ee8cc1Swenshuai.xi AVD_VDMCU_CLOCK_MEM, 201*53ee8cc1Swenshuai.xi AVD_VDMCU_CLOCK_MEM_DIV2, 202*53ee8cc1Swenshuai.xi AVD_VDMCU_CLOCK_XTAL, 203*53ee8cc1Swenshuai.xi AVD_VDMCU_CLOCK_54Mhz, // for drvavd.c compatibility, will set to 108Mhz 204*53ee8cc1Swenshuai.xi AVD_VDMCU_CLOCK_86Mhz, // for drvavd.c compatibility, will set to 108Mhz 205*53ee8cc1Swenshuai.xi } AVD_VDMCUClockSpeed; 206*53ee8cc1Swenshuai.xi 207*53ee8cc1Swenshuai.xi typedef enum 208*53ee8cc1Swenshuai.xi { 209*53ee8cc1Swenshuai.xi AVD_VDMCU_CLOCK_NORMAL, 210*53ee8cc1Swenshuai.xi AVD_VDMCU_CLOCK_INV, 211*53ee8cc1Swenshuai.xi } AVD_VDMCUClockInverse; 212*53ee8cc1Swenshuai.xi 213*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 214*53ee8cc1Swenshuai.xi // Function and Variable 215*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 216*53ee8cc1Swenshuai.xi extern const MS_U8 _u8VdDecInitialize[]; 217*53ee8cc1Swenshuai.xi extern void HAL_AVD_ADC_SetGMC(MS_U8 u8Value); 218*53ee8cc1Swenshuai.xi extern void HAL_AVD_VDMCU_SoftStop (void); 219*53ee8cc1Swenshuai.xi extern void HAL_AVD_VDMCU_SetFreeze (MS_BOOL bEnable); 220*53ee8cc1Swenshuai.xi extern void HAL_AVD_VDMCU_SetClock (AVD_VDMCUClockSpeed eClock, AVD_VDMCUClockInverse eInverse); 221*53ee8cc1Swenshuai.xi extern void HAL_AVD_AFEC_SetClockSource(MS_BOOL bSource); 222*53ee8cc1Swenshuai.xi extern void HAL_AVD_VDMCU_LoadDSP(const MS_U8 *pu8VD_DSP, MS_U32 len); 223*53ee8cc1Swenshuai.xi extern void HAL_AVD_RegInit (void); 224*53ee8cc1Swenshuai.xi extern void HAL_AVD_RegInitExt(MS_U8 *_u8VdDecInitializeExt); 225*53ee8cc1Swenshuai.xi extern MS_U16 HAL_AVD_AFEC_GetStatus(void); 226*53ee8cc1Swenshuai.xi extern MS_BOOL HAL_AVD_AFEC_GetHWHsync(void); 227*53ee8cc1Swenshuai.xi extern MS_BOOL HAL_AVD_AFEC_GetBurstOn(void); 228*53ee8cc1Swenshuai.xi extern MS_BOOL HAL_AVD_AFEC_GetCoChannelOn(void); 229*53ee8cc1Swenshuai.xi extern MS_U16 HAL_AVD_AFEC_GetVTotal(void); 230*53ee8cc1Swenshuai.xi extern MS_U16 HAL_AVD_AFEC_GetHTotal(void); 231*53ee8cc1Swenshuai.xi extern MS_U8 HAL_AVD_AFEC_GetNoiseMag(void); 232*53ee8cc1Swenshuai.xi extern void HAL_AVD_AFEC_McuReset(void); 233*53ee8cc1Swenshuai.xi extern void HAL_AVD_AFEC_SetClock(MS_BOOL bEnable); 234*53ee8cc1Swenshuai.xi extern void HAL_AVD_AFEC_SetPatchFlag(MS_U32 u32VDPatchFlag); 235*53ee8cc1Swenshuai.xi extern void HAL_AVD_AFEC_SetInput(AVD_InputSourceType eSource, MS_U8 u8ScartFB, AVD_DemodType eDemodType, MS_U32 u32XTAL_Clock); 236*53ee8cc1Swenshuai.xi extern void HAL_AVD_AFEC_SetRegFromDSP (void); 237*53ee8cc1Swenshuai.xi extern void HAL_AVD_AFEC_SetHTotal (MS_U32 u32HTotal); 238*53ee8cc1Swenshuai.xi extern void HAL_AVD_AFEC_SetVtotal (MS_U8 u8Mode); 239*53ee8cc1Swenshuai.xi extern void HAL_AVD_AFEC_SetBT656Width (MS_U8 u8BT656Width); 240*53ee8cc1Swenshuai.xi extern void HAL_AVD_AFEC_EnableForceMode (MS_BOOL bEnable); 241*53ee8cc1Swenshuai.xi extern void HAL_AVD_AFEC_SetFSCMode (MS_U8 u8FSCMode); 242*53ee8cc1Swenshuai.xi extern void HAL_AVD_AFEC_EnableCVBSLPF(MS_BOOL bEnable); 243*53ee8cc1Swenshuai.xi extern void HAL_AVD_AFEC_EnableBottomAverage(MS_BOOL bEnable); 244*53ee8cc1Swenshuai.xi extern void HAL_AVD_AFEC_EnableVBIDPLSpeedup(MS_BOOL bEnable); 245*53ee8cc1Swenshuai.xi extern void HAL_AVD_AFEC_AGCSetMode (MS_U8 u8AgcMode); 246*53ee8cc1Swenshuai.xi extern void HAL_AVD_AFEC_AGCSetCoarseGain (MS_U8 u8AgcCoarseGain); 247*53ee8cc1Swenshuai.xi extern void HAL_AVD_AFEC_AGCSetFineGain (MS_U8 u8AgcFineGain); 248*53ee8cc1Swenshuai.xi extern void HAL_AVD_AFEC_SetColorKillLevel (MS_U8 u8ColorKillLevel); 249*53ee8cc1Swenshuai.xi extern void HAL_AVD_AFEC_SetHsyncSensitivity(VD_HSYNC_SENSITIVITY eVDHsyncSensitivityTuning); 250*53ee8cc1Swenshuai.xi extern void HAL_AVD_AFEC_SetSwingLimit(MS_U8 u8Limit); 251*53ee8cc1Swenshuai.xi extern void HAL_AVD_AFEC_SetChannelChange (void); 252*53ee8cc1Swenshuai.xi extern void HAL_AVD_AFEC_SetColorStripe(MS_U8 u8Value); 253*53ee8cc1Swenshuai.xi extern MS_BOOL HAL_AVD_COMB_Get3dCombTimingCheck(void); 254*53ee8cc1Swenshuai.xi extern void HAL_AVD_COMB_SetMemoryProtect (MS_PHY u32COMB_3D_Addr, MS_U32 u32COMB_3D_Len); 255*53ee8cc1Swenshuai.xi #ifdef AVD_COMB_3D_MID 256*53ee8cc1Swenshuai.xi extern void HAL_AVD_COMB_Set3dCombMid(MS_BOOL bEnable); 257*53ee8cc1Swenshuai.xi #endif 258*53ee8cc1Swenshuai.xi extern void HAL_AVD_COMB_Set3dComb(MS_BOOL bEnable); 259*53ee8cc1Swenshuai.xi extern void HAL_AVD_COMB_Set3dCombSpeed(MS_U8 u8COMB57, MS_U8 u8COMB58, MS_U8 u8COMB5F); 260*53ee8cc1Swenshuai.xi extern void HAL_AVD_COMB_Set3dDetectionTolerance(MS_U8 u8Threshold); 261*53ee8cc1Swenshuai.xi extern void HAL_AVD_COMB_Set3dFineTune(MS_BOOL bEnable); 262*53ee8cc1Swenshuai.xi extern void HAL_AVD_COMB_SetF2(MS_U8 u8Value); 263*53ee8cc1Swenshuai.xi extern void HAL_AVD_COMB_SetNonStandardFSC(MS_BOOL bIsPAL,MS_BOOL bIsNonstandard); 264*53ee8cc1Swenshuai.xi extern void HAL_AVD_COMB_SetYCPipe(MS_U8 u8YCPipe); 265*53ee8cc1Swenshuai.xi extern void HAL_AVD_COMB_SetCbCrInverse(MS_U8 u8CbCrInverse); 266*53ee8cc1Swenshuai.xi extern void HAL_AVD_COMB_SetVerticalTimingDetectMode(MS_U8 u8Mode); 267*53ee8cc1Swenshuai.xi extern void HAL_AVD_COMB_SetLineBufferMode(MS_U8 u8Mode); 268*53ee8cc1Swenshuai.xi extern void HAL_AVD_COMB_SetNonStandardHtotal(MS_BOOL bEnable); 269*53ee8cc1Swenshuai.xi extern void HAL_AVD_COMB_SetHtotal(MS_U16 u16Htotal); 270*53ee8cc1Swenshuai.xi extern void HAL_AVD_COMB_SetHsyncTolerance(MS_U8 u8Tolerance); 271*53ee8cc1Swenshuai.xi extern void HAL_AVD_COMB_SetMemoryRequest(MS_BOOL bEnable); 272*53ee8cc1Swenshuai.xi extern void HAL_AVD_VBI_SetTTSigDetSel(MS_BOOL bEnable); 273*53ee8cc1Swenshuai.xi extern void HAL_AVD_VBI_SetVPSPhaseAcc(MS_U16 u16Parameter); 274*53ee8cc1Swenshuai.xi extern MS_U8 HAL_AVD_GetReg(MS_U16 u16Addr); 275*53ee8cc1Swenshuai.xi extern void HAL_AVD_SetReg(MS_U16 u16Addr, MS_U8 u8Value); 276*53ee8cc1Swenshuai.xi extern void HAL_AVD_SetPQFineTune(void); 277*53ee8cc1Swenshuai.xi extern MS_U8 HAL_AVD_GetHsyncEdge(void); 278*53ee8cc1Swenshuai.xi extern void HAL_AVD_Set2D3DPatchOnOff(MS_BOOL bEnable); 279*53ee8cc1Swenshuai.xi extern void HAL_AVD_AFEC_BackPorchWindowPosition(MS_BOOL bEnable ,MS_U8 u8Value); 280*53ee8cc1Swenshuai.xi extern void HAL_AVD_SetDSPCodeType(MS_BOOL bEnable); 281*53ee8cc1Swenshuai.xi extern void HAL_AVD_ShiftClk(AVD_ATV_CLK_TYPE eShiftMode, AVD_VideoStandardType eStandard,MS_U32 u32XTAL_Clock); 282*53ee8cc1Swenshuai.xi extern MS_BOOL HAL_AVD_AFEC_GetMacroVisionDetect(void); 283*53ee8cc1Swenshuai.xi extern MS_BOOL HAL_AVD_VBI_GetCGMSDetect(void); 284*53ee8cc1Swenshuai.xi #endif // _HAL_AVD_H_ 285*53ee8cc1Swenshuai.xi 286