1 //<MStar Software>
2 //******************************************************************************
3 // MStar Software
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76 //******************************************************************************
77 //<MStar Software>
78 ////////////////////////////////////////////////////////////////////////////////
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92 //
93 ////////////////////////////////////////////////////////////////////////////////
94
95 #define _HAL_VBI_C
96
97 //-------------------------------------------------------------------------------------------------
98 // Include Files
99 //-------------------------------------------------------------------------------------------------
100 // Common Definition
101 #include "MsCommon.h"
102
103 // Internal Definition
104 #include "halVBI.h"
105 #include "regVBI.h"
106
107 //-------------------------------------------------------------------------------------------------
108 // Driver Compiler Options
109 //-------------------------------------------------------------------------------------------------
110 #define INTERFACE extern
111
112 //-------------------------------------------------------------------------------------------------
113 // Local Defines
114 //-------------------------------------------------------------------------------------------------
115 #define MAKEWORD(a,b) ((((MS_U16)((MS_U8) (a)))<<8) | ((MS_U16)((MS_U8) (b))))
116
117 #define R1BYTE(Addr, u8mask) \
118 (READ_BYTE (_ptrVBIRiuBaseAddr + ((Addr) << 1) - ((Addr) & 1)) & (u8mask))
119
120 #define W1BYTE(Addr, u8Val, u8mask) \
121 (WRITE_BYTE(_ptrVBIRiuBaseAddr + ((Addr) << 1) - ((Addr) & 1), (R1BYTE(Addr, 0xFF) & ~(u8mask)) | ((u8Val) & (u8mask))))
122
123 ///////////////////////////////////////////////////////////////
124 #define MDrv_WriteByte( Reg, u8Val ) \
125 do { \
126 (WRITE_BYTE(_ptrVBIRiuBaseAddr + ((Reg) << 1) - ((Reg) & 1), u8Val)); \
127 }while(0)
128
129 #define MDrv_WriteWord( Reg, u16Val ) \
130 do { \
131 (WRITE_WORD(_ptrVBIRiuBaseAddr + ((Reg) << 1), u16Val)); \
132 }while(0)
133
134 #define MDrv_WriteByteMask( Reg, u8Val, u8Mask ) \
135 do { \
136 (WRITE_BYTE(_ptrVBIRiuBaseAddr + ((Reg) << 1) - ((Reg) & 1), (R1BYTE((Reg), 0xFF) & ~(u8Mask)) | ((u8Val) & (u8Mask)))); \
137 }while(0)
138
139 #define MDrv_ReadByte( Reg) (READ_BYTE (_ptrVBIRiuBaseAddr + ((Reg) << 1) - ((Reg) & 1)))
140
141 #define _BIT0 BIT(0)
142 #define _BIT1 BIT(1)
143 #define _BIT2 BIT(2)
144 #define _BIT3 BIT(3)
145 #define _BIT4 BIT(4)
146 #define _BIT5 BIT(5)
147 #define _BIT6 BIT(6)
148 #define _BIT7 BIT(7)
149 #define _BIT8 BIT(8)
150 #define _BIT9 BIT(9)
151 #define _BIT10 BIT(10)
152 #define _BIT11 BIT(11)
153 #define _BIT12 BIT(12)
154 #define _BIT13 BIT(13)
155 #define _BIT14 BIT(14)
156 #define _BIT15 BIT(15)
157
158 typedef enum
159 {
160 VBI_FIELD_EVEN,
161 VBI_FIELD_ODD
162 } EN_VBI_FIELD;
163
164 #define BK_VBI_E7_BUG 1
165 //-------------------------------------------------------------------------------------------------
166 // Local Structures
167 //-------------------------------------------------------------------------------------------------
168
169
170 //-------------------------------------------------------------------------------------------------
171 // Global Variables
172 //-------------------------------------------------------------------------------------------------
173
174
175 //-------------------------------------------------------------------------------------------------
176 // Local Variables
177 //-------------------------------------------------------------------------------------------------
178 static MS_VIRT _ptrVBIRiuBaseAddr;
179
180 //-------------------------------------------------------------------------------------------------
181 // Debug Functions
182 //-------------------------------------------------------------------------------------------------
183
184
185 //-------------------------------------------------------------------------------------------------
186 // Local Functions
187 //-------------------------------------------------------------------------------------------------
HAL_VBI_ReadByte(MS_U32 u32RegAddr)188 MS_U8 HAL_VBI_ReadByte(MS_U32 u32RegAddr)
189 {
190 return (MDrv_ReadByte(u32RegAddr));
191 }
192
HAL_VBI_Read2Byte(MS_U32 u32RegAddr)193 MS_U16 HAL_VBI_Read2Byte(MS_U32 u32RegAddr)
194 {
195 return ((MDrv_ReadByte(u32RegAddr)) + ((MDrv_ReadByte(u32RegAddr + 1))<<8));
196 }
197
HAL_VBI_WriteByte(MS_U32 u32RegAddr,MS_U8 val)198 void HAL_VBI_WriteByte(MS_U32 u32RegAddr, MS_U8 val)
199 {
200 MDrv_WriteByte(u32RegAddr, val);
201 }
202
HAL_VBI_Write2Byte(MS_U32 u32RegAddr,MS_U16 val)203 void HAL_VBI_Write2Byte(MS_U32 u32RegAddr, MS_U16 val)
204 {
205 MDrv_WriteByte(u32RegAddr, (val & 0xFF));
206 MDrv_WriteByte(u32RegAddr + 1, (val>>8));
207 }
208
HAL_VBI_WriteWord(MS_U32 u32RegAddr,MS_U16 val)209 void HAL_VBI_WriteWord(MS_U32 u32RegAddr, MS_U16 val)
210 {
211 if (u32RegAddr & 0x01)
212 printf("[VBI][%s] ERROR, not alignment address", __FUNCTION__);
213
214 MDrv_WriteWord(u32RegAddr, val);
215 }
216
HAL_VBI_WriteByteMask(MS_U32 u32RegAddr,MS_U8 val,MS_U8 mask)217 void HAL_VBI_WriteByteMask(MS_U32 u32RegAddr, MS_U8 val, MS_U8 mask)
218 {
219 MDrv_WriteByteMask(u32RegAddr, val, mask);
220 }
221
222 //-------------------------------------------------------------------------------------------------
223 // Global Functions
224 //-------------------------------------------------------------------------------------------------
VBI_TTXInit(MS_VIRT ptrAddr)225 void VBI_TTXInit(MS_VIRT ptrAddr)
226 {
227 _ptrVBIRiuBaseAddr = ptrAddr;
228
229 // close caption slicer threshold mode
230 HAL_VBI_WriteByte(BK_VBI_40, 0x01);
231
232 // close caption line start 1 (lower 3 bits) = 0
233 // close caption lin end 1 = 0
234 HAL_VBI_WriteByte(BK_VBI_41, 0x00);
235
236 // close caption line start 2 = 0
237 // close caption CRI zero crossing type : positive edge
238 // close caption clock run-in amplitude upper threshold (upper 2 bits) = 0b01
239 HAL_VBI_WriteByte(BK_VBI_50, 0x60);
240
241 // close caption line end 2 = 0
242 // close caption multi-line acquisition mode : 1
243 // close caption zero crossing mode : normal.
244 // close caption SYNC Found enable mode : 1
245 HAL_VBI_WriteByte(BK_VBI_51, 0xA0);
246
247 // teletext clock run-in amplitude accumulation start point. : 0b00010001
248 // For eye-height testing
249 HAL_VBI_WriteByte(BK_VBI_77, 0x11);
250
251 // teletext clock run-in amplitude accumulation start point. : 0b00011010
252 // For SuperVHS decode issue
253 //HAL_VBI_WriteByte(TT_CLK_RUN_IN_START_POINT, 0x1A);
254
255 // teletext VBI line start 1 (odd field) : 0b00100
256 // teletext VBI line end (lower 3 bits) 0b000
257 HAL_VBI_WriteByte(BK_VBI_7C, 0x04);
258
259 // teletext data line end 1 (odd field) : 0b10110
260 // teletext slicer read mode : 0b1
261 // teletext framing code error bond value : 0b0 fully match framing code.
262 // teletext framing code windows mode : 0b0
263 HAL_VBI_WriteByte(BK_VBI_7D, 0x36);
264
265 // teletext data line start 2 (even field) : 0b00100
266 // teletext slicer threshold fixing mode : 0b0 adjust automatically according to TtSidDetSel
267 // teletext slicer level mode : 0b0 original mode.
268 // teletext initial packet counter : 0b1 packet counter increases when teletext packet is detected without upper-bound.
269 HAL_VBI_WriteByte(BK_VBI_7E, 0x84);
270
271 // teletext data line end 2 (even field) : 0b10110
272 // teletext single line point mode : 0b11 Enable ttslptrmode, start from the line when previous line is no teletext.
273 // teletext base address source selecion : 0b1
274 HAL_VBI_WriteByte(BK_VBI_7F, 0xF6);
275
276 HAL_VBI_WriteByte(BK_VBI_81, 0x52);
277 HAL_VBI_WriteByte(BK_VBI_86, 0xD6);
278 HAL_VBI_WriteByte(BK_VBI_89, 0xC2);
279 HAL_VBI_WriteByte(BK_VBI_8A, 0x42);
280 HAL_VBI_WriteByte(BK_VBI_8B, 0x24);
281 HAL_VBI_WriteByte(BK_VBI_8D, 0xA5);
282 HAL_VBI_WriteByte(BK_VBI_90, 0x70);
283 HAL_VBI_WriteByte(BK_VBI_C4, 0x32);
284 HAL_VBI_WriteByte(BK_VBI_CB, 0xC4);
285 HAL_VBI_WriteByte(BK_VBI_CC, 0xBD);
286
287 // For VPS detect speed up
288 HAL_VBI_WriteByte(BK_VBI_B4, 0x42);
289 HAL_VBI_WriteByte(BK_VBI_B5, 0x61);
290 HAL_VBI_WriteByte(BK_VBI_BB, 0x06);
291
292 HAL_VBI_WriteByte(BK_VBI_70,0x80); // enable VPS/WSS
293 }
294
VBI_WSSInit(MS_VIRT ptrAddr)295 void VBI_WSSInit(MS_VIRT ptrAddr)
296 {
297 MS_U8 tmp = 0;
298 _ptrVBIRiuBaseAddr = ptrAddr;
299
300 tmp = HAL_VBI_ReadByte(BK_VBI_BF);
301 tmp &= ~(_BIT6 | _BIT7);
302 HAL_VBI_WriteByte(BK_VBI_BF, tmp);
303
304 HAL_VBI_WriteByte(BK_VBI_70, 0x80); // enable VPS/WSS
305 }
306
VBI_TTX_CheckCircuitReady(void)307 MS_BOOL VBI_TTX_CheckCircuitReady(void)
308 {
309 if( !(HAL_VBI_ReadByte( SLICERREADY ) & _BIT7) )
310 {
311 return FALSE;
312 }
313 else
314 {
315 return TRUE;
316 }
317 }
318
VBI_TTX_GetPacketCount(void)319 MS_U16 VBI_TTX_GetPacketCount(void)
320 {
321 return (MS_U16) HAL_VBI_Read2Byte(VBI_PKTCNT_L);
322 }
323
VBI_GetWSS_Count(void)324 MS_U16 VBI_GetWSS_Count(void)
325 {
326 return (MS_U16) (HAL_VBI_ReadByte(VBI_WSS_COUNT) & 0x07);
327 }
328
VBI_GetVPS_Count(void)329 MS_U16 VBI_GetVPS_Count(void)
330 {
331 return (MS_U16) (HAL_VBI_ReadByte(VBI_VPS_COUNT)>>4);
332 }
333
VBI_TTX_InitSlicer(MS_PHY addr,MS_U16 packetCount)334 void VBI_TTX_InitSlicer(MS_PHY addr, MS_U16 packetCount)
335 {
336 if((addr >> 3) >= (1 << TTX_BUF_BIT))
337 {
338 printf("[VBI][%s] ERROR, buffer address out of bound\n", __FUNCTION__);
339 //MS_ASSERT(0);
340 }
341
342 addr = addr >> 3; /* 8 byte-aligned */
343
344 /* Initial VBI Buffer Start Address */
345 HAL_VBI_Write2Byte(VBI_BASEADDR_L, addr);
346 HAL_VBI_WriteByte(VBI_BASEADDR_H, addr >> 16);
347 if((addr>>24) & 0x0f)
348 HAL_VBI_WriteByte(VBI_BIT24_ADDR, (HAL_VBI_ReadByte(VBI_BIT24_ADDR)&(~0x0f))|((addr>>24) & 0x0f));
349 else
350 HAL_VBI_WriteByte(VBI_BIT24_ADDR, HAL_VBI_ReadByte(VBI_BIT24_ADDR)&(~0x0f));
351
352 /* Initial VBI Buffer Field Number */
353 HAL_VBI_Write2Byte(VBI_BUF_LEN, packetCount); /* no need to minus 1, follow Venus design */
354
355 /* change dram access mode
356 * 0x371F, BIT7 must be always 1 (otherwise the DMA access related function could be error) */
357 HAL_VBI_WriteByte(TTDEC_COMMAND, _BIT1|_BIT7); /* put header packet into VBI without decoder */
358 }
359
VBI_TTX_EnableSlicer(MS_BOOL bEnable)360 void VBI_TTX_EnableSlicer(MS_BOOL bEnable)
361 {
362 if(bEnable)
363 HAL_VBI_WriteByte(TT_ENABLE, HAL_VBI_ReadByte(TT_ENABLE) | _BIT0); // enable TT VBI slicer
364 else
365 HAL_VBI_WriteByte(TT_ENABLE, HAL_VBI_ReadByte(TT_ENABLE) & ~(_BIT0)); // enable TT VBI slicer
366 }
367
VBI_TTX_GetHardware_Indication(void)368 MS_U8 VBI_TTX_GetHardware_Indication(void)
369 {
370 return HAL_VBI_ReadByte(BK_VBI_AF);
371 }
372
VBI_GetVPS_Data(MS_U8 * byte1,MS_U8 * byte2,MS_U8 * byte3,MS_U8 * byte4)373 void VBI_GetVPS_Data(MS_U8 *byte1, MS_U8 *byte2, MS_U8 *byte3, MS_U8 *byte4)
374 {
375 *byte1 = HAL_VBI_ReadByte(BK_VBI_AD);
376 *byte2 = HAL_VBI_ReadByte(BK_VBI_AE);
377 *byte3 = HAL_VBI_ReadByte(BK_VBI_A6);
378 *byte4 = HAL_VBI_ReadByte(BK_VBI_A7);
379 }
380
381 #define NTSC_WSS_CRC_CHECK 0
382
VBI_GetWSS_Data(void)383 MS_U16 VBI_GetWSS_Data(void)
384 {
385 MS_U8 wWssWordH;
386 MS_U8 wWssWordL;
387
388 wWssWordL = HAL_VBI_ReadByte(BK_VBI_CD);
389 wWssWordH = HAL_VBI_ReadByte(BK_VBI_CE);
390
391 #if NTSC_WSS_CRC_CHECK
392
393 MS_U32 idx = 0;
394 MS_U8 u8Op = 0;
395 MS_U8 u8CrcCode = 0x3f;
396 MS_U8 u8CrcCheck = ((HAL_VBI_ReadByte(BK_VBI_CF) & 0xf) << 2) | (wWssWordH >> 6);
397 MS_U16 u16Data = MAKEWORD(wWssWordH, wWssWordL);
398
399 if(HAL_VBI_ReadByte(BK_AFEC_CD) & 0x10) // not NTSC
400 {
401 return MAKEWORD(wWssWordH, wWssWordL);
402 }
403
404 for(idx = 0; idx <14; idx++)
405 {
406 MS_U8 u8CrcTmp = u8CrcCode;
407 u8CrcCode = 0;
408
409 u8Op = (u8CrcTmp ^ (MS_U8)u16Data) & 0x1;
410 u8CrcCode = (u8CrcTmp >> 1) & 0xf; // CRC[3:0]
411 u8CrcCode |= (((u8CrcTmp >> 5) ^ u8Op) << 4); // CRC[4]
412 u8CrcCode |= u8Op << 5; // CRC[5]
413 u16Data >>= 1;
414 }
415
416 if(u8CrcCheck == u8CrcCode)
417 {
418 return MAKEWORD(wWssWordH, wWssWordL);
419 }
420 else
421 {
422 return 0;
423 }
424 #else
425 return MAKEWORD(wWssWordH, wWssWordL);
426 #endif
427 }
428
VBI_Set_PalNC_VideoStandard(void)429 void VBI_Set_PalNC_VideoStandard(void)
430 {
431 HAL_VBI_WriteByte(BK_VBI_82, 0x10);
432 HAL_VBI_WriteByte(BK_VBI_83, 0xB9);
433 HAL_VBI_WriteByte(BK_VBI_89, HAL_VBI_ReadByte(BK_VBI_89)|_BIT6);
434 // for VPS
435 HAL_VBI_WriteByte(BK_VBI_89, HAL_VBI_ReadByte(BK_VBI_89)&(~(_BIT5)));
436 HAL_VBI_WriteByte(BK_VBI_99, 0x8C);
437 HAL_VBI_WriteByte(BK_VBI_9A, 0x01);
438 }
439
VBI_Set_Secam_VideoStandard(void)440 void VBI_Set_Secam_VideoStandard(void)
441 {
442 HAL_VBI_WriteByte(BK_VBI_89, HAL_VBI_ReadByte(BK_VBI_89)|(_BIT6));
443 // for VPS
444 HAL_VBI_WriteByte(BK_VBI_89, HAL_VBI_ReadByte(BK_VBI_89)|_BIT5);
445 HAL_VBI_WriteByte(BK_VBI_99, 0x6D);
446 HAL_VBI_WriteByte(BK_VBI_9A, 0x9A);
447 }
448
VBI_Set_Pal_VideoStandard(void)449 void VBI_Set_Pal_VideoStandard(void)
450 {
451 HAL_VBI_WriteByte(BK_VBI_82, 0x8E);
452 HAL_VBI_WriteByte(BK_VBI_83, 0x6B);
453 HAL_VBI_WriteByte(BK_VBI_89, HAL_VBI_ReadByte(BK_VBI_89)|_BIT6);
454 // for VPS
455 HAL_VBI_WriteByte(BK_VBI_89, HAL_VBI_ReadByte(BK_VBI_89)&(~(_BIT5)));
456 HAL_VBI_WriteByte(BK_VBI_99, 0x8C);
457 HAL_VBI_WriteByte(BK_VBI_9A, 0x01);
458 }
459
VBI_TTX_EnableInterrupt(MS_BOOL bEnable)460 void VBI_TTX_EnableInterrupt(MS_BOOL bEnable)
461 {
462 if(bEnable)
463 {
464 // TTX, VPS and WSS
465 HAL_VBI_WriteByteMask(VBI_INTERRUPT_MASK, 0, _BIT4|_BIT1|_BIT0);
466 }
467 else
468 {
469 // TTX, VPS and WSS
470 HAL_VBI_WriteByteMask(VBI_INTERRUPT_MASK, _BIT4|_BIT1|_BIT0, _BIT4|_BIT1|_BIT0);
471 }
472 }
473
VBI_TTX_ReadIRQ(void)474 MS_U8 VBI_TTX_ReadIRQ(void)
475 {
476 return HAL_VBI_ReadByte(VBI_INTERRUPT_STATUS);
477 }
478
VBI_TTX_ClearIRQ(void)479 void VBI_TTX_ClearIRQ(void)
480 {
481 HAL_VBI_WriteByteMask(VBI_INTERRUPT_CLEAR, _BIT4|_BIT1|_BIT0, _BIT4|_BIT1|_BIT0);
482 HAL_VBI_WriteByteMask(VBI_INTERRUPT_CLEAR, 0, _BIT4|_BIT1|_BIT0);
483 }
484
VBI_TTX_EnableLine(MS_U16 StartLine,MS_U16 EndLine)485 void VBI_TTX_EnableLine(MS_U16 StartLine, MS_U16 EndLine)
486 {
487 #define EVEN_FIELD_OFFSET 313
488
489 EN_VBI_FIELD eField = VBI_FIELD_ODD;
490
491 if(StartLine >= EVEN_FIELD_OFFSET)
492 eField = VBI_FIELD_EVEN;
493
494 switch(eField)
495 {
496 case VBI_FIELD_EVEN:
497 HAL_VBI_WriteByteMask(BK_VBI_7E, StartLine - EVEN_FIELD_OFFSET, 0x1F);
498 HAL_VBI_WriteByteMask(BK_VBI_7F, EndLine - EVEN_FIELD_OFFSET, 0x1F);
499 break;
500
501 case VBI_FIELD_ODD:
502 HAL_VBI_WriteByteMask(BK_VBI_7C, StartLine, 0x1F);
503 HAL_VBI_WriteByteMask(BK_VBI_7D, EndLine, 0x1F);
504 break;
505 }
506 }
507
508 MS_U8 TTX_DMA_CMD_MAPPING[]=
509 {
510 DMA_HEADER,
511 DMA_PACKET1_TO_25,
512 DMA_PACKET26_28_29,
513 DMA_PACKET27,
514 DMA_BTT,
515 DMA_AIT,
516 };
517
518 #if defined(__mips__)
_VBI_WaitDMAReady(void)519 static void _VBI_WaitDMAReady(void)
520 {
521 MS_U8 i;
522
523 for(i = 0; i<25; i++)
524 __asm__ __volatile__ ("nop");
525
526 while(1)
527 {
528 if(HAL_VBI_ReadByte(DMA_COMMAND) & DMA_READY)
529 {
530 break;
531 }
532 }
533 }
534 #elif defined(__aeon__)
_VBI_WaitDMAReady(void)535 static void _VBI_WaitDMAReady(void)
536 {
537 MS_U8 i;
538
539 for(i = 0; i<10; i++)
540 __asm__ __volatile__ ("l.nop 0");
541
542 while(1)
543 {
544 if(HAL_VBI_ReadByte(DMA_COMMAND) & DMA_READY)
545 {
546 break;
547 }
548 }
549 }
550 #elif defined(__arm__) || defined (__aarch64__)
_VBI_WaitDMAReady(void)551 static void _VBI_WaitDMAReady(void)
552 {
553 }
554 #else
555 #error "Not support CPU!!"
556 #endif
557
VBI_TTX_DMA_CopyPacket(MS_PHY src_addr,MS_PHY dest_addr,MS_U8 aPacketType)558 void VBI_TTX_DMA_CopyPacket(MS_PHY src_addr, MS_PHY dest_addr, MS_U8 aPacketType)
559 {
560 src_addr = src_addr>>3;
561
562
563 HAL_VBI_Write2Byte(DMASRC_ADR_L, (src_addr) & 0xFFFF);
564 HAL_VBI_WriteByte(DMASRC_ADR_H, (src_addr>>16) & 0xFF);
565
566 if((src_addr>>24) & 0x01)
567 {
568 HAL_VBI_WriteByte(VBI_BIT24_ADDR, HAL_VBI_ReadByte(VBI_BIT24_ADDR)|DMASRC_ADDR24);
569 }
570 else
571 {
572 HAL_VBI_WriteByte(VBI_BIT24_ADDR, HAL_VBI_ReadByte(VBI_BIT24_ADDR)&(~DMASRC_ADDR24));
573 }
574 dest_addr = dest_addr>>3;
575 HAL_VBI_Write2Byte(DMADES_ADR_L, (dest_addr) & 0xFFFF);
576 HAL_VBI_WriteByte(DMADES_ADR_H, (dest_addr>>16) & 0xFF);
577
578 if((dest_addr>>24) & 0x01)
579 {
580 HAL_VBI_WriteByte(VBI_BIT24_ADDR, HAL_VBI_ReadByte(VBI_BIT24_ADDR)|DMADES_ADDR24);
581 }
582 else
583 {
584 HAL_VBI_WriteByte(VBI_BIT24_ADDR, HAL_VBI_ReadByte(VBI_BIT24_ADDR)&(~DMADES_ADDR24));
585 }
586 HAL_VBI_WriteByte(DMA_FUNC, TTX_DMA_CMD_MAPPING[aPacketType]); // DMA Function 05 : AIT PAGE X/1~X/22
587
588 HAL_VBI_Write2Byte(DMAQW_CNT_L, 5); // DMA Counter (64Bit)
589 HAL_VBI_WriteByte (DMA_COMMAND, DMA_FIRE); // Fire
590 _VBI_WaitDMAReady();
591 }
592
593 /******************************************************************************/
594 // API for VBI Slicer Initialization::
595 // Initializing VBI Slicer HW
596 /******************************************************************************/
VBI_CC_Init(MS_VIRT ptrRiuAddr,MS_PHY phyAddr,MS_U16 u8Len)597 void VBI_CC_Init(MS_VIRT ptrRiuAddr, MS_PHY phyAddr, MS_U16 u8Len)
598 {
599 MS_U8 u8Tmp;
600
601 // VBI RIU base
602 _ptrVBIRiuBaseAddr = ptrRiuAddr;
603
604 // U8 u8Bank; <- remove the bank change code
605 if((phyAddr >> 3) >= (1 << CC_BUF_BIT))
606 {
607 printf("[VBI][%s] ERROR, buffer address out of bound\n", __FUNCTION__);
608 //MS_ASSERT(0);
609 }
610 //reset and enable closed caption
611 // u8Bank = XBYTE[BK_SELECT_00]; <- remove the bank change code
612 // XBYTE[BK_SELECT_00] = REG_BANK_VBI; <- remove the bank change code
613 HAL_VBI_WriteByte(BK_VBI_46, 0x00); //disable VBI
614
615 /* --- setup CC Bytes buffer --- */
616 /* set cc base address */
617 //printf("\n init adr=0x%x, %d", u32Addr, u8Len);
618 u8Tmp = HAL_VBI_ReadByte(BK_VBI_1D);
619 u8Tmp &= ~(0xf0);
620 u8Tmp |= (((phyAddr >> 27)&0x0f) << 4);
621 HAL_VBI_WriteByte(BK_VBI_1D, u8Tmp); // CcBaseAddr_24, 25
622 HAL_VBI_WriteByte(BK_VBI_5D, (phyAddr >> 19) & 0xFF); // CcBaseAddr_23_16 (default value is 0xFF so it needs to specify to 0x00)
623 HAL_VBI_WriteByte(BK_VBI_5E, (phyAddr >> 11) & 0xFF); // CcBaseAddr_15_8 (high order)
624 HAL_VBI_WriteByte(BK_VBI_5F, (phyAddr >> 3) & 0xFF); // CCBaseAddr_7_0 (low order)
625
626 /* set cc buffer length */
627 HAL_VBI_WriteByte(BK_VBI_5C, u8Len);
628
629 // CJ
630 HAL_VBI_WriteByte(BK_AFEC_6B, HAL_VBI_ReadByte(BK_AFEC_6B) & 0xF7);
631
632 // Set a constraint for CC patterns in case of wrong encoder's behavior
633 HAL_VBI_WriteByte(BK_VBI_4A, (HAL_VBI_ReadByte(BK_VBI_4A)&0xf0)|0x03);
634
635 HAL_VBI_WriteByte(BK_VBI_46, 0x01); //enable VBI
636
637 // disable vbi software reset
638 u8Tmp = HAL_VBI_ReadByte(BK_VBI_70);
639 u8Tmp &= ~(0x08);
640 HAL_VBI_WriteByte(BK_VBI_70, u8Tmp);
641 }
642
643 /******************************************************************************/
644 /// API to turn on VBI from YPbPr Initialization::
645 /// Initializing VBI Slicer HW
646 /******************************************************************************/
VBI_CC_YPbPr_Init(MS_U8 cvbs_no)647 void VBI_CC_YPbPr_Init(MS_U8 cvbs_no)
648 {
649 // Enable VD parts
650 HAL_VBI_WriteByte(L_BK_ADC_ATOP(0x00), 0x09); // enable VD & YPbPr
651 HAL_VBI_WriteByte(L_BK_ADC_ATOP(0x02), 0xf0|cvbs_no); // (select VD_ymux for CVBS input from Y)
652 HAL_VBI_WriteByte(L_BK_ADC_ATOP(0x04), 0x00); // enable analog blocks, 04, 05
653 HAL_VBI_WriteByte(H_BK_ADC_ATOP(0x04), 0x00);
654 HAL_VBI_WriteByte(L_BK_ADC_ATOP(0x05), 0x00);
655 HAL_VBI_WriteByte(L_BK_ADC_ATOP(0x06), 0x00); // enable ADC clocks
656 HAL_VBI_WriteByte(L_BK_ADC_ATOP(0x12), 0x01); // VD pll =2X (16Fsc)
657
658 // enable VD clocks, setup VD AFEC, AFEC and VBI are just set as AV mode
659 HAL_VBI_WriteByte(H_BK_CHIPTOP(0x16), (HAL_VBI_ReadByte(H_BK_CHIPTOP(0x16)) & (0x0F)));
660 HAL_VBI_WriteByte(L_BK_CHIPTOP(0x17), 0x06);
661 }
662
663 /******************************************************************************/
664 /// API to Set CC data rate::
665 /// Set CC's data rate
666 /// @Param u8Mode \b IN video system mode
667 /// @return TRUE:: Successfully set
668 /// FALSE:: Fail
669 /******************************************************************************/
VBI_CC_DataRateSet(MS_U8 * ptable)670 MS_U8 VBI_CC_DataRateSet(MS_U8 *ptable)
671 {
672 MS_U8 j=1;
673
674 // Set the VBI registers
675 HAL_VBI_WriteByte(BK_VBI_41, ptable[j++]);
676
677 HAL_VBI_WriteByte(BK_VBI_42, HAL_VBI_ReadByte(BK_VBI_42)&0xC0);
678 HAL_VBI_WriteByte(BK_VBI_42, HAL_VBI_ReadByte(BK_VBI_42)|ptable[j++]);
679
680 HAL_VBI_WriteByte(BK_VBI_44, ptable[j++]);
681
682 HAL_VBI_WriteByte(BK_VBI_4B, HAL_VBI_ReadByte(BK_VBI_4B)&0xC0);
683 HAL_VBI_WriteByte(BK_VBI_4B, HAL_VBI_ReadByte(BK_VBI_4B)|ptable[j++]);
684
685 HAL_VBI_WriteByte(BK_VBI_4D, ptable[j++]);
686
687 HAL_VBI_WriteByte(BK_VBI_50, HAL_VBI_ReadByte(BK_VBI_50)&0xE0);
688 HAL_VBI_WriteByte(BK_VBI_50, HAL_VBI_ReadByte(BK_VBI_50)|ptable[j++]);
689
690 HAL_VBI_WriteByte(BK_VBI_51, HAL_VBI_ReadByte(BK_VBI_51)&0xE0);
691 HAL_VBI_WriteByte(BK_VBI_51, HAL_VBI_ReadByte(BK_VBI_51)|ptable[j++]);
692
693 return TRUE;
694 }
695
696 /******************************************************************************/
697 /// API to get packet count:
698 ///
699 /******************************************************************************/
VBI_CC_GetPacketCnt(void)700 MS_U8 VBI_CC_GetPacketCnt(void)
701 {
702 return (HAL_VBI_ReadByte(BK_VBI_5B)&0x1F);
703 }
704
705 /******************************************************************************/
706 /// API to get odd/even byte-found-identification:
707 /// 2 bits
708 /******************************************************************************/
VBI_CC_GetByteFoundIndication(void)709 MS_U8 VBI_CC_GetByteFoundIndication(void)
710 {
711 return ((HAL_VBI_ReadByte(BK_VBI_56)&0xC0) >> 6);
712 }
713
714 /******************************************************************************/
715 /// API to get packet data:
716 ///
717 /// @return (U32) (Odd_1st_Byte + Odd_2nd_Byte + Even_1st_Byte + Even_2nd_Byte)
718 /******************************************************************************/
VBI_CC_GetPacket(void)719 MS_U32 VBI_CC_GetPacket(void)
720 {
721 MS_U32 u32Tmp;
722
723 u32Tmp = ((MS_U32)HAL_VBI_ReadByte(BK_VBI_57)) << 24;
724 u32Tmp |= ((MS_U32)HAL_VBI_ReadByte(BK_VBI_58)) << 16;
725 u32Tmp |= ((MS_U32)HAL_VBI_ReadByte(BK_VBI_59)) << 8;
726 u32Tmp |= ((MS_U32)HAL_VBI_ReadByte(BK_VBI_5A)) << 0;
727
728 return (u32Tmp);
729 }
730
731 /******************************************************************************/
732 /// API to set CC frame count:
733 ///
734 /******************************************************************************/
VBI_SetCCFrameCnt(MS_U8 cnt)735 void VBI_SetCCFrameCnt(MS_U8 cnt)
736 {
737 MS_U8 u8Tmp=0;
738
739 u8Tmp = HAL_VBI_ReadByte(BK_VBI_46);
740 u8Tmp &= ~(_BIT1 | _BIT2 | _BIT3 | _BIT4 | _BIT5);
741 u8Tmp |= ((cnt&0x1F) << 1);
742
743 HAL_VBI_WriteByte(BK_VBI_46, u8Tmp);
744 }
745
746 /******************************************************************************/
747 /// API to enable CC slicer:
748 ///
749 /******************************************************************************/
VBI_CC_EnableSlicer(MS_BOOL bEnable)750 void VBI_CC_EnableSlicer(MS_BOOL bEnable)
751 {
752 if(bEnable)
753 {
754 HAL_VBI_WriteByte(BK_VBI_46, HAL_VBI_ReadByte(BK_VBI_46) | _BIT0);
755 }
756 else
757 {
758 HAL_VBI_WriteByte(BK_VBI_46, HAL_VBI_ReadByte(BK_VBI_46) & 0xFE);
759 }
760 }
761
VBI_CC_SetCCLine(MS_U16 StartLine,MS_U16 EndLine,MS_U8 val)762 void VBI_CC_SetCCLine(MS_U16 StartLine, MS_U16 EndLine, MS_U8 val) // val -> 0:NTSC, 1:PAL
763 {
764 #define CC_EVEN_FIELD_OFFSET 263 // (525 / 2 + 1)
765 #define VBI_CC_NTSC_LINE_OFFSET 3
766 #define VBI_CC_NTSC_DEFAULT_LINE 21
767
768 EN_VBI_FIELD eField = VBI_FIELD_ODD;
769 MS_U8 u8Tmp;
770
771 if(StartLine >= CC_EVEN_FIELD_OFFSET)
772 eField = VBI_FIELD_EVEN;
773
774 if(val == 0)
775 {
776 val = VBI_CC_NTSC_LINE_OFFSET; // offset
777 }
778 else
779 {
780 val = 0; // offset
781 }
782
783 switch(eField)
784 {
785 case VBI_FIELD_EVEN:
786 HAL_VBI_WriteByteMask(BK_VBI_50, (StartLine - CC_EVEN_FIELD_OFFSET), 0x1F);
787 HAL_VBI_WriteByteMask(BK_VBI_51, (EndLine - CC_EVEN_FIELD_OFFSET), 0x1F);
788 break;
789
790 case VBI_FIELD_ODD:
791
792 // start line
793 u8Tmp = HAL_VBI_ReadByte(BK_VBI_40);
794 u8Tmp &= ~(_BIT4 | _BIT5);
795 u8Tmp |= ((StartLine & 0x18) << 1);
796 HAL_VBI_WriteByteMask(BK_VBI_40, u8Tmp, 0x30);
797
798 u8Tmp = HAL_VBI_ReadByte(BK_VBI_41);
799 u8Tmp &= ~(_BIT5 | _BIT6 | _BIT7);
800 u8Tmp |= ((StartLine & 0x07) << 5);
801 HAL_VBI_WriteByteMask(BK_VBI_41, u8Tmp, 0xE0);
802
803 // end line
804 HAL_VBI_WriteByteMask(BK_VBI_41, EndLine, 0x1F);
805 break;
806 }
807 }
808 /******************************************************************************/
809 /// API to set CC SC window length
810 ///
811 /******************************************************************************/
VBI_CC_SetSCWindowLen(MS_U8 u8Len)812 MS_BOOL VBI_CC_SetSCWindowLen(MS_U8 u8Len)
813 {
814 HAL_VBI_WriteByte(BK_VBI_53, u8Len);
815 return TRUE;
816 }
817 /******************************************************************************/
818 /// API to set WSS VPS byte number:
819 ///
820 /******************************************************************************/
VBI_SetWssVpsByteNum(MS_U8 cnt)821 void VBI_SetWssVpsByteNum(MS_U8 cnt)
822 {
823 MS_U8 u8Tmp=0;
824
825 u8Tmp = HAL_VBI_ReadByte(BK_VBI_B8);
826 u8Tmp &= ~(_BIT0 | _BIT1 | _BIT2 | _BIT3);
827 u8Tmp |= (cnt&0x0f);
828
829 HAL_VBI_WriteByte(BK_VBI_B8, u8Tmp);
830 }
831
832 /******************************************************************************/
833 /// API to enable memory protect (the memory range vbi can access)
834 ///
835 /******************************************************************************/
VBI_ProtectMemory(MS_BOOL bEnable,MS_PHY phyAddr,MS_U32 u32Size)836 MS_BOOL VBI_ProtectMemory(MS_BOOL bEnable, MS_PHY phyAddr, MS_U32 u32Size)
837 {
838 MS_U32 u32MiuAddr = (MS_U32)phyAddr >> 3;
839 MS_U32 u32MiuAddrMax = ( ( (MS_U32)phyAddr + u32Size ) >> 3 );
840
841 if(bEnable)
842 {
843 HAL_VBI_WriteByte(BK_VBI_DE, u32MiuAddr & 0xFF);
844 HAL_VBI_WriteByte(BK_VBI_DF, (u32MiuAddr >> 8) & 0xFF);
845 HAL_VBI_WriteByte(BK_VBI_E0, (u32MiuAddr >> 16) & 0xFF);
846
847 HAL_VBI_WriteByte(BK_VBI_E1, u32MiuAddrMax & 0xFF);
848 HAL_VBI_WriteByte(BK_VBI_E2, (u32MiuAddrMax >> 8) & 0xFF);
849 HAL_VBI_WriteByte(BK_VBI_E3, (u32MiuAddrMax >> 16) & 0xFF);
850
851 #if BK_VBI_E7_BUG
852 HAL_VBI_WriteWord(BK_VBI_E6, ( (u32MiuAddr >> 24) & 0x0F ) |
853 ( ( (u32MiuAddrMax >> 24) & 0x0F ) << 4));
854 #else
855 HAL_VBI_WriteByte(BK_VBI_E7, ( (u32MiuAddr >> 24) & 0x0F ) |
856 ( ( (u32MiuAddrMax >> 24) & 0x0F ) << 4));
857 #endif
858 HAL_VBI_WriteByteMask(BK_VBI_E4, _BIT1, _BIT1);
859 }
860 else
861 {
862 HAL_VBI_WriteByteMask(BK_VBI_E4, 0, _BIT1);
863 }
864
865 return TRUE;
866 }
867 #undef _HAL_VBI_C
868