1 //<MStar Software>
2 //******************************************************************************
3 // MStar Software
4 // Copyright (c) 2010 - 2012 MStar Semiconductor, Inc. All rights reserved.
5 // All software, firmware and related documentation herein ("MStar Software") are
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20 //
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75 //
76 //******************************************************************************
77 //<MStar Software>
78
79 //-------------------------------------------------------------------------------------------------
80 // Include Files
81 //-------------------------------------------------------------------------------------------------
82 #include "MsCommon.h"
83 #include "regCHIP.h"
84 #include "halCHIP.h"
85 #include "halDMD_VD_MBX.h"
86 #include "drvMMIO.h"
87 //-------------------------------------------------------------------------------------------------
88 // Driver Compiler Options
89 //-------------------------------------------------------------------------------------------------
90
91
92 //-------------------------------------------------------------------------------------------------
93 // Local Defines
94 //-------------------------------------------------------------------------------------------------
95 #if defined(MCU_AEON)
96 #define BASEADDR_RIU 0xA0000000
97 #elif defined(__arm__)
98 #define BASEADDR_RIU 0x1F000000
99 #else
100 #define BASEADDR_RIU 0xBF000000
101 #endif
102
103 #define RIU_MACRO_START do {
104 #define RIU_MACRO_END } while (0)
105
106 // Address bus of RIU is 16 bits.
107
108 #define RIU_READ_BYTE(addr) (READ_BYTE(_hal_DMD_VD_MBX.u32DMD_VD_MBX_BaseAddr + (addr)))
109 #define RIU_READ_2BYTE(addr) (READ_WORD(_hal_DMD_VD_MBX.u32DMD_VD_MBX_BaseAddr + (addr)))
110 #define RIU_WRITE_BYTE(addr, val) {WRITE_BYTE(_hal_DMD_VD_MBX.u32DMD_VD_MBX_BaseAddr + (addr), val)}
111 #define RIU_WRITE_2BYTE(addr, val) {WRITE_WORD(_hal_DMD_VD_MBX.u32DMD_VD_MBX_BaseAddr + (addr), val)}
112
113 // Standard Form
114
115 #define RIU_ReadByte( u32Reg ) RIU_READ_BYTE(((u32Reg) << 1) - ((u32Reg) & 1))
116
117 #define RIU_Read2Byte( u32Reg ) (RIU_READ_2BYTE((u32Reg) << 1))
118
119 #define RIU_ReadRegBit( u32Reg, u8Mask ) (RIU_READ_BYTE(((u32Reg) << 1) - ((u32Reg) & 1)) & (u8Mask))
120
121 #define RIU_WriteRegBit( u32Reg, bEnable, u8Mask ) \
122 RIU_MACRO_START \
123 RIU_WRITE_BYTE( (((u32Reg) << 1) - ((u32Reg) & 1)) , (bEnable) ? (RIU_READ_BYTE((((u32Reg) << 1) - ((u32Reg) & 1)) ) | (u8Mask)) : \
124 (RIU_READ_BYTE((((u32Reg) <<1) - ((u32Reg) & 1))) & ~(u8Mask))); \
125 RIU_MACRO_END
126
127 #define RIU_WriteByte( u32Reg, u8Val ) \
128 RIU_MACRO_START \
129 RIU_WRITE_BYTE(((u32Reg) << 1) - ((u32Reg) & 1), u8Val); \
130 RIU_MACRO_END
131
132 #define RIU_Write2Byte( u32Reg, u16Val ) \
133 RIU_MACRO_START \
134 if ( ((u32Reg) & 0x01) ) \
135 { \
136 RIU_WRITE_BYTE(((u32Reg) << 1) - 1, (MS_U8)((u16Val))); \
137 RIU_WRITE_BYTE(((u32Reg) + 1) << 1, (MS_U8)((u16Val) >> 8)); \
138 } \
139 else \
140 { \
141 RIU_WRITE_2BYTE( ((u32Reg)<<1) , u16Val); \
142 } \
143 RIU_MACRO_END
144
145 #define RIU_WriteByteMask( u32Reg, u8Val, u8Msk ) \
146 RIU_MACRO_START \
147 RIU_WRITE_BYTE( (((u32Reg) <<1) - ((u32Reg) & 1)), (RIU_READ_BYTE((((u32Reg) <<1) - ((u32Reg) & 1))) & ~(u8Msk)) | ((u8Val) & (u8Msk))); \
148 RIU_MACRO_END
149
150 #define DMD_MBX_TIMEOUT 200
151 //-------------------------------------------------------------------------------------------------
152 // Local Structures
153 //-------------------------------------------------------------------------------------------------
154 typedef struct
155 {
156 MS_U32 u32DMD_VD_MBX_BaseAddr;
157 MS_BOOL bBaseAddrInitialized;
158 MS_U8 u8DMD_VD_MBX_Type;
159 } hal_DMD_VD_MBX_t;
160
161 //-------------------------------------------------------------------------------------------------
162 // Global Variables
163 //-------------------------------------------------------------------------------------------------
164
165 //-------------------------------------------------------------------------------------------------
166 // Local Variables
167 //-------------------------------------------------------------------------------------------------
168 static hal_DMD_VD_MBX_t _hal_DMD_VD_MBX =
169 {
170 .u32DMD_VD_MBX_BaseAddr = BASEADDR_RIU,
171 .bBaseAddrInitialized = 0,
172 .u8DMD_VD_MBX_Type = -1,
173 };
174 static MS_U8 MBX_SetType;
175 //-------------------------------------------------------------------------------------------------
176 // Debug Functions
177 //-------------------------------------------------------------------------------------------------
178
179
180 //-------------------------------------------------------------------------------------------------
181 // Local Functions
182 //-------------------------------------------------------------------------------------------------
183
184 //-------------------------------------------------------------------------------------------------
185 // Global Functions
186 //-------------------------------------------------------------------------------------------------
HAL_SYS_DMD_VD_MBX_Init(void)187 MS_BOOL HAL_SYS_DMD_VD_MBX_Init(void)
188 {
189 MS_U32 u32NonPMBank;
190 MS_U32 u32NonPMBankSize;
191 if (!MDrv_MMIO_GetBASE( &u32NonPMBank, &u32NonPMBankSize, MS_MODULE_AVD))
192 {
193 printf("IOMap failure to get MAP_NONPM_BANK\n");
194 return FALSE;
195 }
196
197 _hal_DMD_VD_MBX.u32DMD_VD_MBX_BaseAddr=u32NonPMBank;
198 _hal_DMD_VD_MBX.bBaseAddrInitialized = 1;
199 _hal_DMD_VD_MBX.u8DMD_VD_MBX_Type = -1;
200 #ifdef MS_DEBUG
201 printf("HAL_SYS_DMD_VD_MBX_Init %lx\n",u32NonPMBank);
202 #endif
203 return TRUE;
204 }
205
HAL_SYS_DMD_VD_MBX_GetType(void)206 MS_U8 HAL_SYS_DMD_VD_MBX_GetType(void)
207 {
208 #ifdef MS_DEBUG
209 printf("HAL_SYS_DMD_VD_MBX_GetType %d\n",MBX_SetType);
210 #endif
211 //return RIU_ReadByte(0x1E3E);
212 return MBX_SetType;
213 }
214
HAL_SYS_DMD_VD_MBX_SetType(MS_U8 u8Value)215 void HAL_SYS_DMD_VD_MBX_SetType(MS_U8 u8Value)
216 {
217 MBX_SetType = u8Value;
218 //RIU_WriteByte(0x1E3E, u8Value);
219 }
220
221 #if (DMD_VD_MBX_CHIP_VERSION == DMD_VD_MBX_CHIP_T3)
222 // ATV
HAL_SYS_DMD_VD_MBX_ATV_WaitReady(void)223 MS_BOOL HAL_SYS_DMD_VD_MBX_ATV_WaitReady(void)
224 {
225 MS_U32 u32StartTime=MsOS_GetSystemTime();
226 while (MsOS_GetSystemTime()-u32StartTime < 10)
227 {
228 if (!RIU_ReadByte(DemodCmd)) return TRUE;
229 MsOS_DelayTaskUs(500);
230 }
231 #ifdef MS_DEBUG
232 printf("HAL_SYS_DMD_VD_MBX_ATV_WaitReady Fail\n");
233 #endif
234 return FALSE;
235 }
236
HAL_SYS_DMD_VD_MBX_ATV_ReadByte(MS_U32 u32Reg,MS_U8 * u8Value)237 MS_BOOL HAL_SYS_DMD_VD_MBX_ATV_ReadByte(MS_U32 u32Reg, MS_U8 *u8Value)
238 {
239 if (HAL_SYS_DMD_VD_MBX_ATV_WaitReady())
240 {
241 RIU_WriteByte(DemodAdrL, u32Reg&0xFF);
242 RIU_WriteByte(DemodAdrH, (u32Reg>>8)&0xFF);
243 RIU_WriteByte(DemodCmd, DemodCmdRdReg);
244
245 if (HAL_SYS_DMD_VD_MBX_ATV_WaitReady())
246 {
247 *u8Value = RIU_ReadByte(DemodData);
248 return TRUE;
249 }
250 }
251 #ifdef MS_DEBUG
252 printf("HAL_SYS_DMD_VD_MBX_ATV_ReadByte Fail\n");
253 #endif
254 *u8Value = 0;
255 return FALSE;
256 }
257
HAL_SYS_DMD_VD_MBX_ATV_WriteByte(MS_U32 u32Reg,MS_U8 u8Val)258 MS_BOOL HAL_SYS_DMD_VD_MBX_ATV_WriteByte(MS_U32 u32Reg, MS_U8 u8Val)
259 {
260 if (HAL_SYS_DMD_VD_MBX_ATV_WaitReady())
261 {
262 RIU_WriteByte(DemodAdrL, u32Reg&0xFF);
263 RIU_WriteByte(DemodAdrH, (u32Reg>>8)&0xFF);
264 RIU_WriteByte(DemodData, u8Val);
265 RIU_WriteByte(DemodCmd, DemodCmdWrReg);
266 return TRUE;
267 }
268 return FALSE;
269 }
270 #else
HAL_SYS_DMD_VD_MBX_ATV_WaitReady(void)271 MS_BOOL HAL_SYS_DMD_VD_MBX_ATV_WaitReady(void)
272 {
273 return FALSE;
274 }
275
HAL_SYS_DMD_VD_MBX_ATV_ReadByte(MS_U32 u32Reg,MS_U8 * u8Value)276 MS_BOOL HAL_SYS_DMD_VD_MBX_ATV_ReadByte(MS_U32 u32Reg, MS_U8 *u8Value)
277 {
278 return FALSE;
279 }
280
HAL_SYS_DMD_VD_MBX_ATV_WriteByte(MS_U32 u32Reg,MS_U8 u8Val)281 MS_BOOL HAL_SYS_DMD_VD_MBX_ATV_WriteByte(MS_U32 u32Reg, MS_U8 u8Val)
282 {
283 return FALSE;
284 }
285 #endif
286
287 // DVBT & DVBC
HAL_SYS_DMD_VD_MBX_DVB_WaitReady(void)288 MS_BOOL HAL_SYS_DMD_VD_MBX_DVB_WaitReady(void)
289 {
290 MS_U32 u32StartTime=MsOS_GetSystemTime();
291 while (RIU_ReadByte(MBRegBase + 0x00)) // wait VDMCU ready
292 {
293 if (MsOS_Timer_DiffTimeFromNow(u32StartTime)>DMD_MBX_TIMEOUT)
294 {
295 printf("HAL_SYS_DMD_VD_MBX_DVB_WaitReady Timeout\n");
296 return FALSE;
297 }
298 }
299 return TRUE;
300 }
301
HAL_SYS_DMD_VD_MBX_DVB_WaitHandShake(void)302 void HAL_SYS_DMD_VD_MBX_DVB_WaitHandShake(void)
303 {
304 MS_U32 u32StartTime=MsOS_GetSystemTime();
305 while(RIU_ReadByte(MBRegBase + 0x00) != 0xFF) // wait MB_CNTL set done
306 {
307 if (MsOS_Timer_DiffTimeFromNow(u32StartTime)>DMD_MBX_TIMEOUT)
308 {
309 printf("HAL_SYS_DMD_VD_MBX_DVB_WaitHandShake Timeout\n");
310 break;
311 }
312 }
313 }
314
HAL_SYS_DMD_VD_MBX_DVB_ReadByte(MS_U16 u16Addr,MS_U8 * u8Value)315 MS_BOOL HAL_SYS_DMD_VD_MBX_DVB_ReadByte(MS_U16 u16Addr, MS_U8 *u8Value)
316 {
317 if (!HAL_SYS_DMD_VD_MBX_DVB_WaitReady()) return FALSE;
318
319 RIU_WriteByte(MBRegBase + 0x02, (MS_U8)(u16Addr >> 8)); // ADDR_H
320 RIU_WriteByte(MBRegBase + 0x01, (MS_U8)u16Addr); // ADDR_L
321 RIU_WriteByte(MBRegBase + 0x00, 0x01); // MB_CNTL set read mode
322
323 RIU_WriteByte(DMDMcuBase + 0x03, 0x02); // assert interrupt to VD MCU51
324 RIU_WriteByte(DMDMcuBase + 0x03, 0x00); // de-assert interrupt to VD MCU51
325
326 HAL_SYS_DMD_VD_MBX_DVB_WaitHandShake();
327
328 *u8Value = RIU_ReadByte(MBRegBase + 0x03); // REG_DATA get
329 RIU_WriteByte(MBRegBase + 0x00, 0x00); // MB_CNTL clear
330
331 return TRUE;
332 }
333
HAL_SYS_DMD_VD_MBX_DVB_WriteByte(MS_U32 u16Addr,MS_U8 u8Data)334 MS_BOOL HAL_SYS_DMD_VD_MBX_DVB_WriteByte(MS_U32 u16Addr, MS_U8 u8Data)
335 {
336 if (!HAL_SYS_DMD_VD_MBX_DVB_WaitReady()) return FALSE;
337
338 RIU_WriteByte(MBRegBase + 0x02, (MS_U8)(u16Addr >> 8)); // ADDR_H
339 RIU_WriteByte(MBRegBase + 0x01, (MS_U8)u16Addr); // ADDR_L
340 RIU_WriteByte(MBRegBase + 0x03, u8Data); // REG_DATA
341 RIU_WriteByte(MBRegBase + 0x00, 0x02); // MB_CNTL set write mode
342
343 RIU_WriteByte(DMDMcuBase + 0x03, 0x02); // assert interrupt to VD MCU51
344 RIU_WriteByte(DMDMcuBase + 0x03, 0x00); // de-assert interrupt to VD MCU51
345
346 HAL_SYS_DMD_VD_MBX_DVB_WaitHandShake();
347
348 RIU_WriteByte(MBRegBase + 0x00, 0x00); // MB_CNTL clear
349 return TRUE;
350 }
351
HAL_SYS_DMD_VD_MBX_DVB_ReadDspReg(MS_U32 u16Addr,MS_U8 * u8Value)352 MS_BOOL HAL_SYS_DMD_VD_MBX_DVB_ReadDspReg(MS_U32 u16Addr, MS_U8 *u8Value)
353 {
354 if (!HAL_SYS_DMD_VD_MBX_DVB_WaitReady()) return FALSE;
355
356 RIU_WriteByte(MBRegBase + 0x02, (MS_U8)(u16Addr >> 8)); // ADDR_H
357 RIU_WriteByte(MBRegBase + 0x01, (MS_U8)u16Addr); // ADDR_L
358 RIU_WriteByte(MBRegBase + 0x00, 0x03); // MB_CNTL set read mode
359
360 RIU_WriteByte(DMDMcuBase + 0x03, 0x02); // assert interrupt to DMD MCU51 //mick
361 RIU_WriteByte(DMDMcuBase + 0x03, 0x00); // de-assert interrupt to DMD MCU51
362
363 HAL_SYS_DMD_VD_MBX_DVB_WaitHandShake();
364
365 *u8Value = RIU_ReadByte(MBRegBase + 0x03); // REG_DATA get
366 RIU_WriteByte(MBRegBase + 0x00, 0x00); // MB_CNTL clear
367
368 return TRUE;
369 }
370
371
HAL_SYS_DMD_VD_MBX_DVB_WriteDspReg(MS_U32 u16Addr,MS_U8 u8Value)372 MS_BOOL HAL_SYS_DMD_VD_MBX_DVB_WriteDspReg(MS_U32 u16Addr, MS_U8 u8Value)
373 {
374 if (!HAL_SYS_DMD_VD_MBX_DVB_WaitReady()) return FALSE;
375
376 RIU_WriteByte(MBRegBase + 0x02, (MS_U8)(u16Addr >> 8)); // ADDR_H
377 RIU_WriteByte(MBRegBase + 0x01, (MS_U8)u16Addr); // ADDR_L
378 RIU_WriteByte(MBRegBase + 0x03, u8Value); // REG_DATA
379 RIU_WriteByte(MBRegBase + 0x00, 0x04); // MB_CNTL set write mode
380
381 RIU_WriteByte(DMDMcuBase + 0x03, 0x02); // assert interrupt to VD MCU51 //mick
382 RIU_WriteByte(DMDMcuBase + 0x03, 0x00); // de-assert interrupt to VD MCU51
383
384 HAL_SYS_DMD_VD_MBX_DVB_WaitHandShake();
385
386 RIU_WriteByte(MBRegBase + 0x00, 0x00); // MB_CNTL clear
387
388 return TRUE;
389 }
390
HAL_SYS_DMD_VD_MBX_DVB_DBG_ReadReg(MS_U16 u16Addr,MS_U8 * u8Value)391 MS_BOOL HAL_SYS_DMD_VD_MBX_DVB_DBG_ReadReg(MS_U16 u16Addr, MS_U8 *u8Value)
392 {
393 if (!HAL_SYS_DMD_VD_MBX_DVB_WaitReady()) return FALSE;
394
395 RIU_WriteByte(MBRegBase + 0x02, (MS_U8)(u16Addr >> 8)); // ADDR_H
396 RIU_WriteByte(MBRegBase + 0x01, (MS_U8)u16Addr); // ADDR_L
397 RIU_WriteByte(MBRegBase + 0x00, 0x05); // MB_CNTL set read mode
398
399 RIU_WriteByte(DMDMcuBase + 0x03, 0x02); // assert interrupt to DMD MCU51 //mick
400 RIU_WriteByte(DMDMcuBase + 0x03, 0x00); // de-assert interrupt to DMD MCU51
401
402 HAL_SYS_DMD_VD_MBX_DVB_WaitHandShake();
403
404 *u8Value = RIU_ReadByte(MBRegBase + 0x03); // REG_DATA get
405 RIU_WriteByte(MBRegBase + 0x00, 0x00); // MB_CNTL clear
406
407 return TRUE;
408 }
409
410 //-----------------------------------------------------------------------
HAL_SYS_DMD_VD_MBX_DVB_DBG_WriteReg(MS_U32 u16Addr,MS_U8 u8Data)411 MS_BOOL HAL_SYS_DMD_VD_MBX_DVB_DBG_WriteReg(MS_U32 u16Addr, MS_U8 u8Data)
412 {
413 if (!HAL_SYS_DMD_VD_MBX_DVB_WaitReady()) return FALSE;
414
415 RIU_WriteByte(MBRegBase + 0x02, (MS_U8)(u16Addr >> 8)); // ADDR_H
416 RIU_WriteByte(MBRegBase + 0x01, (MS_U8)u16Addr); // ADDR_L
417 RIU_WriteByte(MBRegBase + 0x03, u8Data); // REG_DATA
418 RIU_WriteByte(MBRegBase + 0x00, 0x06); // MB_CNTL set write mode
419
420 RIU_WriteByte(DMDMcuBase + 0x03, 0x02); // assert interrupt to VD MCU51 //mick
421 RIU_WriteByte(DMDMcuBase + 0x03, 0x00); // de-assert interrupt to VD MCU51
422
423 HAL_SYS_DMD_VD_MBX_DVB_WaitHandShake();
424
425 RIU_WriteByte(MBRegBase + 0x00, 0x00); // MB_CNTL clear
426
427 return TRUE;
428 }
429
430 // ATSC
HAL_SYS_DMD_VD_MBX_ATSC_WriteByte(MS_U16 u16Addr,MS_U8 u8Data)431 void HAL_SYS_DMD_VD_MBX_ATSC_WriteByte(MS_U16 u16Addr, MS_U8 u8Data)
432 {
433 MS_U8 u8CheckCount;
434 MS_U8 u8CheckFlag;
435
436 RIU_WriteByte(MBRegBase + 0x00, (u16Addr&0xff));
437 RIU_WriteByte(MBRegBase + 0x01, (u16Addr>>8));
438 RIU_WriteByte(MBRegBase + 0x10, u8Data);
439 RIU_WriteByte(MBRegBase + 0x1E, 0x01);
440
441 RIU_WriteByte(DMDMcuBase + 0x03, 0x02); // assert interrupt to VD MCU51 //mick
442 RIU_WriteByte(DMDMcuBase + 0x03, 0x00); // de-assert interrupt to VD MCU51
443
444 for ( u8CheckCount=0; u8CheckCount < 10 ; u8CheckCount++ )
445 {
446 u8CheckFlag = RIU_ReadByte(MBRegBase + 0x1E);
447 if ((u8CheckFlag&0x01)==0)
448 break;
449 MsOS_DelayTask(1);
450 }
451 }
452
HAL_SYS_DMD_VD_MBX_ATSC_ReadByte(MS_U16 u16Addr)453 MS_U8 HAL_SYS_DMD_VD_MBX_ATSC_ReadByte(MS_U16 u16Addr)
454 {
455 MS_U8 u8CheckCount;
456 MS_U8 u8CheckFlag;
457 MS_U8 u8Value;
458
459 RIU_WriteByte(MBRegBase + 0x00, (u16Addr&0xff));
460 RIU_WriteByte(MBRegBase + 0x01, (u16Addr>>8));
461 RIU_WriteByte(MBRegBase + 0x1E, 0x02);
462
463 RIU_WriteByte(DMDMcuBase + 0x03, 0x02); // assert interrupt to VD MCU51 //mick
464 RIU_WriteByte(DMDMcuBase + 0x03, 0x00); // de-assert interrupt to VD MCU51
465
466 for ( u8CheckCount=0; u8CheckCount < 10 ; u8CheckCount++ )
467 {
468 u8CheckFlag = RIU_ReadByte(MBRegBase + 0x1E);
469 if ((u8CheckFlag&0x02)==0)
470 {
471 u8Value = RIU_ReadByte(MBRegBase + 0x10);
472 return u8Value;
473 }
474 MsOS_DelayTask(1);
475 }
476
477 return 0;
478 }
479