xref: /utopia/UTPA2-700.0.x/modules/sys/hal/M7621/sys/halDMD_VD_MBX.h (revision 53ee8cc121a030b8d368113ac3e966b4705770ef)
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93*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
94*53ee8cc1Swenshuai.xi 
95*53ee8cc1Swenshuai.xi #ifndef _HAL_SYS_DMD_VD_MBX_H_
96*53ee8cc1Swenshuai.xi #define _HAL_SYS_DMD_VD_MBX_H_
97*53ee8cc1Swenshuai.xi 
98*53ee8cc1Swenshuai.xi 
99*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
100*53ee8cc1Swenshuai.xi //  Macro and Define
101*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
102*53ee8cc1Swenshuai.xi #define DMD_VD_MBX_CHIP_U3       0UL
103*53ee8cc1Swenshuai.xi #define DMD_VD_MBX_CHIP_T3       1UL
104*53ee8cc1Swenshuai.xi #define DMD_VD_MBX_CHIP_T7_T8_T9 2UL
105*53ee8cc1Swenshuai.xi #define DMD_VD_MBX_CHIP_T12_T13  3UL
106*53ee8cc1Swenshuai.xi #define DMD_VD_MBX_CHIP_VERSION    DMD_VD_MBX_CHIP_T12_T13
107*53ee8cc1Swenshuai.xi 
108*53ee8cc1Swenshuai.xi #if (DMD_VD_MBX_CHIP_VERSION >= DMD_VD_MBX_CHIP_T7_T8_T9)
109*53ee8cc1Swenshuai.xi #define MBRegBase   0x012600UL
110*53ee8cc1Swenshuai.xi #define DMDMcuBase  0x003480UL
111*53ee8cc1Swenshuai.xi #elif (DMD_VD_MBX_CHIP_VERSION == DMD_VD_MBX_CHIP_T3)
112*53ee8cc1Swenshuai.xi #define MBRegBase   0x010500UL
113*53ee8cc1Swenshuai.xi #define DMDMcuBase  0x003460UL
114*53ee8cc1Swenshuai.xi #else
115*53ee8cc1Swenshuai.xi #define MBRegBase   0x0UL
116*53ee8cc1Swenshuai.xi #define DMDMcuBase  0x0UL
117*53ee8cc1Swenshuai.xi #endif
118*53ee8cc1Swenshuai.xi 
119*53ee8cc1Swenshuai.xi #if (DMD_VD_MBX_CHIP_VERSION == DMD_VD_MBX_CHIP_T3)
120*53ee8cc1Swenshuai.xi #define DemodCmdWrReg               0x01UL     // write register.
121*53ee8cc1Swenshuai.xi #define DemodCmdRdReg               0x02UL     // read register.
122*53ee8cc1Swenshuai.xi #define DemodCmd                    0x010500UL//0x110500L
123*53ee8cc1Swenshuai.xi #define DemodAdrL                   0x010501UL//0x110501L
124*53ee8cc1Swenshuai.xi #define DemodAdrH                   0x010502UL//0x110502L
125*53ee8cc1Swenshuai.xi #define DemodData                   0x010503UL//0x110503L
126*53ee8cc1Swenshuai.xi #endif
127*53ee8cc1Swenshuai.xi 
128*53ee8cc1Swenshuai.xi #define BIN_FOR_ATV      BIT_(0)
129*53ee8cc1Swenshuai.xi #define BIN_FOR_DVBT     BIT_(1)
130*53ee8cc1Swenshuai.xi #define BIN_FOR_DVBC     BIT_(2)
131*53ee8cc1Swenshuai.xi #define BIN_FOR_ATSC     BIT_(3)
132*53ee8cc1Swenshuai.xi #define BIN_FOR_ISDBT     BIT_(4)
133*53ee8cc1Swenshuai.xi #define BIN_FOR_DTMB     BIT_(5)
134*53ee8cc1Swenshuai.xi #define BIN_FOR_DVBS        BIT_(6)
135*53ee8cc1Swenshuai.xi #define BIN_FOR_DVBT2				BIT_(7)
136*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
137*53ee8cc1Swenshuai.xi //  Type and Structure
138*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
139*53ee8cc1Swenshuai.xi 
140*53ee8cc1Swenshuai.xi 
141*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
142*53ee8cc1Swenshuai.xi //  Function and Variable
143*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
144*53ee8cc1Swenshuai.xi MS_BOOL HAL_SYS_DMD_VD_MBX_Init(void);
145*53ee8cc1Swenshuai.xi MS_U8 HAL_SYS_DMD_VD_MBX_GetType(void);
146*53ee8cc1Swenshuai.xi void HAL_SYS_DMD_VD_MBX_SetType(MS_U8 u8Value);
147*53ee8cc1Swenshuai.xi // ATV
148*53ee8cc1Swenshuai.xi MS_BOOL HAL_SYS_DMD_VD_MBX_ATV_WaitReady(void);
149*53ee8cc1Swenshuai.xi MS_BOOL HAL_SYS_DMD_VD_MBX_ATV_ReadByte(MS_U32 u32Reg, MS_U8 *u8Value);
150*53ee8cc1Swenshuai.xi MS_BOOL HAL_SYS_DMD_VD_MBX_ATV_WriteByte(MS_U32 u32Reg, MS_U8 u8Val);
151*53ee8cc1Swenshuai.xi // DVBT & DVBC
152*53ee8cc1Swenshuai.xi void HAL_SYS_DMD_VD_MBX_DVB_WaitHandShake(void);
153*53ee8cc1Swenshuai.xi MS_BOOL HAL_SYS_DMD_VD_MBX_DVB_ReadByte(MS_U16 u16Addr, MS_U8 *u8Value);
154*53ee8cc1Swenshuai.xi MS_BOOL HAL_SYS_DMD_VD_MBX_DVB_WriteByte(MS_U32 u16Addr, MS_U8 u8Data);
155*53ee8cc1Swenshuai.xi MS_BOOL HAL_SYS_DMD_VD_MBX_DVB_ReadDspReg(MS_U32 u16Addr, MS_U8 *u8Value);
156*53ee8cc1Swenshuai.xi MS_BOOL HAL_SYS_DMD_VD_MBX_DVB_WriteDspReg(MS_U32 u16Addr, MS_U8 u8Value);
157*53ee8cc1Swenshuai.xi MS_BOOL HAL_SYS_DMD_VD_MBX_DVB_DBG_ReadReg(MS_U16 u16Addr, MS_U8 *u8Value);
158*53ee8cc1Swenshuai.xi MS_BOOL HAL_SYS_DMD_VD_MBX_DVB_DBG_WriteReg(MS_U32 u16Addr, MS_U8 u8Data);
159*53ee8cc1Swenshuai.xi // ATSC
160*53ee8cc1Swenshuai.xi void HAL_SYS_DMD_VD_MBX_ATSC_WriteByte(MS_U16 u16Addr, MS_U8 u8Data);
161*53ee8cc1Swenshuai.xi MS_U8 HAL_SYS_DMD_VD_MBX_ATSC_ReadByte(MS_U16 u16Addr);
162*53ee8cc1Swenshuai.xi 
163*53ee8cc1Swenshuai.xi #endif // _HAL_SYS_DMD_VD_MBX_H_
164*53ee8cc1Swenshuai.xi 
165