xref: /utopia/UTPA2-700.0.x/modules/security/hal/k6/rsa/halRSA.h (revision 53ee8cc121a030b8d368113ac3e966b4705770ef)
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93*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
94*53ee8cc1Swenshuai.xi 
95*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////////////////////////
96*53ee8cc1Swenshuai.xi // file   halAESDMA.h
97*53ee8cc1Swenshuai.xi // @brief  AESDMA HAL
98*53ee8cc1Swenshuai.xi // @author MStar Semiconductor,Inc.
99*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////////////////////////
100*53ee8cc1Swenshuai.xi #ifndef __HAL_RSA_H__
101*53ee8cc1Swenshuai.xi #define __HAL_RSA_H__
102*53ee8cc1Swenshuai.xi 
103*53ee8cc1Swenshuai.xi 
104*53ee8cc1Swenshuai.xi //--------------------------------------------------------------------------------------------------
105*53ee8cc1Swenshuai.xi //  Driver Compiler Option
106*53ee8cc1Swenshuai.xi //--------------------------------------------------------------------------------------------------
107*53ee8cc1Swenshuai.xi 
108*53ee8cc1Swenshuai.xi //--------------------------------------------------------------------------------------------------
109*53ee8cc1Swenshuai.xi //  AESDMA Hardware Abstraction Layer
110*53ee8cc1Swenshuai.xi //--------------------------------------------------------------------------------------------------
111*53ee8cc1Swenshuai.xi 
112*53ee8cc1Swenshuai.xi // TSP Register
113*53ee8cc1Swenshuai.xi #define _TspPid                     ((REG_Pid*)(REG_PIDFLT_BASE))
114*53ee8cc1Swenshuai.xi #define _TspSec                     ((REG_Sec*)(REG_SECFLT_BASE))
115*53ee8cc1Swenshuai.xi 
116*53ee8cc1Swenshuai.xi #define DIGEST_SIZE_SHA1   5          //160-bit
117*53ee8cc1Swenshuai.xi #define DIGEST_SIZE_SHA256 8          //256-bit
118*53ee8cc1Swenshuai.xi #define SHA_MIU1_ENABLE    0x80000000 //Enable  access MIU1
119*53ee8cc1Swenshuai.xi #define SHA_UNIT_SIZE      8          //64-bits
120*53ee8cc1Swenshuai.xi 
121*53ee8cc1Swenshuai.xi //--------------------------------------------------------------------------------------------------
122*53ee8cc1Swenshuai.xi //  Macro of bit operations
123*53ee8cc1Swenshuai.xi //--------------------------------------------------------------------------------------------------
124*53ee8cc1Swenshuai.xi #define HAS_FLAG(flag, bit)        ((flag) & (bit))
125*53ee8cc1Swenshuai.xi #define SET_FLAG(flag, bit)        ((flag)|= (bit))
126*53ee8cc1Swenshuai.xi #define RESET_FLAG(flag, bit)      ((flag)&= (~(bit)))
127*53ee8cc1Swenshuai.xi #define SET_FLAG1(flag, bit)       ((flag)|  (bit))
128*53ee8cc1Swenshuai.xi #define RESET_FLAG1(flag, bit)     ((flag)&  (~(bit)))
129*53ee8cc1Swenshuai.xi 
130*53ee8cc1Swenshuai.xi 
131*53ee8cc1Swenshuai.xi typedef enum {
132*53ee8cc1Swenshuai.xi     RAM_READ = 0x0,
133*53ee8cc1Swenshuai.xi     RAM_WRITE = 0x1
134*53ee8cc1Swenshuai.xi } RAM_DIR_t;
135*53ee8cc1Swenshuai.xi 
136*53ee8cc1Swenshuai.xi 
137*53ee8cc1Swenshuai.xi typedef enum {
138*53ee8cc1Swenshuai.xi     E_RSA_SW_RESET_OFF = 0x0,
139*53ee8cc1Swenshuai.xi     E_RSA_SW_RESET_ON = 0x1
140*53ee8cc1Swenshuai.xi } RSA_SW_RESET_t;
141*53ee8cc1Swenshuai.xi 
142*53ee8cc1Swenshuai.xi typedef enum {
143*53ee8cc1Swenshuai.xi     E_RSA_USE_SW_KEY = 0x0,
144*53ee8cc1Swenshuai.xi     E_RSA_USE_HW_KEY = 0x1
145*53ee8cc1Swenshuai.xi } RSA_HW_KEY_t;
146*53ee8cc1Swenshuai.xi 
147*53ee8cc1Swenshuai.xi typedef enum {
148*53ee8cc1Swenshuai.xi     E_RSA_USE_PRIV_KEY = 0x0,
149*53ee8cc1Swenshuai.xi     E_RSA_USE_PUB_KEY = 0x1
150*53ee8cc1Swenshuai.xi } RSA_PUB_KEY_t;
151*53ee8cc1Swenshuai.xi 
152*53ee8cc1Swenshuai.xi typedef enum {
153*53ee8cc1Swenshuai.xi     E_RSA_HW_PRI_KEY  = 0x0,
154*53ee8cc1Swenshuai.xi     E_RSA_HW_PUB_KEY1 = 0x1,
155*53ee8cc1Swenshuai.xi     E_RSA_HW_PUB_KEY2 = 0x2
156*53ee8cc1Swenshuai.xi } RSA_PUB_KEY_SEL_t;
157*53ee8cc1Swenshuai.xi 
158*53ee8cc1Swenshuai.xi 
159*53ee8cc1Swenshuai.xi /// HW PARSER Mode
160*53ee8cc1Swenshuai.xi 
161*53ee8cc1Swenshuai.xi 
162*53ee8cc1Swenshuai.xi typedef enum
163*53ee8cc1Swenshuai.xi {
164*53ee8cc1Swenshuai.xi     E_RSA_ADDRESS_E = 0,
165*53ee8cc1Swenshuai.xi     E_RSA_ADDRESS_N,
166*53ee8cc1Swenshuai.xi     E_RSA_ADDRESS_A,
167*53ee8cc1Swenshuai.xi     E_RSA_ADDRESS_Z,
168*53ee8cc1Swenshuai.xi } RSA_IND32Address;
169*53ee8cc1Swenshuai.xi 
170*53ee8cc1Swenshuai.xi 
171*53ee8cc1Swenshuai.xi 
172*53ee8cc1Swenshuai.xi 
173*53ee8cc1Swenshuai.xi 
174*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////
175*53ee8cc1Swenshuai.xi // HAL API
176*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////
177*53ee8cc1Swenshuai.xi void HAL_RSA_ClearInt(void);
178*53ee8cc1Swenshuai.xi void HAL_RSA_Reset(void);
179*53ee8cc1Swenshuai.xi void HAL_RSA_Ind32Ctrl(MS_U8 u8dirction);
180*53ee8cc1Swenshuai.xi void HAL_RSA_LoadSram(MS_U32 *u32Buf, RSA_IND32Address eMode);
181*53ee8cc1Swenshuai.xi void HAL_RSA_SetKeyLength(MS_U32 u32keylen);
182*53ee8cc1Swenshuai.xi void HAL_RSA_SetKeyType(MS_U8 u8hwkey, MS_U8 u8pubkey);
183*53ee8cc1Swenshuai.xi void HAL_RSA_Rootkey_Sel(MS_U8 u8KeySrc);
184*53ee8cc1Swenshuai.xi void HAL_RSA_ExponetialStart(void);
185*53ee8cc1Swenshuai.xi MS_U32 HAL_RSA_GetStatus(void);
186*53ee8cc1Swenshuai.xi void HAL_RSA_FileOutStart(void);
187*53ee8cc1Swenshuai.xi void HAL_RSA_SetFileOutAddr(MS_U32 u32offset);
188*53ee8cc1Swenshuai.xi MS_U32 HAL_RSA_FileOut(void);
189*53ee8cc1Swenshuai.xi MS_U32 HAL_RSA_Get_RSA_IsFinished(void);
190*53ee8cc1Swenshuai.xi void HAL_RSA_SetBank(MS_VIRT u32NonPmBankAddr);
191*53ee8cc1Swenshuai.xi 
192*53ee8cc1Swenshuai.xi MS_BOOL HAL_RSA_SetSecureRange(MS_U32 u32addr, MS_U32 u32size);
193*53ee8cc1Swenshuai.xi 
194*53ee8cc1Swenshuai.xi void HAL_RSA_Hwkey_Switch(void);
195*53ee8cc1Swenshuai.xi MS_U32 HAL_RSA_Read_Hwkey_Switch(void);
196*53ee8cc1Swenshuai.xi 
197*53ee8cc1Swenshuai.xi #endif // #ifndef __HAL_TSP_H__
198