xref: /utopia/UTPA2-700.0.x/modules/pws/hal/mainz/pws/regPWS.h (revision 53ee8cc121a030b8d368113ac3e966b4705770ef)
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77 //<MStar Software>
78 
79 #ifndef _REGPWS_H_
80 #define _REGPWS_H_
81 
82 ////////////////////////////////////////////////////////////////////////////////
83 // Header Files
84 ////////////////////////////////////////////////////////////////////////////////
85 
86 ////////////////////////////////////////////////////////////////////////////////
87 // Define & data type
88 ////////////////////////////////////////////////////////////////////////////////
89 #define BIT0                            (0x0001UL)
90 #define BIT1                            (0x0002UL)
91 #define BIT2                            (0x0004UL)
92 #define BIT3                            (0x0008UL)
93 #define BIT4                            (0x0010UL)
94 #define BIT5                            (0x0020UL)
95 #define BIT6                            (0x0040UL)
96 #define BIT7                            (0x0080UL)
97 #define BIT8                            (0x0100UL)
98 #define BIT9                            (0x0200UL)
99 #define BIT10                           (0x0400UL)
100 #define BIT11                           (0x0800UL)
101 #define BIT12                           (0x1000UL)
102 #define BIT13                           (0x2000UL)
103 #define BIT14                           (0x4000UL)
104 #define BIT15                           (0x8000UL)
105 
106 #define PM_OFF_FLAG                     (0x0E68UL)
107 #define CHIPTOP(x)                      (0x1E00UL + x)
108 
109 //PM
110 #define PM_ADC_RGB                      (0x2508UL)
111 #define PM_ADC_Y                        (0x2509UL)
112 #define PM_GMC                          (0x250AUL)
113 #define PM_CVBS_BUF_OUT                 (0x2570UL)
114 #define PM_DAC_CVBS                     (0x258CUL)
115 #define PM_ADC_VCTRL_L                  (0x2534UL)
116 #define PM_ADC_VCTRL_H                  (0x2535UL)
117 #define PM_ADC_ICTRL_RGB_L              (0x2536UL)
118 #define PM_ADC_ICTRL_RGB_H              (0x2537UL)
119 #define PM_ADC_VTRL_YC_L                (0x253AUL)
120 #define PM_ADC_VTRL_YC_H                (0x253BUL)
121 #define PM_ADC_ICTRL_YC_L               (0x253CUL)
122 #define PM_ADC_ICTRL_YC_H               (0x253DUL)
123 
124 //H264
125 #define SVD_REG_BASE                    (0x1B00UL)  // 0x1B00 - 0x1BFF
126 #define REG_SVD_SW_RST                  (SVD_REG_BASE + 0x0A * 2)
127     #define REG_SVD_RESET_SWRST         BIT0
128     #define REG_SVD_RESET_CPURST        BIT1
129     #define REG_SVD_RESET_SWRST_FIN     BIT2
130     #define REG_SVD_RESET_CPURST_FIN    BIT3
131 
132 #define MVD_CTRL                        (0x1100UL)
133     #define MVD_CTRL_RST                BIT0
134     #define MVD_CTRL_INIT               BIT2
135 
136 #endif
137