xref: /utopia/UTPA2-700.0.x/modules/pwm/hal/mustang/pwm/halPWM.h (revision 53ee8cc121a030b8d368113ac3e966b4705770ef)
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77*53ee8cc1Swenshuai.xi //<MStar Software>
78*53ee8cc1Swenshuai.xi 
79*53ee8cc1Swenshuai.xi #ifndef _HAL_PWM_H_
80*53ee8cc1Swenshuai.xi #define _HAL_PWM_H_
81*53ee8cc1Swenshuai.xi 
82*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
83*53ee8cc1Swenshuai.xi /// @file HALPWM.h
84*53ee8cc1Swenshuai.xi /// @author MStar Semiconductor Inc.
85*53ee8cc1Swenshuai.xi /// @brief Pulse Width Modulation hal
86*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
87*53ee8cc1Swenshuai.xi 
88*53ee8cc1Swenshuai.xi #define PWM_Num                     6
89*53ee8cc1Swenshuai.xi #define MAX_3DPWM_NUM    (4)
90*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
91*53ee8cc1Swenshuai.xi // Macro for utility
92*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
93*53ee8cc1Swenshuai.xi #define MST_MACRO_START             do {
94*53ee8cc1Swenshuai.xi #define MST_MACRO_END               } while (0)
95*53ee8cc1Swenshuai.xi 
96*53ee8cc1Swenshuai.xi #define UNUSED( var )               ((void)(var))
97*53ee8cc1Swenshuai.xi 
98*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
99*53ee8cc1Swenshuai.xi // Macro for bitwise
100*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
101*53ee8cc1Swenshuai.xi #define _BITMASK(loc_msb, loc_lsb)  ((1U << (loc_msb)) - (1U << (loc_lsb)) + (1U << (loc_msb)))
102*53ee8cc1Swenshuai.xi #define BITMASK(x)                  _BITMASK(1?x, 0?x)
103*53ee8cc1Swenshuai.xi #define BITFLAG(loc)                (1U << (loc))
104*53ee8cc1Swenshuai.xi 
105*53ee8cc1Swenshuai.xi #define BIT0                        0x0001
106*53ee8cc1Swenshuai.xi #define BIT1                        0x0002
107*53ee8cc1Swenshuai.xi #define BIT2                        0x0004
108*53ee8cc1Swenshuai.xi #define BIT3                        0x0008
109*53ee8cc1Swenshuai.xi #define BIT4                        0x0010
110*53ee8cc1Swenshuai.xi #define BIT5                        0x0020
111*53ee8cc1Swenshuai.xi #define BIT6                        0x0040
112*53ee8cc1Swenshuai.xi #define BIT7                        0x0080
113*53ee8cc1Swenshuai.xi #define BIT8                        0x0100
114*53ee8cc1Swenshuai.xi #define BIT9                        0x0200
115*53ee8cc1Swenshuai.xi #define BIT10                       0x0400
116*53ee8cc1Swenshuai.xi #define BIT11                       0x0800
117*53ee8cc1Swenshuai.xi #define BIT12                       0x1000
118*53ee8cc1Swenshuai.xi #define BIT13                       0x2000
119*53ee8cc1Swenshuai.xi #define BIT14                       0x4000
120*53ee8cc1Swenshuai.xi #define BIT15                       0x8000
121*53ee8cc1Swenshuai.xi 
122*53ee8cc1Swenshuai.xi #define SETBIT(REG, BIT)            ((REG) |= (1UL << (BIT)))
123*53ee8cc1Swenshuai.xi #define CLRBIT(REG, BIT)            ((REG) &= ~(1UL << (BIT)))
124*53ee8cc1Swenshuai.xi #define GETBIT(REG, BIT)            (((REG) >> (BIT)) & 0x01UL)
125*53ee8cc1Swenshuai.xi #define COMPLEMENT(a)               (~(a))
126*53ee8cc1Swenshuai.xi 
127*53ee8cc1Swenshuai.xi typedef struct _PWM_3D_RegisterInfo
128*53ee8cc1Swenshuai.xi {
129*53ee8cc1Swenshuai.xi     MS_U32 u32RegOffset;
130*53ee8cc1Swenshuai.xi     MS_U8 u8NumBit;
131*53ee8cc1Swenshuai.xi } PWM_3D_RegisterInfo;
132*53ee8cc1Swenshuai.xi 
133*53ee8cc1Swenshuai.xi typedef struct _PWM_3D_RegisterOffset
134*53ee8cc1Swenshuai.xi {
135*53ee8cc1Swenshuai.xi     PWM_3D_RegisterInfo regShift;
136*53ee8cc1Swenshuai.xi     PWM_3D_RegisterInfo regDuty;
137*53ee8cc1Swenshuai.xi } PWM_3D_RegisterOffset;
138*53ee8cc1Swenshuai.xi 
139*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////////////
140*53ee8cc1Swenshuai.xi // Extern function
141*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
142*53ee8cc1Swenshuai.xi void    HAL_PWM_SetIOMapBase(MS_U32 u32Base, MS_U32 u32Base1);
143*53ee8cc1Swenshuai.xi void    HAL_PWM_SetChipTopIOMapBase(MS_U32 u32Base);
144*53ee8cc1Swenshuai.xi MS_U32  HAL_PWM_GetIOMapBase(void);
145*53ee8cc1Swenshuai.xi MS_BOOL HAL_PWM_Init(void);
146*53ee8cc1Swenshuai.xi MS_BOOL HAL_PWM_Oen(PWM_ChNum index, MS_BOOL letch);
147*53ee8cc1Swenshuai.xi MS_BOOL HAL_PWM_UnitDiv(MS_U16 u16DivPWM);
148*53ee8cc1Swenshuai.xi void    HAL_PWM_Period(PWM_ChNum index, MS_U32 u32PeriodPWM);
149*53ee8cc1Swenshuai.xi void    HAL_PWM_DutyCycle(PWM_ChNum index, MS_U32 u32DutyPWM);
150*53ee8cc1Swenshuai.xi void    HAL_PWM_Div(PWM_ChNum index, MS_U16 u16DivPWM);
151*53ee8cc1Swenshuai.xi void    HAL_PWM_Polarity(PWM_ChNum index, MS_BOOL bPolPWM);
152*53ee8cc1Swenshuai.xi void    HAL_PWM_VDBen(PWM_ChNum index, MS_BOOL bVdbenPWM);
153*53ee8cc1Swenshuai.xi void    HAL_PWM_Vrest(PWM_ChNum index, MS_BOOL bRstPWM);
154*53ee8cc1Swenshuai.xi void    HAL_PWM_DBen(PWM_ChNum index, MS_BOOL bdbenPWM);
155*53ee8cc1Swenshuai.xi void    HAL_PWM_RstMux(PWM_ChNum index, MS_BOOL bMuxPWM);
156*53ee8cc1Swenshuai.xi void    HAL_PWM_RstCnt(PWM_ChNum index, MS_U8 u8RstCntPWM);
157*53ee8cc1Swenshuai.xi void    HAL_PWM_BypassUnit(PWM_ChNum index, MS_BOOL bBypassPWM);
158*53ee8cc1Swenshuai.xi MS_BOOL HAL_PWM01_CntMode(PWM_CntMode CntMode);
159*53ee8cc1Swenshuai.xi MS_BOOL HAL_PWM23_CntMode(PWM_CntMode CntMode);
160*53ee8cc1Swenshuai.xi MS_BOOL HAL_PWM67_CntMode(PWM_CntMode CntMode);
161*53ee8cc1Swenshuai.xi MS_BOOL HAL_PWM_Shift(PWM_ChNum index, MS_U32 u32ShiftPWM);
162*53ee8cc1Swenshuai.xi void    HAL_PWM_IMPULSE_EN(PWM_ChNum index, MS_BOOL bdbenPWM);
163*53ee8cc1Swenshuai.xi void    HAL_PWM_ODDEVEN_SYNC(PWM_ChNum index, MS_BOOL bdbenPWM);
164*53ee8cc1Swenshuai.xi void    HAL_PWM_Nvsync(PWM_ChNum index, MS_BOOL bNvsPWM);
165*53ee8cc1Swenshuai.xi void    HAL_PWM_Align(PWM_ChNum index, MS_BOOL bAliPWM);
166*53ee8cc1Swenshuai.xi MS_BOOL HAL_PWM_IsSupport3D(PWM_ChNum index);
167*53ee8cc1Swenshuai.xi void HAL_PWM_SetMultiDiff(MS_BOOL bEnable);
168*53ee8cc1Swenshuai.xi MS_BOOL HAL_PWM_Set3D_DiffWaveform(PWM_ChNum index, MS_U8 u8WaveformIndex, MS_U32 u32Shift, MS_U32 u32Duty);
169*53ee8cc1Swenshuai.xi void    HAL_PM_PWM_Enable(void);
170*53ee8cc1Swenshuai.xi void    HAL_PM_PWM_Period(MS_U16 u16PeriodPWM);
171*53ee8cc1Swenshuai.xi void    HAL_PM_PWM_DutyCycle(MS_U16 u16DutyPWM);
172*53ee8cc1Swenshuai.xi void    HAL_PM_PWM_Div(MS_U8 u8DivPWM);
173*53ee8cc1Swenshuai.xi void    HAL_PM_PWM_Polarity(MS_BOOL bPolPWM);
174*53ee8cc1Swenshuai.xi void    HAL_PM_PWM_DBen(MS_BOOL bdbenPWM);
175*53ee8cc1Swenshuai.xi MS_U32 HAL_PWM_GetPeriod(PWM_ChNum index);
176*53ee8cc1Swenshuai.xi MS_U32 HAL_PWM_GetDutyCycle(PWM_ChNum index);
177*53ee8cc1Swenshuai.xi MS_BOOL HAL_PWM_INV_3D_Flag(MS_BOOL bInvPWM);
178*53ee8cc1Swenshuai.xi #endif // _HAL_PWM_H_
179*53ee8cc1Swenshuai.xi 
180