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76 //******************************************************************************
77 //<MStar Software>
78
79 #define _HAL_PWM_C
80
81 ////////////////////////////////////////////////////////////////////////////////
82 /// @file mhal_PWM.c
83 /// @author MStar Semiconductor Inc.
84 /// @brief Pulse Width Modulation driver
85 ////////////////////////////////////////////////////////////////////////////////
86
87 ////////////////////////////////////////////////////////////////////////////////
88 // Header Files
89 ////////////////////////////////////////////////////////////////////////////////
90 #include "MsCommon.h"
91 #include "MsTypes.h"
92 #include "drvPWM.h"/* this is not good idea, just for temp. */
93 #include "halPWM.h"
94 #include "regPWM.h"
95
96 ////////////////////////////////////////////////////////////////////////////////
97 // Global variable
98 ////////////////////////////////////////////////////////////////////////////////
99
100 static MS_U32 _gMIO_MapBase = 0;
101 static MS_U32 _gMIO_PM_MapBase = 0;
102 static MS_U16 _gPWM_Status = 0;
103
104 //static MS_BOOL _gPWM_DBen = 0;
105 static MS_BOOL _gPWM_VDBen = 0;
106
107 static void _HAL_PWM_VDBen_SW(PWM_ChNum index, MS_BOOL bSwitch);
108 ////////////////////////////////////////////////////////////////////////////////
109 // Define & data type
110 ///////////////////////////////////////////////////////////////////////////////
111 #define WRITE_WORD_MASK(_reg, _val, _mask) {(*((volatile MS_U16*)(_reg))) = ((*((volatile MS_U16*)(_reg))) & ~(_mask)) | ((MS_U16)(_val) & (_mask)); }
112
113 #define HAL_PWM_ReadByte(addr) READ_BYTE((_gMIO_MapBase + REG_PWM_BASE) + ((addr)<<2))
114 #define HAL_PWM_Read2Byte(addr) READ_WORD((_gMIO_MapBase + REG_PWM_BASE) + ((addr)<<2))
115
116 #define HAL_PWM_WriteByte(addr, val) WRITE_BYTE((_gMIO_MapBase + REG_PWM_BASE) + ((addr)<<2), (val))
117 #define HAL_PWM_Write2Byte(addr, val) WRITE_WORD((_gMIO_MapBase + REG_PWM_BASE) + ((addr)<<2), (val))
118 #define HAL_PWM_WriteRegBit(addr, val, mask) WRITE_WORD_MASK((_gMIO_MapBase + REG_PWM_BASE) + ((addr)<<2), (val), (mask))
119
120 #define HAL_TOP_ReadByte(addr) READ_BYTE((_gMIO_MapBase + REG_TOP_BASE) + ((addr)<<2))
121 #define HAL_TOP_Read2Byte(addr) READ_WORD((_gMIO_MapBase + REG_TOP_BASE) + ((addr)<<2))
122 #define HAL_TOP_WriteRegBit(addr, val, mask) WRITE_WORD_MASK((_gMIO_MapBase + REG_TOP_BASE) + ((addr)<<2), (val), (mask))
123
124 #define HAL_PM_WriteByte(addr, val) WRITE_BYTE((_gMIO_PM_MapBase + REG_PM_BASE) + ((addr)<<2), (val))
125 #define HAL_PM_Write2Byte(addr, val) WRITE_WORD((_gMIO_PM_MapBase + REG_PM_BASE) + ((addr)<<2), (val))
126 #define HAL_PM_WriteRegBit(addr, val, mask) WRITE_WORD_MASK((_gMIO_PM_MapBase + REG_PM_BASE) + ((addr)<<2), (val), (mask))
127
128 #define HAL_SUBBANK0 HAL_PWM_WriteByte(0,0)
129 #define HAL_SUBBANK1 HAL_PWM_WriteByte(0,1) /* PWM sub-bank */
130
131 ////////////////////////////////////////////////////////////////////////////////
132 // Global Function
133 ////////////////////////////////////////////////////////////////////////////////
HAL_PWM_Write4Byte(MS_U32 u32RegAddr,MS_U32 u32Val)134 MS_BOOL HAL_PWM_Write4Byte(MS_U32 u32RegAddr, MS_U32 u32Val)
135 {
136 HAL_PWM_Write2Byte(u32RegAddr, u32Val & 0x0000FFFF);
137 HAL_PWM_Write2Byte(u32RegAddr+2, u32Val >> 16);
138 return TRUE;
139 }
140
HAL_PWM_WriteNumberByte(MS_U32 u32RegAddr,MS_U32 u32SetValue,MS_U8 u8BitNum)141 static MS_BOOL HAL_PWM_WriteNumberByte(MS_U32 u32RegAddr, MS_U32 u32SetValue, MS_U8 u8BitNum)
142 {
143 MS_U32 u32Mask=0x0;
144 MS_U32 u32Value=0x0;
145 MS_U8 i;
146
147 for(i = 0; i<u8BitNum; i++)
148 u32Mask |= (1<<i);
149 if (u8BitNum == 0)
150 {
151 return TRUE;
152 }
153 else if (u8BitNum <= 8)
154 {
155 u32Value = u32SetValue & u32Mask;
156 HAL_PWM_WriteByte(u32RegAddr, (MS_U8) u32Value) ;
157 }
158 else if (u8BitNum <= 16)
159 {
160 u32Value = u32SetValue & u32Mask;
161 HAL_PWM_Write2Byte(u32RegAddr, (MS_U16) u32Value) ;
162 }
163 else if (u8BitNum <= 32)
164 {
165 u32Value = u32SetValue & u32Mask;
166 HAL_PWM_Write4Byte(u32RegAddr, (MS_U32) u32Value) ;
167 }
168 else
169 {
170 return FALSE;
171 }
172 return TRUE;
173 }
174
_HAL_PWM_VDBen_SW(PWM_ChNum index,MS_BOOL bSwitch)175 static void _HAL_PWM_VDBen_SW(PWM_ChNum index, MS_BOOL bSwitch)
176 {
177 if(_gPWM_VDBen)
178 {
179 //printf("%s(0x%08X, %x)", __FUNCTION__, (int)index, bSwitch);
180 switch(index)
181 {
182 case E_PWM_CH0:
183 HAL_PWM_WriteRegBit(REG_PWM0_VDBEN_SW, BITS(14:14, bSwitch), BMASK(14:14));
184 break;
185 case E_PWM_CH1:
186 HAL_PWM_WriteRegBit(REG_PWM1_VDBEN_SW, BITS(14:14, bSwitch), BMASK(14:14));
187 break;
188 case E_PWM_CH2:
189 HAL_PWM_WriteRegBit(REG_PWM2_VDBEN_SW, BITS(14:14, bSwitch), BMASK(14:14));
190 break;
191 case E_PWM_CH3:
192 HAL_PWM_WriteRegBit(REG_PWM3_VDBEN_SW, BITS(14:14, bSwitch), BMASK(14:14));
193 break;
194 case E_PWM_CH4:
195 HAL_PWM_WriteRegBit(REG_PWM4_VDBEN_SW, BITS(14:14, bSwitch), BMASK(14:14));
196 break;
197 case E_PWM_CH5:
198 HAL_PWM_WriteRegBit(REG_PWM5_VDBEN_SW, BITS(14:14, bSwitch), BMASK(14:14));
199 break;
200
201 case E_PWM_CH6:
202 case E_PWM_CH7:
203 case E_PWM_CH8:
204 case E_PWM_CH9:
205 default:
206 printf("[ERROR] No Support PWM%d in Miami Platform\n", (int)index);
207 UNUSED(bSwitch);
208 break;
209 }
210 }
211 }
212
213 ////////////////////////////////////////////////////////////////////////////////
214 /// @brief \b Function \b Name: HAL_PWM_SetIOMapBase
215 /// @brief \b Function \b Description: Set IO Map base
216 /// @param <IN> \b None :
217 /// @param <OUT> \b None :
218 /// @param <RET> \b None :
219 /// @param <GLOBAL> \b None :
220 ////////////////////////////////////////////////////////////////////////////////
HAL_PWM_SetIOMapBase(MS_U32 u32Base,MS_U32 u32Base1)221 void HAL_PWM_SetIOMapBase(MS_U32 u32Base,MS_U32 u32Base1)
222 {
223 _gMIO_MapBase = u32Base;
224 _gMIO_PM_MapBase = u32Base1;
225 }
226
227 ////////////////////////////////////////////////////////////////////////////////
228 /// @brief \b Function \b Name: HAL_PWM_SetChipTopIOMapBase
229 /// @brief \b Function \b Description: Set chip top IO Map base
230 /// @param <IN> \b None :
231 /// @param <OUT> \b None :
232 /// @param <RET> \b None :
233 /// @param <GLOBAL> \b None :
234 ////////////////////////////////////////////////////////////////////////////////
HAL_PWM_SetChipTopIOMapBase(MS_U32 u32Base)235 void HAL_PWM_SetChipTopIOMapBase(MS_U32 u32Base)
236 {
237
238 }
239
240 ////////////////////////////////////////////////////////////////////////////////
241 /// @brief \b Function \b Name: HAL_PWM_GetIOMapBase
242 /// @brief \b Function \b Description: Get IO Map base
243 /// @param <IN> \b None :
244 /// @param <OUT> \b None :
245 /// @param <RET> \b None :
246 /// @param <GLOBAL> \b None :
247 ////////////////////////////////////////////////////////////////////////////////
HAL_PWM_GetIOMapBase(void)248 MS_U32 HAL_PWM_GetIOMapBase(void)
249 {
250 return _gMIO_MapBase;
251 }
252
253 ////////////////////////////////////////////////////////////////////////////////
254 /// @brief \b Function \b Name: HAL_PWM_Init
255 /// @brief \b Function \b Description: Initial PWM
256 /// @param <IN> \b None :
257 /// @param <OUT> \b None :
258 /// @param <RET> \b MS_BOOL :
259 /// @param <GLOBAL> \b None :
260 ////////////////////////////////////////////////////////////////////////////////
HAL_PWM_Init(void)261 MS_BOOL HAL_PWM_Init(void)
262 {
263 _gPWM_Status = HAL_TOP_Read2Byte(REG_PWM_MODE);
264
265 if(_gPWM_Status & PAD_PWM0_OUT)
266 {
267 printf("Init PWM0\n");
268 }
269 if(_gPWM_Status & PAD_PWM1_OUT)
270 {
271 printf("Init PWM1\n");
272 }
273 if(_gPWM_Status & PAD_PWM2_OUT)
274 {
275 printf("Init PWM2\n");
276 }
277 if(_gPWM_Status & PAD_PWM3_OUT)
278 {
279 printf("Init PWM3\n");
280 }
281 if(_gPWM_Status & PAD_PWM4_OUT)
282 {
283 printf("Init PWM4\n");
284 }
285
286 _gPWM_Status = HAL_TOP_Read2Byte(REG_PWM5_MODE);
287 if(_gPWM_Status & PAD_PWM5_OUT)
288 {
289 printf("Init PWM5\n");
290 }
291
292 return TRUE;
293 }
294
295 ////////////////////////////////////////////////////////////////////////////////
296 /// @brief \b Function \b Name: HAL_PWM_Oen
297 /// @brief \b Function \b Description: Switch PWM PAD as Output or Input
298 /// @param <IN> \b MS_U16 : index
299 /// @param <IN> \b MS_BOOL : letch, 1 for Input; 0 for Output
300 /// @param <OUT> \b None :
301 /// @param <RET> \b MS_BOOL :
302 /// @param <GLOBAL> \b None :
303 ////////////////////////////////////////////////////////////////////////////////
HAL_PWM_Oen(PWM_ChNum index,MS_BOOL letch)304 MS_BOOL HAL_PWM_Oen(PWM_ChNum index, MS_BOOL letch)
305 {
306 //Use the PWM oen in ChipTop Reg first, if it provides for.
307
308 switch(index)
309 {
310 case E_PWM_CH0:
311 HAL_TOP_WriteRegBit(REG_PWM_OEN, BITS(0:0, letch), BMASK(0:0));
312 break;
313 case E_PWM_CH1:
314 HAL_TOP_WriteRegBit(REG_PWM_OEN, BITS(1:1, letch), BMASK(1:1));
315 HAL_TOP_WriteRegBit(REG_PWM1_MODE, BITS(5:4, 1), BMASK(5:4));
316 break;
317 case E_PWM_CH2:
318 HAL_TOP_WriteRegBit(REG_PWM_OEN, BITS(2:2, letch), BMASK(2:2));
319 break;
320 case E_PWM_CH3:
321 HAL_TOP_WriteRegBit(REG_PWM_OEN, BITS(3:3, letch), BMASK(3:3));
322 break;
323 case E_PWM_CH4:
324 HAL_TOP_WriteRegBit(REG_PWM_OEN, BITS(4:4, letch), BMASK(4:4));
325 break;
326 case E_PWM_CH5:
327 HAL_TOP_WriteRegBit(REG_PWM_OEN, BITS(5:5, letch), BMASK(4:4));
328 break;
329
330 case E_PWM_CH6:
331 case E_PWM_CH7:
332 case E_PWM_CH8:
333 case E_PWM_CH9:
334 default:
335 printf("[ERROR] No Support PWM%d in Miami Platform\n", (int)index);
336 UNUSED(letch);
337 break;
338 }
339
340 return TRUE;
341 }
342
343 ////////////////////////////////////////////////////////////////////////////////
344 /// @brief \b Function \b Name : HAL_PWM_UnitDiv
345 /// @brief \b Function \b Description : Set the Unit_Div of the pwm
346 /// @param <IN> \b MS_U16 : the Unit_Div value
347 /// @param <OUT> \b None :
348 /// @param <RET> \b MS_BOOL : 1 for doen; 0 for not done
349 /// @param <GLOBAL> \b None :
350 ////////////////////////////////////////////////////////////////////////////////
HAL_PWM_UnitDiv(MS_U16 u16DivPWM)351 MS_BOOL HAL_PWM_UnitDiv(MS_U16 u16DivPWM)
352 {
353 UNUSED(u16DivPWM);
354 printf("[ERROR] No Support PWM Clock Unit Divider in Miami Platform\n");
355 return FALSE;
356 }
357
358 ////////////////////////////////////////////////////////////////////////////////
359 /// @brief \b Function \b Name : HAL_PWM_Period
360 /// @brief \b Function \b Description : Set the period of the specific pwm
361 /// @param <IN> \b PWM_ChNum : Enum of the PWM CH
362 /// @param <IN> \b MS_U32 : the 18-bit Period value
363 /// @param <OUT> \b None :
364 /// @param <RET> \b None :
365 /// @param <GLOBAL> \b None :
366 ////////////////////////////////////////////////////////////////////////////////
HAL_PWM_Period(PWM_ChNum index,MS_U32 u32PeriodPWM)367 void HAL_PWM_Period(PWM_ChNum index, MS_U32 u32PeriodPWM)
368 {
369 MS_U16 Period_L;
370 MS_U16 Period_H;
371 Period_L = (MS_U16)u32PeriodPWM;
372 Period_H = (MS_U16)(u32PeriodPWM >> 16);
373
374 HAL_SUBBANK1;
375 _HAL_PWM_VDBen_SW(index, 0);
376 /* the Period capability is restricted to ONLY 18-bit */
377 switch(index)
378 {
379 case E_PWM_CH0:
380 HAL_PWM_Write2Byte(REG_PWM0_PERIOD, Period_L);
381 HAL_PWM_WriteRegBit(REG_PWM0_PERIOD_EXT, BITS(1:0, Period_H), BMASK(1:0));
382 break;
383 case E_PWM_CH1:
384 HAL_PWM_Write2Byte(REG_PWM1_PERIOD, Period_L);
385 HAL_PWM_WriteRegBit(REG_PWM1_PERIOD_EXT, BITS(3:2, Period_H), BMASK(3:2));
386 break;
387 case E_PWM_CH2:
388 HAL_PWM_Write2Byte(REG_PWM2_PERIOD, Period_L);
389 HAL_PWM_WriteRegBit(REG_PWM2_PERIOD_EXT, BITS(5:4, Period_H), BMASK(5:4));
390 break;
391 case E_PWM_CH3:
392 HAL_PWM_Write2Byte(REG_PWM3_PERIOD, Period_L);
393 HAL_PWM_WriteRegBit(REG_PWM3_PERIOD_EXT, BITS(7:6, Period_H), BMASK(7:6));
394 break;
395 case E_PWM_CH4:
396 HAL_PWM_Write2Byte(REG_PWM4_PERIOD, Period_L);
397 HAL_PWM_WriteRegBit(REG_PWM4_PERIOD_EXT, BITS(9:8, Period_H), BMASK(9:8));
398 break;
399 case E_PWM_CH5:
400 HAL_PWM_Write2Byte(REG_PWM5_PERIOD, Period_L);
401 HAL_PWM_WriteRegBit(REG_PWM5_PERIOD_EXT, BITS(11:10, Period_H), BMASK(11:10));
402 break;
403
404 case E_PWM_CH6:
405 case E_PWM_CH7:
406 case E_PWM_CH8:
407 case E_PWM_CH9:
408 default:
409 printf("[ERROR] No Support PWM%d in Miami Platform\n", (int)index);
410 UNUSED(Period_L);
411 UNUSED(Period_H);
412 break;
413 }
414
415 _HAL_PWM_VDBen_SW(index, 1);
416 HAL_SUBBANK0;
417 }
418
HAL_PWM_GetPeriod(PWM_ChNum index)419 MS_U32 HAL_PWM_GetPeriod(PWM_ChNum index)
420 {
421 MS_U16 Period_L=0, Period_H=0;
422 HAL_SUBBANK1;
423 _HAL_PWM_VDBen_SW(index,0);
424 switch(index)
425 {
426 case E_PWM_CH0:
427 Period_L = HAL_PWM_Read2Byte(REG_PWM0_PERIOD);
428 Period_H = HAL_PWM_ReadByte(REG_PWM0_PERIOD_EXT) & BMASK(1:0);
429 break;
430 case E_PWM_CH1:
431 Period_L = HAL_PWM_Read2Byte(REG_PWM1_PERIOD);
432 Period_H = (HAL_PWM_ReadByte(REG_PWM1_PERIOD_EXT) & BMASK(3:2)) >> 2;
433 break;
434 case E_PWM_CH2:
435 Period_L = HAL_PWM_Read2Byte(REG_PWM2_PERIOD);
436 Period_H = (HAL_PWM_ReadByte(REG_PWM2_PERIOD_EXT) & BMASK(5:4)) >> 4;
437 break;
438 case E_PWM_CH3:
439 Period_L = HAL_PWM_Read2Byte(REG_PWM3_PERIOD);
440 Period_H = (HAL_PWM_ReadByte(REG_PWM3_PERIOD_EXT) & BMASK(7:6)) >> 6;
441 break;
442 case E_PWM_CH4:
443 Period_L = HAL_PWM_Read2Byte(REG_PWM4_PERIOD);
444 Period_H = (HAL_PWM_ReadByte(REG_PWM4_PERIOD_EXT) & BMASK(9:8)) >> 8;
445 break;
446 case E_PWM_CH5:
447 Period_L = HAL_PWM_Read2Byte(REG_PWM5_PERIOD);
448 Period_H = (HAL_PWM_Read2Byte(REG_PWM5_PERIOD_EXT) & BMASK(11:10)) >> 8;
449 break;
450 case E_PWM_CH6:
451 case E_PWM_CH7:
452 case E_PWM_CH8:
453 case E_PWM_CH9:
454 printf("[Utopia] The PWM%d is not support\n", (int)index);
455 UNUSED(Period_L);
456 UNUSED(Period_H);
457 break;
458 default:
459 break;
460 }
461 _HAL_PWM_VDBen_SW(index,1);
462 HAL_SUBBANK0;
463 return ((MS_U32)Period_H << 16 | Period_L);
464 }
465 ////////////////////////////////////////////////////////////////////////////////
466 /// @brief \b Function \b Name : HAL_PWM_DutyCycle
467 /// @brief \b Function \b Description : Set the Duty of the specific pwm
468 /// @param <IN> \b PWM_ChNum : Enum of the PWM CH
469 /// @param <IN> \b MS_U32 : the 18-bit Duty value
470 /// @param <OUT> \b None :
471 /// @param <RET> \b None :
472 /// @param <GLOBAL> \b None :
473 ////////////////////////////////////////////////////////////////////////////////
HAL_PWM_DutyCycle(PWM_ChNum index,MS_U32 u32DutyPWM)474 void HAL_PWM_DutyCycle(PWM_ChNum index, MS_U32 u32DutyPWM)
475 {
476 MS_U16 Duty_L, Duty_H;
477
478 Duty_L = (MS_U16)u32DutyPWM;
479 Duty_H = (MS_U8)(u32DutyPWM >> 16);
480
481 HAL_SUBBANK1;
482 _HAL_PWM_VDBen_SW(index, 0);
483 /* the Duty capability is restricted to ONLY 10-bit */
484 switch(index)
485 {
486 case E_PWM_CH0:
487 HAL_PWM_Write2Byte(REG_PWM0_DUTY, Duty_L);
488 HAL_PWM_WriteRegBit(REG_PWM0_DUTY_EXT, BITS(1:0, Duty_H), BMASK(1:0));
489 break;
490 case E_PWM_CH1:
491 HAL_PWM_Write2Byte(REG_PWM1_DUTY, Duty_L);
492 HAL_PWM_WriteRegBit(REG_PWM1_DUTY_EXT, BITS(3:2, Duty_H), BMASK(3:2));
493 break;
494 case E_PWM_CH2:
495 HAL_PWM_Write2Byte(REG_PWM2_DUTY, Duty_L);
496 HAL_PWM_WriteRegBit(REG_PWM2_DUTY_EXT, BITS(5:4, Duty_H), BMASK(5:4));
497 break;
498 case E_PWM_CH3:
499 HAL_PWM_Write2Byte(REG_PWM3_DUTY, Duty_L);
500 HAL_PWM_WriteRegBit(REG_PWM3_DUTY_EXT, BITS(7:6, Duty_H), BMASK(7:6));
501 break;
502 case E_PWM_CH4:
503 HAL_PWM_Write2Byte(REG_PWM4_DUTY, Duty_L);
504 HAL_PWM_WriteRegBit(REG_PWM4_DUTY_EXT, BITS(9:8, Duty_H), BMASK(9:8));
505 break;
506 case E_PWM_CH5:
507 HAL_PWM_Write2Byte(REG_PWM5_DUTY, Duty_L);
508 HAL_PWM_WriteRegBit(REG_PWM5_DUTY_EXT, BITS(11:10, Duty_H), BMASK(11:10));
509 break;
510
511 case E_PWM_CH6:
512 case E_PWM_CH7:
513 case E_PWM_CH8:
514 case E_PWM_CH9:
515 default:
516 printf("[ERROR] No Support PWM%d in Miami Platform\n", (int)index);
517 UNUSED(Duty_L);
518 UNUSED(Duty_H);
519 break;
520 }
521
522 _HAL_PWM_VDBen_SW(index, 1);
523 HAL_SUBBANK0;
524 }
525
HAL_PWM_GetDutyCycle(PWM_ChNum index)526 MS_U32 HAL_PWM_GetDutyCycle(PWM_ChNum index)
527 {
528 MS_U16 Duty_L=0, Duty_H=0;
529
530 //Duty_L = (MS_U16)u32DutyPWM;
531 //Duty_H = (MS_U8)(u32DutyPWM >> 16);
532
533 HAL_SUBBANK1;
534 _HAL_PWM_VDBen_SW(index,0);
535 /* the Duty capability is restricted to ONLY 10-bit */
536 switch(index)
537 {
538 case E_PWM_CH0:
539 Duty_L = HAL_PWM_Read2Byte(REG_PWM0_DUTY);
540 Duty_H = HAL_PWM_ReadByte(REG_PWM0_DUTY_EXT) & BMASK(1:0);
541 break;
542 case E_PWM_CH1:
543 Duty_L = HAL_PWM_Read2Byte(REG_PWM1_DUTY);
544 Duty_H = (HAL_PWM_ReadByte(REG_PWM1_DUTY_EXT) & BMASK(3:2)) >> 2;
545 break;
546 case E_PWM_CH2:
547 Duty_L = HAL_PWM_Read2Byte(REG_PWM2_DUTY);
548 Duty_H = (HAL_PWM_ReadByte(REG_PWM2_DUTY_EXT) & BMASK(5:4)) >> 4;
549 break;
550 case E_PWM_CH3:
551 Duty_L = HAL_PWM_Read2Byte(REG_PWM3_DUTY);
552 Duty_H = (HAL_PWM_ReadByte(REG_PWM3_DUTY_EXT) & BMASK(7:6)) >> 6;
553 break;
554 case E_PWM_CH4:
555 Duty_L = HAL_PWM_Read2Byte(REG_PWM4_DUTY);
556 Duty_H = (HAL_PWM_ReadByte(REG_PWM4_DUTY_EXT) & BMASK(9:8)) >> 8;
557 break;
558 case E_PWM_CH5:
559 Duty_L = HAL_PWM_Read2Byte(REG_PWM5_DUTY);
560 Duty_H = (HAL_PWM_Read2Byte(REG_PWM5_DUTY_EXT) & BMASK(11:10)) >> 8;
561 break;
562 case E_PWM_CH6:
563 case E_PWM_CH7:
564 case E_PWM_CH8:
565 case E_PWM_CH9:
566 printf("[Utopia] The PWM%d is not support\n", (int)index);
567 UNUSED(Duty_L);
568 UNUSED(Duty_H);
569 break;
570 default:
571 break;
572 }
573 _HAL_PWM_VDBen_SW(index,1);
574 HAL_SUBBANK0;
575 return ((MS_U32)Duty_H << 16 | Duty_L);
576 }
577
578 ////////////////////////////////////////////////////////////////////////////////
579 /// @brief \b Function \b Name : HAL_PWM_Div
580 /// @brief \b Function \b Description : Set the Div of the specific pwm
581 /// @param <IN> \b PWM_ChNum : Enum of the PWM CH
582 /// @param <IN> \b MS_U16 : the 16-bit Div value
583 /// @param <OUT> \b None :
584 /// @param <RET> \b None :
585 /// @param <GLOBAL> \b None :
586 ////////////////////////////////////////////////////////////////////////////////
HAL_PWM_Div(PWM_ChNum index,MS_U16 u16DivPWM)587 void HAL_PWM_Div(PWM_ChNum index, MS_U16 u16DivPWM)
588 {
589 MS_U8 u8DivPWM[2] = {0};
590
591 u8DivPWM[0] = (MS_U8)(u16DivPWM&0xFF);
592 u8DivPWM[1] = (MS_U8)(u16DivPWM >> 8);
593
594 HAL_SUBBANK1;
595 /* the Div capability is restricted to ONLY 16-bit */
596 switch(index)
597 {
598 case E_PWM_CH0:
599 HAL_PWM_WriteByte(REG_PWM0_DIV, u8DivPWM[0]);
600 HAL_PWM_WriteByte(REG_PWM0_DIV_EXT, u8DivPWM[1]);
601 break;
602 case E_PWM_CH1:
603 HAL_PWM_WriteByte(REG_PWM1_DIV, u8DivPWM[0]);
604 HAL_PWM_WriteRegBit(REG_PWM1_DIV_EXT, u16DivPWM, BMASK(15:8));
605 break;
606 case E_PWM_CH2:
607 HAL_PWM_WriteByte(REG_PWM2_DIV, u8DivPWM[0]);
608 HAL_PWM_WriteByte(REG_PWM2_DIV_EXT, u8DivPWM[1]);
609 break;
610 case E_PWM_CH3:
611 HAL_PWM_WriteByte(REG_PWM3_DIV, u8DivPWM[0]);
612 HAL_PWM_WriteRegBit(REG_PWM3_DIV_EXT, u16DivPWM, BMASK(15:8));
613 break;
614 case E_PWM_CH4:
615 HAL_PWM_WriteByte(REG_PWM4_DIV, u8DivPWM[0]);
616 HAL_PWM_WriteByte(REG_PWM4_DIV_EXT, u8DivPWM[1]);
617 break;
618 case E_PWM_CH5:
619 HAL_PWM_WriteByte(REG_PWM5_DIV, u8DivPWM[0]);
620 HAL_PWM_WriteRegBit(REG_PWM5_DIV_EXT, u16DivPWM, BMASK(15:8));
621 break;
622
623 case E_PWM_CH6:
624 case E_PWM_CH7:
625 case E_PWM_CH8:
626 case E_PWM_CH9:
627 default:
628 printf("[ERROR] No Support PWM%d in Miami Platform\n", (int)index);
629 UNUSED(u16DivPWM);
630 break;
631 }
632
633 HAL_SUBBANK0;
634 }
635
636 ////////////////////////////////////////////////////////////////////////////////
637 /// @brief \b Function \b Name : HAL_PWM_Polarity
638 /// @brief \b Function \b Description : Set the Polarity of the specific pwm
639 /// @param <IN> \b PWM_ChNum : Enum of the PWM CH
640 /// @param <IN> \b MS_BOOL : 1 for enable; 0 for disable
641 /// @param <OUT> \b None :
642 /// @param <RET> \b None :
643 /// @param <GLOBAL> \b None :
644 ////////////////////////////////////////////////////////////////////////////////
HAL_PWM_Polarity(PWM_ChNum index,MS_BOOL bPolPWM)645 void HAL_PWM_Polarity(PWM_ChNum index, MS_BOOL bPolPWM)
646 {
647 HAL_SUBBANK1;
648 switch(index)
649 {
650 case E_PWM_CH0:
651 HAL_PWM_WriteRegBit(REG_PWM0_PORARITY,BITS(8:8, bPolPWM), BMASK(8:8));
652 break;
653 case E_PWM_CH1:
654 HAL_PWM_WriteRegBit(REG_PWM1_PORARITY,BITS(8:8, bPolPWM), BMASK(8:8));
655 break;
656 case E_PWM_CH2:
657 HAL_PWM_WriteRegBit(REG_PWM2_PORARITY,BITS(8:8, bPolPWM), BMASK(8:8));
658 break;
659 case E_PWM_CH3:
660 HAL_PWM_WriteRegBit(REG_PWM3_PORARITY,BITS(8:8, bPolPWM), BMASK(8:8));
661 break;
662 case E_PWM_CH4:
663 HAL_PWM_WriteRegBit(REG_PWM4_PORARITY,BITS(8:8, bPolPWM), BMASK(8:8));
664 break;
665 case E_PWM_CH5:
666 HAL_PWM_WriteRegBit(REG_PWM5_PORARITY,BITS(8:8, bPolPWM), BMASK(8:8));
667 break;
668 case E_PWM_CH6:
669 case E_PWM_CH7:
670 case E_PWM_CH8:
671 case E_PWM_CH9:
672 default:
673 printf("[ERROR] No Support PWM%d in Miami Platform\n", (int)index);
674 UNUSED(bPolPWM);
675 break;
676 }
677
678 HAL_SUBBANK0;
679 }
680
681 ////////////////////////////////////////////////////////////////////////////////
682 /// @brief \b Function \b Name : HAL_PWM_VDBen
683 /// @brief \b Function \b Description : Set the Vsync Double buffer of the specific pwm
684 /// @param <IN> \b PWM_ChNum : Enum of the PWM CH
685 /// @param <IN> \b MS_BOOL : 1 for enable; 0 for disable
686 /// @param <OUT> \b None :
687 /// @param <RET> \b None :
688 /// @param <GLOBAL> \b None :
689 ////////////////////////////////////////////////////////////////////////////////
HAL_PWM_VDBen(PWM_ChNum index,MS_BOOL bVdbenPWM)690 void HAL_PWM_VDBen(PWM_ChNum index, MS_BOOL bVdbenPWM)
691 {
692 _gPWM_VDBen = bVdbenPWM;
693
694 HAL_SUBBANK1;
695
696 switch(index)
697 {
698 case E_PWM_CH0:
699 HAL_PWM_WriteRegBit(REG_PWM0_VDBEN, BITS(9:9, bVdbenPWM), BMASK(9:9));
700 break;
701 case E_PWM_CH1:
702 HAL_PWM_WriteRegBit(REG_PWM1_VDBEN, BITS(9:9, bVdbenPWM), BMASK(9:9));
703 break;
704 case E_PWM_CH2:
705 HAL_PWM_WriteRegBit(REG_PWM2_VDBEN, BITS(9:9, bVdbenPWM), BMASK(9:9));
706 break;
707 case E_PWM_CH3:
708 HAL_PWM_WriteRegBit(REG_PWM3_VDBEN, BITS(9:9, bVdbenPWM), BMASK(9:9));
709 break;
710 case E_PWM_CH4:
711 HAL_PWM_WriteRegBit(REG_PWM4_VDBEN, BITS(9:9, bVdbenPWM), BMASK(9:9));
712 break;
713 case E_PWM_CH5:
714 HAL_PWM_WriteRegBit(REG_PWM5_VDBEN, BITS(9:9, bVdbenPWM), BMASK(9:9));
715 break;
716
717 case E_PWM_CH6:
718 case E_PWM_CH7:
719 case E_PWM_CH8:
720 case E_PWM_CH9:
721 default:
722 printf("[ERROR] No Support PWM%d in Miami Platform\n", (int)index);
723 UNUSED(bVdbenPWM);
724 break;
725 }
726
727 HAL_SUBBANK0;
728 }
729
730 ////////////////////////////////////////////////////////////////////////////////
731 /// @brief \b Function \b Name : HAL_PWM_Vrest
732 /// @brief \b Function \b Description : Set the Hsync reset of the specific pwm
733 /// @param <IN> \b PWM_ChNum : Enum of the PWM CH
734 /// @param <IN> \b MS_BOOL : 1 for enable; 0 for disable
735 /// @param <OUT> \b None :
736 /// @param <RET> \b None :
737 /// @param <GLOBAL> \b None :
738 ////////////////////////////////////////////////////////////////////////////////
HAL_PWM_Vrest(PWM_ChNum index,MS_BOOL bRstPWM)739 void HAL_PWM_Vrest(PWM_ChNum index, MS_BOOL bRstPWM)
740 {
741 HAL_SUBBANK1;
742
743 switch(index)
744 {
745 case E_PWM_CH0:
746 HAL_PWM_WriteRegBit(REG_PWM0_RESET_EN, BITS(10:10, bRstPWM), BMASK(10:10));
747 break;
748 case E_PWM_CH1:
749 HAL_PWM_WriteRegBit(REG_PWM1_RESET_EN, BITS(10:10, bRstPWM), BMASK(10:10));
750 break;
751 case E_PWM_CH2:
752 HAL_PWM_WriteRegBit(REG_PWM2_RESET_EN, BITS(10:10, bRstPWM), BMASK(10:10));
753 break;
754 case E_PWM_CH3:
755 HAL_PWM_WriteRegBit(REG_PWM3_RESET_EN, BITS(10:10, bRstPWM), BMASK(10:10));
756 break;
757 case E_PWM_CH4:
758 HAL_PWM_WriteRegBit(REG_PWM4_RESET_EN, BITS(10:10, bRstPWM), BMASK(10:10));
759 break;
760 case E_PWM_CH5:
761 HAL_PWM_WriteRegBit(REG_PWM5_RESET_EN, BITS(10:10, bRstPWM), BMASK(10:10));
762 break;
763
764 case E_PWM_CH6:
765 case E_PWM_CH7:
766 case E_PWM_CH8:
767 case E_PWM_CH9:
768 default:
769 printf("[ERROR] No Support PWM%d in Miami Platform\n", (int)index);
770 UNUSED(bRstPWM);
771 break;
772 }
773
774 HAL_SUBBANK0;
775 }
776
777 ////////////////////////////////////////////////////////////////////////////////
778 /// @brief \b Function \b Name : HAL_PWM_DBen
779 /// @brief \b Function \b Description : Set the Double buffer of the specific pwm
780 /// @param <IN> \b PWM_ChNum : Enum of the PWM CH
781 /// @param <IN> \b MS_BOOL : 1 for enable; 0 for disable
782 /// @param <OUT> \b None :
783 /// @param <RET> \b None :
784 /// @param <GLOBAL> \b None :
785 ////////////////////////////////////////////////////////////////////////////////
HAL_PWM_DBen(PWM_ChNum index,MS_BOOL bdbenPWM)786 void HAL_PWM_DBen(PWM_ChNum index, MS_BOOL bdbenPWM)
787 {
788 //_gPWM_DBen = bdbenPWM;
789
790 HAL_SUBBANK1;
791
792 switch(index)
793 {
794 case E_PWM_CH0:
795 HAL_PWM_WriteRegBit(REG_PWM0_DBEN, BITS(11:11, bdbenPWM), BMASK(11:11));
796 break;
797 case E_PWM_CH1:
798 HAL_PWM_WriteRegBit(REG_PWM1_DBEN, BITS(11:11, bdbenPWM), BMASK(11:11));
799 break;
800 case E_PWM_CH2:
801 HAL_PWM_WriteRegBit(REG_PWM2_DBEN, BITS(11:11, bdbenPWM), BMASK(11:11));
802 break;
803 case E_PWM_CH3:
804 HAL_PWM_WriteRegBit(REG_PWM3_DBEN, BITS(11:11, bdbenPWM), BMASK(11:11));
805 break;
806 case E_PWM_CH4:
807 HAL_PWM_WriteRegBit(REG_PWM4_DBEN, BITS(11:11, bdbenPWM), BMASK(11:11));
808 break;
809 case E_PWM_CH5:
810 HAL_PWM_WriteRegBit(REG_PWM5_DBEN, BITS(11:11, bdbenPWM), BMASK(11:11));
811 break;
812
813 case E_PWM_CH6:
814 case E_PWM_CH7:
815 case E_PWM_CH8:
816 case E_PWM_CH9:
817 default:
818 printf("[ERROR] No Support PWM%d in Miami Platform\n", (int)index);
819 UNUSED(bdbenPWM);
820 break;
821 }
822
823 HAL_SUBBANK0;
824 }
825
HAL_PWM_IMPULSE_EN(PWM_ChNum index,MS_BOOL bdbenPWM)826 void HAL_PWM_IMPULSE_EN(PWM_ChNum index, MS_BOOL bdbenPWM)
827 {
828 HAL_SUBBANK1;
829
830 switch(index)
831 {
832 case E_PWM_CH0:
833 HAL_PWM_WriteRegBit(REG_PWM0_IMPULSE_EN, BITS(12:12, bdbenPWM), BMASK(12:12));
834 break;
835 case E_PWM_CH1:
836 HAL_PWM_WriteRegBit(REG_PWM1_IMPULSE_EN, BITS(12:12, bdbenPWM), BMASK(12:12));
837 break;
838 case E_PWM_CH2:
839 HAL_PWM_WriteRegBit(REG_PWM2_IMPULSE_EN, BITS(12:12, bdbenPWM), BMASK(12:12));
840 break;
841 case E_PWM_CH3:
842 HAL_PWM_WriteRegBit(REG_PWM3_IMPULSE_EN, BITS(12:12, bdbenPWM), BMASK(12:12));
843 break;
844 case E_PWM_CH4:
845 HAL_PWM_WriteRegBit(REG_PWM4_IMPULSE_EN, BITS(12:12, bdbenPWM), BMASK(12:12));
846 break;
847 case E_PWM_CH5:
848 HAL_PWM_WriteRegBit(REG_PWM5_IMPULSE_EN, BITS(12:12, bdbenPWM), BMASK(12:12));
849 break;
850
851 case E_PWM_CH6:
852 case E_PWM_CH7:
853 case E_PWM_CH8:
854 case E_PWM_CH9:
855 default:
856 printf("[ERROR] No Support PWM%d in Miami Platform\n", (int)index);
857 UNUSED(bdbenPWM);
858 break;
859 }
860
861 HAL_SUBBANK0;
862 }
863
864
HAL_PWM_ODDEVEN_SYNC(PWM_ChNum index,MS_BOOL bdbenPWM)865 void HAL_PWM_ODDEVEN_SYNC(PWM_ChNum index, MS_BOOL bdbenPWM)
866 {
867 HAL_SUBBANK1;
868
869 switch(index)
870 {
871 case E_PWM_CH0:
872 HAL_PWM_WriteRegBit(REG_PWM0_ODDEVEN_SYNC, BITS(13:13, bdbenPWM), BMASK(13:13));
873 break;
874 case E_PWM_CH1:
875 HAL_PWM_WriteRegBit(REG_PWM1_ODDEVEN_SYNC, BITS(13:13, bdbenPWM), BMASK(13:13));
876 break;
877 case E_PWM_CH2:
878 HAL_PWM_WriteRegBit(REG_PWM2_ODDEVEN_SYNC, BITS(13:13, bdbenPWM), BMASK(13:13));
879 break;
880 case E_PWM_CH3:
881 HAL_PWM_WriteRegBit(REG_PWM3_ODDEVEN_SYNC, BITS(13:13, bdbenPWM), BMASK(13:13));
882 break;
883 case E_PWM_CH4:
884 HAL_PWM_WriteRegBit(REG_PWM4_ODDEVEN_SYNC, BITS(13:13, bdbenPWM), BMASK(13:13));
885 break;
886 case E_PWM_CH5:
887 HAL_PWM_WriteRegBit(REG_PWM5_ODDEVEN_SYNC, BITS(13:13, bdbenPWM), BMASK(13:13));
888 break;
889
890 case E_PWM_CH6:
891 case E_PWM_CH7:
892 case E_PWM_CH8:
893 case E_PWM_CH9:
894 default:
895 printf("[ERROR] No Support PWM%d in Miami Platform\n", (int)index);
896 UNUSED(bdbenPWM);
897 break;
898 }
899
900 HAL_SUBBANK0;
901 }
902
903 ////////////////////////////////////////////////////////////////////////////////
904 /// @brief \b Function \b Name : HAL_PWM_RstMux
905 /// @brief \b Function \b Description : Set the Rst Mux of the specific pwm
906 /// @param <IN> \b PWM_ChNum : Enum of the PWM CH
907 /// @param <IN> \b MS_BOOL : 1 for Hsync; 0 for Vsync
908 /// @param <OUT> \b None :
909 /// @param <RET> \b None :
910 /// @param <GLOBAL> \b None :
911 ////////////////////////////////////////////////////////////////////////////////
HAL_PWM_RstMux(PWM_ChNum index,MS_BOOL bMuxPWM)912 void HAL_PWM_RstMux(PWM_ChNum index, MS_BOOL bMuxPWM)
913 {
914 HAL_SUBBANK1;
915
916 switch(index)
917 {
918 case E_PWM_CH0:
919 HAL_PWM_WriteRegBit(REG_RST_MUX0,BITS(15:15, bMuxPWM), BMASK(15:15));
920 break;
921 case E_PWM_CH1:
922 HAL_PWM_WriteRegBit(REG_RST_MUX1,BITS(7:7, bMuxPWM), BMASK(7:7));
923 break;
924 case E_PWM_CH2:
925 HAL_PWM_WriteRegBit(REG_RST_MUX2,BITS(15:15, bMuxPWM), BMASK(15:15));
926 break;
927 case E_PWM_CH3:
928 HAL_PWM_WriteRegBit(REG_RST_MUX3,BITS(7:7, bMuxPWM), BMASK(7:7));
929 break;
930 case E_PWM_CH4:
931 HAL_PWM_WriteRegBit(REG_RST_MUX4,BITS(15:15, bMuxPWM), BMASK(15:15));
932 break;
933 case E_PWM_CH5:
934 HAL_PWM_WriteRegBit(REG_RST_MUX5,BITS(7:7, bMuxPWM), BMASK(7:7));
935 break;
936
937 case E_PWM_CH6:
938 case E_PWM_CH7:
939 case E_PWM_CH8:
940 case E_PWM_CH9:
941 default:
942 printf("[ERROR] No Support PWM%d in Miami Platform\n", (int)index);
943 UNUSED(bMuxPWM);
944 break;
945 }
946
947 HAL_SUBBANK0;
948 }
949
950 ////////////////////////////////////////////////////////////////////////////////
951 /// @brief \b Function \b Name : HAL_PWM_RstCnt
952 /// @brief \b Function \b Description : Set the Rst_Cnt of the specific pwm
953 /// @param <IN> \b PWM_ChNum : Enum of the PWM CH
954 /// @param <IN> \b MS_U8 : u8RstCntPWM
955 /// @param <OUT> \b None :
956 /// @param <RET> \b None :
957 /// @param <GLOBAL> \b None :
958 ////////////////////////////////////////////////////////////////////////////////
HAL_PWM_RstCnt(PWM_ChNum index,MS_U8 u8RstCntPWM)959 void HAL_PWM_RstCnt(PWM_ChNum index, MS_U8 u8RstCntPWM)
960 {
961 if( u8RstCntPWM & 0x10 )
962 {
963 printf("PWM%d Reset Count is too large\n", index);
964 }
965
966 HAL_SUBBANK1;
967 /* the Hsync reset counter capability is restricted to ONLY 4-bit */
968 switch(index)
969 {
970 case E_PWM_CH0:
971 HAL_PWM_WriteRegBit(REG_HS_RST_CNT0, BITS(11:8, u8RstCntPWM), BMASK(11:8));
972 break;
973 case E_PWM_CH1:
974 HAL_PWM_WriteRegBit(REG_HS_RST_CNT1, BITS(3:0, u8RstCntPWM), BMASK(3:0));
975 break;
976 case E_PWM_CH2:
977 HAL_PWM_WriteRegBit(REG_HS_RST_CNT2, BITS(11:8, u8RstCntPWM), BMASK(11:8));
978 break;
979 case E_PWM_CH3:
980 HAL_PWM_WriteRegBit(REG_HS_RST_CNT3, BITS(3:0, u8RstCntPWM), BMASK(3:0));
981 break;
982 case E_PWM_CH4:
983 HAL_PWM_WriteRegBit(REG_HS_RST_CNT4, BITS(11:8, u8RstCntPWM), BMASK(11:8));
984 break;
985 case E_PWM_CH5:
986 HAL_PWM_WriteRegBit(REG_HS_RST_CNT5, BITS(3:0, u8RstCntPWM), BMASK(3:0));
987 break;
988
989 case E_PWM_CH6:
990 case E_PWM_CH7:
991 case E_PWM_CH8:
992 case E_PWM_CH9:
993 default:
994 printf("[ERROR] No Support PWM%d in Miami Platform\n", (int)index);
995 UNUSED(u8RstCntPWM);
996 break;
997 }
998
999 HAL_SUBBANK0;
1000 }
1001
1002 ////////////////////////////////////////////////////////////////////////////////
1003 /// @brief \b Function \b Name : HAL_PWM_BypassUnit
1004 /// @brief \b Function \b Description : Set the Bypass Unit of the specific pwm
1005 /// @param <IN> \b PWM_ChNum : Enum of the PWM CH
1006 /// @param <IN> \b MS_BOOL : 1 for enable; 0 for disable
1007 /// @param <OUT> \b None :
1008 /// @param <RET> \b None :
1009 /// @param <GLOBAL> \b None :
1010 ////////////////////////////////////////////////////////////////////////////////
HAL_PWM_BypassUnit(PWM_ChNum index,MS_BOOL bBypassPWM)1011 void HAL_PWM_BypassUnit(PWM_ChNum index, MS_BOOL bBypassPWM)
1012 {
1013 HAL_SUBBANK1;
1014
1015 //T2 ONLY
1016
1017 switch(index)
1018 {
1019 case E_PWM_CH0:
1020 case E_PWM_CH1:
1021 case E_PWM_CH2:
1022 case E_PWM_CH3:
1023 case E_PWM_CH4:
1024 case E_PWM_CH5:
1025 case E_PWM_CH6:
1026 case E_PWM_CH7:
1027 case E_PWM_CH8:
1028 case E_PWM_CH9:
1029 default:
1030 printf("[ERROR] No Support PWM%d in Miami Platform\n", (int)index);
1031 UNUSED(bBypassPWM);
1032 break;
1033 }
1034
1035 HAL_SUBBANK0;
1036 }
1037
1038 ////////////////////////////////////////////////////////////////////////////////
1039 /// @brief \b Function \b Name : HAL_PWM01_CntMode
1040 /// @brief \b Function \b Description : Counter mode for PWM0 and PWM1
1041 /// @param <IN> \b PWM_ChNum : Enum of the Counter mode
1042 /// @param <IN> \b None :
1043 /// @param <OUT> \b None :
1044 /// @param <RET> \b PWM_Result :
1045 /// @param <GLOBAL> \b None :
1046 /// @note \n
1047 /// 11: PWM1 donate internal divider to PWM0 \n
1048 /// 10: PWM0 donate internal divider to PWM1 \n
1049 /// 0x: Normal mode \n
1050 ////////////////////////////////////////////////////////////////////////////////
HAL_PWM01_CntMode(PWM_CntMode CntMode)1051 MS_BOOL HAL_PWM01_CntMode(PWM_CntMode CntMode)
1052 {
1053 MS_BOOL ret = FALSE;
1054 //T2 ONLY
1055 UNUSED(CntMode);
1056 return ret;
1057 }
1058
1059 ////////////////////////////////////////////////////////////////////////////////
1060 /// @brief \b Function \b Name : HAL_PWM23_CntMode
1061 /// @brief \b Function \b Description : Counter mode for PWM2 and PWM3
1062 /// @param <IN> \b PWM_ChNum : Enum of the Counter mode
1063 /// @param <IN> \b None :
1064 /// @param <OUT> \b None :
1065 /// @param <RET> \b PWM_Result :
1066 /// @param <GLOBAL> \b None :
1067 /// @note \n
1068 /// 11: PWM3 donate internal divider to PWM2 \n
1069 /// 10: PWM2 donate internal divider to PWM3 \n
1070 /// 0x: Normal mode \n
1071 ////////////////////////////////////////////////////////////////////////////////
HAL_PWM23_CntMode(PWM_CntMode CntMode)1072 MS_BOOL HAL_PWM23_CntMode(PWM_CntMode CntMode)
1073 {
1074 MS_BOOL ret = FALSE;
1075 //T2 ONLY
1076 UNUSED(CntMode);
1077 return ret;
1078 }
1079
1080 ////////////////////////////////////////////////////////////////////////////////
1081 /// @brief \b Function \b Name : HAL_PWM67_CntMode
1082 /// @brief \b Function \b Description : Counter mode for PWM6 and PWM7
1083 /// @param <IN> \b PWM_ChNum : Enum of the Counter mode
1084 /// @param <IN> \b None :
1085 /// @param <OUT> \b None :
1086 /// @param <RET> \b PWM_Result :
1087 /// @param <GLOBAL> \b None :
1088 /// @note \n
1089 /// 11: PWM7 donate internal divider to PWM6 \n
1090 /// 10: PWM6 donate internal divider to PWM7 \n
1091 /// 0x: Normal mode \n
1092 ////////////////////////////////////////////////////////////////////////////////
HAL_PWM67_CntMode(PWM_CntMode CntMode)1093 MS_BOOL HAL_PWM67_CntMode(PWM_CntMode CntMode)
1094 {
1095 MS_BOOL ret = FALSE;
1096 //T2 ONLY
1097 UNUSED(CntMode);
1098 return ret;
1099 }
1100
1101 ////////////////////////////////////////////////////////////////////////////////
1102 /// @brief \b Function \b Name : HAL_PWM_Shift
1103 /// @brief \b Function \b Description : Set the Shift of the specific pwm
1104 /// @param <IN> \b PWM_ChNum : Enum of the PWM CH
1105 /// @param <IN> \b MS_U16 : the 18-bit shift value
1106 /// @param <OUT> \b None :
1107 /// @param <RET> \b None :
1108 /// @param <GLOBAL> \b None :
1109 ////////////////////////////////////////////////////////////////////////////////
HAL_PWM_Shift(PWM_ChNum index,MS_U32 u32ShiftPWM)1110 MS_BOOL HAL_PWM_Shift(PWM_ChNum index, MS_U32 u32ShiftPWM)
1111 {
1112 MS_U16 Shift_L, Shift_H;
1113
1114 Shift_L = (MS_U16)(u32ShiftPWM & 0xFFFF);
1115 Shift_H = (MS_U16)(u32ShiftPWM >> 16);
1116
1117 HAL_SUBBANK1;
1118
1119 switch(index)
1120 {
1121 case E_PWM_CH0:
1122 HAL_PWM_Write2Byte(REG_PWM0_SHIFT_L, Shift_L);
1123 HAL_PWM_Write2Byte(REG_PWM0_SHIFT_H, Shift_H);
1124 break;
1125 case E_PWM_CH1:
1126 HAL_PWM_Write2Byte(REG_PWM1_SHIFT_L, Shift_L);
1127 HAL_PWM_Write2Byte(REG_PWM1_SHIFT_H, Shift_H);
1128 break;
1129 case E_PWM_CH2:
1130 HAL_PWM_Write2Byte(REG_PWM2_SHIFT_L, Shift_L);
1131 HAL_PWM_Write2Byte(REG_PWM2_SHIFT_H, Shift_H);
1132 break;
1133 case E_PWM_CH3:
1134 HAL_PWM_Write2Byte(REG_PWM3_SHIFT_L, Shift_L);
1135 HAL_PWM_Write2Byte(REG_PWM3_SHIFT_H, Shift_H);
1136 break;
1137 case E_PWM_CH4:
1138 HAL_PWM_Write2Byte(REG_PWM4_SHIFT_L, Shift_L);
1139 HAL_PWM_Write2Byte(REG_PWM4_SHIFT_H, Shift_H);
1140 break;
1141 case E_PWM_CH5:
1142 HAL_PWM_Write2Byte(REG_PWM5_SHIFT_L, Shift_L);
1143 HAL_PWM_Write2Byte(REG_PWM5_SHIFT_H, Shift_H);
1144 break;
1145
1146 case E_PWM_CH6:
1147 case E_PWM_CH7:
1148 case E_PWM_CH8:
1149 case E_PWM_CH9:
1150 default:
1151 printf("[ERROR] No Support PWM%d in Miami Platform\n", (int)index);
1152 UNUSED(Shift_L);UNUSED(Shift_H);
1153 break;
1154 }
1155
1156 HAL_SUBBANK0;
1157
1158 return TRUE;
1159 }
1160
1161
HAL_PWM_Nvsync(PWM_ChNum index,MS_BOOL bNvsPWM)1162 void HAL_PWM_Nvsync(PWM_ChNum index, MS_BOOL bNvsPWM)
1163 {
1164
1165 HAL_SUBBANK1;
1166
1167 switch(index)
1168 {
1169 case E_PWM_CH0:
1170 HAL_PWM_WriteRegBit(REG_PWM0_NVS, BITS(0:0, bNvsPWM), BMASK(0:0));
1171 break;
1172 case E_PWM_CH1:
1173 HAL_PWM_WriteRegBit(REG_PWM1_NVS, BITS(1:1, bNvsPWM), BMASK(1:1));
1174 break;
1175 case E_PWM_CH2:
1176 HAL_PWM_WriteRegBit(REG_PWM2_NVS, BITS(2:2, bNvsPWM), BMASK(2:2));
1177 break;
1178 case E_PWM_CH3:
1179 HAL_PWM_WriteRegBit(REG_PWM3_NVS, BITS(3:3, bNvsPWM), BMASK(3:3));
1180 break;
1181 case E_PWM_CH4:
1182 HAL_PWM_WriteRegBit(REG_PWM4_NVS, BITS(4:4, bNvsPWM), BMASK(4:4));
1183 break;
1184 case E_PWM_CH5:
1185 HAL_PWM_WriteRegBit(REG_PWM5_NVS, BITS(5:5, bNvsPWM), BMASK(5:5));
1186 break;
1187
1188 case E_PWM_CH6:
1189 case E_PWM_CH7:
1190 case E_PWM_CH8:
1191 case E_PWM_CH9:
1192 default:
1193 printf("[ERROR] No Support PWM%d in Miami Platform\n", (int)index);
1194 UNUSED(bNvsPWM);
1195 break;
1196 }
1197
1198 HAL_SUBBANK0;
1199 }
1200
HAL_PWM_Align(PWM_ChNum index,MS_BOOL bAliPWM)1201 void HAL_PWM_Align(PWM_ChNum index, MS_BOOL bAliPWM)
1202 {
1203
1204 HAL_SUBBANK1;
1205
1206 switch(index)
1207 {
1208 case E_PWM_CH0:
1209 HAL_PWM_WriteRegBit(REG_PWM0_Align, BITS(0:0, bAliPWM), BMASK(0:0));
1210 break;
1211 case E_PWM_CH1:
1212 HAL_PWM_WriteRegBit(REG_PWM1_Align, BITS(1:1, bAliPWM), BMASK(1:1));
1213 break;
1214 case E_PWM_CH2:
1215 HAL_PWM_WriteRegBit(REG_PWM2_Align, BITS(2:2, bAliPWM), BMASK(2:2));
1216 break;
1217 case E_PWM_CH3:
1218 HAL_PWM_WriteRegBit(REG_PWM3_Align, BITS(3:3, bAliPWM), BMASK(3:3));
1219 break;
1220 case E_PWM_CH4:
1221 HAL_PWM_WriteRegBit(REG_PWM4_Align, BITS(4:4, bAliPWM), BMASK(4:4));
1222 break;
1223 case E_PWM_CH5:
1224 HAL_PWM_WriteRegBit(REG_PWM5_Align, BITS(5:5, bAliPWM), BMASK(5:5));
1225 break;
1226
1227 case E_PWM_CH6:
1228 case E_PWM_CH7:
1229 case E_PWM_CH8:
1230 case E_PWM_CH9:
1231 default:
1232 printf("[ERROR] No Support PWM%d in Miami Platform\n", (int)index);
1233 UNUSED(bAliPWM);
1234 break;
1235 }
1236
1237 HAL_SUBBANK0;
1238 }
1239
1240 PWM_3D_RegisterOffset g_ArrayPWM3D_RegisterOffset[PWM_Num][MAX_3DPWM_NUM] =
1241 {
1242 { //PWM0
1243 {//PWM0_Waveform_0
1244 {0, 0}, //PWM0_Waveform_0_Shift ==> use: HAL_PWM_Shift()
1245 {0, 0}, //PWM0_Waveform_0_duty ==> use: HAL_PWM_DutyCycle()
1246 },
1247 {//PWM0_Waveform_1
1248 {REG_PWM0_HIT_CNT_ST, 16}, //PWM0_Waveform_1_Shift
1249 {REG_PWM0_HIT_CNT_END, 16}, //PWM0_Waveform_1_duty
1250 },
1251 {//PWM0_Waveform_2
1252 {REG_PWM0_HIT_CNT_ST2, 16}, //PWM0_Waveform_2_Shift
1253 {REG_PWM0_HIT_CNT_END2, 16}, //PWM0_Waveform_2_duty
1254 },
1255 {//PWM0_Waveform_3
1256 {REG_PWM0_SHIFT4, 16}, //PWM0_Waveform_3_Shift
1257 {REG_PWM0_DUTY4, 16}, //PWM0_Waveform_3_duty
1258 },
1259 },
1260
1261 { //PWM1
1262 {//PWM1_Waveform_0
1263 {0, 0}, //PWM1_Waveform_0_Shift ==> use: HAL_PWM_Shift()
1264 {0, 0}, //PWM1_Waveform_0_duty ==> use: HAL_PWM_DutyCycle()
1265 },
1266 {//PWM1_Waveform_1
1267 {REG_PWM1_HIT_CNT_ST, 16}, //PWM1_Waveform_1_Shift
1268 {REG_PWM1_HIT_CNT_END, 16}, //PWM1_Waveform_1_duty
1269 },
1270 {//PWM1_Waveform_2
1271 {REG_PWM1_HIT_CNT_ST2, 16}, //PWM1_Waveform_2_Shift
1272 {REG_PWM1_HIT_CNT_END2, 16}, //PWM1_Waveform_2_duty
1273 },
1274 {//PWM1_Waveform_3
1275 {REG_PWM1_SHIFT4, 16}, //PWM1_Waveform_3_Shift
1276 {REG_PWM1_DUTY4, 16}, //PWM1_Waveform_3_duty
1277 },
1278 },
1279 };
1280
HAL_PWM_IsSupport3D(PWM_ChNum index)1281 MS_BOOL HAL_PWM_IsSupport3D(PWM_ChNum index)
1282 {
1283 //Only PWM0 & PWM1 Support 3D Function
1284 switch (index)
1285 {
1286 case E_PWM_CH0:
1287 case E_PWM_CH1:
1288 return TRUE;
1289
1290 default:
1291 return FALSE;
1292 }
1293 }
1294
HAL_PWM_SetMultiDiff(MS_BOOL bEnable)1295 void HAL_PWM_SetMultiDiff(MS_BOOL bEnable)
1296 {
1297 HAL_SUBBANK1;
1298 HAL_PWM_WriteRegBit(REG_PWM_MULTI_DIFF, PWM_MULTI_DIEF_EN, bEnable);
1299 HAL_SUBBANK0;
1300 }
1301
HAL_PWM_Set3D_DiffWaveform(PWM_ChNum index,MS_U8 u8WaveformIndex,MS_U32 u32Shift,MS_U32 u32Duty)1302 MS_BOOL HAL_PWM_Set3D_DiffWaveform(PWM_ChNum index, MS_U8 u8WaveformIndex, MS_U32 u32Shift, MS_U32 u32Duty)
1303 {
1304 MS_BOOL bReturn = TRUE;
1305 PWM_3D_RegisterOffset *pReigsterOffset = (PWM_3D_RegisterOffset *)&g_ArrayPWM3D_RegisterOffset[index][u8WaveformIndex];
1306
1307 if (u8WaveformIndex == 0)
1308 {
1309 bReturn &= HAL_PWM_Shift(index, u32Shift);
1310 HAL_PWM_DutyCycle(index, u32Duty);
1311 }
1312 else
1313 {
1314 HAL_SUBBANK1;
1315 bReturn &= HAL_PWM_WriteNumberByte(pReigsterOffset->regShift.u32RegOffset, u32Shift, pReigsterOffset->regShift.u8NumBit);
1316 bReturn &= HAL_PWM_WriteNumberByte(pReigsterOffset->regDuty.u32RegOffset, u32Duty, pReigsterOffset->regDuty.u8NumBit);
1317 HAL_SUBBANK0
1318 }
1319
1320 return bReturn;
1321 }
1322
1323 //---------------------------PM Base--------------------------------//
1324
HAL_PM_PWM_Enable(void)1325 void HAL_PM_PWM_Enable(void)
1326 {
1327 HAL_PM_WriteRegBit(REG_PM_PWM0_IS_GPIO, BITS(5:5, 0), BMASK(5:5));
1328 HAL_PM_WriteRegBit(reg_pwm_as_chip_config, BITS(0:0, 0), BMASK(0:0));//reg_pwm_pm_is_PWM
1329 }
1330
HAL_PM_PWM_Period(MS_U16 u16PeriodPWM)1331 void HAL_PM_PWM_Period(MS_U16 u16PeriodPWM)
1332 {
1333 MS_U16 Period;
1334 Period = u16PeriodPWM;
1335 HAL_PM_Write2Byte(REG_PM_PWM0_PERIOD, Period);
1336 }
1337
HAL_PM_PWM_DutyCycle(MS_U16 u16DutyPWM)1338 void HAL_PM_PWM_DutyCycle(MS_U16 u16DutyPWM)
1339 {
1340 MS_U16 Duty;
1341 Duty =u16DutyPWM;
1342 HAL_PM_Write2Byte(REG_PM_PWM0_DUTY, Duty);
1343 }
1344
HAL_PM_PWM_Div(MS_U8 u8DivPWM)1345 void HAL_PM_PWM_Div(MS_U8 u8DivPWM)
1346 {
1347 MS_U8 Div;
1348 Div = u8DivPWM;
1349 HAL_PM_Write2Byte(REG_PM_PWM0_DIV, Div);
1350 }
1351
HAL_PM_PWM_Polarity(MS_BOOL bPolPWM)1352 void HAL_PM_PWM_Polarity(MS_BOOL bPolPWM)
1353 {
1354 HAL_PM_WriteRegBit(REG_PM_PWM0_PORARITY, BITS(0:0, bPolPWM), BMASK(0:0));
1355 }
1356
HAL_PM_PWM_DBen(MS_BOOL bdbenPWM)1357 void HAL_PM_PWM_DBen(MS_BOOL bdbenPWM)
1358 {
1359 HAL_PM_WriteRegBit(REG_PM_PWM0_DBEN, BITS(1:1, bdbenPWM), BMASK(1:1));
1360 }
1361
1362 ////////////////////////////////////////////////////////////////////////////////
1363 /// @brief \b Function \b Name : HAL_PWM_INV_3D_Flag
1364 /// @brief \b Function \b Description : Set Inverse 3D flag
1365 /// @param <IN> \b MS_BOOL : 1 for Enable; 0 for Disable
1366 ////////////////////////////////////////////////////////////////////////////////
HAL_PWM_INV_3D_Flag(MS_BOOL bInvPWM)1367 MS_BOOL HAL_PWM_INV_3D_Flag(MS_BOOL bInvPWM)
1368 {
1369 MS_BOOL ret = FALSE;
1370 HAL_SUBBANK1;
1371 HAL_PM_WriteRegBit(REG_INV_3D_FLAG,BITS(15:15,bInvPWM),BMASK(15:15));
1372 ret = true;
1373 HAL_SUBBANK0;
1374 return ret;
1375 }
1376
1377