1*53ee8cc1Swenshuai.xi #define PQ_CSCRule_ID_Main 4 2*53ee8cc1Swenshuai.xi #define PQ_CSCRule_IP_NUM_Main 1 3*53ee8cc1Swenshuai.xi #define PQ_CSCRule_NUM_Main 12 4*53ee8cc1Swenshuai.xi 5*53ee8cc1Swenshuai.xi 6*53ee8cc1Swenshuai.xi typedef enum 7*53ee8cc1Swenshuai.xi { 8*53ee8cc1Swenshuai.xi PQ_CSCRule_Video_RGB_SD_0_255_Main, 9*53ee8cc1Swenshuai.xi PQ_CSCRule_Video_RGB_SD_16_235_Main, 10*53ee8cc1Swenshuai.xi PQ_CSCRule_Video_RGB_HD_0_255_Main, 11*53ee8cc1Swenshuai.xi PQ_CSCRule_Video_RGB_HD_16_235_Main, 12*53ee8cc1Swenshuai.xi PQ_CSCRule_Video_YUV_SD_Main, 13*53ee8cc1Swenshuai.xi PQ_CSCRule_Video_YUV_HD_Main, 14*53ee8cc1Swenshuai.xi PQ_CSCRule_PC_RGB_SD_0_255_Main, 15*53ee8cc1Swenshuai.xi PQ_CSCRule_PC_RGB_SD_16_235_Main, 16*53ee8cc1Swenshuai.xi PQ_CSCRule_PC_RGB_HD_0_255_Main, 17*53ee8cc1Swenshuai.xi PQ_CSCRule_PC_RGB_HD_16_235_Main, 18*53ee8cc1Swenshuai.xi PQ_CSCRule_PC_YUV_SD_Main, 19*53ee8cc1Swenshuai.xi PQ_CSCRule_PC_YUV_HD_Main, 20*53ee8cc1Swenshuai.xi } 21*53ee8cc1Swenshuai.xi MST_CSCRule_Index_Main; 22*53ee8cc1Swenshuai.xi extern code U8 MST_CSCRule_IP_Index_Main[PQ_CSCRule_IP_NUM_Main]; 23*53ee8cc1Swenshuai.xi extern code U8 MST_CSCRule_Array_Main[PQ_CSCRule_NUM_Main][PQ_CSCRule_IP_NUM_Main]; 24*53ee8cc1Swenshuai.xi 25