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MStar hereby reserves the 91 // rights to any and all damages, losses, costs and expenses resulting therefrom. 92 // 93 //////////////////////////////////////////////////////////////////////////////// 94 95 /////////////////////////////////////////////////////////////////////////////////////////////////// 96 /// 97 /// @file drvJPD.h 98 /// @brief JPD Driver Interface 99 /// @author MStar Semiconductor Inc. 100 /////////////////////////////////////////////////////////////////////////////////////////////////// 101 102 #ifndef _DRV_JPD_H_ 103 #define _DRV_JPD_H_ 104 105 #include "jpeg_def.h" 106 107 108 #ifdef __cplusplus 109 extern "C" 110 { 111 #endif 112 113 //------------------------------------------------------------------------------------------------- 114 // Macro and Define 115 //------------------------------------------------------------------------------------------------- 116 #define MSIF_JPD_LIB_CODE {'J','P','D','_'} ///<Lib code 117 #define MSIF_JPD_LIBVER {'0','1'} ///<LIB version 118 #define MSIF_JPD_BUILDNUM {'0','4'} ///<Build Number 119 #define MSIF_JPD_CHANGELIST {'0','0','6','1','6','2','3','3'} ///<P4 ChangeList Number 120 121 122 //------------------------------------------------------------------------------ 123 /// @brief \b JPD_DRV_VERSION : JPEG Version 124 //------------------------------------------------------------------------------ 125 #define JPD_DRV_VERSION /* Character String for DRV/API version */ \ 126 MSIF_TAG, /* 'MSIF' */ \ 127 MSIF_CLASS, /* '00' */ \ 128 MSIF_CUS, /* 0x0000 */ \ 129 MSIF_MOD, /* 0x0000 */ \ 130 MSIF_CHIP, \ 131 MSIF_CPU, \ 132 MSIF_JPD_LIB_CODE, /* IP__ */ \ 133 MSIF_JPD_LIBVER, /* 0.0 ~ Z.Z */ \ 134 MSIF_JPD_BUILDNUM, /* 00 ~ 99 */ \ 135 MSIF_JPD_CHANGELIST, /* CL# */ \ 136 MSIF_OS 137 138 #if 0 139 #if defined (__aeon__) 140 #define AEON_NON_CACHE_MASK 0x80000000 141 #elif defined (MSOS_TYPE_LINUX) 142 #define AEON_NON_CACHE_MASK 0x0 143 #else 144 #define AEON_NON_CACHE_MASK 0xA0000000 145 #endif 146 #endif 147 148 #define JPD_BIT(_bit_) (1<<(_bit_)) 149 #define JPD_BITMASK(_bits_) (JPD_BIT(((1)?_bits_)+1)-JPD_BIT(((0)?_bits_))) 150 #define JPD_OFFSET(x) ((x)<<1) 151 152 /*****************Config Flag*********************/ 153 //S-Config 154 #if 1//defined(CHIP_T3) || defined(CHIP_T4) || defined(CHIP_T7) || defined(CHIP_JANUS) || defined(CHIP_U4) || defined(CHIP_T8) || defined(CHIP_T9) || defined(CHIP_J2) 155 #define JPD_PSAVE_EN JPD_BIT(14) 156 #endif 157 //#define JPD_SWRST_S4 JPD_BIT(12) // Eris 158 //#define JPD_SWRST_S4L JPD_BIT(13) // Titania 159 #define JPD_SWRST JPD_BIT(13) // T1/T2/T3 160 #define JPD_ROI_EN JPD_BIT(11) 161 #define JPD_SVLD JPD_BIT(10) 162 #define JPD_SUVQ JPD_BIT(9) 163 #define JPD_TBL_RDY JPD_BIT(8) 164 #define JPD_DEC_EN JPD_BIT(7) 165 #define JPD_RST_EN JPD_BIT(6) 166 #define JPD_UV JPD_BIT(3) 167 #define JPD_Y_VSF1 (0<<2) 168 #define JPD_Y_VSF2 JPD_BIT(2) 169 #define JPD_Y_HSF1 0x01 170 #define JPD_Y_HSF2 0x02 171 #define JPD_Y_HSF4 0x03 172 173 //M-Config 174 #define JPD_H_VLD JPD_BIT(1) 175 #define JPD_L_VLD JPD_BIT(0) 176 177 //**********************JPD Spare Reg, For ECO usage**********************// 178 //Enable Redundant stuffing byte X'FF' skipping. (T4,JANUS,T7,U4,T8,T9,...) 179 /* 180 [0]: 20091214_fix0: skipping of stuffing byte X'FF' preceding restart marker; 1: fix enabled, 0: fix disabled 181 [1]: 20091214_fix1: toleration of restart marker index dis-order; 1: fix enabled, 0: fix disabled 182 183 [3]: reg_20100303_last: fix the problem of jpd will not alert jd2mi_last after miu_reset; 1: enable, 0: disable 184 [4]: reg_20100303_last_power_save: fix the problem of jpd will not alert jd2mi_last in power saving mode; 1: enable, 0: disable 185 [5]: reg_20100325_last_done_z : fix the problem of last_done_z; 1: enable, 0: disable 186 [6]: reg_20101101 : fix the problem of output data lost when clk_miu is far slower than clk_jpd. 1: enable, 0: disable (A1~) 187 */ 188 #define JPD_RST_STUFF_BYTE_HANDLE JPD_BIT(0) | JPD_BIT(1) | JPD_BIT(3) | JPD_BIT(4) | JPD_BIT(5) | JPD_BIT(6) | JPD_BIT(7) 189 #if (JPD_SUPPORT_3_HUFFMAN_TABLE==true) 190 //Enable JPD 3 Huffman table support 191 #define JPD_3_HUFFMAN_TABLE_SUPPORT JPD_BIT(2) 192 #endif 193 //************************************************************************// 194 195 //------------------------------------------------------------------------------------------------- 196 // Type and Structure 197 //------------------------------------------------------------------------------------------------- 198 199 typedef enum 200 { 201 E_HVD_FW_INPUT_SOURCE_NONE, ///< No input fw. 202 E_HVD_FW_INPUT_SOURCE_DRAM, ///< input source from DRAM. 203 E_HVD_FW_INPUT_SOURCE_FLASH, ///< input source from FLASH. 204 } HVD_FWInputSourceType; 205 206 // Chip Define 207 typedef enum 208 { 209 E_MJPEG_MSTAR_CHIP_NONE = 0, 210 E_MJPEG_MSTAR_CHIP_U3, 211 E_MJPEG_MSTAR_CHIP_T3, 212 E_MJPEG_MSTAR_CHIP_T4, 213 E_MJPEG_MSTAR_CHIP_JANUS, 214 E_MJPEG_MSTAR_CHIP_U4, 215 E_MJPEG_MSTAR_CHIP_T8, 216 E_MJPEG_MSTAR_CHIP_T9, 217 E_MJPEG_MSTAR_CHIP_T13, 218 E_MJPEG_MSTAR_CHIP_A1, 219 E_MJPEG_MSTAR_CHIP_A6, 220 E_MJPEG_MSTAR_CHIP_A7, 221 E_MJPEG_MSTAR_CHIP_AMETHYST, 222 E_MJPEG_MSTAR_CHIP_EAGLE, 223 E_MJPEG_MSTAR_CHIP_J2, 224 E_MJPEG_MSTAR_CHIP_EMERALD, 225 } MJPEG_MSTAR_CHIP_ID; 226 227 // JPD event 228 typedef enum 229 { 230 E_JPD_EVENT_DEC_DONE = 0x01 231 , E_JPD_EVENT_ECS_ERROR = 0x02 232 , E_JPD_EVENT_IS_ERROR = 0x04 233 , E_JPD_EVENT_RST_ERROR = 0x08 234 , E_JPD_EVENT_MRBL_DONE = 0x10 235 , E_JPD_EVENT_MRBH_DONE = 0x20 236 #if (JPD_SUPPORT_AUTO_PROTECT==true) 237 , E_JPD_EVENT_MWB_FULL = 0x40 238 #endif 239 , E_JPD_EVENT_ERROR_MASK = 0x0E 240 } JPD_Event; 241 242 243 // JPD Downscale Ratio 244 // Bellows are 1, 1/2, 1/4 and 1/8 in order 245 typedef enum 246 { 247 E_JPD_DOWNSCALE_ORG = 0x00 248 , E_JPD_DOWNSCALE_HALF = 0x01 249 , E_JPD_DOWNSCALE_FOURTH = 0x02 250 , E_JPD_DOWNSCALE_EIGHTH = 0x03 251 } JPD_DownScale; 252 253 // Mimic fwJPD_if.h 254 typedef enum 255 { 256 // Invalid cmd 257 E_MJPEG_CMD_INVALID = 0xffffffffUL, 258 259 E_MJPEG_CMD_GO = 0x00, // Start to show 260 E_MJPEG_CMD_SET_FRAME_BUFF_START_ADDR = 0x01, // Set frame buffer address 261 E_MJPEG_CMD_SET_FRAME_BUFF_UNIT_SIZE = 0x02, // Set frame buffer size 262 E_MJPEG_CMD_SET_FRAME_BUFF_TOTAL_NUM = 0x03, // Set total number of frame buffer 263 E_MJPEG_CMD_SET_FRAME_BUFF_IDX = 0x04, // Set frame buffer index 264 E_MJPEG_CMD_SET_FRAME_BUFF_IDX_READY = 0x05, // Set frame buffer index ready for display 265 E_MJPEG_CMD_SET_WIDTH = 0x06, // Set frame width 266 E_MJPEG_CMD_SET_HEIGHT = 0x07, // Set frame height 267 E_MJPEG_CMD_SET_PITCH = 0x08, // Set pitch 268 E_MJPEG_CMD_SET_FRAME_ID_L = 0x09, // Set frame ID_L 269 E_MJPEG_CMD_SET_FRAME_ID_H = 0x0A, // Set frame ID_H 270 E_MJPEG_CMD_SET_TIMESTAMP = 0x0B, // Set Time Stamp 271 E_MJPEG_CMD_SET_FRAMERATE = 0x0C, // Set FrameRate 272 E_MJPEG_CMD_SET_FRAMERATE_BASE = 0x0D, // Set FrameRate Base 273 E_MJPEG_CMD_SET_FRAME_BUFF_IDX_VALID = 0x0E, // Set frame buffer index available 274 E_MJPEG_CMD_SET_CHIP_ID = 0x0F, // Set frame buffer index available 275 276 E_MJPEG_CMD_PLAY = 0x20, // Play 277 E_MJPEG_CMD_PAUSE = 0x21, // Pause 278 E_MJPEG_CMD_RESUME = 0x22, // Resume 279 E_MJPEG_CMD_STEP_PLAY = 0x23, // Step play 280 E_MJPEG_CMD_SET_SPEED_TYPE = 0x24, // Set play speed type: default, fast, slow 281 E_MJPEG_CMD_SET_SPEED = 0x25, // Set play speed 282 E_MJPEG_CMD_FLUSH_DISP_QUEUE = 0X26, // Flush display queue 283 E_MJPEG_CMD_FREEZE_DISP = 0x27, // Freeze display 284 E_MJPEG_CMD_ENABLE_AVSYNC = 0x28, // Enable AV sync 285 E_MJPEG_CMD_SET_AVSYNC_DELAY = 0x29, // Set AV sync delay 286 E_MJPEG_CMD_SET_AVSYNC_TOLERENCE = 0x2A, // Set AV sync tolerence 287 E_MJPEG_CMD_SET_PTS_BASE = 0x2B, // Set PTS base 288 E_MJPEG_CMD_SET_STC_BASE = 0x2C, // Set STC base 289 E_MJPEG_CMD_SET_BLUE_SCREEN = 0x2D, // Set Blue Screen 290 E_MJPEG_CMD_PUSH_QUEUE_PARA_SETTING = 0x2E, 291 E_MJPEG_CMD_SET_DISPLAY_OUTSIDE_MODE = 0x2F, 292 293 E_MJPEG_CMD_GET_NEXT_FREE_FRAME_BUFF_IDX = 0x40, // Get next free frame buffer index 294 E_MJPEG_CMD_COMPENSATE_PTS = 0x41, // Ask firmware to compensate PTS 295 296 // Display Command Queue 297 E_MJPEG_CMD_ENABLE_DISP_CMD_QUEUE = 0x80, // Enable Display Command Queue 298 E_MJPEG_CMD_PUSH_DISP_CMD = 0x81, // Push Display Command 299 E_MJPEG_CMD_GET_DISP_CMD_Q_VACANCY = 0x82, // Check if the display command queue full or not 300 301 E_MJPEG_CMD_IS_STEP_PLAY_DONE = 0xFF, // 302 E_MJPEG_CMD_IS_DISP_FINISH = 0xFE, // 303 E_MJPEG_CMD_IS_PLAYING = 0xFC, // 304 E_MJPEG_CMD_IS_DISPLAY_QUEUE_FULL = 0xFB, // 305 E_MJPEG_CMD_IS_AVSYNC_ON = 0xFA, // 306 E_MJPEG_CMD_IS_REACH_AVSYNC = 0xF9, // 307 E_MJPEG_CMD_IS_FLUSH_DONE = 0xF8, // Check if flush done 308 309 } MJPEG_User_Cmd; 310 311 // JPD debug level enum 312 typedef enum 313 { 314 E_JPD_DEBUG_DRV_NONE = 0x0 315 , E_JPD_DEBUG_DRV_MSG = 0x02 316 , E_JPD_DEBUG_DRV_ERR = 0x08 317 } JPD_DrvDbgLevel; 318 319 typedef enum 320 { 321 E_JPD_FAILED = 0 322 , E_JPD_OK = 1 323 , E_JPD_INVALID_PARAM = 2 324 } JPD_Return; 325 326 /// frame information 327 typedef struct 328 { 329 MS_PHYADDR u32LumaAddr; /// frame buffer base + the start offset of current displayed luma data. Unit: byte. 330 MS_PHYADDR u32ChromaAddr; /// frame buffer base + the start offset of current displayed chroma data. Unit: byte. 331 MS_U32 u32TimeStamp; /// Time stamp(DTS, PTS) of current displayed frame. Unit: ms (todo: 90khz) 332 MS_U32 u32ID_L; /// low part of ID number 333 MS_U32 u32ID_H; /// high part of ID number 334 MS_U16 u16Pitch; /// pitch 335 MS_U16 u16Width; /// width 336 MS_U16 u16Height; /// hight 337 MS_U32 eFrameType;///< Frame type: I, P, B frame 338 } MJPEG_DRV_FrameInfo; 339 340 typedef enum 341 { 342 E_MJPEG_DRV_STREAM_NONE = 0, 343 E_MJPEG_DRV_MAIN_STREAM, 344 E_MJPEG_DRV_SUB_STREAM 345 } MJPEG_DRV_StreamType; 346 347 typedef enum 348 { 349 E_JPD_JPD1, 350 E_JPD_JPD2, 351 E_JPD_JPD_TOTAL // Do not remove this one 352 } JPD_Number; 353 354 // JPD Interrupt Register Function 355 typedef void (*JPD_IsrFuncCb)(void); 356 357 //------------------------------------------------------------------------------ 358 // Structure for buffer 359 typedef struct 360 { 361 MS_PHYADDR u32ThumbnailBufAddr; 362 MS_U32 u32ThumbnailBufSize; 363 MS_U32 u32ThumbnailBufOffset; 364 MS_PHYADDR u32MRCBufAddr; // MRC buffer address 365 MS_U32 u32MRCBufSize; // MRC buffer size 366 MS_U32 u32MRCBufOffset; // MRC access byte address offset in MRC buffer relative to MRC start address 367 MS_PHYADDR u32MWCBufAddr; // MWC buffer address 368 MS_U16 u16MWCBufLineNum; // MWC Line number 369 MS_BOOL bProgressive; 370 MS_BOOL bThumbnailAccessMode; 371 } JPD_BufCfg; 372 //------------------------------------------------------------------------------ 373 // Structure for Grpinf of Table IndirectAccess 374 typedef struct 375 { 376 MS_U8 *u8DcLumaSymbol; 377 MS_U16 *u16DcLumaCode; 378 MS_U8 *u8DcChromaSymbol; 379 MS_U16 *u16DcChromaCode; 380 MS_U8 *u8DcChroma2Symbol; 381 MS_U16 *u16DcChroma2Code; 382 MS_U8 *u8AcLumaSymbol; 383 MS_U16 *u16AcLumaCode; 384 MS_U8 *u8AcChromaSymbol; 385 MS_U16 *u16AcChromaCode; 386 MS_U8 *u8AcChroma2Symbol; 387 MS_U16 *u16AcChroma2Code; 388 MS_BOOL DHT; 389 MS_BOOL bUVHuffman; 390 } JPD_Grpinf; 391 //------------------------------------------------------------------------------ 392 // Structure for Symidx of Table Indirect Access 393 typedef struct 394 { 395 MS_U8 *u8DcLumaHuffVal; 396 MS_U8 *u8DcChromaHuffVal; 397 MS_U8 *u8DcChroma2HuffVal; 398 MS_U8 *u8AcLumaHuffVal; 399 MS_U8 *u8AcChromaHuffVal; 400 MS_U8 *u8AcChroma2HuffVal; 401 MS_BOOL DHT; 402 MS_BOOL bUVHuffman; 403 } JPD_Symidx; 404 //------------------------------------------------------------------------------ 405 // Structure for Quantization Table 406 typedef struct 407 { 408 MS_U16 s16Value[64]; 409 MS_BOOL bValid; 410 } JPD_QuanTbl; 411 //------------------------------------------------------------------------------ 412 // Structure for IQtbl of Table Indirect Access 413 typedef struct 414 { 415 MS_U8 *u8CompQuant; 416 JPD_QuanTbl *QuantTables; 417 MS_U8 u8CompNum; 418 MS_BOOL DQT; 419 } JPD_IQTbl; 420 //------------------------------------------------------------------------------ 421 // Structure for JPD capability 422 typedef struct 423 { 424 MS_BOOL bBaseline; 425 MS_BOOL bProgressive; 426 MS_BOOL bMJPEG; 427 } JPD_Cap; 428 //------------------------------------------------------------------------------ 429 // Structure for JPD Information 430 typedef struct 431 { 432 MS_U8* pu8HalVer; 433 MS_U8* pu8FwVer; 434 JPD_Cap stCap; 435 } JPD_Info; 436 //------------------------------------------------------------------------------ 437 // Structure for JPD Status 438 typedef struct 439 { 440 MS_U32 u32CurMRCAddr; 441 MS_U16 u16CurVidx; 442 MS_U16 u16CurRow; 443 MS_U16 u16CurCol; 444 MS_BOOL bIsBusy; 445 MS_BOOL bIsrEnable; 446 } JPD_Status; 447 448 //------------------------------------------------------------------------------------------------- 449 // Function and Variable 450 //------------------------------------------------------------------------------------------------- 451 //void MDrv_JPD_Initialize(MS_U8 u8ChipType); 452 void MDrv_JPD_InitBuf(JPD_BufCfg in); 453 //void MDrv_JPD_Reset(void); 454 //void MDrv_JPD_SW_Pause_Reset(void); 455 void MDrv_JPD_Rst(void); 456 void MDrv_JPD_Rst_SVLD(void); 457 //MS_U16 MDrv_JPD_GetSWResetMask(void); 458 //void MDrv_JPD_SetReadBuffer(MS_U32 u32BufAddr, MS_U32 u32BufSize); 459 //void MDrv_JPD_SetMRCStartAddr(MS_U32 u32ByteOffset); 460 //void MDrv_JPD_SetOutputFrameBuffer(MS_U32 u32BufAddr); 461 void MDrv_JPD_SetPicDimension(MS_U16 u16Width, MS_U16 u16Height); 462 //MS_U16 MDrv_JPD_ReadJPDStatus(void); 463 MS_U16 MDrv_JPD_GetEventFlag(void); 464 //void MDrv_JPD_ClearJPDStatus(MS_U16 status_bit); 465 void MDrv_JPD_SetEventFlag(MS_U16 u16Value); 466 void MDrv_JPD_SetROI(MS_U16 start_x, MS_U16 start_y, MS_U16 width, MS_U16 height); 467 //void MDrv_JPD_SetClock(MS_U8 on); 468 void MDrv_JPD_PowerOn(void); 469 void MDrv_JPD_PowerOff(void); 470 #if 0 // unused function 471 MS_U32 MDrv_JPD_ReadCurrentMRCAddr(void); 472 #endif 473 void MDrv_JPD_SetRSTIntv(MS_U16 u16Value); 474 MS_U16 MDrv_JPD_GetCurVidx(void); 475 476 void MDrv_JPD_WriteGrpinf(JPD_Grpinf in); 477 void MDrv_JPD_WriteSymidx(JPD_Symidx in); 478 void MDrv_JPD_WriteIQTbl(JPD_IQTbl in); 479 480 void MDrv_JPD_Set_M_Config(MS_U16 u16Value); 481 MS_U16 MDrv_JPD_Get_M_Config(void); 482 void MDrv_JPD_Set_S_Config(MS_U16 u16Value); 483 MS_U16 MDrv_JPD_Get_S_Config(void); 484 void MDrv_JPD_SetDbgLevel(MS_U8 u8DbgLevel); 485 void MDrv_JPD_GetInfo(JPD_Info *pJPD_Info); 486 JPD_Status* MDrv_JPD_GetStatus(void); 487 MS_BOOL MDrv_JPD_GetLibVer(const MSIF_Version **ppVersion); 488 489 MS_BOOL MDrv_JPD_EnableISR(JPD_IsrFuncCb IsrCb); 490 MS_BOOL MDrv_JPD_DisableISR(void); 491 492 MS_U32 MDrv_JPD_GetCurMRCAddr(void); 493 MS_U16 MDrv_JPD_GetCurRow(void); 494 MS_U16 MDrv_JPD_GetCurCol(void); 495 496 #if (JPD_SUPPORT_AUTO_PROTECT==true) 497 void MDrv_JPD_SetAutoProtect(MS_BOOL enable); 498 void MDrv_JPD_SetWPENEndAddr(MS_PHYADDR u32ByteOffset); 499 #else 500 #if 1//defined(CHIP_T3) || defined(CHIP_T4) || defined(CHIP_T7) || defined(CHIP_JANUS) || defined(CHIP_U4) || defined(CHIP_T8) || defined(CHIP_T9) || defined(CHIP_J2) 501 void MDrv_JPD_SetWriteProtect(MS_BOOL enable); 502 #endif 503 #endif 504 505 void MDrv_JPD_SetSpare(MS_U16 u16Value); 506 MS_U16 MDrv_JPD_GetSpare(void); 507 void MDrv_JPD_PrintGTable(void); 508 void MDrv_JPD_PrintHTable(void); 509 void MDrv_JPD_PrintQTable(void); 510 void MDrv_JPD_Debug(void); 511 512 513 #ifdef __cplusplus 514 } 515 #endif 516 517 #endif // _DRV_JPD_H_ 518 519