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MStar hereby reserves the 91 // rights to any and all damages, losses, costs and expenses resulting therefrom. 92 // 93 //////////////////////////////////////////////////////////////////////////////// 94 95 #ifndef _FW_JPD_IF_H_ 96 #define _FW_JPD_IF_H_ 97 98 99 //------------------------------------------------------------------------------------------------- 100 // Hardware Capability 101 //------------------------------------------------------------------------------------------------- 102 #define JPD_DISP_QUEUE_MAX_SIZE 32 103 104 //------------------------------------------------------------------------------------------------- 105 // Macro and Define 106 //------------------------------------------------------------------------------------------------- 107 108 #if (!defined( _MS_TYPES_H_)) 109 /// data type unsigned char, data length 1 byte 110 typedef unsigned char MS_U8; // 1 byte 111 /// data type unsigned short, data length 2 byte 112 typedef unsigned short MS_U16; // 2 bytes 113 /// data type unsigned int, data length 4 byte 114 typedef unsigned long MS_U32; // 4 bytes 115 /// data type signed char, data length 1 byte 116 typedef signed char MS_S8; // 1 byte 117 /// data type signed short, data length 2 byte 118 typedef signed short MS_S16; // 2 bytes 119 /// data type signed int, data length 4 byte 120 typedef signed long MS_S32; // 4 bytes 121 #endif 122 123 124 //------------------------------------------------------------------------------------------------- 125 // Type and Structure 126 //------------------------------------------------------------------------------------------------- 127 typedef enum 128 { 129 E_JPD_DISPQ_STATUS_NONE = 0, //FW 130 E_JPD_DISPQ_STATUS_INIT, //FW 131 E_JPD_DISPQ_STATUS_VIEW, //HK 132 E_JPD_DISPQ_STATUS_DISP, //HK 133 E_JPD_DISPQ_STATUS_FREE, //HK 134 } JPD_DISPQ_STATUS; 135 136 /// frame information 137 typedef struct 138 { 139 /// frame buffer base + the start offset of current displayed luma data. Unit: byte. 140 MS_U32 u32LumaAddr; 141 /// frame buffer base + the start offset of current displayed chroma data. Unit: byte. 142 MS_U32 u32ChromaAddr; 143 /// Time stamp(DTS, PTS) of current displayed frame. Unit: ms (todo: 90khz) 144 MS_U32 u32TimeStamp; 145 /// low part of ID number 146 MS_U32 u32ID_L; 147 /// high part of ID number 148 MS_U32 u32ID_H; 149 /// pitch 150 MS_U16 u16Pitch; 151 /// width 152 MS_U16 u16Width; 153 /// hight 154 MS_U16 u16Height; 155 ///< Frame type: I, P, B frame 156 MS_U8 u8FrameType; 157 /// 4-byte alignment 158 MS_U8 u8Reserved; 159 ///< 0:None, 1:Init, 2:View, 3:Disp, 4:Free 160 MS_U32 u32Status; 161 } MJPEG_FrameInfo; 162 163 // Share Memory 164 typedef struct 165 { 166 // HK -> FW 167 // MS_U32 u32FrameBufAddr; 168 // MS_U32 u32FrameBufSize; 169 170 // FW -> HK 171 MS_U32 u32FWVersionID; // FW version ID 172 173 // 174 // MS_U32 u32DispBufAddr; 175 MJPEG_FrameInfo infoDispFrame; // Information of currently displayed frame 176 177 178 // PTS table 179 // MS_U32 u32TimeStamp; // current PTS 180 // MS_U32 u32PTStableWptrAddr; // The address of PTS table write pointer. 181 // MS_U32 u32PTStableRptrAddr; // The address of PTS table read pointer. 182 183 MS_U32 u16DispQSize; 184 MS_U16 u16DispQNumb; 185 MS_U16 u16DispQPtr; 186 MJPEG_FrameInfo DispQueue[JPD_DISP_QUEUE_MAX_SIZE]; 187 } JPD_ShareMem; 188 189 // PTS table entry 190 typedef struct 191 { 192 MS_U32 u32ByteCnt; 193 MS_U32 u32PTS; 194 MS_U32 u32ID_L; 195 MS_U32 u32ID_H; 196 } JPD_PTS_Entry; 197 198 // Command 199 typedef enum 200 { 201 // Invalid cmd 202 E_JPD_CMD_INVALID = 0xffffffffUL, 203 204 E_JPD_CMD_GO = 0x00, // Start to show 205 E_JPD_CMD_SET_FRAME_BUFF_START_ADDR = 0x01, // Set frame buffer address 206 E_JPD_CMD_SET_FRAME_BUFF_UNIT_SIZE = 0x02, // Set frame buffer size 207 E_JPD_CMD_SET_FRAME_BUFF_TOTAL_NUM = 0x03, // Set total number of frame buffer 208 E_JPD_CMD_SET_FRAME_BUFF_IDX = 0x04, // Set frame buffer index 209 E_JPD_CMD_SET_FRAME_BUFF_IDX_READY = 0x05, // Set frame buffer index ready for display 210 E_JPD_CMD_SET_WIDTH = 0x06, // Set frame width 211 E_JPD_CMD_SET_HEIGHT = 0x07, // Set frame height 212 E_JPD_CMD_SET_PITCH = 0x08, // Set pitch 213 E_JPD_CMD_SET_FRAME_ID_L = 0x09, // Set frame ID_L 214 E_JPD_CMD_SET_FRAME_ID_H = 0x0A, // Set frame ID_H 215 E_JPD_CMD_SET_TIMESTAMP = 0x0B, // Set Time Stamp 216 E_JPD_CMD_SET_FRAMERATE = 0x0C, // Set FrameRate 217 E_JPD_CMD_SET_FRAMERATE_BASE = 0x0D, // Set FrameRate Base 218 E_JPD_CMD_SET_FRAME_BUFF_IDX_VALID = 0x0E, // Set frame buffer index available 219 E_JPD_CMD_SET_CHIP_ID = 0x0F, // Set Chip ID 220 221 E_JPD_CMD_PLAY = 0x20, // Play 222 E_JPD_CMD_PAUSE = 0x21, // Pause 223 E_JPD_CMD_RESUME = 0x22, // Resume 224 E_JPD_CMD_STEP_PLAY = 0x23, // Step play 225 E_JPD_CMD_SET_SPEED_TYPE = 0x24, // Set play speed type: default, fast, slow 226 E_JPD_CMD_SET_SPEED = 0x25, // Set play speed 227 E_JPD_CMD_FLUSH_DISP_QUEUE = 0X26, // Flush display queue 228 E_JPD_CMD_FREEZE_DISP = 0x27, // Freeze display 229 E_JPD_CMD_ENABLE_AVSYNC = 0x28, // Enable AV Sync 230 E_JPD_CMD_SET_AVSYNC_DELAY = 0x29, // Set AV sync delay 231 E_JPD_CMD_SET_AVSYNC_TOLERENCE = 0x2A, // Set AV sync tolerence 232 E_JPD_CMD_SET_PTS_BASE = 0x2B, // Set PTS base 233 E_JPD_CMD_SET_STC_BASE = 0x2C, // Set STC base 234 E_JPD_CMD_SET_BLUE_SCREEN = 0x2D, // Set Blue Screen 235 236 E_JPD_CMD_GET_NEXT_FREE_FRAME_BUFF_IDX = 0x40, // Get next free frame buffer index 237 E_JPD_CMD_COMPENSATE_PTS = 0x41, // Ask firmware to compensate PTS 238 239 // Display Command Queue 240 E_JPD_CMD_ENABLE_DISP_CMD_QUEUE = 0x80, // Enable Display Command Queue 241 E_JPD_CMD_PUSH_DISP_CMD = 0x81, // Push Display Command 242 E_JPD_CMD_GET_DISP_CMD_Q_VACANCY = 0x82, // Check if the display command queue full or not 243 244 E_JPD_CMD_IS_STEP_PLAY_DONE = 0xFF, // 245 E_JPD_CMD_IS_DISP_FINISH = 0xFE, // 246 E_JPD_CMD_IS_PLAYING = 0xFC, // 247 E_JPD_CMD_IS_DISPLAY_QUEUE_FULL = 0xFB, // 248 E_JPD_CMD_IS_AVSYNC_ON = 0xFA, // 249 E_JPD_CMD_IS_REACH_AVSYNC = 0xF9, // 250 E_JPD_CMD_IS_FLUSH_DONE = 0xF8, // Check if flush done 251 252 } JPD_User_Cmd; 253 254 // Firmware State 255 typedef enum 256 { 257 E_JPD_FW_STATE_MASK = 0xF000, 258 } JPD_FW_State; 259 260 // Error Code 261 typedef enum 262 { 263 // Error code base 264 E_JPD_ERR_BASE= 0x01000000, 265 } JPD_Err_Code; 266 267 268 //#define HVD_PTS_TABLE_ST_OFFSET 0x50000 269 #define JPD_PTS_TABLE_ST_OFFSET 0x70000 270 //#define HVD_SHARE_MEM_ST_OFFSET 0x79000 271 #define JPD_SHARE_MEM_ST_OFFSET 0x80000 272 #define JPD_DEBUG_MEM_ST_OFFSET 0x81000 273 274 #define JPD_PTS_TABLE_ENTRY_NUM 8 275 276 #endif // _FW_JPD_IF_H_ 277 278