1
2 //<MStar Software>
3 //******************************************************************************
4 // MStar Software
5 // Copyright (c) 2010 - 2012 MStar Semiconductor, Inc. All rights reserved.
6 // All software, firmware and related documentation herein ("MStar Software") are
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77 //******************************************************************************
78 //<MStar Software>
79 ////////////////////////////////////////////////////////////////////////////////
80 //
81 // Copyright (c) 2008-2009 MStar Semiconductor, Inc.
82 // All rights reserved.
83 //
84 // Unless otherwise stipulated in writing, any and all information contained
85 // herein regardless in any format shall remain the sole proprietary of
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93 //
94 ////////////////////////////////////////////////////////////////////////////////
95
96 #include "MsCommon.h"
97 #include "halMPool.h"
98 #include "halCHIP.h"
99
HAL_MsOS_MPool_PA2BA(MS_PHY u64PhyAddr)100 MS_PHY HAL_MsOS_MPool_PA2BA(MS_PHY u64PhyAddr)
101 {
102 MS_PHY u64BusAddr = 0x0;
103 // ba = pa + offset
104 if( (u64PhyAddr >= HAL_MIU0_BASE) && (u64PhyAddr < HAL_MIU1_BASE) ) // MIU0
105 u64BusAddr = u64PhyAddr - HAL_MIU0_BASE + HAL_MIU0_BUS_BASE;
106 else if( (u64PhyAddr >= HAL_MIU1_BASE) && (u64PhyAddr < HAL_MIU2_BASE) ) // MIU1
107 u64BusAddr = u64PhyAddr - HAL_MIU1_BASE + HAL_MIU1_BUS_BASE;
108 else
109 u64BusAddr = u64PhyAddr - HAL_MIU2_BASE + HAL_MIU2_BUS_BASE; // MIU2
110
111 return u64BusAddr;
112 }
113
HAL_MsOS_MPool_VA2PA(MS_VIRT u64Virt)114 MS_PHY HAL_MsOS_MPool_VA2PA(MS_VIRT u64Virt)
115 {
116 //===========================================
117 // MIU0 (0 ~ 1024MB) (VA) 0x2000:0000 ~ 0x5fff:ffff -> (PA) 0x0000:0000 ~ 0x3fff:ffff (cached)
118 if ((HAL_MIU0_BUS_BASE <= u64Virt) && ((HAL_MIU0_BUS_BASE + 0x3fffffff) >= u64Virt))
119 {
120 return (MS_PHY)(u64Virt - HAL_MIU0_BUS_BASE);
121 }
122
123 //===========================================
124 // MIU0 (0 ~ 1024MB) (VA) 0x6000:0000 ~ 0x9fff:ffff -> (PA) 0x0000:0000 ~ 0x3fff:ffff (uncached)
125 if (((HAL_MIU0_BUS_BASE + 0x40000000UL) <= u64Virt) && ((HAL_MIU0_BUS_BASE + 0x7fffffffUL) >= u64Virt))
126 {
127 return (MS_PHY)(u64Virt - (HAL_MIU0_BUS_BASE+0x40000000UL));
128 }
129
130 //===========================================
131 // MIU1 (low 512MB) (VA) 0xa000:0000 ~ 0xbfff:ffff -> (PA) 0x8000:0000 ~ 0x9fff:ffff (cached)
132 if ((HAL_MIU1_BUS_BASE <= u64Virt) && ((HAL_MIU1_BUS_BASE + 0x1fffffffUL) >= u64Virt))
133 {
134 return (MS_PHY)((u64Virt & 0x1fffffffUL) + HAL_MIU1_BASE);
135 }
136
137 //===========================================
138 // MIU1 (0 ~ 1024MB) (VA) 0xc000:0000 ~ 0xffff:ffff -> (PA) 0x8000:0000 ~ 0xbfff:ffff (uncached)
139 if (((HAL_MIU1_BUS_BASE + 0x20000000UL) <= u64Virt) && ((HAL_MIU1_BUS_BASE + 0x5fffffff) >= u64Virt))
140 {
141 return (MS_PHY)((u64Virt & 0x3fffffffUL) + HAL_MIU1_BASE);
142 }
143 }
144
HAL_MsOS_MPool_PA2KSEG0(MS_PHY u64Phys)145 MS_VIRT HAL_MsOS_MPool_PA2KSEG0(MS_PHY u64Phys)
146 {
147 //===========================================
148 // MIU0 (0~1024MB) - (PA) 0x0000:0000 ~ 0x3fff:ffff -> (VA) 0x2000:0000 ~ 0x5fff:ffff (cached)
149 if ((0x00000000UL <= u64Phys) && (0x3fffffffUL >= u64Phys))
150 {
151 return (MS_VIRT)((u64Phys & 0x3fffffffUL) + HAL_MIU0_BUS_BASE);
152 }
153
154 //===========================================
155 // MIU1 (low 512MB) - (PA) 0x8000:0000 ~ 0x9fff:ffff -> (VA) 0xA000:0000 ~ 0xbfff:ffff (cached)
156 if ((HAL_MIU1_BASE <= u64Phys) && ((HAL_MIU1_BASE + 0x1fffffffUL) >= u64Phys))
157 {
158 return (MS_VIRT)((u64Phys - HAL_MIU1_BASE) + HAL_MIU1_BUS_BASE);
159 }
160 }
161
HAL_MsOS_MPool_PA2KSEG1(MS_PHY u64Phys)162 MS_VIRT HAL_MsOS_MPool_PA2KSEG1(MS_PHY u64Phys)
163 {
164 //===========================================
165 // MIU0 (0~1024MB) - (PA) 0x0000:0000 ~ 0x3fff:ffff -> (VA) 0x6000:0000 ~ 0x9fff:ffff (uncached)
166 if ((0x00000000UL <= u64Phys) && (0x3fffffffUL >= u64Phys))
167 {
168 return (MS_VIRT)((u64Phys & 0x3fffffffUL) + HAL_MIU0_BUS_BASE);
169 }
170
171 //===========================================
172 // MIU1 (0~1024MB) - (PA) 0x8000:0000 ~ 0xBfff:ffff -> (VA) 0xc000:0000 ~ 0xFfff:ffff (uncached)
173 if ((HAL_MIU1_BASE <= u64Phys) && ((HAL_MIU1_BASE + 0x3fffffffUL) >= u64Phys))
174 {
175 return (MS_VIRT)((u64Phys - HAL_MIU1_BASE) + HAL_MIU1_BUS_BASE);
176 }
177 }
178