xref: /utopia/UTPA2-700.0.x/modules/mfc/hal/M7821/mfc/madp_mfc_spi.h (revision 53ee8cc121a030b8d368113ac3e966b4705770ef)
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77*53ee8cc1Swenshuai.xi //<MStar Software>
78*53ee8cc1Swenshuai.xi #ifndef _MADP_MFC_SPI_H_
79*53ee8cc1Swenshuai.xi #define _MADP_MFC_SPI_H_
80*53ee8cc1Swenshuai.xi 
81*53ee8cc1Swenshuai.xi #include "mdrv_mfc_platform.h"
82*53ee8cc1Swenshuai.xi 
83*53ee8cc1Swenshuai.xi #define MFC_MADP_IIC_CHANNEL_ID 0x02
84*53ee8cc1Swenshuai.xi #define _BIT0			(0x0001)
85*53ee8cc1Swenshuai.xi #define _BIT1			(0x0002)
86*53ee8cc1Swenshuai.xi #define _BIT2			(0x0004)
87*53ee8cc1Swenshuai.xi #define _BIT3			(0x0008)
88*53ee8cc1Swenshuai.xi #define _BIT4			(0x0010)
89*53ee8cc1Swenshuai.xi #define _BIT5			(0x0020)
90*53ee8cc1Swenshuai.xi #define _BIT6			(0x0040)
91*53ee8cc1Swenshuai.xi #define _BIT7			(0x0080)
92*53ee8cc1Swenshuai.xi #define _BIT8			(0x0100)
93*53ee8cc1Swenshuai.xi #define _BIT9			(0x0200)
94*53ee8cc1Swenshuai.xi #define _BIT10			(0x0400)
95*53ee8cc1Swenshuai.xi #define _BIT11			(0x0800)
96*53ee8cc1Swenshuai.xi #define _BIT12			(0x1000)
97*53ee8cc1Swenshuai.xi #define _BIT13			(0x2000)
98*53ee8cc1Swenshuai.xi #define _BIT14			(0x4000)
99*53ee8cc1Swenshuai.xi #define _BIT15			(0x8000)
100*53ee8cc1Swenshuai.xi 
101*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------
102*53ee8cc1Swenshuai.xi // SPI Definition
103*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------
104*53ee8cc1Swenshuai.xi #define MFC_SPI_SLAVE_ADDR 	0x94
105*53ee8cc1Swenshuai.xi enum
106*53ee8cc1Swenshuai.xi {
107*53ee8cc1Swenshuai.xi 	SpiEnter = 0x23,
108*53ee8cc1Swenshuai.xi 	SpiReset = 0x24,
109*53ee8cc1Swenshuai.xi };
110*53ee8cc1Swenshuai.xi 
111*53ee8cc1Swenshuai.xi // Status register[7:0]
112*53ee8cc1Swenshuai.xi #define RDY    _BIT0
113*53ee8cc1Swenshuai.xi #define WEN    _BIT1
114*53ee8cc1Swenshuai.xi #define BP0    _BIT2
115*53ee8cc1Swenshuai.xi #define BP1    _BIT3
116*53ee8cc1Swenshuai.xi #define AAI    _BIT6
117*53ee8cc1Swenshuai.xi #define WPEN   _BIT7
118*53ee8cc1Swenshuai.xi 
119*53ee8cc1Swenshuai.xi enum
120*53ee8cc1Swenshuai.xi {
121*53ee8cc1Swenshuai.xi 	FV_ATMEL = 0x1F,
122*53ee8cc1Swenshuai.xi 	FV_ST    = 0x20,
123*53ee8cc1Swenshuai.xi 	FV_PMC   = 0x9D,
124*53ee8cc1Swenshuai.xi 	FV_SST   = 0xBF,
125*53ee8cc1Swenshuai.xi 	FV_MXIC  = 0xC2,
126*53ee8cc1Swenshuai.xi 	FV_NUM   = 0xFF
127*53ee8cc1Swenshuai.xi };
128*53ee8cc1Swenshuai.xi 
129*53ee8cc1Swenshuai.xi typedef struct
130*53ee8cc1Swenshuai.xi {
131*53ee8cc1Swenshuai.xi   U8  ManufacturerID;
132*53ee8cc1Swenshuai.xi   U8  ProductID;
133*53ee8cc1Swenshuai.xi 
134*53ee8cc1Swenshuai.xi   U16 ProgramCKS; // check sum
135*53ee8cc1Swenshuai.xi   U16 VerifyCKS; // check sum
136*53ee8cc1Swenshuai.xi } _FLASHTYPE;
137*53ee8cc1Swenshuai.xi 
138*53ee8cc1Swenshuai.xi U8 spiRDSR(void);
139*53ee8cc1Swenshuai.xi void spiWaitReady(U8 u8Flag);
140*53ee8cc1Swenshuai.xi void spiWREN(BOOL bCtrl); // Set write enable latch
141*53ee8cc1Swenshuai.xi void spiEWSR(void);
142*53ee8cc1Swenshuai.xi void spiWRSR(U8 u8ID, U8 u8Cmd);
143*53ee8cc1Swenshuai.xi void spiRDID(_FLASHTYPE* Flash);
144*53ee8cc1Swenshuai.xi void spiBlockErase(U8 u8ID, U16 wPage, U8 ucAddr);
145*53ee8cc1Swenshuai.xi U16 spiAAIWriteByte(U16 wPage, U8 u8Start, U16 u16Len, U8 *pBuf);
146*53ee8cc1Swenshuai.xi U16 spiPageWriteByte(U16 wPage, U8 u8Start, U8 u8End, U8 *pBuf);
147*53ee8cc1Swenshuai.xi void spiPageReadByte(U16 wPage, U8 ucStart, U8 ucEnd, U8 *pBuf);
148*53ee8cc1Swenshuai.xi 
149*53ee8cc1Swenshuai.xi #endif
150