1 //<MStar Software> 2 //****************************************************************************** 3 // MStar Software 4 // Copyright (c) 2010 - 2012 MStar Semiconductor, Inc. All rights reserved. 5 // All software, firmware and related documentation herein ("MStar Software") are 6 // intellectual property of MStar Semiconductor, Inc. ("MStar") and protected by 7 // law, including, but not limited to, copyright law and international treaties. 8 // Any use, modification, reproduction, retransmission, or republication of all 9 // or part of MStar Software is expressly prohibited, unless prior written 10 // permission has been granted by MStar. 11 // 12 // By accessing, browsing and/or using MStar Software, you acknowledge that you 13 // have read, understood, and agree, to be bound by below terms ("Terms") and to 14 // comply with all applicable laws and regulations: 15 // 16 // 1. MStar shall retain any and all right, ownership and interest to MStar 17 // Software and any modification/derivatives thereof. 18 // No right, ownership, or interest to MStar Software and any 19 // modification/derivatives thereof is transferred to you under Terms. 20 // 21 // 2. You understand that MStar Software might include, incorporate or be 22 // supplied together with third party`s software and the use of MStar 23 // Software may require additional licenses from third parties. 24 // Therefore, you hereby agree it is your sole responsibility to separately 25 // obtain any and all third party right and license necessary for your use of 26 // such third party`s software. 27 // 28 // 3. MStar Software and any modification/derivatives thereof shall be deemed as 29 // MStar`s confidential information and you agree to keep MStar`s 30 // confidential information in strictest confidence and not disclose to any 31 // third party. 32 // 33 // 4. MStar Software is provided on an "AS IS" basis without warranties of any 34 // kind. Any warranties are hereby expressly disclaimed by MStar, including 35 // without limitation, any warranties of merchantability, non-infringement of 36 // intellectual property rights, fitness for a particular purpose, error free 37 // and in conformity with any international standard. You agree to waive any 38 // claim against MStar for any loss, damage, cost or expense that you may 39 // incur related to your use of MStar Software. 40 // In no event shall MStar be liable for any direct, indirect, incidental or 41 // consequential damages, including without limitation, lost of profit or 42 // revenues, lost or damage of data, and unauthorized system use. 43 // You agree that this Section 4 shall still apply without being affected 44 // even if MStar Software has been modified by MStar in accordance with your 45 // request or instruction for your use, except otherwise agreed by both 46 // parties in writing. 47 // 48 // 5. If requested, MStar may from time to time provide technical supports or 49 // services in relation with MStar Software to you for your use of 50 // MStar Software in conjunction with your or your customer`s product 51 // ("Services"). 52 // You understand and agree that, except otherwise agreed by both parties in 53 // writing, Services are provided on an "AS IS" basis and the warranty 54 // disclaimer set forth in Section 4 above shall apply. 55 // 56 // 6. Nothing contained herein shall be construed as by implication, estoppels 57 // or otherwise: 58 // (a) conferring any license or right to use MStar name, trademark, service 59 // mark, symbol or any other identification; 60 // (b) obligating MStar or any of its affiliates to furnish any person, 61 // including without limitation, you and your customers, any assistance 62 // of any kind whatsoever, or any information; or 63 // (c) conferring any license or right under any intellectual property right. 64 // 65 // 7. These terms shall be governed by and construed in accordance with the laws 66 // of Taiwan, R.O.C., excluding its conflict of law rules. 67 // Any and all dispute arising out hereof or related hereto shall be finally 68 // settled by arbitration referred to the Chinese Arbitration Association, 69 // Taipei in accordance with the ROC Arbitration Law and the Arbitration 70 // Rules of the Association by three (3) arbitrators appointed in accordance 71 // with the said Rules. 72 // The place of arbitration shall be in Taipei, Taiwan and the language shall 73 // be English. 74 // The arbitration award shall be final and binding to both parties. 75 // 76 //****************************************************************************** 77 //<MStar Software> 78 //////////////////////////////////////////////////////////////////////////////// 79 // 80 // Copyright (c) 2008-2009 MStar Semiconductor, Inc. 81 // All rights reserved. 82 // 83 // Unless otherwise stipulated in writing, any and all information contained 84 // herein regardless in any format shall remain the sole proprietary of 85 // MStar Semiconductor Inc. and be kept in strict confidence 86 // ("MStar Confidential Information") by the recipient. 87 // Any unauthorized act including without limitation unauthorized disclosure, 88 // copying, use, reproduction, sale, distribution, modification, disassembling, 89 // reverse engineering and compiling of the contents of MStar Confidential 90 // Information is unlawful and strictly prohibited. MStar hereby reserves the 91 // rights to any and all damages, losses, costs and expenses resulting therefrom. 92 // 93 //////////////////////////////////////////////////////////////////////////////// 94 95 /////////////////////////////////////////////////////////////////////////////////////////////////// 96 /// @file regMBX.h 97 /// @brief MStar Mailbox Driver Reg Def. 98 /// @author MStar Semiconductor Inc. 99 /// @attention 100 /// <b><em>For also support PM/big endian, the regs will only support byte operations \n 101 /// The short reg access will be removed! </em></b> 102 /////////////////////////////////////////////////////////////////////////////////////////////////// 103 104 105 #ifndef _MHAL_MBX_REG_H 106 #define _MHAL_MBX_REG_H 107 108 //============================================================================= 109 // Includs 110 //============================================================================= 111 112 //============================================================================= 113 // Defines & Macros 114 //============================================================================= 115 #define RIU_MAP _virtRIUBaseAddrMBX 116 117 #define RIU8 (( MS_U8 volatile *) RIU_MAP) 118 119 #define REG_MBX_BASE (0x19C0UL) //(0x103380-0x100000)/2 120 #if 1//frcr2_integration### 121 //############################### 122 // 123 // FRC MBX Dummy Register Allocation 124 // Bank : 0x400300 125 // Reg16_offset : 0x40 ~ 47 (HKCPU to FRCR2) 126 // Reg16_offset : 0x48 ~ 4F (FRCR2 to HKCPU) 127 // 128 //############################### 129 #define REG_MBX_FRC_BASE (0x1801C0UL) //(0x400380-0x100000)/2 130 #define REG_MBX_FRC_OFST (REG_MBX_FRC_BASE - REG_MBX_BASE) 131 #endif 132 #define MBX_REG8(gid, addr) RIU8[((gid+REG_MBX_BASE)<<2) + ((addr) * 2) - ((addr) & 1)] 133 134 //Reg8 defines: 135 #define REG8_MBX_CTRL 0x0000 136 #define MBX_CTRL_FIRE BIT(0) 137 #define MBX_CTRL_READBACK BIT(1) 138 #define MBX_CTRL_INSTANT BIT(2) 139 #define REG8_MBX_MAIL_CLASS 0x0001 140 #define REG8_MBX_MAIL_IDX 0x0002 141 #define REG8_MBX_PARAMETER_CNT 0x0003 142 #define REG8_MBX_PARAMETER_S 0x0004 143 #define REG8_MBX_PARAMETER_E 0x000D 144 #define REG8_MBX_STATE_0 0x000E 145 #define REG8_MBX_STATE_1 0x000F 146 #define MBX_STATE1_DISABLED BIT(4) 147 #define MBX_STATE1_OVERFLOW BIT(5) 148 #define MBX_STATE1_ERROR BIT(6) 149 #define MBX_STATE1_BUSY BIT(7) 150 151 #define REG_MBX_GROUP0 0x00UL 152 #define REG_MBX_GROUP1 0x08UL 153 #define REG_MBX_GROUP2 0x10UL 154 #define REG_MBX_GROUP3 0x18UL 155 #define REG_MBX_GROUP4 0x20UL 156 #define REG_MBX_GROUP5 0x28UL 157 #if 1//frcr2_integration### 158 #define REG_MBX_GROUP6 (0x00UL + REG_MBX_FRC_OFST)//(HKCPU to FRCR2) 159 #define REG_MBX_GROUP7 (0x08UL + REG_MBX_FRC_OFST)//(FRCR2 to HKCPU) 160 #endif 161 162 #define REG8_MBX_GROUP(gid, addr) MBX_REG8(gid, addr) 163 164 #define REG8_MBX_MIPS(addr) MBX_REG8(REG_MBX_GROUP1, addr) //group0 allocated for mips 165 #define REG8_MBX_AEON(addr) MBX_REG8(REG_MBX_GROUP0, addr) //group1 allocated for aeon 166 #define REG8_MBX_PM(addr) MBX_REG8(REG_MBX_GROUP3, addr) //group3 allocated for pm 167 168 #endif //__MHAL_MBX_REG_H 169 170 171 172