1 ////////////////////////////////////////////////////////////////////////////////
2 //
3 // Copyright (c) 2008-2009 MStar Semiconductor, Inc.
4 // All rights reserved.
5 //
6 // Unless otherwise stipulated in writing, any and all information contained
7 // herein regardless in any format shall remain the sole proprietary of
8 // MStar Semiconductor Inc. and be kept in strict confidence
9 // ("MStar Confidential Information") by the recipient.
10 // Any unauthorized act including without limitation unauthorized disclosure,
11 // copying, use, reproduction, sale, distribution, modification, disassembling,
12 // reverse engineering and compiling of the contents of MStar Confidential
13 // Information is unlawful and strictly prohibited. MStar hereby reserves the
14 // rights to any and all damages, losses, costs and expenses resulting therefrom.
15 //
16 ////////////////////////////////////////////////////////////////////////////////
17
18 ///////////////////////////////////////////////////////////////////////////////////////////////////
19 ///
20 /// file halLDMA.c
21 /// @brief local dimming DMA Driver HAL Interface
22 /// @author MStar Semiconductor Inc.
23 ///////////////////////////////////////////////////////////////////////////////////////////////////
24
25
26 //-------------------------------------------------------------------------------------------------
27 // Include Files
28 //-------------------------------------------------------------------------------------------------
29
30 #include <string.h>
31 #include "MsCommon.h"
32 #include "MsTypes.h"
33 #include "halLDMA.h"
34 #include "regLDMA.h"
35
36 extern MS_U8 _u8LDMADbgLevel;
37
38 typedef enum
39 {
40 E_LDMA_DBGLV_NONE, //disable all the debug message
41 E_LDMA_DBGLV_INFO, //information
42 E_LDMA_DBGLV_NOTICE, //normal but significant condition
43 E_LDMA_DBGLV_WARNING, //warning conditions
44 E_LDMA_DBGLV_ERR, //error conditions
45 E_LDMA_DBGLV_CRIT, //critical conditions
46 E_LDMA_DBGLV_ALERT, //action must be taken immediately
47 E_LDMA_DBGLV_EMERG, //system is unusable
48 E_LDMA_DBGLV_DEBUG, //debug-level messages
49 } LDMA_DbgLv;
50
51 //-------------------------------------------------------------------------------------------------
52 // Debug Functions
53 //-------------------------------------------------------------------------------------------------
54 #define DEBUG_LDMA(debug_level, x) do { if (_u8LDMADbgLevel >= (debug_level)) (x); } while(0)
55
56 #define LDMA_WriteByte(reg,val) WRITE_BYTE((_hal_ldma.u32VirtLdmaBaseAddr + ((reg)<<2)),val)
57
58 #define LDMA_Write2Byte(reg,val) WRITE_WORD((_hal_ldma.u32VirtLdmaBaseAddr + ((reg)<<2)),val)
59
60 #define LDMA_ReadByte(reg) (READ_BYTE(_hal_ldma.u32VirtLdmaBaseAddr + ((reg)<<2)))
61
62 #define LDMA_Read2Byte(reg) (READ_WORD(_hal_ldma.u32VirtLdmaBaseAddr + ((reg)<<2)))
63
64
65 static LDMA_BaseAddr_st _hal_ldma = {
66 .u8CurrentCH = 0,
67 .u32VirtLdmaBaseAddr = BASEADDR_RIU + REG_LDMA0_BASE,
68 .u32NONPMRegBaseAddr = BASEADDR_RIU,
69 };
70
_HAL_LDMA_CheckAndSetBaseAddr(MS_U8 u8Channel)71 static void _HAL_LDMA_CheckAndSetBaseAddr(MS_U8 u8Channel)
72 {
73 DEBUG_LDMA(E_LDMA_DBGLV_INFO,printf("_HAL_LDMA_CheckAndSetBaseAddr channel %d\n",u8Channel));
74 if(u8Channel == _hal_ldma.u8CurrentCH) {
75 return;
76 } else if(u8Channel == LDMA0) {
77 _hal_ldma.u32VirtLdmaBaseAddr = _hal_ldma.u32NONPMRegBaseAddr + REG_LDMA0_BASE;
78 } else if(u8Channel == LDMA1) {
79 _hal_ldma.u32VirtLdmaBaseAddr = _hal_ldma.u32NONPMRegBaseAddr + REG_LDMA1_BASE;
80 } else {
81 DEBUG_LDMA(E_LDMA_DBGLV_ERR,printf("LDMA Channel is out of range!\n"));
82 return ;
83 }
84 }
85
86 //------------------------------------------------------------------------------
87 /// Description : Config LDMA MMIO base address
88 /// @param u32PMBankBaseAddr \b IN:base address of MMIO (PM domain)
89 /// @param u32NONPMRegBaseAddr \b IN :base address of MMIO
90 /// @param u8DeviceIndex \b IN: index of HW IP
91 //------------------------------------------------------------------------------
HAL_LDMA_MMIOConfig(MS_U32 u32NONPMRegBaseAddr,MS_U8 u8Channel)92 MS_BOOL HAL_LDMA_MMIOConfig(MS_U32 u32NONPMRegBaseAddr, MS_U8 u8Channel)
93 {
94 _hal_ldma.u32NONPMRegBaseAddr = u32NONPMRegBaseAddr;
95 if(u8Channel == LDMA0)
96 {
97 _hal_ldma.u32VirtLdmaBaseAddr = u32NONPMRegBaseAddr + REG_LDMA0_BASE;
98
99 DEBUG_LDMA(E_LDMA_DBGLV_INFO,printf("[E_LDMA0]_hal_ldma.u32VirtLdmaBaseAddr = %lx\n",_hal_ldma.u32VirtLdmaBaseAddr));
100 }
101 else if(u8Channel == LDMA1)
102 {
103 _hal_ldma.u32VirtLdmaBaseAddr = u32NONPMRegBaseAddr + REG_LDMA1_BASE;
104
105 DEBUG_LDMA(E_LDMA_DBGLV_INFO,printf("[E_LDMA1]_hal_ldma.u32VirtLdmaBaseAddr = %lx\n",_hal_ldma.u32VirtLdmaBaseAddr));
106 }
107 else
108 {
109 DEBUG_LDMA(E_LDMA_DBGLV_ERR,printf("LDMA Channel is out of range!\n"));
110 return FALSE;
111 }
112 return TRUE;
113 }
114
HAL_LDMA_SetSPITriggerMode(MS_U8 u8Channel,MS_U8 u8TriggerMode)115 MS_BOOL HAL_LDMA_SetSPITriggerMode(MS_U8 u8Channel, MS_U8 u8TriggerMode)
116 {
117 _HAL_LDMA_CheckAndSetBaseAddr(u8Channel);
118
119 switch(u8TriggerMode)
120 {
121 case LDMA_SPI_TRIGGER_STOP:
122 // Menuload trigger src = one shot
123
124 LDMA_Write2Byte(REG_MENULOAD_CTRL_MODE, LDMA_Read2Byte(REG_MENULOAD_CTRL_MODE)&(~REG_MENULOAD_CTRL_MODE_MSK));
125 // menuload abort one shot
126 LDMA_Write2Byte(REG_MENULOAD_ABORT, LDMA_Read2Byte(REG_MENULOAD_ABORT)|BIT0);
127 // menuload disable one shot
128 LDMA_Write2Byte(REG_MENULOAD_ENABLE, LDMA_Read2Byte(REG_MENULOAD_ENABLE)&(~BIT0));
129 break;
130
131 case LDMA_SPI_TRIGGER_ONE_SHOT:
132 // Menuload trigger src = one shot
133 LDMA_Write2Byte(REG_MENULOAD_CTRL_MODE, LDMA_Read2Byte(REG_MENULOAD_CTRL_MODE)&(~REG_MENULOAD_CTRL_MODE_MSK));
134 // menuload enable one shot
135 LDMA_Write2Byte(REG_MENULOAD_ENABLE, LDMA_Read2Byte(REG_MENULOAD_ENABLE)|(BIT0));
136 // menuload realtime trigger one shot
137 LDMA_Write2Byte(REG_MENULOAD_REALTIME_TRIG, LDMA_Read2Byte(REG_MENULOAD_REALTIME_TRIG)|(BIT0));
138
139 break;
140
141 case LDMA_SPI_TRIGGER_EVERY_VSYNC:
142 // Menuload trigger src = V sync
143 LDMA_Write2Byte(REG_MENULOAD_CTRL_MODE, LDMA_Read2Byte(REG_MENULOAD_CTRL_MODE)|BIT0);
144 LDMA_Write2Byte(REG_USE_HW_LOOP_MD, LDMA_Read2Byte(REG_USE_HW_LOOP_MD)|BIT7);
145 LDMA_Write2Byte(REG_MENULOAD_REALTIME_TRIG, LDMA_Read2Byte(REG_MENULOAD_REALTIME_TRIG)|(BIT0));
146
147 break;
148 default :
149 break;
150 }
151
152 return TRUE;
153 }
154
HAL_LDMA_SetMenuloadNumber(MS_U8 u8Channel,MS_U32 u32MenuldNum)155 MS_BOOL HAL_LDMA_SetMenuloadNumber(MS_U8 u8Channel, MS_U32 u32MenuldNum)
156 {
157 _HAL_LDMA_CheckAndSetBaseAddr(u8Channel);
158
159 LDMA_Write2Byte(REG_MENULOAD_NUMBER, u32MenuldNum);
160
161 return TRUE;
162 }
163
HAL_LDMA_SetSPICommandFormat(MS_U8 u8Channel,MS_U8 u8CmdLen,MS_U16 * pu16CmdBuf)164 MS_BOOL HAL_LDMA_SetSPICommandFormat(MS_U8 u8Channel,MS_U8 u8CmdLen, MS_U16* pu16CmdBuf )
165 {
166 _HAL_LDMA_CheckAndSetBaseAddr(u8Channel);
167
168 if( u8CmdLen > LDMA_MAX_SPI_CMD_NUM )
169 {
170 DEBUG_LDMA(E_LDMA_DBGLV_ERR,printf("[LDM-DMA]Spi command len is too long=%u!\n", u8CmdLen));
171 u8CmdLen = LDMA_MAX_SPI_CMD_NUM;
172 }
173
174 if(pu16CmdBuf == NULL)
175 {
176 DEBUG_LDMA(E_LDMA_DBGLV_ERR,printf("NULL Pointer,please check pu16CmdBuf!\n "));
177 return FALSE;
178 }
179
180 switch (u8CmdLen)
181 {
182 case 10:
183 LDMA_Write2Byte(REG_COMMAND8, pu16CmdBuf[9]);
184 LDMA_Write2Byte(REG_CMD_LENGTH, LDMA_Read2Byte(REG_CMD_LENGTH)|BIT9);
185 case 9:
186 LDMA_Write2Byte(REG_COMMAND7, pu16CmdBuf[8]);
187 LDMA_Write2Byte(REG_CMD_LENGTH, LDMA_Read2Byte(REG_CMD_LENGTH)|BIT8);
188 case 8:
189 LDMA_Write2Byte(REG_COMMAND6, pu16CmdBuf[7]);
190 LDMA_Write2Byte(REG_CMD_LENGTH, LDMA_Read2Byte(REG_CMD_LENGTH)|BIT7);
191 case 7:
192 LDMA_Write2Byte(REG_COMMAND5, pu16CmdBuf[6]);
193 LDMA_Write2Byte(REG_CMD_LENGTH, LDMA_Read2Byte(REG_CMD_LENGTH)|BIT6);
194 case 6:
195 LDMA_Write2Byte(REG_COMMAND4, pu16CmdBuf[5]);
196 LDMA_Write2Byte(REG_CMD_LENGTH, LDMA_Read2Byte(REG_CMD_LENGTH)|BIT5);
197 case 5:
198 LDMA_Write2Byte(REG_COMMAND3, pu16CmdBuf[4]);
199 LDMA_Write2Byte(REG_CMD_LENGTH, LDMA_Read2Byte(REG_CMD_LENGTH)|BIT4);
200 case 4:
201 LDMA_Write2Byte(REG_COMMAND2, pu16CmdBuf[3]);
202 LDMA_Write2Byte(REG_CMD_LENGTH, LDMA_Read2Byte(REG_CMD_LENGTH)|BIT3);
203 case 3:
204 LDMA_Write2Byte(REG_COMMAND1, pu16CmdBuf[2]);
205 LDMA_Write2Byte(REG_CMD_LENGTH, LDMA_Read2Byte(REG_CMD_LENGTH)|BIT2);
206 case 2:
207 LDMA_Write2Byte(REG_COMMAND, pu16CmdBuf[1]);
208 LDMA_Write2Byte(REG_CMD_LENGTH, LDMA_Read2Byte(REG_CMD_LENGTH)|BIT1);
209 case 1:
210 LDMA_Write2Byte(REG_START_CODE, pu16CmdBuf[0]);
211 LDMA_Write2Byte(REG_CMD_LENGTH, LDMA_Read2Byte(REG_CMD_LENGTH)|BIT0);
212 break;
213 default:
214 DEBUG_LDMA(E_LDMA_DBGLV_ERR,printf("Oops, u8CmdLen should be bigger than 0\n"));
215 }
216
217 return TRUE;
218 }
219
HAL_LDMA_SetCheckSumMode(MS_U8 u8Channel,MS_U8 u8SumMode)220 MS_BOOL HAL_LDMA_SetCheckSumMode(MS_U8 u8Channel,MS_U8 u8SumMode)
221 {
222 _HAL_LDMA_CheckAndSetBaseAddr(u8Channel);
223
224 LDMA_Write2Byte(REG_CMD_LENGTH, LDMA_Read2Byte(REG_CMD_LENGTH)|BIT15);
225 switch (u8SumMode)
226 {
227 case LDMA_NOCHECKSUM: {
228 LDMA_Write2Byte(REG_CMD_LENGTH, LDMA_Read2Byte(REG_CMD_LENGTH)&(~BIT15));
229 break;
230 }
231 case LDMA_CHECKSUM_ALL: {
232 LDMA_Write2Byte(REG_CHKSUM_MD, LDMA_Read2Byte(REG_CHKSUM_MD)&(~REG_CHKSUM_MD_MSK));
233 break;
234 }
235 case LDMA_CHECKSUM_CMD_DATA: {
236 LDMA_Write2Byte(REG_CHKSUM_MD, BIT0);
237 break;
238 }
239 case LDMA_CHECKSUM_DATA_ONLY: {
240 LDMA_Write2Byte(REG_CHKSUM_MD,BIT1);
241 break;
242 }
243 default: {
244 DEBUG_LDMA(E_LDMA_DBGLV_ERR,printf("Oops, No Such CheckSum Mode. \n"));
245 }
246 }
247
248 return TRUE;
249
250 }
251
HAL_LDMA_SetTrigDelayCnt(MS_U8 u8Channel,MS_U16 * pu16DelayCnt)252 MS_BOOL HAL_LDMA_SetTrigDelayCnt(MS_U8 u8Channel, MS_U16 *pu16DelayCnt)
253 {
254 if(pu16DelayCnt == NULL)
255 {
256 DEBUG_LDMA(E_LDMA_DBGLV_ERR,printf("[LDMA]Fun:%s Args Error!!!\n",__FUNCTION__));
257 return FALSE;
258 }
259
260 _HAL_LDMA_CheckAndSetBaseAddr(u8Channel);
261
262 LDMA_Write2Byte(REG_TRIG_DELAY0_CNT0,pu16DelayCnt[0]);
263 LDMA_Write2Byte(REG_TRIG_DELAY1_CNT0,pu16DelayCnt[1]);
264 LDMA_Write2Byte(REG_TRIG_DELAY1_CNT0,pu16DelayCnt[2]);
265 LDMA_Write2Byte(REG_TRIG_DELAY1_CNT1,pu16DelayCnt[3]);
266 return TRUE;
267 }
268
HAL_LDMA_EnableCS(MS_U8 u8Channel,MS_BOOL bEnable)269 MS_BOOL HAL_LDMA_EnableCS(MS_U8 u8Channel, MS_BOOL bEnable)
270 {
271 _HAL_LDMA_CheckAndSetBaseAddr(u8Channel);
272
273 LDMA_Write2Byte(REG_TRIG_DELAY_CTRL, bEnable&BIT0);
274 return TRUE;
275 }
276