xref: /utopia/UTPA2-700.0.x/modules/ldm/hal/maserati/ldma/halLDMA.c (revision 53ee8cc121a030b8d368113ac3e966b4705770ef)
1*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
2*53ee8cc1Swenshuai.xi //
3*53ee8cc1Swenshuai.xi // Copyright (c) 2008-2009 MStar Semiconductor, Inc.
4*53ee8cc1Swenshuai.xi // All rights reserved.
5*53ee8cc1Swenshuai.xi //
6*53ee8cc1Swenshuai.xi // Unless otherwise stipulated in writing, any and all information contained
7*53ee8cc1Swenshuai.xi // herein regardless in any format shall remain the sole proprietary of
8*53ee8cc1Swenshuai.xi // MStar Semiconductor Inc. and be kept in strict confidence
9*53ee8cc1Swenshuai.xi // ("MStar Confidential Information") by the recipient.
10*53ee8cc1Swenshuai.xi // Any unauthorized act including without limitation unauthorized disclosure,
11*53ee8cc1Swenshuai.xi // copying, use, reproduction, sale, distribution, modification, disassembling,
12*53ee8cc1Swenshuai.xi // reverse engineering and compiling of the contents of MStar Confidential
13*53ee8cc1Swenshuai.xi // Information is unlawful and strictly prohibited. MStar hereby reserves the
14*53ee8cc1Swenshuai.xi // rights to any and all damages, losses, costs and expenses resulting therefrom.
15*53ee8cc1Swenshuai.xi //
16*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
17*53ee8cc1Swenshuai.xi 
18*53ee8cc1Swenshuai.xi ///////////////////////////////////////////////////////////////////////////////////////////////////
19*53ee8cc1Swenshuai.xi ///
20*53ee8cc1Swenshuai.xi /// file    halLDMA.c
21*53ee8cc1Swenshuai.xi /// @brief  local dimming DMA Driver HAL Interface
22*53ee8cc1Swenshuai.xi /// @author MStar Semiconductor Inc.
23*53ee8cc1Swenshuai.xi ///////////////////////////////////////////////////////////////////////////////////////////////////
24*53ee8cc1Swenshuai.xi 
25*53ee8cc1Swenshuai.xi 
26*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
27*53ee8cc1Swenshuai.xi //  Include Files
28*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
29*53ee8cc1Swenshuai.xi 
30*53ee8cc1Swenshuai.xi #include <string.h>
31*53ee8cc1Swenshuai.xi #include "MsCommon.h"
32*53ee8cc1Swenshuai.xi #include "MsTypes.h"
33*53ee8cc1Swenshuai.xi #include "halLDMA.h"
34*53ee8cc1Swenshuai.xi #include "regLDMA.h"
35*53ee8cc1Swenshuai.xi 
36*53ee8cc1Swenshuai.xi extern MS_U8 _u8LDMADbgLevel;
37*53ee8cc1Swenshuai.xi 
38*53ee8cc1Swenshuai.xi typedef enum
39*53ee8cc1Swenshuai.xi {
40*53ee8cc1Swenshuai.xi     E_LDMA_DBGLV_NONE,    //disable all the debug message
41*53ee8cc1Swenshuai.xi     E_LDMA_DBGLV_INFO,    //information
42*53ee8cc1Swenshuai.xi     E_LDMA_DBGLV_NOTICE,  //normal but significant condition
43*53ee8cc1Swenshuai.xi     E_LDMA_DBGLV_WARNING, //warning conditions
44*53ee8cc1Swenshuai.xi     E_LDMA_DBGLV_ERR,     //error conditions
45*53ee8cc1Swenshuai.xi     E_LDMA_DBGLV_CRIT,    //critical conditions
46*53ee8cc1Swenshuai.xi     E_LDMA_DBGLV_ALERT,   //action must be taken immediately
47*53ee8cc1Swenshuai.xi     E_LDMA_DBGLV_EMERG,   //system is unusable
48*53ee8cc1Swenshuai.xi     E_LDMA_DBGLV_DEBUG,   //debug-level messages
49*53ee8cc1Swenshuai.xi } LDMA_DbgLv;
50*53ee8cc1Swenshuai.xi 
51*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
52*53ee8cc1Swenshuai.xi //  Debug Functions
53*53ee8cc1Swenshuai.xi //-------------------------------------------------------------------------------------------------
54*53ee8cc1Swenshuai.xi #define DEBUG_LDMA(debug_level, x)     do { if (_u8LDMADbgLevel >= (debug_level)) (x); } while(0)
55*53ee8cc1Swenshuai.xi 
56*53ee8cc1Swenshuai.xi #define LDMA_WriteByte(reg,val) WRITE_BYTE((_hal_ldma.u32VirtLdmaBaseAddr + ((reg)<<2)),val)
57*53ee8cc1Swenshuai.xi 
58*53ee8cc1Swenshuai.xi #define LDMA_Write2Byte(reg,val) WRITE_WORD((_hal_ldma.u32VirtLdmaBaseAddr + ((reg)<<2)),val)
59*53ee8cc1Swenshuai.xi 
60*53ee8cc1Swenshuai.xi #define LDMA_ReadByte(reg)    (READ_BYTE(_hal_ldma.u32VirtLdmaBaseAddr + ((reg)<<2)))
61*53ee8cc1Swenshuai.xi 
62*53ee8cc1Swenshuai.xi #define LDMA_Read2Byte(reg)  (READ_WORD(_hal_ldma.u32VirtLdmaBaseAddr + ((reg)<<2)))
63*53ee8cc1Swenshuai.xi 
64*53ee8cc1Swenshuai.xi 
65*53ee8cc1Swenshuai.xi static LDMA_BaseAddr_st _hal_ldma = {
66*53ee8cc1Swenshuai.xi     .u8CurrentCH = 0,
67*53ee8cc1Swenshuai.xi     .u32VirtLdmaBaseAddr = BASEADDR_RIU + REG_LDMA0_BASE,
68*53ee8cc1Swenshuai.xi     .u32NONPMRegBaseAddr = BASEADDR_RIU,
69*53ee8cc1Swenshuai.xi };
70*53ee8cc1Swenshuai.xi 
_HAL_LDMA_CheckAndSetBaseAddr(MS_U8 u8Channel)71*53ee8cc1Swenshuai.xi static void _HAL_LDMA_CheckAndSetBaseAddr(MS_U8 u8Channel)
72*53ee8cc1Swenshuai.xi {
73*53ee8cc1Swenshuai.xi     DEBUG_LDMA(E_LDMA_DBGLV_INFO,printf("_HAL_LDMA_CheckAndSetBaseAddr channel %d\n",u8Channel));
74*53ee8cc1Swenshuai.xi     if(u8Channel == _hal_ldma.u8CurrentCH) {
75*53ee8cc1Swenshuai.xi         return;
76*53ee8cc1Swenshuai.xi     } else if(u8Channel ==  LDMA0) {
77*53ee8cc1Swenshuai.xi         _hal_ldma.u32VirtLdmaBaseAddr = _hal_ldma.u32NONPMRegBaseAddr + REG_LDMA0_BASE;
78*53ee8cc1Swenshuai.xi     } else if(u8Channel ==  LDMA1) {
79*53ee8cc1Swenshuai.xi         _hal_ldma.u32VirtLdmaBaseAddr = _hal_ldma.u32NONPMRegBaseAddr + REG_LDMA1_BASE;
80*53ee8cc1Swenshuai.xi     } else {
81*53ee8cc1Swenshuai.xi         DEBUG_LDMA(E_LDMA_DBGLV_ERR,printf("LDMA Channel is out of range!\n"));
82*53ee8cc1Swenshuai.xi         return ;
83*53ee8cc1Swenshuai.xi     }
84*53ee8cc1Swenshuai.xi }
85*53ee8cc1Swenshuai.xi 
86*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------
87*53ee8cc1Swenshuai.xi /// Description : Config LDMA MMIO base address
88*53ee8cc1Swenshuai.xi /// @param u32PMBankBaseAddr \b IN:base address of MMIO (PM domain)
89*53ee8cc1Swenshuai.xi /// @param u32NONPMRegBaseAddr \b IN :base address of MMIO
90*53ee8cc1Swenshuai.xi /// @param u8DeviceIndex \b IN: index of HW IP
91*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------
HAL_LDMA_MMIOConfig(MS_U32 u32NONPMRegBaseAddr,MS_U8 u8Channel)92*53ee8cc1Swenshuai.xi MS_BOOL HAL_LDMA_MMIOConfig(MS_U32 u32NONPMRegBaseAddr, MS_U8 u8Channel)
93*53ee8cc1Swenshuai.xi {
94*53ee8cc1Swenshuai.xi     _hal_ldma.u32NONPMRegBaseAddr = u32NONPMRegBaseAddr;
95*53ee8cc1Swenshuai.xi     if(u8Channel ==  LDMA0)
96*53ee8cc1Swenshuai.xi     {
97*53ee8cc1Swenshuai.xi         _hal_ldma.u32VirtLdmaBaseAddr = u32NONPMRegBaseAddr + REG_LDMA0_BASE;
98*53ee8cc1Swenshuai.xi 
99*53ee8cc1Swenshuai.xi         DEBUG_LDMA(E_LDMA_DBGLV_INFO,printf("[E_LDMA0]_hal_ldma.u32VirtLdmaBaseAddr = %lx\n",_hal_ldma.u32VirtLdmaBaseAddr));
100*53ee8cc1Swenshuai.xi     }
101*53ee8cc1Swenshuai.xi     else if(u8Channel ==  LDMA1)
102*53ee8cc1Swenshuai.xi     {
103*53ee8cc1Swenshuai.xi         _hal_ldma.u32VirtLdmaBaseAddr = u32NONPMRegBaseAddr + REG_LDMA1_BASE;
104*53ee8cc1Swenshuai.xi 
105*53ee8cc1Swenshuai.xi         DEBUG_LDMA(E_LDMA_DBGLV_INFO,printf("[E_LDMA1]_hal_ldma.u32VirtLdmaBaseAddr = %lx\n",_hal_ldma.u32VirtLdmaBaseAddr));
106*53ee8cc1Swenshuai.xi     }
107*53ee8cc1Swenshuai.xi     else
108*53ee8cc1Swenshuai.xi     {
109*53ee8cc1Swenshuai.xi         DEBUG_LDMA(E_LDMA_DBGLV_ERR,printf("LDMA Channel is out of range!\n"));
110*53ee8cc1Swenshuai.xi         return FALSE;
111*53ee8cc1Swenshuai.xi     }
112*53ee8cc1Swenshuai.xi     return TRUE;
113*53ee8cc1Swenshuai.xi }
114*53ee8cc1Swenshuai.xi 
HAL_LDMA_SetSPITriggerMode(MS_U8 u8Channel,MS_U8 u8TriggerMode)115*53ee8cc1Swenshuai.xi MS_BOOL   HAL_LDMA_SetSPITriggerMode(MS_U8 u8Channel, MS_U8 u8TriggerMode)
116*53ee8cc1Swenshuai.xi {
117*53ee8cc1Swenshuai.xi     _HAL_LDMA_CheckAndSetBaseAddr(u8Channel);
118*53ee8cc1Swenshuai.xi 
119*53ee8cc1Swenshuai.xi     switch(u8TriggerMode)
120*53ee8cc1Swenshuai.xi     {
121*53ee8cc1Swenshuai.xi         case LDMA_SPI_TRIGGER_STOP:
122*53ee8cc1Swenshuai.xi             // Menuload trigger src = one shot
123*53ee8cc1Swenshuai.xi 
124*53ee8cc1Swenshuai.xi             LDMA_Write2Byte(REG_MENULOAD_CTRL_MODE, LDMA_Read2Byte(REG_MENULOAD_CTRL_MODE)&(~REG_MENULOAD_CTRL_MODE_MSK));
125*53ee8cc1Swenshuai.xi             // menuload abort one shot
126*53ee8cc1Swenshuai.xi             LDMA_Write2Byte(REG_MENULOAD_ABORT, LDMA_Read2Byte(REG_MENULOAD_ABORT)|BIT0);
127*53ee8cc1Swenshuai.xi             // menuload disable one shot
128*53ee8cc1Swenshuai.xi             LDMA_Write2Byte(REG_MENULOAD_ENABLE, LDMA_Read2Byte(REG_MENULOAD_ENABLE)&(~BIT0));
129*53ee8cc1Swenshuai.xi             break;
130*53ee8cc1Swenshuai.xi 
131*53ee8cc1Swenshuai.xi         case LDMA_SPI_TRIGGER_ONE_SHOT:
132*53ee8cc1Swenshuai.xi             // Menuload trigger src = one shot
133*53ee8cc1Swenshuai.xi             LDMA_Write2Byte(REG_MENULOAD_CTRL_MODE, LDMA_Read2Byte(REG_MENULOAD_CTRL_MODE)&(~REG_MENULOAD_CTRL_MODE_MSK));
134*53ee8cc1Swenshuai.xi             // menuload enable one shot
135*53ee8cc1Swenshuai.xi             LDMA_Write2Byte(REG_MENULOAD_ENABLE, LDMA_Read2Byte(REG_MENULOAD_ENABLE)|(BIT0));
136*53ee8cc1Swenshuai.xi             // menuload realtime trigger one shot
137*53ee8cc1Swenshuai.xi             LDMA_Write2Byte(REG_MENULOAD_REALTIME_TRIG, LDMA_Read2Byte(REG_MENULOAD_REALTIME_TRIG)|(BIT0));
138*53ee8cc1Swenshuai.xi 
139*53ee8cc1Swenshuai.xi             break;
140*53ee8cc1Swenshuai.xi 
141*53ee8cc1Swenshuai.xi         case LDMA_SPI_TRIGGER_EVERY_VSYNC:
142*53ee8cc1Swenshuai.xi             // Menuload trigger src = V sync
143*53ee8cc1Swenshuai.xi             LDMA_Write2Byte(REG_MENULOAD_CTRL_MODE, LDMA_Read2Byte(REG_MENULOAD_CTRL_MODE)|BIT0);
144*53ee8cc1Swenshuai.xi             LDMA_Write2Byte(REG_USE_HW_LOOP_MD, LDMA_Read2Byte(REG_USE_HW_LOOP_MD)|BIT7);
145*53ee8cc1Swenshuai.xi             LDMA_Write2Byte(REG_MENULOAD_REALTIME_TRIG, LDMA_Read2Byte(REG_MENULOAD_REALTIME_TRIG)|(BIT0));
146*53ee8cc1Swenshuai.xi 
147*53ee8cc1Swenshuai.xi             break;
148*53ee8cc1Swenshuai.xi         default :
149*53ee8cc1Swenshuai.xi             break;
150*53ee8cc1Swenshuai.xi     }
151*53ee8cc1Swenshuai.xi 
152*53ee8cc1Swenshuai.xi     return TRUE;
153*53ee8cc1Swenshuai.xi }
154*53ee8cc1Swenshuai.xi 
HAL_LDMA_SetMenuloadNumber(MS_U8 u8Channel,MS_U32 u32MenuldNum)155*53ee8cc1Swenshuai.xi MS_BOOL HAL_LDMA_SetMenuloadNumber(MS_U8 u8Channel, MS_U32 u32MenuldNum)
156*53ee8cc1Swenshuai.xi {
157*53ee8cc1Swenshuai.xi     _HAL_LDMA_CheckAndSetBaseAddr(u8Channel);
158*53ee8cc1Swenshuai.xi 
159*53ee8cc1Swenshuai.xi     LDMA_Write2Byte(REG_MENULOAD_NUMBER, u32MenuldNum);
160*53ee8cc1Swenshuai.xi 
161*53ee8cc1Swenshuai.xi     return TRUE;
162*53ee8cc1Swenshuai.xi }
163*53ee8cc1Swenshuai.xi 
HAL_LDMA_SetSPICommandFormat(MS_U8 u8Channel,MS_U8 u8CmdLen,MS_U16 * pu16CmdBuf)164*53ee8cc1Swenshuai.xi MS_BOOL HAL_LDMA_SetSPICommandFormat(MS_U8 u8Channel,MS_U8 u8CmdLen, MS_U16* pu16CmdBuf )
165*53ee8cc1Swenshuai.xi {
166*53ee8cc1Swenshuai.xi     _HAL_LDMA_CheckAndSetBaseAddr(u8Channel);
167*53ee8cc1Swenshuai.xi 
168*53ee8cc1Swenshuai.xi     if( u8CmdLen > LDMA_MAX_SPI_CMD_NUM )
169*53ee8cc1Swenshuai.xi     {
170*53ee8cc1Swenshuai.xi         DEBUG_LDMA(E_LDMA_DBGLV_ERR,printf("[LDM-DMA]Spi command len is too long=%u!\n", u8CmdLen));
171*53ee8cc1Swenshuai.xi         u8CmdLen = LDMA_MAX_SPI_CMD_NUM;
172*53ee8cc1Swenshuai.xi     }
173*53ee8cc1Swenshuai.xi 
174*53ee8cc1Swenshuai.xi     if(pu16CmdBuf == NULL)
175*53ee8cc1Swenshuai.xi     {
176*53ee8cc1Swenshuai.xi         DEBUG_LDMA(E_LDMA_DBGLV_ERR,printf("NULL Pointer,please check pu16CmdBuf!\n "));
177*53ee8cc1Swenshuai.xi         return FALSE;
178*53ee8cc1Swenshuai.xi     }
179*53ee8cc1Swenshuai.xi 
180*53ee8cc1Swenshuai.xi     switch (u8CmdLen)
181*53ee8cc1Swenshuai.xi     {
182*53ee8cc1Swenshuai.xi         case 10:
183*53ee8cc1Swenshuai.xi             LDMA_Write2Byte(REG_COMMAND8, pu16CmdBuf[9]);
184*53ee8cc1Swenshuai.xi             LDMA_Write2Byte(REG_CMD_LENGTH, LDMA_Read2Byte(REG_CMD_LENGTH)|BIT9);
185*53ee8cc1Swenshuai.xi         case 9:
186*53ee8cc1Swenshuai.xi             LDMA_Write2Byte(REG_COMMAND7, pu16CmdBuf[8]);
187*53ee8cc1Swenshuai.xi             LDMA_Write2Byte(REG_CMD_LENGTH, LDMA_Read2Byte(REG_CMD_LENGTH)|BIT8);
188*53ee8cc1Swenshuai.xi         case 8:
189*53ee8cc1Swenshuai.xi             LDMA_Write2Byte(REG_COMMAND6, pu16CmdBuf[7]);
190*53ee8cc1Swenshuai.xi             LDMA_Write2Byte(REG_CMD_LENGTH, LDMA_Read2Byte(REG_CMD_LENGTH)|BIT7);
191*53ee8cc1Swenshuai.xi         case 7:
192*53ee8cc1Swenshuai.xi             LDMA_Write2Byte(REG_COMMAND5, pu16CmdBuf[6]);
193*53ee8cc1Swenshuai.xi             LDMA_Write2Byte(REG_CMD_LENGTH, LDMA_Read2Byte(REG_CMD_LENGTH)|BIT6);
194*53ee8cc1Swenshuai.xi         case 6:
195*53ee8cc1Swenshuai.xi             LDMA_Write2Byte(REG_COMMAND4, pu16CmdBuf[5]);
196*53ee8cc1Swenshuai.xi             LDMA_Write2Byte(REG_CMD_LENGTH, LDMA_Read2Byte(REG_CMD_LENGTH)|BIT5);
197*53ee8cc1Swenshuai.xi         case 5:
198*53ee8cc1Swenshuai.xi             LDMA_Write2Byte(REG_COMMAND3, pu16CmdBuf[4]);
199*53ee8cc1Swenshuai.xi             LDMA_Write2Byte(REG_CMD_LENGTH, LDMA_Read2Byte(REG_CMD_LENGTH)|BIT4);
200*53ee8cc1Swenshuai.xi         case 4:
201*53ee8cc1Swenshuai.xi             LDMA_Write2Byte(REG_COMMAND2, pu16CmdBuf[3]);
202*53ee8cc1Swenshuai.xi             LDMA_Write2Byte(REG_CMD_LENGTH, LDMA_Read2Byte(REG_CMD_LENGTH)|BIT3);
203*53ee8cc1Swenshuai.xi         case 3:
204*53ee8cc1Swenshuai.xi             LDMA_Write2Byte(REG_COMMAND1, pu16CmdBuf[2]);
205*53ee8cc1Swenshuai.xi             LDMA_Write2Byte(REG_CMD_LENGTH, LDMA_Read2Byte(REG_CMD_LENGTH)|BIT2);
206*53ee8cc1Swenshuai.xi         case 2:
207*53ee8cc1Swenshuai.xi             LDMA_Write2Byte(REG_COMMAND, pu16CmdBuf[1]);
208*53ee8cc1Swenshuai.xi             LDMA_Write2Byte(REG_CMD_LENGTH, LDMA_Read2Byte(REG_CMD_LENGTH)|BIT1);
209*53ee8cc1Swenshuai.xi         case 1:
210*53ee8cc1Swenshuai.xi             LDMA_Write2Byte(REG_START_CODE, pu16CmdBuf[0]);
211*53ee8cc1Swenshuai.xi             LDMA_Write2Byte(REG_CMD_LENGTH, LDMA_Read2Byte(REG_CMD_LENGTH)|BIT0);
212*53ee8cc1Swenshuai.xi             break;
213*53ee8cc1Swenshuai.xi         default:
214*53ee8cc1Swenshuai.xi             DEBUG_LDMA(E_LDMA_DBGLV_ERR,printf("Oops, u8CmdLen should  be bigger than 0\n"));
215*53ee8cc1Swenshuai.xi     }
216*53ee8cc1Swenshuai.xi 
217*53ee8cc1Swenshuai.xi     return TRUE;
218*53ee8cc1Swenshuai.xi }
219*53ee8cc1Swenshuai.xi 
HAL_LDMA_SetCheckSumMode(MS_U8 u8Channel,MS_U8 u8SumMode)220*53ee8cc1Swenshuai.xi MS_BOOL HAL_LDMA_SetCheckSumMode(MS_U8 u8Channel,MS_U8 u8SumMode)
221*53ee8cc1Swenshuai.xi {
222*53ee8cc1Swenshuai.xi     _HAL_LDMA_CheckAndSetBaseAddr(u8Channel);
223*53ee8cc1Swenshuai.xi 
224*53ee8cc1Swenshuai.xi     LDMA_Write2Byte(REG_CMD_LENGTH, LDMA_Read2Byte(REG_CMD_LENGTH)|BIT15);
225*53ee8cc1Swenshuai.xi     switch (u8SumMode)
226*53ee8cc1Swenshuai.xi     {
227*53ee8cc1Swenshuai.xi         case LDMA_NOCHECKSUM: {
228*53ee8cc1Swenshuai.xi             LDMA_Write2Byte(REG_CMD_LENGTH, LDMA_Read2Byte(REG_CMD_LENGTH)&(~BIT15));
229*53ee8cc1Swenshuai.xi             break;
230*53ee8cc1Swenshuai.xi         }
231*53ee8cc1Swenshuai.xi         case LDMA_CHECKSUM_ALL: {
232*53ee8cc1Swenshuai.xi             LDMA_Write2Byte(REG_CHKSUM_MD, LDMA_Read2Byte(REG_CHKSUM_MD)&(~REG_CHKSUM_MD_MSK));
233*53ee8cc1Swenshuai.xi             break;
234*53ee8cc1Swenshuai.xi         }
235*53ee8cc1Swenshuai.xi         case LDMA_CHECKSUM_CMD_DATA: {
236*53ee8cc1Swenshuai.xi             LDMA_Write2Byte(REG_CHKSUM_MD, BIT0);
237*53ee8cc1Swenshuai.xi             break;
238*53ee8cc1Swenshuai.xi         }
239*53ee8cc1Swenshuai.xi         case LDMA_CHECKSUM_DATA_ONLY: {
240*53ee8cc1Swenshuai.xi             LDMA_Write2Byte(REG_CHKSUM_MD,BIT1);
241*53ee8cc1Swenshuai.xi             break;
242*53ee8cc1Swenshuai.xi         }
243*53ee8cc1Swenshuai.xi         default: {
244*53ee8cc1Swenshuai.xi             DEBUG_LDMA(E_LDMA_DBGLV_ERR,printf("Oops, No Such CheckSum Mode. \n"));
245*53ee8cc1Swenshuai.xi         }
246*53ee8cc1Swenshuai.xi     }
247*53ee8cc1Swenshuai.xi 
248*53ee8cc1Swenshuai.xi     return TRUE;
249*53ee8cc1Swenshuai.xi 
250*53ee8cc1Swenshuai.xi }
251*53ee8cc1Swenshuai.xi 
HAL_LDMA_SetTrigDelayCnt(MS_U8 u8Channel,MS_U16 * pu16DelayCnt)252*53ee8cc1Swenshuai.xi MS_BOOL HAL_LDMA_SetTrigDelayCnt(MS_U8 u8Channel, MS_U16 *pu16DelayCnt)
253*53ee8cc1Swenshuai.xi {
254*53ee8cc1Swenshuai.xi     if(pu16DelayCnt == NULL)
255*53ee8cc1Swenshuai.xi     {
256*53ee8cc1Swenshuai.xi         DEBUG_LDMA(E_LDMA_DBGLV_ERR,printf("[LDMA]Fun:%s  Args Error!!!\n",__FUNCTION__));
257*53ee8cc1Swenshuai.xi         return FALSE;
258*53ee8cc1Swenshuai.xi     }
259*53ee8cc1Swenshuai.xi 
260*53ee8cc1Swenshuai.xi     _HAL_LDMA_CheckAndSetBaseAddr(u8Channel);
261*53ee8cc1Swenshuai.xi 
262*53ee8cc1Swenshuai.xi     LDMA_Write2Byte(REG_TRIG_DELAY0_CNT0,pu16DelayCnt[0]);
263*53ee8cc1Swenshuai.xi     LDMA_Write2Byte(REG_TRIG_DELAY1_CNT0,pu16DelayCnt[1]);
264*53ee8cc1Swenshuai.xi     LDMA_Write2Byte(REG_TRIG_DELAY1_CNT0,pu16DelayCnt[2]);
265*53ee8cc1Swenshuai.xi     LDMA_Write2Byte(REG_TRIG_DELAY1_CNT1,pu16DelayCnt[3]);
266*53ee8cc1Swenshuai.xi     return TRUE;
267*53ee8cc1Swenshuai.xi }
268*53ee8cc1Swenshuai.xi 
HAL_LDMA_EnableCS(MS_U8 u8Channel,MS_BOOL bEnable)269*53ee8cc1Swenshuai.xi MS_BOOL HAL_LDMA_EnableCS(MS_U8 u8Channel, MS_BOOL bEnable)
270*53ee8cc1Swenshuai.xi {
271*53ee8cc1Swenshuai.xi     _HAL_LDMA_CheckAndSetBaseAddr(u8Channel);
272*53ee8cc1Swenshuai.xi 
273*53ee8cc1Swenshuai.xi     LDMA_Write2Byte(REG_TRIG_DELAY_CTRL, bEnable&BIT0);
274*53ee8cc1Swenshuai.xi     return TRUE;
275*53ee8cc1Swenshuai.xi }
276