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76 //******************************************************************************
77 //<MStar Software>
78 ///////////////////////////////////////////////////////////////////////////////////////////////////
79 ///
80 /// file mhal_mhl.c
81 /// @author MStar Semiconductor Inc.
82 /// @brief MHL driver Function
83 ///////////////////////////////////////////////////////////////////////////////////////////////////
84
85 #ifndef _MHAL_MHL_C_
86 #define _MHAL_MHL_C_
87
88 //-------------------------------------------------------------------------------------------------
89 // Include Files
90 //-------------------------------------------------------------------------------------------------
91 // Common Definition
92 #include "MsCommon.h"
93 #include "MsVersion.h"
94 #ifdef MSOS_TYPE_LINUX_KERNEL
95 #include <linux/string.h>
96 #else
97 #include <string.h>
98 #endif
99 #include "MsIRQ.h"
100 #include "MsOS.h"
101 #include "mhal_xc_chip_config.h"
102 #include "mhl_hwreg_utility2.h"
103 #include "hwreg_pm_sleep.h"
104 #include "hwreg_hdmi.h"
105 #include "hwreg_hdcp.h"
106 #include "hwregMHL.h"
107 #include "mdrv_mhl_st.h"
108 #include "halMHL.h"
109
110 //-------------------------------------------------------------------------------------------------
111 // Local Defines
112 //-------------------------------------------------------------------------------------------------
113 #define msg_mhl(x) x
114 #define MHL_DEBUG_SEND_MSC 0
115
116 #define DMHLInit 0
117
118 //-------------------------------------------------------------------------------------------------
119 // Local Structures
120 //-------------------------------------------------------------------------------------------------
121 typedef struct
122 {
123 MS_U32 addr;
124 MS_U16 mask;
125 MS_U16 databuf;
126 } msLoadTbl_S;
127
128 //-------------------------------------------------------------------------------------------------
129 // Global Variables
130 //-------------------------------------------------------------------------------------------------
131 MS_BOOL bMHLSignalStable = FALSE;
132 MS_BOOL bPortConfigChange = FALSE;
133 MS_BOOL bECbusEnableFlag = FALSE;
134 MS_U8 ucMHLSupportPort = E_MUX_NOT_SUPPORT_MHL;
135 MS_U8 ucIControlValue = MHL_ICONTROL_PD_24BIT_MODE0;
136 MS_U8 ucImpedanceValue = MHL_IMPEDANCE_VALUE;
137 MS_U8 ucChipIDValue = MHL_CHIP_ID_MANHATTAN;
138 MS_U8 ucECbusTrainState = MHL_ECBUS_STATE_DISABLE;
139 MS_U8 ucECbusTrainFailCount = 0;
140 MS_U8 ucMHL3LinkRate = MHL_AV_LINK_NONE;
141
142 //-------------------------------------------------------------------------------------------------
143 // MHL initial table
144 //-------------------------------------------------------------------------------------------------
145 static msLoadTbl_S tMHL_INITIAL_TABLE[] =
146 {
147 // Set accepted discover pulse high pulse width to ignore USB pulse
148 {REG_PM_MHL_CBUS_0C, BMASK(15:0), 0x0046}, // reject cbus discovery pulse below this limit
149 {REG_PM_MHL_CBUS_0D, BMASK(15:0), 0x0082}, // reject cbus discovery pulse above this limit
150 // CTS 4.3.7.1
151 {REG_MHL_CBUS_55, BMASK(7:4), BIT(4)}, // [7:4]: cbus requester transmit opportunity after arbitration
152 {REG_MHL_CBUS_70, BIT(14), BIT(14)}, // [14]: let edid current read initial address add 1
153
154 {REG_PM_MHL_CBUS_21, BIT(1), BIT(1)}, // [1]: output mhl_zxsense_tmds inv
155
156 // For CTS 6.3.10.7
157 {REG_MHL_CBUS_59, BMASK(15:0), 0xFBD0}, // timeout for a device receiving a packet within a command
158 {REG_MHL_CBUS_5A, BMASK(15:0), 0x0001}, // modify to 130ms
159
160 {REG_PM_MHL_CBUS_01, BMASK(5:2), 0}, // Not overwrite pull down resistor
161
162 #if(MHL_CBUS_OPERATION_MODE >= MHL_CBUS_HW_ISR_MODE)
163 {REG_MHL_CBUS_23, BMASK(10:8) |BIT(4), BIT(10) |BIT(4)}, // [10]: enable HW auto response read_devcap request
164 {REG_MHL_CBUS_6D, BMASK(11:0), BMASK(11:0)}, // Enable MHL HW mode
165 {REG_MHL_CBUS_71, BMASK(15:14)| BMASK(11:10), BMASK(15:14)| BMASK(11:10)},
166 {REG_MHL_CBUS_50, BIT(13), BIT(13)}, // [13]: MSC send command keep mode
167 #else
168 {REG_MHL_CBUS_23, BMASK(10:8) |BIT(4), 0}, // [10]: enable HW auto response read_devcap request
169 {REG_MHL_CBUS_6D, BMASK(11:0), 0}, // Enable MHL HW mode
170 {REG_MHL_CBUS_71, BMASK(15:14)| BMASK(11:10), 0},
171 {REG_MHL_CBUS_50, BIT(13), 0}, // [13]: MSC send command keep mode
172 #endif
173
174 #if(MHL_CBUS_OPERATION_MODE == MHL_CBUS_HW_REPLY_MODE)
175 {REG_MHL_CBUS_0B, BIT(14), BIT(14)}, // [14]: MSC send command keep mode
176 #endif
177
178 #if DMHL_INT_ENABLE
179 // Mask unused interrupt events
180 {REG_PM_MHL_CBUS_16, BIT(13)|BIT(9), BIT(13)|BIT(9)}, // [13]: lnk_lay_en_chg_int mask, [9]: conn_state_chg_int mask
181 {REG_PM_MHL_CBUS_18, BIT(9)|BIT(5)|BIT(1), BIT(9)|BIT(5)|BIT(1)}, // [9]: cbus_discover_pul_confirm_int mask, [5]: wakeup_pul_confirm_int mask, [1]: cbus_stuck_to_low_int mask.
182 {REG_PM_MHL_CBUS_30, BIT(1), BIT(1)}, // [1]: cbus conflict_int mask
183 {REG_PM_MHL_CBUS_38, BIT(13)|BIT(9)|BIT(5)|BIT(1), BIT(13)|BIT(9)|BIT(5)|BIT(1)}, // [13]: unused mask, [9]: unused mask, [5]: unused mask, [1]: unused mask.
184 {REG_MHL_CBUS_14, BIT(13), BIT(13)}, // [13]: int mask for monitor_sram_full
185 {REG_MHL_CBUS_18, BIT(13), BIT(13)}, // [13]: send rcv_pkt_ddc_sw_overwrite_err_in mask
186 {REG_MHL_CBUS_19, BIT(5)|BIT(1), BIT(5)|BIT(1)}, // [5]: send ddc send complete interrupt mask, [1]: send ddc error interrupt mask
187 {REG_MHL_CBUS_1B, BIT(1), BIT(1)}, // [1]: receive ddc packet valid mask
188 {REG_MHL_CBUS_1F, BIT(5)|BIT(1), BIT(5)|BIT(1)}, // [5]: ddc access edid timeout int mask, [1]: client_wrt_ddc_ram interrupt mask
189 {REG_MHL_CBUS_21, BIT(5), BIT(5)}, // [5]: ddc error interrupt mask
190 {REG_MHL_CBUS_22, BIT(9)|BIT(5)|BIT(1), BIT(9)|BIT(5)|BIT(1)}, // [9]: ddc access hdcp timeout int mask, [5]: receive nack pkt int_mask, [1]: receive abort pkt int mask
191 {REG_MHL_CBUS_23, BIT(13), BIT(13)}, // [13]: send rcv_pkt_msc_sw_overwrite_err_in mask
192 {REG_MHL_CBUS_24, BIT(1), BIT(1)}, // [1]: send error interrupt mask
193 {REG_MHL_CBUS_25, BIT(9)|BIT(5)|BIT(1), BIT(9)|BIT(5)|BIT(1)}, // [9]: response_pkt_msc_hw_int mask, [5]: snd_pkt_msc_hw_int mask, [1]: msc sw send complete interrupt mask
194 {REG_MHL_CBUS_63, BIT(9), BIT(9)}, // [9]: dytycycle_bad_int mask
195 {REG_MHL_CBUS_65, BIT(9)|BIT(5)|BIT(1), BIT(9)|BIT(5)|BIT(1)}, // [9]: rcv_parity_err_int mask, [5]: rcv_data_err_int mask, [1]: rcv_sync_err_int mask
196 {REG_MHL_CBUS_78, BIT(13)|BIT(9)|BIT(5)|BIT(1), BIT(13)|BIT(9)|BIT(5)|BIT(1)}, // [13]: unused mask, [9]: unused mask, [5]: unused mask, [1]: unused mask.
197 #endif
198 };
199
200 //-------------------------------------------------------------------------------------------------
201 // MHL power on table
202 //-------------------------------------------------------------------------------------------------
203 static msLoadTbl_S tMHL_POWER_ON_TABLE[] =
204 {
205 {REG_PM_MHL_CBUS_01, BMASK(5:2), 0}, // Not overwrite pull down resistor
206 };
207
208 //-------------------------------------------------------------------------------------------------
209 // MHL power down table
210 //-------------------------------------------------------------------------------------------------
211 static msLoadTbl_S tMHL_POWER_DOWN_TABLE[] =
212 {
213 {REG_PM_MHL_CBUS_01, BMASK(5:2), BIT(5)|BMASK(3:2)},
214 };
215
216 //-------------------------------------------------------------------------------------------------
217 // MHL power saving table
218 //-------------------------------------------------------------------------------------------------
219 static msLoadTbl_S tMHL_POWER_SAVING_TABLE[] =
220 {
221 {REG_PM_MHL_CBUS_01, BMASK(5:2), BIT(5)|BMASK(3:2)},
222 };
223
224 //-------------------------------------------------------------------------------------------------
225 // Local Functions
226 //-------------------------------------------------------------------------------------------------
227
228 //**************************************************************************
229 // [Function Name]:
230 // _mhal_mhl_IsCbusBusy()
231 // [Description]
232 //
233 // [Arguments]:
234 //
235 // [Return]:
236 //
237 //**************************************************************************
_mhal_mhl_IsCbusBusy(void)238 MS_BOOL _mhal_mhl_IsCbusBusy(void)
239 {
240 MS_BOOL bBusyFlag = FALSE;
241
242 if(!bECbusEnableFlag)
243 {
244 bBusyFlag = ((R2BYTE(REG_MHL_CBUS_5D) & 0x00F0) != 0 ? TRUE : FALSE);
245 }
246 return bBusyFlag;
247 }
248
249 //**************************************************************************
250 // [Function Name]:
251 // _mhal_mhl_DviAutoEQSwitch()
252 // [Description]
253 //
254 // [Arguments]:
255 //
256 // [Return]:
257 //
258 //**************************************************************************
_mhal_mhl_DviAutoEQSwitch(MS_U8 ucCbusSelect,MS_BOOL bFlag)259 void _mhal_mhl_DviAutoEQSwitch(MS_U8 ucCbusSelect, MS_BOOL bFlag)
260 {
261 static MS_BOOL bAutoEQFlag = FALSE;
262
263 switch(ucCbusSelect)
264 {
265 #if(MHL_FUNCTION_SUPPORT_PORTA)
266 case MHL_CBUS_SELECT_PORTA:
267 if(GET_MHL_PATH_SUPPORT_PORTA())
268 {
269 if(!bAutoEQFlag)
270 {
271 //if((R2BYTE(REG_DVI_DTOP_DUAL_P0_2F_L) &BIT(0)) == BIT(0))
272 {
273 bAutoEQFlag = TRUE;
274 }
275 }
276
277 if(bAutoEQFlag)
278 {
279 if(bFlag)
280 {
281 //W2BYTEMSK(REG_DVI_DTOP_DUAL_P0_00_L, BIT(4), BIT(4)); // enable EQ new mode
282 //W2BYTEMSK(REG_DVI_DTOP_DUAL_P0_2F_L, BIT(0), BIT(0)); // enable autoEQ controller
283 }
284 else
285 {
286 //W2BYTEMSK(REG_DVI_DTOP_DUAL_P0_00_L, 0, BIT(4)); // disable EQ new mode
287 //W2BYTEMSK(REG_DVI_DTOP_DUAL_P0_2F_L, 0, BIT(0)); // disable autoEQ controller
288 }
289 }
290 }
291
292 break;
293 #endif
294
295 #if(MHL_FUNCTION_SUPPORT_PORTB)
296 case MHL_CBUS_SELECT_PORTB:
297 if(GET_MHL_PATH_SUPPORT_PORTB())
298 {
299 if(!bAutoEQFlag)
300 {
301 //if((R2BYTE(REG_DVI_DTOP_DUAL_P1_2F_L) &BIT(0)) == BIT(0))
302 {
303 bAutoEQFlag = TRUE;
304 }
305 }
306
307 if(bAutoEQFlag)
308 {
309 if(bFlag)
310 {
311 //W2BYTEMSK(REG_DVI_DTOP_DUAL_P1_00_L, BIT(4), BIT(4)); // enable EQ new mode
312 //W2BYTEMSK(REG_DVI_DTOP_DUAL_P1_2F_L, BIT(0), BIT(0)); // enable autoEQ controller
313 }
314 else
315 {
316 //W2BYTEMSK(REG_DVI_DTOP_DUAL_P1_00_L, 0, BIT(4)); // disable EQ new mode
317 //W2BYTEMSK(REG_DVI_DTOP_DUAL_P1_2F_L, 0, BIT(0)); // disable autoEQ controller
318 }
319 }
320 }
321
322 break;
323 #endif
324
325 #if(MHL_FUNCTION_SUPPORT_PORTC)
326 case MHL_CBUS_SELECT_PORTC:
327 if(GET_MHL_PATH_SUPPORT_PORTC())
328 {
329 if(!bAutoEQFlag)
330 {
331 //if((R2BYTE(REG_DVI_DTOP_DUAL_P2_2F_L) &BIT(0)) == BIT(0))
332 {
333 bAutoEQFlag = TRUE;
334 }
335 }
336
337 if(bAutoEQFlag)
338 {
339 if(bFlag)
340 {
341 //W2BYTEMSK(REG_DVI_DTOP_DUAL_P2_00_L, BIT(4), BIT(4)); // enable EQ new mode
342 //W2BYTEMSK(REG_DVI_DTOP_DUAL_P2_2F_L, BIT(0), BIT(0)); // enable autoEQ controller
343 }
344 else
345 {
346 //W2BYTEMSK(REG_DVI_DTOP_DUAL_P2_00_L, 0, BIT(4)); // disable EQ new mode
347 //W2BYTEMSK(REG_DVI_DTOP_DUAL_P2_2F_L, 0, BIT(0)); // disable autoEQ controller
348 }
349 }
350 }
351
352 break;
353 #endif
354
355 #if(MHL_FUNCTION_SUPPORT_PORTD)
356 case MHL_CBUS_SELECT_PORTD:
357 if(GET_MHL_PATH_SUPPORT_PORTD())
358 {
359 if(!bAutoEQFlag)
360 {
361 //if((R2BYTE(REG_DVI_DTOP_DUAL_P3_2F_L) &BIT(0)) == BIT(0))
362 {
363 bAutoEQFlag = TRUE;
364 }
365 }
366
367 if(bAutoEQFlag)
368 {
369 if(bFlag)
370 {
371 //W2BYTEMSK(REG_DVI_DTOP_DUAL_P3_00_L, BIT(4), BIT(4)); // enable EQ new mode
372 //W2BYTEMSK(REG_DVI_DTOP_DUAL_P3_2F_L, BIT(0), BIT(0)); // enable autoEQ controller
373 }
374 else
375 {
376 //W2BYTEMSK(REG_DVI_DTOP_DUAL_P3_00_L, 0, BIT(4)); // disable EQ new mode
377 //W2BYTEMSK(REG_DVI_DTOP_DUAL_P3_2F_L, 0, BIT(0)); // disable autoEQ controller
378 }
379 }
380 }
381
382 break;
383 #endif
384
385 default:
386
387 break;
388 };
389 }
390
391 //**************************************************************************
392 // [Function Name]:
393 // _mhal_mhl_HdmiBypassModeSetting()
394 // [Description]
395 // MHL HDMI bypass setting
396 // [Arguments]:
397 //
398 // [Return]:
399 //
400 //**************************************************************************
_mhal_mhl_HdmiBypassModeSetting(MS_U8 ucCbusSelect)401 void _mhal_mhl_HdmiBypassModeSetting(MS_U8 ucCbusSelect)
402 {
403 switch(ucCbusSelect)
404 {
405 #if(MHL_FUNCTION_SUPPORT_PORTA)
406 case MHL_CBUS_SELECT_PORTA:
407 if(GET_MHL_PATH_SUPPORT_PORTA())
408 {
409 W2BYTEMSK(REG_DVI_DTOP_DUAL_P0_27_L, 0, BIT(6)| BIT(1)); // [6]: align, [1]: MHL pack-pixel mode
410 W2BYTEMSK(REG_COMBO_PHY0_P0_73_L, MHL_HDMI_EQ_SETTING_VALUE, BMASK(4:0)); // B channel EQ
411 W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, BIT(13)| BMASK(3:0), BIT(13)| BMASK(3:0));
412 W2BYTEMSK(REG_HDCP_DUAL_P0_09_L, 0, BIT(0)); // PP mode + HDCP eanble
413 W2BYTEMSK(REG_COMBO_PHY0_P0_6F_L, 0, BIT(10)); // I-control PD overwrite write
414 W2BYTEMSK(REG_COMBO_PHY0_P0_45_L, (MHL_HDMI_LOCK_TIME_VALUE << 8), BMASK(14:8)); // Digital lock time value
415 W2BYTEMSK(REG_COMBO_PHY0_P0_11_L, 0, BMASK(12:0));
416 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L, BIT(8), BIT(8));
417
418 if(ucImpedanceValue != MHL_IMPEDANCE_VALUE)
419 {
420 W2BYTEMSK(REG_COMBO_PHY0_P0_59_L, 0, BIT(8));
421 W2BYTEMSK(REG_COMBO_PHY0_P0_6B_L, (MHL_IMPEDANCE_VALUE << 12), BMASK(15:12));
422 }
423 }
424
425 break;
426 #endif
427
428 #if(MHL_FUNCTION_SUPPORT_PORTB)
429 case MHL_CBUS_SELECT_PORTB:
430 if(GET_MHL_PATH_SUPPORT_PORTB())
431 {
432 W2BYTEMSK(REG_DVI_DTOP_DUAL_P1_27_L, 0, BIT(6)| BIT(1)); // [6]: align, [1]: MHL pack-pixel mode
433 W2BYTEMSK(REG_COMBO_PHY0_P1_73_L, MHL_HDMI_EQ_SETTING_VALUE, BMASK(4:0)); // B channel EQ
434 W2BYTEMSK(REG_COMBO_PHY0_P1_5B_L, BIT(13)| BMASK(3:0), BIT(13)| BMASK(3:0));
435 W2BYTEMSK(REG_HDCP_DUAL_P1_09_L, 0, BIT(0)); // PP mode + HDCP eanble
436 W2BYTEMSK(REG_COMBO_PHY0_P1_6F_L, 0, BIT(10)); // I-control PD overwrite write
437 W2BYTEMSK(REG_COMBO_PHY0_P1_45_L, (MHL_HDMI_LOCK_TIME_VALUE << 8), BMASK(14:8)); // Digital lock time value
438 W2BYTEMSK(REG_COMBO_PHY0_P1_11_L, 0, BMASK(12:0));
439 W2BYTEMSK(REG_COMBO_PHY0_P1_6E_L, BIT(8), BIT(8));
440
441 if(ucImpedanceValue != MHL_IMPEDANCE_VALUE)
442 {
443 W2BYTEMSK(REG_COMBO_PHY0_P1_59_L, 0, BIT(8));
444 W2BYTEMSK(REG_COMBO_PHY0_P1_6B_L, (MHL_IMPEDANCE_VALUE << 12), BMASK(15:12));
445 }
446 }
447
448 break;
449 #endif
450
451 #if(MHL_FUNCTION_SUPPORT_PORTC)
452 case MHL_CBUS_SELECT_PORTC:
453 if(GET_MHL_PATH_SUPPORT_PORTC())
454 {
455 W2BYTEMSK(REG_DVI_DTOP_DUAL_P2_27_L, 0, BIT(6)| BIT(1)); // [6]: align, [1]: MHL pack-pixel mode
456 W2BYTEMSK(REG_COMBO_PHY0_P2_73_L, MHL_HDMI_EQ_SETTING_VALUE, BMASK(4:0)); // B channel EQ
457 W2BYTEMSK(REG_COMBO_PHY0_P2_5B_L, BIT(13)| BMASK(3:0), BIT(13)| BMASK(3:0));
458 W2BYTEMSK(REG_HDCP_DUAL_P2_09_L, 0, BIT(0)); // PP mode + HDCP eanble
459 W2BYTEMSK(REG_COMBO_PHY0_P2_6F_L, 0, BIT(10)); // I-control PD overwrite write
460 W2BYTEMSK(REG_COMBO_PHY0_P2_45_L, (MHL_HDMI_LOCK_TIME_VALUE << 8), BMASK(14:8)); // Digital lock time value
461 W2BYTEMSK(REG_COMBO_PHY0_P2_11_L, 0, BMASK(12:0));
462 W2BYTEMSK(REG_COMBO_PHY0_P2_6E_L, BIT(8), BIT(8));
463
464 if(ucImpedanceValue != MHL_IMPEDANCE_VALUE)
465 {
466 W2BYTEMSK(REG_COMBO_PHY0_P2_59_L, 0, BIT(8));
467 W2BYTEMSK(REG_COMBO_PHY0_P2_6B_L, (MHL_IMPEDANCE_VALUE << 12), BMASK(15:12));
468 }
469 }
470
471 break;
472 #endif
473
474 #if(MHL_FUNCTION_SUPPORT_PORTD)
475 case MHL_CBUS_SELECT_PORTD:
476 if(GET_MHL_PATH_SUPPORT_PORTD())
477 {
478 W2BYTEMSK(REG_DVI_DTOP_DUAL_P3_27_L, 0, BIT(6)| BIT(1)); // [6]: align, [1]: MHL pack-pixel mode
479 W2BYTEMSK(REG_COMBO_PHY0_P3_73_L, MHL_HDMI_EQ_SETTING_VALUE, BMASK(4:0)); // B channel EQ
480 W2BYTEMSK(REG_COMBO_PHY0_P3_5B_L, BIT(13)| BMASK(3:0), BIT(13)| BMASK(3:0));
481 W2BYTEMSK(REG_HDCP_DUAL_P3_09_L, 0, BIT(0)); // PP mode + HDCP eanble
482 W2BYTEMSK(REG_COMBO_PHY0_P3_6F_L, 0, BIT(10)); // I-control PD overwrite write
483 W2BYTEMSK(REG_COMBO_PHY0_P3_45_L, (MHL_HDMI_LOCK_TIME_VALUE << 8), BMASK(14:8)); // Digital lock time value
484 W2BYTEMSK(REG_COMBO_PHY0_P3_11_L, 0, BMASK(12:0));
485 W2BYTEMSK(REG_COMBO_PHY0_P3_6E_L, BIT(8), BIT(8));
486
487 if(ucImpedanceValue != MHL_IMPEDANCE_VALUE)
488 {
489 W2BYTEMSK(REG_COMBO_PHY0_P3_59_L, 0, BIT(8));
490 W2BYTEMSK(REG_COMBO_PHY0_P3_6B_L, (MHL_IMPEDANCE_VALUE << 12), BMASK(15:12));
491 }
492 }
493
494 break;
495 #endif
496
497 default:
498
499 break;
500 };
501
502 _mhal_mhl_DviAutoEQSwitch(ucCbusSelect, TRUE);
503 }
504
505 //**************************************************************************
506 // [Function Name]:
507 // _mhal_mhl_Mhl24bitsModeSetting()
508 // [Description]
509 // MHL 24 bits mode setting
510 // [Arguments]:
511 //
512 // [Return]:
513 //
514 //**************************************************************************
_mhal_mhl_Mhl24bitsModeSetting(MS_U8 ucCbusSelect)515 void _mhal_mhl_Mhl24bitsModeSetting(MS_U8 ucCbusSelect)
516 {
517 switch(ucCbusSelect)
518 {
519 #if(MHL_FUNCTION_SUPPORT_PORTA)
520 case MHL_CBUS_SELECT_PORTA:
521 if(GET_MHL_PATH_SUPPORT_PORTA())
522 {
523 W2BYTEMSK(REG_DVI_DTOP_DUAL_P0_27_L, BIT(6), BIT(6)| BIT(1)); // [6]: align, [1]: MHL pack-pixel mode
524 W2BYTEMSK(REG_COMBO_PHY0_P0_73_L, MHL_EQ_20_SETTING_VALUE, BMASK(4:0)); // B channel EQ
525 W2BYTEMSK(REG_COMBO_PHY0_P0_5B_L, 0, BIT(13)| BMASK(3:0));
526 W2BYTEMSK(REG_HDCP_DUAL_P0_09_L, 0, BIT(0)); // PP mode + HDCP eanble
527 W2BYTEMSK(REG_COMBO_PHY0_P0_6F_L, BIT(10), BIT(10)); // I-control PD overwrite write
528 W2BYTEMSK(REG_COMBO_PHY0_P0_6C_L, (MHL_ICONTROL_PD_VALUE << 9), BMASK(13:9)); // I-control PD
529 W2BYTEMSK(REG_COMBO_PHY0_P0_45_L, (MHL_LOCK_TIME_VALUE << 8), BMASK(14:8)); // Digital lock time value
530 W2BYTEMSK(REG_COMBO_PHY0_P0_11_L, BIT(12) |0x30, BMASK(12:0));
531 W2BYTEMSK(REG_COMBO_PHY1_P0_10_L, 0, BMASK(1:0));
532
533 if(ucImpedanceValue != MHL_IMPEDANCE_VALUE)
534 {
535 W2BYTEMSK(REG_COMBO_PHY0_P0_59_L, BIT(8), BIT(8));
536 W2BYTEMSK(REG_COMBO_PHY0_P0_6B_L, (ucImpedanceValue << 12), BMASK(15:12));
537 }
538 }
539
540 break;
541 #endif
542
543 #if(MHL_FUNCTION_SUPPORT_PORTB)
544 case MHL_CBUS_SELECT_PORTB:
545 if(GET_MHL_PATH_SUPPORT_PORTB())
546 {
547 W2BYTEMSK(REG_DVI_DTOP_DUAL_P1_27_L, BIT(6), BIT(6)| BIT(1)); // [6]: align, [1]: MHL pack-pixel mode
548 W2BYTEMSK(REG_COMBO_PHY0_P1_73_L, MHL_EQ_20_SETTING_VALUE, BMASK(4:0)); // B channel EQ
549 W2BYTEMSK(REG_COMBO_PHY0_P1_5B_L, 0, BIT(13)| BMASK(3:0));
550 W2BYTEMSK(REG_HDCP_DUAL_P1_09_L, 0, BIT(0)); // PP mode + HDCP eanble
551 W2BYTEMSK(REG_COMBO_PHY0_P1_6F_L, BIT(10), BIT(10)); // I-control PD overwrite write
552 W2BYTEMSK(REG_COMBO_PHY0_P1_6C_L, (MHL_ICONTROL_PD_VALUE << 9), BMASK(13:9)); // I-control PD
553 W2BYTEMSK(REG_COMBO_PHY0_P1_45_L, (MHL_LOCK_TIME_VALUE << 8), BMASK(14:8)); // Digital lock time value
554 W2BYTEMSK(REG_COMBO_PHY0_P1_11_L, BIT(12) |0x30, BMASK(12:0));
555 W2BYTEMSK(REG_COMBO_PHY1_P1_10_L, 0, BMASK(1:0));
556
557 if(ucImpedanceValue != MHL_IMPEDANCE_VALUE)
558 {
559 W2BYTEMSK(REG_COMBO_PHY0_P1_59_L, BIT(8), BIT(8));
560 W2BYTEMSK(REG_COMBO_PHY0_P1_6B_L, (ucImpedanceValue << 12), BMASK(15:12));
561 }
562 }
563
564 break;
565 #endif
566
567 #if(MHL_FUNCTION_SUPPORT_PORTC)
568 case MHL_CBUS_SELECT_PORTC:
569 if(GET_MHL_PATH_SUPPORT_PORTC())
570 {
571 W2BYTEMSK(REG_DVI_DTOP_DUAL_P2_27_L, BIT(6), BIT(6)| BIT(1)); // [6]: align, [1]: MHL pack-pixel mode
572 W2BYTEMSK(REG_COMBO_PHY0_P2_73_L, MHL_EQ_20_SETTING_VALUE, BMASK(4:0)); // B channel EQ
573 W2BYTEMSK(REG_COMBO_PHY0_P2_5B_L, 0, BIT(13)| BMASK(3:0));
574 W2BYTEMSK(REG_HDCP_DUAL_P2_09_L, 0, BIT(0)); // PP mode + HDCP eanble
575 W2BYTEMSK(REG_COMBO_PHY0_P2_6F_L, BIT(10), BIT(10)); // I-control PD overwrite write
576 W2BYTEMSK(REG_COMBO_PHY0_P2_6C_L, (MHL_ICONTROL_PD_VALUE << 9), BMASK(13:9)); // I-control PD
577 W2BYTEMSK(REG_COMBO_PHY0_P2_45_L, (MHL_LOCK_TIME_VALUE << 8), BMASK(14:8)); // Digital lock time value
578 W2BYTEMSK(REG_COMBO_PHY0_P2_11_L, BIT(12) |0x30, BMASK(12:0));
579 W2BYTEMSK(REG_COMBO_PHY1_P2_10_L, 0, BMASK(1:0));
580
581 if(ucImpedanceValue != MHL_IMPEDANCE_VALUE)
582 {
583 W2BYTEMSK(REG_COMBO_PHY0_P2_59_L, BIT(8), BIT(8));
584 W2BYTEMSK(REG_COMBO_PHY0_P2_6B_L, (ucImpedanceValue << 12), BMASK(15:12));
585 }
586 }
587
588 break;
589 #endif
590
591 #if(MHL_FUNCTION_SUPPORT_PORTD)
592 case MHL_CBUS_SELECT_PORTD:
593 if(GET_MHL_PATH_SUPPORT_PORTD())
594 {
595 W2BYTEMSK(REG_DVI_DTOP_DUAL_P3_27_L, BIT(6), BIT(6)| BIT(1)); // [6]: align, [1]: MHL pack-pixel mode
596 W2BYTEMSK(REG_COMBO_PHY0_P3_73_L, MHL_EQ_20_SETTING_VALUE, BMASK(4:0)); // B channel EQ
597 W2BYTEMSK(REG_COMBO_PHY0_P3_5B_L, 0, BIT(13)| BMASK(3:0));
598 W2BYTEMSK(REG_HDCP_DUAL_P3_09_L, 0, BIT(0)); // PP mode + HDCP eanble
599 W2BYTEMSK(REG_COMBO_PHY0_P3_6F_L, BIT(10), BIT(10)); // I-control PD overwrite write
600 W2BYTEMSK(REG_COMBO_PHY0_P3_6C_L, (MHL_ICONTROL_PD_VALUE << 9), BMASK(13:9)); // I-control PD
601 W2BYTEMSK(REG_COMBO_PHY0_P3_45_L, (MHL_LOCK_TIME_VALUE << 8), BMASK(14:8)); // Digital lock time value
602 W2BYTEMSK(REG_COMBO_PHY0_P3_11_L, BIT(12) |0x30, BMASK(12:0));
603 W2BYTEMSK(REG_COMBO_PHY1_P3_10_L, 0, BMASK(1:0));
604
605 if(ucImpedanceValue != MHL_IMPEDANCE_VALUE)
606 {
607 W2BYTEMSK(REG_COMBO_PHY0_P3_59_L, BIT(8), BIT(8));
608 W2BYTEMSK(REG_COMBO_PHY0_P3_6B_L, (ucImpedanceValue << 12), BMASK(15:12));
609 }
610 }
611
612 break;
613 #endif
614
615 default:
616
617 break;
618 };
619
620 _mhal_mhl_DviAutoEQSwitch(ucCbusSelect, FALSE);
621 }
622
623 //**************************************************************************
624 // [Function Name]:
625 // _mhal_mhl_MhlPackedPixelModeSetting()
626 // [Description]
627 // MHL packed pixel mode setting
628 // [Arguments]:
629 //
630 // [Return]:
631 //
632 //**************************************************************************
_mhal_mhl_MhlPackedPixelModeSetting(MS_U8 ucCbusSelect)633 void _mhal_mhl_MhlPackedPixelModeSetting(MS_U8 ucCbusSelect)
634 {
635 switch(ucCbusSelect)
636 {
637 #if(MHL_FUNCTION_SUPPORT_PORTA)
638 case MHL_CBUS_SELECT_PORTA:
639 if(GET_MHL_PATH_SUPPORT_PORTA())
640 {
641 W2BYTEMSK(REG_DVI_DTOP_DUAL_P0_27_L, BIT(1), BIT(1)); // [1]: MHL pack-pixel mode
642 W2BYTEMSK(REG_HDCP_DUAL_P0_09_L, BIT(0), BIT(0)); // PP mode + HDCP eanble
643 }
644
645 break;
646 #endif
647
648 #if(MHL_FUNCTION_SUPPORT_PORTB)
649 case MHL_CBUS_SELECT_PORTB:
650 if(GET_MHL_PATH_SUPPORT_PORTB())
651 {
652 W2BYTEMSK(REG_DVI_DTOP_DUAL_P1_27_L, BIT(1), BIT(1)); // [1]: MHL pack-pixel mode
653 W2BYTEMSK(REG_HDCP_DUAL_P1_09_L, BIT(0), BIT(0)); // PP mode + HDCP eanble
654 }
655
656 break;
657 #endif
658
659 #if(MHL_FUNCTION_SUPPORT_PORTC)
660 case MHL_CBUS_SELECT_PORTC:
661 if(GET_MHL_PATH_SUPPORT_PORTC())
662 {
663 W2BYTEMSK(REG_DVI_DTOP_DUAL_P2_27_L, BIT(1), BIT(1)); // [1]: MHL pack-pixel mode
664 W2BYTEMSK(REG_HDCP_DUAL_P2_09_L, BIT(0), BIT(0)); // PP mode + HDCP eanble
665 }
666
667 break;
668 #endif
669
670 #if(MHL_FUNCTION_SUPPORT_PORTD)
671 case MHL_CBUS_SELECT_PORTD:
672 if(GET_MHL_PATH_SUPPORT_PORTD())
673 {
674 W2BYTEMSK(REG_DVI_DTOP_DUAL_P3_27_L, BIT(1), BIT(1)); // [1]: MHL pack-pixel mode
675 W2BYTEMSK(REG_HDCP_DUAL_P3_09_L, BIT(0), BIT(0)); // PP mode + HDCP eanble
676 }
677
678 break;
679 #endif
680
681 default:
682
683 break;
684 };
685 }
686
687 //**************************************************************************
688 // [Function Name]:
689 // _mhal_mhl_RxRtermControl()
690 // [Description]
691 // MHL TMDS termination resistor control
692 // [Arguments]:
693 //
694 // [Return]:
695 //
696 //**************************************************************************
_mhal_mhl_RxRtermControl(MS_U8 ucCbusSelect,RXRtermControl_T rctrl)697 void _mhal_mhl_RxRtermControl(MS_U8 ucCbusSelect, RXRtermControl_T rctrl)
698 {
699 switch(ucCbusSelect)
700 {
701 #if(MHL_FUNCTION_SUPPORT_PORTA)
702 case MHL_CBUS_SELECT_PORTA:
703 if(GET_MHL_PATH_SUPPORT_PORTA())
704 {
705 if (rctrl == RX_HDMI_RTERM)
706 {
707 W2BYTEMSK(REG_PM_SLEEP_4C_L, 0, BMASK(3:1));// data R-term
708 W2BYTEMSK(REG_PM_SLEEP_4C_L, 0, BIT(0));// clock R-term
709 }
710 else if (rctrl == RX_MHL_RTERM)
711 {
712 W2BYTEMSK(REG_PM_SLEEP_4C_L, BIT(2), BMASK(3:1));// data R-term
713 W2BYTEMSK(REG_PM_SLEEP_4C_L, 0, BIT(0));// clock R-term
714 }
715 else if (rctrl == RX_RTERM_OFF)
716 {
717 W2BYTEMSK(REG_PM_SLEEP_4C_L, BMASK(3:1), BMASK(3:1));// data R-term
718 W2BYTEMSK(REG_PM_SLEEP_4C_L, BIT(0), BIT(0));// clock R-term
719 }
720 }
721
722 break;
723 #endif
724
725 #if(MHL_FUNCTION_SUPPORT_PORTB)
726 case MHL_CBUS_SELECT_PORTB:
727 if(GET_MHL_PATH_SUPPORT_PORTB())
728 {
729 if (rctrl == RX_HDMI_RTERM)
730 {
731 W2BYTEMSK(REG_PM_SLEEP_4C_L, 0, BMASK(7:5));// data R-term
732 W2BYTEMSK(REG_PM_SLEEP_4C_L, 0, BIT(4));// clock R-term
733 }
734 else if (rctrl == RX_MHL_RTERM)
735 {
736 W2BYTEMSK(REG_PM_SLEEP_4C_L, BIT(6), BMASK(7:5));// data R-term
737 W2BYTEMSK(REG_PM_SLEEP_4C_L, 0, BIT(4));// clock R-term
738 }
739 else if (rctrl == RX_RTERM_OFF)
740 {
741 W2BYTEMSK(REG_PM_SLEEP_4C_L, BMASK(7:5), BMASK(7:5));// data R-term
742 W2BYTEMSK(REG_PM_SLEEP_4C_L, BIT(4), BIT(4));// clock R-term
743 }
744 }
745
746 break;
747 #endif
748
749 #if(MHL_FUNCTION_SUPPORT_PORTC)
750 case MHL_CBUS_SELECT_PORTC:
751 if(GET_MHL_PATH_SUPPORT_PORTC())
752 {
753 if (rctrl == RX_HDMI_RTERM)
754 {
755 W2BYTEMSK(REG_PM_SLEEP_4C_L, 0, BMASK(11:9));// data R-term
756 W2BYTEMSK(REG_PM_SLEEP_4C_L, 0, BIT(8));// clock R-term
757 }
758 else if (rctrl == RX_MHL_RTERM)
759 {
760 W2BYTEMSK(REG_PM_SLEEP_4C_L, BIT(10), BMASK(11:9));// data R-term
761 W2BYTEMSK(REG_PM_SLEEP_4C_L, 0, BIT(8));// clock R-term
762 }
763 else if (rctrl == RX_RTERM_OFF)
764 {
765 W2BYTEMSK(REG_PM_SLEEP_4C_L, BMASK(11:9), BMASK(11:9));// data R-term
766 W2BYTEMSK(REG_PM_SLEEP_4C_L, BIT(8), BIT(8));// clock R-term
767 }
768 }
769
770 break;
771 #endif
772
773 #if(MHL_FUNCTION_SUPPORT_PORTD)
774 case MHL_CBUS_SELECT_PORTD:
775 if(GET_MHL_PATH_SUPPORT_PORTD())
776 {
777 if (rctrl == RX_HDMI_RTERM)
778 {
779 W2BYTEMSK(REG_PM_SLEEP_4C_L, 0, BMASK(15:13));// data R-term
780 W2BYTEMSK(REG_PM_SLEEP_4C_L, 0, BIT(12));// clock R-term
781 }
782 else if (rctrl == RX_MHL_RTERM)
783 {
784 W2BYTEMSK(REG_PM_SLEEP_4C_L, BIT(14), BMASK(15:13));// data R-term
785 W2BYTEMSK(REG_PM_SLEEP_4C_L, 0, BIT(12));// clock R-term
786 }
787 else if (rctrl == RX_RTERM_OFF)
788 {
789 W2BYTEMSK(REG_PM_SLEEP_4C_L, BMASK(15:13), BMASK(15:13));// data R-term
790 W2BYTEMSK(REG_PM_SLEEP_4C_L, BIT(12), BIT(12));// clock R-term
791 }
792 }
793
794 break;
795 #endif
796
797 default:
798
799 break;
800 };
801 }
802
803 //**************************************************************************
804 // [Function Name]:
805 // _mhal_mhl_CbusForceToStandby()
806 // [Description]
807 //
808 // [Arguments]:
809 //
810 // [Return]:
811 //
812 //**************************************************************************
_mhal_mhl_CbusForceToStandby(void)813 void _mhal_mhl_CbusForceToStandby(void)
814 {
815 W2BYTEMSK(REG_MHL_CBUS_3A, BIT(4), BIT(4)); // clear received FIFO
816 W2BYTEMSK(REG_PM_MHL_CBUS_17, BIT(15), BIT(15)); // force enter PM mode
817 }
818
819 //**************************************************************************
820 // [Function Name]:
821 // _mhal_mhl_MHLForceToAttach()
822 // [Description]:
823 //
824 // [Arguments]:
825 //
826 // [Return]:
827 //
828 //**************************************************************************
_mhal_mhl_MHLForceToAttach(void)829 void _mhal_mhl_MHLForceToAttach(void)
830 {
831 W2BYTEMSK(REG_PM_MHL_CBUS_17, BIT(14), BIT(14));
832 }
833
834 #if(DMHL_LG_PRADA_PATCH)
835 //**************************************************************************
836 // [Function Name]:
837 // _mhal_mhl_AdjustCommonModeResistor()
838 // [Description]:
839 //
840 // [Arguments]:
841 //
842 // [Return]:
843 //
844 //**************************************************************************
_mhal_mhl_AdjustCommonModeResistor(MS_U8 ucCbusSelect,MS_BOOL bflag)845 void _mhal_mhl_AdjustCommonModeResistor(MS_U8 ucCbusSelect, MS_BOOL bflag)
846 {
847 switch(ucCbusSelect)
848 {
849 #if(MHL_FUNCTION_SUPPORT_PORTA)
850 case MHL_CBUS_SELECT_PORTA:
851 if(GET_MHL_PATH_SUPPORT_PORTA())
852 {
853 W2BYTEMSK(REG_DVI_DTOP_DUAL_P0_27_L, bflag ? 0 : BIT(0), BIT(0)); // [0]: MHL mac enable
854 }
855
856 break;
857 #endif
858
859 #if(MHL_FUNCTION_SUPPORT_PORTB)
860 case MHL_CBUS_SELECT_PORTB:
861 if(GET_MHL_PATH_SUPPORT_PORTB())
862 {
863 W2BYTEMSK(REG_DVI_DTOP_DUAL_P1_27_L, bflag ? 0 : BIT(0), BIT(0)); // [0]: MHL mac enable
864 }
865
866 break;
867 #endif
868
869 #if(MHL_FUNCTION_SUPPORT_PORTC)
870 case MHL_CBUS_SELECT_PORTC:
871 if(GET_MHL_PATH_SUPPORT_PORTC())
872 {
873 W2BYTEMSK(REG_DVI_DTOP_DUAL_P2_27_L, bflag ? 0 : BIT(0), BIT(0)); // [0]: MHL mac enable
874 }
875
876 break;
877 #endif
878
879 #if(MHL_FUNCTION_SUPPORT_PORTD)
880 case MHL_CBUS_SELECT_PORTD:
881 if(GET_MHL_PATH_SUPPORT_PORTD())
882 {
883 W2BYTEMSK(REG_DVI_DTOP_DUAL_P3_27_L, bflag ? 0 : BIT(0), BIT(0)); // [0]: MHL mac enable
884 }
885
886 break;
887 #endif
888
889 default:
890
891 break;
892 };
893 }
894
895 #endif
896
897 //**************************************************************************
898 // [Function Name]:
899 // _mhal_mhl_ClockBigChangeFlag()
900 // [Description]:
901 //
902 // [Arguments]:
903 //
904 // [Return]:
905 //
906 //**************************************************************************
_mhal_mhl_ClockBigChangeFlag(MS_U8 ucCbusSelect)907 MS_BOOL _mhal_mhl_ClockBigChangeFlag(MS_U8 ucCbusSelect)
908 {
909 MS_BOOL bindex = FALSE;
910
911 switch(ucCbusSelect)
912 {
913 #if(MHL_FUNCTION_SUPPORT_PORTA)
914 case MHL_CBUS_SELECT_PORTA:
915 if(GET_MHL_PATH_SUPPORT_PORTA())
916 {
917 //bindex = ((R2BYTE(REG_DVI_ATOP_70_L) &BIT(0)) ?TRUE: FALSE);
918
919 if(bindex)
920 {
921 //W2BYTEMSK(REG_DVI_ATOP_71_L, BIT(8), BIT(8));
922 //W2BYTEMSK(REG_DVI_ATOP_71_L, 0, BIT(8));
923 }
924 }
925
926 break;
927 #endif
928
929 #if(MHL_FUNCTION_SUPPORT_PORTB)
930 case MHL_CBUS_SELECT_PORTB:
931 if(GET_MHL_PATH_SUPPORT_PORTB())
932 {
933 //bindex = ((R2BYTE(REG_DVI_ATOP1_70_L) &BIT(0)) ?TRUE: FALSE);
934
935 if(bindex)
936 {
937 //W2BYTEMSK(REG_DVI_ATOP1_71_L, BIT(8), BIT(8));
938 //W2BYTEMSK(REG_DVI_ATOP1_71_L, 0, BIT(8));
939 }
940 }
941
942 break;
943 #endif
944
945 #if(MHL_FUNCTION_SUPPORT_PORTC)
946 case MHL_CBUS_SELECT_PORTC:
947 if(GET_MHL_PATH_SUPPORT_PORTC())
948 {
949 //bindex = ((R2BYTE(REG_DVI_ATOP3_70_L) &BIT(0)) ?TRUE: FALSE);
950
951 if(bindex)
952 {
953 //W2BYTEMSK(REG_DVI_ATOP3_71_L, BIT(8), BIT(8));
954 //W2BYTEMSK(REG_DVI_ATOP3_71_L, 0, BIT(8));
955 }
956 }
957
958 break;
959 #endif
960
961 #if(MHL_FUNCTION_SUPPORT_PORTD)
962 case MHL_CBUS_SELECT_PORTD:
963 if(GET_MHL_PATH_SUPPORT_PORTD())
964 {
965 //bindex = ((R2BYTE(REG_DVI_ATOP2_70_L) &BIT(0)) ?TRUE: FALSE);
966
967 if(bindex)
968 {
969 //W2BYTEMSK(REG_DVI_ATOP2_71_L, BIT(8), BIT(8));
970 //W2BYTEMSK(REG_DVI_ATOP2_71_L, 0, BIT(8));
971 }
972 }
973
974 break;
975 #endif
976
977 default:
978
979 break;
980 };
981
982 return bindex;
983 }
984
985 //**************************************************************************
986 // [Function Name]:
987 // _mhal_mhl_CheckClockStatus()
988 // [Description]:
989 //
990 // [Arguments]:
991 //
992 // [Return]:
993 //
994 //**************************************************************************
_mhal_mhl_CheckClockStatus(MS_U8 ucCbusSelect)995 MS_U8 _mhal_mhl_CheckClockStatus(MS_U8 ucCbusSelect)
996 {
997 MS_BOOL bStable = FALSE;
998 MS_U16 usClkCount = 0;
999
1000 switch(ucCbusSelect)
1001 {
1002 #if(MHL_FUNCTION_SUPPORT_PORTA)
1003 case MHL_CBUS_SELECT_PORTA:
1004 if(GET_MHL_PATH_SUPPORT_PORTA())
1005 {
1006 usClkCount = R2BYTE(REG_COMBO_PHY0_P0_3C_L) & 0x0FFF;
1007
1008 if((R2BYTE(REG_COMBO_PHY0_P0_41_L) &BIT(9)) == BIT(9))
1009 {
1010 bStable = TRUE;
1011
1012 if((usClkCount < CBUS_CLOCK_DETECT_LEVEL) || _mhal_mhl_ClockBigChangeFlag(ucCbusSelect))
1013 {
1014 bStable = FALSE;
1015 }
1016 }
1017 }
1018
1019 break;
1020 #endif
1021
1022 #if(MHL_FUNCTION_SUPPORT_PORTB)
1023 case MHL_CBUS_SELECT_PORTB:
1024 if(GET_MHL_PATH_SUPPORT_PORTB())
1025 {
1026 usClkCount = R2BYTE(REG_COMBO_PHY0_P1_3C_L) & 0x0FFF;
1027
1028 if((R2BYTE(REG_COMBO_PHY0_P1_41_L) &BIT(9)) == BIT(9))
1029 {
1030 bStable = TRUE;
1031
1032 if((usClkCount < CBUS_CLOCK_DETECT_LEVEL) || _mhal_mhl_ClockBigChangeFlag(ucCbusSelect))
1033 {
1034 bStable = FALSE;
1035 }
1036 }
1037 }
1038
1039 break;
1040 #endif
1041
1042 #if(MHL_FUNCTION_SUPPORT_PORTC)
1043 case MHL_CBUS_SELECT_PORTC:
1044 if(GET_MHL_PATH_SUPPORT_PORTC())
1045 {
1046 usClkCount = R2BYTE(REG_COMBO_PHY0_P2_3C_L) & 0x0FFF;
1047
1048 if((R2BYTE(REG_COMBO_PHY0_P2_41_L) &BIT(9)) == BIT(9))
1049 {
1050 bStable = TRUE;
1051
1052 if((usClkCount < CBUS_CLOCK_DETECT_LEVEL) || _mhal_mhl_ClockBigChangeFlag(ucCbusSelect))
1053 {
1054 bStable = FALSE;
1055 }
1056 }
1057 }
1058
1059 break;
1060 #endif
1061
1062 #if(MHL_FUNCTION_SUPPORT_PORTD)
1063 case MHL_CBUS_SELECT_PORTD:
1064 if(GET_MHL_PATH_SUPPORT_PORTD())
1065 {
1066 usClkCount = R2BYTE(REG_COMBO_PHY0_P3_3C_L) & 0x0FFF;
1067
1068 if((R2BYTE(REG_COMBO_PHY0_P3_41_L) &BIT(9)) == BIT(9))
1069 {
1070 bStable = TRUE;
1071
1072 if((usClkCount < CBUS_CLOCK_DETECT_LEVEL) || _mhal_mhl_ClockBigChangeFlag(ucCbusSelect))
1073 {
1074 bStable = FALSE;
1075 }
1076 }
1077 }
1078
1079 break;
1080 #endif
1081
1082 default:
1083
1084 break;
1085 };
1086
1087 return bStable;
1088 }
1089
1090 //**************************************************************************
1091 // [Function Name]:
1092 // _mhal_mhl_RtermHWControl()
1093 // [Description]
1094 //
1095 // [Arguments]:
1096 //
1097 // [Return]:
1098 //
1099 //**************************************************************************
_mhal_mhl_RtermHWControl(MS_U8 ucCbusSelect,MS_BOOL bFlag)1100 void _mhal_mhl_RtermHWControl(MS_U8 ucCbusSelect, MS_BOOL bFlag)
1101 {
1102 switch(ucCbusSelect)
1103 {
1104 #if(MHL_FUNCTION_SUPPORT_PORTA)
1105 case MHL_CBUS_SELECT_PORTA:
1106 if(GET_MHL_PATH_SUPPORT_PORTA())
1107 {
1108 W2BYTEMSK(REG_PM_SLEEP_4A_L, bFlag? BIT(8): 0, BIT(8));
1109 }
1110
1111 break;
1112 #endif
1113
1114 #if(MHL_FUNCTION_SUPPORT_PORTB)
1115 case MHL_CBUS_SELECT_PORTB:
1116 if(GET_MHL_PATH_SUPPORT_PORTB())
1117 {
1118 W2BYTEMSK(REG_PM_SLEEP_4A_L, bFlag? BIT(9): 0, BIT(9));
1119 }
1120
1121 break;
1122 #endif
1123
1124 #if(MHL_FUNCTION_SUPPORT_PORTC)
1125 case MHL_CBUS_SELECT_PORTC:
1126 if(GET_MHL_PATH_SUPPORT_PORTC())
1127 {
1128 W2BYTEMSK(REG_PM_SLEEP_4A_L, bFlag? BIT(10): 0, BIT(10));
1129 }
1130
1131 break;
1132 #endif
1133
1134 #if(MHL_FUNCTION_SUPPORT_PORTD)
1135 case MHL_CBUS_SELECT_PORTD:
1136 if(GET_MHL_PATH_SUPPORT_PORTD())
1137 {
1138 W2BYTEMSK(REG_PM_SLEEP_4A_L, bFlag? BIT(11): 0, BIT(11));
1139 }
1140
1141 break;
1142 #endif
1143
1144 default:
1145
1146 break;
1147 };
1148 }
1149
1150 //**************************************************************************
1151 // [Function Name]:
1152 // _mhal_mhl_ChangeScalerMainMux()
1153 // [Description]
1154 //
1155 // [Arguments]:
1156 //
1157 // [Return]:
1158 //
1159 //**************************************************************************
_mhal_mhl_ChangeScalerMainMux(MS_BOOL bFlag)1160 void _mhal_mhl_ChangeScalerMainMux(MS_BOOL bFlag)
1161 {
1162 MS_U8 ucScalerMainMux = (R2BYTE(0x102E02) &BMASK(7:4)) >> 4;
1163
1164 if(bFlag)
1165 {
1166 if(ucScalerMainMux == MHL_SCALER_MUX_SELECT_DVI)
1167 {
1168 W2BYTEMSK(0x102E02, (MHL_SCALER_MUX_SELECT_MHL << 4), BMASK(7:4));
1169 }
1170 }
1171 else
1172 {
1173 if(ucScalerMainMux == MHL_SCALER_MUX_SELECT_MHL)
1174 {
1175 W2BYTEMSK(0x102E02, (MHL_SCALER_MUX_SELECT_DVI << 4), BMASK(7:4));
1176 }
1177 }
1178 }
1179
1180 //**************************************************************************
1181 // [Function Name]:
1182 // _mhal_mhl_AudioPathSelect()
1183 // [Description]
1184 //
1185 // [Arguments]:
1186 //
1187 // [Return]:
1188 //
1189 //**************************************************************************
_mhal_mhl_AudioPathSelect(MS_BOOL bMHLPath)1190 void _mhal_mhl_AudioPathSelect(MS_BOOL bMHLPath)
1191 {
1192 //W2BYTEMSK(REG_HDMI2_08_L, bMHLPath ?BIT(0) :0, BIT(0)); // [0]: audio source selection, 0: HDMI / 1: MHL
1193 }
1194
1195 //**************************************************************************
1196 // [Function Name]:
1197 // _mhal_mhl_CbusAndClockSelect()
1198 // [Description]
1199 //
1200 // [Arguments]:
1201 //
1202 // [Return]:
1203 //
1204 //**************************************************************************
_mhal_mhl_CbusAndClockSelect(void)1205 void _mhal_mhl_CbusAndClockSelect(void)
1206 {
1207 MS_U8 ucClockSelect = MHL_DVI_PORT_A;
1208
1209 if(GET_MHL_PATH_SUPPORT_PORTA())
1210 {
1211 W2BYTEMSK(REG_PM_MHL_CBUS_21, 0, BIT(11));
1212 ucClockSelect = MHL_DVI_PORT_A;
1213 }
1214 else if(GET_MHL_PATH_SUPPORT_PORTB())
1215 {
1216 ucClockSelect = MHL_DVI_PORT_B;
1217 }
1218 else if(GET_MHL_PATH_SUPPORT_PORTC())
1219 {
1220 ucClockSelect = MHL_DVI_PORT_C;
1221 }
1222 else if(GET_MHL_PATH_SUPPORT_PORTD())
1223 {
1224 ucClockSelect = MHL_DVI_PORT_D;
1225 }
1226
1227 W2BYTEMSK(REG_COMBO_GP_TOP_33_L, ucClockSelect, BMASK(2:0)); // [2:0]: mhl port select
1228 }
1229
1230 //**************************************************************************
1231 // [Function Name]:
1232 // _mhal_mhl_ForcePullDown100K()
1233 // [Description]
1234 //
1235 // [Arguments]:
1236 //
1237 // [Return]:
1238 //
1239 //**************************************************************************
_mhal_mhl_ForcePullDown100K(MS_BOOL bEnable)1240 void _mhal_mhl_ForcePullDown100K(MS_BOOL bEnable)
1241 {
1242 W2BYTEMSK(REG_PM_MHL_CBUS_20, bEnable? BIT(7): 0, BIT(7));
1243 }
1244
1245 //**************************************************************************
1246 // [Function Name]:
1247 // _mhal_mhl_GetEMSCOneByteCRC()
1248 // [Description]
1249 //
1250 // [Arguments]:
1251 //
1252 // [Return]:
1253 //
1254 //**************************************************************************
_mhal_mhl_GetEMSCOneByteCRC(MS_U8 ucOpCode)1255 MS_U8 _mhal_mhl_GetEMSCOneByteCRC(MS_U8 ucOpCode)
1256 {
1257 MS_U8 ucAValue = 0;
1258 MS_U8 ucBValue = 0;
1259 MS_U8 ucCommand = BIT(7) |BIT(6) |((ucOpCode &BMASK(2:0)) << 2);
1260
1261 ucAValue = GET_BIT(ucCommand &BIT(7)) +GET_BIT(ucCommand &BIT(5)) +GET_BIT(ucCommand &BIT(3)) +2;
1262 ucBValue = GET_BIT(ucCommand &BIT(6)) +GET_BIT(ucCommand &BIT(4)) +GET_BIT(ucCommand &BIT(2)) +2;
1263
1264 if(ucAValue &BIT(0))
1265 {
1266 ucCommand |= BIT(1);
1267 }
1268
1269 if(ucBValue &BIT(0))
1270 {
1271 ucCommand |= BIT(0);
1272 }
1273
1274 return ucCommand;
1275 }
1276
1277 //**************************************************************************
1278 // [Function Name]:
1279 // _mhal_mhl_GetEMSCTwoByteCRC()
1280 // [Description]
1281 //
1282 // [Arguments]:
1283 //
1284 // [Return]:
1285 //
1286 //**************************************************************************
_mhal_mhl_GetEMSCTwoByteCRC(MS_U8 ucOpCode,MS_U8 ucValue)1287 MS_U8 _mhal_mhl_GetEMSCTwoByteCRC(MS_U8 ucOpCode, MS_U8 ucValue)
1288 {
1289 MS_U8 ucAValue = 0;
1290 MS_U8 ucBValue = 0;
1291 MS_U8 ucCValue = 0;
1292 MS_U16 ucCommand = BIT(13) |(((MS_U16)ucOpCode &BMASK(1:0)) << 11) |(((MS_U16)ucValue &BMASK(7:0)) << 3);
1293
1294 ucAValue = GET_BIT(ucCommand &BIT(15)) +GET_BIT(ucCommand &BIT(13)) +GET_BIT(ucCommand &BIT(12)) +GET_BIT(ucCommand &BIT(11)) +GET_BIT(ucCommand &BIT(8));
1295 ucAValue = ucAValue +GET_BIT(ucCommand &BIT(6)) +GET_BIT(ucCommand &BIT(5)) +GET_BIT(ucCommand &BIT(4)) +3;
1296 ucBValue = GET_BIT(ucCommand &BIT(15)) +GET_BIT(ucCommand &BIT(14)) +GET_BIT(ucCommand &BIT(13)) +GET_BIT(ucCommand &BIT(10)) +GET_BIT(ucCommand &BIT(8));
1297 ucBValue = ucBValue +GET_BIT(ucCommand &BIT(7)) +GET_BIT(ucCommand &BIT(6)) +GET_BIT(ucCommand &BIT(3)) +2;
1298 ucCValue = GET_BIT(ucCommand &BIT(14)) +GET_BIT(ucCommand &BIT(13)) +GET_BIT(ucCommand &BIT(12)) +GET_BIT(ucCommand &BIT(9)) +GET_BIT(ucCommand &BIT(7));
1299 ucCValue = ucCValue +GET_BIT(ucCommand &BIT(6)) +GET_BIT(ucCommand &BIT(5)) +2;
1300
1301 if(ucAValue &BIT(0))
1302 {
1303 ucCommand |= BIT(2);
1304 }
1305
1306 if(ucBValue &BIT(0))
1307 {
1308 ucCommand |= BIT(1);
1309 }
1310
1311 if(ucCValue &BIT(0))
1312 {
1313 ucCommand |= BIT(0);
1314 }
1315
1316 return (ucCommand &BMASK(7:0));
1317 }
1318
1319 //**************************************************************************
1320 // [Function Name]:
1321 // _mhal_mhl_GetEMSCPayloadCRC()
1322 // [Description]
1323 //
1324 // [Arguments]:
1325 //
1326 // [Return]:
1327 //
1328 //**************************************************************************
_mhal_mhl_GetEMSCPayloadCRC(MS_U8 ucOpCode,MS_U16 usCRCValus)1329 MS_U16 _mhal_mhl_GetEMSCPayloadCRC(MS_U8 ucOpCode, MS_U16 usCRCValus)
1330 {
1331 MS_U8 ucAValue = 0;
1332 MS_U8 ucBValue = 0;
1333 MS_U8 ucCValue = GET_BIT(ucOpCode &BIT(7)) +GET_BIT(ucOpCode &BIT(6)) +GET_BIT(usCRCValus &BIT(6)) +GET_BIT(usCRCValus &BIT(7));
1334 MS_U8 ucDValue = GET_BIT(ucOpCode &BIT(6)) +GET_BIT(ucOpCode &BIT(5)) +GET_BIT(usCRCValus &BIT(5)) +GET_BIT(usCRCValus &BIT(6));
1335 MS_U8 ucEValue = GET_BIT(ucOpCode &BIT(5)) +GET_BIT(ucOpCode &BIT(4)) +GET_BIT(usCRCValus &BIT(4)) +GET_BIT(usCRCValus &BIT(5));
1336 MS_U8 ucFValue = GET_BIT(ucOpCode &BIT(4)) +GET_BIT(ucOpCode &BIT(3)) +GET_BIT(usCRCValus &BIT(3)) +GET_BIT(usCRCValus &BIT(4));
1337 MS_U8 ucGValue = GET_BIT(ucOpCode &BIT(3)) +GET_BIT(ucOpCode &BIT(2)) +GET_BIT(usCRCValus &BIT(2)) +GET_BIT(usCRCValus &BIT(3));
1338 MS_U8 ucHValue = GET_BIT(ucOpCode &BIT(2)) +GET_BIT(ucOpCode &BIT(1)) +GET_BIT(usCRCValus &BIT(1)) +GET_BIT(usCRCValus &BIT(2));
1339 MS_U8 ucIValue = GET_BIT(ucOpCode &BIT(1)) +GET_BIT(ucOpCode &BIT(0)) +GET_BIT(usCRCValus &BIT(0)) +GET_BIT(usCRCValus &BIT(1)) +GET_BIT(usCRCValus &BIT(15));
1340 MS_U8 ucJValue = GET_BIT(ucOpCode &BIT(0)) +GET_BIT(usCRCValus &BIT(0)) +GET_BIT(usCRCValus &BIT(14));
1341 MS_U8 ucKValue = GET_BIT(usCRCValus &BIT(13));
1342 MS_U8 ucLValue = GET_BIT(usCRCValus &BIT(12));
1343 MS_U8 ucMValue = GET_BIT(usCRCValus &BIT(11));
1344 MS_U8 ucNValue = GET_BIT(usCRCValus &BIT(10));
1345 MS_U8 ucOValue = GET_BIT(usCRCValus &BIT(9));
1346 MS_U8 ucPValue = 0;
1347 MS_U16 usCommand = 0;
1348
1349 ucAValue = GET_BIT(ucOpCode &BIT(7)) +GET_BIT(ucOpCode &BIT(6)) +GET_BIT(ucOpCode &BIT(5)) +GET_BIT(ucOpCode &BIT(4)) +GET_BIT(ucOpCode &BIT(3)) +GET_BIT(ucOpCode &BIT(2)) +GET_BIT(ucOpCode &BIT(1)) +GET_BIT(ucOpCode &BIT(0));
1350 ucAValue = ucAValue +GET_BIT(usCRCValus &BIT(0)) +GET_BIT(usCRCValus &BIT(1)) +GET_BIT(usCRCValus &BIT(2)) +GET_BIT(usCRCValus &BIT(3)) +GET_BIT(usCRCValus &BIT(4)) +GET_BIT(usCRCValus &BIT(5)) +GET_BIT(usCRCValus &BIT(6)) +GET_BIT(usCRCValus &BIT(7));
1351 ucBValue = GET_BIT(ucOpCode &BIT(6)) +GET_BIT(ucOpCode &BIT(5)) +GET_BIT(ucOpCode &BIT(4)) +GET_BIT(ucOpCode &BIT(3)) +GET_BIT(ucOpCode &BIT(2)) +GET_BIT(ucOpCode &BIT(1)) +GET_BIT(ucOpCode &BIT(0));
1352 ucBValue = ucBValue +GET_BIT(usCRCValus &BIT(0)) +GET_BIT(usCRCValus &BIT(1)) +GET_BIT(usCRCValus &BIT(2)) +GET_BIT(usCRCValus &BIT(3)) +GET_BIT(usCRCValus &BIT(4)) +GET_BIT(usCRCValus &BIT(5)) +GET_BIT(usCRCValus &BIT(6));
1353 ucPValue = ucAValue +GET_BIT(usCRCValus &BIT(8));
1354
1355 if(ucAValue &BIT(0))
1356 {
1357 usCommand |= BIT(15);
1358 }
1359
1360 if(ucBValue &BIT(0))
1361 {
1362 usCommand |= BIT(14);
1363 }
1364
1365 if(ucCValue &BIT(0))
1366 {
1367 usCommand |= BIT(13);
1368 }
1369
1370 if(ucDValue &BIT(0))
1371 {
1372 usCommand |= BIT(12);
1373 }
1374
1375 if(ucEValue &BIT(0))
1376 {
1377 usCommand |= BIT(11);
1378 }
1379
1380 if(ucFValue &BIT(0))
1381 {
1382 usCommand |= BIT(10);
1383 }
1384
1385 if(ucGValue &BIT(0))
1386 {
1387 usCommand |= BIT(9);
1388 }
1389
1390 if(ucHValue &BIT(0))
1391 {
1392 usCommand |= BIT(8);
1393 }
1394
1395 if(ucIValue &BIT(0))
1396 {
1397 usCommand |= BIT(7);
1398 }
1399
1400 if(ucJValue &BIT(0))
1401 {
1402 usCommand |= BIT(6);
1403 }
1404
1405 if(ucKValue &BIT(0))
1406 {
1407 usCommand |= BIT(5);
1408 }
1409
1410 if(ucLValue &BIT(0))
1411 {
1412 usCommand |= BIT(4);
1413 }
1414
1415 if(ucMValue &BIT(0))
1416 {
1417 usCommand |= BIT(3);
1418 }
1419
1420 if(ucNValue &BIT(0))
1421 {
1422 usCommand |= BIT(2);
1423 }
1424
1425 if(ucOValue &BIT(0))
1426 {
1427 usCommand |= BIT(1);
1428 }
1429
1430 if(ucPValue &BIT(0))
1431 {
1432 usCommand |= BIT(0);
1433 }
1434
1435 return usCommand;
1436 }
1437
1438 //**************************************************************************
1439 // [Function Name]:
1440 // _mhal_mhl_ECbusInitialSetting()
1441 // [Description]
1442 //
1443 // [Arguments]:
1444 //
1445 // [Return]:
1446 //
1447 //**************************************************************************
_mhal_mhl_ECbusInitialSetting(void)1448 void _mhal_mhl_ECbusInitialSetting(void)
1449 {
1450 W2BYTEMSK(REG_MHL_ECBUS_PHY_69, 0x35, BMASK(6:4)| BMASK(2:0)); // [6:4]: rasing pattern type, [2:0]: deglitch after reorder
1451
1452 W2BYTEMSK(REG_MHL_ECBUS_PHY_4C, 0x8880, BMASK(15:4));
1453 W2BYTEMSK(REG_MHL_ECBUS_PHY_4D, 0x8B14, BMASK(15:1));
1454 W2BYTEMSK(REG_MHL_ECBUS_PHY_4E, 0x001C, BMASK(15:0));
1455 W2BYTEMSK(REG_MHL_ECBUS_PHY_51, 0x0100, BMASK(15:0));
1456 W2BYTEMSK(REG_MHL_ECBUS_PHY_56, 0x0200, BMASK(15:0));
1457 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, BMASK(14:13), BMASK(14:13)); // [14:13]
1458 W2BYTEMSK(REG_MHL_ECBUS_PHY_4B, BMASK(14:13), BMASK(14:13));
1459 W2BYTEMSK(REG_MHL_ECBUS_PHY_55, 0, BMASK(15:4)); //[7:0]
1460 W2BYTEMSK(REG_MHL_ECBUS_PHY_4F, 0x00F0, BMASK(15:0)); // [7:4]:reg_ecbss_afe_tx_dri_step
1461 W2BYTEMSK(REG_MHL_ECBUS_PHY_78, BIT(0), BIT(0));
1462
1463 W2BYTEMSK(REG_MHL_ECBUS_0E, 8, BMASK(4:0));
1464 W2BYTEMSK(REG_MHL_ECBUS_2D, BIT(3), BIT(3));
1465
1466 //auto reset turn on
1467 W2BYTEMSK(REG_MHL_ECBUS_PHY_7F, BIT(2), BIT(2)); // [2]:reg_rst_aft_clklck_en
1468 W2BYTEMSK(REG_MHL_ECBUS_00, BMASK(4:3), BMASK(4:3)); // [4]:reg_rst_aft_fail_en, [3]:reg_rst_aft_clklck_en
1469
1470 // ECbus initial
1471 W2BYTEMSK(REG_MHL_ECBUS_02, BIT(7), BMASK(13:8)| BIT(7)); // [7]
1472 W2BYTEMSK(REG_MHL_ECBUS_PHY_6D, BIT(5), BMASK(6:5));
1473 W2BYTEMSK(REG_MHL_ECBUS_PHY_57, 0x06, BMASK(3:0)); // [11:8]:
1474 W2BYTEMSK(REG_MHL_ECBUS_PHY_68, 0x30, BMASK(6:4)); // [6:4]: pre-deglitch
1475 W2BYTEMSK(REG_MHL_ECBUS_PHY_69, 0x50, BMASK(6:4)| BMASK(2:0)); // [6:4]: rasing pattern type, [2:0]: deglitch after reorder
1476 W2BYTEMSK(REG_MHL_ECBUS_PHY_65, 0x08, BMASK(5:0)); // [5:0]: reg_dat_lsb_mask; after analog rwa data deglicth,re-order,the lsb data 1 will be mask
1477
1478 //U02 ECO item setting
1479 W2BYTEMSK(REG_MHL_ECBUS_77, (_mhal_mhl_GetEMSCOneByteCRC(5) << 8)| _mhal_mhl_GetEMSCOneByteCRC(4), BMASK(15:0)); // [15:8]:EMSC neck, [7:0]:EMSC ack
1480 W2BYTEMSK(REG_MHL_ECBUS_78, (_mhal_mhl_GetEMSCOneByteCRC(7) << 8)| _mhal_mhl_GetEMSCOneByteCRC(6), BMASK(15:0)); // [15:8]:Dstart, [7:0]:grant
1481 W2BYTEMSK(REG_MHL_ECBUS_79, (_mhal_mhl_GetEMSCTwoByteCRC(1, 1) << 3)| (_mhal_mhl_GetEMSCTwoByteCRC(1, 2) << 6), BMASK(8:6)| BMASK(5:3)); // [8:6]:EMSC errsum cmd CRC, [5:3]:EMSC errCRC cmd CRC
1482 W2BYTEMSK(REG_MHL_ECBUS_PHY_13, BIT(4), BIT(4)); //
1483 W2BYTEMSK(REG_MHL_ECBUS_PHY_51, BIT(11), BIT(11)); //
1484
1485 //eCBUS fsm timing
1486 W2BYTEMSK(REG_MHL_ECBUS_04, 0xE0E, BMASK(14:8)| BMASK(6:0)); // [14:8]: reg_t_sink_cal, [6:0]: reg_t_snk_cal 1; sink sends eCBUS clock after detecting eCBUS clock form source.
1487 W2BYTEMSK(REG_MHL_ECBUS_06, 0x1C00, BMASK(14:8)); // [14:8]: reg_t_snk_tdm;
1488 W2BYTEMSK(REG_MHL_ECBUS_03, BMASK(15:14), BMASK(15:14)); // [15]:reg_wait_tdm_timer_dis [14]:reg_wait_comma2_timer_dis
1489 W2BYTEMSK(REG_MHL_ECBUS_07, 0x104, BMASK(14:8)| BMASK(6:0)); // [14:8]: reg_t_snk_tdm;
1490 W2BYTEMSK(REG_MHL_ECBUS_3F, 0, BMASK(1:0)); //
1491 W2BYTEMSK(REG_MHL_ECBUS_48, 0, BMASK(2:0)); //
1492
1493 //clock detect setting
1494 W2BYTEMSK(REG_MHL_ECBUS_PHY_70, 0x032B, BMASK(15:0)); // [15:0]:reg_crlock_mid; the CR lock reference value
1495 W2BYTEMSK(REG_MHL_ECBUS_PHY_71, 0x0C04, BMASK(15:0)); // [15:8]:reg_crlock_thr, the CR lock reference failure threshold range; [7:0]:reg_crlock_thr, the CR lock reference correct threshold range;
1496 W2BYTEMSK(REG_MHL_ECBUS_PHY_72, 0x0007, BMASK(15:0)); // [12:8]:reg_cr_unlock_num, clock unlock threshold; [4:0]:reg_cr_lock_num; CR lock success threshold time.
1497
1498 #if(MHL_ECBUS_AUTO_TRAINING)
1499 //auto training testing
1500 W2BYTEMSK(REG_MHL_ECBUS_PHY_5C, 0x010A, BMASK(15:0)); // [10:8]:reg_txloc_golden_lowr_tol, [5:0]:reg_txloc_golden_lower,
1501 W2BYTEMSK(REG_MHL_ECBUS_PHY_66, 0x2117, BMASK(15:0)); // [14:12]:reg_txloc_golden2_tol, [10:8]:reg_txloc_rev_golden_tol, [5:0]:reg_txloc_rev_golden
1502 W2BYTEMSK(REG_MHL_ECBUS_PHY_67, 0x0403, BMASK(15:0)); // [14:12]:reg_val_aft_adj_ok, [10:8]:reg_txloc_txdelay_add, [6:4]:reg_flow_retry_r, [2:0]:reg_flow_retry
1503 W2BYTEMSK(REG_MHL_ECBUS_PHY_69, BIT(10), BMASK(11:10)); // [11:10]:reg_txloc_set_time
1504 W2BYTEMSK(REG_MHL_ECBUS_PHY_6A, 0xf117, BMASK(15:0)); // [15:12]:reg_txloc_lck_thr, [10:8]:reg_txloc_golden_tol, [5:0]:ret_txloc_golden
1505 #else
1506 // Skip atop training
1507 // REG_PM_MHL_CBUS2_4A [14]tx_rep_pd_ove = 1 [13]tx_rep_pd_ov [8]:tx_width_ove = 1 [7:4]:tx_width_ov
1508 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, BIT(8)| 0x33, BIT(8)| BMASK(7:4));
1509
1510 // REG_PM_MHL_CBUS2_4B ,[14]tx_pd_ove = 1 [13]tx_pd_ov [8]:tx_delay_ove = 1 [7:4]:tx_delay_ov
1511 W2BYTEMSK(REG_MHL_ECBUS_PHY_4B, BIT(8)| 0x00, BIT(8)| BMASK(7:4));
1512
1513 //W2BYTEMSK(REG_MHL_ECBUS_PHY_6C, 0x8000, BMASK(15:8));
1514 W2BYTEMSK(REG_MHL_ECBUS_PHY_6D, BIT(8), BIT(8));
1515
1516 W2BYTEMSK(REG_MHL_ECBUS_PHY_6C, 0x0000, BMASK(15:0));
1517 //W2BYTEMSK(REG_MHL_ECBUS_04, (30 << 8), BMASK(14:8));
1518 #endif
1519 }
1520
1521 //**************************************************************************
1522 // [Function Name]:
1523 // _mhal_mhl_SetECbusStateChangeInterrupt()
1524 // [Description]
1525 //
1526 // [Arguments]:
1527 //
1528 // [Return]:
1529 //
1530 //**************************************************************************
_mhal_mhl_SetECbusStateChangeInterrupt(MS_BOOL bEnableFlag)1531 void _mhal_mhl_SetECbusStateChangeInterrupt(MS_BOOL bEnableFlag)
1532 {
1533 if(bEnableFlag)
1534 {
1535 W2BYTEMSK(REG_MHL_ECBUS_36, 0, BIT(0)); // Ecbus state change int mask
1536 }
1537 else
1538 {
1539 W2BYTEMSK(REG_MHL_ECBUS_36, BIT(0), BIT(0)); // Ecbus state change int mask
1540 }
1541
1542 W2BYTEMSK(REG_MHL_ECBUS_34, BIT(0), BIT(0)); // Ecbus state change int clear
1543 }
1544
1545 //**************************************************************************
1546 // [Function Name]:
1547 // _mhal_mhl_SetEMSCReceiveInterrupt()
1548 // [Description]
1549 //
1550 // [Arguments]:
1551 //
1552 // [Return]:
1553 //
1554 //**************************************************************************
_mhal_mhl_SetEMSCReceiveInterrupt(MS_BOOL bEnableFlag)1555 void _mhal_mhl_SetEMSCReceiveInterrupt(MS_BOOL bEnableFlag)
1556 {
1557 W2BYTEMSK(REG_MHL_ECBUS_36, bEnableFlag? 0: BIT(12), BIT(12)); // eMSC receive int mask
1558 W2BYTEMSK(REG_MHL_ECBUS_34, BIT(12), BIT(12)); // eMSC receive int clear
1559 }
1560
1561 //**************************************************************************
1562 // [Function Name]:
1563 // _mhal_mhl_CbusConnectCheckEnable()
1564 // [Description]
1565 //
1566 // [Arguments]:
1567 //
1568 // [Return]:
1569 //
1570 //**************************************************************************
_mhal_mhl_CbusConnectCheckEnable(MS_BOOL bEnableFlag)1571 void _mhal_mhl_CbusConnectCheckEnable(MS_BOOL bEnableFlag)
1572 {
1573 W2BYTEMSK(REG_PM_MHL_CBUS_0B, bEnableFlag? MHL_CBUS_CONNECT_CHECK_VALUE: 0, BMASK(15:0)); // [15:0]: Disable connection check
1574 }
1575
1576 //**************************************************************************
1577 // [Function Name]:
1578 // _mhal_mhl_ECbusEnableSetting()
1579 // [Description]
1580 //
1581 // [Arguments]:
1582 //
1583 // [Return]:
1584 //
1585 //**************************************************************************
_mhal_mhl_ECbusEnableSetting(MS_BOOL bEnableFlag)1586 void _mhal_mhl_ECbusEnableSetting(MS_BOOL bEnableFlag)
1587 {
1588 W2BYTEMSK(REG_MHL_ECBUS_PHY_4D, bEnableFlag? 0: BIT(0), BIT(0)); // ECbus PLL pd
1589 //W2BYTEMSK(REG_MHL_ECBUS_PHY_55, bEnableFlag? 0: BIT(14), BIT(14)); // Rx power down
1590 W2BYTEMSK(REG_MHL_ECBUS_PHY_57, bEnableFlag? BIT(3): BIT(2), BMASK(3:2)); //
1591 W2BYTEMSK(REG_MHL_ECBUS_PHY_6F, bEnableFlag? BIT(8): 0, BIT(8)); // ECbus clock detect
1592 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, bEnableFlag? 0: BIT(13), BIT(13));
1593 W2BYTEMSK(REG_MHL_ECBUS_PHY_4B, bEnableFlag? 0: BIT(13), BIT(13));
1594
1595 if(bEnableFlag)
1596 {
1597 W2BYTEMSK(REG_PM_MHL_CBUS_00, BIT(13), BIT(13)); // [13]: ECbus on
1598 }
1599 else
1600 {
1601 W2BYTEMSK(REG_PM_MHL_CBUS_00, BIT(14), BIT(14)); // [14]: ECbus off
1602 }
1603 }
1604
1605 //**************************************************************************
1606 // [Function Name]:
1607 // _mhal_mhl_ECbusDmuxEnable()
1608 // [Description]
1609 //
1610 // [Arguments]:
1611 //
1612 // [Return]:
1613 //
1614 //**************************************************************************
_mhal_mhl_ECbusDmuxEnable(MS_BOOL bEnableFlag)1615 void _mhal_mhl_ECbusDmuxEnable(MS_BOOL bEnableFlag)
1616 {
1617 W2BYTEMSK(REG_MHL_ECBUS_PHY_4F, bEnableFlag? BIT(3): 0, BIT(3)); // [3]: Enable ECbus dmux
1618 }
1619
1620 //**************************************************************************
1621 // [Function Name]:
1622 // _mhal_mhl_CbusEngineReset()
1623 // [Description]
1624 //
1625 // [Arguments]:
1626 //
1627 // [Return]:
1628 //
1629 //**************************************************************************
_mhal_mhl_CbusEngineReset(void)1630 void _mhal_mhl_CbusEngineReset(void)
1631 {
1632 W2BYTEMSK(REG_PM_MHL_CBUS_00, BIT(0), BIT(0));
1633 W2BYTEMSK(REG_PM_MHL_CBUS_00, 0, BIT(0));
1634 }
1635
1636 //**************************************************************************
1637 // [Function Name]:
1638 // _mhal_mhl_ECbusStateReset()
1639 // [Description]
1640 //
1641 // [Arguments]:
1642 //
1643 // [Return]:
1644 //
1645 //**************************************************************************
_mhal_mhl_ECbusStateReset(void)1646 void _mhal_mhl_ECbusStateReset(void)
1647 {
1648 W2BYTEMSK(REG_MHL_ECBUS_00, BMASK(1:0), BMASK(1:0)); // ECbus state reset
1649 W2BYTEMSK(REG_MHL_ECBUS_00, 0, BMASK(1:0)); // ECbus state reset
1650 }
1651
1652 //**************************************************************************
1653 // [Function Name]:
1654 // _mhal_mhl_SetShortReadAddress()
1655 // [Description]
1656 //
1657 // [Arguments]:
1658 //
1659 // [Return]:
1660 //
1661 //**************************************************************************
_mhal_mhl_SetShortReadAddress(MS_BOOL bECbusEnable)1662 void _mhal_mhl_SetShortReadAddress(MS_BOOL bECbusEnable)
1663 {
1664 W2BYTEMSK(REG_MHL_CBUS_17, bECbusEnable? 0x7000: 0x0800, BMASK(15:8)); // [15:8]: reg_ddc_hdcp_short_read_address
1665
1666 bECbusEnableFlag = bECbusEnable;
1667 }
1668
1669 //**************************************************************************
1670 // [Function Name]:
1671 // _mhal_mhl_Version3PhyEnable()
1672 // [Description]
1673 //
1674 // [Arguments]:
1675 //
1676 // [Return]:
1677 //
1678 //**************************************************************************
_mhal_mhl_Version3PhyEnable(MS_U8 ucCbusSelect,MS_BOOL bEnableFlag)1679 void _mhal_mhl_Version3PhyEnable(MS_U8 ucCbusSelect, MS_BOOL bEnableFlag)
1680 {
1681 switch(ucCbusSelect)
1682 {
1683 #if(MHL_FUNCTION_SUPPORT_PORTA)
1684 case MHL_CBUS_SELECT_PORTA:
1685 if(GET_MHL_PATH_SUPPORT_PORTA())
1686 {
1687 W2BYTEMSK(REG_DVI_DTOP_DUAL_P0_60_L, bEnableFlag? BMASK(10:8): 0, BMASK(10:8)); // [8]: MHL3 engine enable
1688 W2BYTEMSK(REG_COMBO_PHY0_P0_73_L, bEnableFlag? MHL_EQ_30_SETTING_VALUE: MHL_EQ_20_SETTING_VALUE, BMASK(4:0)); // B channel EQ
1689 W2BYTEMSK(REG_COMBO_PHY0_P0_60_L, bEnableFlag? 0: BIT(5), BIT(5));
1690 }
1691
1692 break;
1693 #endif
1694
1695 #if(MHL_FUNCTION_SUPPORT_PORTB)
1696 case MHL_CBUS_SELECT_PORTB:
1697 if(GET_MHL_PATH_SUPPORT_PORTB())
1698 {
1699 W2BYTEMSK(REG_DVI_DTOP_DUAL_P1_60_L, bEnableFlag? BMASK(10:8): 0, BMASK(10:8)); // [8]: MHL3 engine enable
1700 W2BYTEMSK(REG_COMBO_PHY0_P1_73_L, bEnableFlag? MHL_EQ_30_SETTING_VALUE: MHL_EQ_20_SETTING_VALUE, BMASK(4:0)); // B channel EQ
1701 W2BYTEMSK(REG_COMBO_PHY0_P1_60_L, bEnableFlag? 0: BIT(5), BIT(5));
1702 }
1703
1704 break;
1705 #endif
1706
1707 #if(MHL_FUNCTION_SUPPORT_PORTC)
1708 case MHL_CBUS_SELECT_PORTC:
1709 if(GET_MHL_PATH_SUPPORT_PORTC())
1710 {
1711 W2BYTEMSK(REG_DVI_DTOP_DUAL_P2_60_L, bEnableFlag? BMASK(10:8): 0, BMASK(10:8)); // [8]: MHL3 engine enable
1712 W2BYTEMSK(REG_COMBO_PHY0_P2_73_L, bEnableFlag? MHL_EQ_30_SETTING_VALUE: MHL_EQ_20_SETTING_VALUE, BMASK(4:0)); // B channel EQ
1713 W2BYTEMSK(REG_COMBO_PHY0_P2_60_L, bEnableFlag? 0: BIT(5), BIT(5));
1714 }
1715
1716 break;
1717 #endif
1718
1719 #if(MHL_FUNCTION_SUPPORT_PORTD)
1720 case MHL_CBUS_SELECT_PORTD:
1721 if(GET_MHL_PATH_SUPPORT_PORTD())
1722 {
1723 W2BYTEMSK(REG_DVI_DTOP_DUAL_P3_60_L, bEnableFlag? BMASK(10:8): 0, BMASK(10:8)); // [8]: MHL3 engine enable
1724 W2BYTEMSK(REG_COMBO_PHY0_P3_73_L, bEnableFlag? MHL_EQ_30_SETTING_VALUE: MHL_EQ_20_SETTING_VALUE, BMASK(4:0)); // B channel EQ
1725 W2BYTEMSK(REG_COMBO_PHY0_P3_60_L, bEnableFlag? 0: BIT(5), BIT(5));
1726 }
1727
1728 break;
1729 #endif
1730
1731 default:
1732
1733 break;
1734 };
1735 }
1736
1737 //**************************************************************************
1738 // [Function Name]:
1739 // _mhal_mhl_ECbusStateChangeProc()
1740 // [Description]
1741 //
1742 // [Arguments]:
1743 //
1744 // [Return]:
1745 //
1746 //**************************************************************************
_mhal_mhl_ECbusStateChangeProc(void)1747 void _mhal_mhl_ECbusStateChangeProc(void)
1748 {
1749 MS_U8 ucECbusState = (R2BYTE(REG_MHL_ECBUS_03) &0xF0) >> 4; // [7:4]: ECbus state
1750
1751 if(ucECbusState != ucECbusTrainState)
1752 {
1753 if(ucECbusState == MHL_ECBUS_STATE_WAIT_CLOCK_LOCK)
1754 {
1755 //W2BYTEMSK(REG_MHL_ECBUS_PHY_4D, 0, BIT(0)); // [0]: ECbus PLL pd
1756 }
1757 else if(ucECbusState == MHL_ECBUS_STATE_WAIT_SEND_CLOCK)
1758 {
1759 if(R2BYTE(REG_MHL_ECBUS_PHY_4D) & BIT(15))
1760 {
1761 //_mhal_mhl_ECbusDmuxEnable(TRUE);
1762 }
1763
1764 W2BYTEMSK(REG_MHL_ECBUS_34, BIT(4), BIT(4)); // [4]
1765 }
1766 else if(ucECbusState == MHL_ECBUS_STATE_SOURCE_ACTIVE)
1767 {
1768
1769 }
1770 else if(ucECbusState == MHL_ECBUS_STATE_ACTIVE)
1771 {
1772
1773 }
1774 else if(ucECbusState == MHL_ECBUS_STATE_FAIL)
1775 {
1776 //_mhal_mhl_ECbusDmuxEnable(FALSE);
1777
1778 //W2BYTEMSK(REG_MHL_ECBUS_PHY_56, 0x0207, BMASK(15:0)); //
1779 #if(MHL_ECBUS_AUTO_TRAINING)
1780 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, BIT(13), BIT(13));//
1781 #endif
1782 //W2BYTEMSK(REG_MHL_ECBUS_PHY_4D, BIT(0), BIT(0)); // [0]: ECbus PLL pd
1783 #if(MHL_ECBUS_AUTO_TRAINING)
1784 W2BYTEMSK(REG_MHL_ECBUS_PHY_4B, BIT(13)| BIT(12), BMASK(14:12)); // delay
1785 #endif
1786
1787 _mhal_mhl_ECbusStateReset();
1788
1789 ucECbusTrainFailCount++;
1790 }
1791
1792 ucECbusTrainState = ucECbusState;
1793 }
1794 }
1795
1796 //**************************************************************************
1797 // [Function Name]:
1798 // _mhal_mhl_ECbusModeUpProc()
1799 // [Description]
1800 //
1801 // [Arguments]:
1802 //
1803 // [Return]:
1804 //
1805 //**************************************************************************
_mhal_mhl_ECbusModeUpProc(void)1806 void _mhal_mhl_ECbusModeUpProc(void)
1807 {
1808 W2BYTEMSK(REG_MHL_ECBUS_34, BIT(4), BIT(4)); // [4]: clear PLL lock status
1809 W2BYTEMSK(REG_MHL_ECBUS_34, 0, BIT(4)); // [4]: clear PLL lock status
1810
1811 //W2BYTEMSK(REG_MHL_ECBUS_PHY_56, 0x0207, BMASK(15:0));
1812 #if(MHL_ECBUS_AUTO_TRAINING)
1813 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, BIT(13), BIT(13));
1814 W2BYTEMSK(REG_MHL_ECBUS_PHY_4B, BMASK(14:12), BMASK(14:12)); // delay
1815 #endif
1816 }
1817
1818 //**************************************************************************
1819 // [Function Name]:
1820 // _mhal_mhl_ECbusModeDownProc()
1821 // [Description]
1822 //
1823 // [Arguments]:
1824 //
1825 // [Return]:
1826 //
1827 //**************************************************************************
_mhal_mhl_ECbusModeDownProc(void)1828 void _mhal_mhl_ECbusModeDownProc(void)
1829 {
1830 //W2BYTEMSK(REG_MHL_ECBUS_PHY_56, 0x0207, BMASK(15:0));
1831 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, BIT(13), BIT(13));
1832 }
1833
1834 //**************************************************************************
1835 // [Function Name]:
1836 // _mhal_mhl_MHL3MuxSetting0()
1837 // [Description]
1838 //
1839 // [Arguments]:
1840 //
1841 // [Return]:
1842 //
1843 //**************************************************************************
_mhal_mhl_MHL3MuxSetting0(MS_BOOL bLinkRate6GFlag)1844 void _mhal_mhl_MHL3MuxSetting0(MS_BOOL bLinkRate6GFlag)
1845 {
1846 W2BYTEMSK(REG_HDMI2_DUAL_0_54_L, bLinkRate6GFlag? 0: BIT(1), BMASK(1:0)); // [1:0]: reg_avg_ctrl_case
1847 }
1848
1849 //**************************************************************************
1850 // [Function Name]:
1851 // _mhal_mhl_GetSRAMReceiveEMSCData()
1852 // [Description]
1853 //
1854 // [Arguments]:
1855 //
1856 // [Return]:
1857 //
1858 //**************************************************************************
_mhal_mhl_GetSRAMReceiveEMSCData(void)1859 MS_U8 _mhal_mhl_GetSRAMReceiveEMSCData(void)
1860 {
1861 W2BYTEMSK(REG_MHL_ECBUS_23, BIT(15), BIT(15));
1862
1863 while((R2BYTE(REG_MHL_ECBUS_23) & BIT(14)) == BIT(14));
1864
1865 return (R2BYTE(REG_MHL_ECBUS_22) &BMASK(7:0));
1866 }
1867
1868 //**************************************************************************
1869 // [Function Name]:
1870 // _mhal_mhl_GetSRAMReceiveEMSCData()
1871 // [Description]
1872 //
1873 // [Arguments]:
1874 //
1875 // [Return]:
1876 //
1877 //**************************************************************************
_mhal_mhl_InsertSRAMSendEMSCData(MS_U8 ucSendEMSC)1878 void _mhal_mhl_InsertSRAMSendEMSCData(MS_U8 ucSendEMSC)
1879 {
1880 W2BYTEMSK(REG_MHL_ECBUS_20, ucSendEMSC, BMASK(7:0));
1881
1882 W2BYTEMSK(REG_MHL_ECBUS_21, BIT(15), BIT(15));
1883
1884 while((R2BYTE(REG_MHL_ECBUS_21) & BIT(14)) == BIT(14));
1885 }
1886
1887 #if(MHL_ECBUS_COMMAND_PARSING)
1888 //**************************************************************************
1889 // [Function Name]:
1890 // _mhal_mhl_ParsingECbusCommand()
1891 // [Description]
1892 //
1893 // [Arguments]:
1894 //
1895 // [Return]:
1896 //
1897 //**************************************************************************
_mhal_mhl_ParsingECbusCommand(MS_U16 * usECbusData)1898 void _mhal_mhl_ParsingECbusCommand(MS_U16 *usECbusData)
1899 {
1900 MS_U8 ucTimes = 0;
1901 MS_U16 ustemp = 0;
1902 MS_U16 usCounnter = 0;
1903 MS_U16 usValue = 0;
1904
1905 for(ustemp = 0; ustemp < MHL_BUFFER_ECBUS_DATA_LENGTH; ustemp++)
1906 {
1907 if((usECbusData[ustemp] &BMASK(7:0)) == 0x39) // Find CBUS1_START
1908 {
1909 ucTimes = 0;
1910
1911 if(usECbusData[ustemp] &BIT(15)) // Send case
1912 {
1913 for(usCounnter = ustemp +1; usCounnter < MHL_BUFFER_ECBUS_DATA_LENGTH; usCounnter++)
1914 {
1915 if(usECbusData[usCounnter] &BIT(15))
1916 {
1917 usValue = usValue << 8;
1918 usValue = usValue |(usECbusData[usCounnter] &BMASK(7:0));
1919
1920 ucTimes++;
1921 }
1922
1923 if(ucTimes == 2)
1924 {
1925 usValue = usValue >> 5;
1926 ucTimes = usValue >> 8;
1927
1928 if(ucTimes == 5)
1929 {
1930 msg_mhl(printf(" MHL [SK][MSC][C] = %x\r\n", (usValue &BMASK(7:0))));
1931 }
1932 else if(ucTimes == 4)
1933 {
1934 msg_mhl(printf(" MHL [SK][MSC][D] = %x\r\n", (usValue &BMASK(7:0))));
1935 }
1936 else if(ucTimes == 1)
1937 {
1938 msg_mhl(printf(" MHL [SK][DDC][C] = %x\r\n", (usValue &BMASK(7:0))));
1939 }
1940 else if(ucTimes == 0)
1941 {
1942 msg_mhl(printf(" MHL [SK][DDC][D] = %x\r\n", (usValue &BMASK(7:0))));
1943 }
1944 else
1945 {
1946 msg_mhl(printf(" MHL [SK] unknow = %x\r\n", (usValue &BMASK(7:0))));
1947 }
1948
1949 break;
1950 }
1951 }
1952 }
1953 else // Receive case
1954 {
1955 for(usCounnter = ustemp +1; usCounnter < MHL_BUFFER_ECBUS_DATA_LENGTH; usCounnter++)
1956 {
1957 if((usECbusData[usCounnter] &BIT(15)) == 0)
1958 {
1959 usValue = usValue << 8;
1960 usValue = usValue |(usECbusData[usCounnter] &BMASK(7:0));
1961
1962 ucTimes++;
1963 }
1964
1965 if(ucTimes == 2)
1966 {
1967 usValue = usValue >> 5;
1968 ucTimes = usValue >> 8;
1969
1970 if(ucTimes == 5)
1971 {
1972 msg_mhl(printf(" MHL [SO][MSC][C] = %x\r\n", (usValue &BMASK(7:0))));
1973 }
1974 else if(ucTimes == 4)
1975 {
1976 msg_mhl(printf(" MHL [SO][MSC][D] = %x\r\n", (usValue &BMASK(7:0))));
1977 }
1978 else if(ucTimes == 1)
1979 {
1980 msg_mhl(printf(" MHL [SO][DDC][C] = %x\r\n", (usValue &BMASK(7:0))));
1981 }
1982 else if(ucTimes == 0)
1983 {
1984 msg_mhl(printf(" MHL [SO][DDC][D] = %x\r\n", (usValue &BMASK(7:0))));
1985 }
1986 else
1987 {
1988 msg_mhl(printf(" MHL [SO] unknow = %x\r\n", (usValue &BMASK(7:0))));
1989 }
1990
1991 break;
1992 }
1993 }
1994 }
1995 }
1996 }
1997 }
1998
1999 //**************************************************************************
2000 // [Function Name]:
2001 // _mhal_mhl_GetECbusCommand()
2002 // [Description]
2003 //
2004 // [Arguments]:
2005 //
2006 // [Return]:
2007 //
2008 //**************************************************************************
_mhal_mhl_GetECbusCommand(void)2009 void _mhal_mhl_GetECbusCommand(void)
2010 {
2011 MS_BOOL bReDoFlag = TRUE;
2012 MS_U8 ucReceiveData = 0;
2013 MS_U8 ucPreReceiveData = 0;
2014 MS_U8 ucSendData = 0;
2015 MS_U8 ucPreSendData = 0;
2016 MS_U16 usECbusCData[MHL_BUFFER_ECBUS_DATA_LENGTH] = {0};
2017 MS_U16 ustemp = 0;
2018 MS_U16 usCounnter = 0;
2019 static MS_U32 ulTimeout = 0;
2020
2021 if(ulTimeout < 40000000)
2022 {
2023 do
2024 {
2025 ucReceiveData = (R2BYTE(REG_MHL_ECBUS_7C) &BMASK(7:0));
2026 ucSendData = (R2BYTE(REG_MHL_ECBUS_7C) >>8);
2027
2028 if((ucReceiveData != 0x5A) && (ucPreReceiveData != ucReceiveData))
2029 {
2030 usECbusCData[ustemp] = ucReceiveData;
2031 ustemp++;
2032
2033 //msg_mhl(printf(" MHL receive data = %x, %d\r\n", ucReceiveData, ustemp));
2034
2035 ucPreReceiveData = ucReceiveData;
2036 bReDoFlag = TRUE;
2037 usCounnter = 0;
2038 }
2039
2040 if((ucSendData != 0x5A)&& (ucPreSendData != ucSendData))
2041 {
2042 usECbusCData[ustemp] = ucSendData |BIT(15);
2043 ustemp++;
2044
2045 //msg_mhl(printf(" MHL send data = %x, %d\r\n", ucSendData, ustemp));
2046
2047 ucPreSendData = ucSendData;
2048 bReDoFlag = TRUE;
2049 usCounnter = 0;
2050 }
2051
2052 if(ustemp == MHL_BUFFER_ECBUS_DATA_LENGTH)
2053 {
2054 bReDoFlag = FALSE;
2055
2056 for(usCounnter = 0; usCounnter < MHL_BUFFER_ECBUS_DATA_LENGTH; usCounnter++)
2057 {
2058 msg_mhl(printf(" MHL DDC data = %x\r\n", usECbusCData[usCounnter]));
2059 }
2060
2061 ustemp = 0;
2062
2063 _mhal_mhl_ParsingECbusCommand(usECbusCData);
2064 }
2065
2066 if(ulTimeout < 40000000)
2067 {
2068 ulTimeout++;
2069 }
2070 else
2071 {
2072 for(usCounnter = 0; usCounnter < ustemp; usCounnter++)
2073 {
2074 msg_mhl(printf(" MHL DDC data = %x\r\n", usECbusCData[usCounnter]));
2075 }
2076
2077 bReDoFlag = FALSE;
2078 ustemp = 0;
2079
2080 _mhal_mhl_ParsingECbusCommand(usECbusCData);
2081 }
2082 }while(bReDoFlag);
2083 }
2084 }
2085
2086 #endif
2087
2088 //-------------------------------------------------------------------------------------------------
2089 // Global Functions
2090 //-------------------------------------------------------------------------------------------------
2091
2092 //**************************************************************************
2093 // [Function Name]:
2094 // mhal_mhl_GetCbusSelect()
2095 // [Description]
2096 //
2097 // [Arguments]:
2098 //
2099 // [Return]:
2100 //
2101 //**************************************************************************
mhal_mhl_GetCbusSelect(MS_U8 ucPort)2102 MS_U8 mhal_mhl_GetCbusSelect(MS_U8 ucPort)
2103 {
2104 MS_U8 uctemp = MHL_CBUS_SELECT_MASK;
2105
2106 switch(ucPort)
2107 {
2108 case MHL_DVI_PORT_A:
2109 uctemp = MHL_CBUS_SELECT_PORTA;
2110 break;
2111
2112 case MHL_DVI_PORT_B:
2113 uctemp = MHL_CBUS_SELECT_PORTB;
2114 break;
2115
2116 case MHL_DVI_PORT_C:
2117 uctemp = MHL_CBUS_SELECT_PORTC;
2118 break;
2119
2120 case MHL_DVI_PORT_D:
2121 uctemp = MHL_CBUS_SELECT_PORTD;
2122 break;
2123
2124 default:
2125
2126 break;
2127 };
2128
2129 return uctemp;
2130 }
2131
2132 //**************************************************************************
2133 // [Function Name]:
2134 // mhal_mhl_GetInputPort()
2135 // [Description]
2136 // MHL get current input port
2137 // [Arguments]:
2138 //
2139 // [Return]:
2140 //
2141 //**************************************************************************
mhal_mhl_GetInputPort(void)2142 MS_U8 mhal_mhl_GetInputPort(void)
2143 {
2144 return (R2BYTE(REG_HDMI2_DUAL_0_50_L) &BMASK(1:0));
2145 }
2146
2147 //**************************************************************************
2148 // [Function Name]:
2149 // mhal_mhl_CheckInputPort()
2150 // [Description]
2151 // MHL check current input port
2152 // [Arguments]:
2153 //
2154 // [Return]:
2155 //
2156 //**************************************************************************
mhal_mhl_CheckInputPort(MS_U8 ucCbusSelect)2157 MS_BOOL mhal_mhl_CheckInputPort(MS_U8 ucCbusSelect)
2158 {
2159 MS_BOOL bindex = FALSE;
2160
2161 if(mhal_mhl_GetCbusSelect(mhal_mhl_GetInputPort()) == ucCbusSelect)
2162 {
2163 bindex = TRUE;
2164 }
2165
2166 return bindex;
2167 }
2168
2169 //**************************************************************************
2170 // [Function Name]:
2171 // mhal_mhl_CheckPIPWindow()
2172 // [Description]
2173 //
2174 // [Arguments]:
2175 //
2176 // [Return]:
2177 //
2178 //**************************************************************************
mhal_mhl_CheckPIPWindow(void)2179 MS_BOOL mhal_mhl_CheckPIPWindow(void)
2180 {
2181 MS_BOOL bFlag = FALSE;
2182 MS_U8 ucScalerMainMux = R2BYTE(0x102E02) &BMASK(7:0);
2183 MS_U8 ucScalerSubMux = ucScalerMainMux &BMASK(3:0);
2184
2185 ucScalerMainMux = (ucScalerMainMux &BMASK(7:4)) >> 4;
2186
2187 if((ucScalerMainMux == MHL_SCALER_MUX_SELECT_DVI) || (ucScalerSubMux == MHL_SCALER_MUX_SELECT_DVI))
2188 {
2189 bFlag = TRUE;
2190 }
2191
2192 return bFlag;
2193 }
2194
2195 //**************************************************************************
2196 // [Function Name]:
2197 // mhal_mhl_MHLSupportPath()
2198 // [Description]
2199 // MHL support path
2200 // [Arguments]:
2201 //
2202 // [Return]:
2203 //
2204 //**************************************************************************
mhal_mhl_MHLSupportPath(MS_U8 ucSelect)2205 void mhal_mhl_MHLSupportPath(MS_U8 ucSelect)
2206 {
2207 ucMHLSupportPort = ucSelect;
2208 }
2209
2210 //**************************************************************************
2211 // [Function Name]:
2212 // mhal_mhl_CheckEfuseControlFlag()
2213 // [Description]
2214 //
2215 // [Arguments]:
2216 //
2217 // [Return]:
2218 //
2219 //**************************************************************************
mhal_mhl_CheckEfuseControlFlag(MS_BOOL bEfuseFlag)2220 MS_BOOL mhal_mhl_CheckEfuseControlFlag(MS_BOOL bEfuseFlag)
2221 {
2222 MS_BOOL bFlag = FALSE;
2223
2224 #if(MHL_EFUSE_FUNCTION_CONTROL)
2225 MS_U8 uctemp = 0;
2226
2227 if(!bEfuseFlag)
2228 {
2229 for(uctemp = 0; uctemp < MHL_CBUS_SELECT_MASK; uctemp++)
2230 {
2231 mhal_mhl_CbusIsolate(uctemp, TRUE);
2232 }
2233
2234 bFlag = TRUE;
2235 }
2236
2237 #endif
2238
2239 return bFlag;
2240 }
2241
2242 //**************************************************************************
2243 // [Function Name]:
2244 // mhal_mhl_InsertChipIDforCheck()
2245 // [Description]
2246 //
2247 // [Arguments]:
2248 //
2249 // [Return]:
2250 //
2251 //**************************************************************************
mhal_mhl_InsertChipIDforCheck(MS_U8 ucChipID)2252 void mhal_mhl_InsertChipIDforCheck(MS_U8 ucChipID)
2253 {
2254 ucChipIDValue = ucChipID;
2255
2256 msg_mhl(printf("** MHL Cbus index value %x\r\n", ucChipID));
2257 }
2258
2259 //**************************************************************************
2260 // [Function Name]:
2261 // mhal_mhl_CbusSelectSetMux()
2262 // [Description]
2263 //
2264 // [Arguments]:
2265 //
2266 // [Return]:
2267 //
2268 //**************************************************************************
mhal_mhl_CbusSelectSetMux(MS_U8 ucCbusSelect)2269 void mhal_mhl_CbusSelectSetMux(MS_U8 ucCbusSelect)
2270 {
2271 switch(ucCbusSelect)
2272 {
2273 #if(MHL_FUNCTION_SUPPORT_PORTA)
2274 case MHL_CBUS_SELECT_PORTA:
2275 if(GET_MHL_PATH_SUPPORT_PORTA())
2276 {
2277
2278 }
2279
2280 break;
2281 #endif
2282
2283 #if(MHL_FUNCTION_SUPPORT_PORTB)
2284 case MHL_CBUS_SELECT_PORTB:
2285 if(GET_MHL_PATH_SUPPORT_PORTB())
2286 {
2287
2288 }
2289
2290 break;
2291 #endif
2292
2293 #if(MHL_FUNCTION_SUPPORT_PORTC)
2294 case MHL_CBUS_SELECT_PORTC:
2295 if(GET_MHL_PATH_SUPPORT_PORTC())
2296 {
2297
2298 }
2299
2300 break;
2301 #endif
2302
2303 #if(MHL_FUNCTION_SUPPORT_PORTD)
2304 case MHL_CBUS_SELECT_PORTD:
2305 if(GET_MHL_PATH_SUPPORT_PORTD())
2306 {
2307
2308 }
2309
2310 break;
2311 #endif
2312
2313 default:
2314
2315 break;
2316 };
2317 }
2318
2319 //**************************************************************************
2320 // [Function Name]:
2321 // mhal_mhl_CableDetect()
2322 // [Description]
2323 // MHL cable detection
2324 // [Arguments]:
2325 //
2326 // [Return]:
2327 // TRUE: MHL cable plugged
2328 // FALSE: MHL cable unplugged
2329 //**************************************************************************
mhal_mhl_CableDetect(MS_U8 ucCbusSelect)2330 MS_BOOL mhal_mhl_CableDetect(MS_U8 ucCbusSelect)
2331 {
2332 MS_BOOL bFlag = FALSE;
2333
2334 switch(ucCbusSelect)
2335 {
2336 #if(MHL_FUNCTION_SUPPORT_PORTA)
2337 case MHL_CBUS_SELECT_PORTA:
2338 if(GET_MHL_PATH_SUPPORT_PORTA())
2339 {
2340 bFlag = ((R2BYTE(REG_PM_MHL_CBUS_00) & BIT(10)) ? TRUE : FALSE);
2341 }
2342
2343 break;
2344 #endif
2345
2346 #if(MHL_FUNCTION_SUPPORT_PORTB)
2347 case MHL_CBUS_SELECT_PORTB:
2348 if(GET_MHL_PATH_SUPPORT_PORTB())
2349 {
2350
2351 }
2352
2353 break;
2354 #endif
2355
2356 #if(MHL_FUNCTION_SUPPORT_PORTC)
2357 case MHL_CBUS_SELECT_PORTC:
2358 if(GET_MHL_PATH_SUPPORT_PORTC())
2359 {
2360 bFlag = ((R2BYTE(REG_PM_MHL_CBUS_00) & BIT(10)) ? TRUE : FALSE);
2361 }
2362
2363 break;
2364 #endif
2365
2366 #if(MHL_FUNCTION_SUPPORT_PORTD)
2367 case MHL_CBUS_SELECT_PORTD:
2368 if(GET_MHL_PATH_SUPPORT_PORTD())
2369 {
2370 bFlag = ((R2BYTE(REG_PM_MHL_CBUS_00) & BIT(10)) ? TRUE : FALSE);
2371 }
2372
2373 break;
2374 #endif
2375
2376 default:
2377
2378 break;
2379 };
2380
2381 return bFlag;
2382 }
2383
2384 //**************************************************************************
2385 // [Function Name]:
2386 // mhal_mhl_Accumulator_Clr()
2387 // [Description]
2388 // to clear accumulator when input is not MHL
2389 // [Arguments]:
2390 //
2391 // [Return]:
2392 //**************************************************************************
mhal_mhl_Accumulator_Clr(MS_U8 ucCbusSelect)2393 void mhal_mhl_Accumulator_Clr(MS_U8 ucCbusSelect)
2394 {
2395 switch(ucCbusSelect)
2396 {
2397 #if(MHL_FUNCTION_SUPPORT_PORTA)
2398 case MHL_CBUS_SELECT_PORTA:
2399 if(GET_MHL_PATH_SUPPORT_PORTA())
2400 {
2401
2402 }
2403
2404 break;
2405 #endif
2406
2407 #if(MHL_FUNCTION_SUPPORT_PORTB)
2408 case MHL_CBUS_SELECT_PORTB:
2409 if(GET_MHL_PATH_SUPPORT_PORTB())
2410 {
2411
2412 }
2413
2414 break;
2415 #endif
2416
2417 #if(MHL_FUNCTION_SUPPORT_PORTC)
2418 case MHL_CBUS_SELECT_PORTC:
2419 if(GET_MHL_PATH_SUPPORT_PORTC())
2420 {
2421
2422 }
2423
2424 break;
2425 #endif
2426
2427 #if(MHL_FUNCTION_SUPPORT_PORTD)
2428 case MHL_CBUS_SELECT_PORTD:
2429 if(GET_MHL_PATH_SUPPORT_PORTD())
2430 {
2431
2432 }
2433
2434 break;
2435 #endif
2436
2437 default:
2438
2439 break;
2440 };
2441 }
2442
2443 //**************************************************************************
2444 // [Function Name]:
2445 // mhal_mhl_CDRModeMonitor()
2446 // [Description]:
2447 // MHL CDR mode monitor
2448 // [Arguments]:
2449 // isCbusConnected: Cbus is at connected state or not
2450 // [Return]:
2451 //
2452 //**************************************************************************
mhal_mhl_CDRModeMonitor(MS_U8 ucCbusSelect,MS_BOOL bPathEnable)2453 MS_BOOL mhal_mhl_CDRModeMonitor(MS_U8 ucCbusSelect, MS_BOOL bPathEnable)
2454 {
2455 MS_BOOL bindex = FALSE;
2456 static MS_U8 ucStableCount = 0;
2457 static MS_BOOL bPLLPower[MHL_CBUS_SELECT_MASK] = {TRUE, TRUE, TRUE, TRUE};
2458
2459 switch(ucCbusSelect)
2460 {
2461 #if(MHL_FUNCTION_SUPPORT_PORTA)
2462 case MHL_CBUS_SELECT_PORTA:
2463 if(GET_MHL_PATH_SUPPORT_PORTA())
2464 {
2465 if(bPathEnable && (_mhal_mhl_CheckClockStatus(ucCbusSelect)))
2466 {
2467 if(ucStableCount < (MHL_CDR_FORCE_THRESHOLD +1))
2468 {
2469 ucStableCount++;
2470 }
2471
2472 if(!bPLLPower[ucCbusSelect])
2473 {
2474 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L, 0, BIT(8));
2475
2476 bPLLPower[ucCbusSelect] = TRUE;
2477 }
2478
2479 if((R2BYTE(REG_DVI_DTOP_DUAL_P0_31_L) &BIT(6)) == BIT(6)) // DE stable
2480 {
2481 if(ucStableCount < MHL_CDR_STABLE_THRESHOLD)
2482 {
2483 ucStableCount = MHL_CDR_STABLE_THRESHOLD;
2484 }
2485 else if(ucStableCount == (MHL_CDR_FORCE_THRESHOLD -1))
2486 {
2487 if(bECbusEnableFlag)
2488 {
2489 W2BYTEMSK(REG_DVI_DTOP_DUAL_P0_72_L, BIT(13), BIT(13));
2490 //MsOS_DelayTaskUs(1);
2491 W2BYTEMSK(REG_DVI_DTOP_DUAL_P0_72_L, 0, BIT(13));
2492
2493 msg_mhl(printf("** MHL toggle ~~~\r\n"));
2494 }
2495 }
2496 }
2497 else // DE unstable
2498 {
2499 if(ucStableCount >= MHL_CDR_STABLE_THRESHOLD)
2500 {
2501 ucStableCount = 0;
2502 }
2503 else if(ucStableCount == (MHL_CDR_STABLE_THRESHOLD -1))
2504 {
2505 msg_mhl(printf("** MHL time change toggle CDR mode\r\n"));
2506
2507 ucStableCount = 0;
2508 }
2509 }
2510 }
2511 else
2512 {
2513 if(bPLLPower[ucCbusSelect])
2514 {
2515 W2BYTEMSK(REG_COMBO_PHY0_P0_6E_L, BIT(8), BIT(8));
2516
2517 bPLLPower[ucCbusSelect] = FALSE;
2518 ucStableCount = 0;
2519 }
2520 }
2521 }
2522
2523 break;
2524 #endif
2525
2526 #if(MHL_FUNCTION_SUPPORT_PORTB)
2527 case MHL_CBUS_SELECT_PORTB:
2528 if(GET_MHL_PATH_SUPPORT_PORTB())
2529 {
2530 if(bPathEnable && (_mhal_mhl_CheckClockStatus(ucCbusSelect)))
2531 {
2532 if(ucStableCount < (MHL_CDR_FORCE_THRESHOLD +1))
2533 {
2534 ucStableCount++;
2535 }
2536
2537 if(!bPLLPower[ucCbusSelect])
2538 {
2539 bPLLPower[ucCbusSelect] = TRUE;
2540 }
2541
2542 if((R2BYTE(REG_DVI_DTOP_DUAL_P1_31_L) &BIT(6)) == BIT(6)) // DE stable
2543 {
2544 if(ucStableCount < MHL_CDR_STABLE_THRESHOLD)
2545 {
2546 ucStableCount = MHL_CDR_STABLE_THRESHOLD;
2547 }
2548 else if(ucStableCount == (MHL_CDR_FORCE_THRESHOLD -1))
2549 {
2550 if(bECbusEnableFlag)
2551 {
2552 W2BYTEMSK(REG_DVI_DTOP_DUAL_P1_72_L, BIT(13), BIT(13));
2553 //MsOS_DelayTaskUs(1);
2554 W2BYTEMSK(REG_DVI_DTOP_DUAL_P1_72_L, 0, BIT(13));
2555
2556 msg_mhl(printf("** MHL toggle ~~~\r\n"));
2557 }
2558 }
2559 }
2560 else // DE unstable
2561 {
2562 if(ucStableCount >= MHL_CDR_STABLE_THRESHOLD)
2563 {
2564 ucStableCount = 0;
2565 }
2566 else if(ucStableCount == (MHL_CDR_STABLE_THRESHOLD -1))
2567 {
2568 msg_mhl(printf("** MHL time change toggle CDR mode\r\n"));
2569
2570 ucStableCount = 0;
2571 }
2572 }
2573 }
2574 else
2575 {
2576 if(bPLLPower[ucCbusSelect])
2577 {
2578 bPLLPower[ucCbusSelect] = FALSE;
2579 ucStableCount = 0;
2580 }
2581 }
2582 }
2583
2584 break;
2585 #endif
2586
2587 #if(MHL_FUNCTION_SUPPORT_PORTC)
2588 case MHL_CBUS_SELECT_PORTC:
2589 if(GET_MHL_PATH_SUPPORT_PORTC())
2590 {
2591 if(bPathEnable && (_mhal_mhl_CheckClockStatus(ucCbusSelect)))
2592 {
2593 if(ucStableCount < (MHL_CDR_FORCE_THRESHOLD +1))
2594 {
2595 ucStableCount++;
2596 }
2597
2598 if(!bPLLPower[ucCbusSelect])
2599 {
2600 bPLLPower[ucCbusSelect] = TRUE;
2601 }
2602
2603 if((R2BYTE(REG_DVI_DTOP_DUAL_P2_31_L) &BIT(6)) == BIT(6)) // DE stable
2604 {
2605 if(ucStableCount < MHL_CDR_STABLE_THRESHOLD)
2606 {
2607 ucStableCount = MHL_CDR_STABLE_THRESHOLD;
2608 }
2609 else if(ucStableCount == (MHL_CDR_FORCE_THRESHOLD -1))
2610 {
2611 if(bECbusEnableFlag)
2612 {
2613 W2BYTEMSK(REG_DVI_DTOP_DUAL_P2_72_L, BIT(13), BIT(13));
2614 //MsOS_DelayTaskUs(1);
2615 W2BYTEMSK(REG_DVI_DTOP_DUAL_P2_72_L, 0, BIT(13));
2616
2617 msg_mhl(printf("** MHL toggle ~~~\r\n"));
2618 }
2619 }
2620 }
2621 else // DE unstable
2622 {
2623 if(ucStableCount >= MHL_CDR_STABLE_THRESHOLD)
2624 {
2625 ucStableCount = 0;
2626 }
2627 else if(ucStableCount == (MHL_CDR_STABLE_THRESHOLD -1))
2628 {
2629 msg_mhl(printf("** MHL time change toggle CDR mode\r\n"));
2630
2631 ucStableCount = 0;
2632 }
2633 }
2634 }
2635 else
2636 {
2637 if(bPLLPower[ucCbusSelect])
2638 {
2639 bPLLPower[ucCbusSelect] = FALSE;
2640 ucStableCount = 0;
2641 }
2642 }
2643 }
2644
2645 break;
2646 #endif
2647
2648 #if(MHL_FUNCTION_SUPPORT_PORTD)
2649 case MHL_CBUS_SELECT_PORTD:
2650 if(GET_MHL_PATH_SUPPORT_PORTD())
2651 {
2652 if(bPathEnable && (_mhal_mhl_CheckClockStatus(ucCbusSelect)))
2653 {
2654 if(ucStableCount < (MHL_CDR_FORCE_THRESHOLD +1))
2655 {
2656 ucStableCount++;
2657 }
2658
2659 if(!bPLLPower[ucCbusSelect])
2660 {
2661 bPLLPower[ucCbusSelect] = TRUE;
2662 }
2663
2664 if((R2BYTE(REG_DVI_DTOP_DUAL_P3_31_L) &BIT(6)) == BIT(6)) // DE stable
2665 {
2666 if(ucStableCount < MHL_CDR_STABLE_THRESHOLD)
2667 {
2668 ucStableCount = MHL_CDR_STABLE_THRESHOLD;
2669 }
2670 else if(ucStableCount == (MHL_CDR_FORCE_THRESHOLD -1))
2671 {
2672 if(bECbusEnableFlag)
2673 {
2674 W2BYTEMSK(REG_DVI_DTOP_DUAL_P3_72_L, BIT(13), BIT(13));
2675 //MsOS_DelayTaskUs(1);
2676 W2BYTEMSK(REG_DVI_DTOP_DUAL_P3_72_L, 0, BIT(13));
2677
2678 msg_mhl(printf("** MHL toggle ~~~\r\n"));
2679 }
2680 }
2681 }
2682 else // DE unstable
2683 {
2684 if(ucStableCount >= MHL_CDR_STABLE_THRESHOLD)
2685 {
2686 ucStableCount = 0;
2687 }
2688 else if(ucStableCount == (MHL_CDR_STABLE_THRESHOLD -1))
2689 {
2690 msg_mhl(printf("** MHL time change toggle CDR mode\r\n"));
2691
2692 ucStableCount = 0;
2693 }
2694 }
2695 }
2696 else
2697 {
2698 if(bPLLPower[ucCbusSelect])
2699 {
2700 bPLLPower[ucCbusSelect] = FALSE;
2701 ucStableCount = 0;
2702 }
2703 }
2704 }
2705
2706 break;
2707 #endif
2708
2709 default:
2710
2711 break;
2712 };
2713
2714 if(ucStableCount >= MHL_CDR_FORCE_THRESHOLD)
2715 {
2716 bMHLSignalStable = TRUE;
2717 }
2718 else if(bMHLSignalStable)
2719 {
2720 bMHLSignalStable = FALSE;
2721 }
2722
2723 return bindex;
2724 }
2725
2726 //**************************************************************************
2727 // [Function Name]:
2728 // mhal_mhl_CbusIsolate()
2729 // [Description]
2730 // MHL cable isolate
2731 // [Arguments]:
2732 //
2733 // [Return]:
2734 //
2735 //**************************************************************************
mhal_mhl_CbusIsolate(MS_U8 ucCbusSelect,MS_BOOL bFlag)2736 void mhal_mhl_CbusIsolate(MS_U8 ucCbusSelect, MS_BOOL bFlag)
2737 {
2738 switch(ucCbusSelect)
2739 {
2740 #if(MHL_FUNCTION_SUPPORT_PORTA)
2741 case MHL_CBUS_SELECT_PORTA:
2742 if(GET_MHL_PATH_SUPPORT_PORTA())
2743 {
2744 if(bFlag)
2745 {
2746 W2BYTEMSK(REG_PM_MHL_CBUS_00, BIT(9), BIT(9) | BIT(8));
2747 }
2748 else
2749 {
2750 W2BYTEMSK(REG_PM_MHL_CBUS_00, 0, BIT(9) | BIT(8));
2751 }
2752 }
2753
2754 break;
2755 #endif
2756
2757 #if(MHL_FUNCTION_SUPPORT_PORTB)
2758 case MHL_CBUS_SELECT_PORTB:
2759 if(GET_MHL_PATH_SUPPORT_PORTB())
2760 {
2761
2762 }
2763
2764 break;
2765 #endif
2766
2767 #if(MHL_FUNCTION_SUPPORT_PORTC)
2768 case MHL_CBUS_SELECT_PORTC:
2769 if(GET_MHL_PATH_SUPPORT_PORTC())
2770 {
2771 if(bFlag)
2772 {
2773 W2BYTEMSK(REG_PM_MHL_CBUS_00, BIT(9), BIT(9) | BIT(8));
2774 }
2775 else
2776 {
2777 W2BYTEMSK(REG_PM_MHL_CBUS_00, 0, BIT(9) | BIT(8));
2778 }
2779 }
2780
2781 break;
2782 #endif
2783
2784 #if(MHL_FUNCTION_SUPPORT_PORTD)
2785 case MHL_CBUS_SELECT_PORTD:
2786 if(GET_MHL_PATH_SUPPORT_PORTD())
2787 {
2788 if(bFlag)
2789 {
2790 W2BYTEMSK(REG_PM_MHL_CBUS_00, BIT(9), BIT(9) | BIT(8));
2791 }
2792 else
2793 {
2794 W2BYTEMSK(REG_PM_MHL_CBUS_00, 0, BIT(9) | BIT(8));
2795 }
2796 }
2797
2798 break;
2799 #endif
2800
2801 default:
2802
2803 break;
2804 };
2805 }
2806
2807 //**************************************************************************
2808 // [Function Name]:
2809 // mhal_mhl_VbusCharge()
2810 // [Description]
2811 // MHL Vbus charge
2812 // [Arguments]:
2813 //
2814 // [Return]:
2815 //
2816 //**************************************************************************
mhal_mhl_VbusCharge(MS_U8 ucCbusSelect,MS_U8 bState)2817 void mhal_mhl_VbusCharge(MS_U8 ucCbusSelect, MS_U8 bState)
2818 {
2819 switch(ucCbusSelect)
2820 {
2821 #if(MHL_FUNCTION_SUPPORT_PORTA)
2822 case MHL_CBUS_SELECT_PORTA:
2823 if(GET_MHL_PATH_SUPPORT_PORTA())
2824 {
2825 if(bState == VBUS_SW_CHARGE)
2826 {
2827 W2BYTEMSK(REG_PM_MHL_CBUS_01, BMASK(1:0), BMASK(1:0));
2828 }
2829 else if(bState == VBUS_SW_UNCHARGE)
2830 {
2831 W2BYTEMSK(REG_PM_MHL_CBUS_01, BIT(1), BMASK(1:0));
2832 }
2833 else
2834 {
2835 W2BYTEMSK(REG_PM_MHL_CBUS_01, 0, BMASK(1:0));
2836 }
2837 }
2838
2839 break;
2840 #endif
2841
2842 #if(MHL_FUNCTION_SUPPORT_PORTB)
2843 case MHL_CBUS_SELECT_PORTB:
2844 if(GET_MHL_PATH_SUPPORT_PORTB())
2845 {
2846
2847 }
2848
2849 break;
2850 #endif
2851
2852 #if(MHL_FUNCTION_SUPPORT_PORTC)
2853 case MHL_CBUS_SELECT_PORTC:
2854 if(GET_MHL_PATH_SUPPORT_PORTC())
2855 {
2856 if(bState == VBUS_SW_CHARGE)
2857 {
2858 W2BYTEMSK(REG_PM_MHL_CBUS_01, BMASK(1:0), BMASK(1:0));
2859 }
2860 else if(bState == VBUS_SW_UNCHARGE)
2861 {
2862 W2BYTEMSK(REG_PM_MHL_CBUS_01, BIT(1), BMASK(1:0));
2863 }
2864 else
2865 {
2866 W2BYTEMSK(REG_PM_MHL_CBUS_01, 0, BMASK(1:0));
2867 }
2868 }
2869
2870 break;
2871 #endif
2872
2873 #if(MHL_FUNCTION_SUPPORT_PORTD)
2874 case MHL_CBUS_SELECT_PORTD:
2875 if(GET_MHL_PATH_SUPPORT_PORTD())
2876 {
2877 if(bState == VBUS_SW_CHARGE)
2878 {
2879 W2BYTEMSK(REG_PM_MHL_CBUS_01, BMASK(1:0), BMASK(1:0));
2880 }
2881 else if(bState == VBUS_SW_UNCHARGE)
2882 {
2883 W2BYTEMSK(REG_PM_MHL_CBUS_01, BIT(1), BMASK(1:0));
2884 }
2885 else
2886 {
2887 W2BYTEMSK(REG_PM_MHL_CBUS_01, 0, BMASK(1:0));
2888 }
2889 }
2890
2891 break;
2892 #endif
2893
2894 default:
2895
2896 break;
2897 };
2898 }
2899
2900 //**************************************************************************
2901 // [Function Name]:
2902 // mhal_mhl_CbusFloating()
2903 // [Description]
2904 // MHL cable floating
2905 // [Arguments]:
2906 //
2907 // [Return]:
2908 //
2909 //**************************************************************************
mhal_mhl_CbusFloating(MS_BOOL bFlag)2910 void mhal_mhl_CbusFloating(MS_BOOL bFlag)
2911 {
2912 if(bFlag)
2913 {
2914 W2BYTEMSK(REG_PM_MHL_CBUS_17, BIT(5), BIT(5));
2915 }
2916 else
2917 {
2918 W2BYTEMSK(REG_PM_MHL_CBUS_17, 0, BIT(5));
2919 }
2920 }
2921
2922 //**************************************************************************
2923 // [Function Name]:
2924 // mhal_mhl_CbusStucktoLow()
2925 // [Description]
2926 //
2927 // [Arguments]:
2928 //
2929 // [Return]:
2930 //
2931 //**************************************************************************
mhal_mhl_CbusStucktoLow(MS_BOOL bFlag)2932 void mhal_mhl_CbusStucktoLow(MS_BOOL bFlag)
2933 {
2934 if(bFlag)
2935 {
2936 W2BYTEMSK(REG_PM_MHL_CBUS_18, 0, BIT(1)); // cbus stuck to low int mask
2937 }
2938 else
2939 {
2940 W2BYTEMSK(REG_PM_MHL_CBUS_18, BIT(1), BIT(1)); // cbus stuck to low int mask
2941 }
2942
2943 W2BYTEMSK(REG_PM_MHL_CBUS_18, BIT(0), BIT(0)); // Clear cbus stuck to low int flag
2944 }
2945
2946 //**************************************************************************
2947 // [Function Name]:
2948 // mhal_mhl_CbusWakeupInterrupt()
2949 // [Description]
2950 //
2951 // [Arguments]:
2952 //
2953 // [Return]:
2954 //
2955 //**************************************************************************
mhal_mhl_CbusWakeupInterrupt(MS_BOOL bFlag)2956 void mhal_mhl_CbusWakeupInterrupt(MS_BOOL bFlag)
2957 {
2958 if(bFlag)
2959 {
2960 W2BYTEMSK(REG_PM_MHL_CBUS_18, 0, BIT(5)); // wake up pulse int mask
2961 }
2962 else
2963 {
2964 W2BYTEMSK(REG_PM_MHL_CBUS_18, BIT(5), BIT(5)); // wake up pulse int mask
2965 }
2966
2967 W2BYTEMSK(REG_PM_MHL_CBUS_18, BIT(4), BIT(4)); // Clear wake up pulse int flag
2968 }
2969
2970 //**************************************************************************
2971 // [Function Name]:
2972 // mhal_mhl_SetVenderID()
2973 // [Description]
2974 //
2975 // [Arguments]:
2976 //
2977 // [Return]:
2978 //
2979 //**************************************************************************
mhal_mhl_SetVenderID(MS_U8 ucVenderID)2980 void mhal_mhl_SetVenderID(MS_U8 ucVenderID)
2981 {
2982 W2BYTEMSK(REG_MHL_CBUS_00, (ucVenderID << 8), BMASK(15:8));
2983 }
2984
2985 //**************************************************************************
2986 // [Function Name]:
2987 // mhal_mhl_LoadEDID()
2988 // [Description]
2989 //
2990 // [Arguments]:
2991 //
2992 // [Return]:
2993 //
2994 //**************************************************************************
mhal_mhl_LoadEDID(MS_U8 * edid)2995 void mhal_mhl_LoadEDID(MS_U8 *edid)
2996 {
2997 MS_U16 ustemp = 0;
2998
2999 if(edid != NULL)
3000 {
3001 // Load EDID
3002 msg_mhl(printf("** Manhattan Load MHL EDID...\r\n"));
3003
3004 W2BYTEMSK(REG_MHL_CBUS_52, BIT(1), BIT(1)); // CPU write enable
3005
3006 for(ustemp = 0; ustemp <256; ustemp++)
3007 {
3008 W2BYTEMSK(REG_MHL_CBUS_52, ustemp <<8, 0xFF00); // address
3009 W2BYTEMSK(REG_MHL_CBUS_53, edid[ustemp], 0x00FF); // data
3010 W2BYTEMSK(REG_MHL_CBUS_52, BIT(0), BIT(0)); // write trigger
3011 W2BYTEMSK(REG_MHL_CBUS_52, 0, BIT(0));
3012 while(R2BYTE(REG_MHL_CBUS_52) & BIT(5));
3013 }
3014
3015 W2BYTEMSK(REG_MHL_CBUS_52, 0, BIT(1)); // CPU write disable
3016 }
3017 }
3018
3019 //**************************************************************************
3020 // [Function Name]:
3021 // mhal_mhl_ReadEDID()
3022 // [Description]
3023 //
3024 // [Arguments]:
3025 //
3026 // [Return]:
3027 //
3028 //**************************************************************************
mhal_mhl_ReadEDID(MS_U16 usSize,MS_U8 * edid)3029 void mhal_mhl_ReadEDID(MS_U16 usSize, MS_U8 *edid)
3030 {
3031 MS_U16 ustemp = 0;
3032
3033 if(edid != NULL)
3034 {
3035 // Read EDID
3036 msg_mhl(printf("** Manhattan Read MHL EDID...\r\n"));
3037
3038 for(ustemp = 0; ustemp < usSize; ustemp++)
3039 {
3040 W2BYTEMSK(REG_MHL_CBUS_52, ustemp <<8, 0xFF00); // address
3041 W2BYTEMSK(REG_MHL_CBUS_52, BIT(3), BIT(3)); // read trigger
3042 W2BYTEMSK(REG_MHL_CBUS_52, 0, BIT(0));
3043 while(R2BYTE(REG_MHL_CBUS_52) & BIT(4));
3044
3045 edid[ustemp] = (MS_U8)((R2BYTE(REG_MHL_CBUS_53) & 0xFF00) >> 8); // data
3046 }
3047 }
3048 }
3049
3050 //**************************************************************************
3051 // [Function Name]:
3052 // mhal_mhl_LoadDeviceCapability()
3053 // [Description]
3054 //
3055 // [Arguments]:
3056 //
3057 // [Return]:
3058 //
3059 //**************************************************************************
mhal_mhl_LoadDeviceCapability(MS_U8 * devcap)3060 void mhal_mhl_LoadDeviceCapability(MS_U8 *devcap)
3061 {
3062 MS_U8 ucIndex = 0;
3063 MS_U8 uctemp = 0;
3064
3065 if(devcap != NULL)
3066 {
3067 msg_mhl(printf("** Manhattan Load DevCap...\r\n"));
3068
3069 // Load MHL device capability
3070 for(uctemp = 0; uctemp <8; uctemp++)
3071 {
3072 if(uctemp == 2)
3073 {
3074 ucIndex = 1;
3075 }
3076
3077 W2BYTE(REG_MHL_CBUS_01 +(uctemp *2), (devcap[(uctemp *2) +1 -ucIndex] <<8) | devcap[uctemp *2 -ucIndex]);
3078 }
3079
3080 W2BYTE(REG_MHL_CBUS_03, (devcap[3] <<8) | devcap[4]);
3081 W2BYTE(REG_MHL_CBUS_07, (devcap[11] <<8) | devcap[12]);
3082
3083 W2BYTEMSK(REG_MHL_CBUS_09, devcap[15], BMASK(7:0));
3084
3085 for(uctemp = 0; uctemp <2; uctemp++)
3086 {
3087 W2BYTE(REG_MHL_CBUS_19 +(uctemp *2), (devcap[(uctemp *2) +17] <<8) | devcap[(uctemp *2) +16]); // [15:0], MHL_ECBUS_SPEEDS
3088 }
3089 }
3090 }
3091
3092 //**************************************************************************
3093 // [Function Name]:
3094 // mhal_mhl_initial()
3095 // [Description]
3096 // MHL init
3097 // [Arguments]:
3098 // *edid: MHL EDID data
3099 // *devcap: MHL device capability
3100 // [Return]:
3101 //
3102 //**************************************************************************
mhal_mhl_initial(MS_U8 * edid,MS_U8 * devcap,MS_U8 ucVenderID)3103 MS_U8 mhal_mhl_initial(MS_U8 *edid, MS_U8 *devcap, MS_U8 ucVenderID)
3104 {
3105 MS_U16 uctemp = 0;
3106
3107 // Initial setting
3108 for(uctemp = 0; uctemp <(sizeof(tMHL_INITIAL_TABLE) /sizeof(msLoadTbl_S)); uctemp++)
3109 {
3110 W2BYTEMSK(tMHL_INITIAL_TABLE[uctemp].addr, tMHL_INITIAL_TABLE[uctemp].databuf, tMHL_INITIAL_TABLE[uctemp].mask);
3111 }
3112
3113 // ECbus initial setting
3114 _mhal_mhl_ECbusInitialSetting();
3115
3116 W2BYTEMSK(REG_PM_SLEEP_72_L, BMASK(7:6), BMASK(8:6)); // [8]: reg_cbus_debug_sel, [7]: reg_vbus_en_sel , [6]: reg_mhl_cable_detect_sel
3117
3118 _mhal_mhl_CbusAndClockSelect();
3119
3120 #if(MHL_INTERRUPT_USE_PM_IRQ)
3121 // Open PM irq mask
3122 W2BYTEMSK(0x2B28, 0, BIT(11));
3123 #endif
3124
3125 // Load EDID
3126 mhal_mhl_LoadEDID(edid);
3127
3128 // Load vendor ID
3129 mhal_mhl_SetVenderID(ucVenderID);
3130
3131 // Load DevCap
3132 mhal_mhl_LoadDeviceCapability(devcap);
3133
3134 // Clear Cbus received interrupt status
3135 W2BYTEMSK(REG_MHL_CBUS_3A, BIT(4)|BIT(0), BIT(4)|BIT(1)|BIT(0)); // [1]: receive packet valid mask
3136
3137 mhal_mhl_CbusStucktoLow(FALSE);
3138 mhal_mhl_CbusWakeupInterrupt(FALSE);
3139
3140 _mhal_mhl_MHLForceToAttach();
3141
3142 for(uctemp = 0; uctemp < MHL_CBUS_SELECT_MASK; uctemp++)
3143 {
3144 _mhal_mhl_RtermHWControl(uctemp, FALSE);
3145 }
3146
3147 _mhal_mhl_ForcePullDown100K(TRUE);
3148
3149 mhal_mhl_CbusFloating(TRUE);
3150
3151 return MHL_CHIP_FUNCTION_CAPABILITY;
3152 }
3153
3154 //**************************************************************************
3155 // [Function Name]:
3156 // mhal_mhl_InvertCableDetect()
3157 // [Description]
3158 //
3159 // [Arguments]:
3160 //
3161 // [Return]:
3162 //
3163 //**************************************************************************
mhal_mhl_InvertCableDetect(MS_U8 ucCbusSelect,MS_BOOL bCableDetectInvert)3164 void mhal_mhl_InvertCableDetect(MS_U8 ucCbusSelect, MS_BOOL bCableDetectInvert)
3165 {
3166 switch(ucCbusSelect)
3167 {
3168 #if(MHL_FUNCTION_SUPPORT_PORTA)
3169 case MHL_CBUS_SELECT_PORTA:
3170 if(GET_MHL_PATH_SUPPORT_PORTA())
3171 {
3172 W2BYTEMSK(REG_PM_MHL_CBUS_00, bCableDetectInvert? BIT(11): 0, BIT(11));
3173 }
3174
3175 break;
3176 #endif
3177
3178 #if(MHL_FUNCTION_SUPPORT_PORTB)
3179 case MHL_CBUS_SELECT_PORTB:
3180 if(GET_MHL_PATH_SUPPORT_PORTB())
3181 {
3182
3183 }
3184
3185 break;
3186 #endif
3187
3188 #if(MHL_FUNCTION_SUPPORT_PORTC)
3189 case MHL_CBUS_SELECT_PORTC:
3190 if(GET_MHL_PATH_SUPPORT_PORTC())
3191 {
3192 W2BYTEMSK(REG_PM_MHL_CBUS_00, bCableDetectInvert? BIT(11): 0, BIT(11));
3193 }
3194
3195 break;
3196 #endif
3197
3198 #if(MHL_FUNCTION_SUPPORT_PORTD)
3199 case MHL_CBUS_SELECT_PORTD:
3200 if(GET_MHL_PATH_SUPPORT_PORTD())
3201 {
3202 W2BYTEMSK(REG_PM_MHL_CBUS_00, bCableDetectInvert? BIT(11): 0, BIT(11));
3203 }
3204
3205 break;
3206 #endif
3207
3208 default:
3209
3210 break;
3211 };
3212 }
3213
3214 //**************************************************************************
3215 // [Function Name]:
3216 // mhal_mhl_VbusConfigSetting()
3217 // [Description]
3218 //
3219 // [Arguments]:
3220 //
3221 // [Return]:
3222 //
3223 //**************************************************************************
mhal_mhl_VbusConfigSetting(MS_U8 ucCbusSelect,MS_U8 ucState)3224 void mhal_mhl_VbusConfigSetting(MS_U8 ucCbusSelect, MS_U8 ucState)
3225 {
3226 MS_U8 ucOutputState = ucState &(MHL_VBUS_LOW_ENABLE_MODE | MHL_VBUS_HIGH_ENABLE_MODE);
3227
3228 ucState = ucState &(MHL_VBUS_OUTPUT_MODE | MHL_VBUS_INVERSE_MODE);
3229
3230 switch(ucCbusSelect)
3231 {
3232 #if(MHL_FUNCTION_SUPPORT_PORTA)
3233 case MHL_CBUS_SELECT_PORTA:
3234 if(GET_MHL_PATH_SUPPORT_PORTA())
3235 {
3236 if(ucState == MHL_VBUS_OUTPUT_MODE)
3237 {
3238 W2BYTEMSK(REG_PM_MHL_CBUS_31, BIT(0), BIT(0));
3239 W2BYTEMSK(REG_PM_MHL_CBUS_21, BIT(7), BIT(7));
3240 }
3241 else if(ucState > 0)
3242 {
3243 W2BYTEMSK(REG_PM_MHL_CBUS_31, BIT(0), BIT(0));
3244 }
3245
3246 if(ucOutputState > 0)
3247 {
3248 if(ucOutputState == MHL_VBUS_HIGH_ENABLE_MODE)
3249 {
3250 W2BYTEMSK(REG_PM_MHL_CBUS_20, 0, BMASK(9:8));
3251 }
3252 else
3253 {
3254 W2BYTEMSK(REG_PM_MHL_CBUS_20, BIT(9), BMASK(9:8));
3255 }
3256 }
3257 }
3258
3259 break;
3260 #endif
3261
3262 #if(MHL_FUNCTION_SUPPORT_PORTB)
3263 case MHL_CBUS_SELECT_PORTB:
3264 if(GET_MHL_PATH_SUPPORT_PORTB())
3265 {
3266
3267 }
3268
3269 break;
3270 #endif
3271
3272 #if(MHL_FUNCTION_SUPPORT_PORTC)
3273 case MHL_CBUS_SELECT_PORTC:
3274 if(GET_MHL_PATH_SUPPORT_PORTC())
3275 {
3276 if(ucState == MHL_VBUS_OUTPUT_MODE)
3277 {
3278 W2BYTEMSK(REG_PM_MHL_CBUS_31, BIT(0), BIT(0));
3279 W2BYTEMSK(REG_PM_MHL_CBUS_21, BIT(7), BIT(7));
3280 }
3281 else if(ucState > 0)
3282 {
3283 W2BYTEMSK(REG_PM_MHL_CBUS_31, BIT(0), BIT(0));
3284 }
3285
3286 if(ucOutputState > 0)
3287 {
3288 if(ucOutputState == MHL_VBUS_HIGH_ENABLE_MODE)
3289 {
3290 W2BYTEMSK(REG_PM_MHL_CBUS_20, 0, BMASK(9:8));
3291 }
3292 else
3293 {
3294 W2BYTEMSK(REG_PM_MHL_CBUS_20, BIT(9), BMASK(9:8));
3295 }
3296 }
3297 }
3298
3299 break;
3300 #endif
3301
3302 #if(MHL_FUNCTION_SUPPORT_PORTD)
3303 case MHL_CBUS_SELECT_PORTD:
3304 if(GET_MHL_PATH_SUPPORT_PORTD())
3305 {
3306 if(ucState == MHL_VBUS_OUTPUT_MODE)
3307 {
3308 W2BYTEMSK(REG_PM_MHL_CBUS_31, BIT(0), BIT(0));
3309 W2BYTEMSK(REG_PM_MHL_CBUS_21, BIT(7), BIT(7));
3310 }
3311 else if(ucState > 0)
3312 {
3313 W2BYTEMSK(REG_PM_MHL_CBUS_31, BIT(0), BIT(0));
3314 }
3315
3316 if(ucOutputState > 0)
3317 {
3318 if(ucOutputState == MHL_VBUS_HIGH_ENABLE_MODE)
3319 {
3320 W2BYTEMSK(REG_PM_MHL_CBUS_20, 0, BMASK(9:8));
3321 }
3322 else
3323 {
3324 W2BYTEMSK(REG_PM_MHL_CBUS_20, BIT(9), BMASK(9:8));
3325 }
3326 }
3327 }
3328
3329 break;
3330 #endif
3331
3332 default:
3333
3334 break;
3335 };
3336 }
3337
3338 //**************************************************************************
3339 // [Function Name]:
3340 // mhal_mhl_CableDetectPadSetting()
3341 // [Description]
3342 //
3343 // [Arguments]:
3344 //
3345 // [Return]:
3346 //
3347 //**************************************************************************
mhal_mhl_CableDetectPadSetting(MS_U8 ucSelect)3348 void mhal_mhl_CableDetectPadSetting(MS_U8 ucSelect)
3349 {
3350 // Nothing
3351 }
3352
3353 //**************************************************************************
3354 // [Function Name]:
3355 // mhal_mhl_CbusPadConfigSwitch()
3356 // [Description]
3357 //
3358 // [Arguments]:
3359 //
3360 // [Return]:
3361 //
3362 //**************************************************************************
mhal_mhl_CbusPadConfigSwitch(MS_U8 ucCbusSelect,MS_BOOL bFlag)3363 void mhal_mhl_CbusPadConfigSwitch(MS_U8 ucCbusSelect, MS_BOOL bFlag)
3364 {
3365 switch(ucCbusSelect)
3366 {
3367 #if(MHL_FUNCTION_SUPPORT_PORTA)
3368 case MHL_CBUS_SELECT_PORTA:
3369 if(GET_MHL_PATH_SUPPORT_PORTA())
3370 {
3371 if(bFlag)
3372 {
3373 _mhal_mhl_MHLForceToAttach();
3374 mhal_mhl_VbusCharge(ucCbusSelect, VBUS_HW_DETECT);
3375 }
3376 else
3377 {
3378 _mhal_mhl_CbusForceToStandby();
3379 mhal_mhl_VbusCharge(ucCbusSelect, VBUS_SW_UNCHARGE);
3380 }
3381 }
3382
3383 break;
3384 #endif
3385
3386 #if(MHL_FUNCTION_SUPPORT_PORTB)
3387 case MHL_CBUS_SELECT_PORTB:
3388 if(GET_MHL_PATH_SUPPORT_PORTB())
3389 {
3390
3391 }
3392
3393 break;
3394 #endif
3395
3396 #if(MHL_FUNCTION_SUPPORT_PORTC)
3397 case MHL_CBUS_SELECT_PORTC:
3398 if(GET_MHL_PATH_SUPPORT_PORTC())
3399 {
3400 if(bFlag)
3401 {
3402 _mhal_mhl_MHLForceToAttach();
3403 mhal_mhl_VbusCharge(ucCbusSelect, VBUS_HW_DETECT);
3404 }
3405 else
3406 {
3407 _mhal_mhl_CbusForceToStandby();
3408 mhal_mhl_VbusCharge(ucCbusSelect, VBUS_SW_UNCHARGE);
3409 }
3410 }
3411
3412 break;
3413 #endif
3414
3415 #if(MHL_FUNCTION_SUPPORT_PORTD)
3416 case MHL_CBUS_SELECT_PORTD:
3417 if(GET_MHL_PATH_SUPPORT_PORTD())
3418 {
3419 if(bFlag)
3420 {
3421 _mhal_mhl_MHLForceToAttach();
3422 mhal_mhl_VbusCharge(ucCbusSelect, VBUS_HW_DETECT);
3423 }
3424 else
3425 {
3426 _mhal_mhl_CbusForceToStandby();
3427 mhal_mhl_VbusCharge(ucCbusSelect, VBUS_SW_UNCHARGE);
3428 }
3429 }
3430
3431 break;
3432 #endif
3433
3434 default:
3435
3436 break;
3437 };
3438 }
3439
3440 //**************************************************************************
3441 // [Function Name]:
3442 // _mhal_mhl_CbusStatus()
3443 // [Description]:
3444 // MHL Cbus status
3445 // [Arguments]:
3446 //
3447 // [Return]:
3448 // Cbus status value
3449 //**************************************************************************
mhal_mhl_CbusStatus(void)3450 MS_U16 mhal_mhl_CbusStatus(void)
3451 {
3452 return (R2BYTE(REG_PM_MHL_CBUS_17));
3453 }
3454
3455 //**************************************************************************
3456 // [Function Name]:
3457 // mhal_mhl_CbusIsMscMsgReceived()
3458 // [Description]
3459 // MHL Cbus check whether msc message is received or not
3460 // [Arguments]:
3461 //
3462 // [Return]:
3463 // TRUE: recieved
3464 // FALSE: not yet
3465 //**************************************************************************
mhal_mhl_CbusIsMscMsgReceived(void)3466 MS_BOOL mhal_mhl_CbusIsMscMsgReceived(void)
3467 {
3468 MS_BOOL bindex = ((R2BYTE(REG_MHL_CBUS_3A) &BIT(3)) ?TRUE: FALSE);
3469
3470 if(bindex)
3471 {
3472 W2BYTEMSK(REG_MHL_CBUS_3A, BIT(0), BIT(0));
3473 }
3474
3475 return bindex;
3476 }
3477
3478 //**************************************************************************
3479 // [Function Name]:
3480 // mhal_mhl_CbusStucktoLowFlag()
3481 // [Description]
3482 //
3483 // [Arguments]:
3484 //
3485 // [Return]:
3486 //
3487 //**************************************************************************
mhal_mhl_CbusStucktoLowFlag(void)3488 MS_BOOL mhal_mhl_CbusStucktoLowFlag(void)
3489 {
3490 MS_BOOL bindex = ((R2BYTE(REG_PM_MHL_CBUS_18) &BIT(3)) ?TRUE: FALSE);
3491
3492 if(bindex)
3493 {
3494 W2BYTEMSK(REG_PM_MHL_CBUS_18, BIT(0), BIT(0));
3495 }
3496
3497 return bindex;
3498 }
3499
3500 //**************************************************************************
3501 // [Function Name]:
3502 // mhal_mhl_CbusWakeupIntFlag()
3503 // [Description]
3504 //
3505 // [Arguments]:
3506 //
3507 // [Return]:
3508 //
3509 //**************************************************************************
mhal_mhl_CbusWakeupIntFlag(void)3510 MS_BOOL mhal_mhl_CbusWakeupIntFlag(void)
3511 {
3512 MS_BOOL bindex = ((R2BYTE(REG_PM_MHL_CBUS_18) &BIT(7)) ?TRUE: FALSE);
3513
3514 if(bindex)
3515 {
3516 W2BYTEMSK(REG_PM_MHL_CBUS_18, BIT(4), BIT(4));
3517 }
3518
3519 return bindex;
3520 }
3521
3522 //**************************************************************************
3523 // [Function Name]:
3524 // mhal_mhl_GetECbusStateChangeFlag()
3525 // [Description]
3526 //
3527 // [Arguments]:
3528 //
3529 // [Return]:
3530 //
3531 //**************************************************************************
mhal_mhl_GetECbusStateChangeFlag(void)3532 MS_BOOL mhal_mhl_GetECbusStateChangeFlag(void)
3533 {
3534 MS_BOOL bindex = ((R2BYTE(REG_MHL_ECBUS_3A) &BIT(0)) ?TRUE: FALSE);
3535
3536 if(bindex)
3537 {
3538 W2BYTEMSK(REG_MHL_ECBUS_34, BIT(0), BIT(0));
3539
3540 _mhal_mhl_ECbusStateChangeProc();
3541 }
3542
3543 return bindex;
3544 }
3545
3546 //**************************************************************************
3547 // [Function Name]:
3548 // mhal_mhl_GetEMSCReceiveFlag()
3549 // [Description]
3550 //
3551 // [Arguments]:
3552 //
3553 // [Return]:
3554 //
3555 //**************************************************************************
mhal_mhl_GetEMSCReceiveFlag(void)3556 MS_BOOL mhal_mhl_GetEMSCReceiveFlag(void)
3557 {
3558 MS_BOOL bindex = ((R2BYTE(REG_MHL_ECBUS_3A) &BIT(12)) ?TRUE: FALSE);
3559
3560 if(bindex)
3561 {
3562 W2BYTEMSK(REG_MHL_ECBUS_34, BIT(12), BIT(12));
3563 }
3564
3565 return bindex;
3566 }
3567
3568 //**************************************************************************
3569 // [Function Name]:
3570 // mhal_mhl_GetEMSCSendStatus()
3571 // [Description]
3572 //
3573 // [Arguments]:
3574 //
3575 // [Return]:
3576 //
3577 //**************************************************************************
mhal_mhl_GetEMSCSendStatus(void)3578 MS_U8 mhal_mhl_GetEMSCSendStatus(void)
3579 {
3580 MS_U8 ucSendStatus = MHL_EMSC_SEND_NONE;
3581
3582 if(R2BYTE(REG_MHL_ECBUS_3A) &BIT(10)) // eMSC send pass interrupt.
3583 {
3584 W2BYTEMSK(REG_MHL_ECBUS_34, BIT(10), BIT(10)); // eMSC send pass clear
3585
3586 ucSendStatus = MHL_EMSC_SEND_PASS;
3587 }
3588 else if(R2BYTE(REG_MHL_ECBUS_3A) &BIT(9)) // eMSC send fail interrupt.
3589 {
3590 W2BYTEMSK(REG_MHL_ECBUS_34, BIT(9), BIT(9)); // eMSC send fail clear
3591
3592 ucSendStatus = MHL_EMSC_SEND_FAIL;
3593 }
3594
3595 return ucSendStatus;
3596 }
3597
3598 //**************************************************************************
3599 // [Function Name]:
3600 // mhal_mhl_CBusWrite()
3601 // [Description]
3602 // MHL Cbus write trigger
3603 // [Arguments]:
3604 // *pdatabuf: Cbus tx data
3605 // [Return]:
3606 //
3607 //**************************************************************************
mhal_mhl_CBusWrite(mhalCbusFifo_S * pdatabuf)3608 MS_BOOL mhal_mhl_CBusWrite(mhalCbusFifo_S *pdatabuf)
3609 {
3610 MS_U8 uctemp = 0;
3611
3612 if(_mhal_mhl_IsCbusBusy())
3613 {
3614 return FALSE;
3615 }
3616
3617 for(uctemp = 0; uctemp < pdatabuf->lens; uctemp++)
3618 {
3619 W2BYTE(REG_MHL_CBUS_26 +uctemp *2, pdatabuf->databuf[uctemp]);
3620 }
3621
3622 // clear the unsed parts
3623 W2BYTE(REG_MHL_CBUS_26 +((pdatabuf->lens) *2), 0);
3624
3625 W2BYTEMSK(REG_MHL_CBUS_25, BIT(12), BIT(12)); // trigger to send
3626
3627 #if(MHL_DEBUG_SEND_MSC)
3628 for(uctemp = 0; uctemp < pdatabuf->lens; uctemp++)
3629 {
3630 if((pdatabuf->databuf[uctemp]) &BIT(8))
3631 {
3632 msg_mhl(printf(" MHL send MSG command = %x\r\n", (pdatabuf->databuf[uctemp] &BMASK(7:0))));
3633 }
3634 else
3635 {
3636 msg_mhl(printf(" MHL send MSG data = %x\r\n", (pdatabuf->databuf[uctemp] &BMASK(7:0))));
3637 }
3638 }
3639
3640 #endif
3641
3642 return TRUE;
3643 }
3644
3645 //**************************************************************************
3646 // [Function Name]:
3647 // _mhal_mhl_Cbus_SetPathEn()
3648 // [Description]:
3649 // MHL Cbus set path enable
3650 // [Arguments]:
3651 // TRUE: Enable
3652 // FALSE: Disable
3653 // [Return]:
3654 //
3655 //**************************************************************************
mhal_mhl_Cbus_SetPathEn(MS_BOOL bflag)3656 void mhal_mhl_Cbus_SetPathEn(MS_BOOL bflag)
3657 {
3658 if(bflag) // set state to PATH_EN
3659 {
3660 W2BYTEMSK(REG_PM_MHL_CBUS_17, BIT(12), BIT(12));
3661 }
3662 else // clear state to not PATH_EN
3663 {
3664 W2BYTEMSK(REG_PM_MHL_CBUS_17, BIT(13), BIT(13));
3665 }
3666 }
3667
3668 //**************************************************************************
3669 // [Function Name]:
3670 // mhal_mhl_CbusIntCB()
3671 // [Description]
3672 // MHL Cbus Interrupt Call Back function
3673 // [Arguments]:
3674 // *rcstate: recevied state, 0:normal / 1:timeout
3675 // *rccmd: recevied command
3676 // *rcdata: recevied data
3677 // *rclen: received length
3678 // *bIsCmdInData: Is command in data field
3679 // [Return]:
3680 //
3681 //**************************************************************************
mhal_mhl_CbusIntCB(MS_U8 * rcstate,MS_U8 * rccmd,MS_U8 * rcdata,MS_U8 * rclen,MS_U8 * bIsCmdInData)3682 MS_BOOL mhal_mhl_CbusIntCB(MS_U8 *rcstate, MS_U8 *rccmd, MS_U8 *rcdata, MS_U8 *rclen, MS_U8 *bIsCmdInData)
3683 {
3684 MS_BOOL bindex = FALSE;
3685 MS_U8 uctemp = 0;
3686 MS_U16 reg_val;
3687
3688 *rcstate = R2BYTE(REG_MHL_CBUS_3B) & 0x000F; // received state, 0: normal, 1: timeout
3689
3690 //W2BYTEMSK(REG_MHL_CBUS_3A, BIT(0), BIT(0)); // clear INT
3691
3692 reg_val = R2BYTE(REG_MHL_CBUS_3C);
3693
3694 if(!(reg_val &BIT(8))) // Received data
3695 {
3696 bindex = TRUE;
3697 }
3698
3699 *rccmd = reg_val & 0x00FF;
3700 *bIsCmdInData = FALSE;
3701
3702 for(uctemp = 0; uctemp <=(MHL_CBUS_DATA_SIZE +1); uctemp++) // offset+16bytes+EOF
3703 {
3704 reg_val = R2BYTE(REG_MHL_CBUS_3D +(uctemp *2));
3705
3706 if(reg_val & BIT(15))
3707 {
3708 rcdata[uctemp] = reg_val & 0x00FF;
3709
3710 if(((uctemp <= 2) ||(uctemp == (MHL_CBUS_DATA_SIZE +1))) && !(*bIsCmdInData))
3711 {
3712 *bIsCmdInData = (reg_val & BIT(8)) ? TRUE : FALSE;
3713 }
3714 }
3715 else
3716 {
3717 *rclen = uctemp;
3718 break;
3719 }
3720 }
3721
3722 // CTS 6.3.11.19
3723 if(uctemp >(MHL_CBUS_DATA_SIZE +1))
3724 {
3725 *rclen = MHL_CBUS_DATA_SIZE +2;
3726 }
3727
3728 W2BYTEMSK(REG_MHL_CBUS_3A, BIT(4), BIT(4)); // clear received FIFO
3729
3730 return bindex;
3731 }
3732
3733 //**************************************************************************
3734 // [Function Name]:
3735 // mdrv_mhl_CBusCheckBCHError()
3736 // [Description]:
3737 // MHL Cbus check BCH error
3738 // [Arguments]:
3739 //
3740 // [Return]:
3741 //
3742 //**************************************************************************
mhal_mhl_CBusCheckBCHError(void)3743 MS_BOOL mhal_mhl_CBusCheckBCHError(void)
3744 {
3745 MS_BOOL bindex = FALSE;
3746
3747 return bindex;
3748 }
3749
3750 //**************************************************************************
3751 // [Function Name]:
3752 // mhal_mhl_CablePlugProc()
3753 // [Description]
3754 //
3755 // [Arguments]:
3756 //
3757 // [Return]:
3758 //
3759 //**************************************************************************
mhal_mhl_CablePlugProc(MS_U8 ucCbusSelect)3760 void mhal_mhl_CablePlugProc(MS_U8 ucCbusSelect)
3761 {
3762 _mhal_mhl_RxRtermControl(ucCbusSelect, RX_RTERM_OFF);
3763
3764 #if(DMHL_LG_PRADA_PATCH)
3765 _mhal_mhl_AdjustCommonModeResistor(ucCbusSelect, TRUE);
3766 #endif
3767
3768 _mhal_mhl_Mhl24bitsModeSetting(ucCbusSelect);
3769
3770 if(mhal_mhl_CheckInputPort(ucCbusSelect))
3771 {
3772 _mhal_mhl_AudioPathSelect(TRUE);
3773 }
3774
3775 _mhal_mhl_ForcePullDown100K(FALSE);
3776 }
3777
3778 //**************************************************************************
3779 // [Function Name]:
3780 // mhal_mhl_CableRemoveProc()
3781 // [Description]
3782 //
3783 // [Arguments]:
3784 //
3785 // [Return]:
3786 //
3787 //**************************************************************************
mhal_mhl_CableRemoveProc(MS_U8 ucCbusSelect)3788 void mhal_mhl_CableRemoveProc(MS_U8 ucCbusSelect)
3789 {
3790 _mhal_mhl_RxRtermControl(ucCbusSelect, RX_HDMI_RTERM);
3791
3792 _mhal_mhl_HdmiBypassModeSetting(ucCbusSelect);
3793
3794 // Disable ECbus state change IRQ
3795 _mhal_mhl_SetECbusStateChangeInterrupt(FALSE);
3796 // Disable eMSC receive IRQ
3797 _mhal_mhl_SetEMSCReceiveInterrupt(FALSE);
3798
3799 if(mhal_mhl_CheckInputPort(ucCbusSelect))
3800 {
3801 _mhal_mhl_AudioPathSelect(FALSE);
3802 }
3803
3804 _mhal_mhl_ForcePullDown100K(TRUE);
3805
3806 _mhal_mhl_Version3PhyEnable(ucCbusSelect, FALSE);
3807 // Disable ECbus
3808 _mhal_mhl_ECbusEnableSetting(FALSE);
3809 // Set short read address to 0x08
3810 _mhal_mhl_SetShortReadAddress(FALSE);
3811 }
3812
3813 //**************************************************************************
3814 // [Function Name]:
3815 // mhal_mhl_CbusConnectProc()
3816 // [Description]
3817 //
3818 // [Arguments]:
3819 //
3820 // [Return]:
3821 //
3822 //**************************************************************************
mhal_mhl_CbusConnectProc(MS_U8 ucCbusSelect)3823 void mhal_mhl_CbusConnectProc(MS_U8 ucCbusSelect)
3824 {
3825 _mhal_mhl_RxRtermControl(ucCbusSelect, RX_MHL_RTERM);
3826
3827 #if(DMHL_LG_PRADA_PATCH)
3828 _mhal_mhl_AdjustCommonModeResistor(ucCbusSelect, FALSE);
3829 #endif
3830
3831 mhal_mhl_CbusStucktoLow(TRUE);
3832 }
3833
3834 //**************************************************************************
3835 // [Function Name]:
3836 // mhal_mhl_CbusStucktoLowProc()
3837 // [Description]
3838 //
3839 // [Arguments]:
3840 //
3841 // [Return]:
3842 //
3843 //**************************************************************************
mhal_mhl_CbusStucktoLowProc(MS_U8 ucCbusSelect)3844 void mhal_mhl_CbusStucktoLowProc(MS_U8 ucCbusSelect)
3845 {
3846 _mhal_mhl_RxRtermControl(ucCbusSelect, RX_RTERM_OFF);
3847
3848 #if(DMHL_LG_PRADA_PATCH)
3849 _mhal_mhl_AdjustCommonModeResistor(ucCbusSelect, TRUE);
3850 #endif
3851
3852 mhal_mhl_CDRModeMonitor(ucCbusSelect, FALSE);
3853 // Set short read address to 0x08
3854 _mhal_mhl_SetShortReadAddress(FALSE);
3855 }
3856
3857 //**************************************************************************
3858 // [Function Name]:
3859 // mhal_mhl_SourceChangeProc()
3860 // [Description]
3861 //
3862 // [Arguments]:
3863 //
3864 // [Return]:
3865 //
3866 //**************************************************************************
mhal_mhl_SourceChangeProc(MS_U8 ucCbusSelect)3867 void mhal_mhl_SourceChangeProc(MS_U8 ucCbusSelect)
3868 {
3869 MS_BOOL bLinkRate6GFlag = FALSE;
3870
3871 if(ucMHL3LinkRate == MHL_AV_LINK_600)
3872 {
3873 bLinkRate6GFlag = TRUE;
3874 }
3875
3876 if(mhal_mhl_CheckInputPort(ucCbusSelect))
3877 {
3878 _mhal_mhl_AudioPathSelect(TRUE);
3879 }
3880 else
3881 {
3882 _mhal_mhl_AudioPathSelect(FALSE);
3883 }
3884 }
3885
3886 //**************************************************************************
3887 // [Function Name]:
3888 // mhal_mhl_ClockModeSwitchProc()
3889 // [Description]
3890 //
3891 // [Arguments]:
3892 //
3893 // [Return]:
3894 //
3895 //**************************************************************************
mhal_mhl_ClockModeSwitchProc(MS_U8 ucCbusSelect,MS_BOOL bPPmode)3896 void mhal_mhl_ClockModeSwitchProc(MS_U8 ucCbusSelect, MS_BOOL bPPmode)
3897 {
3898 if(bPPmode)
3899 {
3900 _mhal_mhl_MhlPackedPixelModeSetting(ucCbusSelect);
3901 }
3902 else
3903 {
3904 _mhal_mhl_Mhl24bitsModeSetting(ucCbusSelect);
3905 }
3906 }
3907
3908 //**************************************************************************
3909 // [Function Name]:
3910 // mhal_mhl_CbusWakeupIntSetting()
3911 // [Description]
3912 //
3913 // [Arguments]:
3914 //
3915 // [Return]:
3916 //
3917 //**************************************************************************
mhal_mhl_CbusWakeupIntSetting(MS_U8 ucCbusSelect,MS_BOOL bFlag)3918 void mhal_mhl_CbusWakeupIntSetting(MS_U8 ucCbusSelect, MS_BOOL bFlag)
3919 {
3920 if(bFlag)
3921 {
3922 _mhal_mhl_CbusForceToStandby();
3923 mhal_mhl_CbusWakeupInterrupt(TRUE);
3924 mhal_mhl_VbusCharge(ucCbusSelect, VBUS_SW_CHARGE);
3925 }
3926 else
3927 {
3928 _mhal_mhl_MHLForceToAttach();
3929 mhal_mhl_CbusWakeupInterrupt(FALSE);
3930 mhal_mhl_VbusCharge(ucCbusSelect, VBUS_HW_DETECT);
3931 }
3932 }
3933
3934 //**************************************************************************
3935 // [Function Name]:
3936 // mhal_mhl_RtermControlHWMode()
3937 // [Description]
3938 //
3939 // [Arguments]:
3940 //
3941 // [Return]:
3942 //
3943 //**************************************************************************
mhal_mhl_RtermControlHWMode(MS_U8 ucCbusSelect,MS_BOOL bFlag)3944 void mhal_mhl_RtermControlHWMode(MS_U8 ucCbusSelect, MS_BOOL bFlag)
3945 {
3946 MS_U16 ustemp = mhal_mhl_CbusStatus();
3947
3948 if(!bFlag) // HW to SW control rterm
3949 {
3950 if((ustemp & BMASK(1:0)) == 0x03)
3951 {
3952 _mhal_mhl_RxRtermControl(ucCbusSelect, RX_MHL_RTERM);
3953 }
3954 else
3955 {
3956 _mhal_mhl_RxRtermControl(ucCbusSelect, RX_RTERM_OFF);
3957 }
3958 }
3959
3960 _mhal_mhl_RtermHWControl(ucCbusSelect, bFlag);
3961 }
3962
3963 //**************************************************************************
3964 // [Function Name]:
3965 // mhal_mhl_AdjustSettingIControl()
3966 // [Description]
3967 //
3968 // [Arguments]:
3969 //
3970 // [Return]:
3971 //
3972 //**************************************************************************
mhal_mhl_AdjustSettingIControl(MS_U8 ucIControl)3973 void mhal_mhl_AdjustSettingIControl(MS_U8 ucIControl)
3974 {
3975 ucIControlValue = ucIControl;
3976 }
3977
3978 //**************************************************************************
3979 // [Function Name]:
3980 // mhal_mhl_AdjustImpedanceSetting()
3981 // [Description]
3982 //
3983 // [Arguments]:
3984 //
3985 // [Return]:
3986 //
3987 //**************************************************************************
mhal_mhl_AdjustImpedanceSetting(MS_U8 ucImpedance)3988 void mhal_mhl_AdjustImpedanceSetting(MS_U8 ucImpedance)
3989 {
3990 ucImpedanceValue = ucImpedance;
3991 }
3992
3993 //**************************************************************************
3994 // [Function Name]:
3995 // mhal_mhl_GetSignalStableFlag()
3996 // [Description]
3997 //
3998 // [Arguments]:
3999 //
4000 // [Return]:
4001 //
4002 //**************************************************************************
mhal_mhl_GetSignalStableFlag(void)4003 MS_BOOL mhal_mhl_GetSignalStableFlag(void)
4004 {
4005 return bMHLSignalStable;
4006 }
4007
4008 //**************************************************************************
4009 // [Function Name]:
4010 // mhal_mhl_PowerControl()
4011 // [Description]
4012 // MHL power control
4013 // [Arguments]:
4014 //
4015 // [Return]:
4016 //
4017 //**************************************************************************
mhal_mhl_LoadPowerOnTbl(void)4018 void mhal_mhl_LoadPowerOnTbl(void)
4019 {
4020 MS_U8 uctemp = 0;
4021
4022 for(uctemp = 0; uctemp <(sizeof(tMHL_POWER_ON_TABLE) /sizeof(msLoadTbl_S)); uctemp++)
4023 {
4024 W2BYTEMSK(tMHL_POWER_ON_TABLE[uctemp].addr, tMHL_POWER_ON_TABLE[uctemp].databuf, tMHL_POWER_ON_TABLE[uctemp].mask);
4025 }
4026
4027 for(uctemp = 0; uctemp < MHL_CBUS_SELECT_MASK; uctemp++)
4028 {
4029 _mhal_mhl_RxRtermControl(uctemp, RX_HDMI_RTERM);
4030 }
4031 }
4032
mhal_mhl_LoadPowerStandbyTbl(void)4033 void mhal_mhl_LoadPowerStandbyTbl(void)
4034 {
4035 MS_U8 uctemp = 0;
4036
4037 //_mhal_mhl_CbusForceToStandby();
4038
4039 for(uctemp = 0; uctemp <(sizeof(tMHL_POWER_SAVING_TABLE) /sizeof(msLoadTbl_S)); uctemp++)
4040 {
4041 W2BYTEMSK(tMHL_POWER_SAVING_TABLE[uctemp].addr, tMHL_POWER_SAVING_TABLE[uctemp].databuf, tMHL_POWER_SAVING_TABLE[uctemp].mask);
4042 }
4043
4044 for(uctemp = 0; uctemp < MHL_CBUS_SELECT_MASK; uctemp++)
4045 {
4046 _mhal_mhl_RxRtermControl(uctemp, RX_RTERM_OFF);
4047 mhal_mhl_VbusCharge(uctemp, VBUS_SW_CHARGE);
4048 }
4049 }
4050
mhal_mhl_LoadPowerDownTbl(void)4051 void mhal_mhl_LoadPowerDownTbl(void)
4052 {
4053 MS_U8 uctemp = 0;
4054
4055 //_mhal_mhl_CbusForceToStandby();
4056
4057 for(uctemp = 0; uctemp <(sizeof(tMHL_POWER_DOWN_TABLE) /sizeof(msLoadTbl_S)); uctemp++)
4058 {
4059 W2BYTEMSK(tMHL_POWER_DOWN_TABLE[uctemp].addr, tMHL_POWER_DOWN_TABLE[uctemp].databuf, tMHL_POWER_DOWN_TABLE[uctemp].mask);
4060 }
4061
4062 for(uctemp = 0; uctemp < MHL_CBUS_SELECT_MASK; uctemp++)
4063 {
4064 _mhal_mhl_RxRtermControl(uctemp, RX_RTERM_OFF);
4065 }
4066 }
4067
4068 //**************************************************************************
4069 // [Function Name]:
4070 // mhal_mhl_SetHPD()
4071 // [Description]
4072 // config HPD in combo(MHL/HDMI) port A
4073 // [Arguments]:
4074 //
4075 // [Return]:
4076 //
4077 //**************************************************************************
mhal_mhl_SetHPD(MS_BOOL bflag)4078 void mhal_mhl_SetHPD(MS_BOOL bflag)
4079 {
4080 if(bflag) // HPD is high
4081 {
4082 W2BYTEMSK(REG_PM_MHL_CBUS_20, BIT(3), BMASK(4:3)); // [4]: output val, [3]: oen
4083 //msg_mhl(printf("**MHL_HPD is High"));
4084 }
4085 else // hpd is low
4086 {
4087 W2BYTEMSK(REG_PM_MHL_CBUS_20, 0, BMASK(4:3)); // [4]: output val, [3]: oen
4088 //msg_mhl(printf("**MHL_HPD is Low"));
4089 }
4090 }
4091
4092 //**************************************************************************
4093 // [Function Name]:
4094 // mhal_mhl_GetDDCErrorCode()
4095 // [Description]
4096 // Get DDC error code
4097 // [Arguments]:
4098 //
4099 // [Return]:
4100 //
4101 //**************************************************************************
mhal_mhl_GetDDCErrorCode(void)4102 MS_U8 mhal_mhl_GetDDCErrorCode(void)
4103 {
4104 return (R2BYTE(REG_MHL_CBUS_21)>>8);
4105 }
4106
4107 #if(MHL_CBUS_OPERATION_MODE == MHL_CBUS_HW_REPLY_MODE)
4108 //**************************************************************************
4109 // [Function Name]:
4110 // mhal_mhl_CheckSRAMReceiveBuffer()
4111 // [Description]
4112 //
4113 // [Arguments]:
4114 //
4115 // [Return]:
4116 //
4117 //**************************************************************************
mhal_mhl_CheckSRAMReceiveBuffer(void)4118 MS_BOOL mhal_mhl_CheckSRAMReceiveBuffer(void)
4119 {
4120 return ((R2BYTE(REG_MHL_CBUS_10) &BIT(4)) ?FALSE: TRUE);
4121 }
4122
4123 //**************************************************************************
4124 // [Function Name]:
4125 // mhal_mhl_GetSRAMReceiveData()
4126 // [Description]
4127 //
4128 // [Arguments]:
4129 //
4130 // [Return]:
4131 //
4132 //**************************************************************************
mhal_mhl_GetSRAMReceiveData(void)4133 MS_U16 mhal_mhl_GetSRAMReceiveData(void)
4134 {
4135 W2BYTEMSK(REG_MHL_CBUS_10, BIT(15), BIT(15));
4136
4137 while((R2BYTE(REG_MHL_CBUS_10) & BIT(14)) == BIT(14));
4138
4139 return R2BYTE(REG_MHL_CBUS_0F);
4140 }
4141
4142 #endif
4143
4144 #if(DMHL_TEST_SIGNAL_SUPPORT)
4145 //**************************************************************************
4146 // [Function Name]:
4147 // mhal_mhl_AdjustCommonModeResistor()
4148 // [Description]:
4149 //
4150 // [Arguments]:
4151 //
4152 // [Return]:
4153 //
4154 //**************************************************************************
mhal_mhl_TestSignal(MS_BOOL bflag)4155 void mhal_mhl_TestSignal(MS_BOOL bflag)
4156 {
4157 if(bflag)
4158 {
4159 W2BYTEMSK(0x001106, BIT(10), BIT(10));
4160 }
4161 else
4162 {
4163 W2BYTEMSK(0x001106, 0, BIT(10));
4164 }
4165 }
4166
4167 #endif
4168
4169 //**************************************************************************
4170 // [Function Name]:
4171 // mhal_mhl_SetMainLinkRate()
4172 // [Description]
4173 //
4174 // [Arguments]:
4175 //
4176 // [Return]:
4177 //
4178 //**************************************************************************
mhal_mhl_SetMainLinkRate(MS_U8 ucCbusSelect,MS_U8 ucLinkRate)4179 void mhal_mhl_SetMainLinkRate(MS_U8 ucCbusSelect, MS_U8 ucLinkRate)
4180 {
4181 MS_BOOL bLinkRate6GFlag = FALSE;
4182
4183 _mhal_mhl_Version3PhyEnable(ucCbusSelect, TRUE);
4184
4185 switch(ucCbusSelect)
4186 {
4187 #if(MHL_FUNCTION_SUPPORT_PORTA)
4188 case MHL_CBUS_SELECT_PORTA:
4189 if(GET_MHL_PATH_SUPPORT_PORTA())
4190 {
4191 if(ucLinkRate == MHL_AV_LINK_600)
4192 {
4193 bLinkRate6GFlag = TRUE;
4194 }
4195 else // MHL_AV_LINK_150 or MHL_AV_LINK_300
4196 {
4197
4198 }
4199
4200 W2BYTEMSK(REG_COMBO_PHY1_P0_0D_L, (ucLinkRate << 12), BMASK(13:12)); // [13:12]: Select MHL3 data rate
4201 }
4202
4203 break;
4204 #endif
4205
4206 #if(MHL_FUNCTION_SUPPORT_PORTB)
4207 case MHL_CBUS_SELECT_PORTB:
4208 if(GET_MHL_PATH_SUPPORT_PORTB())
4209 {
4210 if(ucLinkRate == MHL_AV_LINK_600)
4211 {
4212 bLinkRate6GFlag = TRUE;
4213 }
4214 else // MHL_AV_LINK_150 or MHL_AV_LINK_300
4215 {
4216
4217 }
4218
4219 W2BYTEMSK(REG_COMBO_PHY1_P1_0D_L, (ucLinkRate << 12), BMASK(13:12)); // [13:12]: Select MHL3 data rate
4220 }
4221
4222 break;
4223 #endif
4224
4225 #if(MHL_FUNCTION_SUPPORT_PORTC)
4226 case MHL_CBUS_SELECT_PORTC:
4227 if(GET_MHL_PATH_SUPPORT_PORTC())
4228 {
4229 if(ucLinkRate == MHL_AV_LINK_600)
4230 {
4231 bLinkRate6GFlag = TRUE;
4232 }
4233 else // MHL_AV_LINK_150 or MHL_AV_LINK_300
4234 {
4235
4236 }
4237
4238 W2BYTEMSK(REG_COMBO_PHY1_P2_0D_L, (ucLinkRate << 12), BMASK(13:12)); // [13:12]: Select MHL3 data rate
4239 }
4240
4241 break;
4242 #endif
4243
4244 #if(MHL_FUNCTION_SUPPORT_PORTD)
4245 case MHL_CBUS_SELECT_PORTD:
4246 if(GET_MHL_PATH_SUPPORT_PORTD())
4247 {
4248 if(ucLinkRate == MHL_AV_LINK_600)
4249 {
4250 bLinkRate6GFlag = TRUE;
4251 }
4252 else // MHL_AV_LINK_150 or MHL_AV_LINK_300
4253 {
4254
4255 }
4256
4257 W2BYTEMSK(REG_COMBO_PHY1_P3_0D_L, (ucLinkRate << 12), BMASK(13:12)); // [13:12]: Select MHL3 data rate
4258 }
4259
4260 break;
4261 #endif
4262
4263 default:
4264
4265 break;
4266 };
4267
4268 ucMHL3LinkRate = ucLinkRate;
4269 }
4270
4271 //**************************************************************************
4272 // [Function Name]:
4273 // mhal_mhl_GetECbusStatusFlag()
4274 // [Description]:
4275 //
4276 // [Arguments]:
4277 //
4278 // [Return]:
4279 //
4280 //**************************************************************************
mhal_mhl_GetECbusStatusFlag(void)4281 MS_U8 mhal_mhl_GetECbusStatusFlag(void)
4282 {
4283 MS_U8 ucTrainState = (R2BYTE(REG_MHL_ECBUS_PHY_69) >> 12);
4284 MS_U8 ucECbusStatusFlag = 0;
4285
4286 if((ucECbusTrainState < MHL_ECBUS_STATE_FAIL) && (ucECbusTrainState >= MHL_ECBUS_STATE_SOURCE_ACTIVE))
4287 {
4288 ucECbusStatusFlag |= MHL_ECBUS_STATUS_TRAINING_PASS;
4289 }
4290
4291 if(R2BYTE(REG_MHL_ECBUS_PHY_6F) &BIT(13)) // [13]: ECbus clock lock flag
4292 {
4293 ucECbusStatusFlag |= MHL_ECBUS_STATUS_CLOCK_LOCK;
4294 }
4295
4296 if((ucTrainState >= MHL_ECBUS_TRAIN_WAIT_RRCEIVE_COMMA2) && (ucTrainState <= MHL_ECBUS_TRAIN_DONE))//Whan state of REG_PM_MHL_CBUS2_56 is equla 3, than state of REG_PM_MHL_CBUS2_69[51:12] will from 1 to 7.
4297 {
4298 //W2BYTEMSK(REG_MHL_ECBUS_PHY_56, 0x0200, BMASK(15:0)); // for auto train
4299 #if(MHL_ECBUS_AUTO_TRAINING)
4300 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, 0, BIT(13));
4301 #endif
4302 }
4303
4304 if(R2BYTE(REG_MHL_ECBUS_3A) &BIT(7)) // REG_MHL_CBUS2_3A[7]
4305 {
4306 ucECbusStatusFlag |= MHL_ECBUS_STATUS_SLOT_SYNC_DONE;
4307 }
4308
4309 if(R2BYTE(REG_MHL_ECBUS_3A) &BIT(15)) // REG_MHL_CBUS2_3A[15]
4310 {
4311 ucECbusStatusFlag |= MHL_ECBUS_STATUS_EMSC_SYNC_DONE;
4312 }
4313
4314 if(ucECbusTrainFailCount > 10)
4315 {
4316 ucECbusStatusFlag |= MHL_ECBUS_STATUS_RETRY_TIMEOUT;
4317
4318 ucECbusTrainFailCount = 0;
4319 }
4320
4321 return ucECbusStatusFlag;
4322 }
4323
4324 //**************************************************************************
4325 // [Function Name]:
4326 // mhal_mhl_ECbusEventProc()
4327 // [Description]
4328 //
4329 // [Arguments]:
4330 //
4331 // [Return]:
4332 //
4333 //**************************************************************************
mhal_mhl_ECbusEventProc(MS_U8 ucCbusSelect,MS_U8 ucECbusEvent)4334 void mhal_mhl_ECbusEventProc(MS_U8 ucCbusSelect, MS_U8 ucECbusEvent)
4335 {
4336 static MS_U8 ucECbusState = MHL_ECBUS_STATE_DISABLE;
4337
4338 if(ucECbusTrainState != ucECbusState)
4339 {
4340 msg_mhl(printf("** MHL eCbus state %x\r\n", ucECbusTrainState));
4341
4342 ucECbusState = ucECbusTrainState;
4343 }
4344
4345 switch(ucECbusEvent)
4346 {
4347 case MHL_ECBUS_EVENT_PREPARE_MODE_UP:
4348 // Disable stuck to low interrupt
4349 mhal_mhl_CbusStucktoLow(FALSE);
4350 // Disable connect detect
4351 _mhal_mhl_CbusConnectCheckEnable(FALSE);
4352
4353 break;
4354
4355 case MHL_ECBUS_EVENT_MODE_UP_PROCESS:
4356 // Enable ECbus
4357 _mhal_mhl_ECbusEnableSetting(TRUE);
4358 // Set short read address to 0x70
4359 _mhal_mhl_SetShortReadAddress(TRUE);
4360 // Enable ECbus state change IRQ
4361 _mhal_mhl_SetECbusStateChangeInterrupt(TRUE);
4362 // Enable eMSC receive IRQ
4363 _mhal_mhl_SetEMSCReceiveInterrupt(TRUE);
4364
4365 _mhal_mhl_ECbusModeUpProc();
4366
4367 ucECbusTrainFailCount = 0;
4368
4369 break;
4370
4371 case MHL_ECBUS_EVENT_PREPARE_MODE_DOWN:
4372
4373 break;
4374
4375 case MHL_ECBUS_EVENT_MODE_DOWN_PROCESS:
4376 case MHL_ECBUS_EVENT_STUCK_TO_LOW:
4377 // Enable connect detect
4378 _mhal_mhl_CbusConnectCheckEnable(TRUE);
4379 // Disable ECbus
4380 _mhal_mhl_ECbusEnableSetting(FALSE);
4381 // Clear short read address to 0x08
4382 _mhal_mhl_SetShortReadAddress(FALSE);
4383 // Disable ECbus state change IRQ
4384 _mhal_mhl_SetECbusStateChangeInterrupt(FALSE);
4385 // Disable eMSC receive IRQ
4386 _mhal_mhl_SetEMSCReceiveInterrupt(FALSE);
4387 // Disable MHL3 phy
4388 _mhal_mhl_Version3PhyEnable(ucCbusSelect, FALSE);
4389 // Reset all status
4390 W2BYTE(REG_MHL_ECBUS_34, 0xFFFF);
4391
4392 _mhal_mhl_CbusEngineReset();
4393
4394 break;
4395
4396 case MHL_ECBUS_EVENT_UNLOCK_RESET:
4397 //_mhal_mhl_ECbusDmuxEnable(FALSE);
4398 _mhal_mhl_ECbusStateReset();
4399
4400 ucECbusTrainFailCount = 0;
4401
4402 break;
4403
4404 #if(MHL_ECBUS_COMMAND_PARSING)
4405 case MHL_ECBUS_EVENT_ECBUS_COMMAND_PARSING:
4406 _mhal_mhl_GetECbusCommand();
4407
4408 break;
4409
4410 #endif
4411
4412 default:
4413
4414 break;
4415 };
4416 }
4417
4418 //**************************************************************************
4419 // [Function Name]:
4420 // mhal_mhl_GetEMSCReceiveData()
4421 // [Description]
4422 //
4423 // [Arguments]:
4424 //
4425 // [Return]:
4426 //
4427 //**************************************************************************
mhal_mhl_GetEMSCReceiveData(MS_U8 * bReveiceEMSC)4428 void mhal_mhl_GetEMSCReceiveData(MS_U8 *bReveiceEMSC)
4429 {
4430 MS_U8 uctemp = 0;
4431 MS_U16 usEMSCFreeBuffer = 0;
4432
4433 usEMSCFreeBuffer = (R2BYTE(REG_MHL_ECBUS_24) &BMASK(9:0)); // REG_MHL_ECBUS_24[9:0]
4434
4435 usEMSCFreeBuffer = MHL_EMSC_DATA_SIZE - usEMSCFreeBuffer;
4436
4437 bReveiceEMSC[0] = usEMSCFreeBuffer;
4438
4439 msg_mhl(printf("** MHL eMSC length %d\r\n", usEMSCFreeBuffer));
4440
4441 for(uctemp = 0; uctemp < usEMSCFreeBuffer; uctemp++)
4442 {
4443 bReveiceEMSC[uctemp +1] = _mhal_mhl_GetSRAMReceiveEMSCData();
4444
4445 if(uctemp == 1) // Check length remaining
4446 {
4447 usEMSCFreeBuffer = bReveiceEMSC[uctemp +1] +2;
4448 }
4449
4450 msg_mhl(printf("** MHL eMSC data %x\r\n", bReveiceEMSC[uctemp +1]));
4451 }
4452
4453 W2BYTEMSK(REG_MHL_ECBUS_1C, usEMSCFreeBuffer, BMASK(9:0));
4454 W2BYTEMSK(REG_MHL_ECBUS_1C, BIT(15), BIT(15));
4455 }
4456
4457 //**************************************************************************
4458 // [Function Name]:
4459 // mhal_mhl_InsertEMSCSendData()
4460 // [Description]
4461 //
4462 // [Arguments]:
4463 //
4464 // [Return]:
4465 //
4466 //**************************************************************************
mhal_mhl_InsertEMSCSendData(MS_U8 ucLength,MS_U8 * bSendEMSC)4467 void mhal_mhl_InsertEMSCSendData(MS_U8 ucLength, MS_U8 *bSendEMSC)
4468 {
4469 MS_U8 uctemp = 0;
4470 MS_U16 usPayloadCRC = 0xFFFF;
4471
4472 if((ucLength > 0) && (bSendEMSC != NULL))
4473 {
4474 W2BYTEMSK(REG_MHL_ECBUS_1B, (ucLength -1), BMASK(9:0)); // Request command byte count
4475 W2BYTEMSK(REG_MHL_ECBUS_79, _mhal_mhl_GetEMSCTwoByteCRC(0, (ucLength -1)) , BMASK(2:0)); // byte count CRC
4476
4477 W2BYTEMSK(REG_MHL_ECBUS_21, 0, BMASK(9:0)); // SRAM address set 0
4478 W2BYTEMSK(REG_MHL_ECBUS_21, BIT(13), BIT(13)); // Trigger address
4479
4480 for(uctemp = 0; uctemp < ucLength; uctemp++)
4481 {
4482 _mhal_mhl_InsertSRAMSendEMSCData(bSendEMSC[uctemp]);
4483
4484 msg_mhl(printf("** MHL payload value %x\r\n", bSendEMSC[uctemp]));
4485
4486 usPayloadCRC = _mhal_mhl_GetEMSCPayloadCRC(bSendEMSC[uctemp], usPayloadCRC);
4487 }
4488
4489 W2BYTEMSK(REG_MHL_ECBUS_19, BIT(15), BIT(15)); // eMSC payload CRC ove
4490 W2BYTE(REG_MHL_ECBUS_1A, (usPayloadCRC ^0xFFFF)); // eMSC payload CRC value
4491
4492 msg_mhl(printf("** MHL payload CRC value %x\r\n", (usPayloadCRC ^0xFFFF)));
4493
4494 W2BYTEMSK(REG_MHL_ECBUS_1B, BIT(15), BIT(15)); // REG_MHL_ECBUS2_1B[15]
4495 }
4496 }
4497
4498 #endif // _MHAL_MHL_C_
4499
4500