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MStar hereby reserves the 91 // rights to any and all damages, losses, costs and expenses resulting therefrom. 92 // 93 //////////////////////////////////////////////////////////////////////////////// 94 95 #ifndef _HAL_GOP_H_ 96 #define _HAL_GOP_H_ 97 98 #include "drvGOP.h" 99 #include "regGOP.h" 100 101 #include "apiGOP.h" 102 103 //------------------------------------------------------------------------------------------------- 104 // Macro and Define 105 //------------------------------------------------------------------------------------------------- 106 #define Gop23_GwinCtl_Ofet 0UL 107 108 #define MAX_GOP_MIUCOUNT 3UL 109 #define MAX_GOP_MIUSEL MAX_GOP_MIUCOUNT-1 110 #define MAX_GOP_SUPPORT 5UL 111 #define MAX_GOP_MUX 5UL 112 #define MAX_GOP_MUX_SEL 5UL 113 #define MAX_GOP_MUX_OPNum MAX_GOP_MUX 114 #define MAX_GOP_DualMUX_Num 3UL 115 #define MAX_GOP0_GWIN 2UL 116 #define MAX_GOP1_GWIN 2UL 117 #define MAX_GOP2_GWIN 1UL 118 #define MAX_GOP3_GWIN 1UL 119 #define MAX_GOP4_GWIN 1UL 120 #define MAX_GOP5_GWIN 0UL 121 122 #define GOP0_Gwin0Id 0UL 123 #define GOP0_Gwin1Id 1UL 124 #define GOP1_Gwin0Id 2UL 125 #define GOP1_Gwin1Id 3UL 126 #define GOP2_Gwin0Id 4UL 127 #define GOP3_Gwin0Id 5UL 128 #define GOP4_Gwin0Id 6UL 129 #define GOP5_Gwin0Id 7UL 130 131 #define GOP0_REG_FORM E_GOP_REG_FORM_2G + E_GOP_PAL_SIZE_256 132 #define GOP1_REG_FORM E_GOP_REG_FORM_2G + E_GOP_PAL_SIZE_256 133 #define GOP2_REG_FORM E_GOP_REG_FORM_T81G + E_GOP_PAL_SIZE_NONE 134 #define GOP3_REG_FORM E_GOP_REG_FORM_T81G + E_GOP_PAL_SIZE_NONE 135 #define GOP4_REG_FORM E_GOP_REG_FORM_NONE 136 #define GOP5_REG_FORM E_GOP_REG_FORM_NONE 137 #define GOPD_REG_FORM E_GOPD_FIFO_DEPTH_64 138 139 140 #define GOP0_GwinIdBase GOP0_Gwin0Id 141 #define GOP1_GwinIdBase MAX_GOP0_GWIN 142 #define GOP2_GwinIdBase MAX_GOP0_GWIN + MAX_GOP1_GWIN 143 #define GOP3_GwinIdBase MAX_GOP0_GWIN + MAX_GOP1_GWIN + MAX_GOP2_GWIN 144 #define GOP4_GwinIdBase MAX_GOP0_GWIN + MAX_GOP1_GWIN + MAX_GOP2_GWIN + MAX_GOP3_GWIN 145 #define GOP5_GwinIdBase MAX_GOP0_GWIN + MAX_GOP1_GWIN + MAX_GOP2_GWIN + MAX_GOP3_GWIN + MAX_GOP4_GWIN 146 147 #define GOP_MIXER_MUX 6UL 148 149 150 #define GOP_BIT0 0x01 151 #define GOP_BIT1 0x02 152 #define GOP_BIT2 0x04 153 #define GOP_BIT3 0x08 154 #define GOP_BIT4 0x10 155 #define GOP_BIT5 0x20 156 #define GOP_BIT6 0x40 157 #define GOP_BIT7 0x80 158 #define GOP_BIT8 0x0100 159 #define GOP_BIT9 0x0200 160 #define GOP_BIT10 0x0400 161 #define GOP_BIT11 0x0800 162 #define GOP_BIT12 0x1000 163 #define GOP_BIT13 0x2000 164 #define GOP_BIT14 0x4000 165 #define GOP_BIT15 0x8000 166 167 #define GOP_REG_WORD_MASK 0xFFFFUL 168 #define GOP_REG_HW_MASK 0xFF00UL 169 #define GOP_REG_LW_MASK 0x00FFUL 170 171 #define GOP_WordUnit 32 172 #define GOP_DWIN_WordUnit 32UL 173 #define GOP_TotalGwinNum (MAX_GOP0_GWIN+MAX_GOP1_GWIN+MAX_GOP2_GWIN+MAX_GOP3_GWIN+MAX_GOP4_GWIN+MAX_GOP5_GWIN) 174 #define HAL_GOP_BankOffset(pGOPHalLocal) ((pGOPHalLocal)->bank_offset) 175 176 #define GOP_FIFO_BURST_ALL (GOP_BIT8|GOP_BIT9|GOP_BIT10|GOP_BIT11|GOP_BIT12) 177 #define GOP_FIFO_BURST_MIDDLE (GOP_BIT8|GOP_BIT9) 178 #define GOP_FIFO_BURST_SHORT (GOP_BIT8) 179 180 #define GOP_FIFO_BURST_MASK (GOP_BIT8|GOP_BIT9|GOP_BIT10|GOP_BIT11|GOP_BIT12) 181 #define GOP_FIFO_THRESHOLD 0xD0UL 182 183 #ifndef GOP_MIU0_LENGTH 184 #define GOP_MIU0_LENGTH HAL_MIU1_BASE 185 #endif 186 187 #define DWIN_SUPPORT_WINDOWDE_CAPTURE FALSE //HW issue, Not support it, should use FrameDE to capture video for DWIN 188 #define DWIN_SUPPORT_OSD_CAPTURE FALSE //Support it 189 #define DWIN_SUPPORT_CLOCK_GATING FALSE //Support it 190 191 #define ENABLE_GOP_T3DPATCH 192 #ifdef ENABLE_GOP_T3DPATCH 193 #define GOP_PD_T3D 0x15CUL 194 #define GOP_PD_NORMAL 0x79UL 195 #endif 196 197 // HW patch 198 // #define XC_FSC_FRC_PATCH 0 199 200 #define GOP_4K2K30 201 #define OUTPUT_VAILD_SIZE_PATCH 202 203 #define GOP_PUBLIC_UPDATE MAX_GOP_SUPPORT 204 205 #if (MAX_GOP_SUPPORT < 5) 206 #define GFLIP_REG_BANKS (MAX_GOP_SUPPORT * GOP_BANK_OFFSET) 207 #else 208 #define GFLIP_REG_BANKS (MAX_GOP_SUPPORT * GOP_BANK_OFFSET + 2) 209 #endif 210 #define GFLIP_REG16_NUM_PER_BANK 128UL 211 212 #define GPU_TILE_FORMAT_ARGB8888 0x5UL 213 214 #if (defined ANDROID) && (defined TV_OS) 215 #define GOP_CMDQ_ENABLE 216 #endif 217 218 #ifdef GOP_CMDQ_ENABLE 219 #include "drvCMDQ.h" 220 #endif 221 222 #define GOP_SUPPORT_SPLIT_MODE 1 223 #define GOP_SPLIT_SUPPORT_MAXW (512UL) 224 225 #define AFBC_ALIGN_FACTOR 16 226 227 #define VE_MUX_INIT_VALUE 5UL 228 229 //Gwin enable HW bug 230 #define GOP_AUTO_CLK_GATING_PATCH 231 232 /*the following is for parameters for shared between multiple process context*/ 233 typedef struct __attribute__((packed)) 234 { 235 GOP_CHIP_PROPERTY gopChipProperty; 236 MS_U16 u16GopSplitMode_LRWIDTH[SHARED_GOP_MAX_COUNT]; 237 DRV_GOPDstType GOP_Dst[SHARED_GOP_MAX_COUNT]; 238 }GOP_CTX_HAL_SHARED; 239 240 /*the following is for parameters for used in local process context*/ 241 typedef struct 242 { 243 GOP_CTX_HAL_SHARED *pHALShared; 244 MS_VIRT va_mmio_base; 245 MS_U32 bank_offset; 246 MS_U16 u16Clk0Setting; ///Backup Current GOPG clock setting 247 MS_U16 u16Clk1Setting; ///Backup Current GOPD clock setting 248 MS_U16 u16Clk2Setting; ///Backup Current SRAM clock setting 249 DRV_GOPDstType drvGFlipGOPDst[MAX_GOP_SUPPORT]; 250 GOP_CHIP_PROPERTY *pGopChipPro; 251 DRV_GOP_CONSALPHA_BITS User_ConsAlpha_bits; 252 253 /*check all gop dst is valid or not for each mux*/ 254 MS_BOOL *pbIsMuxVaildToGopDst; 255 }GOP_CTX_HAL_LOCAL; 256 257 typedef struct 258 { 259 GOP_CTX_HAL_LOCAL GOPHalSTRCtx; 260 MS_U16 BankReg[GFLIP_REG_BANKS][GFLIP_REG16_NUM_PER_BANK]; 261 MS_U16 CKG_GopReg[10]; 262 MS_U16 GS_GopReg[3]; 263 MS_U16 XC_GopReg[20]; 264 }GFLIP_REGS_SAVE_AREA; 265 266 //VE register bank 267 typedef enum 268 { 269 MS_VE_REG_BANK_3B, 270 MS_VE_REG_BANK_3E, 271 MS_VE_REG_BANK_3F, 272 } MS_VE_REG_BANK; 273 274 typedef enum 275 { 276 EN_OSD_0, 277 EN_OSD_1, 278 }EN_VE_OSD_ENABLE; 279 280 /*To write VE bank register*/ 281 extern void MApi_VE_W2BYTE_MSK(MS_VE_REG_BANK VE_BK, MS_U32 u32Reg, MS_U16 u16Val, MS_U16 u16Mask); 282 extern MS_U16 MApi_VE_R2BYTE_MSK(MS_VE_REG_BANK VE_BK, MS_U32 u32Reg, MS_U16 u16Mask); 283 284 //------------------------------------------------------------------------------------------------- 285 // Type and Structure 286 //------------------------------------------------------------------------------------------------- 287 typedef enum 288 { 289 E_GOP0 = 0, 290 E_GOP1 = 1, 291 E_GOP2 = 2, 292 E_GOP3 = 3, 293 E_GOP4 = 4, 294 E_GOP_Dwin = 5, 295 E_GOP_MIXER = 6, 296 E_GOP5 = 7, 297 }E_GOP_TYPE; 298 299 //------------------------------------------------------------------------------------------------- 300 // Function and Variable 301 //------------------------------------------------------------------------------------------------- 302 MS_BOOL _GetBnkOfstByGop(MS_U8 gop, MS_U32 *pBnkOfst); 303 void HAL_GOP_Init(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GOPNum); 304 void HAL_GOP_Init_Context(GOP_CTX_HAL_LOCAL *pGOPHalLocal, 305 GOP_CTX_HAL_SHARED *pHALShared, MS_BOOL bNeedInitShared); 306 void HAL_GOP_Chip_Proprity_Init(GOP_CTX_HAL_LOCAL *pGOPHalLocal); 307 void HAL_GOP_Restore_Ctx(GOP_CTX_HAL_LOCAL *pGOPHalLocal); 308 void HAL_GOP_Write16Reg(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U32 u32addr, MS_U16 u16val, MS_U16 mask); 309 void HAL_GOP_Write32Reg(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U32 u16addr, MS_U32 u32val); 310 void HAL_GOP_Write32Pal(GOP_CTX_HAL_LOCAL *pGOPHalLocal, 311 MS_U8* pREGMAP_Base, MS_U16 *pREGMAP_Offset, MS_U32 u32REGMAP_Len, 312 MS_U8 u8Index, MS_U8 u8A, MS_U8 u8R, MS_U8 u8G, MS_U8 u8B); 313 void HAL_GOP_Read16Reg(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U32 u16addr, MS_U16* pu16ret); 314 void HAL_GOP_GWIN_SetBlending(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8win, MS_BOOL bEnable, MS_U8 u8coef); 315 void HAL_GOP_SetIOMapBase(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_VIRT addr); 316 void HAL_GOP_SetIOFRCMapBase(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_VIRT addr); 317 void HAL_GOP_SetIOPMMapBase(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_VIRT addr); 318 void HAL_GOP_GWIN_GetMUX(GOP_CTX_HAL_LOCAL*pGOPHalLocal, MS_U8* u8GOPNum, Gop_MuxSel eGopMux); 319 void HAL_GOP_GWIN_SetMUX(GOP_CTX_HAL_LOCAL*pGOPHalLocal, MS_U8 u8GOPNum, Gop_MuxSel eGopMux); 320 void HAL_GOP_GetGOPEnum(GOP_CTX_HAL_LOCAL *pGOPHalLocal, GOP_TYPE_DEF* GOP_TYPE); 321 MS_U16 HAL_GOP_GetBPP(GOP_CTX_HAL_LOCAL *pGOPHalLocal, DRV_GOPColorType fbFmt); 322 GOP_Result HAL_GOP_SetGOPACKMask(GOP_CTX_HAL_LOCAL *pGOPHalLocal,MS_U16 u16GopMask); 323 GOP_Result HAL_GOP_SetGOPACK(GOP_CTX_HAL_LOCAL *pGOPHalLocal,MS_U8 gop); 324 MS_U16 HAL_GOP_GetGOPACK(GOP_CTX_HAL_LOCAL *pGOPHalLocal,MS_U8 gop); 325 MS_U8 HAL_GOP_GetMaxGwinNumByGOP(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GopNum); 326 MS_U8 HAL_GOP_SelGwinIdByGOP(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8Gop, MS_U8 u8Idx); 327 MS_U8 HAL_GOP_GetMIUDst(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 gopnum); 328 void HAL_GOP_SetIPSel2SC(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_IPSEL_GOP ipSelGop); 329 E_GOP_VIDEOTIMING_MIRRORTYPE HAL_GOP_GetVideoTimingMirrorType(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_BOOL bHorizontal); 330 MS_U8 HAL_GOP_GetDWINMIU(GOP_CTX_HAL_LOCAL *pGOPHalLocal); 331 GOP_Result HAL_GOP_DWIN_SetSourceSel(GOP_CTX_HAL_LOCAL *pGOPHalLocal, DRV_GOP_DWIN_SRC_SEL enSrcSel); 332 GOP_Result HAL_GOP_DWIN_EnableR2YCSC(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_BOOL bEnable); 333 GOP_Result HAL_GOP_SetDWINMIU(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 miu); 334 GOP_Result HAL_GOP_GetGOPDst(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8gopNum, DRV_GOPDstType *pGopDst); 335 GOP_Result HAL_GOP_GetMixerDst(GOP_CTX_HAL_LOCAL *pGOPHalLocal, DRV_GOPDstType *pGopDst); 336 GOP_Result HAL_GOP_SetMixerDst(GOP_CTX_HAL_LOCAL *pGOPHalLocal, DRV_GOPDstType eDstType); 337 GOP_Result HAL_GOP_GOPSel(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GOPNum); 338 GOP_Result HAL_GOP_SetGOPHighPri(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 gopNum); 339 GOP_Result HAL_GOP_SetGOPEnable2SC(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 gopNum, MS_BOOL bEnable); 340 GOP_Result HAL_GOP_SetGOP2Pto1P(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 gopNum, MS_BOOL bEnable); 341 GOP_Result HAL_GOP_SetGOPEnable2Mode1(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 gopNum, MS_BOOL bEnable); 342 GOP_Result HAL_GOP_GetGOPAlphaMode1(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 gopNum, MS_BOOL *pbEnable); 343 GOP_Result HAL_GOP_GWIN_SetDstPlane(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 GopNum, DRV_GOPDstType eDstType,MS_BOOL bOnlyCheck); 344 GOP_Result HAL_GOP_SetGOPClk(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 gopNum, DRV_GOPDstType eDstType); 345 GOP_Result HAL_GOP_SetClkForCapture(GOP_CTX_HAL_LOCAL *pGOPHalLocal, DRV_GOP_DWIN_SRC_SEL enSrcSel); 346 GOP_Result HAL_GOP_MIXER_SetGOPEnable2Mixer(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 gopNum, MS_BOOL bEnable); 347 GOP_Result HAL_GOP_MIXER_EnableVfilter(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_BOOL bEn); 348 GOP_Result HAL_GOP_MIXER_SetMux(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 gopNum, MS_U8 muxNum, MS_BOOL bEnable); 349 GOP_Result HAL_GOP_MIXER_EnableOldBlendMode(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GOP, MS_BOOL bEn); 350 GOP_Result HAL_GOP_InitMux(GOP_CTX_HAL_LOCAL *pGOPHalLocal); 351 GOP_Result HAL_GOP_SetClock(GOP_CTX_HAL_LOCAL *pGOPHalLocal,MS_BOOL bEnable); 352 GOP_Result HAL_ConvertAPIAddr(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 gwinid, MS_PHY* u64Adr); 353 GOP_Result HAL_GOP_VE_SetOutputTiming(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U32 u32mode); 354 GOP_Result HAL_GOP_MIXER_SetOutputTiming(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U32 u32mode, GOP_DRV_MixerTiming *pTM); 355 GOP_Result HAL_GOP_GWIN_EnableTileMode(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8win, MS_BOOL bEnable, E_GOP_TILE_DATA_TYPE tilemode); 356 GOP_Result HAL_GOP_SetUVSwap(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GOPNum,MS_BOOL bEn); 357 GOP_Result HAL_GOP_SetYCSwap(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GOPNum,MS_BOOL bEn); 358 GOP_Result HAL_GOP_GWIN_GetNewAlphaMode(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8win, MS_BOOL* pEnable); 359 GOP_Result HAL_GOP_GWIN_SetNewAlphaMode(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8win, MS_BOOL bEnable); 360 GOP_Result HAL_GOP_GWiN_Set3DOSD_Sub(GOP_CTX_HAL_LOCAL *pGOPHalLocal,MS_U8 u8GOP ,MS_U8 u8Gwin, MS_PHY u32SubAddr); 361 GOP_Result HAL_GOP_SetGOPToVE(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 gopNum, MS_BOOL bEn ); 362 GOP_Result HAL_GOP_3D_SetMiddle(GOP_CTX_HAL_LOCAL *pGOPHalLocal,MS_U8 u8GOP,MS_U16 u16Middle); 363 GOP_Result HAL_GOP_OC_SetOCEn(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GOP, MS_BOOL bOCEn); 364 GOP_Result HAL_GOP_OC_Get_MIU_Sel(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 *MIUId); 365 GOP_Result HAL_GOP_OC_SetOCInfo(GOP_CTX_HAL_LOCAL *pGOPHalLocal, DRV_GOP_OC_INFO* pOCinfo); 366 GOP_Result HAL_GOP_DWIN_SetRingBuffer(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U32 u32RingSize,MS_U32 u32BufSize); 367 GOP_Result HAL_GOP_AdjustField(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 GopNum, DRV_GOPDstType eDstType); 368 GOP_Result HAL_GOP_TestPattern_IsVaild(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GopNum); 369 GOP_Result HAL_GOP_SetWinFmt(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 regForm, MS_U8 u8GOPNum, MS_U8 u8GwinNum, MS_U16 colortype); 370 GOP_Result HAL_GOP_Set_PINPON(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GOPNum, MS_BOOL bEn, E_DRV_GOP_PINPON_MODE pinpon_mode); 371 GOP_Result HAL_GOP_HScalingDown(GOP_CTX_HAL_LOCAL *pGOPHalLocal,MS_U8 u8GOP, MS_BOOL bEnable,MS_U16 src, MS_U16 dst); 372 GOP_Result HAL_GOP_VScalingDown(GOP_CTX_HAL_LOCAL *pGOPHalLocal,MS_U8 u8GOP, MS_BOOL bEnable,MS_U16 src, MS_U16 dst); 373 GOP_Result HAL_GOP_DeleteWinHVSize(GOP_CTX_HAL_LOCAL *pGOPHalLocal,MS_U8 u8GOP, MS_U16 u16HSize, MS_U16 u16VSize); 374 GOP_Result HAL_GOP_DumpGOPReg(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U32 u32GopIdx, MS_U16 u16BankIdx, MS_U16 u16Addr, MS_U16* u16Val); 375 GOP_Result HAL_GOP_RestoreGOPReg(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U32 u32GopIdx, MS_U16 u16BankIdx, MS_U16 u16Addr, MS_U16 u16Val); 376 GOP_Result HAL_GOP_PowerState(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U32 u32PowerState, GFLIP_REGS_SAVE_AREA* pGOP_STRPrivate); 377 GOP_Result HAL_GOP_GWIN_SetGPUTileMode(GOP_CTX_HAL_LOCAL *pGOPHalLocal,MS_U8 gwinid, EN_DRV_GOP_GPU_TILE_MODE tile_mode); 378 GOP_Result HAL_GOP_EnableTLB(GOP_CTX_HAL_LOCAL *pGOPHalLocal,MS_U8 u8GOP, MS_BOOL bEnable); 379 GOP_Result HAL_GOP_SetTLBAddr(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GOP, MS_PHY u64TLBAddr, MS_U32 u32size); 380 GOP_Result HAL_GOP_SetTLBSubAddr(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GOP, MS_PHY u64TLBAddr); 381 #ifdef GOP_CMDQ_ENABLE 382 GOP_Result HAL_GOP_CMDQ_WriteCommand(GOP_CTX_HAL_LOCAL *pGOPHalLocal,CAF_Struct *cmdq_struct,MS_U32 *number,MS_U32 u32addr, MS_U16 u16val, MS_U16 mask); 383 GOP_Result HAL_GOP_CMDQ_BegineDraw(GOP_CTX_HAL_LOCAL *pGOPHalLocal,CAF_Struct *target,MS_U32 *number, MS_U32 *u32GopIdx); 384 GOP_Result HAL_GOP_CMDQ_EndDraw(GOP_CTX_HAL_LOCAL *pGOPHalLocal,CAF_Struct *target,MS_U32 *number, MS_U32 u32GopIdx); 385 GOP_Result HAL_GOP_CMDQ_SetGOPACKMask(GOP_CTX_HAL_LOCAL *pGOPHalLocal,MS_U16 u16GopMask); 386 GOP_Result HAL_GOP_CMDQ_SetGOPACK(GOP_CTX_HAL_LOCAL *pGOPHalLocal,MS_U8 gop); 387 #endif 388 GOP_Result HAL_GOP_EnableTwoLineBufferMode(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GOP, MS_BOOL bEnable); 389 GOP_Result HAL_GOP_Set_GWIN_INTERNAL_MIU(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GOP, MS_U8 miusel); 390 GOP_Result HAL_GOP_Set_MIU(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GOP,MS_U8 miusel); 391 GOP_Result HAL_GOP_GetIPInterlace(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_BOOL *bInterlace); 392 GOP_Result HAL_GOP_IsHDREnabled(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_BOOL *pbHDREnable); 393 GOP_Result HAL_GOP_SetGopGwinHVPixel(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GOP, MS_U8 u8win, MS_U16 hstart, MS_U16 hend, MS_U16 vstart, MS_U16 vend); 394 GOP_Result HAL_GOP_AFBC_GetCore(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GOP,MS_U8* u8Core); 395 GOP_Result Hal_SetCropWindow(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GOP, EN_GOP_CROP_CTL crop_mode); 396 GOP_Result HAL_GOP_SetDbgLevel(EN_GOP_DEBUG_LEVEL level); 397 #endif // _HAL_TEMP_H_ 398