1*53ee8cc1Swenshuai.xi //<MStar Software> 2*53ee8cc1Swenshuai.xi //****************************************************************************** 3*53ee8cc1Swenshuai.xi // MStar Software 4*53ee8cc1Swenshuai.xi // Copyright (c) 2010 - 2012 MStar Semiconductor, Inc. All rights reserved. 5*53ee8cc1Swenshuai.xi // All software, firmware and related documentation herein ("MStar Software") are 6*53ee8cc1Swenshuai.xi // intellectual property of MStar Semiconductor, Inc. ("MStar") and protected by 7*53ee8cc1Swenshuai.xi // law, including, but not limited to, copyright law and international treaties. 8*53ee8cc1Swenshuai.xi // Any use, modification, reproduction, retransmission, or republication of all 9*53ee8cc1Swenshuai.xi // or part of MStar Software is expressly prohibited, unless prior written 10*53ee8cc1Swenshuai.xi // permission has been granted by MStar. 11*53ee8cc1Swenshuai.xi // 12*53ee8cc1Swenshuai.xi // By accessing, browsing and/or using MStar Software, you acknowledge that you 13*53ee8cc1Swenshuai.xi // have read, understood, and agree, to be bound by below terms ("Terms") and to 14*53ee8cc1Swenshuai.xi // comply with all applicable laws and regulations: 15*53ee8cc1Swenshuai.xi // 16*53ee8cc1Swenshuai.xi // 1. MStar shall retain any and all right, ownership and interest to MStar 17*53ee8cc1Swenshuai.xi // Software and any modification/derivatives thereof. 18*53ee8cc1Swenshuai.xi // No right, ownership, or interest to MStar Software and any 19*53ee8cc1Swenshuai.xi // modification/derivatives thereof is transferred to you under Terms. 20*53ee8cc1Swenshuai.xi // 21*53ee8cc1Swenshuai.xi // 2. You understand that MStar Software might include, incorporate or be 22*53ee8cc1Swenshuai.xi // supplied together with third party`s software and the use of MStar 23*53ee8cc1Swenshuai.xi // Software may require additional licenses from third parties. 24*53ee8cc1Swenshuai.xi // Therefore, you hereby agree it is your sole responsibility to separately 25*53ee8cc1Swenshuai.xi // obtain any and all third party right and license necessary for your use of 26*53ee8cc1Swenshuai.xi // such third party`s software. 27*53ee8cc1Swenshuai.xi // 28*53ee8cc1Swenshuai.xi // 3. MStar Software and any modification/derivatives thereof shall be deemed as 29*53ee8cc1Swenshuai.xi // MStar`s confidential information and you agree to keep MStar`s 30*53ee8cc1Swenshuai.xi // confidential information in strictest confidence and not disclose to any 31*53ee8cc1Swenshuai.xi // third party. 32*53ee8cc1Swenshuai.xi // 33*53ee8cc1Swenshuai.xi // 4. MStar Software is provided on an "AS IS" basis without warranties of any 34*53ee8cc1Swenshuai.xi // kind. Any warranties are hereby expressly disclaimed by MStar, including 35*53ee8cc1Swenshuai.xi // without limitation, any warranties of merchantability, non-infringement of 36*53ee8cc1Swenshuai.xi // intellectual property rights, fitness for a particular purpose, error free 37*53ee8cc1Swenshuai.xi // and in conformity with any international standard. You agree to waive any 38*53ee8cc1Swenshuai.xi // claim against MStar for any loss, damage, cost or expense that you may 39*53ee8cc1Swenshuai.xi // incur related to your use of MStar Software. 40*53ee8cc1Swenshuai.xi // In no event shall MStar be liable for any direct, indirect, incidental or 41*53ee8cc1Swenshuai.xi // consequential damages, including without limitation, lost of profit or 42*53ee8cc1Swenshuai.xi // revenues, lost or damage of data, and unauthorized system use. 43*53ee8cc1Swenshuai.xi // You agree that this Section 4 shall still apply without being affected 44*53ee8cc1Swenshuai.xi // even if MStar Software has been modified by MStar in accordance with your 45*53ee8cc1Swenshuai.xi // request or instruction for your use, except otherwise agreed by both 46*53ee8cc1Swenshuai.xi // parties in writing. 47*53ee8cc1Swenshuai.xi // 48*53ee8cc1Swenshuai.xi // 5. If requested, MStar may from time to time provide technical supports or 49*53ee8cc1Swenshuai.xi // services in relation with MStar Software to you for your use of 50*53ee8cc1Swenshuai.xi // MStar Software in conjunction with your or your customer`s product 51*53ee8cc1Swenshuai.xi // ("Services"). 52*53ee8cc1Swenshuai.xi // You understand and agree that, except otherwise agreed by both parties in 53*53ee8cc1Swenshuai.xi // writing, Services are provided on an "AS IS" basis and the warranty 54*53ee8cc1Swenshuai.xi // disclaimer set forth in Section 4 above shall apply. 55*53ee8cc1Swenshuai.xi // 56*53ee8cc1Swenshuai.xi // 6. Nothing contained herein shall be construed as by implication, estoppels 57*53ee8cc1Swenshuai.xi // or otherwise: 58*53ee8cc1Swenshuai.xi // (a) conferring any license or right to use MStar name, trademark, service 59*53ee8cc1Swenshuai.xi // mark, symbol or any other identification; 60*53ee8cc1Swenshuai.xi // (b) obligating MStar or any of its affiliates to furnish any person, 61*53ee8cc1Swenshuai.xi // including without limitation, you and your customers, any assistance 62*53ee8cc1Swenshuai.xi // of any kind whatsoever, or any information; or 63*53ee8cc1Swenshuai.xi // (c) conferring any license or right under any intellectual property right. 64*53ee8cc1Swenshuai.xi // 65*53ee8cc1Swenshuai.xi // 7. These terms shall be governed by and construed in accordance with the laws 66*53ee8cc1Swenshuai.xi // of Taiwan, R.O.C., excluding its conflict of law rules. 67*53ee8cc1Swenshuai.xi // Any and all dispute arising out hereof or related hereto shall be finally 68*53ee8cc1Swenshuai.xi // settled by arbitration referred to the Chinese Arbitration Association, 69*53ee8cc1Swenshuai.xi // Taipei in accordance with the ROC Arbitration Law and the Arbitration 70*53ee8cc1Swenshuai.xi // Rules of the Association by three (3) arbitrators appointed in accordance 71*53ee8cc1Swenshuai.xi // with the said Rules. 72*53ee8cc1Swenshuai.xi // The place of arbitration shall be in Taipei, Taiwan and the language shall 73*53ee8cc1Swenshuai.xi // be English. 74*53ee8cc1Swenshuai.xi // The arbitration award shall be final and binding to both parties. 75*53ee8cc1Swenshuai.xi // 76*53ee8cc1Swenshuai.xi //****************************************************************************** 77*53ee8cc1Swenshuai.xi //<MStar Software> 78*53ee8cc1Swenshuai.xi //////////////////////////////////////////////////////////////////////////////// 79*53ee8cc1Swenshuai.xi // 80*53ee8cc1Swenshuai.xi // Copyright (c) 2008-2009 MStar Semiconductor, Inc. 81*53ee8cc1Swenshuai.xi // All rights reserved. 82*53ee8cc1Swenshuai.xi // 83*53ee8cc1Swenshuai.xi // Unless otherwise stipulated in writing, any and all information contained 84*53ee8cc1Swenshuai.xi // herein regardless in any format shall remain the sole proprietary of 85*53ee8cc1Swenshuai.xi // MStar Semiconductor Inc. and be kept in strict confidence 86*53ee8cc1Swenshuai.xi // (!��MStar Confidential Information!�L) by the recipient. 87*53ee8cc1Swenshuai.xi // Any unauthorized act including without limitation unauthorized disclosure, 88*53ee8cc1Swenshuai.xi // copying, use, reproduction, sale, distribution, modification, disassembling, 89*53ee8cc1Swenshuai.xi // reverse engineering and compiling of the contents of MStar Confidential 90*53ee8cc1Swenshuai.xi // Information is unlawful and strictly prohibited. MStar hereby reserves the 91*53ee8cc1Swenshuai.xi // rights to any and all damages, losses, costs and expenses resulting therefrom. 92*53ee8cc1Swenshuai.xi // 93*53ee8cc1Swenshuai.xi //////////////////////////////////////////////////////////////////////////////// 94*53ee8cc1Swenshuai.xi 95*53ee8cc1Swenshuai.xi #ifndef _HAL_GOP_H_ 96*53ee8cc1Swenshuai.xi #define _HAL_GOP_H_ 97*53ee8cc1Swenshuai.xi 98*53ee8cc1Swenshuai.xi #include "drvGOP.h" 99*53ee8cc1Swenshuai.xi #include "regGOP.h" 100*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 101*53ee8cc1Swenshuai.xi // Macro and Define 102*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 103*53ee8cc1Swenshuai.xi #define Gop23_GwinCtl_Ofet 0 104*53ee8cc1Swenshuai.xi 105*53ee8cc1Swenshuai.xi #define MAX_GOP_SUPPORT 3 106*53ee8cc1Swenshuai.xi #define MAX_GOP_MUX 4 107*53ee8cc1Swenshuai.xi #define MAX_GOP_MUX_SEL 4 108*53ee8cc1Swenshuai.xi #define MAX_GOP_MUX_OPNum MAX_GOP_MUX 109*53ee8cc1Swenshuai.xi #define MAX_GOP0_GWIN 2 110*53ee8cc1Swenshuai.xi #define MAX_GOP1_GWIN 1 111*53ee8cc1Swenshuai.xi #define MAX_GOP2_GWIN 1 112*53ee8cc1Swenshuai.xi #define MAX_GOP3_GWIN 0 113*53ee8cc1Swenshuai.xi #define MAX_GOP4_GWIN 0 114*53ee8cc1Swenshuai.xi #define MAX_GOP5_GWIN 0 115*53ee8cc1Swenshuai.xi 116*53ee8cc1Swenshuai.xi #define GOP0_Gwin0Id 0 117*53ee8cc1Swenshuai.xi #define GOP0_Gwin1Id 1 118*53ee8cc1Swenshuai.xi #define GOP1_Gwin0Id 2 119*53ee8cc1Swenshuai.xi #define GOP2_Gwin0Id 3 120*53ee8cc1Swenshuai.xi #define GOP3_Gwin0Id 4 121*53ee8cc1Swenshuai.xi #define GOP4_Gwin0Id 5 122*53ee8cc1Swenshuai.xi #define GOP5_Gwin0Id 6 123*53ee8cc1Swenshuai.xi 124*53ee8cc1Swenshuai.xi #define GOP0_REG_FORM E_GOP_REG_FORM_2G + E_GOP_PAL_SIZE_256 125*53ee8cc1Swenshuai.xi #define GOP1_REG_FORM E_GOP_REG_FORM_2G + E_GOP_PAL_SIZE_256 126*53ee8cc1Swenshuai.xi #define GOP2_REG_FORM E_GOP_REG_FORM_T81G + E_GOP_PAL_SIZE_NONE 127*53ee8cc1Swenshuai.xi #define GOP3_REG_FORM E_GOP_REG_FORM_T81G + E_GOP_PAL_SIZE_NONE 128*53ee8cc1Swenshuai.xi #define GOP4_REG_FORM E_GOP_REG_FORM_NONE 129*53ee8cc1Swenshuai.xi #define GOP5_REG_FORM E_GOP_REG_FORM_NONE 130*53ee8cc1Swenshuai.xi #define GOPD_REG_FORM E_GOPD_FIFO_DEPTH_64 131*53ee8cc1Swenshuai.xi 132*53ee8cc1Swenshuai.xi #define GOP0_GwinIdBase GOP0_Gwin0Id 133*53ee8cc1Swenshuai.xi #define GOP1_GwinIdBase MAX_GOP0_GWIN 134*53ee8cc1Swenshuai.xi #define GOP2_GwinIdBase MAX_GOP0_GWIN + MAX_GOP1_GWIN 135*53ee8cc1Swenshuai.xi #define GOP3_GwinIdBase MAX_GOP0_GWIN + MAX_GOP1_GWIN + MAX_GOP2_GWIN 136*53ee8cc1Swenshuai.xi #define GOP4_GwinIdBase MAX_GOP0_GWIN + MAX_GOP1_GWIN + MAX_GOP2_GWIN + MAX_GOP3_GWIN 137*53ee8cc1Swenshuai.xi #define GOP5_GwinIdBase MAX_GOP0_GWIN + MAX_GOP1_GWIN + MAX_GOP2_GWIN + MAX_GOP3_GWIN + MAX_GOP4_GWIN 138*53ee8cc1Swenshuai.xi 139*53ee8cc1Swenshuai.xi 140*53ee8cc1Swenshuai.xi 141*53ee8cc1Swenshuai.xi #define GOP_BIT0 0x01 142*53ee8cc1Swenshuai.xi #define GOP_BIT1 0x02 143*53ee8cc1Swenshuai.xi #define GOP_BIT2 0x04 144*53ee8cc1Swenshuai.xi #define GOP_BIT3 0x08 145*53ee8cc1Swenshuai.xi #define GOP_BIT4 0x10 146*53ee8cc1Swenshuai.xi #define GOP_BIT5 0x20 147*53ee8cc1Swenshuai.xi #define GOP_BIT6 0x40 148*53ee8cc1Swenshuai.xi #define GOP_BIT7 0x80 149*53ee8cc1Swenshuai.xi #define GOP_BIT8 0x0100 150*53ee8cc1Swenshuai.xi #define GOP_BIT9 0x0200 151*53ee8cc1Swenshuai.xi #define GOP_BIT10 0x0400 152*53ee8cc1Swenshuai.xi #define GOP_BIT11 0x0800 153*53ee8cc1Swenshuai.xi #define GOP_BIT12 0x1000 154*53ee8cc1Swenshuai.xi #define GOP_BIT13 0x2000 155*53ee8cc1Swenshuai.xi #define GOP_BIT14 0x4000 156*53ee8cc1Swenshuai.xi #define GOP_BIT15 0x8000 157*53ee8cc1Swenshuai.xi 158*53ee8cc1Swenshuai.xi #define GOP_REG_WORD_MASK 0xffff 159*53ee8cc1Swenshuai.xi #define GOP_REG_HW_MASK 0xff00 160*53ee8cc1Swenshuai.xi #define GOP_REG_LW_MASK 0x00ff 161*53ee8cc1Swenshuai.xi 162*53ee8cc1Swenshuai.xi #define GOP_WordUnit 16 163*53ee8cc1Swenshuai.xi #define GOP_DWIN_WordUnit 16 164*53ee8cc1Swenshuai.xi #define GOP_TotalGwinNum (MAX_GOP0_GWIN+MAX_GOP1_GWIN+MAX_GOP2_GWIN+MAX_GOP3_GWIN) 165*53ee8cc1Swenshuai.xi #define HAL_GOP_BankOffset(pGOPHalLocal) ((pGOPHalLocal)->bank_offset) 166*53ee8cc1Swenshuai.xi 167*53ee8cc1Swenshuai.xi #define GOP_FIFO_BURST_ALL (GOP_BIT8|GOP_BIT9|GOP_BIT10|GOP_BIT11|GOP_BIT12|GOP_BIT13) 168*53ee8cc1Swenshuai.xi #define GOP_FIFO_BURST_MIDDLE (GOP_BIT8|GOP_BIT10) 169*53ee8cc1Swenshuai.xi #define GOP_FIFO_BURST_SHORT (GOP_BIT9) 170*53ee8cc1Swenshuai.xi 171*53ee8cc1Swenshuai.xi #define GOP_FIFO_BURST_MASK (GOP_BIT8|GOP_BIT9|GOP_BIT10|GOP_BIT11|GOP_BIT12|GOP_BIT13) 172*53ee8cc1Swenshuai.xi 173*53ee8cc1Swenshuai.xi #define GOP_FIFO_THRESHOLD 0x70 174*53ee8cc1Swenshuai.xi 175*53ee8cc1Swenshuai.xi #ifndef GOP_MIU0_LENGTH 176*53ee8cc1Swenshuai.xi #define GOP_MIU0_LENGTH HAL_MIU1_BASE 177*53ee8cc1Swenshuai.xi #endif 178*53ee8cc1Swenshuai.xi 179*53ee8cc1Swenshuai.xi #define DWIN_SUPPORT_WINDOWDE_CAPTURE FALSE //HW issue, Not support it, should use FrameDE to capture video for DWIN 180*53ee8cc1Swenshuai.xi #define DWIN_SUPPORT_OSD_CAPTURE FALSE //Support it 181*53ee8cc1Swenshuai.xi #define DWIN_SUPPORT_CLOCK_GATING FALSE //Support it 182*53ee8cc1Swenshuai.xi #define GOP_BANK_SHIFT 1 183*53ee8cc1Swenshuai.xi #define GOP_PUBLIC_UPDATE MAX_GOP_SUPPORT 184*53ee8cc1Swenshuai.xi 185*53ee8cc1Swenshuai.xi #define CHIPID_MUNICH_SERIES 0x96 186*53ee8cc1Swenshuai.xi #define CHIPVER_MUNICH 0 187*53ee8cc1Swenshuai.xi #define CHIPVER_MALDIVES 1 188*53ee8cc1Swenshuai.xi #define MALDIVES_PD_OFFSET 19 189*53ee8cc1Swenshuai.xi 190*53ee8cc1Swenshuai.xi #define ENABLE_GOP_T3DPATCH 191*53ee8cc1Swenshuai.xi #ifdef ENABLE_GOP_T3DPATCH 192*53ee8cc1Swenshuai.xi #define GOP_PD_T3D 0x114UL 193*53ee8cc1Swenshuai.xi #define GOP_PD_NORMAL 0xA7UL 194*53ee8cc1Swenshuai.xi #endif 195*53ee8cc1Swenshuai.xi 196*53ee8cc1Swenshuai.xi #if (MAX_GOP_SUPPORT < 5) 197*53ee8cc1Swenshuai.xi #define GFLIP_REG_BANKS (MAX_GOP_SUPPORT * GOP_BANK_OFFSET) 198*53ee8cc1Swenshuai.xi #else 199*53ee8cc1Swenshuai.xi #define GFLIP_REG_BANKS (MAX_GOP_SUPPORT * GOP_BANK_OFFSET + 2) 200*53ee8cc1Swenshuai.xi #endif 201*53ee8cc1Swenshuai.xi #define GFLIP_REG16_NUM_PER_BANK 128 202*53ee8cc1Swenshuai.xi 203*53ee8cc1Swenshuai.xi /*the following is for parameters for shared between multiple process context*/ 204*53ee8cc1Swenshuai.xi typedef struct 205*53ee8cc1Swenshuai.xi { 206*53ee8cc1Swenshuai.xi GOP_CHIP_PROPERTY gopChipProperty; 207*53ee8cc1Swenshuai.xi }GOP_CTX_HAL_SHARED; 208*53ee8cc1Swenshuai.xi 209*53ee8cc1Swenshuai.xi /*the following is for parameters for used in local process context*/ 210*53ee8cc1Swenshuai.xi typedef struct 211*53ee8cc1Swenshuai.xi { 212*53ee8cc1Swenshuai.xi GOP_CTX_HAL_SHARED *pHALShared; 213*53ee8cc1Swenshuai.xi MS_U32 u32_mmio_base; 214*53ee8cc1Swenshuai.xi MS_U32 bank_offset; 215*53ee8cc1Swenshuai.xi MS_U16 u16Clk0Setting; ///Backup Current GOPG clock setting 216*53ee8cc1Swenshuai.xi MS_U16 u16Clk1Setting; ///Backup Current GOPD clock setting 217*53ee8cc1Swenshuai.xi MS_U16 u16Clk2Setting; ///Backup Current SRAM clock setting 218*53ee8cc1Swenshuai.xi DRV_GOPDstType drvGFlipGOPDst[MAX_GOP_SUPPORT]; 219*53ee8cc1Swenshuai.xi GOP_CHIP_PROPERTY *pGopChipPro; 220*53ee8cc1Swenshuai.xi DRV_GOP_CONSALPHA_BITS User_ConsAlpha_bits; 221*53ee8cc1Swenshuai.xi 222*53ee8cc1Swenshuai.xi /*check all gop dst is valid or not for each mux*/ 223*53ee8cc1Swenshuai.xi MS_BOOL *pbIsMuxVaildToGopDst; 224*53ee8cc1Swenshuai.xi }GOP_CTX_HAL_LOCAL; 225*53ee8cc1Swenshuai.xi 226*53ee8cc1Swenshuai.xi typedef struct 227*53ee8cc1Swenshuai.xi { 228*53ee8cc1Swenshuai.xi GOP_CTX_HAL_LOCAL GOPHalSTRCtx; 229*53ee8cc1Swenshuai.xi MS_U16 BankReg[GFLIP_REG_BANKS][GFLIP_REG16_NUM_PER_BANK]; 230*53ee8cc1Swenshuai.xi MS_U16 CKG_GopReg[4]; 231*53ee8cc1Swenshuai.xi MS_U16 GS_GopReg[3]; 232*53ee8cc1Swenshuai.xi MS_U16 XC_GopReg[20]; 233*53ee8cc1Swenshuai.xi }GFLIP_REGS_SAVE_AREA; 234*53ee8cc1Swenshuai.xi 235*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 236*53ee8cc1Swenshuai.xi // Type and Structure 237*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 238*53ee8cc1Swenshuai.xi typedef enum 239*53ee8cc1Swenshuai.xi { 240*53ee8cc1Swenshuai.xi E_GOP0 = 0, 241*53ee8cc1Swenshuai.xi E_GOP1 = 1, 242*53ee8cc1Swenshuai.xi E_GOP2 = 2, 243*53ee8cc1Swenshuai.xi E_GOP3 = 3, 244*53ee8cc1Swenshuai.xi E_GOP_Dwin = 4, 245*53ee8cc1Swenshuai.xi E_GOP_MIXER = 5, 246*53ee8cc1Swenshuai.xi E_GOP4 = 6, 247*53ee8cc1Swenshuai.xi E_GOP5 = 7, 248*53ee8cc1Swenshuai.xi }E_GOP_TYPE; 249*53ee8cc1Swenshuai.xi 250*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 251*53ee8cc1Swenshuai.xi // Function and Variable 252*53ee8cc1Swenshuai.xi //------------------------------------------------------------------------------------------------- 253*53ee8cc1Swenshuai.xi MS_BOOL _GetBnkOfstByGop(MS_U8 gop, MS_U32 *pBnkOfst); 254*53ee8cc1Swenshuai.xi void HAL_GOP_Init(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GOPNum); 255*53ee8cc1Swenshuai.xi void HAL_GOP_Init_Context(GOP_CTX_HAL_LOCAL *pGOPHalLocal, 256*53ee8cc1Swenshuai.xi GOP_CTX_HAL_SHARED *pHALShared, MS_BOOL bNeedInitShared); 257*53ee8cc1Swenshuai.xi void HAL_GOP_Chip_Proprity_Init(GOP_CTX_HAL_LOCAL *pGOPHalLocal); 258*53ee8cc1Swenshuai.xi void HAL_GOP_Restore_Ctx(GOP_CTX_HAL_LOCAL *pGOPHalLocal); 259*53ee8cc1Swenshuai.xi void HAL_GOP_Write16Reg(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U32 u32addr, MS_U16 u16val, MS_U16 mask); 260*53ee8cc1Swenshuai.xi void HAL_GOP_Write32Reg(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U32 u16addr, MS_U32 u32val); 261*53ee8cc1Swenshuai.xi void HAL_GOP_Write32Pal(GOP_CTX_HAL_LOCAL *pGOPHalLocal, 262*53ee8cc1Swenshuai.xi MS_U8 *pREGMAP_Base, MS_U16 *pREGMAP_Offset, MS_U32 u32REGMAP_Len, 263*53ee8cc1Swenshuai.xi MS_U8 u8Index, MS_U8 u8A, MS_U8 u8R, MS_U8 u8G, MS_U8 u8B); 264*53ee8cc1Swenshuai.xi void HAL_GOP_Read16Reg(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U32 u16addr, MS_U16* pu16ret); 265*53ee8cc1Swenshuai.xi void HAL_GOP_GWIN_SetBlending(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8win, MS_BOOL bEnable, MS_U8 u8coef); 266*53ee8cc1Swenshuai.xi void HAL_GOP_SetIOMapBase(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U32 addr); 267*53ee8cc1Swenshuai.xi void HAL_GOP_SetIOFRCMapBase(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U32 addr); 268*53ee8cc1Swenshuai.xi void HAL_GOP_SetIOPMMapBase(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U32 addr); 269*53ee8cc1Swenshuai.xi void HAL_GOP_GWIN_GetMUX(GOP_CTX_HAL_LOCAL*pGOPHalLocal, MS_U8* u8GOPNum, Gop_MuxSel eGopMux); 270*53ee8cc1Swenshuai.xi void HAL_GOP_GWIN_SetMUX(GOP_CTX_HAL_LOCAL*pGOPHalLocal, MS_U8 u8GOPNum, Gop_MuxSel eGopMux); 271*53ee8cc1Swenshuai.xi void HAL_GOP_GetGOPEnum(GOP_CTX_HAL_LOCAL *pGOPHalLocal, GOP_TYPE_DEF* GOP_TYPE); 272*53ee8cc1Swenshuai.xi MS_U16 HAL_GOP_GetBPP(GOP_CTX_HAL_LOCAL *pGOPHalLocal, DRV_GOPColorType fbFmt); 273*53ee8cc1Swenshuai.xi GOP_Result HAL_GOP_SetGOPACKMask(GOP_CTX_HAL_LOCAL *pGOPHalLocal,MS_U16 u16GopMask); 274*53ee8cc1Swenshuai.xi GOP_Result HAL_GOP_SetGOPACK(GOP_CTX_HAL_LOCAL *pGOPHalLocal,MS_U8 gop); 275*53ee8cc1Swenshuai.xi MS_U16 HAL_GOP_GetGOPACK(GOP_CTX_HAL_LOCAL *pGOPHalLocal,MS_U8 gop); 276*53ee8cc1Swenshuai.xi MS_U8 HAL_GOP_GetMaxGwinNumByGOP(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GopNum); 277*53ee8cc1Swenshuai.xi MS_U8 HAL_GOP_SelGwinIdByGOP(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8Gop, MS_U8 u8Idx); 278*53ee8cc1Swenshuai.xi MS_U8 HAL_GOP_GetMIUDst(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 gopnum); 279*53ee8cc1Swenshuai.xi void HAL_GOP_SetIPSel2SC(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_IPSEL_GOP ipSelGop); 280*53ee8cc1Swenshuai.xi E_GOP_VIDEOTIMING_MIRRORTYPE HAL_GOP_GetVideoTimingMirrorType(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_BOOL bHorizontal); 281*53ee8cc1Swenshuai.xi MS_U8 HAL_GOP_GetDWINMIU(GOP_CTX_HAL_LOCAL *pGOPHalLocal); 282*53ee8cc1Swenshuai.xi GOP_Result HAL_GOP_DWIN_SetSourceSel(GOP_CTX_HAL_LOCAL *pGOPHalLocal, DRV_GOP_DWIN_SRC_SEL enSrcSel); 283*53ee8cc1Swenshuai.xi GOP_Result HAL_GOP_DWIN_EnableR2YCSC(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_BOOL bEnable); 284*53ee8cc1Swenshuai.xi GOP_Result HAL_GOP_SetDWINMIU(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 miu); 285*53ee8cc1Swenshuai.xi GOP_Result HAL_GOP_GetGOPDst(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8gopNum, DRV_GOPDstType *pGopDst); 286*53ee8cc1Swenshuai.xi GOP_Result HAL_GOP_GetMixerDst(GOP_CTX_HAL_LOCAL *pGOPHalLocal, DRV_GOPDstType *pGopDst); 287*53ee8cc1Swenshuai.xi GOP_Result HAL_GOP_SetMixerDst(GOP_CTX_HAL_LOCAL *pGOPHalLocal, DRV_GOPDstType eDstType); 288*53ee8cc1Swenshuai.xi GOP_Result HAL_GOP_GOPSel(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GOPNum); 289*53ee8cc1Swenshuai.xi GOP_Result HAL_GOP_SetGOPHighPri(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 gopNum); 290*53ee8cc1Swenshuai.xi GOP_Result HAL_GOP_SetGOPEnable2SC(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 gopNum, MS_BOOL bEnable); 291*53ee8cc1Swenshuai.xi GOP_Result HAL_GOP_SetGOP2Pto1P(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 gopNum, MS_BOOL bEnable); 292*53ee8cc1Swenshuai.xi GOP_Result HAL_GOP_SetGOPEnable2Mode1(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 gopNum, MS_BOOL bEnable); 293*53ee8cc1Swenshuai.xi GOP_Result HAL_GOP_GetGOPAlphaMode1(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 gopNum, MS_BOOL *pbEnable); 294*53ee8cc1Swenshuai.xi GOP_Result HAL_GOP_GWIN_SetDstPlane(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 GopNum, DRV_GOPDstType eDstType,MS_BOOL bOnlyCheck); 295*53ee8cc1Swenshuai.xi GOP_Result HAL_GOP_SetGOPClk(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 gopNum, DRV_GOPDstType eDstType); 296*53ee8cc1Swenshuai.xi GOP_Result HAL_GOP_SetClkForCapture(GOP_CTX_HAL_LOCAL *pGOPHalLocal, DRV_GOP_DWIN_SRC_SEL enSrcSel); 297*53ee8cc1Swenshuai.xi GOP_Result HAL_GOP_MIXER_SetGOPEnable2Mixer(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 gopNum, MS_BOOL bEnable); 298*53ee8cc1Swenshuai.xi GOP_Result HAL_GOP_MIXER_EnableVfilter(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_BOOL bEn); 299*53ee8cc1Swenshuai.xi GOP_Result HAL_GOP_MIXER_SetMux(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 gopNum, MS_U8 muxNum, MS_BOOL bEnable); 300*53ee8cc1Swenshuai.xi GOP_Result HAL_GOP_MIXER_EnableOldBlendMode(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GOP, MS_BOOL bEn); 301*53ee8cc1Swenshuai.xi MS_BOOL HAL_GOP_GWIN_IsNewAlphaMode(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GOP); 302*53ee8cc1Swenshuai.xi GOP_Result HAL_GOP_InitMux(GOP_CTX_HAL_LOCAL *pGOPHalLocal); 303*53ee8cc1Swenshuai.xi GOP_Result HAL_GOP_SetClock(GOP_CTX_HAL_LOCAL *pGOPHalLocal,MS_BOOL bEnable); 304*53ee8cc1Swenshuai.xi GOP_Result HAL_ConvertAPIAddr(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 gwinid, MS_U32* u32Adr); 305*53ee8cc1Swenshuai.xi GOP_Result HAL_GOP_VE_SetOutputTiming(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U32 u32mode); 306*53ee8cc1Swenshuai.xi GOP_Result HAL_GOP_MIXER_SetOutputTiming(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U32 u32mode, GOP_DRV_MixerTiming *pTM); 307*53ee8cc1Swenshuai.xi GOP_Result HAL_GOP_GWIN_EnableTileMode(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8win, MS_BOOL bEnable, E_GOP_TILE_DATA_TYPE tilemode); 308*53ee8cc1Swenshuai.xi GOP_Result HAL_GOP_SetUVSwap(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GOPNum,MS_BOOL bEn); 309*53ee8cc1Swenshuai.xi GOP_Result HAL_GOP_SetYCSwap(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GOPNum,MS_BOOL bEn); 310*53ee8cc1Swenshuai.xi GOP_Result HAL_GOP_GWIN_SetNewAlphaMode(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8win, MS_BOOL bEnable); 311*53ee8cc1Swenshuai.xi GOP_Result HAL_GOP_GWiN_Set3DOSD_Sub(GOP_CTX_HAL_LOCAL *pGOPHalLocal,MS_U8 u8GOP ,MS_U8 u8Gwin, MS_U32 u32SubAddr); 312*53ee8cc1Swenshuai.xi GOP_Result HAL_GOP_SetGOPToVE(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 gopNum, MS_BOOL bEn ); 313*53ee8cc1Swenshuai.xi GOP_Result HAL_GOP_3D_SetMiddle(GOP_CTX_HAL_LOCAL *pGOPHalLocal,MS_U8 u8GOP,MS_U16 u16Middle); 314*53ee8cc1Swenshuai.xi GOP_Result HAL_GOP_OC_SetOCEn(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GOP, MS_BOOL bOCEn); 315*53ee8cc1Swenshuai.xi GOP_Result HAL_GOP_OC_Get_MIU_Sel(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 *MIUId); 316*53ee8cc1Swenshuai.xi GOP_Result HAL_GOP_OC_SetOCInfo(GOP_CTX_HAL_LOCAL *pGOPHalLocal, DRV_GOP_OC_INFO* pOCinfo); 317*53ee8cc1Swenshuai.xi GOP_Result HAL_GOP_DWIN_SetRingBuffer(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U32 u32RingSize,MS_U32 u32BufSize); 318*53ee8cc1Swenshuai.xi GOP_Result HAL_GOP_AdjustField(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 GopNum, DRV_GOPDstType eDstType); 319*53ee8cc1Swenshuai.xi GOP_Result HAL_GOP_TestPattern_IsVaild(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GopNum); 320*53ee8cc1Swenshuai.xi GOP_Result HAL_GOP_SetWinFmt(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 regForm, MS_U8 u8GOPNum, MS_U8 u8GwinNum, MS_U16 colortype); 321*53ee8cc1Swenshuai.xi GOP_Result HAL_GOP_Set_PINPON(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GOPNum, MS_BOOL bEn, E_DRV_GOP_PINPON_MODE pinpon_mode); 322*53ee8cc1Swenshuai.xi GOP_Result HAL_GOP_MIXER_EnableOldBlendMode(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GOP, MS_BOOL bEn); 323*53ee8cc1Swenshuai.xi GOP_Result HAL_GOP_HScalingDown(GOP_CTX_HAL_LOCAL *pGOPHalLocal,MS_U8 u8GOP, MS_BOOL bEnable,MS_U16 src, MS_U16 dst); 324*53ee8cc1Swenshuai.xi GOP_Result HAL_GOP_VScalingDown(GOP_CTX_HAL_LOCAL *pGOPHalLocal,MS_U8 u8GOP, MS_BOOL bEnable,MS_U16 src, MS_U16 dst); 325*53ee8cc1Swenshuai.xi GOP_Result HAL_GOP_DeleteWinHVSize(GOP_CTX_HAL_LOCAL *pGOPHalLocal,MS_U8 u8GOP, MS_U16 u16HSize, MS_U16 u16VSize); 326*53ee8cc1Swenshuai.xi GOP_Result HAL_GOP_GWIN_SetGPUTileMode(GOP_CTX_HAL_LOCAL *pGOPHalLocal,MS_U8 gwinid, EN_DRV_GOP_GPU_TILE_MODE tile_mode); 327*53ee8cc1Swenshuai.xi GOP_Result HAL_GOP_EnableTLB(GOP_CTX_HAL_LOCAL *pGOPHalLocal,MS_U8 u8GOP, MS_BOOL bEnable); 328*53ee8cc1Swenshuai.xi GOP_Result HAL_GOP_SetTLBAddr(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GOP, MS_U32 u32tlbaddr, MS_U32 u32size); 329*53ee8cc1Swenshuai.xi GOP_Result HAL_GOP_SetTLBSubAddr(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GOP, MS_U32 u32tlbaddr); 330*53ee8cc1Swenshuai.xi GOP_Result HAL_GOP_EnableTwoLineBufferMode(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GOP, MS_BOOL bEnable); 331*53ee8cc1Swenshuai.xi GOP_Result HAL_GOP_DumpGOPReg(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U32 u32GopIdx, MS_U16 u16BankIdx, MS_U16 u16Addr, MS_U16* u16Val); 332*53ee8cc1Swenshuai.xi GOP_Result HAL_GOP_RestoreGOPReg(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U32 u32GopIdx, MS_U16 u16BankIdx, MS_U16 u16Addr, MS_U16 u16Val); 333*53ee8cc1Swenshuai.xi GOP_Result HAL_GOP_PowerState(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U32 u32PowerState, GFLIP_REGS_SAVE_AREA* pGOP_STRPrivate); 334*53ee8cc1Swenshuai.xi #endif // _HAL_TEMP_H_ 335*53ee8cc1Swenshuai.xi 336