xref: /utopia/UTPA2-700.0.x/modules/graphic/hal/kastor/gop/halGOP.h (revision 53ee8cc121a030b8d368113ac3e966b4705770ef)
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94 
95 #ifndef _HAL_GOP_H_
96 #define _HAL_GOP_H_
97 
98 #include "drvGOP.h"
99 #include "regGOP.h"
100 
101 #include "apiGOP.h"
102 
103 //-------------------------------------------------------------------------------------------------
104 //  Macro and Define
105 //-------------------------------------------------------------------------------------------------
106 #define Gop23_GwinCtl_Ofet                      0UL
107 
108 #define MAX_GOP_MIUCOUNT                        2UL
109 #define MAX_GOP_MIUSEL                          MAX_GOP_MIUCOUNT-1
110 #define MAX_GOP_SUPPORT                         5UL
111 #define MAX_GOP_MUX                             4UL
112 #define MAX_GOP_MUX_SEL                         4UL
113 #define MAX_GOP_MUX_OPNum			            MAX_GOP_MUX
114 #define MAX_GOP_DualMUX_Num			            3UL
115 #define MAX_GOP0_GWIN                           2UL
116 #define MAX_GOP1_GWIN                           2UL
117 #define MAX_GOP2_GWIN                           1UL
118 #define MAX_GOP3_GWIN                           1UL
119 #define MAX_GOP4_GWIN                           0UL
120 #define MAX_GOP5_GWIN                           1UL
121 
122 #define GOP0_Gwin0Id                            0UL
123 #define GOP0_Gwin1Id                            1UL
124 #define GOP1_Gwin0Id                            2UL
125 #define GOP1_Gwin1Id                            3UL
126 #define GOP2_Gwin0Id                            4UL
127 #define GOP3_Gwin0Id                            5UL
128 #define GOP4_Gwin0Id                            0xF0
129 #define GOP5_Gwin0Id                            6UL
130 
131 #define GOP0_REG_FORM                           E_GOP_REG_FORM_2G + E_GOP_PAL_SIZE_256
132 #define GOP1_REG_FORM                           E_GOP_REG_FORM_2G + E_GOP_PAL_SIZE_256
133 #define GOP2_REG_FORM                           E_GOP_REG_FORM_T81G + E_GOP_PAL_SIZE_NONE
134 #define GOP3_REG_FORM                           E_GOP_REG_FORM_T81G + E_GOP_PAL_SIZE_NONE
135 #define GOP4_REG_FORM                           E_GOP_REG_FORM_NONE
136 #define GOP5_REG_FORM                           E_GOP_REG_FORM_T81G + E_GOP_PAL_SIZE_NONE
137 #define GOPD_REG_FORM                           E_GOPD_FIFO_DEPTH_64
138 
139 
140 #define GOP0_GwinIdBase                         GOP0_Gwin0Id
141 #define GOP1_GwinIdBase                         MAX_GOP0_GWIN
142 #define GOP2_GwinIdBase                         MAX_GOP0_GWIN + MAX_GOP1_GWIN
143 #define GOP3_GwinIdBase                         MAX_GOP0_GWIN + MAX_GOP1_GWIN + MAX_GOP2_GWIN
144 #define GOP4_GwinIdBase                         MAX_GOP0_GWIN + MAX_GOP1_GWIN + MAX_GOP2_GWIN + MAX_GOP3_GWIN
145 #define GOP5_GwinIdBase                         MAX_GOP0_GWIN + MAX_GOP1_GWIN + MAX_GOP2_GWIN + MAX_GOP3_GWIN + MAX_GOP4_GWIN
146 
147 #define MAX_MIXER_MUX   						2
148 #define MIXER_MUX0Id 							0
149 #define MIXER_MUX1Id 							1
150 
151 
152 #define GOP_BIT0    0x01
153 #define GOP_BIT1    0x02
154 #define GOP_BIT2    0x04
155 #define GOP_BIT3    0x08
156 #define GOP_BIT4    0x10
157 #define GOP_BIT5    0x20
158 #define GOP_BIT6    0x40
159 #define GOP_BIT7    0x80
160 #define GOP_BIT8    0x0100
161 #define GOP_BIT9    0x0200
162 #define GOP_BIT10   0x0400
163 #define GOP_BIT11   0x0800
164 #define GOP_BIT12   0x1000
165 #define GOP_BIT13   0x2000
166 #define GOP_BIT14   0x4000
167 #define GOP_BIT15   0x8000
168 
169 #define GOP_REG_WORD_MASK                       0xFFFFUL
170 #define GOP_REG_HW_MASK                         0xFF00UL
171 #define GOP_REG_LW_MASK                         0x00FFUL
172 
173 #define GOP_VE_PAL_HS_DELAY           0xE4
174 #define GOP_VE_NTSC_HS_DELAY          0xD3
175 #define GOP_VE_PAL_HSTART_OFST  0x19
176 #define GOP_VE_PAL_VSTART_OFST  0x29
177 #define GOP_VE_NTSC_HSTART_OFST  0x19
178 #define GOP_VE_NTSC_VSTART_OFST  0x23
179 #define GOP_VE_PAL_WIDTH    0x2E9 //720+0x48
180 #define GOP_VE_PAL_HEIGHT    0x26A //0x269
181 #define GOP_VE_PAL_HTOTAL    0x359
182 #define GOP_VE_NTSC_WIDTH     0x2E9
183 #define GOP_VE_NTSC_HEIGHT    0x204 //0x203
184 #define GOP_VE_NTSC_HTOTAL    0x359
185 
186 #define GOP_WordUnit                            32
187 #define GOP_DWIN_WordUnit                       32UL
188 #define GOP_TotalGwinNum                        (MAX_GOP0_GWIN+MAX_GOP1_GWIN+MAX_GOP2_GWIN+MAX_GOP3_GWIN+MAX_GOP4_GWIN+MAX_GOP5_GWIN)
189 #define HAL_GOP_BankOffset(pGOPHalLocal)        ((pGOPHalLocal)->bank_offset)
190 
191 #define GOP_FIFO_BURST_ALL                      (GOP_BIT8|GOP_BIT9|GOP_BIT10|GOP_BIT11|GOP_BIT12)
192 #define GOP_FIFO_BURST_MIDDLE                   (GOP_BIT8|GOP_BIT9)
193 #define GOP_FIFO_BURST_SHORT                    (GOP_BIT8)
194 
195 #define GOP_FIFO_BURST_MASK                     (GOP_BIT8|GOP_BIT9|GOP_BIT10|GOP_BIT11|GOP_BIT12)
196 #define GOP_FIFO_THRESHOLD                      0x30UL
197 
198 #ifndef GOP_MIU0_LENGTH
199 #define GOP_MIU0_LENGTH                         HAL_MIU1_BASE
200 #endif
201 
202 #define DWIN_SUPPORT_WINDOWDE_CAPTURE           FALSE //HW issue, Not support it, should use FrameDE to capture video for DWIN
203 #define DWIN_SUPPORT_OSD_CAPTURE                FALSE  //Support it
204 #define DWIN_SUPPORT_CLOCK_GATING               FALSE  //Support it
205 
206 #define ENABLE_GOP_T3DPATCH
207 #ifdef ENABLE_GOP_T3DPATCH
208 #define GOP_PD_T3D                              0x153UL
209 #define GOP_PD_NORMAL                           0xD3UL
210 #endif
211 
212 #define GOP_4K2K30
213 
214 #define GOP_PUBLIC_UPDATE MAX_GOP_SUPPORT
215 
216 #if (MAX_GOP_SUPPORT < 5)
217 #define GFLIP_REG_BANKS (MAX_GOP_SUPPORT * GOP_BANK_OFFSET)
218 #else
219 #define GFLIP_REG_BANKS (MAX_GOP_SUPPORT * GOP_BANK_OFFSET + 2)
220 #endif
221 #define GFLIP_REG16_NUM_PER_BANK                128UL
222 
223 #define GPU_TILE_FORMAT_ARGB8888                0x5UL
224 
225 #define AFBC_CORE_COUNT 2
226 
227 #if (defined ANDROID) && (defined TV_OS)
228 #define GOP_CMDQ_ENABLE
229 #endif
230 
231 #ifdef GOP_CMDQ_ENABLE
232 #include "drvCMDQ.h"
233 #endif
234 
235 #define AFBC_ALIGN_FACTOR      16
236 
237 #define VE_MUX_INIT_VALUE                       5UL
238 
239 //Gwin enable HW bug
240 #define GOP_AUTO_CLK_GATING_PATCH
241 
242 /*the following is for parameters for shared between multiple process context*/
243 typedef struct __attribute__((packed))
244 {
245     GOP_CHIP_PROPERTY       gopChipProperty;
246     MS_U16 u16GopSplitMode_LRWIDTH[SHARED_GOP_MAX_COUNT];
247     DRV_GOPDstType GOP_Dst[SHARED_GOP_MAX_COUNT];
248 }GOP_CTX_HAL_SHARED;
249 
250 /*the following is for parameters for used in local process context*/
251 typedef struct
252 {
253     GOP_CTX_HAL_SHARED      *pHALShared;
254     MS_VIRT                 va_mmio_base;
255     MS_U32                  bank_offset;
256     MS_U16                  u16Clk0Setting; ///Backup Current GOPG clock setting
257     MS_U16                  u16Clk1Setting; ///Backup Current GOPD clock setting
258     MS_U16                  u16Clk2Setting; ///Backup Current SRAM clock setting
259     DRV_GOPDstType          drvGFlipGOPDst[MAX_GOP_SUPPORT];
260     GOP_CHIP_PROPERTY       *pGopChipPro;
261     DRV_GOP_CONSALPHA_BITS  User_ConsAlpha_bits;
262 
263     /*check all gop dst is valid or not for each mux*/
264     MS_BOOL                 *pbIsMuxVaildToGopDst;
265 }GOP_CTX_HAL_LOCAL;
266 
267 typedef struct
268 {
269     GOP_CTX_HAL_LOCAL GOPHalSTRCtx;
270     MS_U16 BankReg[GFLIP_REG_BANKS][GFLIP_REG16_NUM_PER_BANK];
271     MS_U16 CKG_GopReg[10];
272     MS_U16 GS_GopReg[3];
273     MS_U16 XC_GopReg[20];
274 }GFLIP_REGS_SAVE_AREA;
275 
276 //VE register bank
277 typedef enum
278 {
279     MS_VE_REG_BANK_3B,
280     MS_VE_REG_BANK_3E,
281     MS_VE_REG_BANK_3F,
282 } MS_VE_REG_BANK;
283 
284 typedef enum
285 {
286     EN_OSD_0,
287     EN_OSD_1,
288 }EN_VE_OSD_ENABLE;
289 
290 /*To write VE bank register*/
291 extern void MApi_VE_W2BYTE_MSK(MS_VE_REG_BANK VE_BK, MS_U32 u32Reg, MS_U16 u16Val, MS_U16 u16Mask);
292 extern MS_U16 MApi_VE_R2BYTE_MSK(MS_VE_REG_BANK VE_BK, MS_U32 u32Reg, MS_U16 u16Mask);
293 
294 //-------------------------------------------------------------------------------------------------
295 //  Type and Structure
296 //-------------------------------------------------------------------------------------------------
297 typedef enum
298 {
299     E_GOP0 = 0,
300     E_GOP1 = 1,
301     E_GOP2 = 2,
302     E_GOP3 = 3,
303     E_GOP4 = 4,
304     E_GOP_Dwin = 5,
305     E_GOP_MIXER = 6,
306     E_GOP5 = 7,
307 }E_GOP_TYPE;
308 
309 //-------------------------------------------------------------------------------------------------
310 //  Function and Variable
311 //-------------------------------------------------------------------------------------------------
312 MS_BOOL _GetBnkOfstByGop(MS_U8 gop, MS_U32 *pBnkOfst);
313 void HAL_GOP_Init(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GOPNum);
314 void HAL_GOP_Init_Context(GOP_CTX_HAL_LOCAL *pGOPHalLocal,
315                                      GOP_CTX_HAL_SHARED *pHALShared, MS_BOOL bNeedInitShared);
316 void HAL_GOP_Chip_Proprity_Init(GOP_CTX_HAL_LOCAL *pGOPHalLocal);
317 void HAL_GOP_Restore_Ctx(GOP_CTX_HAL_LOCAL *pGOPHalLocal);
318 void HAL_GOP_Write16Reg(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U32 u32addr, MS_U16 u16val, MS_U16 mask);
319 void HAL_GOP_Write32Reg(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U32 u16addr, MS_U32 u32val);
320 void HAL_GOP_Write32Pal(GOP_CTX_HAL_LOCAL *pGOPHalLocal,
321 MS_U8* pREGMAP_Base, MS_U16 *pREGMAP_Offset, MS_U32 u32REGMAP_Len,
322 MS_U8 u8Index, MS_U8 u8A, MS_U8 u8R, MS_U8 u8G, MS_U8 u8B);
323 void HAL_GOP_Read16Reg(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U32 u16addr, MS_U16* pu16ret);
324 void HAL_GOP_GWIN_SetBlending(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8win, MS_BOOL bEnable, MS_U8 u8coef);
325 void HAL_GOP_SetIOMapBase(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_VIRT addr);
326 void HAL_GOP_SetIOFRCMapBase(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_VIRT addr);
327 void HAL_GOP_SetIOPMMapBase(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_VIRT addr);
328 void HAL_GOP_GWIN_GetMUX(GOP_CTX_HAL_LOCAL*pGOPHalLocal, MS_U8* u8GOPNum, Gop_MuxSel eGopMux);
329 void HAL_GOP_GWIN_SetMUX(GOP_CTX_HAL_LOCAL*pGOPHalLocal, MS_U8 u8GOPNum, Gop_MuxSel eGopMux);
330 void HAL_GOP_GetGOPEnum(GOP_CTX_HAL_LOCAL *pGOPHalLocal, GOP_TYPE_DEF* GOP_TYPE);
331 MS_U16 HAL_GOP_GetBPP(GOP_CTX_HAL_LOCAL *pGOPHalLocal, DRV_GOPColorType fbFmt);
332 GOP_Result HAL_GOP_SetGOPACKMask(GOP_CTX_HAL_LOCAL *pGOPHalLocal,MS_U16 u16GopMask);
333 GOP_Result HAL_GOP_SetGOPACK(GOP_CTX_HAL_LOCAL *pGOPHalLocal,MS_U8 gop);
334 MS_U16 HAL_GOP_GetGOPACK(GOP_CTX_HAL_LOCAL *pGOPHalLocal,MS_U8 gop);
335 MS_U8 HAL_GOP_GetMaxGwinNumByGOP(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GopNum);
336 MS_U8 HAL_GOP_SelGwinIdByGOP(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8Gop, MS_U8 u8Idx);
337 MS_U8 HAL_GOP_GetMIUDst(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 gopnum);
338 void HAL_GOP_SetIPSel2SC(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_IPSEL_GOP ipSelGop);
339 E_GOP_VIDEOTIMING_MIRRORTYPE HAL_GOP_GetVideoTimingMirrorType(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_BOOL bHorizontal);
340 MS_U8 HAL_GOP_GetDWINMIU(GOP_CTX_HAL_LOCAL *pGOPHalLocal);
341 GOP_Result HAL_GOP_DWIN_SetSourceSel(GOP_CTX_HAL_LOCAL *pGOPHalLocal, DRV_GOP_DWIN_SRC_SEL enSrcSel);
342 GOP_Result HAL_GOP_DWIN_EnableR2YCSC(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_BOOL bEnable);
343 GOP_Result HAL_GOP_SetDWINMIU(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 miu);
344 GOP_Result HAL_GOP_GetGOPDst(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8gopNum, DRV_GOPDstType *pGopDst);
345 GOP_Result HAL_GOP_GetMixerDst(GOP_CTX_HAL_LOCAL *pGOPHalLocal, DRV_GOPDstType *pGopDst);
346 GOP_Result HAL_GOP_SetMixerDst(GOP_CTX_HAL_LOCAL *pGOPHalLocal, DRV_GOPDstType eDstType);
347 GOP_Result HAL_GOP_GOPSel(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GOPNum);
348 GOP_Result HAL_GOP_SetGOPHighPri(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 gopNum);
349 GOP_Result HAL_GOP_SetGOPEnable2SC(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 gopNum, MS_BOOL bEnable);
350 GOP_Result HAL_GOP_SetGOP2Pto1P(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 gopNum, MS_BOOL bEnable);
351 GOP_Result HAL_GOP_SetGOPEnable2Mode1(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 gopNum, MS_BOOL bEnable);
352 GOP_Result HAL_GOP_GetGOPAlphaMode1(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 gopNum, MS_BOOL *pbEnable);
353 GOP_Result HAL_GOP_GWIN_SetDstPlane(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 GopNum, DRV_GOPDstType eDstType,MS_BOOL bOnlyCheck);
354 GOP_Result HAL_GOP_SetGOPClk(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 gopNum, DRV_GOPDstType eDstType);
355 GOP_Result HAL_GOP_SetClkForCapture(GOP_CTX_HAL_LOCAL *pGOPHalLocal, DRV_GOP_DWIN_SRC_SEL enSrcSel);
356 GOP_Result HAL_GOP_MIXER_SetGOPEnable2Mixer(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 gopNum, MS_BOOL bEnable);
357 GOP_Result HAL_GOP_MIXER_EnableVfilter(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_BOOL bEn);
358 GOP_Result HAL_GOP_MIXER_SetMux(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 gopNum, MS_U8 muxNum, MS_BOOL bEnable);
359 GOP_Result HAL_GOP_MIXER_EnableOldBlendMode(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GOP, MS_BOOL bEn);
360 GOP_Result HAL_GOP_EnableSCPerPixelNewAlphaMode(GOP_CTX_HAL_LOCAL *pGOPHalLocal, Gop_MuxSel muxNum, MS_BOOL bEnable);
361 GOP_Result HAL_GOP_EnableSCNewAlphaMode(GOP_CTX_HAL_LOCAL *pGOPHalLocal, Gop_MuxSel muxNum, MS_BOOL bEnable);
362 GOP_Result HAL_GOP_InitMux(GOP_CTX_HAL_LOCAL *pGOPHalLocal);
363 GOP_Result HAL_GOP_SetClock(GOP_CTX_HAL_LOCAL *pGOPHalLocal,MS_BOOL bEnable);
364 GOP_Result HAL_ConvertAPIAddr(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 gwinid, MS_PHY* u64Adr);
365 GOP_Result HAL_GOP_VE_SetOutputTiming(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U32 u32mode);
366 GOP_Result HAL_GOP_MIXER_SetOutputTiming(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U32 u32mode, GOP_DRV_MixerTiming *pTM);
367 GOP_Result HAL_GOP_GWIN_EnableTileMode(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8win, MS_BOOL bEnable, E_GOP_TILE_DATA_TYPE tilemode);
368 GOP_Result HAL_GOP_SetUVSwap(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GOPNum,MS_BOOL bEn);
369 GOP_Result HAL_GOP_SetYCSwap(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GOPNum,MS_BOOL bEn);
370 GOP_Result HAL_GOP_GWIN_GetNewAlphaMode(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8win, MS_BOOL* pEnable);
371 GOP_Result HAL_GOP_GWIN_SetNewAlphaMode(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8win, MS_BOOL bEnable);
372 GOP_Result HAL_GOP_GWiN_Set3DOSD_Sub(GOP_CTX_HAL_LOCAL *pGOPHalLocal,MS_U8 u8GOP ,MS_U8 u8Gwin, MS_PHY u32SubAddr);
373 GOP_Result HAL_GOP_VE_SetOSDEnable(GOP_CTX_HAL_LOCAL *pGOPHalLocal,MS_BOOL bEnable, EN_VE_OSD_ENABLE eOSD, MS_U8 gopNum);
374 GOP_Result HAL_GOP_SetGOPToVE(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 gopNum, MS_BOOL bEn );
375 GOP_Result HAL_GOP_3D_SetMiddle(GOP_CTX_HAL_LOCAL *pGOPHalLocal,MS_U8 u8GOP,MS_U16 u16Middle);
376 GOP_Result HAL_GOP_OC_SetOCEn(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GOP, MS_BOOL bOCEn);
377 GOP_Result HAL_GOP_OC_Get_MIU_Sel(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 *MIUId);
378 GOP_Result HAL_GOP_OC_SetOCInfo(GOP_CTX_HAL_LOCAL *pGOPHalLocal, DRV_GOP_OC_INFO* pOCinfo);
379 GOP_Result HAL_GOP_DWIN_SetRingBuffer(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U32 u32RingSize,MS_U32 u32BufSize);
380 GOP_Result HAL_GOP_AdjustField(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 GopNum, DRV_GOPDstType eDstType);
381 GOP_Result HAL_GOP_TestPattern_IsVaild(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GopNum);
382 GOP_Result HAL_GOP_SetWinFmt(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 regForm, MS_U8 u8GOPNum, MS_U8 u8GwinNum, MS_U16 colortype);
383 GOP_Result HAL_GOP_Set_PINPON(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GOPNum, MS_BOOL bEn, E_DRV_GOP_PINPON_MODE pinpon_mode);
384 GOP_Result HAL_GOP_HScalingDown(GOP_CTX_HAL_LOCAL *pGOPHalLocal,MS_U8 u8GOP, MS_BOOL bEnable,MS_U16 src, MS_U16 dst);
385 GOP_Result HAL_GOP_VScalingDown(GOP_CTX_HAL_LOCAL *pGOPHalLocal,MS_U8 u8GOP, MS_BOOL bEnable,MS_U16 src, MS_U16 dst);
386 GOP_Result HAL_GOP_DeleteWinHVSize(GOP_CTX_HAL_LOCAL *pGOPHalLocal,MS_U8 u8GOP, MS_U16 u16HSize, MS_U16 u16VSize);
387 GOP_Result HAL_GOP_DumpGOPReg(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U32 u32GopIdx, MS_U16 u16BankIdx, MS_U16 u16Addr, MS_U16* u16Val);
388 GOP_Result HAL_GOP_RestoreGOPReg(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U32 u32GopIdx, MS_U16 u16BankIdx, MS_U16 u16Addr, MS_U16 u16Val);
389 GOP_Result HAL_GOP_PowerState(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U32 u32PowerState, GFLIP_REGS_SAVE_AREA* pGOP_STRPrivate);
390 GOP_Result HAL_GOP_GWIN_SetGPUTileMode(GOP_CTX_HAL_LOCAL *pGOPHalLocal,MS_U8 gwinid, EN_DRV_GOP_GPU_TILE_MODE tile_mode);
391 GOP_Result HAL_GOP_EnableTLB(GOP_CTX_HAL_LOCAL *pGOPHalLocal,MS_U8 u8GOP, MS_BOOL bEnable);
392 GOP_Result HAL_GOP_SetTLBAddr(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GOP, MS_PHY u64TLBAddr, MS_U32 u32size);
393 GOP_Result HAL_GOP_SetTLBSubAddr(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GOP, MS_PHY u64TLBAddr);
394 #ifdef GOP_CMDQ_ENABLE
395 GOP_Result HAL_GOP_CMDQ_WriteCommand(GOP_CTX_HAL_LOCAL *pGOPHalLocal,CAF_Struct *cmdq_struct,MS_U32 *number,MS_U32 u32addr, MS_U16 u16val, MS_U16 mask);
396 GOP_Result HAL_GOP_CMDQ_BegineDraw(GOP_CTX_HAL_LOCAL *pGOPHalLocal,CAF_Struct *target,MS_U32 *number, MS_U32 *u32GopIdx);
397 GOP_Result HAL_GOP_CMDQ_EndDraw(GOP_CTX_HAL_LOCAL *pGOPHalLocal,CAF_Struct *target,MS_U32 *number, MS_U32 u32GopIdx);
398 GOP_Result HAL_GOP_CMDQ_SetGOPACKMask(GOP_CTX_HAL_LOCAL *pGOPHalLocal,MS_U16 u16GopMask);
399 GOP_Result HAL_GOP_CMDQ_SetGOPACK(GOP_CTX_HAL_LOCAL *pGOPHalLocal,MS_U8 gop);
400 #endif
401 GOP_Result HAL_GOP_EnableTwoLineBufferMode(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GOP, MS_BOOL bEnable);
402 GOP_Result HAL_GOP_Set_GWIN_INTERNAL_MIU(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GOP, MS_U8 miusel);
403 GOP_Result HAL_GOP_Set_MIU(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GOP,MS_U8 miusel);
404 GOP_Result HAL_GOP_SetGopGwinHVPixel(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GOP, MS_U8 u8win, MS_U16 hstart, MS_U16 hend, MS_U16 vstart, MS_U16 vend);
405 GOP_Result HAL_GOP_AFBC_GetCore(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GOP,MS_U8* u8Core);
406 GOP_Result Hal_SetCropWindow(GOP_CTX_HAL_LOCAL *pGOPHalLocal, MS_U8 u8GOP, EN_GOP_CROP_CTL crop_mode);
407 //GOP_Result HAL_GOP_SetDbgLevel(EN_GOP_DEBUG_LEVEL level);
408 #define HAL_GOP_SetDbgLevel(args...)
409 #endif // _HAL_TEMP_H_
410